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[wch][spi] 修改ch32 risc-v spi底层驱动函数返回值类型 #6979

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merged 4 commits into from
Feb 27, 2023
Merged

[wch][spi] 修改ch32 risc-v spi底层驱动函数返回值类型 #6979

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f4756ae
[wch][spi] 修改ch32 risc-v spi底层驱动函数返回值类型
liYony Feb 25, 2023
351d4c4
[数据类型修改]
ZosCat1 Feb 27, 2023
b3f7171
Merge pull request #3 from ZosCat1/ch32_driver
liYony Feb 27, 2023
df581eb
Update drv_spi.h
mysterywolf Feb 27, 2023
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70 changes: 35 additions & 35 deletions bsp/wch/risc-v/Libraries/ch32_drivers/drv_can.c
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Original file line number Diff line number Diff line change
Expand Up @@ -28,12 +28,12 @@

struct ch32v307x_can_baud_info
{
uint32_t baud_rate;
uint16_t prescaler;
uint8_t tsjw; //CAN synchronisation jump width.
uint8_t tbs1; //CAN time quantum in bit segment 1.
uint8_t tbs2; //CAN time quantum in bit segment 2.
uint8_t notused;
rt_uint32_t baud_rate;
rt_uint16_t prescaler;
rt_uint8_t tsjw; //CAN synchronisation jump width.
rt_uint8_t tbs1; //CAN time quantum in bit segment 1.
rt_uint8_t tbs2; //CAN time quantum in bit segment 2.
rt_uint8_t notused;
};

#define CH32V307X_CAN_BAUD_DEF(xrate, xsjw, xbs1, xbs2, xprescale) \
Expand Down Expand Up @@ -165,7 +165,7 @@ rt_weak void ch32v307x_can_gpio_init(CAN_TypeDef *can_base)

static uint32_t get_can_baud_index(rt_uint32_t baud)
{
uint32_t len, index;
rt_uint32_t len, index;

len = sizeof(can_baud_rate_tab) / sizeof(can_baud_rate_tab[0]);
for (index = 0; index < len; index++)
Expand All @@ -176,9 +176,9 @@ static uint32_t get_can_baud_index(rt_uint32_t baud)
return 0; /* default baud is CAN1MBaud */
}

static uint8_t get_can_mode_rtt2n32(uint8_t rtt_can_mode)
static rt_uint8_t get_can_mode_rtt2n32(rt_uint8_t rtt_can_mode)
{
uint8_t mode = CAN_Mode_Normal;
rt_uint8_t mode = CAN_Mode_Normal;
switch (rtt_can_mode)
{
case RT_CAN_MODE_NORMAL:
Expand Down Expand Up @@ -558,9 +558,9 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
}

/* CAN Mailbox Transmit Request */
#define TMIDxR_TXRQ ((uint32_t)0x00000001)
#define TMIDxR_TXRQ ((rt_uint32_t)0x00000001)

static int _can_send_rtmsg(CAN_TypeDef *can_base, struct rt_can_msg *pmsg, uint32_t mailbox_index)
static int _can_send_rtmsg(CAN_TypeDef *can_base, struct rt_can_msg *pmsg, rt_uint32_t mailbox_index)
{
CanTxMsg CAN_TxMessage = {0};
CanTxMsg *TxMessage = &CAN_TxMessage;
Expand Down Expand Up @@ -629,20 +629,20 @@ static int _can_send_rtmsg(CAN_TypeDef *can_base, struct rt_can_msg *pmsg, uint3

/* Set DLC */
TxMessage->DLC = pmsg->len & 0x0FU;
can_base->sTxMailBox[mailbox_index].TXMDTR &= (uint32_t)0xFFFFFFF0;
can_base->sTxMailBox[mailbox_index].TXMDTR &= (rt_uint32_t)0xFFFFFFF0;
can_base->sTxMailBox[mailbox_index].TXMDTR |= TxMessage->DLC;

/* Set data */
can_base->sTxMailBox[mailbox_index].TXMDHR =
(((uint32_t)pmsg->data[7] << 24) |
((uint32_t)pmsg->data[6] << 16) |
((uint32_t)pmsg->data[5] << 8) |
((uint32_t)pmsg->data[4]));
(((rt_uint32_t)pmsg->data[7] << 24) |
((rt_uint32_t)pmsg->data[6] << 16) |
((rt_uint32_t)pmsg->data[5] << 8) |
((rt_uint32_t)pmsg->data[4]));
can_base->sTxMailBox[mailbox_index].TXMDLR =
(((uint32_t)pmsg->data[3] << 24) |
((uint32_t)pmsg->data[2] << 16) |
((uint32_t)pmsg->data[1] << 8) |
((uint32_t)pmsg->data[0]));
(((rt_uint32_t)pmsg->data[3] << 24) |
((rt_uint32_t)pmsg->data[2] << 16) |
((rt_uint32_t)pmsg->data[1] << 8) |
((rt_uint32_t)pmsg->data[0]));
/* Request transmission */
can_base->sTxMailBox[mailbox_index].TXMIR |= TMIDxR_TXRQ;

Expand All @@ -665,7 +665,7 @@ static int _can_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t
return _can_send_rtmsg(drv_can_obj->can_base, ((struct rt_can_msg *)buf), box_num);
}

static int _can_recv_rtmsg(CAN_TypeDef *can_base, struct rt_can_msg *pmsg, uint32_t FIFONum)
static int _can_recv_rtmsg(CAN_TypeDef *can_base, struct rt_can_msg *pmsg, rt_uint32_t FIFONum)
{
CanRxMsg CAN_RxMessage = {0};
CanRxMsg *RxMessage = &CAN_RxMessage;
Expand All @@ -676,30 +676,30 @@ static int _can_recv_rtmsg(CAN_TypeDef *can_base, struct rt_can_msg *pmsg, uint3
return -RT_ERROR;
}
/* Get the Id */
RxMessage->IDE = (uint8_t)(0x04 & can_base->sFIFOMailBox[FIFONum].RXMIR);
RxMessage->IDE = (rt_uint8_t)(0x04 & can_base->sFIFOMailBox[FIFONum].RXMIR);
if (RxMessage->IDE == CAN_Id_Standard)
{
RxMessage->StdId = (uint32_t)0x000007FF & (can_base->sFIFOMailBox[FIFONum].RXMIR >> 21);
RxMessage->StdId = (rt_uint32_t)0x000007FF & (can_base->sFIFOMailBox[FIFONum].RXMIR >> 21);
}
else
{
RxMessage->ExtId = (uint32_t)0x1FFFFFFF & (can_base->sFIFOMailBox[FIFONum].RXMIR >> 3);
RxMessage->ExtId = (rt_uint32_t)0x1FFFFFFF & (can_base->sFIFOMailBox[FIFONum].RXMIR >> 3);
}
RxMessage->RTR = (uint8_t)0x02 & can_base->sFIFOMailBox[FIFONum].RXMIR;
RxMessage->RTR = (rt_uint8_t)0x02 & can_base->sFIFOMailBox[FIFONum].RXMIR;
/* Get the DLC */
RxMessage->DLC = (uint8_t)0x0F & can_base->sFIFOMailBox[FIFONum].RXMDTR;
RxMessage->DLC = (rt_uint8_t)0x0F & can_base->sFIFOMailBox[FIFONum].RXMDTR;
/* Get the FMI */
RxMessage->FMI = (uint8_t)0xFF & (can_base->sFIFOMailBox[FIFONum].RXMDTR >> 8);
RxMessage->FMI = (rt_uint8_t)0xFF & (can_base->sFIFOMailBox[FIFONum].RXMDTR >> 8);

/* Get the data field */
pmsg->data[0] = (uint8_t)0xFF & can_base->sFIFOMailBox[FIFONum].RXMDLR;
pmsg->data[1] = (uint8_t)0xFF & (can_base->sFIFOMailBox[FIFONum].RXMDLR >> 8);
pmsg->data[2] = (uint8_t)0xFF & (can_base->sFIFOMailBox[FIFONum].RXMDLR >> 16);
pmsg->data[3] = (uint8_t)0xFF & (can_base->sFIFOMailBox[FIFONum].RXMDLR >> 24);
pmsg->data[4] = (uint8_t)0xFF & can_base->sFIFOMailBox[FIFONum].RXMDHR;
pmsg->data[5] = (uint8_t)0xFF & (can_base->sFIFOMailBox[FIFONum].RXMDHR >> 8);
pmsg->data[6] = (uint8_t)0xFF & (can_base->sFIFOMailBox[FIFONum].RXMDHR >> 16);
pmsg->data[7] = (uint8_t)0xFF & (can_base->sFIFOMailBox[FIFONum].RXMDHR >> 24);
pmsg->data[0] = (rt_uint8_t)0xFF & can_base->sFIFOMailBox[FIFONum].RXMDLR;
pmsg->data[1] = (rt_uint8_t)0xFF & (can_base->sFIFOMailBox[FIFONum].RXMDLR >> 8);
pmsg->data[2] = (rt_uint8_t)0xFF & (can_base->sFIFOMailBox[FIFONum].RXMDLR >> 16);
pmsg->data[3] = (rt_uint8_t)0xFF & (can_base->sFIFOMailBox[FIFONum].RXMDLR >> 24);
pmsg->data[4] = (rt_uint8_t)0xFF & can_base->sFIFOMailBox[FIFONum].RXMDHR;
pmsg->data[5] = (rt_uint8_t)0xFF & (can_base->sFIFOMailBox[FIFONum].RXMDHR >> 8);
pmsg->data[6] = (rt_uint8_t)0xFF & (can_base->sFIFOMailBox[FIFONum].RXMDHR >> 16);
pmsg->data[7] = (rt_uint8_t)0xFF & (can_base->sFIFOMailBox[FIFONum].RXMDHR >> 24);

/* get len */
pmsg->len = RxMessage->DLC;
Expand Down
2 changes: 1 addition & 1 deletion bsp/wch/risc-v/Libraries/ch32_drivers/drv_dac.c
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Original file line number Diff line number Diff line change
Expand Up @@ -106,7 +106,7 @@ static rt_uint32_t ch32_dac_get_channel(rt_uint32_t channel)

static rt_err_t ch32_set_dac_value(struct rt_dac_device *device, rt_uint32_t channel, rt_uint32_t *value)
{
uint32_t dac_channel;
rt_uint32_t dac_channel;
DAC_HandleTypeDef *ch32_dac_handler;

RT_ASSERT(device != RT_NULL);
Expand Down
16 changes: 8 additions & 8 deletions bsp/wch/risc-v/Libraries/ch32_drivers/drv_gpio.c
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Original file line number Diff line number Diff line change
Expand Up @@ -13,11 +13,11 @@

#ifdef BSP_USING_GPIO
#define PIN_NUM(port, no) (((((port) & 0xFu) << 4) | ((no) & 0xFu)))
#define PIN_PORT(pin) ((uint8_t)(((pin) >> 4) & 0xFu))
#define PIN_NO(pin) ((uint8_t)((pin) & 0xFu))
#define PIN_PORT(pin) ((rt_uint8_t)(((pin) >> 4) & 0xFu))
#define PIN_NO(pin) ((rt_uint8_t)((pin) & 0xFu))

#define PIN_STPORT(pin) ((GPIO_TypeDef *)(GPIOA_BASE + (0x400u * PIN_PORT(pin))))
#define PIN_STPIN(pin) ((uint16_t)(1u << PIN_NO(pin)))
#define PIN_STPIN(pin) ((rt_uint16_t)(1u << PIN_NO(pin)))

#if defined(GPIOZ)
#define __CH32_PORT_MAX 12u
Expand Down Expand Up @@ -89,7 +89,7 @@ static struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
{-1, 0, RT_NULL, RT_NULL},
{-1, 0, RT_NULL, RT_NULL},
};
static uint32_t pin_irq_enable_mask = 0;
static rt_uint32_t pin_irq_enable_mask = 0;

#define ITEM_NUM(items) (sizeof(items) / sizeof((items)[0]))

Expand Down Expand Up @@ -133,7 +133,7 @@ static rt_base_t ch32_pin_get(const char *name)
static void ch32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
{
GPIO_TypeDef *gpio_port;
uint16_t gpio_pin;
rt_uint16_t gpio_pin;

if (PIN_PORT(pin) < PIN_STPORT_MAX)
{
Expand All @@ -146,7 +146,7 @@ static void ch32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
static int ch32_pin_read(rt_device_t dev, rt_base_t pin)
{
GPIO_TypeDef *gpio_port;
uint16_t gpio_pin;
rt_uint16_t gpio_pin;
int value = PIN_LOW;

if (PIN_PORT(pin) < PIN_STPORT_MAX)
Expand Down Expand Up @@ -215,7 +215,7 @@ rt_inline rt_int32_t bit2bitno(rt_uint32_t bit)
return -1;
}

rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit)
rt_inline const struct pin_irq_map *get_pin_irq_map(rt_uint32_t pinbit)
{
rt_int32_t mapindex = bit2bitno(pinbit);
if (mapindex < 0 || mapindex >= (rt_int32_t)ITEM_NUM(pin_irq_map))
Expand Down Expand Up @@ -426,7 +426,7 @@ rt_inline void pin_irq_hdr(int irqno)
}
}

void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
void HAL_GPIO_EXTI_Callback(rt_uint16_t GPIO_Pin)
{
pin_irq_hdr(bit2bitno(GPIO_Pin));
}
Expand Down
8 changes: 4 additions & 4 deletions bsp/wch/risc-v/Libraries/ch32_drivers/drv_hwtimer.c
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Original file line number Diff line number Diff line change
Expand Up @@ -210,12 +210,12 @@ static rt_err_t ch32_hwtimer_start(struct rt_hwtimer_device *timer, rt_uint32_t
if (mode == HWTIMER_MODE_ONESHOT)
{
/* set timer to single mode */
tim->instance->CTLR1 &= (uint16_t) ~((uint16_t)TIM_OPM);
tim->instance->CTLR1 &= (rt_uint16_t) ~((rt_uint16_t)TIM_OPM);
tim->instance->CTLR1 |= TIM_OPMode_Single;
}
else
{
tim->instance->CTLR1 &= (uint16_t) ~((uint16_t)TIM_OPM);
tim->instance->CTLR1 &= (rt_uint16_t) ~((rt_uint16_t)TIM_OPM);
tim->instance->CTLR1 |= TIM_OPMode_Repetitive;
}

Expand Down Expand Up @@ -302,12 +302,12 @@ static rt_err_t ch32_hwtimer_control(struct rt_hwtimer_device *timer, rt_uint32_
if (*(rt_hwtimer_mode_t *)args == HWTIMER_MODE_ONESHOT)
{
/* set timer to single mode */
tim->instance->CTLR1 &= (uint16_t) ~((uint16_t)TIM_OPM);
tim->instance->CTLR1 &= (rt_uint16_t) ~((rt_uint16_t)TIM_OPM);
tim->instance->CTLR1 |= TIM_OPMode_Single;
}
else
{
tim->instance->CTLR1 &= (uint16_t) ~((uint16_t)TIM_OPM);
tim->instance->CTLR1 &= (rt_uint16_t) ~((rt_uint16_t)TIM_OPM);
tim->instance->CTLR1 |= TIM_OPMode_Repetitive;
}
break;
Expand Down
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