Added equality method to memory/register classes

osaca/parser/memory.py

@@ -128,17 +128,101 @@ def __str__(self):
     def __repr__(self):
         return self.__str__()
 
-    def __eq__(self, other):
-        if isinstance(other, MemoryOperand):
-            return (
-                self._offset == other._offset
-                and self._base == other._base
-                and self._index == other._index
-                and self._scale == other._scale
-                and self._segment_ext == other._segment_ext
-                and self._mask == other._mask
-                and self._pre_indexed == other._pre_indexed
-                and self._post_indexed == other._post_indexed
-                and self._indexed_val == other._indexed_val
-            )
-        return False
+    def equals(self, other, isa):
+        if isa == "aarch64":
+            if (
+                # check base
+                (
+                    (self.base is None and other.base is None)
+                    or other.base == self.WILDCARD
+                    or (isinstance(self.base, RegisterOperand) and (self.base.prefix == other.base))
+                )
+                # check offset
+                and (
+                    self.offset == other.offset
+                    or other.offset == self.WILDCARD
+                    or (
+                        self.offset is not None
+                        and isinstance(self.offset, IdentifierOperand)
+                        and isinstance(other.offset, IdentifierOperand)
+                    )
+                    or (
+                        self.offset is not None
+                        and isinstance(self.offset, ImmediateOperand)
+                        and other.offset == "imd"
+                    )
+                )
+                # check index
+                and (
+                    self.index == other.index
+                    or other.index == self.WILDCARD
+                    or (
+                        self.index is not None
+                        and self.index.prefix is not None
+                        and self.index.prefix == other.index
+                    )
+                )
+                # check scale
+                and (
+                    self.scale == other.scale
+                    or other.scale == self.WILDCARD
+                    or (self.scale != 1 and other.scale != 1)
+                )
+                # check pre-indexing
+                and (other.pre_indexed == self.WILDCARD or self.pre_indexed == other.pre_indexed)
+                # check post-indexing
+                and (
+                    other.post_indexed == self.WILDCARD
+                    or self.post_indexed == other.post_indexed
+                    or (isinstance(self.post_indexed, dict) and other.post_indexed)
+                )
+            ):
+                return True
+            return False
+
+        if isa == "x86":
+            if (
+                # check base
+                (
+                    (self.base is None and other.base is None)
+                    or other.base == self.WILDCARD
+                    or self._is_x86_reg_type(other.base, self.base)
+                )
+                # check offset
+                and (
+                    self.offset == other.offset
+                    or other.offset == self.WILDCARD
+                    or (
+                        self.offset is not None
+                        and isinstance(self.offset, IdentifierOperand)
+                        and isinstance(other.offset, IdentifierOperand)
+                    )
+                    or (
+                        self.offset is not None
+                        and isinstance(self.offset, ImmediateOperand)
+                        and (
+                            other.offset == "imd" or (other.offset is None and self.offset.value == "0")
+                        )
+                    )
+                    or (isinstance(self.offset, IdentifierOperand) and other.offset == "id")
+                )
+                # check index
+                and (
+                    self.index == other.index
+                    or other.index == self.WILDCARD
+                    or (
+                        self.index is not None
+                        # and self.index.name != None
+                        and self._is_x86_reg_type(other.index, self.index)
+                    )
+                )
+                # check scale
+                and (
+                    self.scale == other.scale
+                    or other.scale == self.WILDCARD
+                    or (self.scale != 1 and other.scale != 1)
+                )
+            ):
+                return True
+            return False
+

osaca/parser/register.py

@@ -163,17 +163,81 @@ def __str__(self):
     def __repr__(self):
         return self.__str__()
 
-    def __eq__(self, other):
-        if isinstance(other, RegisterOperand):
-            return (
-                self._name == other._name
-                and self._width == other._width
-                and self._prefix == other._prefix
-                and self._regtype == other._regtype
-                and self._lanes == other._lanes
-                and self._shape == other._shape
-                and self._index == other._index
-                and self._mask == other._mask
-                and self._zeroing == other._zeroing
-            )
-        return False
+    def equals(self, other, isa):
+        if isa == "aarch64":
+            # check for wildcards
+            if reg.prefix == self.WILDCARD or i_reg.prefix == self.WILDCARD:
+                if reg.shape is not None:
+                    if i_reg.shape is not None and (
+                        reg.shape == i_reg.shape or self.WILDCARD in (reg.shape + i_reg.shape)
+                    ):
+                        return True
+                    return False
+                return True
+            # check for prefix and shape
+            if reg.prefix != i_reg.prefix:
+                return False
+            if reg.shape is not None:
+                if i_reg.shape is not None and (
+                    reg.shape == i_reg.shape or self.WILDCARD in (reg.shape + i_reg.shape)
+                ):
+                    return True
+                return False
+            if reg.lanes is not None:
+                if i_reg.lanes is not None and (
+                    reg.lanes == i_reg.lanes or self.WILDCARD in (reg.lanes + i_reg.lanes)
+                ):
+                    return True
+                return False
+            return True
+        elif isa == "x86":
+            if reg is None:
+                if i_reg is None:
+                    return True
+                return False
+            if isinstance(i_reg, RegisterOperand):
+                i_reg_name = i_reg.name
+            else:
+                i_reg_name = i_reg
+            # check for wildcards
+            if isinstance(reg, str):
+                return False
+            if i_reg_name is None and reg.name is None:
+                return True
+            if i_reg_name == self.WILDCARD or reg.name == self.WILDCARD:
+                return True
+            # differentiate between vector registers (mm, xmm, ymm, zmm) and others (gpr)
+            parser_x86 = ParserX86ATT()
+            if parser_x86.is_vector_register(reg):
+                if reg.name.rstrip(string.digits).lower() == i_reg_name:
+                    # Consider masking and zeroing for AVX512
+                    if consider_masking:
+                        mask_ok = zero_ok = True
+                        if reg.mask is not None or i_reg.mask is not None:
+                            # one instruction is missing the masking while the other has it
+                            mask_ok = False
+                            # check for wildcard
+                            if (
+                                (
+                                    reg.mask is not None
+                                    and reg.mask.rstrip(string.digits).lower() == i_reg.mask
+                                )
+                                or reg.mask == self.WILDCARD
+                                or i_reg.mask == self.WILDCARD
+                            ):
+                                mask_ok = True
+                            if bool(reg.zeroing) ^ bool("zeroing" in i_reg):
+                                # one instruction is missing zeroing while the other has it
+                                zero_ok = False
+                                # check for wildcard
+                                if i_reg.zeroing == self.WILDCARD or reg.zeroing == self.WILDCARD:
+                                    zero_ok = True
+                            if not mask_ok or not zero_ok:
+                                return False
+                    return True
+            else:
+                if reg.name.rstrip(string.digits).lower() == i_reg_name:
+                    return True
+                if i_reg_name == "gpr":
+                    return True
+            return False