Merge pull request #316 from YvanMokwinski/yvan/spmv_5.7

Yvan/spmv 5.7
ROCm · May 31, 2023 · bf614ee · bf614ee
2 parents 45b42d8 + 033cd6e
commit bf614ee
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diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -3,6 +3,7 @@
 Full documentation for rocSPARSE is available at [rocsparse.readthedocs.io](https://rocsparse.readthedocs.io/en/latest/).
 
 ## rocSPARSE 2.5.2 for ROCm 5.6.0
+
 ### Improved
 - Fixed a memory leak in csritsv
 

diff --git a/clients/common/rocsparse_host.cpp b/clients/common/rocsparse_host.cpp
diff --git a/clients/include/rocsparse_common.yaml b/clients/include/rocsparse_common.yaml
@@ -237,6 +237,8 @@ Real precisions: &real_precisions
     { a_type: f32_r, b_type: f32_r, c_type: f32_r, x_type: f32_r, y_type: f32_r, compute_type: f32_r }
   - &double_precision
     { a_type: f64_r, b_type: f64_r, c_type: f64_r, x_type: f64_r, y_type: f64_r, compute_type: f64_r }
+  - &float32_float64_float64_float64
+    { a_type: f32_r, x_type: f64_r, y_type: f64_r, compute_type: f64_r }
 
 Complex precisions: &complex_precisions
   - &float32_cmplx32_cmplx32_cmplx32_precision
@@ -247,6 +249,8 @@ Complex precisions: &complex_precisions
     { a_type: f32_c, b_type: f32_c, c_type: f32_c, x_type: f32_c, y_type: f32_c, compute_type: f32_c }
   - &double_precision_complex
     { a_type: f64_c, b_type: f64_c, c_type: f64_c, x_type: f64_c, y_type: f64_c, compute_type: f64_c }
+  - &cmplx32_cmplx64_cmplx64_cmplx64
+    { a_type: f32_c, x_type: f64_c, y_type: f64_c, compute_type: f64_c }
 
 C precisions real: &single_only_precisions
   - *single_precision

diff --git a/clients/testings/testing_bsr2csr.cpp b/clients/testings/testing_bsr2csr.cpp
@@ -1,6 +1,6 @@
 /*! \file */
 /* ************************************************************************
- * Copyright (C) 2020-2022 Advanced Micro Devices, Inc. All rights Reserved.
+ * Copyright (C) 2020-2023 Advanced Micro Devices, Inc. All rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -68,6 +68,7 @@ void testing_bsr2csr_bad_arg(const Arguments& arg)
     // Check block_dim == 0
     block_dim = 0;
     EXPECT_ROCSPARSE_STATUS(rocsparse_bsr2csr<T>(PARAMS), rocsparse_status_invalid_size);
+
 #undef PARAMS
 }
 

diff --git a/clients/testings/testing_prune_csr2csr.cpp b/clients/testings/testing_prune_csr2csr.cpp
@@ -1,6 +1,6 @@
 /*! \file */
 /* ************************************************************************
- * Copyright (C) 2020-2022 Advanced Micro Devices, Inc. All rights Reserved.
+ * Copyright (C) 2020-2023 Advanced Micro Devices, Inc. All rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal

diff --git a/clients/testings/testing_prune_csr2csr_by_percentage.cpp b/clients/testings/testing_prune_csr2csr_by_percentage.cpp
@@ -1,6 +1,6 @@
 /*! \file */
 /* ************************************************************************
- * Copyright (C) 2020-2022 Advanced Micro Devices, Inc. All rights Reserved.
+ * Copyright (C) 2020-2023 Advanced Micro Devices, Inc. All rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -94,6 +94,7 @@ void testing_prune_csr2csr_by_percentage_bad_arg(const Arguments& arg)
                             rocsparse_status_not_implemented);
     EXPECT_ROCSPARSE_STATUS(rocsparse_prune_csr2csr_by_percentage<T>(PARAMS),
                             rocsparse_status_not_implemented);
+
     CHECK_ROCSPARSE_ERROR(
         rocsparse_set_mat_storage_mode(csr_descr_A, rocsparse_storage_mode_sorted));
     CHECK_ROCSPARSE_ERROR(

diff --git a/clients/testings/testing_spmv_bsr.cpp b/clients/testings/testing_spmv_bsr.cpp
@@ -1,5 +1,5 @@
 /* ************************************************************************
- * Copyright (C) 2022 Advanced Micro Devices, Inc. All rights Reserved.
+ * Copyright (C) 2022-2023 Advanced Micro Devices, Inc. All rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -83,6 +83,11 @@ INSTANTIATE_MIXED(int64_t,
                   rocsparse_float_complex,
                   rocsparse_float_complex,
                   rocsparse_float_complex);
+
+INSTANTIATE_MIXED(int32_t, int32_t, float, double, double, double);
+INSTANTIATE_MIXED(int64_t, int32_t, float, double, double, double);
+INSTANTIATE_MIXED(int64_t, int64_t, float, double, double, double);
+
 INSTANTIATE_MIXED(int32_t,
                   int32_t,
                   double,
@@ -102,4 +107,23 @@ INSTANTIATE_MIXED(int64_t,
                   rocsparse_double_complex,
                   rocsparse_double_complex);
 
+INSTANTIATE_MIXED(int32_t,
+                  int32_t,
+                  rocsparse_float_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex);
+INSTANTIATE_MIXED(int64_t,
+                  int32_t,
+                  rocsparse_float_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex);
+INSTANTIATE_MIXED(int64_t,
+                  int64_t,
+                  rocsparse_float_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex);
+
 void testing_spmv_bsr_extra(const Arguments& arg) {}
diff --git a/clients/testings/testing_spmv_coo.cpp b/clients/testings/testing_spmv_coo.cpp
@@ -1,5 +1,5 @@
 /* ************************************************************************
- * Copyright (C) 2020-2022 Advanced Micro Devices, Inc. All rights Reserved.
+ * Copyright (C) 2020-2023 Advanced Micro Devices, Inc. All rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -64,8 +64,24 @@ INSTANTIATE_MIXED(
     int32_t, float, rocsparse_float_complex, rocsparse_float_complex, rocsparse_float_complex);
 INSTANTIATE_MIXED(
     int64_t, float, rocsparse_float_complex, rocsparse_float_complex, rocsparse_float_complex);
+
+INSTANTIATE_MIXED(int32_t, float, double, double, double);
+INSTANTIATE_MIXED(int64_t, float, double, double, double);
+
 INSTANTIATE_MIXED(
     int32_t, double, rocsparse_double_complex, rocsparse_double_complex, rocsparse_double_complex);
 INSTANTIATE_MIXED(
     int64_t, double, rocsparse_double_complex, rocsparse_double_complex, rocsparse_double_complex);
+
+INSTANTIATE_MIXED(int32_t,
+                  rocsparse_float_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex);
+INSTANTIATE_MIXED(int64_t,
+                  rocsparse_float_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex);
+
 void testing_spmv_coo_extra(const Arguments& arg) {}
diff --git a/clients/testings/testing_spmv_coo_aos.cpp b/clients/testings/testing_spmv_coo_aos.cpp
@@ -1,5 +1,5 @@
 /* ************************************************************************
- * Copyright (C) 2020-2022 Advanced Micro Devices, Inc. All rights Reserved.
+ * Copyright (C) 2020-2023 Advanced Micro Devices, Inc. All rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -63,8 +63,24 @@ INSTANTIATE_MIXED(
     int32_t, float, rocsparse_float_complex, rocsparse_float_complex, rocsparse_float_complex);
 INSTANTIATE_MIXED(
     int64_t, float, rocsparse_float_complex, rocsparse_float_complex, rocsparse_float_complex);
+
+INSTANTIATE_MIXED(int32_t, float, double, double, double);
+INSTANTIATE_MIXED(int64_t, float, double, double, double);
+
 INSTANTIATE_MIXED(
     int32_t, double, rocsparse_double_complex, rocsparse_double_complex, rocsparse_double_complex);
 INSTANTIATE_MIXED(
     int64_t, double, rocsparse_double_complex, rocsparse_double_complex, rocsparse_double_complex);
+
+INSTANTIATE_MIXED(int32_t,
+                  rocsparse_float_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex);
+INSTANTIATE_MIXED(int64_t,
+                  rocsparse_float_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex);
+
 void testing_spmv_coo_aos_extra(const Arguments& arg) {}
diff --git a/clients/testings/testing_spmv_csc.cpp b/clients/testings/testing_spmv_csc.cpp
@@ -1,5 +1,5 @@
 /* ************************************************************************
- * Copyright (C) 2022 Advanced Micro Devices, Inc. All rights Reserved.
+ * Copyright (C) 2022-2023 Advanced Micro Devices, Inc. All rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -83,6 +83,11 @@ INSTANTIATE_MIXED(int64_t,
                   rocsparse_float_complex,
                   rocsparse_float_complex,
                   rocsparse_float_complex);
+
+INSTANTIATE_MIXED(int32_t, int32_t, float, double, double, double);
+INSTANTIATE_MIXED(int64_t, int32_t, float, double, double, double);
+INSTANTIATE_MIXED(int64_t, int64_t, float, double, double, double);
+
 INSTANTIATE_MIXED(int32_t,
                   int32_t,
                   double,
@@ -102,4 +107,23 @@ INSTANTIATE_MIXED(int64_t,
                   rocsparse_double_complex,
                   rocsparse_double_complex);
 
+INSTANTIATE_MIXED(int32_t,
+                  int32_t,
+                  rocsparse_float_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex);
+INSTANTIATE_MIXED(int64_t,
+                  int32_t,
+                  rocsparse_float_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex);
+INSTANTIATE_MIXED(int64_t,
+                  int64_t,
+                  rocsparse_float_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex);
+
 void testing_spmv_csc_extra(const Arguments& arg) {}
diff --git a/clients/testings/testing_spmv_csr.cpp b/clients/testings/testing_spmv_csr.cpp
@@ -1,5 +1,5 @@
 /* ************************************************************************
- * Copyright (C) 2020-2022 Advanced Micro Devices, Inc. All rights Reserved.
+ * Copyright (C) 2020-2023 Advanced Micro Devices, Inc. All rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -65,6 +65,11 @@ INSTANTIATE_MIXED(int64_t, int64_t, int8_t, int8_t, int32_t, int32_t);
 INSTANTIATE_MIXED(int32_t, int32_t, int8_t, int8_t, float, float);
 INSTANTIATE_MIXED(int64_t, int32_t, int8_t, int8_t, float, float);
 INSTANTIATE_MIXED(int64_t, int64_t, int8_t, int8_t, float, float);
+
+INSTANTIATE_MIXED(int32_t, int32_t, float, double, double, double);
+INSTANTIATE_MIXED(int64_t, int32_t, float, double, double, double);
+INSTANTIATE_MIXED(int64_t, int64_t, float, double, double, double);
+
 INSTANTIATE_MIXED(int32_t,
                   int32_t,
                   float,
@@ -83,6 +88,7 @@ INSTANTIATE_MIXED(int64_t,
                   rocsparse_float_complex,
                   rocsparse_float_complex,
                   rocsparse_float_complex);
+
 INSTANTIATE_MIXED(int32_t,
                   int32_t,
                   double,
@@ -102,4 +108,23 @@ INSTANTIATE_MIXED(int64_t,
                   rocsparse_double_complex,
                   rocsparse_double_complex);
 
+INSTANTIATE_MIXED(int32_t,
+                  int32_t,
+                  rocsparse_float_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex);
+INSTANTIATE_MIXED(int64_t,
+                  int32_t,
+                  rocsparse_float_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex);
+INSTANTIATE_MIXED(int64_t,
+                  int64_t,
+                  rocsparse_float_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex);
+
 void testing_spmv_csr_extra(const Arguments& arg) {}
diff --git a/clients/testings/testing_spmv_ell.cpp b/clients/testings/testing_spmv_ell.cpp
@@ -1,5 +1,5 @@
 /* ************************************************************************
- * Copyright (C) 2020-2022 Advanced Micro Devices, Inc. All rights Reserved.
+ * Copyright (C) 2020-2023 Advanced Micro Devices, Inc. All rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -59,12 +59,29 @@ INSTANTIATE_MIXED(int32_t, int8_t, int8_t, int32_t, int32_t);
 INSTANTIATE_MIXED(int64_t, int8_t, int8_t, int32_t, int32_t);
 INSTANTIATE_MIXED(int32_t, int8_t, int8_t, float, float);
 INSTANTIATE_MIXED(int64_t, int8_t, int8_t, float, float);
+
 INSTANTIATE_MIXED(
     int32_t, float, rocsparse_float_complex, rocsparse_float_complex, rocsparse_float_complex);
 INSTANTIATE_MIXED(
     int64_t, float, rocsparse_float_complex, rocsparse_float_complex, rocsparse_float_complex);
+
+INSTANTIATE_MIXED(int32_t, float, double, double, double);
+INSTANTIATE_MIXED(int64_t, float, double, double, double);
+
 INSTANTIATE_MIXED(
     int32_t, double, rocsparse_double_complex, rocsparse_double_complex, rocsparse_double_complex);
 INSTANTIATE_MIXED(
     int64_t, double, rocsparse_double_complex, rocsparse_double_complex, rocsparse_double_complex);
+
+INSTANTIATE_MIXED(int32_t,
+                  rocsparse_float_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex);
+INSTANTIATE_MIXED(int64_t,
+                  rocsparse_float_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex,
+                  rocsparse_double_complex);
+
 void testing_spmv_ell_extra(const Arguments& arg) {}
diff --git a/clients/tests/test_spmv_bsr.yaml b/clients/tests/test_spmv_bsr.yaml
@@ -1,5 +1,5 @@
 # ########################################################################
-# Copyright (C) 2022 Advanced Micro Devices, Inc. All rights Reserved.
+# Copyright (C) 2022-2023 Advanced Micro Devices, Inc. All rights Reserved.
 #
 # Permission is hereby granted, free of charge, to any person obtaining a copy
 # of this software and associated documentation files (the "Software"), to deal
@@ -226,6 +226,32 @@ Tests:
   baseA: [rocsparse_index_base_zero]
   matrix: [rocsparse_matrix_random]
 
+
+- name: spmv_bsr
+  category: quick
+  function: spmv_bsr
+  indextype: *i32_i64
+  precision: *float32_float64_float64_float64
+  M: [34, 104, 343, 5196]
+  N: [57, 109, 458, 3425]
+  block_dim: [12]
+  alpha_beta: *alpha_beta_range_checkin
+  baseA: [rocsparse_index_base_zero]
+  matrix: [rocsparse_matrix_random]
+
+
+- name: spmv_bsr
+  category: pre_checkin
+  function: spmv_bsr
+  indextype: *i32_i64
+  precision: *float32_float64_float64_float64
+  M: [534, 1604, 3413, 75196]
+  N: [578, 4109, 9458, 34254]
+  block_dim: [16]
+  alpha_beta: *alpha_beta_range_quick
+  baseA: [rocsparse_index_base_one]
+  matrix: [rocsparse_matrix_random]
+
 - name: spmv_bsr
   category: pre_checkin
   function: spmv_bsr
@@ -238,6 +264,7 @@ Tests:
   baseA: [rocsparse_index_base_one]
   matrix: [rocsparse_matrix_random]
 
+
 - name: spmv_bsr_file
   category: pre_checkin
   function: spmv_bsr
@@ -263,3 +290,30 @@ Tests:
   matrix: [rocsparse_matrix_file_rocalution]
   filename: [Chevron3,
              bmwcra_1]
+
+
+- name: spmv_bsr_file
+  category: pre_checkin
+  function: spmv_bsr
+  indextype: *i32_i64
+  precision: *cmplx32_cmplx64_cmplx64_cmplx64
+  M: [48374]
+  N: [42846]
+  block_dim: [4]
+  alpha_beta: *alpha_beta_range_checkin
+  baseA: [rocsparse_index_base_zero]
+  matrix: [rocsparse_matrix_random]
+
+- name: spmv_bsr_file
+  category: nightly
+  function: spmv_bsr
+  indextype: *i32_i64
+  precision: *cmplx32_cmplx64_cmplx64_cmplx64
+  M: 1
+  N: 1
+  block_dim: [7]
+  alpha_beta: *alpha_beta_range_nightly
+  baseA: [rocsparse_index_base_one]
+  matrix: [rocsparse_matrix_file_rocalution]
+  filename: [Chevron3,
+             bmwcra_1]