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drivers/usbdev_synopsys_dwc2: add support for internal UTMI HS PHY #18714
drivers/usbdev_synopsys_dwc2: add support for internal UTMI HS PHY #18714
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The existence of the macros USB_OTG_GUSBCFG_ULPI_UTMI_SEL, USB_OTG_GUSBCFG_PHYIF and USB_OTG_GUSBCFG_DDRSEL depends on a specific STM32 line and not on STM32 itself. Therefore, the settings are made when the macros are defined.
Murdock results✔️ PASSED f1bc9af board/stm32f723e-dsico: enable internal UMTI USB HS PHY feature
ArtifactsThis only reflects a subset of all builds from https://ci-prod.riot-os.org. Please refer to https://ci.riot-os.org for a complete build for now. |
/* configure the tuning interface of the USB HS PHY, | ||
* the magic value (USB_HS_PHYC_TUNE_VALUE) from STM32CubeF7 HAL | ||
* Driver MCU Component for F7 is used */ | ||
USB_HS_PHYC->USB_HS_PHYC_TUNE |= 0x00000F13U; |
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Based on the stm32f723 reference manual, this register doesn't look that magical. It does seem to contain quite a number of board-dependent options. Does it make sense to add this to the configuration struct together with some generic 'recommended' value (this 0x0F13U
maybe)?
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Based on the stm32f723 reference manual, this register doesn't look that magical.
Yes, I have seen it. However, the number of possible combinations of these options is quite large and might lead to misconfigurations. To be honest, I wouldn't have any idea how to configure it properly. The value is taken from STM32CubeF7.
We could either add it to the configurationstructure or we could use something like the STM32CubeF7 HAL driver in drivers/include/usbdev_synopsys_dwc2.h
#ifndef USB_HS_PHYC_TUNE_VALUE
#define USB_HS_PHYC_TUNE_VALUE 0x00000F13U
#endif
and use this define in the driver. The value can then be overridden in the board configuration.
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We either add it to the configuration structure or we could use something like the STM32CubeF7 HAL driver in
drivers/include/usbdev_synopsys_dwc2.h
I'm fine with either solution, I don't think we need to have a field in the config struct for every individual bit in that register though.
} | ||
|
||
/* configure the tuning interface of the USB HS PHY */ | ||
USB_HS_PHYC->USB_HS_PHYC_TUNE = conf->phy_tune; |
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I'm not really sure whether the configured USBPHYC_TUNE
(default 0x00000f13
) register value has to be ORed or should overwrite the reset value 0x00000004
of the register. Bit2 enables the the Low Full Speed feedback capacitor. tinyUSB ORs this value.
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No strong opinion from my side, pick whatever you think is good here.
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Since the STM32CubeF7 HAL driver also OR this value, I decided to OR it too. PR is squashed. Let's see whether Murdock is happy.
Feel free to squash btw |
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Contribution description
This PR adds the support for internal UTMI+ HS PHYs.
Boards whose MCU integrate an UMTI+ HS PHY for their USB OTG HS peripherals, such as the STM32F723xx used on board
stm32f723e-disco
, can be used in USB HS mode with this PR. The UTMI+ HS PHY support is enabled by theperiph_usbdev_hs_utmi
module, which requires theperiph_usbdev_hs_utmi
feature.Testing procedure
The best way to test the PR is to use a board with two USB OTG ports (one FS port and one HS port with internal UTMI+ HS PHY, such as the board "stm32f723e-disco") connected to the host with two USB cables.
tests/usbus_hid
tests/usbus_hid
with moduleperiph_usbdev_hs_utmi
stm32f429i-disc1
should still work.Issues/PRs references