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cpu/stm32g0: add basic support + add nucleo-g070rb board #14163
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rebased |
I found the solution for the EXTI configuration and now gpio_irq is working: tests/buttons behaves as expected
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Great, code looks good too - let's go!
cpu/stm32/include/vendor/stm32g0xx.h
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typedef enum | ||
{ | ||
SUCCESS = 0, | ||
ERROR = !SUCCESS | ||
} ErrorStatus; |
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I would say patch MQTTClient.h
, but that's from an external source too 😕
Needs a rebase 😃 |
Now that #14152 is merged, I adapted this one accordingly. If Murdock is green, it should be good. |
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It will work without any change because there's an ifdef for all STM32 (added in #14152). |
Please squash. |
Contribution description
This PR adds an initial support for the stm32g0 family of CPUs. The nucleo-g070rb board is also added so people can test.
Only a few peripheral APIs are supported for the moment: gpio (no IRQ!), timer, uart, i2c, spi, flashpage. The riotboot feature is also available.
Important features that are missing: gpio_irq, rtc
Note that even if the clock configuration is quite similar to L4/WB families, I decided to add a new file for g0, to avoid even more ifdef there.The clock configuration is shared with the G4 family because they are very similar.
The clock configuration defined in the board was also adapted to allow choosing between HSE, HSI or PLL (itself clocked by either HSI or HSE) as system source clock. The PLL clock source is the default.
Since there's no HSE available on the nucleo-g070rb, the default PLL clock source is HSI (
@16MHz
). The core clock is configured to be 64MHz.Testing procedure
./dist/tools/compile_and_test_for_board/compile_and_test_for_board.py . nucleo-g070rb --jobs=4
and check the results are okThe script reported these failures:
Most of them are related to network setup or root priviledge missing.
tests/pkg_libfixmath_unittests
,tests/driver_grove_ledbar
andtests/driver_my9221
are problematic but I haven't looked at them in detail for the moment.Issues/PRs references
depends on #14166