RIOT-OS · aabadie · Feb 11, 2020 · Oct 19, 2019 · Oct 23, 2019 · Oct 23, 2019
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2019 Koen Zandberg
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_common_stm32
+ * @{
+ *
+ * @file
+ * @brief       Common configuration for STM32 OTG FS peripheral
+ *
+ * @author      Koen Zandberg <koen@bergzand.net>
+ */
+
+#ifndef CFG_USB_OTG_FS_H
+#define CFG_USB_OTG_FS_H
+
+#include "periph_cpu.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Enable the full speed USB OTG peripheral
+ */
+#define STM32_USB_OTG_FS_ENABLED
+
+/**
+ * @name common USB OTG FS configuration
+ * @{
+ */
+static const stm32_usb_otg_fshs_config_t stm32_usb_otg_fshs_config[] = {
+    {
+        .periph   = (uint8_t *)USB_OTG_FS_PERIPH_BASE,
+        .rcc_mask = RCC_AHB2ENR_OTGFSEN,
+        .phy      = STM32_USB_OTG_PHY_BUILTIN,
+        .type     = STM32_USB_OTG_FS,
+        .irqn     = OTG_FS_IRQn,
+        .ahb      = AHB2,
+        .dm       = GPIO_PIN(PORT_A, 11),
+        .dp       = GPIO_PIN(PORT_A, 12),
+        .af       = GPIO_AF10,
+    }
+};
+/** @} */
+
+/**
+ * @brief Number of available USB OTG peripherals
+ */
+#define USBDEV_NUMOF           ARRAY_SIZE(stm32_usb_otg_fshs_config)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CFG_USB_OTG_FS_H */
+/** @} */
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2019 Koen Zandberg
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_common_stm32
+ * @{
+ *
+ * @file
+ * @brief       Common configuration for STM32 OTG HS peripheral with FS phy
+ *
+ * @author      Koen Zandberg <koen@bergzand.net>
+ */
+
+#ifndef CFG_USB_OTG_HS_FS_H
+#define CFG_USB_OTG_HS_FS_H
+
+#include "periph_cpu.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Enable the full speed USB OTG peripheral
+ */
+#define STM32_USB_OTG_HS_ENABLED
+
+/**
+ * @name common USB OTG FS configuration
+ * @{
+ */
+static const stm32_usb_otg_fshs_config_t stm32_usb_otg_fshs_config[] = {
+    {
+        .periph   = (uint8_t *)USB_OTG_HS_PERIPH_BASE,
+        .rcc_mask = RCC_AHB1ENR_OTGHSEN,
+        .phy      = STM32_USB_OTG_PHY_BUILTIN,
+        .type     = STM32_USB_OTG_HS,
+        .irqn     = OTG_HS_IRQn,
+        .ahb      = AHB1,
+        .dm       = GPIO_PIN(PORT_B, 14),
+        .dp       = GPIO_PIN(PORT_B, 15),
+        .af       = GPIO_AF12,
+    }
+};
+/** @} */
+
+/**
+ * @brief Number of available USB OTG peripherals
+ */
+#define USBDEV_NUMOF           ARRAY_SIZE(stm32_usb_otg_fshs_config)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CFG_USB_OTG_HS_FS_H */
+/** @} */
@@ -10,6 +10,7 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # Put other features for this board (in alphabetical order)
 FEATURES_PROVIDED += riotboot

@@ -24,6 +24,7 @@
 #include "periph_cpu.h"
 #include "f2/cfg_clock_120_8_1.h"
 #include "cfg_i2c1_pb8_pb9.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

@@ -9,6 +9,7 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # load the common Makefile.features for Nucleo-144 boards
 include $(RIOTBOARD)/common/nucleo144/Makefile.features
@@ -25,6 +25,7 @@
 #include "f4/cfg_clock_100_8_1.h"
 #include "cfg_i2c1_pb8_pb9.h"
 #include "cfg_timer_tim5.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

@@ -12,6 +12,7 @@ FEATURES_PROVIDED += periph_rtt
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # load the common Makefile.features for Nucleo boards
 include $(RIOTBOARD)/common/nucleo144/Makefile.features
@@ -25,6 +25,7 @@
 #include "f4/cfg_clock_100_8_1.h"
 #include "cfg_i2c1_pb8_pb9.h"
 #include "cfg_timer_tim5.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

@@ -9,6 +9,7 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # load the common Makefile.features for Nucleo boards
 include $(RIOTBOARD)/common/nucleo144/Makefile.features
@@ -24,6 +24,7 @@
 #include "cfg_i2c1_pb8_pb9.h"
 #include "cfg_spi_divtable.h"
 #include "cfg_timer_tim5.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

@@ -8,6 +8,7 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # load the common Makefile.features for Nucleo boards
 include $(RIOTBOARD)/common/nucleo144/Makefile.features
@@ -24,6 +24,7 @@
 #include "cfg_i2c1_pb8_pb9.h"
 #include "cfg_spi_divtable.h"
 #include "cfg_timer_tim5.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

@@ -7,6 +7,7 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_rtt
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # Put other features for this board (in alphabetical order)
 FEATURES_PROVIDED += riotboot

@@ -24,6 +24,7 @@
 #include "cfg_i2c1_pb8_pb9.h"
 #include "cfg_rtt_default.h"
 #include "cfg_timer_tim2.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

@@ -7,6 +7,7 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_rtt
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # Put other features for this board (in alphabetical order)
 FEATURES_PROVIDED += riotboot

@@ -24,6 +24,7 @@
 #include "cfg_i2c1_pb8_pb9.h"
 #include "cfg_rtt_default.h"
 #include "cfg_timer_tim2.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

@@ -9,6 +9,7 @@ FEATURES_PROVIDED += periph_rtt
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 FEATURES_PROVIDED += periph_eth
 
 # Put other features for this board (in alphabetical order)

@@ -25,6 +25,7 @@
 #include "cfg_spi_divtable.h"
 #include "cfg_rtt_default.h"
 #include "cfg_timer_tim2.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

diff --git a/boards/pyboard/Makefile.features b/boards/pyboard/Makefile.features
@@ -7,3 +7,4 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
diff --git a/boards/pyboard/Makefile.include b/boards/pyboard/Makefile.include
@@ -1,3 +1,6 @@
+# we use shared STM32 configuration snippets
+INCLUDES += -I$(RIOTBOARD)/common/stm32/include
+
 # define the default port depending on the host OS
 PORT_LINUX ?= /dev/ttyUSB0
 PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.SLAB_USBtoUART*)))

diff --git a/boards/pyboard/include/periph_conf.h b/boards/pyboard/include/periph_conf.h
@@ -22,6 +22,7 @@
 #define PERIPH_CONF_H
 
 #include "periph_cpu.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

diff --git a/boards/stm32f429i-disc1/Makefile.features b/boards/stm32f429i-disc1/Makefile.features
@@ -6,6 +6,7 @@ FEATURES_PROVIDED += periph_i2c
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # Put other features for this board (in alphabetical order)
 FEATURES_PROVIDED += riotboot
diff --git a/boards/stm32f429i-disc1/include/periph_conf.h b/boards/stm32f429i-disc1/include/periph_conf.h
@@ -23,6 +23,7 @@
 #include "f4/cfg_clock_168_8_1.h"
 #include "cfg_spi_divtable.h"
 #include "cfg_timer_tim5.h"
+#include "cfg_usb_otg_hs_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

diff --git a/boards/stm32f4discovery/Makefile.features b/boards/stm32f4discovery/Makefile.features
@@ -10,6 +10,7 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # Various other features (if any)
 FEATURES_PROVIDED += arduino

diff --git a/boards/stm32f4discovery/include/periph_conf.h b/boards/stm32f4discovery/include/periph_conf.h
@@ -23,6 +23,7 @@
 #include "periph_cpu.h"
 #include "f4/cfg_clock_168_8_0.h"
 #include "cfg_spi_divtable.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

diff --git a/boards/stm32f723e-disco/Makefile.features b/boards/stm32f723e-disco/Makefile.features
@@ -9,3 +9,4 @@ FEATURES_PROVIDED += periph_rtt
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
diff --git a/boards/stm32f723e-disco/include/periph_conf.h b/boards/stm32f723e-disco/include/periph_conf.h
@@ -21,6 +21,7 @@
 
 #include "periph_cpu.h"
 #include "cfg_rtt_default.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

diff --git a/boards/stm32f769i-disco/Makefile.features b/boards/stm32f769i-disco/Makefile.features
@@ -6,3 +6,4 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_rtt
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
diff --git a/boards/stm32f769i-disco/include/periph_conf.h b/boards/stm32f769i-disco/include/periph_conf.h
@@ -22,6 +22,7 @@
 #include "periph_cpu.h"
 #include "cfg_rtt_default.h"
 #include "cfg_timer_tim2.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

@@ -3,3 +3,7 @@ USEMODULE += pm_layered
 
 # include stm32 common functions and stm32 common periph drivers
 USEMODULE += stm32_common stm32_common_periph
+
+ifneq (,$(filter periph_usbdev,$(FEATURES_USED)))
+  USEMODULE += xtimer
+endif
@@ -573,6 +573,46 @@ typedef struct {
 } i2c_timing_param_t;
 #endif
 
+/**
+ * @brief USB OTG peripheral type.
+ *
+ * High speed peripheral is assumed to have DMA support available.
+ *
+ * @warning Only one of each type is supported at the moment, it is not
+ * supported to have two FS type or two HS type peripherals enabled on a
+ * single MCU.
+ */
+typedef enum {
+    STM32_USB_OTG_FS = 0,   /**< Full speed peripheral */
+    STM32_USB_OTG_HS = 1,   /**< High speed peripheral */
+} stm32_usb_otg_fshs_type_t;
+
+/**
+ * @brief Type of USB OTG peripheral phy.
+ *
+ * The FS type only supports the built-in type, the HS phy can have either the
+ * FS built-in phy enabled or the HS ULPI interface enabled.
+ */
+typedef enum {
+    STM32_USB_OTG_PHY_BUILTIN,
+    STM32_USB_OTG_PHY_ULPI,
+} stm32_usb_otg_fshs_phy_t;
+
+/**
+ * @brief stm32 USB OTG configuration
+ */
+typedef struct {
+    uint8_t *periph;                /**< USB peripheral base address */
+    uint32_t rcc_mask;              /**< bit in clock enable register */
+    stm32_usb_otg_fshs_phy_t phy;   /**< Built-in or ULPI phy */
+    stm32_usb_otg_fshs_type_t type; /**< FS or HS type */
+    uint8_t irqn;                   /**< IRQ channel */
+    uint8_t ahb;                    /**< AHB bus */
+    gpio_t dm;                      /**< Data- gpio */
+    gpio_t dp;                      /**< Data+ gpio */
+    gpio_af_t af;                   /**< Alternative function */
+} stm32_usb_otg_fshs_config_t;
+
 /**
  * @brief   Get the actual bus clock frequency for the APB buses
  *
@@ -745,6 +785,10 @@ int dma_configure(dma_t dma, int chan, const volatile void *src, volatile void *
 #include "candev_stm32.h"
 #endif
 
+#ifdef MODULE_PERIPH_USBDEV
+#include "usbdev_stm32.h"
+#endif
+
 /**
  * @brief STM32 Ethernet configuration mode
  */