Merge pull request #15326 from aabadie/pr/pkg/softdevice_remove

pkg/nordic-softdevice: remove deprecated package

boards/common/nrf52/Kconfig

@@ -8,4 +8,4 @@ config BOARD_COMMON_NRF52
     bool
     select HAS_PERIPH_RTT
     select HAS_PERIPH_TIMER
-    select HAS_RIOTBOOT if !USEPKG_NORDIC_SOFTDEVICE_BLE
+    select HAS_RIOTBOOT

boards/common/nrf52/Makefile.features

@@ -3,11 +3,4 @@ CPU = nrf52
 # Put defined MCU peripherals here (in alphabetical order)
 FEATURES_PROVIDED += periph_rtt
 FEATURES_PROVIDED += periph_timer
-ifeq (,$(filter nordic_softdevice_ble,$(USEPKG)))
-  FEATURES_PROVIDED += riotboot
-endif
-
-ifneq (,$(findstring nrf52832, $(CPU_MODEL)))
-  # Nordic SoftDevice support in RIOT is verified for all nrf52832-based boards
-  FEATURES_PROVIDED += ble_nordic_softdevice
-endif
+FEATURES_PROVIDED += riotboot

boards/common/nrf52/Makefile.include

@@ -19,19 +19,6 @@ PROGRAMMER ?= jlink
 ifeq (jlink,$(PROGRAMMER))
   # setup JLink for flashing
   JLINK_DEVICE = nrf52
-
-  # special options when using SoftDevice
-  ifneq (,$(filter nordic_softdevice_ble,$(USEPKG)))
-    JLINK_PRE_FLASH = loadfile $(BINDIR)/softdevice.hex
-    FLASH_ADDR = 0x1f000
-    LINKER_SCRIPT ?= $(RIOTCPU)/$(CPU)/ldscripts/$(CPU_MODEL)_sd.ld
-    # murdock: softdevice.hex file is used for flashing
-    # It must be taken into account for the test input hash and
-    # be sent to the separated testing boards
-    TEST_EXTRA_FILES += $(BINDIR)/softdevice.hex
-    # Files in TEST_EXTRA_FILES need to have an explicit target
-    $(BINDIR)/softdevice.hex: | $(ELFFILE)
-  endif
   include $(RIOTMAKE)/tools/jlink.inc.mk
 else ifeq (openocd,$(PROGRAMMER))
   ifneq (,$(filter $(BOARD),ruuvitag thingy52))
@@ -41,26 +28,6 @@ else ifeq (openocd,$(PROGRAMMER))
   # setup OpenOCD for flashing. Version 0.10 of OpenOCD doesn't contain support
   # for nrf52dk and nrf52840dk boards. To use OpenOCD with these a version
   # build from source (master > 2018, August the 13rd) is required.
-  ifneq (,$(filter nordic_softdevice_ble,$(USEPKG)))
-    LINKER_SCRIPT ?= $(RIOTCPU)/$(CPU)/ldscripts/$(CPU_MODEL)_sd.ld
-
-    OPENOCD_PRE_FLASH_CMDS += -c 'flash write_image erase "$(BINDIR)/softdevice.hex"'
-    OPENOCD_PRE_VERIFY_CMDS += -c 'verify_image "$(BINDIR)/softdevice.hex"'
-
-    # Cannot use the 'ELFFILE' here
-    # The segments are 0x10000 aligned so padding bytes are copied and verified
-    #
-    # Using 'LINKFLAGS += -Wl,--nmagic' prevents it but would require
-    # dedicated testing/review
-    FLASHFILE ?= $(HEXFILE)
-
-    # murdock: softdevice.hex file is used for flashing
-    # It must be taken into account for the test input hash and
-    # be sent to the separated testing boards
-    TEST_EXTRA_FILES += $(BINDIR)/softdevice.hex
-    # Files in TEST_EXTRA_FILES need to have an explicit target
-    $(BINDIR)/softdevice.hex: | $(ELFFILE)
-  endif
   DEBUG_ADAPTER ?= jlink
   OPENOCD_CONFIG = $(RIOTBOARD)/common/nrf52/dist/openocd.cfg
   include $(RIOTMAKE)/tools/openocd.inc.mk

boards/common/nrf52/nrf52832/Makefile.dep

@@ -1,5 +1,5 @@
 ifneq (,$(filter gnrc_netdev_default,$(USEMODULE)))
-  ifeq (,$(filter nordic_softdevice_ble nrfmin,$(USEMODULE) $(USEPKG)))
+  ifeq (,$(filter nrfmin,$(USEMODULE)))
     USEMODULE += nimble_netif
   endif
 endif

cpu/nrf52/Kconfig

@@ -42,7 +42,6 @@ config CPU_MODEL_NRF52832XXAA
     bool
     select CPU_FAM_NRF52
     select CPU_CORE_CORTEX_M4F
-    select HAS_BLE_NORDIC_SOFTDEVICE
 
 config CPU_MODEL_NRF52833XXAA
     bool

cpu/nrf52/cpu.c

@@ -34,11 +34,6 @@ static bool ftpan_32(void);
 static bool ftpan_37(void);
 static bool ftpan_36(void);
 
-#ifdef SOFTDEVICE_PRESENT
-#include "softdevice_handler.h"
-uint8_t _ble_evt_buffer[BLE_STACK_EVT_MSG_BUF_SIZE];
-#endif
-
 /**
  * @brief   Initialize the CPU, set IRQ priorities
  */
@@ -73,18 +68,8 @@ void cpu_init(void)
     NRF_NVMC->ICACHECNF = (NVMC_ICACHECNF_CACHEEN_Msk);
 #endif
 
-    /* softdevice needs to be enabled from ISR context */
-#ifdef SOFTDEVICE_PRESENT
-    softdevice_handler_init(NRF_CLOCK_LFCLKSRC_XTAL_20_PPM, &_ble_evt_buffer,
-            BLE_STACK_EVT_MSG_BUF_SIZE, NULL);
-
-    /* fixup swi0 (used as softdevice PendSV trampoline) */
-    NVIC_EnableIRQ(SWI0_EGU0_IRQn);
-    NVIC_SetPriority(SWI0_EGU0_IRQn, 6);
-#else
     /* call cortexm default initialization */
     cortexm_init();
-#endif
 
     /* enable wake up on events for __WFE CPU sleep */
     SCB->SCR |= SCB_SCR_SEVONPEND_Msk;

cpu/nrf52/include/cpu_conf.h

@@ -112,19 +112,6 @@ extern "C" {
 #define FLASHPAGE_RAW_ALIGNMENT    (4U)
 /** @} */
 
-/**
- * @brief   SoftDevice settings
- * @{
- */
-#ifdef SOFTDEVICE_PRESENT
-#ifndef DONT_OVERRIDE_NVIC
-#include "nrf_soc.h"
-#undef NVIC_SetPriority
-#define NVIC_SetPriority    sd_nvic_SetPriority
-#endif /* DONT_OVERRIDE_NVIC */
-#endif /* SOFTDEVICE_PRESENT */
-/** @} */
-
 #ifdef CPU_MODEL_NRF52840XXAA
 /**
  * @name    OpenWSN timing constants

cpu/nrf52/vectors/vectors_nrf52805xxaa.c

@@ -53,21 +53,7 @@ WEAK_DEFAULT void isr_wdt(void);
 WEAK_DEFAULT void isr_rtc1(void);
 WEAK_DEFAULT void isr_qdec(void);
 WEAK_DEFAULT void isr_lpcomp(void);
-
-#ifndef SOFTDEVICE_PRESENT
 WEAK_DEFAULT void isr_swi0(void);
-#else
-/* For unknown reasons, setting PendSV pending within
- * the softdevice ISRs leads to a crash. This workaround
- * uses swi0 as trampoline.
- */
-extern void thread_yield_higher(void);
-void isr_swi0(void)
-{
-    thread_yield_higher();
-}
-#endif
-
 WEAK_DEFAULT void isr_swi1(void);
 WEAK_DEFAULT void isr_swi2(void);
 WEAK_DEFAULT void isr_swi3(void);
@@ -84,10 +70,6 @@ WEAK_DEFAULT void isr_spi2(void);
 WEAK_DEFAULT void isr_rtc2(void);
 WEAK_DEFAULT void isr_i2s(void);
 
-#ifdef SOFTDEVICE_PRESENT
-extern void SWI2_EGU2_IRQHandler(void);
-#endif
-
 /* CPU specific interrupt vector table */
 ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
     isr_power_clock,       /* power_clock */

cpu/nrf52/vectors/vectors_nrf52810xxaa.c

@@ -54,21 +54,7 @@ WEAK_DEFAULT void isr_wdt(void);
 WEAK_DEFAULT void isr_rtc1(void);
 WEAK_DEFAULT void isr_qdec(void);
 WEAK_DEFAULT void isr_lpcomp(void);
-
-#ifndef SOFTDEVICE_PRESENT
 WEAK_DEFAULT void isr_swi0(void);
-#else
-/* For unknown reasons, setting PendSV pending within
- * the softdevice ISRs leads to a crash. This workaround
- * uses swi0 as trampoline.
- */
-extern void thread_yield_higher(void);
-void isr_swi0(void)
-{
-    thread_yield_higher();
-}
-#endif
-
 WEAK_DEFAULT void isr_swi1(void);
 WEAK_DEFAULT void isr_swi2(void);
 WEAK_DEFAULT void isr_swi3(void);
@@ -85,10 +71,6 @@ WEAK_DEFAULT void isr_spi2(void);
 WEAK_DEFAULT void isr_rtc2(void);
 WEAK_DEFAULT void isr_i2s(void);
 
-#ifdef SOFTDEVICE_PRESENT
-extern void SWI2_EGU2_IRQHandler(void);
-#endif
-
 /* CPU specific interrupt vector table */
 ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
     isr_power_clock,       /* power_clock */

cpu/nrf52/vectors/vectors_nrf52811xxaa.c

@@ -55,21 +55,7 @@ WEAK_DEFAULT void isr_wdt(void);
 WEAK_DEFAULT void isr_rtc1(void);
 WEAK_DEFAULT void isr_qdec(void);
 WEAK_DEFAULT void isr_lpcomp(void);
-
-#ifndef SOFTDEVICE_PRESENT
 WEAK_DEFAULT void isr_swi0(void);
-#else
-/* For unknown reasons, setting PendSV pending within
- * the softdevice ISRs leads to a crash. This workaround
- * uses swi0 as trampoline.
- */
-extern void thread_yield_higher(void);
-void isr_swi0(void)
-{
-    thread_yield_higher();
-}
-#endif
-
 WEAK_DEFAULT void isr_swi1(void);
 WEAK_DEFAULT void isr_swi2(void);
 WEAK_DEFAULT void isr_swi3(void);
@@ -86,10 +72,6 @@ WEAK_DEFAULT void isr_spi2(void);
 WEAK_DEFAULT void isr_rtc2(void);
 WEAK_DEFAULT void isr_i2s(void);
 
-#ifdef SOFTDEVICE_PRESENT
-extern void SWI2_EGU2_IRQHandler(void);
-#endif
-
 /* CPU specific interrupt vector table */
 ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
     isr_power_clock,       /* power_clock */

cpu/nrf52/vectors/vectors_nrf52820xxaa.c

@@ -54,21 +54,7 @@ WEAK_DEFAULT void isr_wdt(void);
 WEAK_DEFAULT void isr_rtc1(void);
 WEAK_DEFAULT void isr_qdec(void);
 WEAK_DEFAULT void isr_lpcomp(void);
-
-#ifndef SOFTDEVICE_PRESENT
 WEAK_DEFAULT void isr_swi0(void);
-#else
-/* For unknown reasons, setting PendSV pending within
- * the softdevice ISRs leads to a crash. This workaround
- * uses swi0 as trampoline.
- */
-extern void thread_yield_higher(void);
-void isr_swi0(void)
-{
-    thread_yield_higher();
-}
-#endif
-
 WEAK_DEFAULT void isr_swi1(void);
 WEAK_DEFAULT void isr_swi2(void);
 WEAK_DEFAULT void isr_swi3(void);
@@ -92,10 +78,6 @@ WEAK_DEFAULT void isr_cryptocell(void);
 WEAK_DEFAULT void isr_spi3(void);
 WEAK_DEFAULT void isr_pwm3(void);
 
-#ifdef SOFTDEVICE_PRESENT
-extern void SWI2_EGU2_IRQHandler(void);
-#endif
-
 /* CPU specific interrupt vector table */
 ISR_VECTOR(1)
 const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
@@ -121,11 +103,7 @@ const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
     isr_lpcomp,            /* lpcomp */
     isr_swi0,              /* swi0 */
     isr_swi1,              /* swi1 */
-#ifdef SOFTDEVICE_PRESENT
-    SWI2_EGU2_IRQHandler,  /* softdevice swi handler */
-#else
     isr_swi2,              /* swi2 */
-#endif
     isr_swi3,              /* swi3 */
     isr_swi4,              /* swi4 */
     isr_swi5,              /* swi5 */

cpu/nrf52/vectors/vectors_nrf52832xxaa.c

@@ -53,21 +53,7 @@ WEAK_DEFAULT void isr_wdt(void);
 WEAK_DEFAULT void isr_rtc1(void);
 WEAK_DEFAULT void isr_qdec(void);
 WEAK_DEFAULT void isr_lpcomp(void);
-
-#ifndef SOFTDEVICE_PRESENT
 WEAK_DEFAULT void isr_swi0(void);
-#else
-/* For unknown reasons, setting PendSV pending within
- * the softdevice ISRs leads to a crash. This workaround
- * uses swi0 as trampoline.
- */
-extern void thread_yield_higher(void);
-void isr_swi0(void)
-{
-    thread_yield_higher();
-}
-#endif
-
 WEAK_DEFAULT void isr_swi1(void);
 WEAK_DEFAULT void isr_swi2(void);
 WEAK_DEFAULT void isr_swi3(void);
@@ -85,10 +71,6 @@ WEAK_DEFAULT void isr_rtc2(void);
 WEAK_DEFAULT void isr_i2s(void);
 WEAK_DEFAULT void isr_fpu(void);
 
-#ifdef SOFTDEVICE_PRESENT
-extern void SWI2_EGU2_IRQHandler(void);
-#endif
-
 /* CPU specific interrupt vector table */
 ISR_VECTOR(1)
 const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
@@ -114,11 +96,7 @@ const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
     isr_lpcomp,            /* lpcomp */
     isr_swi0,              /* swi0 */
     isr_swi1,              /* swi1 */
-#ifdef SOFTDEVICE_PRESENT
-    SWI2_EGU2_IRQHandler,  /* softdevice swi handler */
-#else
     isr_swi2,              /* swi2 */
-#endif
     isr_swi3,              /* swi3 */
     isr_swi4,              /* swi4 */
     isr_swi5,              /* swi5 */

cpu/nrf52/vectors/vectors_nrf52833xxaa.c

@@ -53,21 +53,7 @@ WEAK_DEFAULT void isr_wdt(void);
 WEAK_DEFAULT void isr_rtc1(void);
 WEAK_DEFAULT void isr_qdec(void);
 WEAK_DEFAULT void isr_lpcomp(void);
-
-#ifndef SOFTDEVICE_PRESENT
 WEAK_DEFAULT void isr_swi0(void);
-#else
-/* For unknown reasons, setting PendSV pending within
- * the softdevice ISRs leads to a crash. This workaround
- * uses swi0 as trampoline.
- */
-extern void thread_yield_higher(void);
-void isr_swi0(void)
-{
-    thread_yield_higher();
-}
-#endif
-
 WEAK_DEFAULT void isr_swi1(void);
 WEAK_DEFAULT void isr_swi2(void);
 WEAK_DEFAULT void isr_swi3(void);
@@ -91,10 +77,6 @@ WEAK_DEFAULT void isr_cryptocell(void);
 WEAK_DEFAULT void isr_spi3(void);
 WEAK_DEFAULT void isr_pwm3(void);
 
-#ifdef SOFTDEVICE_PRESENT
-extern void SWI2_EGU2_IRQHandler(void);
-#endif
-
 /* CPU specific interrupt vector table */
 ISR_VECTOR(1)
 const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
@@ -120,11 +102,7 @@ const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
     isr_lpcomp,            /* lpcomp */
     isr_swi0,              /* swi0 */
     isr_swi1,              /* swi1 */
-#ifdef SOFTDEVICE_PRESENT
-    SWI2_EGU2_IRQHandler,  /* softdevice swi handler */
-#else
     isr_swi2,              /* swi2 */
-#endif
     isr_swi3,              /* swi3 */
     isr_swi4,              /* swi4 */
     isr_swi5,              /* swi5 */