Add equivlences of ECR, SX and SXdg gates to the equivalence library

qiskit/circuit/library/standard_gates/equivalence_library.py

@@ -644,6 +644,25 @@
     def_ecr_cliff.append(inst, qargs, cargs)
 _sel.add_equivalence(ECRGate(), def_ecr_cliff)
 
+# CXGate decomposed using an ECRGate and Clifford 1-qubit gates
+#                global phase: π/4
+# q_0: ──■──          ┌─────┐ ┌──────┐┌───┐
+#      ┌─┴─┐  ≡  q_0: ┤ Sdg ├─┤0     ├┤ X ├
+# q_1: ┤ X ├          ├─────┴┐│  Ecr │└───┘
+#      └───┘     q_1: ┤ √Xdg ├┤1     ├─────
+#                     └──────┘└──────┘
+
+q = QuantumRegister(2, "q")
+def_ecr_to_cx_cliff = QuantumCircuit(q, global_phase=pi / 4)
+for inst, qargs, cargs in [
+    (SdgGate(), [q[0]], []),
+    (SXdgGate(), [q[1]], []),
+    (ECRGate(), [q[0], q[1]], []),
+    (XGate(), [q[0]], []),
+]:
+    def_ecr_to_cx_cliff.append(inst, qargs, cargs)
+_sel.add_equivalence(CXGate(), def_ecr_to_cx_cliff)
+
 # SGate
 #
 #    ┌───┐        ┌─────────┐
@@ -781,6 +800,17 @@
     def_sx.append(inst, qargs, cargs)
 _sel.add_equivalence(SXGate(), def_sx)
 
+# HGate decomposed into SXGate and SGate
+#              global phase: -π/4
+#    ┌───┐        ┌───┐┌────┐┌───┐
+# q: ┤ H ├  ≡  q: ┤ S ├┤ √X ├┤ S ├
+#    └───┘        └───┘└────┘└───┘
+q = QuantumRegister(1, "q")
+def_h_to_sx = QuantumCircuit(q, global_phase=-pi / 4)
+for inst, qargs, cargs in [(SGate(), [q[0]], []), (SXGate(), [q[0]], []), (SGate(), [q[0]], [])]:
+    def_h_to_sx.append(inst, qargs, cargs)
+_sel.add_equivalence(HGate(), def_h_to_sx)
+
 # SXGate
 #               global phase: π/4
 #    ┌────┐        ┌─────────┐
@@ -802,6 +832,21 @@
     def_sxdg.append(inst, qargs, cargs)
 _sel.add_equivalence(SXdgGate(), def_sxdg)
 
+# HGate decomposed into SXdgGate and SdgGate
+#              global phase: π/4
+#    ┌───┐        ┌─────┐┌──────┐┌─────┐
+# q: ┤ H ├  ≡  q: ┤ Sdg ├┤ √Xdg ├┤ Sdg ├
+#    └───┘        └─────┘└──────┘└─────┘
+q = QuantumRegister(1, "q")
+def_h_to_sxdg = QuantumCircuit(q, global_phase=pi / 4)
+for inst, qargs, cargs in [
+    (SdgGate(), [q[0]], []),
+    (SXdgGate(), [q[0]], []),
+    (SdgGate(), [q[0]], []),
+]:
+    def_h_to_sxdg.append(inst, qargs, cargs)
+_sel.add_equivalence(HGate(), def_h_to_sxdg)
+
 # SXdgGate
 #                 global phase: 7π/4
 #    ┌──────┐        ┌──────────┐

releasenotes/notes/add-ecr-sx-equivalences-5b6fe73ec599d1a4.yaml

@@ -0,0 +1,11 @@
+---
+feature:
+  - |
+    Added a decomposition of an :class:`.CXGate` into :class:`.ECRGate` and 1-qubit Clifford gates
+    (up to a global phase) into the :class:`.EquivalenceLibrary`.
+  - |
+    Added a decomposition of an :class:`.HGate` into :class:`.SXGate` and :class:`.SGate`
+    (up to a global phase) into the :class:`.EquivalenceLibrary`.
+  - |
+    Added a decomposition of an :class:`.HGate` into :class:`.SXdgGate` and :class:`.SdgGate`
+    (up to a global phase) into the :class:`.EquivalenceLibrary`.

test/python/transpiler/test_basis_translator.py

@@ -897,18 +897,19 @@ def test_cx_bell_to_ecr(self):
         in_dag = circuit_to_dag(bell)
         out_dag = BasisTranslator(std_eqlib, ["ecr", "u"]).run(in_dag)
 
-        #         ┌────────────┐  ┌─────────────┐┌──────────┐┌──────┐
-        # q_0: ───┤ U(π/2,0,π) ├──┤ U(0,0,-π/2) ├┤ U(π,0,0) ├┤0     ├
-        #      ┌──┴────────────┴─┐└─────────────┘└──────────┘│  Ecr │
-        # q_1: ┤ U(π/2,-π/2,π/2) ├───────────────────────────┤1     ├
-        #      └─────────────────┘                           └──────┘
+        #         ┌────────────┐   ┌─────────────┐┌──────┐┌──────────┐
+        # q_0: ───┤ U(π/2,0,π) ├───┤ U(0,0,-π/2) ├┤0     ├┤ U(π,0,π) ├
+        #      ┌──┴────────────┴──┐└─────────────┘│  Ecr │└──────────┘
+        # q_1: ┤ U(-π/2,-π/2,π/2) ├───────────────┤1     ├────────────
+        #      └──────────────────┘               └──────┘
+
         qr = QuantumRegister(2, "q")
         expected = QuantumCircuit(2)
         expected.u(pi / 2, 0, pi, qr[0])
         expected.u(0, 0, -pi / 2, qr[0])
-        expected.u(pi, 0, 0, qr[0])
-        expected.u(pi / 2, -pi / 2, pi / 2, qr[1])
+        expected.u(-pi / 2, -pi / 2, pi / 2, qr[1])
         expected.ecr(0, 1)
+        expected.u(pi, 0, pi, qr[0])
         expected_dag = circuit_to_dag(expected)
 
         self.assertEqual(out_dag, expected_dag)