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Fix a bug in QuantumCircuit.draw related to vertical_compression #9855

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Apr 3, 2023
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2 changes: 1 addition & 1 deletion qiskit/visualization/circuit/text.py
Original file line number Diff line number Diff line change
Expand Up @@ -907,7 +907,7 @@ def merge_lines(top, bot, icod="top"):
ret += "│"
elif topc == "└" and botc == "┌" and icod == "top":
ret += "├"
elif topc == "┘" and botc == "┐":
elif topc == "┘" and botc == "┐" and icod == "top":
ret += "┤"
elif botc in "┐┌" and icod == "top":
ret += "┬"
Expand Down
Original file line number Diff line number Diff line change
@@ -0,0 +1,4 @@
---
fixes:
- |
Fixed the top-right corner of gates when using ``vertical_compression="low"`` in text visualizations of circuits.
32 changes: 26 additions & 6 deletions test/python/visualization/test_circuit_text_drawer.py
Original file line number Diff line number Diff line change
Expand Up @@ -1988,22 +1988,32 @@ def test_text_conditional_reverse_bits_true(self):
[
" ┌───┐ ┌─┐ ┌───┐",
"qr_2: |0>┤ H ├─────┤M├─────┤ X ├",
" ├───┤ └╥┘ └─╥─┘",
" └───┘ └╥┘ └─╥─┘",
" ┌───┐ ║ ║ ",
"qr_1: |0>┤ H ├──────╫────────╫──",
" ├───┤┌───┐ ║ ┌───┐ ║ ",
" └───┘ ║ ║ ",
" ┌───┐┌───┐ ║ ┌───┐ ║ ",
"qr_0: |0>┤ H ├┤ X ├─╫─┤ X ├──╫──",
" └───┘└───┘ ║ └───┘ ║ ",
" ║ ║ ",
" cr2: 0 ═══════════╬════════╬══",
" ║ ║ ",
" ║ ║ ",
" cr_1: 0 ═══════════╩════════■══",
" ║ ",
" ║ ",
" cr_0: 0 ════════════════════o══",
" 0x2 ",
]
)

self.assertEqual(
str(_text_circuit_drawer(circuit, cregbundle=False, reverse_bits=True)), expected
str(
_text_circuit_drawer(
circuit, vertical_compression="low", cregbundle=False, reverse_bits=True
)
),
expected,
)

def test_text_conditional_reverse_bits_false(self):
Expand All @@ -2024,22 +2034,32 @@ def test_text_conditional_reverse_bits_false(self):
[
" ┌───┐┌───┐┌───┐",
"qr_0: |0>┤ H ├┤ X ├┤ X ├",
" ├───┤└───┘└───┘",
" └───┘└───┘└───┘",
" ┌───┐ ",
"qr_1: |0>┤ H ├──────────",
" ├───┤ ┌─┐ ┌───┐",
" └───┘ ",
" ┌───┐ ┌─┐ ┌───┐",
"qr_2: |0>┤ H ├─┤M├─┤ X ├",
" └───┘ └╥┘ └─╥─┘",
" ║ ║ ",
" cr_0: 0 ═══════╬════o══",
" ║ ║ ",
" ║ ║ ",
" cr_1: 0 ═══════╩════■══",
" 0x2 ",
" ",
" cr2: 0 ═══════════════",
" ",
]
)

self.assertEqual(
str(_text_circuit_drawer(circuit, cregbundle=False, reverse_bits=False)), expected
str(
_text_circuit_drawer(
circuit, vertical_compression="low", cregbundle=False, reverse_bits=False
)
),
expected,
)

def test_text_justify_right(self):
Expand Down