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Fix start time updates in ConstrainedReschedule pass #10076

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Original file line number Diff line number Diff line change
Expand Up @@ -111,10 +111,8 @@ def _push_node_back(self, dag: DAGCircuit, node: DAGOpNode, shift: int):
clbit_write_latency = self.property_set.get("clbit_write_latency", 0)

nodes_with_overlap = [(node, shift)]
shift_stack = []
while nodes_with_overlap:
node, shift = nodes_with_overlap.pop()
shift_stack.append((node, shift))
# Compute shifted t1 of this node separately for qreg and creg
this_t0 = node_start_time[node]
new_t1q = this_t0 + node.op.duration + shift
Expand All @@ -132,6 +130,9 @@ def _push_node_back(self, dag: DAGCircuit, node: DAGOpNode, shift: int):
new_t1c = None
this_clbits = set()

# Update start time of this node after all overlaps are resolved
node_start_time[node] += shift

# Check successors for overlap
for next_node in self._get_next_gate(dag, node):
# Compute next node start time separately for qreg and creg
Expand Down Expand Up @@ -163,10 +164,6 @@ def _push_node_back(self, dag: DAGCircuit, node: DAGOpNode, shift: int):
overlap = max(qreg_overlap, creg_overlap)
if overlap > 0:
nodes_with_overlap.append((next_node, overlap))
# Update start time of this node after all overlaps are resolved
while shift_stack:
node, shift = shift_stack.pop()
node_start_time[node] += shift

def run(self, dag: DAGCircuit):
"""Run rescheduler.
Expand Down