[XPU][PHI Kernels] add scatter_nd_add_grad kernel & bf16 support for slice OPs #58580
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,115 @@ | ||
| // Copyright (c) 2023 PaddlePaddle Authors. All Rights Reserved. | ||
| // | ||
| // Licensed under the Apache License, Version 2.0 (the "License"); | ||
| // you may not use this file except in compliance with the License. | ||
| // You may obtain a copy of the License at | ||
| // | ||
| // http://www.apache.org/licenses/LICENSE-2.0 | ||
| // | ||
| // Unless required by applicable law or agreed to in writing, software | ||
| // distributed under the License is distributed on an "AS IS" BASIS, | ||
| // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| // See the License for the specific language governing permissions and | ||
| // limitations under the License. | ||
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| #include "paddle/phi/kernels/scatter_nd_add_grad_kernel.h" | ||
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| #include "paddle/phi/backends/xpu/enforce_xpu.h" | ||
| #include "paddle/phi/core/kernel_registry.h" | ||
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| namespace phi { | ||
| template <typename T, typename Context> | ||
| void ScatterNdAddGradKernel(const Context &ctx, | ||
| const DenseTensor &index, | ||
| const DenseTensor &updates, | ||
| const DenseTensor &out_grad, | ||
| DenseTensor *x_grad, | ||
| DenseTensor *updates_grad) { | ||
| using XPUT = typename XPUTypeTrait<T>::Type; | ||
| int ret = xpu::SUCCESS; | ||
| const T *out_grad_data = out_grad.data<T>(); | ||
| if (x_grad) { | ||
| auto *x_grad_data = ctx.template Alloc<T>(x_grad); | ||
| ret = xpu::copy<XPUT>(ctx.x_context(), | ||
| reinterpret_cast<const XPUT *>(out_grad_data), | ||
| reinterpret_cast<XPUT *>(x_grad_data), | ||
| out_grad.numel()); | ||
| PADDLE_ENFORCE_XDNN_SUCCESS(ret, "copy"); | ||
| } | ||
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|
||
| if (updates_grad) { | ||
| auto *updates_grad_data = ctx.template Alloc<T>(updates_grad); | ||
| if (updates_grad->numel() == 0) { | ||
| return; | ||
| } | ||
| if (index.numel() == 0) { | ||
| auto index_dims = index.dims(); | ||
| auto index_dims_size = index_dims.size(); | ||
| int64_t end_size = index_dims[index_dims_size - 1]; | ||
| PADDLE_ENFORCE_EQ( | ||
| end_size, | ||
| 0, | ||
| errors::InvalidArgument( | ||
| "Size of the last dim of the index tensor [%d] should be 0", | ||
| end_size)); | ||
| auto remain_dims = phi::slice_ddim(index_dims, 0, index_dims_size - 1); | ||
| int64_t remain_numel = phi::product(remain_dims); | ||
| int64_t updates_grad_numel = updates_grad->numel(); | ||
| int64_t out_grad_numel = out_grad.numel(); | ||
| PADDLE_ENFORCE_EQ( | ||
| remain_numel * out_grad_numel, | ||
| updates_grad_numel, | ||
| errors::InvalidArgument("out_grad numel[%d] * remain numel[%d] " | ||
| "should math updates_grad numel[%d]", | ||
| out_grad_numel, | ||
| remain_numel, | ||
| updates_grad_numel)); | ||
| ret = xpu::broadcast<XPUT>(ctx.x_context(), | ||
| reinterpret_cast<const XPUT *>(out_grad_data), | ||
| reinterpret_cast<XPUT *>(updates_grad_data), | ||
| {1, out_grad_numel}, | ||
| {remain_numel, out_grad_numel}); | ||
| PADDLE_ENFORCE_XDNN_SUCCESS(ret, "broadcast"); | ||
| return; | ||
| } | ||
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| auto index_shape_vec = vectorize<int64_t>(index.dims()); | ||
| if (index_shape_vec.size() == 1) { | ||
| index_shape_vec.insert(index_shape_vec.begin(), 1); | ||
| } | ||
| auto out_grad_shape_vec = vectorize<int64_t>(out_grad.dims()); | ||
| xpu::VectorParam<int64_t> out_grad_shape_param = { | ||
| out_grad_shape_vec.data(), | ||
| static_cast<int64_t>(out_grad_shape_vec.size()), | ||
| nullptr}; | ||
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||
| if (index.dtype() == DataType::INT32) { | ||
| ret = xpu::gather_nd<XPUT, int>( | ||
| ctx.x_context(), | ||
| reinterpret_cast<const XPUT *>(out_grad_data), | ||
| index.data<int>(), | ||
| reinterpret_cast<XPUT *>(updates_grad_data), | ||
| out_grad_shape_param, | ||
| index_shape_vec); | ||
| } else { | ||
| ret = xpu::gather_nd<XPUT, int64_t>( | ||
| ctx.x_context(), | ||
| reinterpret_cast<const XPUT *>(out_grad_data), | ||
| index.data<int64_t>(), | ||
| reinterpret_cast<XPUT *>(updates_grad_data), | ||
| out_grad_shape_param, | ||
| index_shape_vec); | ||
| } | ||
| PADDLE_ENFORCE_XDNN_SUCCESS(ret, "gather_nd"); | ||
| } | ||
| } | ||
| } // namespace phi | ||
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| PD_REGISTER_KERNEL(scatter_nd_add_grad, | ||
| XPU, | ||
| ALL_LAYOUT, | ||
| phi::ScatterNdAddGradKernel, | ||
| float, | ||
| phi::dtype::float16, | ||
| int, | ||
| int64_t) {} |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
|
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@@ -85,4 +85,5 @@ PD_REGISTER_KERNEL(slice_grad, | |
| phi::SliceGradKernel, | ||
| float, | ||
| int, | ||
| phi::dtype::float16, | ||
| phi::dtype::bfloat16) {} | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -120,4 +120,5 @@ PD_REGISTER_KERNEL(slice, | |
| float, | ||
| int, | ||
| phi::dtype::float16, | ||
| phi::dtype::bfloat16, | ||
| int64_t) {} | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -163,4 +163,5 @@ PD_REGISTER_KERNEL(strided_slice_raw_grad, | |
| int, | ||
| int16_t, | ||
| float, | ||
| phi::dtype::float16, | ||
| phi::dtype::bfloat16) {} | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -171,4 +171,5 @@ PD_REGISTER_KERNEL(strided_slice_raw, | |
| int16_t, | ||
| int64_t, | ||
| float, | ||
| phi::dtype::float16, | ||
| phi::dtype::bfloat16) {} | ||
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这里感觉要修改一下，common_type_value满足条件之后，就算value里有inf和nan，is_out_range也是false
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这个正常行为，用户可以paddle.full_like一个值为Nan的Tensor，这里的逻辑是如果传入的值在数据类型能表示的范围或者是Nan/inf都是合理的。这个参考了GPU实现
Paddle/paddle/phi/kernels/gpu/full_kernel.cu
Line 87 in 5d4320b