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# | ||
# For a description of the syntax of this configuration file, | ||
# see the file kconfig-language.txt in the NuttX tools repository. | ||
# |
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px4_add_board( | ||
PLATFORM nuttx | ||
VENDOR nxp | ||
MODEL rddrone-uavcan146 | ||
LABEL default | ||
TOOLCHAIN arm-none-eabi | ||
ARCHITECTURE cortex-m4 | ||
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UAVCAN_INTERFACES 2 | ||
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DRIVERS | ||
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MODULES | ||
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SYSTEMCMDS | ||
i2cdetect | ||
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EXAMPLES | ||
) |
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{ | ||
"board_id": 10000, | ||
"magic": "PX4FWv1", | ||
"description": "Firmware for the rddrone-uavcan146 board", | ||
"image": "", | ||
"build_time": 0, | ||
"summary": "RDDRONE-UAVCAN146", | ||
"version": "0.1", | ||
"image_size": 0, | ||
"image_maxsize": 0, | ||
"git_identity": "", | ||
"board_revision": 0 | ||
} |
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# | ||
# For a description of the syntax of this configuration file, | ||
# see misc/tools/kconfig-language.txt. | ||
# | ||
config BOARD_HAS_PROBES | ||
bool "Board provides GPIO or other Hardware for signaling to timing analyze." | ||
default y | ||
---help--- | ||
This board provides GPIO FMU-CH1-6 as PROBE_1-6 to provide timing signals from selected drivers. | ||
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config BOARD_USE_PROBES | ||
bool "Enable the use the board provided GPIO FMU-CH1-6 as PROBE_1-6 to provide timing signals from selected drivers" | ||
default n | ||
depends on BOARD_HAS_PROBES | ||
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---help--- | ||
Select to use GPIO FMU-CH1-6 to provide timing signals from selected drivers. |
153 changes: 153 additions & 0 deletions
153
boards/nxp/rddrone-uavcan146/nuttx-config/include/board.h
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/**************************************************************************** | ||
* boards/arm/s32k1xx/rddrone-uavcan146/include/board.h | ||
* | ||
* Copyright (C) 2019 Gregory Nutt. All rights reserved. | ||
* Author: Gregory Nutt <gnutt@nuttx.org> | ||
* | ||
* Redistribution and use in source and binary forms, with or without | ||
* modification, are permitted provided that the following conditions | ||
* are met: | ||
* | ||
* 1. Redistributions of source code must retain the above copyright | ||
* notice, this list of conditions and the following disclaimer. | ||
* 2. Redistributions in binary form must reproduce the above copyright | ||
* notice, this list of conditions and the following disclaimer in | ||
* the documentation and/or other materials provided with the | ||
* distribution. | ||
* 3. Neither the name NuttX nor the names of its contributors may be | ||
* used to endorse or promote products derived from this software | ||
* without specific prior written permission. | ||
* | ||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS | ||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE | ||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | ||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS | ||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED | ||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | ||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN | ||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | ||
* POSSIBILITY OF SUCH DAMAGE. | ||
* | ||
****************************************************************************/ | ||
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#ifndef __BOARDS_ARM_RDDRONE_UAVCAN146_INCLUDE_BOARD_H | ||
#define __BOARDS_ARM_RDDRONE_UAVCAN146_INCLUDE_BOARD_H | ||
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/**************************************************************************** | ||
* Included Files | ||
****************************************************************************/ | ||
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#include <nuttx/config.h> | ||
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#ifndef __ASSEMBLY__ | ||
# include <stdint.h> | ||
# include <stdbool.h> | ||
#endif | ||
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/**************************************************************************** | ||
* Pre-processor Definitions | ||
****************************************************************************/ | ||
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/* Clocking *****************************************************************/ | ||
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/* The RDDRONE-UAVCAN146 is fitted with a 8MHz Crystal */ | ||
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#define BOARD_XTAL_FREQUENCY 8000000 | ||
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/* The S32K146 will run at 112MHz */ | ||
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/* LED definitions **********************************************************/ | ||
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/* The RDDRONE-UAVCAN146 has one RGB LED: | ||
* | ||
* RedLED PTD15 (FTM0 CH0) | ||
* GreenLED PTD16 (FTM0 CH1) | ||
* BlueLED PTD0 (FTM0 CH2) | ||
* | ||
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in | ||
* any way. The following definitions are used to access individual RGB | ||
* components. | ||
* | ||
* The RGB components could, alternatively be controlled through PWM using | ||
* the common RGB LED driver. | ||
*/ | ||
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/* LED index values for use with board_userled() */ | ||
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#define BOARD_LED_R 0 | ||
#define BOARD_LED_G 1 | ||
#define BOARD_LED_B 2 | ||
#define BOARD_NLEDS 3 | ||
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/* LED bits for use with board_userled_all() */ | ||
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#define BOARD_LED_R_BIT (1 << BOARD_LED_R) | ||
#define BOARD_LED_G_BIT (1 << BOARD_LED_G) | ||
#define BOARD_LED_B_BIT (1 << BOARD_LED_B) | ||
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/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LEDs on board | ||
* the RDDRONE-UAVCAN146. The following definitions describe how NuttX | ||
* controls the LEDs: | ||
* | ||
* SYMBOL Meaning LED state | ||
* RED GREEN BLUE | ||
* ------------------- ---------------------------- ----------------- | ||
*/ | ||
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#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */ | ||
#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */ | ||
#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */ | ||
#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */ | ||
#define LED_INIRQ 0 /* In an interrupt (no change) */ | ||
#define LED_SIGNAL 0 /* In a signal handler (no change) */ | ||
#define LED_ASSERTION 0 /* An assertion failed (no change) */ | ||
#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */ | ||
#undef LED_IDLE /* RDDRONE-UAVCAN146 in sleep mode (Not used) */ | ||
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/* Button definitions *******************************************************/ | ||
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/* The RDDRONE-UAVCAN146 supports two buttons: | ||
* | ||
* SW2 PTC12 | ||
* SW3 PTC13 | ||
*/ | ||
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#define BUTTON_SW2 0 | ||
#define BUTTON_SW3 1 | ||
#define NUM_BUTTONS 2 | ||
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#define BUTTON_SW2_BIT (1 << BUTTON_SW2) | ||
#define BUTTON_SW3_BIT (1 << BUTTON_SW3) | ||
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/* Alternate function pin selections ****************************************/ | ||
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/* By default, the serial console will be provided on the OpenSDA VCOM port: | ||
* | ||
* OpenSDA UART TX PTC7 (LPUART1_TX) | ||
* OpenSDA UART RX PTC6 (LPUART1_RX) | ||
*/ | ||
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#define PIN_LPUART0_CTS PIN_LPUART0_CTS_2 /* PTC8 */ | ||
#define PIN_LPUART0_RTS PIN_LPUART0_RTS_2 /* PTC9 */ | ||
#define PIN_LPUART0_RX PIN_LPUART0_RX_1 /* PTB0 */ | ||
#define PIN_LPUART0_TX PIN_LPUART0_TX_1 /* PTB1 */ | ||
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#define PIN_LPUART1_RX PIN_LPUART1_RX_1 /* PTC6 */ | ||
#define PIN_LPUART1_TX PIN_LPUART1_TX_1 /* PTC7 */ | ||
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/* SPI selections ***********************************************************/ | ||
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#define PIN_LPSPI0_SCK PIN_LPSPI0_SCK_2 /* PTB2 */ | ||
#define PIN_LPSPI0_MISO PIN_LPSPI0_SIN_2 /* PTB3 */ | ||
#define PIN_LPSPI0_MOSI PIN_LPSPI0_SOUT_3 /* PTB4 */ | ||
#define PIN_LPSPI0_PCS PIN_LPSPI0_PCS0_2 /* PTB5 */ | ||
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/* I2C selections ***********************************************************/ | ||
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#define PIN_LPI2C0_SCL PIN_LPI2C0_SCL_2 /* PTA3 */ | ||
#define PIN_LPI2C0_SDA PIN_LPI2C0_SDA_2 /* PTA2 */ | ||
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#endif /* __BOARDS_ARM_RDDRONE_UAVCAN146_INCLUDE_BOARD_H */ |
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# | ||
# This file is autogenerated: PLEASE DO NOT EDIT IT. | ||
# | ||
# You can use "make menuconfig" to make any modifications to the installed .config file. | ||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your | ||
# modifications. | ||
# | ||
# CONFIG_ARCH_FPU is not set | ||
# CONFIG_NSH_ARGCAT is not set | ||
# CONFIG_NSH_CMDOPT_HEXDUMP is not set | ||
# CONFIG_NSH_CMDPARMS is not set | ||
CONFIG_ARCH="arm" | ||
CONFIG_ARCH_BOARD_CUSTOM=y | ||
CONFIG_ARCH_BOARD_CUSTOM_DIR="../nuttx-config" | ||
CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y | ||
CONFIG_ARCH_BOARD_CUSTOM_NAME="px4" | ||
CONFIG_ARCH_CHIP="s32k1xx" | ||
CONFIG_ARCH_CHIP_S32K146=y | ||
CONFIG_ARCH_CHIP_S32K14X=y | ||
CONFIG_ARCH_CHIP_S32K1XX=y | ||
CONFIG_ARCH_STACKDUMP=y | ||
CONFIG_BOARDCTL_RESET=y | ||
CONFIG_BOARD_LOOPSPERMSEC=3997 | ||
CONFIG_BUILTIN=y | ||
CONFIG_DEBUG_SYMBOLS=y | ||
CONFIG_EXAMPLES_HELLO=y | ||
CONFIG_FS_PROCFS=y | ||
CONFIG_HAVE_CXX=y | ||
CONFIG_HAVE_CXXINITIALIZE=y | ||
CONFIG_I2C=y | ||
CONFIG_I2CTOOL_DEFFREQ=100000 | ||
CONFIG_I2CTOOL_MAXADDR=0x7f | ||
CONFIG_I2CTOOL_MAXBUS=0 | ||
CONFIG_I2CTOOL_MINADDR=0x00 | ||
CONFIG_INTELHEX_BINARY=y | ||
CONFIG_LPUART0_RXBUFSIZE=64 | ||
CONFIG_LPUART0_TXBUFSIZE=64 | ||
CONFIG_LPUART1_RXBUFSIZE=64 | ||
CONFIG_LPUART1_SERIAL_CONSOLE=y | ||
CONFIG_LPUART1_TXBUFSIZE=64 | ||
CONFIG_MAX_TASKS=16 | ||
CONFIG_MAX_WDOGPARMS=2 | ||
CONFIG_MOTOROLA_SREC=y | ||
CONFIG_NFILE_DESCRIPTORS=8 | ||
CONFIG_NFILE_STREAMS=8 | ||
CONFIG_NSH_ARCHINIT=y | ||
CONFIG_NSH_BUILTIN_APPS=y | ||
CONFIG_NSH_FILEIOSIZE=512 | ||
CONFIG_NSH_READLINE=y | ||
CONFIG_PREALLOC_MQ_MSGS=4 | ||
CONFIG_PREALLOC_TIMERS=4 | ||
CONFIG_PREALLOC_WDOGS=16 | ||
CONFIG_RAM_SIZE=126976 | ||
CONFIG_RAM_START=0x1fff0000 | ||
CONFIG_RAW_BINARY=y | ||
CONFIG_RR_INTERVAL=200 | ||
CONFIG_S32K1XX_LPI2C0=y | ||
CONFIG_S32K1XX_LPSPI0=y | ||
CONFIG_S32K1XX_LPUART0=y | ||
CONFIG_S32K1XX_LPUART1=y | ||
CONFIG_SCHED_WAITPID=y | ||
CONFIG_SDCLONE_DISABLE=y | ||
CONFIG_SPITOOL_DEFFREQ=400000 | ||
CONFIG_SPITOOL_MAXBUS=0 | ||
CONFIG_SPITOOL_PROGNAME="spi" | ||
CONFIG_START_DAY=18 | ||
CONFIG_START_MONTH=8 | ||
CONFIG_START_YEAR=2019 | ||
CONFIG_STDIO_DISABLE_BUFFERING=y | ||
CONFIG_SYMTAB_ORDEREDBYNAME=y | ||
CONFIG_SYSTEM_I2CTOOL=y | ||
CONFIG_SYSTEM_NSH=y | ||
CONFIG_SYSTEM_SPITOOL=y | ||
CONFIG_USER_ENTRYPOINT="nsh_main" |
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58
boards/nxp/rddrone-uavcan146/nuttx-config/scripts/s32k146.cfg
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# | ||
# NXP S32K146 - 1x ARM Cortex-M4 @ up to 180 MHz | ||
# | ||
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adapter_khz 4000 | ||
transport select swd | ||
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if { [info exists CHIPNAME] } { | ||
set _CHIPNAME $CHIPNAME | ||
} else { | ||
set _CHIPNAME s32k146 | ||
} | ||
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# | ||
# M4 JTAG mode TAP | ||
# | ||
if { [info exists M4_JTAG_TAPID] } { | ||
set _M4_JTAG_TAPID $M4_JTAG_TAPID | ||
} else { | ||
set _M4_JTAG_TAPID 0x4ba00477 | ||
} | ||
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# | ||
# M4 SWD mode TAP | ||
# | ||
if { [info exists M4_SWD_TAPID] } { | ||
set _M4_SWD_TAPID $M4_SWD_TAPID | ||
} else { | ||
set _M4_SWD_TAPID 0x2ba01477 | ||
} | ||
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source [find target/swj-dp.tcl] | ||
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if { [using_jtag] } { | ||
set _M4_TAPID $_M4_JTAG_TAPID | ||
} else { | ||
set _M4_TAPID $_M4_SWD_TAPID | ||
} | ||
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swj_newdap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf \ | ||
-expected-id $_M4_TAPID | ||
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target create $_CHIPNAME.m4 cortex_m -chain-position $_CHIPNAME.m4 | ||
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# S32K146 has 64+60 KB contiguous SRAM | ||
if { [info exists WORKAREASIZE] } { | ||
set _WORKAREASIZE $WORKAREASIZE | ||
} else { | ||
set _WORKAREASIZE 0x1F000 | ||
} | ||
$_CHIPNAME.m4 configure -work-area-phys 0x1FFF0000 \ | ||
-work-area-size $_WORKAREASIZE -work-area-backup 0 | ||
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$_CHIPNAME.m4 configure -rtos nuttx | ||
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if { ![using_hla] } { | ||
cortex_m reset_config vectreset | ||
} |
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