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include bare bone spm routine #351

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include bare bone spm routine #351

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agsb
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@agsb agsb commented Jul 21, 2022

This include a minimal bare bones spm routine, for non arduino and assembler gcc programs.
Uses r0:r1, r30:r31, as default, and r24:r25 as command and sreg holder.
Only does spm, wait and return. Only. Could be selected instead do_spm.

@WestfW
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WestfW commented Jul 21, 2022

Why?
Effectively, it can only be used from ASM, due to register use.
It's not significantly shorter than the existing code, except for the missing re-enable of RWWSRE, which is pretty important.

@agsb
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agsb commented Jul 22, 2022

Exact, as just an alternative of do_spm for use in ASM, and left to user do the tricks.

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agsb commented Oct 17, 2022

Thanks ! Your modification for _boot_rww_enable_short() solves my request in a much wise form.

// Reenable read access to flash
__boot_rww_enable_short();
7fd2:	87 bf       	out	0x37, r24	; 55
7fd4:	e8 95       	spm
7fd6:	08 95       	ret

@mcuee
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mcuee commented Dec 20, 2022

In this case, this PR can be closed.

https://github.com/Optiboot/optiboot/blob/master/optiboot/bootloaders/optiboot/boot_opt.h#L72-L82

#define __boot_rww_enable_short()                \
(__extension__({                                 \
    __asm__ __volatile__                         \
    (                                            \
        "__wr_spmcsr %0, %1\n\t"                 \
        "spm\n\t"                                \
        :                                        \
        : "i" (_SFR_MEM_ADDR(__SPM_REG)),         \
          "r" ((uint8_t)__BOOT_RWW_ENABLE)       \
    );                                           \
}))

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3 participants