Sync to V3.01.009

Library/Device/Nuvoton/NUC121/Source/ARM/LDROM.sct

@@ -2,16 +2,16 @@
 ; *** Scatter-Loading Description File generated by uVision ***
 ; *************************************************************
 
-LR_IROM 0x00000000 0x00001200  {    ; load region size_region
-	ER_IROM 0x00000000 0x00001200  {  ; load address = execution address
+LR_IROM 0x00100000 0x00001200  {    ; load region size_region
+	ER_IROM 0x00100000 0x00001200  {  ; load address = execution address
 		startup_NUC121.o (RESET, +First)
 		*(InRoot$$Sections)
 		system_NUC121.o
 		.ANY (+RO)
 		.ANY (+XO)
 	}
 
-	RW_IRAM 0x20000000 0x00004000  {  ; RW data
+	RW_IRAM 0x20000000 0x00002000  {  ; RW data
 		.ANY (+RW +ZI)
 	}
 }

Library/Device/Nuvoton/NUC121/Source/IAR/LDROM.icf

@@ -2,12 +2,12 @@
 /*-Editor annotation file-*/
 /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
 /*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x00000000;
+define symbol __ICFEDIT_intvec_start__ = 0x00100000;
 /*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
+define symbol __ICFEDIT_region_ROM_start__ = 0x00100000;
 define symbol __ICFEDIT_region_ROM_end__   = 0x00001200;
 define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20004000;
+define symbol __ICFEDIT_region_RAM_end__   = 0x20002000;
 /*-Sizes-*/
 define symbol __ICFEDIT_size_cstack__ = 0x400;
 define symbol __ICFEDIT_size_heap__   = 0x0;

Library/StdDriver/inc/clk.h

@@ -376,27 +376,6 @@ __STATIC_INLINE uint32_t CLK_GetPLLClockFreq(void)
     return u32PllFreq;
 }
 
-/**
-  * @brief      This function execute delay function.
-  * @param[in]  us  Delay time. The Max value is 2^24 / CPU Clock(MHz). Ex:
-  *                             50MHz => 335544us, 48MHz => 349525us, 28MHz => 699050us ...
-  * @details    Use the SysTick to generate the delay time and the UNIT is in us.
-  *             The SysTick clock source is from HCLK, i.e the same as system core clock.
-  *             User can use SystemCoreClockUpdate() to calculate CyclesPerUs automatically before using this function.
-  */
-__STATIC_INLINE void CLK_SysTickDelay(uint32_t us)
-{
-    SysTick->LOAD = us * CyclesPerUs;
-    SysTick->VAL  = (0x00);
-    SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;
-
-    /* Waiting for down-count to zero */
-    while ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == 0);
-
-    /* Disable SysTick counter */
-    SysTick->CTRL = 0;
-}
-
 void CLK_DisableCKO(void);
 void CLK_EnableCKO(uint32_t u32ClkSrc, uint32_t u32ClkDiv, uint32_t u32ClkDivBy1En);
 void CLK_PowerDown(void);
@@ -420,7 +399,7 @@ void CLK_DisablePLL(void);
 uint32_t CLK_WaitClockReady(uint32_t u32ClkMask);
 void CLK_EnableSysTick(uint32_t u32ClkSrc, uint32_t u32Count);
 void CLK_DisableSysTick(void);
-
+void CLK_SysTickDelay(uint32_t us);
 
 
 

Library/StdDriver/inc/usbd.h

@@ -14,15 +14,6 @@ extern "C"
 {
 #endif
 
-
-/*!<    Define it to enable Link Power Management(LPM) function.
-        LPM related handler will raise after LPM event happen.
-        if bcdUSB >= 0x0201, USB version is equal or higher than 2.1,
-        OS(Windows) will issue "get BOS descriptor" request.
-        WIN8 ~ WIN10 will not recognize the device if device stalls the request.
-        The device can be recognized on WIN7 even though the "get BOS request" been stalled.  */
-//#define SUPPORT_LPM
-
 /** @addtogroup Standard_Driver Standard Driver
   @{
 */
@@ -384,11 +375,9 @@ extern const S_USBD_INFO_T gsInfo;
   *
   * \hideinitializer
   */
-#ifdef SUPPORT_LPM
-#define USBD_GET_BUS_STATE()        ((uint32_t)(USBD->ATTR & 0x300f))
-#else
+
 #define USBD_GET_BUS_STATE()        ((uint32_t)(USBD->ATTR & 0xf))
-#endif
+
 /**
   * @brief    Check cable connection state
   *

Library/StdDriver/src/bpwm.c

@@ -92,7 +92,7 @@ uint32_t BPWM_ConfigCaptureChannel(BPWM_T *bpwm, uint32_t u32ChannelNum, uint32_
 }
 
 /**
- * @brief This function Configure BPWM generator and get the nearest frequency in down counter mode
+ * @brief This function Configure BPWM generator and get the nearest frequency in up counter mode
  * @param[in] bpwm The pointer of the specified BPWM module
  *                - BPWM0 : BPWM Group 0
  *                - BPWM1 : BPWM Group 1
@@ -145,31 +145,16 @@ uint32_t BPWM_ConfigOutputChannel(BPWM_T *bpwm, uint32_t u32ChannelNum, uint32_t
     // convert to real register value
     // all channels share a prescaler
     BPWM_SET_PRESCALER(bpwm, u32ChannelNum, --u16Prescale);
-    // set BPWM to down count type
-    (bpwm)->CTL1 = BPWM_DOWN_COUNTER;
+    // set BPWM to up count type
+    (bpwm)->CTL1 = BPWM_UP_COUNTER;
 
     BPWM_SET_CNR(bpwm, u32ChannelNum, --u16CNR);
+    BPWM_SET_CMR(bpwm, u32ChannelNum, u32DutyCycle * (u16CNR + 1) / 100);
 
-    if (u32DutyCycle)
-    {
-        if (u32DutyCycle >= 100)
-            BPWM_SET_CMR(bpwm, u32ChannelNum, u16CNR);
-        else
-            BPWM_SET_CMR(bpwm, u32ChannelNum, u32DutyCycle * (u16CNR + 1) / 100);
-
-        (bpwm)->WGCTL0 &= ~((BPWM_WGCTL0_PRDPCTL0_Msk | BPWM_WGCTL0_ZPCTL0_Msk) << (u32ChannelNum * 2));
-        (bpwm)->WGCTL0 |= (BPWM_OUTPUT_LOW << (u32ChannelNum * 2 + BPWM_WGCTL0_PRDPCTL0_Pos));
-        (bpwm)->WGCTL1 &= ~((BPWM_WGCTL1_CMPDCTL0_Msk | BPWM_WGCTL1_CMPUCTL0_Msk) << (u32ChannelNum * 2));
-        (bpwm)->WGCTL1 |= (BPWM_OUTPUT_HIGH << (u32ChannelNum * 2 + BPWM_WGCTL1_CMPDCTL0_Pos));
-    }
-    else
-    {
-        BPWM_SET_CMR(bpwm, u32ChannelNum, 0);
-        (bpwm)->WGCTL0 &= ~((BPWM_WGCTL0_PRDPCTL0_Msk | BPWM_WGCTL0_ZPCTL0_Msk) << (u32ChannelNum * 2));
-        (bpwm)->WGCTL0 |= (BPWM_OUTPUT_LOW << (u32ChannelNum * 2 + BPWM_WGCTL0_ZPCTL0_Pos));
-        (bpwm)->WGCTL1 &= ~((BPWM_WGCTL1_CMPDCTL0_Msk | BPWM_WGCTL1_CMPUCTL0_Msk) << (u32ChannelNum * 2));
-        (bpwm)->WGCTL1 |= (BPWM_OUTPUT_HIGH << (u32ChannelNum * 2 + BPWM_WGCTL1_CMPDCTL0_Pos));
-    }
+    (bpwm)->WGCTL0 = ((bpwm)->WGCTL0 & ~((BPWM_WGCTL0_PRDPCTL0_Msk | BPWM_WGCTL0_ZPCTL0_Msk) << (u32ChannelNum << 1))) | \
+                     (BPWM_OUTPUT_HIGH << (u32ChannelNum << 1UL << BPWM_WGCTL0_ZPCTL0_Pos));
+    (bpwm)->WGCTL1 = ((bpwm)->WGCTL1 & ~((BPWM_WGCTL1_CMPDCTL0_Msk | BPWM_WGCTL1_CMPUCTL0_Msk) << (u32ChannelNum << 1))) | \
+                     (BPWM_OUTPUT_LOW << (u32ChannelNum << 1UL << BPWM_WGCTL1_CMPUCTL0_Pos));
 
     return (i);
 }

Library/StdDriver/src/clk.c

@@ -87,6 +87,9 @@ void CLK_PowerDown(void)
     /* Chip enter Power-down mode after CPU run WFI instruction */
     __WFI();
 
+    /* Clear deep sleep mode selection */
+    SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
+
     /* Restore HIRC control register */
     SYS->IRCTCTL = u32HIRCTRIMCTL;
 }
@@ -736,7 +739,78 @@ void CLK_DisableSysTick(void)
     SysTick->CTRL = 0;
 }
 
+/**
+  * @brief      This function execute delay function.
+  * @param[in]  us  Delay time. The Max value is 2^24 / CPU Clock(MHz). Ex:
+  *                             50MHz => 335544us, 48MHz => 349525us, 28MHz => 699050us ...
+  * @details    Use the SysTick to generate the delay time and the UNIT is in us.
+  *             The SysTick clock source is from HCLK, i.e the same as system core clock.
+  *             User can use SystemCoreClockUpdate() to calculate CyclesPerUs automatically before using this function.
+  */
+void CLK_SysTickDelay(uint32_t us)
+{
+    uint32_t u32TargetValue, u32TargetInt, u32TargetRem, u32DelayCycles;
+
+    /* Systick function is using and clock source is core clock */
+    if ((SysTick->CTRL & (SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk)) == (SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk))
+    {
+        u32DelayCycles = us * CyclesPerUs;
+
+        if (u32DelayCycles > SysTick->LOAD)
+        {
+            /* Calculate re-load cycles with current SysTick->LOAD */
+            u32TargetInt = u32DelayCycles / SysTick->LOAD;
+
+            /* Calculate remainder delay cycles */
+            u32TargetRem = u32DelayCycles % SysTick->LOAD;
+        }
+        else
+        {
+            u32TargetInt = 0;
+            u32TargetRem = u32DelayCycles;
+        }
+
+        if (u32TargetRem > SysTick->VAL)
+        {
+            u32TargetValue = SysTick->LOAD;
+            u32TargetValue = u32TargetValue - (u32TargetRem - SysTick->VAL);
+            u32TargetInt++;
+        }
+        else
+        {
+            u32TargetValue = SysTick->VAL - u32TargetRem;
+        }
 
+        while (u32TargetInt > 0)
+        {
+            /* Waiting for down-count to zero */
+            while ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == 0UL)
+            {
+            }
+
+            u32TargetInt--;
+        }
+
+        /* Waiting for down-count to target */
+        while (SysTick->VAL > u32TargetValue)
+        {
+        }
+    }
+    else
+    {
+        SysTick->LOAD = us * CyclesPerUs;
+        SysTick->VAL  = 0x0UL;
+        SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;
+
+        /* Waiting for down-count to zero */
+        while ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == 0UL)
+        {
+        }
+
+        /* Disable SysTick counter */
+        SysTick->CTRL = 0UL;
+    }
+}
 
 
 /** @} end of group CLK_EXPORTED_FUNCTIONS */

Library/StdDriver/src/pwm.c

@@ -91,7 +91,7 @@ uint32_t PWM_ConfigCaptureChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u
 }
 
 /**
- * @brief This function Configure PWM generator and get the nearest frequency in edge aligned auto-reload mode
+ * @brief This function Configure PWM generator and get the nearest frequency in up count type auto-reload mode
  * @param[in] pwm The pointer of the specified PWM module
  *                - PWM0 : PWM Group 0
  *                - PWM1 : PWM Group 1
@@ -144,31 +144,16 @@ uint32_t PWM_ConfigOutputChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u3
     // convert to real register value
     // every two channels share a prescaler
     PWM_SET_PRESCALER(pwm, u32ChannelNum, --u16Prescale);
-    // set PWM to down count type(edge aligned)
-    (pwm)->CTL1 = ((pwm)->CTL1 & ~(PWM_CTL1_CNTTYPE0_Msk << ((u32ChannelNum >> 1) << 2))) | (1UL << ((u32ChannelNum >> 1) << 2));
+    // set PWM to up count type
+    (pwm)->CTL1 = ((pwm)->CTL1 & ~(PWM_CTL1_CNTTYPE0_Msk << ((u32ChannelNum >> 1) << 2)));
 
     PWM_SET_CNR(pwm, u32ChannelNum, --u16CNR);
+    PWM_SET_CMR(pwm, u32ChannelNum, u32DutyCycle * (u16CNR + 1) / 100);
 
-    if (u32DutyCycle)
-    {
-        if (u32DutyCycle >= 100)
-            PWM_SET_CMR(pwm, u32ChannelNum, u16CNR);
-        else
-            PWM_SET_CMR(pwm, u32ChannelNum, u32DutyCycle * (u16CNR + 1) / 100);
-
-        (pwm)->WGCTL0 &= ~((PWM_WGCTL0_PRDPCTL0_Msk | PWM_WGCTL0_ZPCTL0_Msk) << (u32ChannelNum * 2));
-        (pwm)->WGCTL0 |= (PWM_OUTPUT_LOW << (u32ChannelNum * 2 + PWM_WGCTL0_PRDPCTL0_Pos));
-        (pwm)->WGCTL1 &= ~((PWM_WGCTL1_CMPDCTL0_Msk | PWM_WGCTL1_CMPUCTL0_Msk) << (u32ChannelNum * 2));
-        (pwm)->WGCTL1 |= (PWM_OUTPUT_HIGH << (u32ChannelNum * 2 + PWM_WGCTL1_CMPDCTL0_Pos));
-    }
-    else
-    {
-        PWM_SET_CMR(pwm, u32ChannelNum, 0);
-        (pwm)->WGCTL0 &= ~((PWM_WGCTL0_PRDPCTL0_Msk | PWM_WGCTL0_ZPCTL0_Msk) << (u32ChannelNum * 2));
-        (pwm)->WGCTL0 |= (PWM_OUTPUT_LOW << (u32ChannelNum * 2 + PWM_WGCTL0_ZPCTL0_Pos));
-        (pwm)->WGCTL1 &= ~((PWM_WGCTL1_CMPDCTL0_Msk | PWM_WGCTL1_CMPUCTL0_Msk) << (u32ChannelNum * 2));
-        (pwm)->WGCTL1 |= (PWM_OUTPUT_HIGH << (u32ChannelNum * 2 + PWM_WGCTL1_CMPDCTL0_Pos));
-    }
+    (pwm)->WGCTL0 = ((pwm)->WGCTL0 & ~((PWM_WGCTL0_PRDPCTL0_Msk | PWM_WGCTL0_ZPCTL0_Msk) << (u32ChannelNum << 1UL))) | \
+                    ((uint32_t)PWM_OUTPUT_HIGH << ((u32ChannelNum << 1UL) + (uint32_t)PWM_WGCTL0_ZPCTL0_Pos));
+    (pwm)->WGCTL1 = ((pwm)->WGCTL1 & ~((PWM_WGCTL1_CMPDCTL0_Msk | PWM_WGCTL1_CMPUCTL0_Msk) << (u32ChannelNum << 1UL))) | \
+                    ((uint32_t)PWM_OUTPUT_LOW << ((u32ChannelNum << 1UL) + (uint32_t)PWM_WGCTL1_CMPUCTL0_Pos));
 
     return (i);
 }

Library/StdDriver/src/retarget.c

@@ -37,7 +37,7 @@ struct __FILE
 };
 #else
 #if !defined(__MICROLIB)
-    #if (__OPTIMIZE__ == -O0)
+    #if (__OPTIMIZE__ == -O0) && (__ARMCC_VERSION < 6150000)
         __asm(".global __ARM_use_no_argv\n\t" "__ARM_use_no_argv:\n\t");
     #endif /* (__OPTIMIZE__ == -O0) */
 #endif /* !defined(__MICROLIB) */

Library/StdDriver/src/usbd.c

@@ -84,12 +84,7 @@ void USBD_Open(const S_USBD_INFO_T *param, CLASS_REQ pfnClassReq, SET_INTERFACE_
     s_USBD_u32CtrlMaxPktSize = g_USBD_sINFO->gu8DevDesc[7];
 
     /* Initial USB engine */
-#ifdef SUPPORT_LPM
-    USBD->ATTR = 0x7D0 | USBD_LPMACK;
-#else
     USBD->ATTR = 0x7D0;
-#endif
-
     /* Force SE0 */
     USBD_SET_SE0();
 }