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1. RISC-V-Single-Cycle-Implementation RISC-V-Single-Cycle-Implementation Public

   This repository features a self-designed and enhanced single-cycle RISC-V processor, developed based on the Digital Design and Computer Architecture RISC-V Edition book. The project includes a comp…

   Verilog 4

2. Python-for-Everybody-Specialization Python-for-Everybody-Specialization Public

   This repository contains all the code and exercises I complete as part of the Python for Everybody course on Coursera, designed by Dr. Charles Severance

   Python 1

3. SPI_Slave_With_Single_Port_Memory SPI_Slave_With_Single_Port_Memory Public

   This repository contains the implementation of an SPI (Serial Peripheral Interface) communication protocol with sigle port sync RAM. The project includes the design and code for an SPI Slave, a sin…

   Verilog 5

4. FIFO-Verification FIFO-Verification Public

   This Repository contains the verification of a Synchronous FIFO design using SystemVerilog and SystemVerilogAssertions

   SystemVerilog 3