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Fix translation of non 32/64-bit constants
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bader committed Aug 21, 2020
1 parent 61491e0 commit de6a718
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Showing 2 changed files with 6 additions and 4 deletions.
4 changes: 1 addition & 3 deletions lib/SPIRV/libSPIRV/SPIRVValue.h
Original file line number Diff line number Diff line change
Expand Up @@ -171,9 +171,7 @@ template <spv::Op OC> class SPIRVConstantBase : public SPIRVValue {

protected:
void recalculateWordCount() {
NumWords = Type->getBitWidth() / 32;
if (NumWords < 1)
NumWords = 1;
NumWords = (Type->getBitWidth() + 31) / 32;
WordCount = 3 + NumWords;
}
void validate() const override {
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6 changes: 5 additions & 1 deletion test/capability-arbitrary-precision-integers.ll
Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,11 @@ target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:
target triple = "spir64-unknown-unknown"

; CHECK-LLVM: @a = addrspace(1) global i13 0, align 2
; CHECK-LLVM: @b = addrspace(1) global i58 0, align 8
@a = addrspace(1) global i13 0, align 2
; CHECK-LLVM: @b = addrspace(1) global i58 0, align 8
@b = addrspace(1) global i58 0, align 8
; CHECK-LLVM: @c = addrspace(1) global i48 0, align 8
@c = addrspace(1) global i48 0, align 8

; Function Attrs: noinline nounwind optnone
; CHECK-LLVM: void @_Z4funci(i30 %a)
Expand All @@ -34,5 +36,7 @@ entry:
store i30 %a, i30* %a.addr, align 4
; CHECK-LLVM: store i30 1, i30* %a.addr
store i30 1, i30* %a.addr, align 4
; CHECK-LLVM: store i48 -4294901761, i48 addrspace(1)* @c
store i48 -4294901761, i48 addrspace(1)* @c, align 8
ret void
}

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