feat(pipeline): Zero Bubble V Shape Memory Efficient Editon #357
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Motivation
重排ZBV以消除cool down阶段由于W延迟计算造成的显存累计开销。此版本与overlap grad , param以及isp overlap均兼容。
ZBV origin:
cooldown rearrange:
本版本在optimizer step不使用post validation
性能及显存
配置:internlm2-7B, micro_num=8, dp=2, pp=4, overlap sync grad.
显卡:8卡,A800
1f1b:
tgs = 2565
zbv:
tgs = 3081
精度测试
pp4:
dp2_tp2_pp4_msp:
dp2_tp2_pp4_wp2_isp_overlap
BC-breaking (Optional)
Does the modification introduce changes that break the backward compatibility of the downstream repositories?
If so, please describe how it breaks the compatibility and how the downstream projects should modify their code to keep compatibility with this PR.
Use cases (Optional)
If this PR introduces a new feature, it is better to list some use cases here and update the documentation.
Checklist
Before PR:
After PR: