Trailing whitespaces

Change-Id: Iddcb5fcada0d966915ddbcc8ea9d8feb00e75c41
IntelRealSense · Jun 6, 2019 · 271ae33 · 271ae33
1 parent 7b0abf6
commit 271ae33
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Showing 4 changed files with 4 additions and 6 deletions.
diff --git a/src/l500/l500-color.h b/src/l500/l500-color.h
@@ -37,7 +37,6 @@ namespace librealsense
         std::vector<uint8_t> get_raw_intrinsics_table() const;
         std::vector<uint8_t> get_raw_extrinsics_table() const;
     };
-
 
     class l500_color_sensor : public uvc_sensor, public video_sensor_interface
         {
@@ -53,7 +52,7 @@ namespace librealsense
                 using namespace ivcam2;
 
                 auto intrinsic = check_calib<intrinsic_rgb>(*_owner->_color_intrinsics_table_raw);
-                
+
                 auto num_of_res = intrinsic->resolution.num_of_resolutions;
 
                 for (auto i = 0; i < num_of_res; i++)

diff --git a/unit-tests/unit-tests-live.cpp b/unit-tests/unit-tests-live.cpp
@@ -5393,7 +5393,6 @@ TEST_CASE("L500 zero order sanity", "[live]") {
 
                         REQUIRE(stream_missing == stream_arrived.end());
                     }
-
                 }
             }
         }

diff --git a/unit-tests/unit-tests-post-processing-from-bag.cpp b/unit-tests/unit-tests-post-processing-from-bag.cpp
@@ -214,7 +214,7 @@ std::vector<rs2::frameset> get_composite_frames(std::vector<rs2::sensor> sensors
             frame_processor.invoke(f);
         });
     }
-    
+
     while (composite_frames.size() < sensors.size())
     {
         rs2::frameset composite_fs;
@@ -246,7 +246,7 @@ std::vector<rs2::frame> get_frames(std::vector<rs2::sensor> sensors)
             frames.push_back(f);
         });
     }
-    
+
     while (frames.size() < sensors.size())
     {
         std::this_thread::sleep_for(std::chrono::microseconds(100));

diff --git a/unit-tests/unit-tests-post-processing.cpp b/unit-tests/unit-tests-post-processing.cpp
@@ -578,7 +578,7 @@ TEST_CASE("Align Processing Block", "[live][pipeline][post-processing-filters]")
         rs2::pipeline pipe(ctx);
         rs2::config cfg;
         rs2::pipeline_profile pipe_profile;
- 
+
         REQUIRE_NOTHROW(cfg.enable_all_streams());
         REQUIRE_NOTHROW(pipe_profile = cfg.resolve(pipe));
         REQUIRE(pipe_profile);
-Original file line number
+Diff line change
@@ Expand Up / @@ -5393,7 +5393,6 @@ TEST_CASE("L500 zero order sanity", "[live]") { @@
                             REQUIRE(stream_missing == stream_arrived.end());
                         }
                     }
                 }
             }
@@ Expand Down @@