Fix atomic add case (rust-lang#685)

enzyme/Enzyme/TypeAnalysis/TypeAnalysis.cpp

@@ -2227,6 +2227,8 @@ void TypeAnalyzer::visitAtomicRMWInst(llvm::AtomicRMWInst &I) {
   }
 
   if (direction & DOWN) {
+    if (Ret[{-1}] == BaseType::Anything && LHS[{-1}] != BaseType::Anything)
+      Ret = LHS;
     if (I.getType()->isIntOrIntVectorTy() && Ret[{-1}] == BaseType::Anything) {
       if (mustRemainInteger(&I)) {
         Ret = TypeTree(BaseType::Integer).Only(-1);

enzyme/test/ActivityAnalysis/atomicadd.ll

@@ -0,0 +1,21 @@
+; RUN: %opt < %s %loadEnzyme -print-activity-analysis -activity-analysis-func=matvec -o /dev/null | FileCheck %s
+
+define void @matvec(i32* %ptr, i32 %v) {
+  %l = load i32, i32* %ptr, align 4, !tbaa !2
+  %aa = atomicrmw volatile add i32* %ptr, i32 -1 acq_rel
+  ret void
+}
+
+!llvm.module.flags = !{!0}
+!llvm.ident = !{!1}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
+!1 = !{!"clang version 7.1.0 "}
+!2 = !{!3, !3, i64 0, i64 4}
+!3 = !{!4, i64 4, !"long"}
+!4 = !{!5, i64 1, !"omnipotent char"}
+!5 = !{!"Simple C++ TBAA"}
+
+; CHECK:  %l = load i32, i32* %ptr, align 4, !tbaa !2: icv:1 ici:1
+; CHECK-NEXT:  %aa = atomicrmw volatile add i32* %ptr, i32 -1 acq_rel{{(, align 4)?}}: icv:1 ici:1
+; CHECK-NEXT:  ret void: icv:1 ici:1

enzyme/test/Enzyme/ReverseMode/subatomic.ll

@@ -0,0 +1,40 @@
+; RUN: %opt < %s %loadEnzyme -enzyme -enzyme-preopt=false -mem2reg -simplifycfg -S | FileCheck %s
+
+; ModuleID = '<source>'
+source_filename = "<source>"
+target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define internal i32 @_ZN9__gnu_cxxL18__exchange_and_addEPVii(i32* %a0, i32 %a1) {
+  %a10 = atomicrmw volatile add i32* %a0, i32 %a1 acq_rel
+  ret i32 %a10
+}
+
+define dso_local double @_Z3fooRd() {
+  %ap = alloca i32, align 8
+  %a5 = call i32 @_ZN9__gnu_cxxL18__exchange_and_addEPVii(i32* %ap, i32 -1)
+  %a7 = sitofp i32 %a5 to double
+  ret double %a7
+}
+
+define void @caller(double* %a, double* %b) {
+  %r = call double @_Z17__enzyme_autodiffPviRdS0_(i8* bitcast (double ()* @_Z3fooRd to i8*))
+  ret void
+}
+
+declare double @_Z17__enzyme_autodiffPviRdS0_(i8*)
+
+; CHECK: define internal void @diffe_Z3fooRd(double %differeturn)
+; CHECK-NEXT: invert:
+; CHECK-NEXT:   %"ap'ipa" = alloca i32, align 8
+; CHECK-NEXT:   store i32 0, i32* %"ap'ipa", align 8
+; CHECK-NEXT:   %ap = alloca i32, align 8
+; CHECK-NEXT:   call void @diffe_ZN9__gnu_cxxL18__exchange_and_addEPVii(i32* %ap, i32* %"ap'ipa", i32 -1)
+; CHECK-NEXT:   ret void
+; CHECK-NEXT: }
+
+; CHECK: define internal void @diffe_ZN9__gnu_cxxL18__exchange_and_addEPVii(i32* %a0, i32* %"a0'", i32 %a1)
+; CHECK-NEXT: invert:
+; CHECK-NEXT:   %a10 = atomicrmw volatile add i32* %a0, i32 %a1 acq_rel
+; CHECK-NEXT:   ret void
+; CHECK-NEXT: }