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Add stage-1 emulator w/o truncation (cms-sw#110)
* Add stage1 emulator w/o truncation * First round of cleanup * Further cleanup * code format+code checks * Adding rotatedphi function to HGCalTriggerTools * Remove duplicate file * Better col/chn/frame packing and add module dependence to dummy mapping * Code checks and code format * Renaming rotatedphi function * Fix number of bits for frame and channel * Set latestfw back to truncationfw for now
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26 changes: 26 additions & 0 deletions
26
L1Trigger/L1THGCal/interface/backend/HGCalBackendLayer1ProcessorPhiOrderFw.h
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#ifndef __L1Trigger_L1THGCal_HGCalBackendLayer1ProcessorPhiOrderFw_h__ | ||
#define __L1Trigger_L1THGCal_HGCalBackendLayer1ProcessorPhiOrderFw_h__ | ||
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#include "L1Trigger/L1THGCal/interface/HGCalProcessorBase.h" | ||
#include "L1Trigger/L1THGCal/interface/HGCalAlgoWrapperBase.h" | ||
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#include "DataFormats/L1THGCal/interface/HGCalTriggerCell.h" | ||
#include "DataFormats/L1THGCal/interface/HGCalCluster.h" | ||
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#include "L1Trigger/L1THGCal/interface/backend_emulator/HGCalLayer1PhiOrderFwImpl.h" | ||
#include "L1Trigger/L1THGCal/interface/backend/HGCalClusteringDummyImpl.h" | ||
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class HGCalBackendLayer1ProcessorPhiOrderFw : public HGCalBackendLayer1ProcessorBase { | ||
public: | ||
HGCalBackendLayer1ProcessorPhiOrderFw(const edm::ParameterSet& conf); | ||
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void run(const std::pair<uint32_t, std::vector<edm::Ptr<l1t::HGCalTriggerCell>>>& fpga_id_tcs, | ||
l1t::HGCalClusterBxCollection& clusters) override; | ||
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private: | ||
std::unique_ptr<HGCalClusteringDummyImpl> clusteringDummy_; | ||
std::unique_ptr<HGCalLayer1PhiOrderWrapperBase> PhiOrderWrapper_; | ||
const edm::ParameterSet conf_; | ||
}; | ||
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#endif |
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L1Trigger/L1THGCal/interface/backend_emulator/HGCalLayer1PhiOrderFwConfig.h
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#ifndef __L1Trigger_L1THGCal_HGCalLayer1PhiOrderFwConfig_h__ | ||
#define __L1Trigger_L1THGCal_HGCalLayer1PhiOrderFwConfig_h__ | ||
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#include <vector> | ||
#include <cstdint> // uint32_t | ||
#include <unordered_map> | ||
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namespace l1thgcfirmware { | ||
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class HGCalLayer1PhiOrderFwConfig { | ||
public: | ||
HGCalLayer1PhiOrderFwConfig() {} | ||
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void setSector120(const unsigned sector) { sector120_ = sector; } | ||
void setFPGAID(const uint32_t fpga_id) { fpga_id_ = fpga_id; } | ||
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void | ||
configureMappingInfo() { //creates a map between column number and a vector of pairs containing the available (channel,frame) combinations. Each frame accepts 4 TCs, so each (channel,frame) combination appears 4 times in the vector. We could optionally add a unique "slot" index to this vector, but it is not strictly necessary. The function also creates a vector of pairs between column number and number of TCs the column can accept. | ||
for (unsigned i = 0; i < 20; ++i) { | ||
//std::pair<unsigned, int> mod_col_pair = std::make_pair(dummyModId_,i);// | ||
for (unsigned j = 0; j < 2; ++j) { | ||
for (unsigned k = 0; k < 4; ++k) { //number of slots per frame | ||
chn_frame_slots_per_mod_and_col_[dummyModId_][i].push_back(std::make_pair(i + 3, j)); | ||
} | ||
for (unsigned k = 0; k < 4; ++k) { //number of slots per frame | ||
chn_frame_slots_per_mod_and_col_[dummyModId_][i].push_back(std::make_pair(i + 4, j)); | ||
} | ||
} | ||
max_tcs_per_module_and_column_[dummyModId_].push_back( | ||
std::make_pair(i, chn_frame_slots_per_mod_and_col_[dummyModId_][i].size())); | ||
} | ||
} | ||
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unsigned phiSector() const { return sector120_; } | ||
uint32_t fpgaID() const { return fpga_id_; } | ||
unsigned getColBudgetAtIndex(unsigned moduleId, unsigned theColumnIndex) const { | ||
return max_tcs_per_module_and_column_.at(dummyModId_).at(theColumnIndex).second; | ||
} //Get TC budget for column at index theColumnIndex in the vector | ||
int getColFromBudgetMapAtIndex(unsigned moduleId, unsigned theColumnIndex) const { | ||
return max_tcs_per_module_and_column_.at(dummyModId_).at(theColumnIndex).first; | ||
} //Get column number at index theColumnIndex in the vector | ||
unsigned getChannelAtIndex(unsigned moduleId, int theColumn, unsigned theChnFrameIndex) const { | ||
return chn_frame_slots_per_mod_and_col_.at(dummyModId_).at(theColumn).at(theChnFrameIndex).first; | ||
} //Extract channel number for colnr theColumn, at given channel+frame index in the vector | ||
unsigned getFrameAtIndex(unsigned moduleId, int theColumn, unsigned theChnFrameIndex) const { | ||
return chn_frame_slots_per_mod_and_col_.at(dummyModId_).at(theColumn).at(theChnFrameIndex).second; | ||
} //Extract frame number for colnr theColumn, at given channel+frame index in the vector | ||
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private: | ||
unsigned sector120_; | ||
uint32_t fpga_id_; | ||
std::unordered_map<unsigned, std::vector<std::pair<int, unsigned>>> max_tcs_per_module_and_column_; | ||
std::unordered_map<unsigned, std::unordered_map<int, std::vector<std::pair<unsigned, unsigned>>>> | ||
chn_frame_slots_per_mod_and_col_; | ||
const uint32_t dummyModId_ = 1879048191; // Just to avoid filling maps for random module ID values. Temporary!! | ||
}; | ||
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} // namespace l1thgcfirmware | ||
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#endif |
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L1Trigger/L1THGCal/interface/backend_emulator/HGCalLayer1PhiOrderFwImpl.h
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#ifndef __L1Trigger_L1THGCal_HGCalLayer1PhiOrderFwImpl_h__ | ||
#define __L1Trigger_L1THGCal_HGCalLayer1PhiOrderFwImpl_h__ | ||
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#include "L1Trigger/L1THGCal/interface/backend_emulator/HGCalTriggerCell_SA.h" | ||
#include "L1Trigger/L1THGCal/interface/backend_emulator/HGCalLayer1PhiOrderFwConfig.h" | ||
#include "L1Trigger/L1THGCal/interface/backend_emulator/BatcherSorter.h" | ||
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#include <vector> | ||
#include <cstdint> // uint32_t, unsigned | ||
#include <unordered_map> // std::unordered_map | ||
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namespace l1thgcfirmware { | ||
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class HGCalLayer1PhiOrderFwImpl { | ||
public: | ||
HGCalLayer1PhiOrderFwImpl(); | ||
~HGCalLayer1PhiOrderFwImpl() {} | ||
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void runAlgorithm() const; | ||
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unsigned run(const l1thgcfirmware::HGCalTriggerCellSACollection& tcs_in, | ||
const l1thgcfirmware::HGCalLayer1PhiOrderFwConfig& theConf, | ||
l1thgcfirmware::HGCalTriggerCellSACollection& tcs_out) const; | ||
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private: | ||
const int columnMask_ = 0x1F; //5 bits | ||
const int columnOffset_ = 11; //7 bits frame, 4 bits channel | ||
const int channelMask_ = 0xF; //4 bits for channel | ||
const int channelOffset_ = 7; //Frame has 7 bits (to fit 108 frames) | ||
const int frameMask_ = 0x7F; //7 bits for frame | ||
const int frameOffset_ = 0; | ||
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int packColChnFrame(int column, unsigned channel, unsigned frame) const; | ||
void unpackColChnFrame(int packedbin, int& column, unsigned& channel, unsigned& frame) const; | ||
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std::vector<std::pair<l1thgcfirmware::HGCalTriggerCell, int>> assignTCToCol( | ||
const l1thgcfirmware::HGCalLayer1PhiOrderFwConfig& theConf, | ||
std::vector<l1thgcfirmware::HGCalTriggerCell> tcs) const; | ||
std::vector<std::pair<l1thgcfirmware::HGCalTriggerCell, int>> assignTCToChnAndFrame( | ||
const l1thgcfirmware::HGCalLayer1PhiOrderFwConfig& theConf, | ||
std::vector<std::pair<l1thgcfirmware::HGCalTriggerCell, int>> ord_tcs) const; | ||
}; | ||
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} // namespace l1thgcfirmware | ||
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#endif |
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29 changes: 29 additions & 0 deletions
29
L1Trigger/L1THGCal/plugins/backend/HGCalBackendLayer1ProcessorPhiOrderFw.cc
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#include "L1Trigger/L1THGCal/interface/backend/HGCalBackendLayer1ProcessorPhiOrderFw.h" | ||
#include "DataFormats/ForwardDetId/interface/HGCalTriggerBackendDetId.h" | ||
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DEFINE_EDM_PLUGIN(HGCalBackendLayer1Factory, | ||
HGCalBackendLayer1ProcessorPhiOrderFw, | ||
"HGCalBackendLayer1ProcessorPhiOrderFw"); | ||
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HGCalBackendLayer1ProcessorPhiOrderFw::HGCalBackendLayer1ProcessorPhiOrderFw(const edm::ParameterSet& conf) | ||
: HGCalBackendLayer1ProcessorBase(conf), conf_(conf) { | ||
const edm::ParameterSet& PhiOrderParamConfig = conf.getParameterSet("phiorder_parameters"); | ||
const std::string& PhiOrderWrapperName = PhiOrderParamConfig.getParameter<std::string>("AlgoName"); | ||
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PhiOrderWrapper_ = std::unique_ptr<HGCalLayer1PhiOrderWrapperBase>{ | ||
HGCalLayer1PhiOrderWrapperBaseFactory::get()->create(PhiOrderWrapperName, PhiOrderParamConfig)}; | ||
} | ||
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void HGCalBackendLayer1ProcessorPhiOrderFw::run( | ||
const std::pair<uint32_t, std::vector<edm::Ptr<l1t::HGCalTriggerCell>>>& fpga_id_tcs, | ||
l1t::HGCalClusterBxCollection& clusters) { | ||
const unsigned sector120 = HGCalTriggerBackendDetId(fpga_id_tcs.first).sector(); | ||
const uint32_t fpga_id = fpga_id_tcs.first; | ||
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// Configuration | ||
const std::tuple<const HGCalTriggerGeometryBase* const, unsigned, uint32_t> configuration{ | ||
geometry(), sector120, fpga_id}; | ||
PhiOrderWrapper_->configure(configuration); | ||
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PhiOrderWrapper_->process(fpga_id_tcs.second, clusters); | ||
} |
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