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Add buffer and cache memory #1063
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…rom RAM and swap implementations
…p implementations. placed cache as second in the list as it is more similar to the RAM than any other item in the list
Thanks for this! Whenever it's ready for review, feel free to let me know.
Yeah, it might be better to leave it out through cfg flags if it'll always be a useless stat. One other comment based on the current pic is I kinda prefer to have the legends aligned, so either spacing is needed or I guess we can abbreviate "CACHE"? "CHE"? I don't know tbh. |
Will do!
It would be nice to have all entries at 3 letters, and i suppose CHE works. Also, it was mentioned that this line should perhaps be off by default to prevent cluttering the graph, do you agree? I could add it to clap |
Codecov ReportPatch coverage:
Additional details and impacted files@@ Coverage Diff @@
## master #1063 +/- ##
==========================================
- Coverage 26.44% 25.78% -0.67%
==========================================
Files 83 94 +11
Lines 14733 15492 +759
==========================================
+ Hits 3896 3994 +98
- Misses 10837 11498 +661
Flags with carried forward coverage won't be shown. Click here to find out more.
... and 22 files with indirect coverage changes Help us with your feedback. Take ten seconds to tell us how you rate us. Have a feature suggestion? Share it here. ☔ View full report in Codecov by Sentry. |
… src/data_conversion.rs convert_mem_label() to convert a single label instead of all at once
I have 2 potential versions now, both working properly, passing tests, and at least compiling for windows (using cross). The version in the master branch just has the cache line on by default, while the version in the "clap" branch it's off by default but can be enabled through the --enable-cache-memory flag. I would love to hear which is preferred! I also renamed the tag to CHE, since all the others have 3 letters as well. |
not sure how i messed that up
Sorry for getting back to you late. I think for now leaving it off by default might be fine; in the future I might make it easier to access through a config menu. |
alright, that version has been merged in, documentation has been updated, and i tested on windows in addition to linux. i don't have access to mac, so i can't really test that |
All good, will test that and get back to you. |
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Sorry for taking so long. A few nit comments and some small suggestions.
EDIT: Note that you might need to do a rebase, as there were some changes to the unit stored by MemHarvest
(it's now in bytes).
# Conflicts: # src/data_conversion.rs
well that close was unintentional, merge conflicts with the main repo happened but that's fixed now. i hope the changes are implemented satisfactorily! |
This reverts commit 72698f1.
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Just a few small nits. Otherwise, looks good to me. If you don't think these are worth changing that's also fine, just let me know and I'll approve + merge.
Also, if possible, it would be good to update the default config (sample_configs/default_config.toml
) and it's corresponding default file in the application, but I can handle that in a separate commit if you want.
Co-authored-by: Clement Tsang <34804052+ClementTsang@users.noreply.github.com>
Co-authored-by: Clement Tsang <34804052+ClementTsang@users.noreply.github.com>
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Looks good, I'll merge sometime today or tomorrow. Thanks!
@all-contributors please add @aragonnetje6 for code. |
I've put up a pull request to add @aragonnetje6! 🎉 |
Description
Added a line in the memory graph for the cache and buffer portions of memory. Not sure if this should be stacked on top of the RAM for clarity that this takes up the same space or not. Implementation mostly taken from the RAM implementation. No tests were added since the existing similar parts also do not have tests. The line will always be 0 on windows due to platform-dependent behaviour of sysinfo. perhaps it should be left out there?
Issue
Feature: Add buffer and cache memory
Closes: #533
Testing
If relevant, please state how this was tested. All changes must be tested to work:
No new tests were added as the existing memory components also have no tests. I'm willing to add these, just let me know if this is desired. All existing tests still pass, and running the program works just fine
If this is a code change, please also indicate which platforms were tested:
Checklist
If relevant, ensure the following have been met:
cargo fmt
)README.md
, help menu, doc pages, etc.)