As semiconductor technology advances, 2D and 2.5D devices have started showing limits to scaling these technologies. To keep following Moore’s law, doubling the number of transistors every two years is no longer possible with just scaling devices. We needed to find an alternative to the current scaling methods.
The transition to 3D devices offers a promising solution, and all major semiconductor manufacturing companies are now eying to develop their devices in the 3rd dimension. Among various 3D structures, GAAFETs and CFETs are two of the promising leads in solving the scaling problem. This project explores the process integration of CFET technology while trying to understand the challenges of the process flow, the difficulties of implementation of the device using current technologies, and how future technologies could make it easier to fabricate 3D devices.
This file contains the SEMulator3D implementation of the project.