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In your awesome example code, the code to get the VBR will crash on an 060 with Caches enabled because the data you specify as the instructions to execute in supervisor mode will never actually be written to ram. Its held purely on the stack (and in cache)
Please add...
CacheClearU();
immediately before
vbr = (APTR)Supervisor((ULONG (*)())getvbr);
and code will run even with 060 MMU+Caches enabled.
The text was updated successfully, but these errors were encountered:
Previously, the supervisor portion of `GetVBR` would be copied to the stack, but without then clearing caches, there would be no guarantee that the instruction cache would contain this data (it's most likely dirty in the data cache and not yet committed to memory). On my setup (060 fpu+mmu), this would consistently crash.
So, let's rewrite this code as inline asm in a function, which is cleaner (no more raw data words), avoids the unnecessary copy (to initialize a local variable which isn't actually required), and avoids an unnecessary cache clear (which would also work around the issue, but in an expensive way).
FixesBartmanAbyss#256.
In your awesome example code, the code to get the VBR will crash on an 060 with Caches enabled because the data you specify as the instructions to execute in supervisor mode will never actually be written to ram. Its held purely on the stack (and in cache)
Please add...
CacheClearU();
immediately before
vbr = (APTR)Supervisor((ULONG (*)())getvbr);
and code will run even with 060 MMU+Caches enabled.
The text was updated successfully, but these errors were encountered: