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Updated requested method aligment for xarch
Align Tier1, small and IBC hot methods to 16 byte boundaries for x64 and x86. Consensus from various folks I polled was that this isn't as helpful for arm architectures, so for now this is xarch only. This ensures that instruction prefetch pulls in as much code as possible. It should also improve performance stability in some benchmarks, as well as opening the door for possible loop-top aligment padding. Resolves #16873.
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