Debug vitis refdesign tests

Accelize · Mar 10, 2021 · 037a52c · 037a52c
1 parent 7758f77
commit 037a52c
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Showing 9 changed files with 8 additions and 4 deletions.
diff --git a/tests/refdesigns/aws_f1/2activator_axi4_2clk.json b/tests/refdesigns/aws_f1/2activator_axi4_2clk.json
@@ -0,0 +1,4 @@
+{
+    "FpgaImageId": "afi-0fbfd0b219b85d983",
+    "FpgaImageGlobalId": "agfi-0ad993c04715f5600"
+}
diff --git a/tests/refdesigns/aws_f1/2activator_axi4_swap_activator.json b/tests/refdesigns/aws_f1/2activator_axi4_swap_activator.json
@@ -1,4 +1,4 @@
 {
-    "FpgaImageId": "afi-084589cfd5f48bfa3",
-    "FpgaImageGlobalId": "agfi-0a7144ee63b72333a"
+    "FpgaImageId": "afi-0885ca9e6d29e990d",
+    "FpgaImageGlobalId": "agfi-0c4caaf6c886d8cd0"
 }
diff --git a/...aws_xrt/vitis_2activator_50_125.awsxclbin → ...ws_xrt/vitis_2activator_100_125.awsxclbin b/...aws_xrt/vitis_2activator_50_125.awsxclbin → ...ws_xrt/vitis_2activator_100_125.awsxclbin
diff --git a/tests/refdesigns/aws_xrt/vitis_2activator_125_125.awsxclbin b/tests/refdesigns/aws_xrt/vitis_2activator_125_125.awsxclbin
diff --git a/tests/refdesigns/aws_xrt/vitis_2activator_350_350.awsxclbin b/tests/refdesigns/aws_xrt/vitis_2activator_350_350.awsxclbin
diff --git a/tests/refdesigns/aws_xrt/vitis_2activator_slr_200_125.awsxclbin b/tests/refdesigns/aws_xrt/vitis_2activator_slr_200_125.awsxclbin
diff --git a/tests/refdesigns/aws_xrt/vitis_2activator_vhdl_250_125.awsxclbin b/tests/refdesigns/aws_xrt/vitis_2activator_vhdl_250_125.awsxclbin
diff --git a/tests/test_trng_quality.py b/tests/test_trng_quality.py
@@ -102,7 +102,7 @@ def check_bit_dispersion(value_list):
 
 @pytest.mark.security
 @pytest.mark.no_parallel
-@pytest.mark.second_to_last
+@pytest.mark.last
 def test_global_challenge_quality():
     print()
     value_json = {'requests' : list()}

diff --git a/tests/test_other_refdesign.py → tests/test_z_other_refdesign.py b/tests/test_other_refdesign.py → tests/test_z_other_refdesign.py
@@ -158,8 +158,8 @@ def test_refdesign(pytestconfig, conf_json, cred_json, async_handler, log_file_f
     # Return logfile handler for more specific verification
     return logfile
 
+
 @pytest.mark.no_parallel
-@pytest.mark.last
 def test_2activator_axi4_2clk(pytestconfig, conf_json, cred_json, async_handler, log_file_factory):
     """
     Test a vivado configuration: dual clock kernels