Firmware cleanup

32blit-stm32/CMakeLists.txt

@@ -39,8 +39,6 @@ list(APPEND SOURCES
 	Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_jpeg.c
 	Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_hcd.c
 	Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_ll_usb.c
-	Middlewares/Third_Party/FatFs/src/diskio.c
-	Middlewares/Third_Party/FatFs/src/ff_gen_drv.c
 	../3rd-party/fatfs/ff.c
 	../3rd-party/fatfs/ffsystem.c
 	../3rd-party/fatfs/ffunicode.c
@@ -58,8 +56,7 @@ list(APPEND SOURCES
 	Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c
 	Src/usbd_msc_scsi.c
 	Src/system_stm32h7xx.c
-	Src/user_diskio.c
-	Src/fatfs.c
+	Src/fatfs.cpp
 	Src/fatfs_sd.c
 	Src/usb_otg.c
 	Src/usb_device.c
@@ -131,7 +128,6 @@ set(INCLUDE_DIRS
 	${CMAKE_CURRENT_SOURCE_DIR}/Drivers/CMSIS/Device/ST/STM32H7xx/Include
 	${CMAKE_CURRENT_SOURCE_DIR}/Drivers/CMSIS/Include
 	${CMAKE_CURRENT_SOURCE_DIR}/Drivers/CMSIS/Include
-	${CMAKE_CURRENT_SOURCE_DIR}/Middlewares/Third_Party/FatFs/src
 	${CMAKE_CURRENT_SOURCE_DIR}/Middlewares/ST/STM32_USB_Device_Library/Core/Inc
 	${CMAKE_CURRENT_SOURCE_DIR}/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc
 	${CMAKE_CURRENT_SOURCE_DIR}/Middlewares/ST/STM32_USB_Device_Library/Class/MSC/Inc
@@ -162,9 +158,6 @@ target_include_directories(BlitHalSTM32
 target_compile_definitions(BlitHalSTM32
 	PRIVATE
 		${DEFINITIONS}
-		-DAPPLICATION_VTOR=${APPLICATION_VTOR}
-		-DEXTERNAL_LOAD_ADDRESS=${EXTERNAL_LOAD_ADDRESS}
-		-DINITIALISE_QSPI=${INITIALISE_QSPI}
     -DCDC_FIFO_BUFFERS=${CDC_FIFO_BUFFERS}
 )
 

32blit-stm32/Inc/CDCCommandStream.h

@@ -50,9 +50,9 @@ class CDCCommandStream
 
 	StreamState m_state;
 
-	uint8_t			m_header[4] = { '3', '2', 'B', 'L' };
 	uint8_t			m_uHeaderScanPos = 0;
 	uint8_t			m_uCommandScanPos = 0;
+	uint8_t			m_uRetryCount = 0;
 	CDCCommandHandler::CDCFourCC uCommand = 0;
 
 
@@ -63,9 +63,6 @@ class CDCCommandStream
 
 	CDCDataStream	m_dataStream;
 
-	uint8_t m_uRetryCount = 0;
-
-
 	CDCFifoElement m_fifoElements[CDC_FIFO_BUFFERS];
 	uint8_t				 m_uFifoReadPos;
 	uint8_t				 m_uFifoWritePos;

32blit-stm32/Inc/display.hpp

@@ -30,17 +30,6 @@ namespace display {
   SurfaceInfo &set_screen_mode(ScreenMode new_mode);
   void set_screen_palette(const Pen *colours, int num_cols);
   bool set_screen_mode_format(ScreenMode new_mode, SurfaceTemplate &new_surf_template);
-
-  void flip(const Surface &source);
-
-  void screen_init();
-  void ltdc_init();
-
-  uint32_t get_dma2d_count(void);
-
-  void dma2d_lores_flip_step2(void);
-  void dma2d_lores_flip_step3(void);
-  void dma2d_lores_flip_step4(void);
 }
 
 

32blit-stm32/Inc/gpio.hpp

@@ -1,15 +1,27 @@
 #ifndef __PIN_CONFIGURATION_H
 #define __PIN_CONFIGURATION_H
 
+#include <cstdint>
+
 #include "main.h"
 #include "gpio_defs.h"
 
 namespace gpio {
 
-  // initialises all of the pins of the MCU into the correct 
-  // configuration for 32blit    
+  // initialises all of the pins of the MCU into the correct
+  // configuration for 32blit
   void init();
 
+  inline bool read(GPIO_TypeDef *port, uint16_t pins) {
+    return port->IDR & pins;
+  }
+
+  inline void write(GPIO_TypeDef *port, uint16_t pins, bool value) {
+    if(value)
+      port->BSRR = pins;
+    else
+      port->BSRR = pins << 16;
+  }
 }
 
-#endif 
+#endif

32blit-stm32/Inc/main.h

@@ -66,10 +66,7 @@ extern uint8_t charge_led_b;
 /* Private defines -----------------------------------------------------------*/
 
 /* USER CODE BEGIN Private defines */
-#define HIGH(PORT, PIN) HAL_GPIO_WritePin(PORT, PIN, GPIO_PIN_SET);
-#define LOW(PORT, PIN) HAL_GPIO_WritePin(PORT, PIN, GPIO_PIN_RESET);
 
-#define DELAY(MS)       HAL_Delay(MS)
 /* USER CODE END Private defines */
 
 #ifdef __cplusplus

32blit-stm32/Inc/quadspi.h

@@ -36,7 +36,7 @@ extern QSPI_HandleTypeDef hqspi;
 #define APPLICATION_ADDRESS                  QSPI_BASE
 
 // Flash example
-#define QSPI_FLASH_SIZE                      POSITION_VAL(0x2000000)-1
+#define QSPI_FLASH_SIZE                      __builtin_ctz(0x2000000)-1
 #define QSPI_PAGE_SIZE                       256
 
 /* Reset Operations */

32blit-stm32/Inc/quadspi.hpp

@@ -0,0 +1,9 @@
+#pragma once
+#include <cstdint>
+
+constexpr uint32_t qspi_flash_sector_size = 64 * 1024;
+constexpr uint32_t qspi_flash_size = 32768 * 1024;
+constexpr uint32_t qspi_flash_address = 0x90000000;
+
+// resevered space for temp/cached files
+constexpr uint32_t qspi_tmp_reserved = 4 * 1024 * 1024;

32blit-stm32/Inc/spi-st7272a.h

@@ -5,8 +5,11 @@
 #define ST7272A_DISPLAY_MODE_REGISTER 0x19
 #define ST7272A_DISPLAY_MODE_DEFAULT  0xec  // 0b11101100 VA Mode, Top/Bottom & Left/Right scan, Negative polarity VSync/HSync pulses
 
+#define HIGH(PORT, PIN) HAL_GPIO_WritePin(PORT, PIN, GPIO_PIN_SET);
+#define LOW(PORT, PIN) HAL_GPIO_WritePin(PORT, PIN, GPIO_PIN_RESET);
+
 #define ST7272A_CS(active)            if(active) {LOW(LCD_CS_GPIO_Port, LCD_CS_Pin)} else {HIGH(LCD_CS_GPIO_Port, LCD_CS_Pin)}
-#define ST7272A_RESET()               LOW(LCD_RESET_GPIO_Port, LCD_RESET_Pin); DELAY(100); HIGH(LCD_RESET_GPIO_Port, LCD_RESET_Pin); DELAY(100);
+#define ST7272A_RESET()               LOW(LCD_RESET_GPIO_Port, LCD_RESET_Pin); HAL_Delay(100); HIGH(LCD_RESET_GPIO_Port, LCD_RESET_Pin); HAL_Delay(100);
 
 #ifdef __cplusplus
 extern "C" {
@@ -18,4 +21,4 @@ extern void st7272a_set_bgr();
 }
 #endif
 
-#endif
+#endif