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On the use of P gate vs S gate #3

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Aerylia opened this issue Oct 14, 2024 · 1 comment
Open

On the use of P gate vs S gate #3

Aerylia opened this issue Oct 14, 2024 · 1 comment

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@Aerylia
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Aerylia commented Oct 14, 2024

On page 50 you say that the S gate is sometimes called a P gate, where P stands for phase.

In the few cases where I've seen this distinct difference with their matrix, I noticed that often P equals S up-to-global-phase. In particular, it makes a difference in the use of Controlled-S and Controlled-P (e.g. Benoit's paper on complete re-write rules for the circuit model). I didn't keep a proper account of where this occurred when I was looking into this.

I'm not sure if this is a proper convention or accidental.

@jvdwetering
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Probably in Chapter 9 we should say somewhere clearly that while global phase is not important, when you add a control, it becomes a local phase and hence becomes important.

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