diff --git a/src/Sema.zig b/src/Sema.zig index 0341c3a8d8af..633628a8e9a8 100644 --- a/src/Sema.zig +++ b/src/Sema.zig @@ -23510,7 +23510,7 @@ fn ptrCastFull( errdefer msg.destroy(sema.gpa); if (dest_info.flags.size == .Many and (src_info.flags.size == .Slice or - (src_info.flags.size == .One and Type.fromInterned(src_info.child).zigTypeTag(zcu) == .array))) + (src_info.flags.size == .One and Type.fromInterned(src_info.child).zigTypeTag(zcu) == .array))) { try sema.errNote(src, msg, "use 'ptr' field to convert slice to many pointer", .{}); } else { @@ -28508,9 +28508,9 @@ fn fieldCallBind( const first_param_type = Type.fromInterned(func_type.param_types.get(ip)[0]); if (first_param_type.isGenericPoison() or (first_param_type.zigTypeTag(zcu) == .pointer and - (first_param_type.ptrSize(zcu) == .One or - first_param_type.ptrSize(zcu) == .C) and - first_param_type.childType(zcu).eql(concrete_ty, zcu))) + (first_param_type.ptrSize(zcu) == .One or + first_param_type.ptrSize(zcu) == .C) and + first_param_type.childType(zcu).eql(concrete_ty, zcu))) { // Note that if the param type is generic poison, we know that it must // specifically be `anytype` since it's the first parameter, meaning we @@ -30089,7 +30089,7 @@ fn coerceExtra( if (dest_info.sentinel == .none or inst_info.sentinel == .none or Air.internedToRef(dest_info.sentinel) != - try sema.coerceInMemory(Value.fromInterned(inst_info.sentinel), Type.fromInterned(dest_info.child))) + try sema.coerceInMemory(Value.fromInterned(inst_info.sentinel), Type.fromInterned(dest_info.child))) break :p; const slice_ptr = try sema.analyzeSlicePtr(block, inst_src, inst, inst_ty); @@ -30923,12 +30923,12 @@ pub fn coerceInMemoryAllowed( } const ok_sent = (dest_info.sentinel == null and src_info.sentinel == null) or (src_info.sentinel != null and - dest_info.sentinel != null and - dest_info.sentinel.?.eql( - try pt.getCoerced(src_info.sentinel.?, dest_info.elem_type), - dest_info.elem_type, - zcu, - )); + dest_info.sentinel != null and + dest_info.sentinel.?.eql( + try pt.getCoerced(src_info.sentinel.?, dest_info.elem_type), + dest_info.elem_type, + zcu, + )); if (!ok_sent) { return InMemoryCoercionResult{ .array_sentinel = .{ .actual = src_info.sentinel orelse Value.@"unreachable", @@ -31341,7 +31341,7 @@ fn coerceInMemoryAllowedPtrs( const ok_sent = dest_info.sentinel == .none or src_info.flags.size == .C or (src_info.sentinel != .none and - dest_info.sentinel == try zcu.intern_pool.getCoerced(sema.gpa, pt.tid, src_info.sentinel, dest_info.child)); + dest_info.sentinel == try zcu.intern_pool.getCoerced(sema.gpa, pt.tid, src_info.sentinel, dest_info.child)); if (!ok_sent) { return InMemoryCoercionResult{ .ptr_sentinel = .{ .actual = switch (src_info.sentinel) { diff --git a/src/Type.zig b/src/Type.zig index c6feb9ddd405..3c816ab74f3b 100644 --- a/src/Type.zig +++ b/src/Type.zig @@ -614,11 +614,12 @@ pub fn hasRuntimeBitsInner( // in which case we want control flow to continue down below. if (tag_ty != .none and try Type.fromInterned(tag_ty).hasRuntimeBitsInner( - ignore_comptime_only, - strat, - zcu, - tid, - )) { + ignore_comptime_only, + strat, + zcu, + tid, + )) + { return true; } }, diff --git a/src/Zcu.zig b/src/Zcu.zig index eeff80ee3098..2222ccb29d34 100644 --- a/src/Zcu.zig +++ b/src/Zcu.zig @@ -1195,8 +1195,8 @@ pub const SrcLoc = struct { const case = tree.fullSwitchCase(case_node).?; const is_special = (case.ast.values.len == 0) or (case.ast.values.len == 1 and - node_tags[case.ast.values[0]] == .identifier and - mem.eql(u8, tree.tokenSlice(main_tokens[case.ast.values[0]]), "_")); + node_tags[case.ast.values[0]] == .identifier and + mem.eql(u8, tree.tokenSlice(main_tokens[case.ast.values[0]]), "_")); if (!is_special) continue; return tree.nodeToSpan(case_node); @@ -1215,8 +1215,8 @@ pub const SrcLoc = struct { const case = tree.fullSwitchCase(case_node).?; const is_special = (case.ast.values.len == 0) or (case.ast.values.len == 1 and - node_tags[case.ast.values[0]] == .identifier and - mem.eql(u8, tree.tokenSlice(main_tokens[case.ast.values[0]]), "_")); + node_tags[case.ast.values[0]] == .identifier and + mem.eql(u8, tree.tokenSlice(main_tokens[case.ast.values[0]]), "_")); if (is_special) continue; for (case.ast.values) |item_node| { diff --git a/src/arch/riscv64/CodeGen.zig b/src/arch/riscv64/CodeGen.zig index 5d76db0104bc..e1d3b65922f5 100644 --- a/src/arch/riscv64/CodeGen.zig +++ b/src/arch/riscv64/CodeGen.zig @@ -684,8 +684,7 @@ fn restoreState(func: *Func, state: State, deaths: []const Air.Inst.Index, compt const ExpectedContents = [@typeInfo(RegisterManager.TrackedRegisters).array.len]RegisterLock; var stack align(@max(@alignOf(ExpectedContents), @alignOf(std.heap.StackFallbackAllocator(0)))) = - if (opts.update_tracking) - {} else std.heap.stackFallback(@sizeOf(ExpectedContents), func.gpa); + if (opts.update_tracking) {} else std.heap.stackFallback(@sizeOf(ExpectedContents), func.gpa); var reg_locks = if (opts.update_tracking) {} else try std.ArrayList(RegisterLock).initCapacity( stack.get(), @@ -2305,7 +2304,7 @@ fn airIntCast(func: *Func, inst: Air.Inst.Index) !void { const dst_mcv = if (dst_int_info.bits <= src_storage_bits and math.divCeil(u16, dst_int_info.bits, 64) catch unreachable == - math.divCeil(u32, src_storage_bits, 64) catch unreachable and + math.divCeil(u32, src_storage_bits, 64) catch unreachable and func.reuseOperand(inst, ty_op.operand, 0, src_mcv)) src_mcv else dst: { const dst_mcv = try func.allocRegOrMem(dst_ty, inst, true); try func.genCopy(min_ty, dst_mcv, src_mcv); @@ -2363,9 +2362,9 @@ fn airNot(func: *Func, inst: Air.Inst.Index) !void { const dst_reg: Register = if (func.reuseOperand(inst, ty_op.operand, 0, operand) and operand == .register) - operand.register - else - (try func.allocRegOrMem(func.typeOfIndex(inst), inst, true)).register; + operand.register + else + (try func.allocRegOrMem(func.typeOfIndex(inst), inst, true)).register; switch (ty.zigTypeTag(zcu)) { .bool => { @@ -6273,11 +6272,11 @@ fn airAsm(func: *Func, inst: Air.Inst.Index) !void { const instruction: union(enum) { mnem: Mnemonic, pseudo: Pseudo } = if (std.meta.stringToEnum(Mnemonic, mnem_str)) |mnem| - .{ .mnem = mnem } - else if (std.meta.stringToEnum(Pseudo, mnem_str)) |pseudo| - .{ .pseudo = pseudo } - else - return func.fail("invalid mnem str '{s}'", .{mnem_str}); + .{ .mnem = mnem } + else if (std.meta.stringToEnum(Pseudo, mnem_str)) |pseudo| + .{ .pseudo = pseudo } + else + return func.fail("invalid mnem str '{s}'", .{mnem_str}); const Operand = union(enum) { none, diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig index 3e272a43f24d..436a25873cb0 100644 --- a/src/arch/x86_64/CodeGen.zig +++ b/src/arch/x86_64/CodeGen.zig @@ -2921,8 +2921,7 @@ fn restoreState(self: *Self, state: State, deaths: []const Air.Inst.Index, compt const ExpectedContents = [@typeInfo(RegisterManager.TrackedRegisters).array.len]RegisterLock; var stack align(@max(@alignOf(ExpectedContents), @alignOf(std.heap.StackFallbackAllocator(0)))) = - if (opts.update_tracking) - {} else std.heap.stackFallback(@sizeOf(ExpectedContents), self.gpa); + if (opts.update_tracking) {} else std.heap.stackFallback(@sizeOf(ExpectedContents), self.gpa); var reg_locks = if (opts.update_tracking) {} else try std.ArrayList(RegisterLock).initCapacity( stack.get(), @@ -3490,7 +3489,7 @@ fn airIntCast(self: *Self, inst: Air.Inst.Index) !void { const dst_mcv = if (dst_int_info.bits <= src_storage_bits and math.divCeil(u16, dst_int_info.bits, 64) catch unreachable == - math.divCeil(u32, src_storage_bits, 64) catch unreachable and + math.divCeil(u32, src_storage_bits, 64) catch unreachable and self.reuseOperand(inst, ty_op.operand, 0, src_mcv)) src_mcv else dst: { const dst_mcv = try self.allocRegOrMem(inst, true); try self.genCopy(min_ty, dst_mcv, src_mcv, .{}); @@ -5025,10 +5024,10 @@ fn genIntMulDivOpMir(self: *Self, tag: Mir.Inst.FixedTag, ty: Type, lhs: MCValue ._ => { const hi_reg: Register = switch (bit_size) { - 8 => .ah, - 16, 32, 64 => .edx, - else => unreachable, - }; + 8 => .ah, + 16, 32, 64 => .edx, + else => unreachable, + }; try self.asmRegisterRegister(.{ ._, .xor }, hi_reg, hi_reg); }, .i_ => try self.asmOpOnly(.{ ._, switch (bit_size) { @@ -9352,9 +9351,9 @@ fn genShiftBinOpMir( .size = Memory.Size.fromSize(abi_size), .disp = math.cast(i32, @as(i64, @bitCast(addr))) orelse return self.fail("TODO genShiftBinOpMir between {s} and {s}", .{ - @tagName(lhs_mcv), - @tagName(shift_mcv), - }), + @tagName(lhs_mcv), + @tagName(shift_mcv), + }), } }, }, .indirect => |reg_off| .{ @@ -10084,17 +10083,17 @@ fn genBinOp( const ordered_air: [2]Air.Inst.Ref = if (lhs_ty.isVector(zcu) and switch (lhs_ty.childType(zcu).zigTypeTag(zcu)) { - .bool => false, - .int => switch (air_tag) { - .cmp_lt, .cmp_gte => true, - else => false, - }, - .float => switch (air_tag) { - .cmp_gte, .cmp_gt => true, - else => false, - }, - else => unreachable, - }) .{ rhs_air, lhs_air } else .{ lhs_air, rhs_air }; + .bool => false, + .int => switch (air_tag) { + .cmp_lt, .cmp_gte => true, + else => false, + }, + .float => switch (air_tag) { + .cmp_gte, .cmp_gt => true, + else => false, + }, + else => unreachable, + }) .{ rhs_air, lhs_air } else .{ lhs_air, rhs_air }; if (lhs_ty.isAbiInt(zcu)) for (ordered_air) |op_air| { switch (try self.resolveInst(op_air)) { @@ -12069,13 +12068,13 @@ fn genIntMulComplexOpMir(self: *Self, dst_ty: Type, dst_mcv: MCValue, src_mcv: M .size = Memory.Size.fromSize(abi_size), .disp = math.cast(i32, @as(i64, @bitCast(addr))) orelse return self.asmRegisterRegister( - .{ .i_, .mul }, - dst_alias, - registerAlias( - try self.copyToTmpRegister(dst_ty, resolved_src_mcv), - abi_size, + .{ .i_, .mul }, + dst_alias, + registerAlias( + try self.copyToTmpRegister(dst_ty, resolved_src_mcv), + abi_size, + ), ), - ), } }, }, .indirect => |reg_off| .{ @@ -14168,9 +14167,9 @@ fn airAsm(self: *Self, inst: Air.Inst.Index) !void { mem.eql(u8, rest, "r,m") or mem.eql(u8, rest, "m,r")) self.register_manager.tryAllocReg(maybe_inst, abi.RegisterClass.gp) orelse if (output != .none) - null - else - return self.fail("ran out of registers lowering inline asm", .{}) + null + else + return self.fail("ran out of registers lowering inline asm", .{}) else if (mem.startsWith(u8, rest, "{") and mem.endsWith(u8, rest, "}")) parseRegName(rest["{".len .. rest.len - "}".len]) orelse return self.fail("invalid register constraint: '{s}'", .{constraint}) @@ -16610,9 +16609,9 @@ fn airAtomicLoad(self: *Self, inst: Air.Inst.Index) !void { const dst_mcv = if (self.reuseOperand(inst, atomic_load.ptr, 0, ptr_mcv)) - ptr_mcv - else - try self.allocRegOrMem(inst, true); + ptr_mcv + else + try self.allocRegOrMem(inst, true); try self.load(dst_mcv, ptr_ty, ptr_mcv); return self.finishAir(inst, dst_mcv, .{ atomic_load.ptr, .none, .none }); diff --git a/src/arch/x86_64/Lower.zig b/src/arch/x86_64/Lower.zig index 058201c2d7f0..55828c5926cf 100644 --- a/src/arch/x86_64/Lower.zig +++ b/src/arch/x86_64/Lower.zig @@ -418,17 +418,17 @@ fn emit(lower: *Lower, prefix: Prefix, mnemonic: Mnemonic, ops: []const Operand) _ = lower.reloc(.{ .linker_tlsld = sym_index }, 0); lower.result_insts[lower.result_insts_len] = try Instruction.new(.none, .lea, &[_]Operand{ - .{ .reg = .rdi }, - .{ .mem = Memory.initRip(mem_op.sib.ptr_size, 0) }, - }); + .{ .reg = .rdi }, + .{ .mem = Memory.initRip(mem_op.sib.ptr_size, 0) }, + }); lower.result_insts_len += 1; _ = lower.reloc(.{ .linker_extern_fn = try elf_file.getGlobalSymbol("__tls_get_addr", null), }, 0); lower.result_insts[lower.result_insts_len] = try Instruction.new(.none, .call, &[_]Operand{ - .{ .imm = Immediate.s(0) }, - }); + .{ .imm = Immediate.s(0) }, + }); lower.result_insts_len += 1; _ = lower.reloc(.{ .linker_dtpoff = sym_index }, 0); emit_mnemonic = .lea; @@ -440,9 +440,9 @@ fn emit(lower: *Lower, prefix: Prefix, mnemonic: Mnemonic, ops: []const Operand) // Since we are linking statically, we emit LE model directly. lower.result_insts[lower.result_insts_len] = try Instruction.new(.none, .mov, &[_]Operand{ - .{ .reg = .rax }, - .{ .mem = Memory.initSib(.qword, .{ .base = .{ .reg = .fs } }) }, - }); + .{ .reg = .rax }, + .{ .mem = Memory.initSib(.qword, .{ .base = .{ .reg = .fs } }) }, + }); lower.result_insts_len += 1; _ = lower.reloc(.{ .linker_reloc = sym_index }, 0); emit_mnemonic = .lea; @@ -464,9 +464,9 @@ fn emit(lower: *Lower, prefix: Prefix, mnemonic: Mnemonic, ops: []const Operand) const reg = ops[0].reg; lower.result_insts[lower.result_insts_len] = try Instruction.new(.none, .mov, &[_]Operand{ - .{ .reg = reg.to64() }, - .{ .mem = Memory.initRip(.qword, 0) }, - }); + .{ .reg = reg.to64() }, + .{ .mem = Memory.initRip(.qword, 0) }, + }); lower.result_insts_len += 1; break :op .{ .mem = Memory.initSib(mem_op.sib.ptr_size, .{ .base = .{ .reg = reg.to64(), @@ -496,14 +496,14 @@ fn emit(lower: *Lower, prefix: Prefix, mnemonic: Mnemonic, ops: []const Operand) _ = lower.reloc(.{ .linker_reloc = sym_index }, 0); lower.result_insts[lower.result_insts_len] = try Instruction.new(.none, .mov, &[_]Operand{ - .{ .reg = .rdi }, - .{ .mem = Memory.initRip(mem_op.sib.ptr_size, 0) }, - }); + .{ .reg = .rdi }, + .{ .mem = Memory.initRip(mem_op.sib.ptr_size, 0) }, + }); lower.result_insts_len += 1; lower.result_insts[lower.result_insts_len] = try Instruction.new(.none, .call, &[_]Operand{ - .{ .mem = Memory.initSib(.qword, .{ .base = .{ .reg = .rdi } }) }, - }); + .{ .mem = Memory.initSib(.qword, .{ .base = .{ .reg = .rdi } }) }, + }); lower.result_insts_len += 1; emit_mnemonic = .mov; break :op .{ .reg = .rax }; @@ -520,9 +520,9 @@ fn emit(lower: *Lower, prefix: Prefix, mnemonic: Mnemonic, ops: []const Operand) const reg = ops[0].reg; lower.result_insts[lower.result_insts_len] = try Instruction.new(.none, .mov, &[_]Operand{ - .{ .reg = reg.to64() }, - .{ .mem = Memory.initRip(.qword, 0) }, - }); + .{ .reg = reg.to64() }, + .{ .mem = Memory.initRip(.qword, 0) }, + }); lower.result_insts_len += 1; break :op .{ .mem = Memory.initSib(mem_op.sib.ptr_size, .{ .base = .{ .reg = reg.to64(), diff --git a/src/codegen.zig b/src/codegen.zig index b41fa3c2ef8c..63f96c51cb1b 100644 --- a/src/codegen.zig +++ b/src/codegen.zig @@ -452,7 +452,7 @@ pub fn generateSymbol( const padding = abi_size - (math.cast(usize, Type.fromInterned(vector_type.child).abiSize(zcu) * vector_type.len) orelse - return error.Overflow); + return error.Overflow); if (padding > 0) try code.appendNTimes(0, padding); } }, diff --git a/src/codegen/c.zig b/src/codegen/c.zig index 98c3c42deb59..27a0d69d13f7 100644 --- a/src/codegen/c.zig +++ b/src/codegen/c.zig @@ -1921,7 +1921,7 @@ pub const DeclGen = struct { if (dest_bits <= 64 and src_bits <= 64) { const needs_cast = src_int_info == null or (toCIntBits(dest_int_info.bits) != toCIntBits(src_int_info.?.bits) or - dest_int_info.signedness != src_int_info.?.signedness); + dest_int_info.signedness != src_int_info.?.signedness); return !needs_cast and !src_is_ptr; } else return false; } @@ -1962,7 +1962,7 @@ pub const DeclGen = struct { if (dest_bits <= 64 and src_bits <= 64) { const needs_cast = src_int_info == null or (toCIntBits(dest_int_info.bits) != toCIntBits(src_int_info.?.bits) or - dest_int_info.signedness != src_int_info.?.signedness); + dest_int_info.signedness != src_int_info.?.signedness); if (needs_cast) { try w.writeByte('('); @@ -4278,7 +4278,7 @@ fn airEquality( .aligned, .array, .vector, .fwd_decl, .function => unreachable, .aggregate => |aggregate| if (aggregate.fields.len == 2 and (aggregate.fields.at(0, ctype_pool).name.index == .is_null or - aggregate.fields.at(1, ctype_pool).name.index == .is_null)) + aggregate.fields.at(1, ctype_pool).name.index == .is_null)) { try f.writeCValueMember(writer, lhs, .{ .identifier = "is_null" }); try writer.writeAll(" || "); diff --git a/src/codegen/c/Type.zig b/src/codegen/c/Type.zig index 1e0c23a96b82..b03d5f4ef7c5 100644 --- a/src/codegen/c/Type.zig +++ b/src/codegen/c/Type.zig @@ -750,12 +750,12 @@ pub const Info = union(enum) { fn tag(pointer_info: Pointer) Pool.Tag { return @enumFromInt(@intFromEnum(Pool.Tag.pointer) + @as(u2, @bitCast(packed struct(u2) { - @"const": bool, - @"volatile": bool, - }{ - .@"const" = pointer_info.@"const", - .@"volatile" = pointer_info.@"volatile", - }))); + @"const": bool, + @"volatile": bool, + }{ + .@"const" = pointer_info.@"const", + .@"volatile" = pointer_info.@"volatile", + }))); } }; @@ -879,24 +879,24 @@ pub const Info = union(enum) { pool_adapter.eql(lhs_vector_info.elem_ctype, rhs_info.vector.elem_ctype), .fwd_decl => |lhs_fwd_decl_info| lhs_fwd_decl_info.tag == rhs_info.fwd_decl.tag and switch (lhs_fwd_decl_info.name) { - .anon => |lhs_anon| rhs_info.fwd_decl.name == .anon and lhs_anon.eqlAdapted( - lhs_pool, - rhs_info.fwd_decl.name.anon, - rhs_pool, - pool_adapter, - ), - .index => |lhs_index| rhs_info.fwd_decl.name == .index and - lhs_index == rhs_info.fwd_decl.name.index, - }, + .anon => |lhs_anon| rhs_info.fwd_decl.name == .anon and lhs_anon.eqlAdapted( + lhs_pool, + rhs_info.fwd_decl.name.anon, + rhs_pool, + pool_adapter, + ), + .index => |lhs_index| rhs_info.fwd_decl.name == .index and + lhs_index == rhs_info.fwd_decl.name.index, + }, .aggregate => |lhs_aggregate_info| lhs_aggregate_info.tag == rhs_info.aggregate.tag and lhs_aggregate_info.@"packed" == rhs_info.aggregate.@"packed" and switch (lhs_aggregate_info.name) { - .anon => |lhs_anon| rhs_info.aggregate.name == .anon and - lhs_anon.index == rhs_info.aggregate.name.anon.index and - lhs_anon.id == rhs_info.aggregate.name.anon.id, - .fwd_decl => |lhs_fwd_decl| rhs_info.aggregate.name == .fwd_decl and - pool_adapter.eql(lhs_fwd_decl, rhs_info.aggregate.name.fwd_decl), - } and lhs_aggregate_info.fields.eqlAdapted( + .anon => |lhs_anon| rhs_info.aggregate.name == .anon and + lhs_anon.index == rhs_info.aggregate.name.anon.index and + lhs_anon.id == rhs_info.aggregate.name.anon.id, + .fwd_decl => |lhs_fwd_decl| rhs_info.aggregate.name == .fwd_decl and + pool_adapter.eql(lhs_fwd_decl, rhs_info.aggregate.name.fwd_decl), + } and lhs_aggregate_info.fields.eqlAdapted( lhs_pool, rhs_info.aggregate.fields, rhs_pool, @@ -905,13 +905,12 @@ pub const Info = union(enum) { .function => |lhs_function_info| lhs_function_info.param_ctypes.len == rhs_info.function.param_ctypes.len and pool_adapter.eql(lhs_function_info.return_ctype, rhs_info.function.return_ctype) and - for (0..lhs_function_info.param_ctypes.len) |param_index| - { - if (!pool_adapter.eql( - lhs_function_info.param_ctypes.at(param_index, lhs_pool), - rhs_info.function.param_ctypes.at(param_index, rhs_pool), - )) break false; - } else true, + for (0..lhs_function_info.param_ctypes.len) |param_index| { + if (!pool_adapter.eql( + lhs_function_info.param_ctypes.at(param_index, lhs_pool), + rhs_info.function.param_ctypes.at(param_index, rhs_pool), + )) break false; + } else true, }; } }; @@ -1951,13 +1950,13 @@ pub const Pool = struct { const return_type = Type.fromInterned(func_info.return_type); const return_ctype: CType = if (!ip.isNoReturn(func_info.return_type)) try pool.fromType( - allocator, - scratch, - return_type, - pt, - mod, - kind.asParameter(), - ) else CType.void; + allocator, + scratch, + return_type, + pt, + mod, + kind.asParameter(), + ) else CType.void; for (0..func_info.param_types.len) |param_index| { const param_type = Type.fromInterned( func_info.param_types.get(ip)[param_index], diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig index b8d1e481db83..349531fda20d 100644 --- a/src/codegen/llvm.zig +++ b/src/codegen/llvm.zig @@ -448,7 +448,7 @@ const DataLayoutBuilder = struct { self.target.cpu.arch != .riscv64 and self.target.cpu.arch != .loongarch64 and !(self.target.cpu.arch == .aarch64 and - (self.target.os.tag == .uefi or self.target.os.tag == .windows)) and + (self.target.os.tag == .uefi or self.target.os.tag == .windows)) and self.target.cpu.arch != .bpfeb and self.target.cpu.arch != .bpfel) continue; try writer.writeAll("-p"); if (info.llvm != .default) try writer.print("{d}", .{@intFromEnum(info.llvm)}); @@ -912,55 +912,54 @@ pub const Object = struct { builder.data_layout = try builder.fmt("{}", .{DataLayoutBuilder{ .target = target }}); const debug_compile_unit, const debug_enums_fwd_ref, const debug_globals_fwd_ref = - if (!builder.strip) - debug_info: { - // We fully resolve all paths at this point to avoid lack of - // source line info in stack traces or lack of debugging - // information which, if relative paths were used, would be - // very location dependent. - // TODO: the only concern I have with this is WASI as either host or target, should - // we leave the paths as relative then? - // TODO: This is totally wrong. In dwarf, paths are encoded as relative to - // a particular directory, and then the directory path is specified elsewhere. - // In the compiler frontend we have it stored correctly in this - // way already, but here we throw all that sweet information - // into the garbage can by converting into absolute paths. What - // a terrible tragedy. - const compile_unit_dir = blk: { - if (comp.zcu) |zcu| m: { - const d = try zcu.main_mod.root.joinString(arena, ""); - if (d.len == 0) break :m; - if (std.fs.path.isAbsolute(d)) break :blk d; - break :blk std.fs.realpathAlloc(arena, d) catch break :blk d; - } - break :blk try std.process.getCwdAlloc(arena); - }; + if (!builder.strip) debug_info: { + // We fully resolve all paths at this point to avoid lack of + // source line info in stack traces or lack of debugging + // information which, if relative paths were used, would be + // very location dependent. + // TODO: the only concern I have with this is WASI as either host or target, should + // we leave the paths as relative then? + // TODO: This is totally wrong. In dwarf, paths are encoded as relative to + // a particular directory, and then the directory path is specified elsewhere. + // In the compiler frontend we have it stored correctly in this + // way already, but here we throw all that sweet information + // into the garbage can by converting into absolute paths. What + // a terrible tragedy. + const compile_unit_dir = blk: { + if (comp.zcu) |zcu| m: { + const d = try zcu.main_mod.root.joinString(arena, ""); + if (d.len == 0) break :m; + if (std.fs.path.isAbsolute(d)) break :blk d; + break :blk std.fs.realpathAlloc(arena, d) catch break :blk d; + } + break :blk try std.process.getCwdAlloc(arena); + }; - const debug_file = try builder.debugFile( - try builder.metadataString(comp.root_name), - try builder.metadataString(compile_unit_dir), - ); + const debug_file = try builder.debugFile( + try builder.metadataString(comp.root_name), + try builder.metadataString(compile_unit_dir), + ); - const debug_enums_fwd_ref = try builder.debugForwardReference(); - const debug_globals_fwd_ref = try builder.debugForwardReference(); - - const debug_compile_unit = try builder.debugCompileUnit( - debug_file, - // Don't use the version string here; LLVM misparses it when it - // includes the git revision. - try builder.metadataStringFmt("zig {d}.{d}.{d}", .{ - build_options.semver.major, - build_options.semver.minor, - build_options.semver.patch, - }), - debug_enums_fwd_ref, - debug_globals_fwd_ref, - .{ .optimized = comp.root_mod.optimize_mode != .Debug }, - ); + const debug_enums_fwd_ref = try builder.debugForwardReference(); + const debug_globals_fwd_ref = try builder.debugForwardReference(); + + const debug_compile_unit = try builder.debugCompileUnit( + debug_file, + // Don't use the version string here; LLVM misparses it when it + // includes the git revision. + try builder.metadataStringFmt("zig {d}.{d}.{d}", .{ + build_options.semver.major, + build_options.semver.minor, + build_options.semver.patch, + }), + debug_enums_fwd_ref, + debug_globals_fwd_ref, + .{ .optimized = comp.root_mod.optimize_mode != .Debug }, + ); - try builder.metadataNamed(try builder.metadataString("llvm.dbg.cu"), &.{debug_compile_unit}); - break :debug_info .{ debug_compile_unit, debug_enums_fwd_ref, debug_globals_fwd_ref }; - } else .{.none} ** 3; + try builder.metadataNamed(try builder.metadataString("llvm.dbg.cu"), &.{debug_compile_unit}); + break :debug_info .{ debug_compile_unit, debug_enums_fwd_ref, debug_globals_fwd_ref }; + } else .{.none} ** 3; const obj = try arena.create(Object); obj.* = .{ @@ -2823,9 +2822,9 @@ pub const Object = struct { const full_fields: [2]Builder.Metadata = if (layout.tag_align.compare(.gte, layout.payload_align)) - .{ debug_tag_type, debug_payload_type } - else - .{ debug_payload_type, debug_tag_type }; + .{ debug_tag_type, debug_payload_type } + else + .{ debug_payload_type, debug_tag_type }; const debug_tagged_union_type = try o.builder.debugStructType( try o.builder.metadataString(name), @@ -4573,11 +4572,11 @@ pub const Object = struct { // instruction is followed by a `wrap_optional`, it will return this value // verbatim, and the result should test as non-null. switch (zcu.getTarget().ptrBitWidth()) { - 16 => 0xaaaa, - 32 => 0xaaaaaaaa, - 64 => 0xaaaaaaaa_aaaaaaaa, - else => unreachable, - }; + 16 => 0xaaaa, + 32 => 0xaaaaaaaa, + 64 => 0xaaaaaaaa_aaaaaaaa, + else => unreachable, + }; const llvm_usize = try o.lowerType(Type.usize); const llvm_ptr_ty = try o.lowerType(ptr_ty); return o.builder.castConst(.inttoptr, try o.builder.intConst(llvm_usize, int), llvm_ptr_ty); @@ -9463,7 +9462,7 @@ pub const FuncGen = struct { if (llvm_dest_ty.isStruct(&o.builder) or ((operand_ty.zigTypeTag(zcu) == .vector or inst_ty.zigTypeTag(zcu) == .vector) and - operand_ty.bitSize(zcu) != inst_ty.bitSize(zcu))) + operand_ty.bitSize(zcu) != inst_ty.bitSize(zcu))) { // Both our operand and our result are values, not pointers, // but LLVM won't let us bitcast struct values or vectors with padding bits. diff --git a/src/link/Elf/relocatable.zig b/src/link/Elf/relocatable.zig index c88e95fec02b..c08b09950107 100644 --- a/src/link/Elf/relocatable.zig +++ b/src/link/Elf/relocatable.zig @@ -308,20 +308,20 @@ fn initSections(elf_file: *Elf) !void { if (elf_file.section_indexes.eh_frame == null) { elf_file.section_indexes.eh_frame = elf_file.sectionByName(".eh_frame") orelse try elf_file.addSection(.{ - .name = try elf_file.insertShString(".eh_frame"), - .type = if (elf_file.getTarget().cpu.arch == .x86_64) - elf.SHT_X86_64_UNWIND - else - elf.SHT_PROGBITS, - .flags = elf.SHF_ALLOC, - .addralign = elf_file.ptrWidthBytes(), - }); + .name = try elf_file.insertShString(".eh_frame"), + .type = if (elf_file.getTarget().cpu.arch == .x86_64) + elf.SHT_X86_64_UNWIND + else + elf.SHT_PROGBITS, + .flags = elf.SHF_ALLOC, + .addralign = elf_file.ptrWidthBytes(), + }); } elf_file.section_indexes.eh_frame_rela = elf_file.sectionByName(".rela.eh_frame") orelse try elf_file.addRelaShdr( - try elf_file.insertShString(".rela.eh_frame"), - elf_file.section_indexes.eh_frame.?, - ); + try elf_file.insertShString(".rela.eh_frame"), + elf_file.section_indexes.eh_frame.?, + ); } try initComdatGroups(elf_file); diff --git a/src/link/Elf/synthetic_sections.zig b/src/link/Elf/synthetic_sections.zig index 6d26ec5d1ffd..836484601929 100644 --- a/src/link/Elf/synthetic_sections.zig +++ b/src/link/Elf/synthetic_sections.zig @@ -551,7 +551,7 @@ pub const GotSection = struct { switch (entry.tag) { .got => if (symbol.?.flags.import or symbol.?.isIFunc(elf_file) or ((elf_file.isEffectivelyDynLib() or (elf_file.base.isExe() and comp.config.pie)) and - !symbol.?.isAbs(elf_file))) + !symbol.?.isAbs(elf_file))) { num += 1; }, diff --git a/src/link/MachO.zig b/src/link/MachO.zig index d17cbb92b76d..813e0f02f6cb 100644 --- a/src/link/MachO.zig +++ b/src/link/MachO.zig @@ -1568,14 +1568,14 @@ fn initOutputSections(self: *MachO) !void { } self.text_sect_index = self.getSectionByName("__TEXT", "__text") orelse try self.addSection("__TEXT", "__text", .{ - .alignment = switch (self.getTarget().cpu.arch) { - .x86_64 => 0, - .aarch64 => 2, - else => unreachable, - }, - .flags = macho.S_REGULAR | - macho.S_ATTR_PURE_INSTRUCTIONS | macho.S_ATTR_SOME_INSTRUCTIONS, - }); + .alignment = switch (self.getTarget().cpu.arch) { + .x86_64 => 0, + .aarch64 => 2, + else => unreachable, + }, + .flags = macho.S_REGULAR | + macho.S_ATTR_PURE_INSTRUCTIONS | macho.S_ATTR_SOME_INSTRUCTIONS, + }); self.data_sect_index = self.getSectionByName("__DATA", "__data") orelse try self.addSection("__DATA", "__data", .{}); } diff --git a/src/link/MachO/Atom.zig b/src/link/MachO/Atom.zig index f8bf9c37e782..e4506ffa5477 100644 --- a/src/link/MachO/Atom.zig +++ b/src/link/MachO/Atom.zig @@ -149,10 +149,10 @@ pub fn initOutputSection(sect: macho.section_64, macho_file: *MachO) !u8 { if (macho_file.base.isRelocatable()) { const osec = macho_file.getSectionByName(sect.segName(), sect.sectName()) orelse try macho_file.addSection( - sect.segName(), - sect.sectName(), - .{ .flags = sect.flags }, - ); + sect.segName(), + sect.sectName(), + .{ .flags = sect.flags }, + ); return osec; } diff --git a/src/link/MachO/ZigObject.zig b/src/link/MachO/ZigObject.zig index 666a73f6007e..f34257c869b5 100644 --- a/src/link/MachO/ZigObject.zig +++ b/src/link/MachO/ZigObject.zig @@ -1107,8 +1107,8 @@ fn createTlvDescriptor( const sect_index = macho_file.getSectionByName("__DATA", "__thread_vars") orelse try macho_file.addSection("__DATA", "__thread_vars", .{ - .flags = macho.S_THREAD_LOCAL_VARIABLES, - }); + .flags = macho.S_THREAD_LOCAL_VARIABLES, + }); sym.out_n_sect = sect_index; atom.out_n_sect = sect_index; diff --git a/src/link/MachO/dead_strip.zig b/src/link/MachO/dead_strip.zig index 30f53d3744f7..24d7e18d1a81 100644 --- a/src/link/MachO/dead_strip.zig +++ b/src/link/MachO/dead_strip.zig @@ -102,8 +102,8 @@ fn mark(roots: []*Atom, objects: []const File.Index, macho_file: *MachO) void { const isec = atom.getInputSection(macho_file); if (isec.isDontDeadStripIfReferencesLive() and !(mem.eql(u8, isec.sectName(), "__eh_frame") or - mem.eql(u8, isec.sectName(), "__compact_unwind") or - isec.attrs() & macho.S_ATTR_DEBUG != 0) and + mem.eql(u8, isec.sectName(), "__compact_unwind") or + isec.attrs() & macho.S_ATTR_DEBUG != 0) and !atom.isAlive() and refersLive(atom, macho_file)) { markLive(atom, macho_file); diff --git a/src/main.zig b/src/main.zig index 75a273b56033..cc8a84914224 100644 --- a/src/main.zig +++ b/src/main.zig @@ -5903,8 +5903,8 @@ pub const ClangArgIterator = struct { self.arg_iterator_response_file = initArgIteratorResponseFile(arena, resp_file_path) catch |err| { - fatal("unable to read response file '{s}': {s}", .{ resp_file_path, @errorName(err) }); - }; + fatal("unable to read response file '{s}': {s}", .{ resp_file_path, @errorName(err) }); + }; // NOTE: The ArgIteratorResponseFile returns tokens from next() that are slices of an // internal buffer. This internal buffer is arena allocated, so it is not cleaned up here. @@ -6201,8 +6201,8 @@ fn cmdAstCheck( file.tree.tokens.len * (@sizeOf(std.zig.Token.Tag) + @sizeOf(Ast.ByteOffset)); const tree_bytes = @sizeOf(Ast) + file.tree.nodes.len * (@sizeOf(Ast.Node.Tag) + - @sizeOf(Ast.Node.Data) + - @sizeOf(Ast.TokenIndex)); + @sizeOf(Ast.Node.Data) + + @sizeOf(Ast.TokenIndex)); const instruction_bytes = file.zir.instructions.len * // Here we don't use @sizeOf(Zir.Inst.Data) because it would include // the debug safety tag but we want to measure release size. diff --git a/src/translate_c.zig b/src/translate_c.zig index 22b03fcb7569..9a23bef76370 100644 --- a/src/translate_c.zig +++ b/src/translate_c.zig @@ -2567,9 +2567,9 @@ fn transInitListExprRecord( // Unions and Structs are both represented as RecordDecl const record_ty = ty.getAsRecordType() orelse blk: { - is_union_type = true; - break :blk ty.getAsUnionType(); - } orelse unreachable; + is_union_type = true; + break :blk ty.getAsUnionType(); + } orelse unreachable; const record_decl = record_ty.getDecl(); const record_def = record_decl.getDefinition() orelse unreachable; @@ -4003,7 +4003,7 @@ fn transCPtrCast( if (!src_ty.isArrayType() and ((src_child_type.isConstQualified() and !child_type.isConstQualified()) or (src_child_type.isVolatileQualified() and - !child_type.isVolatileQualified()))) + !child_type.isVolatileQualified()))) { return removeCVQualifiers(c, dst_type_node, expr); } else { @@ -4089,8 +4089,8 @@ fn transFloatingLiteralQuad(c: *Context, expr: *const clang.FloatingLiteral, use false; break :fmt_decimal if (could_roundtrip) try c.arena.dupe(u8, temp_str) else null; } - // otherwise, fall back to the hexadecimal format - orelse try std.fmt.allocPrint(c.arena, "{x}", .{quad}); + // otherwise, fall back to the hexadecimal format + orelse try std.fmt.allocPrint(c.arena, "{x}", .{quad}); var node = try Tag.float_literal.create(c.arena, str); if (is_negative) node = try Tag.negate.create(c.arena, node); @@ -5074,15 +5074,14 @@ fn finishTransFnProto( const is_noalias = param_qt.isRestrictQualified(); const param_name: ?[]const u8 = - if (fn_decl) |decl| - blk: { - const param = decl.getParamDecl(@as(c_uint, @intCast(i))); - const param_name: []const u8 = try c.str(@as(*const clang.NamedDecl, @ptrCast(param)).getName_bytes_begin()); - if (param_name.len < 1) - break :blk null; - - break :blk param_name; - } else null; + if (fn_decl) |decl| blk: { + const param = decl.getParamDecl(@as(c_uint, @intCast(i))); + const param_name: []const u8 = try c.str(@as(*const clang.NamedDecl, @ptrCast(param)).getName_bytes_begin()); + if (param_name.len < 1) + break :blk null; + + break :blk param_name; + } else null; const type_node = try transQualType(c, scope, param_qt, source_loc); fn_params.addOneAssumeCapacity().* = .{