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XS2 devices have differing timings on different banks. In particular RGMII ports show different timings and should not be part of the port map for SDRAM.
This should be documented in the guide.
The text was updated successfully, but these errors were encountered:
XS2 devices have differing timings on different banks. In particular RGMII ports show different timings and should not be part of the port map for SDRAM.
This should be documented in the guide.
The text was updated successfully, but these errors were encountered: