diff --git a/generated/Debug/Rift2360/Rift2Chip.anno.json b/generated/Debug/Rift2360/Rift2Chip.anno.json
index 5eedf4e6..ced50890 100644
--- a/generated/Debug/Rift2360/Rift2Chip.anno.json
+++ b/generated/Debug/Rift2360/Rift2Chip.anno.json
@@ -1,8242 +1,5073 @@
 [
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+    "class":"firrtl.transforms.DontTouchAnnotation",
+    "target":"~Rift2Chip|Issue>bufReqNum"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerPrimitiveShiftReg_d3_i0_16",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/widx_widx_gray:AsyncResetSynchronizerShiftReg_w4_d3_i0/output_chain:AsyncResetSynchronizerPrimitiveShiftReg_d3_i0",
-    "index":0.3630252100840336
+    "class":"firrtl.transforms.DontTouchAnnotation",
+    "target":"~Rift2Chip|Issue>bufReqNum"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerPrimitiveShiftReg_d3_i0_17",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/widx_widx_gray:AsyncResetSynchronizerShiftReg_w4_d3_i0/output_chain_1:AsyncResetSynchronizerPrimitiveShiftReg_d3_i0",
-    "index":0.36470588235294116
+    "class":"firrtl.transforms.DontTouchAnnotation",
+    "target":"~Rift2Chip|Issue>bufReqNum"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerPrimitiveShiftReg_d3_i0_18",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/widx_widx_gray:AsyncResetSynchronizerShiftReg_w4_d3_i0/output_chain_2:AsyncResetSynchronizerPrimitiveShiftReg_d3_i0",
-    "index":0.3663865546218487
+    "class":"firrtl.transforms.DontTouchAnnotation",
+    "target":"~Rift2Chip|Issue>bufReqNum"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerPrimitiveShiftReg_d3_i0_19",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/widx_widx_gray:AsyncResetSynchronizerShiftReg_w4_d3_i0/output_chain_3:AsyncResetSynchronizerPrimitiveShiftReg_d3_i0",
-    "index":0.3680672268907563
+    "class":"firrtl.transforms.DontTouchAnnotation",
+    "target":"~Rift2Chip|Issue>bufReqNum"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerShiftReg_w4_d3_i0_2",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/widx_widx_gray:AsyncResetSynchronizerShiftReg_w4_d3_i0",
-    "index":0.3697478991596639
+    "class":"firrtl.transforms.DontTouchAnnotation",
+    "target":"~Rift2Chip|Issue>bufReqNum"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|ClockCrossingReg_w42_1",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/io_deq_bits_deq_bits_reg:ClockCrossingReg_w42",
-    "index":0.37142857142857144
+    "class":"firrtl.transforms.DontTouchAnnotation",
+    "target":"~Rift2Chip|SRT4Divider>dividendIdx"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerPrimitiveShiftReg_d3_i0_20",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/sink_valid_0:AsyncValidSync/io_out_sink_valid_0:AsyncResetSynchronizerShiftReg_w1_d3_i0/output_chain:AsyncResetSynchronizerPrimitiveShiftReg_d3_i0",
-    "index":0.373109243697479
+    "class":"firrtl.transforms.DontTouchAnnotation",
+    "target":"~Rift2Chip|diff>io"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerShiftReg_w1_d3_i0_8",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/sink_valid_0:AsyncValidSync/io_out_sink_valid_0:AsyncResetSynchronizerShiftReg_w1_d3_i0",
-    "index":0.37478991596638656
+    "class":"firrtl.transforms.DontTouchAnnotation",
+    "target":"~Rift2Chip|diff>XReg"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncValidSync_8",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/sink_valid_0:AsyncValidSync",
-    "index":0.3764705882352941
+    "class":"firrtl.transforms.DontTouchAnnotation",
+    "target":"~Rift2Chip|diff>FReg1"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerPrimitiveShiftReg_d3_i0_21",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/sink_valid_1:AsyncValidSync/io_out_sink_valid_0:AsyncResetSynchronizerShiftReg_w1_d3_i0/output_chain:AsyncResetSynchronizerPrimitiveShiftReg_d3_i0",
-    "index":0.37815126050420167
+    "class":"firrtl.transforms.DontTouchAnnotation",
+    "target":"~Rift2Chip|diff>FReg2"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerShiftReg_w1_d3_i0_9",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/sink_valid_1:AsyncValidSync/io_out_sink_valid_0:AsyncResetSynchronizerShiftReg_w1_d3_i0",
-    "index":0.3798319327731092
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncValidSync_9",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/sink_valid_1:AsyncValidSync",
-    "index":0.3815126050420168
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_1",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerPrimitiveShiftReg_d3_i0_22",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/source_extend:AsyncValidSync/io_out_sink_valid_0:AsyncResetSynchronizerShiftReg_w1_d3_i0/output_chain:AsyncResetSynchronizerPrimitiveShiftReg_d3_i0",
-    "index":0.3831932773109244
+    "class":"firrtl.transforms.DontTouchAnnotation",
+    "target":"~Rift2Chip|DebugModule>abstractDataMem_wen1"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerShiftReg_w1_d3_i0_10",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/source_extend:AsyncValidSync/io_out_sink_valid_0:AsyncResetSynchronizerShiftReg_w1_d3_i0",
-    "index":0.38487394957983195
+    "class":"firrtl.transforms.DontTouchAnnotation",
+    "target":"~Rift2Chip|DebugModule>abstractDataMem_ren1"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncValidSync_10",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/source_extend:AsyncValidSync",
-    "index":0.3865546218487395
+    "class":"firrtl.transforms.DontTouchAnnotation",
+    "target":"~Rift2Chip|DebugModule>programBufferMem_wen1"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerPrimitiveShiftReg_d3_i0_23",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/source_valid:AsyncValidSync/io_out_sink_valid_0:AsyncResetSynchronizerShiftReg_w1_d3_i0/output_chain:AsyncResetSynchronizerPrimitiveShiftReg_d3_i0",
-    "index":0.38823529411764707
+    "class":"firrtl.transforms.DontTouchAnnotation",
+    "target":"~Rift2Chip|DebugModule>programBufferMem_ren1"
   },
   {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerShiftReg_w1_d3_i0_11",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/source_valid:AsyncValidSync/io_out_sink_valid_0:AsyncResetSynchronizerShiftReg_w1_d3_i0",
-    "index":0.3899159663865546
-  },
-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncValidSync_11",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink/source_valid:AsyncValidSync",
-    "index":0.3915966386554622
-  },
-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncQueueSink_1",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/io_dtm_dmi_resp_sink:AsyncQueueSink",
-    "index":0.39327731092436974
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-  {
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-    "original":"~Rift2Chip|AsyncResetSynchronizerPrimitiveShiftReg_d3_i0_24",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/ridx_ridx_gray:AsyncResetSynchronizerShiftReg_w4_d3_i0/output_chain:AsyncResetSynchronizerPrimitiveShiftReg_d3_i0",
-    "index":0.3949579831932773
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-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerPrimitiveShiftReg_d3_i0_25",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/ridx_ridx_gray:AsyncResetSynchronizerShiftReg_w4_d3_i0/output_chain_1:AsyncResetSynchronizerPrimitiveShiftReg_d3_i0",
-    "index":0.39663865546218485
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-  {
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-    "original":"~Rift2Chip|AsyncResetSynchronizerPrimitiveShiftReg_d3_i0_26",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/ridx_ridx_gray:AsyncResetSynchronizerShiftReg_w4_d3_i0/output_chain_2:AsyncResetSynchronizerPrimitiveShiftReg_d3_i0",
-    "index":0.3983193277310924
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-  {
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-    "original":"~Rift2Chip|AsyncResetSynchronizerPrimitiveShiftReg_d3_i0_27",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/ridx_ridx_gray:AsyncResetSynchronizerShiftReg_w4_d3_i0/output_chain_3:AsyncResetSynchronizerPrimitiveShiftReg_d3_i0",
-    "index":0.4
-  },
-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerShiftReg_w4_d3_i0_3",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/ridx_ridx_gray:AsyncResetSynchronizerShiftReg_w4_d3_i0",
-    "index":0.4016806722689076
-  },
-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerPrimitiveShiftReg_d3_i0_28",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/source_valid_0:AsyncValidSync/io_out_sink_valid_0:AsyncResetSynchronizerShiftReg_w1_d3_i0/output_chain:AsyncResetSynchronizerPrimitiveShiftReg_d3_i0",
-    "index":0.40336134453781514
-  },
-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerShiftReg_w1_d3_i0_12",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/source_valid_0:AsyncValidSync/io_out_sink_valid_0:AsyncResetSynchronizerShiftReg_w1_d3_i0",
-    "index":0.4050420168067227
-  },
-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncValidSync_12",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/source_valid_0:AsyncValidSync",
-    "index":0.40672268907563025
-  },
-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerPrimitiveShiftReg_d3_i0_29",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/source_valid_1:AsyncValidSync/io_out_sink_valid_0:AsyncResetSynchronizerShiftReg_w1_d3_i0/output_chain:AsyncResetSynchronizerPrimitiveShiftReg_d3_i0",
-    "index":0.4084033613445378
-  },
-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerShiftReg_w1_d3_i0_13",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/source_valid_1:AsyncValidSync/io_out_sink_valid_0:AsyncResetSynchronizerShiftReg_w1_d3_i0",
-    "index":0.41008403361344536
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-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncValidSync_13",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/source_valid_1:AsyncValidSync",
-    "index":0.4117647058823529
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-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerPrimitiveShiftReg_d3_i0_30",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/sink_extend:AsyncValidSync/io_out_sink_valid_0:AsyncResetSynchronizerShiftReg_w1_d3_i0/output_chain:AsyncResetSynchronizerPrimitiveShiftReg_d3_i0",
-    "index":0.4134453781512605
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-  {
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-    "original":"~Rift2Chip|AsyncResetSynchronizerShiftReg_w1_d3_i0_14",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/sink_extend:AsyncValidSync/io_out_sink_valid_0:AsyncResetSynchronizerShiftReg_w1_d3_i0",
-    "index":0.4151260504201681
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-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncValidSync_14",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/sink_extend:AsyncValidSync",
-    "index":0.41680672268907565
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-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncResetSynchronizerPrimitiveShiftReg_d3_i0_31",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/sink_valid:AsyncValidSync/io_out_sink_valid_0:AsyncResetSynchronizerShiftReg_w1_d3_i0/output_chain:AsyncResetSynchronizerPrimitiveShiftReg_d3_i0",
-    "index":0.4184873949579832
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-  {
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-    "original":"~Rift2Chip|AsyncResetSynchronizerShiftReg_w1_d3_i0_15",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/sink_valid:AsyncValidSync/io_out_sink_valid_0:AsyncResetSynchronizerShiftReg_w1_d3_i0",
-    "index":0.42016806722689076
-  },
-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncValidSync_15",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource/sink_valid:AsyncValidSync",
-    "index":0.4218487394957983
-  },
-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|AsyncQueueSource_1",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_debugger:Debugger/dmi:DMI/req_ToAsync_source:AsyncQueueSource",
-    "index":0.4235294117647059
-  },
-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|plusarg_reader_2",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_aclint:AClint/monitor:TLMonitor_1/plusarg_reader:plusarg_reader",
-    "index":0.42857142857142855
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-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|plusarg_reader_3",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_aclint:AClint/monitor:TLMonitor_1/plusarg_reader_1:plusarg_reader",
-    "index":0.43025210084033616
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-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|plusarg_reader_4",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_plic:Plic/monitor:TLMonitor_2/plusarg_reader:plusarg_reader",
-    "index":0.43529411764705883
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-  {
-    "class":"firrtl.transforms.DedupedResult",
-    "original":"~Rift2Chip|plusarg_reader_5",
-    "duplicate":"~Rift2Chip|Rift2Chip/i_plic:Plic/monitor:TLMonitor_2/plusarg_reader_1:plusarg_reader",
-    "index":0.4369747899159664
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-    "class":"firrtl.transforms.DedupedResult",
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-    "duplicate":"~Rift2Chip|Rift2Chip/sifiveCache:InclusiveCache/monitor:TLMonitor_3/plusarg_reader:plusarg_reader",
-    "index":0.4436974789915966
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-  {
-    "class":"firrtl.transforms.DedupedResult",
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-    "index":0.44537815126050423
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-  {
-    "class":"firrtl.transforms.DedupedResult",
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-    "duplicate":"~Rift2Chip|Rift2Chip/sifiveCache:InclusiveCache/inclusive_cache_bank_sched:InclusiveCacheBankScheduler/directory:Directory/victimLFSR_prng:MaxPeriodFibonacciLFSR_1",
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-    "duplicate":"~Rift2Chip|Rift2Chip/sifiveCache:InclusiveCache/inclusive_cache_bank_sched:InclusiveCacheBankScheduler/abc_mshrs_0:MSHR",
-    "index":0.4957983193277311
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-  {
-    "class":"firrtl.transforms.DedupedResult",
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-  {
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-          "name":"priority_3",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 3",
-          "group":"priority",
-          "groupDesc":"None",
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-          "hasReset":false,
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-          "byteOffset":"0x0",
-          "bitOffset":160,
-          "bitWidth":32,
-          "name":"priority_4",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 4",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":192,
-          "bitWidth":32,
-          "name":"priority_5",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 5",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":224,
-          "bitWidth":32,
-          "name":"priority_6",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 6",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
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-          "byteOffset":"0x0",
-          "bitOffset":256,
-          "bitWidth":32,
-          "name":"priority_7",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 7",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
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-          "byteOffset":"0x0",
-          "bitOffset":288,
-          "bitWidth":32,
-          "name":"priority_8",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 8",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":320,
-          "bitWidth":32,
-          "name":"priority_9",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 9",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":352,
-          "bitWidth":32,
-          "name":"priority_10",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 10",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":384,
-          "bitWidth":32,
-          "name":"priority_11",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 11",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":416,
-          "bitWidth":32,
-          "name":"priority_12",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 12",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":448,
-          "bitWidth":32,
-          "name":"priority_13",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 13",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":480,
-          "bitWidth":32,
-          "name":"priority_14",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 14",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":512,
-          "bitWidth":32,
-          "name":"priority_15",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 15",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":544,
-          "bitWidth":32,
-          "name":"priority_16",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 16",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":576,
-          "bitWidth":32,
-          "name":"priority_17",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 17",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":608,
-          "bitWidth":32,
-          "name":"priority_18",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 18",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":640,
-          "bitWidth":32,
-          "name":"priority_19",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 19",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":672,
-          "bitWidth":32,
-          "name":"priority_20",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 20",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
-            
-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":704,
-          "bitWidth":32,
-          "name":"priority_21",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 21",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":736,
-          "bitWidth":32,
-          "name":"priority_22",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 22",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":768,
-          "bitWidth":32,
-          "name":"priority_23",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 23",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
-            
-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":800,
-          "bitWidth":32,
-          "name":"priority_24",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 24",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
-            
-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":832,
-          "bitWidth":32,
-          "name":"priority_25",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 25",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":864,
-          "bitWidth":32,
-          "name":"priority_26",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 26",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":896,
-          "bitWidth":32,
-          "name":"priority_27",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 27",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":928,
-          "bitWidth":32,
-          "name":"priority_28",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 28",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":960,
-          "bitWidth":32,
-          "name":"priority_29",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 29",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x0",
-          "bitOffset":992,
-          "bitWidth":32,
-          "name":"priority_30",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Acting priority of interrupt source 30",
-          "group":"priority",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":0,
-          "bitWidth":1,
-          "name":"reserved",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"",
-          "group":"pending",
-          "groupDesc":"Pending Bit Array. 1 Bit for each interrupt source.",
-          "volatile":false,
-          "hasReset":true,
-          "enumerations":{
-            
-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":1,
-          "bitWidth":1,
-          "name":"pending_0",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 0 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":2,
-          "bitWidth":1,
-          "name":"pending_1",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 1 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":3,
-          "bitWidth":1,
-          "name":"pending_2",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 2 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":4,
-          "bitWidth":1,
-          "name":"pending_3",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 3 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":5,
-          "bitWidth":1,
-          "name":"pending_4",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 4 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":6,
-          "bitWidth":1,
-          "name":"pending_5",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 5 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":7,
-          "bitWidth":1,
-          "name":"pending_6",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 6 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":8,
-          "bitWidth":1,
-          "name":"pending_7",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 7 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":9,
-          "bitWidth":1,
-          "name":"pending_8",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 8 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":10,
-          "bitWidth":1,
-          "name":"pending_9",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 9 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":11,
-          "bitWidth":1,
-          "name":"pending_10",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 10 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":12,
-          "bitWidth":1,
-          "name":"pending_11",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 11 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":13,
-          "bitWidth":1,
-          "name":"pending_12",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 12 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":14,
-          "bitWidth":1,
-          "name":"pending_13",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 13 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":15,
-          "bitWidth":1,
-          "name":"pending_14",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 14 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
-            
-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":16,
-          "bitWidth":1,
-          "name":"pending_15",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 15 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
-            
-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":17,
-          "bitWidth":1,
-          "name":"pending_16",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 16 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
-            
-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":18,
-          "bitWidth":1,
-          "name":"pending_17",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 17 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
-            
-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":19,
-          "bitWidth":1,
-          "name":"pending_18",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 18 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
-            
-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":20,
-          "bitWidth":1,
-          "name":"pending_19",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 19 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":21,
-          "bitWidth":1,
-          "name":"pending_20",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 20 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":22,
-          "bitWidth":1,
-          "name":"pending_21",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 21 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":23,
-          "bitWidth":1,
-          "name":"pending_22",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 22 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":24,
-          "bitWidth":1,
-          "name":"pending_23",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 23 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":25,
-          "bitWidth":1,
-          "name":"pending_24",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 24 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":26,
-          "bitWidth":1,
-          "name":"pending_25",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 25 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":27,
-          "bitWidth":1,
-          "name":"pending_26",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 26 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":28,
-          "bitWidth":1,
-          "name":"pending_27",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 27 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":29,
-          "bitWidth":1,
-          "name":"pending_28",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 28 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":30,
-          "bitWidth":1,
-          "name":"pending_29",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 29 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x1000",
-          "bitOffset":31,
-          "bitWidth":1,
-          "name":"pending_30",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set to 1 if interrupt source 30 is pending, regardless of its enable or priority setting.",
-          "group":"pending",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":0,
-          "bitWidth":1,
-          "name":"reserved",
-          "resetValue":0,
-          "accessType":"R",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"",
-          "group":"enables_0",
-          "groupDesc":"Enable bits for each interrupt source for target 0. 1 bit for each interrupt source.",
-          "volatile":false,
-          "hasReset":true,
-          "enumerations":{
-            
-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":1,
-          "bitWidth":1,
-          "name":"enables_0",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
-            
-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":2,
-          "bitWidth":1,
-          "name":"enables_1",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":3,
-          "bitWidth":1,
-          "name":"enables_2",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":4,
-          "bitWidth":1,
-          "name":"enables_3",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":5,
-          "bitWidth":1,
-          "name":"enables_4",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":6,
-          "bitWidth":1,
-          "name":"enables_5",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":7,
-          "bitWidth":1,
-          "name":"enables_6",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":8,
-          "bitWidth":1,
-          "name":"enables_7",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":9,
-          "bitWidth":1,
-          "name":"enables_8",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-        },
-        {
-          "byteOffset":"0x2000",
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-          "name":"enables_9",
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-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":11,
-          "bitWidth":1,
-          "name":"enables_10",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":12,
-          "bitWidth":1,
-          "name":"enables_11",
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-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":13,
-          "bitWidth":1,
-          "name":"enables_12",
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-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
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-          "groupDesc":"None",
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-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":14,
-          "bitWidth":1,
-          "name":"enables_13",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":15,
-          "bitWidth":1,
-          "name":"enables_14",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":16,
-          "bitWidth":1,
-          "name":"enables_15",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":17,
-          "bitWidth":1,
-          "name":"enables_16",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":18,
-          "bitWidth":1,
-          "name":"enables_17",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":19,
-          "bitWidth":1,
-          "name":"enables_18",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":20,
-          "bitWidth":1,
-          "name":"enables_19",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":21,
-          "bitWidth":1,
-          "name":"enables_20",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":22,
-          "bitWidth":1,
-          "name":"enables_21",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
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-          "enumerations":{
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-        },
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-          "byteOffset":"0x2000",
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-          "name":"enables_22",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
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-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":24,
-          "bitWidth":1,
-          "name":"enables_23",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":25,
-          "bitWidth":1,
-          "name":"enables_24",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
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-          "groupDesc":"None",
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-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":26,
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-          "name":"enables_25",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
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-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":27,
-          "bitWidth":1,
-          "name":"enables_26",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
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-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":28,
-          "bitWidth":1,
-          "name":"enables_27",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
-            
-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":29,
-          "bitWidth":1,
-          "name":"enables_28",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
-            
-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":30,
-          "bitWidth":1,
-          "name":"enables_29",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x2000",
-          "bitOffset":31,
-          "bitWidth":1,
-          "name":"enables_30",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Set bits to 1 if interrupt should be enabled.",
-          "group":"enables_0",
-          "groupDesc":"None",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        },
-        {
-          "byteOffset":"0x200000",
-          "bitOffset":0,
-          "bitWidth":32,
-          "name":"threshold_0",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"Interrupt & claim threshold for target 0. Maximum value is 8.",
-          "group":"hart_0",
-          "groupDesc":"hart_0",
-          "volatile":false,
-          "hasReset":false,
-          "enumerations":{
-            
-          }
-        },
-        {
-          "byteOffset":"0x200000",
-          "bitOffset":32,
-          "bitWidth":32,
-          "name":"claim_complete_0",
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-          "accessType":"RW",
-          "wrType":"Some(MODIFY)",
-          "rdAction":"Some(MODIFY)",
-          "desc":"Claim/Complete register for Target 0. Reading this register returns the claimed interrupt number and makes it no longer pending.Writing the interrupt number back completes the interrupt.",
-          "group":"hart_0",
-          "groupDesc":"None",
-          "volatile":true,
-          "hasReset":false,
-          "enumerations":{
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-          }
-        }
-      ]
-    }
-  },
-  {
-    "class":"freechips.rocketchip.util.RegFieldDescMappingAnnotation",
-    "target":"Rift2Chip.AClint",
-    "regMappingSer":{
-      "displayName":"AClint",
-      "deviceName":"AClint",
-      "baseAddress":131072,
-      "regFields":[
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-          "byteOffset":"0x0",
-          "bitOffset":0,
-          "bitWidth":64,
-          "name":"mtimecmp_0",
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-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"mtimecmp_0",
-          "group":"mtimecmp",
-          "groupDesc":"MTIMECMP for hart x",
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-          "hasReset":false,
-          "enumerations":{
-            
-          }
-        },
-        {
-          "byteOffset":"0x8000",
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-          "bitWidth":64,
-          "name":"mtime",
-          "resetValue":0,
-          "accessType":"RW",
-          "wrType":"None",
-          "rdAction":"None",
-          "desc":"mtime",
-          "group":"mtime",
-          "groupDesc":"Timer Register",
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-        {
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-          "name":"msip_0",
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-          "accessType":"RW",
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-          "desc":"MSIP bit for Hart 0",
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-          "groupDesc":"MSIP Bits",
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-          "enumerations":{
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-          "enumerations":{
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-          }
-        }
-      ]
-    }
-  },
-  {
-    "class":"freechips.rocketchip.util.RegFieldDescMappingAnnotation",
-    "target":"Rift2Chip.DebugModule",
-    "regMappingSer":{
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-          "desc":"Debug ROM causes hart to write 0 here when it begins executing Debug Mode instructions.",
-          "group":"None",
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-          "desc":"Debug ROM causes hart to write its hartID here when it leaves Debug Mode.",
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-          "enumerations":{
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-        },
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-          "desc":"Debug ROM causes hart to write 0 here if it gets an exception in Debug Mode.",
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-          "enumerations":{
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-          "desc":"Instruction filled in by Debug Module to control hart in Debug Mode",
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-          "name":"unnamedRegField320_64",
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-          }
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-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_10"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_11"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_12"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_13"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_14"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_15"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_16"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_17"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_18"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_19"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_20"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_21"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_22"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_23"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_24"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_25"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_26"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_27"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_28"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_29"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_30"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffXReg_31"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_0"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_1"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_2"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_3"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_4"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_5"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_6"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_7"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_8"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_9"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_10"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_11"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_12"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_13"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_14"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_15"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_16"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_17"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_18"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_19"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_20"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_21"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_22"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_23"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_24"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_25"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_26"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_27"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_28"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_29"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_30"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_diffFReg_31"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_commit_pc_0"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_commit_pc_1"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_commit_comfirm_0"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_commit_comfirm_1"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_commit_abort_0"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_commit_abort_1"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_commit_priv_lvl"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_commit_is_ecall_M"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_commit_is_ecall_S"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_commit_is_ecall_U"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mstatus"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mtvec"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mscratch"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mepc"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mcause"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mtval"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mvendorid"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_marchid"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mimpid"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhartid"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_misa"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mie"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mip"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_medeleg"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mideleg"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_pmpcfg_0"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_pmpaddr_0"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_pmpaddr_1"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_pmpaddr_2"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_pmpaddr_3"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_pmpaddr_4"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_pmpaddr_5"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_pmpaddr_6"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_pmpaddr_7"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_stvec"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_sscratch"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_sepc"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_scause"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_stval"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_satp"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_fflags"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_frm"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mcycle"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_minstret"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_0"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_1"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_2"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_3"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_4"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_5"
-  },
-  {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_6"
+    "class":"freechips.rocketchip.util.RegFieldDescMappingAnnotation",
+    "target":"Rift2Chip.DebugModule",
+    "regMappingSer":{
+      "displayName":"DebugModule",
+      "deviceName":"DebugModule",
+      "baseAddress":0,
+      "regFields":[
+        {
+          "byteOffset":"0x100",
+          "bitOffset":0,
+          "bitWidth":32,
+          "name":"debug_hart_halted",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Debug ROM Causes hart to write its hartID here when it is in Debug Mode.",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x104",
+          "bitOffset":0,
+          "bitWidth":32,
+          "name":"debug_hart_going",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Debug ROM causes hart to write 0 here when it begins executing Debug Mode instructions.",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x108",
+          "bitOffset":0,
+          "bitWidth":32,
+          "name":"debug_hart_resuming",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Debug ROM causes hart to write its hartID here when it leaves Debug Mode.",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x10c",
+          "bitOffset":0,
+          "bitWidth":32,
+          "name":"debug_hart_exception",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Debug ROM causes hart to write 0 here if it gets an exception in Debug Mode.",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x300",
+          "bitOffset":0,
+          "bitWidth":32,
+          "name":"debug_whereto",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Instruction filled in by Debug Module to control hart in Debug Mode",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x320",
+          "bitOffset":0,
+          "bitWidth":32,
+          "name":"unnamedRegField320_0",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x320",
+          "bitOffset":32,
+          "bitWidth":32,
+          "name":"unnamedRegField320_32",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x320",
+          "bitOffset":64,
+          "bitWidth":32,
+          "name":"unnamedRegField320_64",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x320",
+          "bitOffset":96,
+          "bitWidth":32,
+          "name":"unnamedRegField320_96",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x320",
+          "bitOffset":128,
+          "bitWidth":32,
+          "name":"unnamedRegField320_128",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x320",
+          "bitOffset":160,
+          "bitWidth":32,
+          "name":"unnamedRegField320_160",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x320",
+          "bitOffset":192,
+          "bitWidth":32,
+          "name":"unnamedRegField320_192",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x320",
+          "bitOffset":224,
+          "bitWidth":32,
+          "name":"unnamedRegField320_224",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x340",
+          "bitOffset":0,
+          "bitWidth":32,
+          "name":"NA",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"NA",
+          "group":"debug_progbuf",
+          "groupDesc":"Program buffer used to communicate with Debug Module",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x340",
+          "bitOffset":32,
+          "bitWidth":32,
+          "name":"NA",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"NA",
+          "group":"debug_progbuf",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x340",
+          "bitOffset":64,
+          "bitWidth":32,
+          "name":"NA",
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+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":600,
+          "bitWidth":8,
+          "name":"unnamedRegField800_600",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":608,
+          "bitWidth":8,
+          "name":"unnamedRegField800_608",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":616,
+          "bitWidth":8,
+          "name":"unnamedRegField800_616",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":624,
+          "bitWidth":8,
+          "name":"unnamedRegField800_624",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":632,
+          "bitWidth":8,
+          "name":"unnamedRegField800_632",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":640,
+          "bitWidth":8,
+          "name":"unnamedRegField800_640",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":648,
+          "bitWidth":8,
+          "name":"unnamedRegField800_648",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":656,
+          "bitWidth":8,
+          "name":"unnamedRegField800_656",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":664,
+          "bitWidth":8,
+          "name":"unnamedRegField800_664",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":672,
+          "bitWidth":8,
+          "name":"unnamedRegField800_672",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":680,
+          "bitWidth":8,
+          "name":"unnamedRegField800_680",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":688,
+          "bitWidth":8,
+          "name":"unnamedRegField800_688",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":696,
+          "bitWidth":8,
+          "name":"unnamedRegField800_696",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":704,
+          "bitWidth":8,
+          "name":"unnamedRegField800_704",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":712,
+          "bitWidth":8,
+          "name":"unnamedRegField800_712",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":720,
+          "bitWidth":8,
+          "name":"unnamedRegField800_720",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":728,
+          "bitWidth":8,
+          "name":"unnamedRegField800_728",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":736,
+          "bitWidth":8,
+          "name":"unnamedRegField800_736",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":744,
+          "bitWidth":8,
+          "name":"unnamedRegField800_744",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":752,
+          "bitWidth":8,
+          "name":"unnamedRegField800_752",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":760,
+          "bitWidth":8,
+          "name":"unnamedRegField800_760",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":768,
+          "bitWidth":8,
+          "name":"unnamedRegField800_768",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":776,
+          "bitWidth":8,
+          "name":"unnamedRegField800_776",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":784,
+          "bitWidth":8,
+          "name":"unnamedRegField800_784",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":792,
+          "bitWidth":8,
+          "name":"unnamedRegField800_792",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":800,
+          "bitWidth":8,
+          "name":"unnamedRegField800_800",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":808,
+          "bitWidth":8,
+          "name":"unnamedRegField800_808",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":816,
+          "bitWidth":8,
+          "name":"unnamedRegField800_816",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x800",
+          "bitOffset":824,
+          "bitWidth":8,
+          "name":"unnamedRegField800_824",
+          "resetValue":0,
+          "accessType":"None",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"None",
+          "group":"None",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        }
+      ]
+    }
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_7"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_2",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_8"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_3",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_9"
+    "class":"freechips.rocketchip.util.RegFieldDescMappingAnnotation",
+    "target":"Rift2Chip.AClint",
+    "regMappingSer":{
+      "displayName":"AClint",
+      "deviceName":"AClint",
+      "baseAddress":131072,
+      "regFields":[
+        {
+          "byteOffset":"0x0",
+          "bitOffset":0,
+          "bitWidth":64,
+          "name":"mtimecmp_0",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"mtimecmp_0",
+          "group":"mtimecmp",
+          "groupDesc":"MTIMECMP for hart x",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x8000",
+          "bitOffset":0,
+          "bitWidth":64,
+          "name":"mtime",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"mtime",
+          "group":"mtime",
+          "groupDesc":"Timer Register",
+          "volatile":true,
+          "hasReset":true,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x9000",
+          "bitOffset":0,
+          "bitWidth":1,
+          "name":"msip_0",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"MSIP bit for Hart 0",
+          "group":"msip",
+          "groupDesc":"MSIP Bits",
+          "volatile":false,
+          "hasReset":true,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0xa000",
+          "bitOffset":0,
+          "bitWidth":1,
+          "name":"ssip_0",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"SSIP bit for Hart 0",
+          "group":"ssip",
+          "groupDesc":"SSIP Bits",
+          "volatile":false,
+          "hasReset":true,
+          "enumerations":{
+            
+          }
+        }
+      ]
+    }
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_10"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_4",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_11"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_5",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_12"
+    "class":"freechips.rocketchip.util.RegFieldDescMappingAnnotation",
+    "target":"Rift2Chip.Plic",
+    "regMappingSer":{
+      "displayName":"Plic",
+      "deviceName":"Plic",
+      "baseAddress":268435456,
+      "regFields":[
+        {
+          "byteOffset":"0x0",
+          "bitOffset":0,
+          "bitWidth":32,
+          "name":"reserved",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"",
+          "group":"priority",
+          "groupDesc":"Acting priority of interrupt source",
+          "volatile":false,
+          "hasReset":true,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x0",
+          "bitOffset":32,
+          "bitWidth":32,
+          "name":"priority_0",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 0",
+          "group":"priority",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x0",
+          "bitOffset":64,
+          "bitWidth":32,
+          "name":"priority_1",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 1",
+          "group":"priority",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x0",
+          "bitOffset":96,
+          "bitWidth":32,
+          "name":"priority_2",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 2",
+          "group":"priority",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x0",
+          "bitOffset":128,
+          "bitWidth":32,
+          "name":"priority_3",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 3",
+          "group":"priority",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x0",
+          "bitOffset":160,
+          "bitWidth":32,
+          "name":"priority_4",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 4",
+          "group":"priority",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x0",
+          "bitOffset":192,
+          "bitWidth":32,
+          "name":"priority_5",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 5",
+          "group":"priority",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
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+          "group":"priority",
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+          "desc":"Acting priority of interrupt source 11",
+          "group":"priority",
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+          "bitOffset":416,
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+          "group":"priority",
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+          "group":"priority",
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+          "bitOffset":480,
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+          "group":"priority",
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+          "group":"priority",
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+          "desc":"Acting priority of interrupt source 16",
+          "group":"priority",
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+          "bitOffset":576,
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+          "desc":"Acting priority of interrupt source 17",
+          "group":"priority",
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+          "bitOffset":608,
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+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 18",
+          "group":"priority",
+          "groupDesc":"None",
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+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
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+          "byteOffset":"0x0",
+          "bitOffset":640,
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+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 19",
+          "group":"priority",
+          "groupDesc":"None",
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+        },
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+          "bitOffset":672,
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+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 20",
+          "group":"priority",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
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+          "byteOffset":"0x0",
+          "bitOffset":704,
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+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 21",
+          "group":"priority",
+          "groupDesc":"None",
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+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x0",
+          "bitOffset":736,
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+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 22",
+          "group":"priority",
+          "groupDesc":"None",
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+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x0",
+          "bitOffset":768,
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+          "name":"priority_23",
+          "resetValue":0,
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+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 23",
+          "group":"priority",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
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+          "byteOffset":"0x0",
+          "bitOffset":800,
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+          "name":"priority_24",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 24",
+          "group":"priority",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
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+          "byteOffset":"0x0",
+          "bitOffset":832,
+          "bitWidth":32,
+          "name":"priority_25",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 25",
+          "group":"priority",
+          "groupDesc":"None",
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+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
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+          "byteOffset":"0x0",
+          "bitOffset":864,
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+          "name":"priority_26",
+          "resetValue":0,
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+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 26",
+          "group":"priority",
+          "groupDesc":"None",
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+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
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+          "byteOffset":"0x0",
+          "bitOffset":896,
+          "bitWidth":32,
+          "name":"priority_27",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 27",
+          "group":"priority",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
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+          "byteOffset":"0x0",
+          "bitOffset":928,
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+          "name":"priority_28",
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+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 28",
+          "group":"priority",
+          "groupDesc":"None",
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+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
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+          "byteOffset":"0x0",
+          "bitOffset":960,
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+          "name":"priority_29",
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+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 29",
+          "group":"priority",
+          "groupDesc":"None",
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+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
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+          "byteOffset":"0x0",
+          "bitOffset":992,
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+          "name":"priority_30",
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+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Acting priority of interrupt source 30",
+          "group":"priority",
+          "groupDesc":"None",
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+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":0,
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+          "group":"pending",
+          "groupDesc":"Pending Bit Array. 1 Bit for each interrupt source.",
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+          "hasReset":true,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":1,
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+          "name":"pending_0",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 0 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
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+          "enumerations":{
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+        },
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+          "byteOffset":"0x1000",
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+          "name":"pending_1",
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+          "accessType":"R",
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+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 1 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
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+          "enumerations":{
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+        },
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+          "name":"pending_2",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 2 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":4,
+          "bitWidth":1,
+          "name":"pending_3",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 3 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":5,
+          "bitWidth":1,
+          "name":"pending_4",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 4 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":6,
+          "bitWidth":1,
+          "name":"pending_5",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 5 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":7,
+          "bitWidth":1,
+          "name":"pending_6",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 6 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":8,
+          "bitWidth":1,
+          "name":"pending_7",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 7 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":9,
+          "bitWidth":1,
+          "name":"pending_8",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 8 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":10,
+          "bitWidth":1,
+          "name":"pending_9",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 9 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":11,
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+          "name":"pending_10",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 10 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
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+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":12,
+          "bitWidth":1,
+          "name":"pending_11",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 11 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":13,
+          "bitWidth":1,
+          "name":"pending_12",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 12 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":14,
+          "bitWidth":1,
+          "name":"pending_13",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 13 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":15,
+          "bitWidth":1,
+          "name":"pending_14",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 14 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":16,
+          "bitWidth":1,
+          "name":"pending_15",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 15 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":17,
+          "bitWidth":1,
+          "name":"pending_16",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 16 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":18,
+          "bitWidth":1,
+          "name":"pending_17",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 17 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":19,
+          "bitWidth":1,
+          "name":"pending_18",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 18 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":20,
+          "bitWidth":1,
+          "name":"pending_19",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 19 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":21,
+          "bitWidth":1,
+          "name":"pending_20",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 20 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":22,
+          "bitWidth":1,
+          "name":"pending_21",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 21 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
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+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":23,
+          "bitWidth":1,
+          "name":"pending_22",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 22 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":24,
+          "bitWidth":1,
+          "name":"pending_23",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 23 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":25,
+          "bitWidth":1,
+          "name":"pending_24",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 24 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":26,
+          "bitWidth":1,
+          "name":"pending_25",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 25 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":27,
+          "bitWidth":1,
+          "name":"pending_26",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 26 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":28,
+          "bitWidth":1,
+          "name":"pending_27",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 27 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":29,
+          "bitWidth":1,
+          "name":"pending_28",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 28 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":30,
+          "bitWidth":1,
+          "name":"pending_29",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 29 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x1000",
+          "bitOffset":31,
+          "bitWidth":1,
+          "name":"pending_30",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set to 1 if interrupt source 30 is pending, regardless of its enable or priority setting.",
+          "group":"pending",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":0,
+          "bitWidth":1,
+          "name":"reserved",
+          "resetValue":0,
+          "accessType":"R",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"",
+          "group":"enables_0",
+          "groupDesc":"Enable bits for each interrupt source for target 0. 1 bit for each interrupt source.",
+          "volatile":false,
+          "hasReset":true,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":1,
+          "bitWidth":1,
+          "name":"enables_0",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":2,
+          "bitWidth":1,
+          "name":"enables_1",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":3,
+          "bitWidth":1,
+          "name":"enables_2",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":4,
+          "bitWidth":1,
+          "name":"enables_3",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":5,
+          "bitWidth":1,
+          "name":"enables_4",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":6,
+          "bitWidth":1,
+          "name":"enables_5",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":7,
+          "bitWidth":1,
+          "name":"enables_6",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":8,
+          "bitWidth":1,
+          "name":"enables_7",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":9,
+          "bitWidth":1,
+          "name":"enables_8",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":10,
+          "bitWidth":1,
+          "name":"enables_9",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":11,
+          "bitWidth":1,
+          "name":"enables_10",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":12,
+          "bitWidth":1,
+          "name":"enables_11",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":13,
+          "bitWidth":1,
+          "name":"enables_12",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":14,
+          "bitWidth":1,
+          "name":"enables_13",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":15,
+          "bitWidth":1,
+          "name":"enables_14",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":16,
+          "bitWidth":1,
+          "name":"enables_15",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":17,
+          "bitWidth":1,
+          "name":"enables_16",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":18,
+          "bitWidth":1,
+          "name":"enables_17",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":19,
+          "bitWidth":1,
+          "name":"enables_18",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":20,
+          "bitWidth":1,
+          "name":"enables_19",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":21,
+          "bitWidth":1,
+          "name":"enables_20",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":22,
+          "bitWidth":1,
+          "name":"enables_21",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":23,
+          "bitWidth":1,
+          "name":"enables_22",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":24,
+          "bitWidth":1,
+          "name":"enables_23",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":25,
+          "bitWidth":1,
+          "name":"enables_24",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":26,
+          "bitWidth":1,
+          "name":"enables_25",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":27,
+          "bitWidth":1,
+          "name":"enables_26",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":28,
+          "bitWidth":1,
+          "name":"enables_27",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":29,
+          "bitWidth":1,
+          "name":"enables_28",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":30,
+          "bitWidth":1,
+          "name":"enables_29",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x2000",
+          "bitOffset":31,
+          "bitWidth":1,
+          "name":"enables_30",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Set bits to 1 if interrupt should be enabled.",
+          "group":"enables_0",
+          "groupDesc":"None",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x200000",
+          "bitOffset":0,
+          "bitWidth":32,
+          "name":"threshold_0",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"None",
+          "rdAction":"None",
+          "desc":"Interrupt & claim threshold for target 0. Maximum value is 8.",
+          "group":"hart_0",
+          "groupDesc":"hart_0",
+          "volatile":false,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        },
+        {
+          "byteOffset":"0x200000",
+          "bitOffset":32,
+          "bitWidth":32,
+          "name":"claim_complete_0",
+          "resetValue":0,
+          "accessType":"RW",
+          "wrType":"Some(MODIFY)",
+          "rdAction":"Some(MODIFY)",
+          "desc":"Claim/Complete register for Target 0. Reading this register returns the claimed interrupt number and makes it no longer pending.Writing the interrupt number back completes the interrupt.",
+          "group":"hart_0",
+          "groupDesc":"None",
+          "volatile":true,
+          "hasReset":false,
+          "enumerations":{
+            
+          }
+        }
+      ]
+    }
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_13"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_6",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_14"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_7",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_15"
+    "class":"freechips.rocketchip.util.SRAMAnnotation",
+    "target":"Rift2Chip.Directory.cc_dir",
+    "address_width":6,
+    "name":"cc_dir",
+    "data_width":48,
+    "depth":64,
+    "description":"Directory RAM",
+    "write_mask_granularity":24
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_16"
+    "class":"freechips.rocketchip.util.SRAMAnnotation",
+    "target":"Rift2Chip.BankedStore.cc_banks_0",
+    "address_width":6,
+    "name":"cc_banks_0",
+    "data_width":128,
+    "depth":64,
+    "description":"Banked Store",
+    "write_mask_granularity":128
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_17"
+    "class":"freechips.rocketchip.util.SRAMAnnotation",
+    "target":"Rift2Chip.BankedStore.cc_banks_1",
+    "address_width":6,
+    "name":"cc_banks_1",
+    "data_width":128,
+    "depth":64,
+    "description":"Banked Store",
+    "write_mask_granularity":128
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_18"
+    "class":"freechips.rocketchip.util.SRAMAnnotation",
+    "target":"Rift2Chip.BankedStore.cc_banks_2",
+    "address_width":6,
+    "name":"cc_banks_2",
+    "data_width":128,
+    "depth":64,
+    "description":"Banked Store",
+    "write_mask_granularity":128
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_19"
+    "class":"freechips.rocketchip.util.SRAMAnnotation",
+    "target":"Rift2Chip.BankedStore.cc_banks_3",
+    "address_width":6,
+    "name":"cc_banks_3",
+    "data_width":128,
+    "depth":64,
+    "description":"Banked Store",
+    "write_mask_granularity":128
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_20"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_8",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_21"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_9",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_22"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_10",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_23"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_11",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_24"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_12",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_25"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_13",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_26"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_14",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_27"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_15",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_28"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_16",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_29"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_17",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_30"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_18",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|diff>io_csr_mhpmcounter_31"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_19",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|SRT4Divider>dividendIdx"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_20",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_0_0"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_21",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_0_1"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_22",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_0_2"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_23",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_0_3"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_24",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_1_0"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_25",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_1_1"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_26",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_1_2"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_27",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_1_3"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_28",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_2_0"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_29",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_2_1"
+    "class":"firrtl.passes.InlineAnnotation",
+    "target":"Rift2Chip.TLWidthWidget"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_2_2"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_30",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_2_3"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_31",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_3_0"
+    "class":"firrtl.passes.InlineAnnotation",
+    "target":"Rift2Chip.TLWidthWidget_1"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_3_1"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_32",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_3_2"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_33",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_3_3"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_34",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_4_0"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_35",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_4_1"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_36",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_4_2"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_37",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_4_3"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_38",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_5_0"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_39",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_5_1"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_40",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_5_2"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_41",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_5_3"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_42",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_6_0"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_43",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_6_1"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_44",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_6_2"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_45",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_6_3"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_46",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_7_0"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_47",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_7_1"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_48",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_7_2"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_49",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_7_3"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_50",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_8_0"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_51",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_8_1"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_52",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_8_2"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_53",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_8_3"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_54",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_9_0"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_55",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_9_1"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_56",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_9_2"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_57",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_9_3"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_58",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_10_0"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_59",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_10_1"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_60",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_10_2"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_61",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_10_3"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_62",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_11_0"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_63",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_11_1"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_64",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_11_2"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_65",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.DontTouchAnnotation",
-    "target":"~Rift2Chip|Issue>bufReqNum_11_3"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_66",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.BlackBoxTargetDirAnno",
-    "targetDir":"generated/Debug/Rift2360"
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_67",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.CombinationalPath",
-    "sink":"~Rift2Chip|Rift2Chip>memory_0_b_ready",
-    "sources":[
-      "~Rift2Chip|Rift2Chip>memory_0_b_bits_id"
-    ]
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_68",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.CombinationalPath",
-    "sink":"~Rift2Chip|Rift2Chip>system_0_b_ready",
-    "sources":[
-      "~Rift2Chip|Rift2Chip>system_0_b_bits_id",
-      "~Rift2Chip|Rift2Chip>system_0_b_valid"
-    ]
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_69",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.CombinationalPath",
-    "sink":"~Rift2Chip|Rift2Chip>memory_0_r_ready",
-    "sources":[
-      "~Rift2Chip|Rift2Chip>memory_0_r_bits_id"
-    ]
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_70",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   },
   {
-    "class":"firrtl.transforms.CombinationalPath",
-    "sink":"~Rift2Chip|Rift2Chip>system_0_r_ready",
-    "sources":[
-      "~Rift2Chip|Rift2Chip>system_0_r_bits_id"
-    ]
+    "class":"firrtl.transforms.BlackBoxInlineAnno",
+    "target":"Rift2Chip.plusarg_reader_71",
+    "name":"plusarg_reader.v",
+    "text":"// See LICENSE.SiFive for license details.\n\n//VCS coverage exclude_file\n\n// No default parameter values are intended, nor does IEEE 1800-2012 require them (clause A.2.4 param_assignment),\n// but Incisive demands them. These default values should never be used.\nmodule plusarg_reader #(\n   parameter FORMAT=\"borked=%d\",\n   parameter WIDTH=1,\n   parameter [WIDTH-1:0] DEFAULT=0\n) (\n   output [WIDTH-1:0] out\n);\n\n`ifdef SYNTHESIS\nassign out = DEFAULT;\n`else\nreg [WIDTH-1:0] myplus;\nassign out = myplus;\n\ninitial begin\n   if (!$value$plusargs(FORMAT, myplus)) myplus = DEFAULT;\nend\n`endif\n\nendmodule\n"
   }
 ]
\ No newline at end of file
diff --git a/generated/Debug/Rift2360/isa.json b/generated/Debug/Rift2360/isa.json
index 5042b9fe..310ea2e1 100644
--- a/generated/Debug/Rift2360/isa.json
+++ b/generated/Debug/Rift2360/isa.json
@@ -1,6 +1,6 @@
 {
   "schemaVersion": 1, 
   "label": "", 
-  "message": "Pass", 
-  "color": "f6bf94" 
+  "message": "Failed", 
+  "color": "red" 
 }