nano4k_spi_nor_flash.gprj

<?xml version="1" encoding="UTF-8"?>
<!DOCTYPE gowin-fpga-project>
<Project>
    <Template>FPGA</Template>
    <Version>5</Version>
    <Device name="GW1NSR-4C" pn="GW1NSR-LV4CQN48PC6/I5">gw1nsr4c-000</Device>
    <FileList>
        <File path="src/gowin_clkdiv/gowin_clkdiv.v" type="file.verilog" enable="1"/>
        <File path="src/nano4k_spi_flash.v" type="file.verilog" enable="1"/>
        <File path="src/nano4k_spi_flash_top.v" type="file.verilog" enable="1"/>
        <File path="src/nano4k_spi_nor_flash.cst" type="file.cst" enable="1"/>
        <File path="src/nano4k_spi_nor_flash.sdc" type="file.sdc" enable="0"/>
        <File path="src/nano4k_spi_nor_flash.rao" type="file.gao" enable="1"/>
    </FileList>
</Project>