FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool
An automatic traffic light controller is designed and simulated using the concept of Finite State Machine in ModelSim.
A full hardware implementation of the AES using Verilog, supporting SPI communication between all modules.
This repository contains the solutions of the problems given on HDLbits site.
Verilog practice and solutions on HDLBits website
This repository focuses on designing and simulating logical circuits using Verilog HDL (Hardware Description Language) with the Icarus Verilog simulator.
Compilation of Verilog behavioral models and test benches for the four types of flip-flops (SR, JK, D, and T)
This repository contains the verilog implementation of basic combinational and sequential digital circuits.
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