From fff016450c67cd5b2454c04dc9c2c6475acf79e7 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Tue, 17 Sep 2024 15:27:48 +0300 Subject: [PATCH] ASoC: SOF: Intel: hda-stream: Always use at least two BDLE for transfers The HDA specification states that the SDnLVI (Last Valid Index) must be at least 1 (two BDLE entry). While the LVI=0 worked so far without issues, it is better to align with the specification to avoid unforeseen issues with FW loading. Signed-off-by: Peter Ujfalusi --- sound/soc/sof/intel/hda-stream.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/sound/soc/sof/intel/hda-stream.c b/sound/soc/sof/intel/hda-stream.c index 3ac63ce67ab1ce..b260d97dbcb063 100644 --- a/sound/soc/sof/intel/hda-stream.c +++ b/sound/soc/sof/intel/hda-stream.c @@ -120,8 +120,14 @@ int hda_dsp_stream_setup_bdl(struct snd_sof_dev *sdev, period_bytes = hstream->period_bytes; dev_dbg(sdev->dev, "period_bytes:0x%x\n", period_bytes); + /* + * HDA spec demands at least two 'periods' for the DMA to work correctly + * Note: period_bytes == 0 can only happen for firmware or library + * loading, the binary sizes have the necessary alignment requirements + * met + */ if (!period_bytes) - period_bytes = hstream->bufsize; + period_bytes = hstream->bufsize / 2; periods = hstream->bufsize / period_bytes;