From 2432884d8affb70f32235eee8cc2fb87326ca24f Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Thu, 10 Jul 2025 12:25:49 +0200 Subject: [PATCH 1/2] system(wb) update STM32WBxx HAL Drivers to v1.14.6 Included in STM32CubeWB FW v1.23.0 Signed-off-by: Frederic Pillon --- .../Inc/Legacy/stm32_hal_legacy.h | 9 +- .../Inc/stm32wbxx_hal_lptim.h | 4 +- .../Inc/stm32wbxx_hal_smartcard.h | 6 +- .../Inc/stm32wbxx_ll_iwdg.h | 14 +- .../STM32WBxx_HAL_Driver/Release_Notes.html | 199 +++++++++++------- .../STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c | 2 +- .../Src/stm32wbxx_hal_i2c.c | 79 ++++--- .../Src/stm32wbxx_hal_iwdg.c | 3 +- .../Src/stm32wbxx_hal_pcd.c | 46 ++-- .../Src/stm32wbxx_hal_rtc.c | 6 +- .../Src/stm32wbxx_hal_smartcard.c | 2 +- .../Src/stm32wbxx_hal_smbus.c | 4 +- .../Src/stm32wbxx_hal_spi.c | 61 +++--- .../Src/stm32wbxx_ll_usb.c | 3 + .../Drivers/STM32YYxx_HAL_Driver_version.md | 2 +- 15 files changed, 275 insertions(+), 165 deletions(-) diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h index 239193263b..51ba1ee6e6 100644 --- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h +++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h @@ -564,6 +564,9 @@ extern "C" { #define OB_nBOOT0_RESET OB_NBOOT0_RESET #define OB_nBOOT0_SET OB_NBOOT0_SET #endif /* STM32U0 */ +#if defined(STM32H5) +#define FLASH_ECC_AREA_EDATA FLASH_ECC_AREA_EDATA_BANK1 +#endif /* STM32H5 */ /** * @} @@ -3698,10 +3701,8 @@ extern "C" { #define RCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK #endif - #if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \ - defined(STM32WL) || defined(STM32C0) || defined(STM32N6) || defined(STM32H7RS) || \ - defined(STM32U0) + defined(STM32WL) || defined(STM32C0) || defined(STM32N6) || defined(STM32H7RS) || defined(STM32U0) #define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE #else #define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK @@ -3952,7 +3953,7 @@ extern "C" { */ #if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \ defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \ - defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) || \ + defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) || \ defined (STM32U0) || defined (STM32U3) #else #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_lptim.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_lptim.h index 24449219e3..8339c54251 100644 --- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_lptim.h +++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_lptim.h @@ -441,6 +441,7 @@ typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim); /*!< poin * @brief Write the passed parameter in the Autoreload register. * @param __HANDLE__ LPTIM handle * @param __VALUE__ Autoreload value + * This parameter must be a value between Min_Data = 0x0001 and Max_Data = 0xFFFF. * @retval None * @note The ARR register can only be modified when the LPTIM instance is enabled. */ @@ -763,9 +764,6 @@ HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(const LPTIM_HandleTypeDef *hlptim); #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \ ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL)) -#define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((0x00000001UL <= (__AUTORELOAD__)) &&\ - ((__AUTORELOAD__) <= 0x0000FFFFUL)) - #define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFUL) #define IS_LPTIM_PERIOD(__PERIOD__) ((0x00000001UL <= (__PERIOD__)) &&\ diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_smartcard.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_smartcard.h index 1cd40b2a1b..9a58c83a92 100644 --- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_smartcard.h +++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_smartcard.h @@ -721,13 +721,13 @@ typedef enum */ #define __HAL_SMARTCARD_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((__INTERRUPT__) & SMARTCARD_CR_MASK) >>\ SMARTCARD_CR_POS) == 1U)?\ - ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ + ((__HANDLE__)->Instance->CR1 &= ~ (1UL <<\ ((__INTERRUPT__) & SMARTCARD_IT_MASK))): \ ((((__INTERRUPT__) & SMARTCARD_CR_MASK) >>\ SMARTCARD_CR_POS) == 2U)?\ - ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ + ((__HANDLE__)->Instance->CR2 &= ~ (1UL <<\ ((__INTERRUPT__) & SMARTCARD_IT_MASK))): \ - ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ + ((__HANDLE__)->Instance->CR3 &= ~ (1UL <<\ ((__INTERRUPT__) & SMARTCARD_IT_MASK)))) /** @brief Check whether the specified SmartCard interrupt has occurred or not. diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_iwdg.h b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_iwdg.h index e960d1d4c4..385f51858d 100644 --- a/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_iwdg.h +++ b/system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_iwdg.h @@ -208,7 +208,7 @@ __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescale * @arg @ref LL_IWDG_PRESCALER_128 * @arg @ref LL_IWDG_PRESCALER_256 */ -__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(const IWDG_TypeDef *IWDGx) { return (READ_REG(IWDGx->PR)); } @@ -231,7 +231,7 @@ __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Coun * @param IWDGx IWDG Instance * @retval Value between Min_Data=0 and Max_Data=0x0FFF */ -__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(const IWDG_TypeDef *IWDGx) { return (READ_REG(IWDGx->RLR)); } @@ -254,7 +254,7 @@ __STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window) * @param IWDGx IWDG Instance * @retval Value between Min_Data=0 and Max_Data=0x0FFF */ -__STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_GetWindow(const IWDG_TypeDef *IWDGx) { return (READ_REG(IWDGx->WINR)); } @@ -273,7 +273,7 @@ __STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx) * @param IWDGx IWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(const IWDG_TypeDef *IWDGx) { return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL); } @@ -284,7 +284,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx) * @param IWDGx IWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(const IWDG_TypeDef *IWDGx) { return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL); } @@ -295,7 +295,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx) * @param IWDGx IWDG Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(const IWDG_TypeDef *IWDGx) { return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL); } @@ -308,7 +308,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx) * @param IWDGx IWDG Instance * @retval State of bits (1 or 0). */ -__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx) +__STATIC_INLINE uint32_t LL_IWDG_IsReady(const IWDG_TypeDef *IWDGx) { return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL); } diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Release_Notes.html b/system/Drivers/STM32WBxx_HAL_Driver/Release_Notes.html index dda188cccb..87ae8f1f29 100644 --- a/system/Drivers/STM32WBxx_HAL_Driver/Release_Notes.html +++ b/system/Drivers/STM32WBxx_HAL_Driver/Release_Notes.html @@ -40,7 +40,7 @@

Purpose

Update History

- +

Main Changes

    @@ -50,6 +50,57 @@

    Main Changes

    Contents

    HAL Drivers updates

      +
    • HAL IWDG driver +
        +
      • Calculate the maximum IWDG Timeout period “HAL_IWDG_DEFAULT_TIMEOUT”, based on a Prescaler=128 at LSI frequency=32kHz.
        • +
      • +
    • HAL I2C driver +
        +
      • Move variable tmp declaration at the beginning in I2C_TransferCofig function.
        • +
      • Update function HAL_I2C_IsDeviceReady() to take into account the number of trials
        • +
      • Remove extra parenthesis in c files for driver HAL I2C and SMBUS
        • +
      • +
    • HAL SPI driver +
        +
      • Avoid buffer overflow in SPI_WaitFifoStateUntilTimeout().
        • +
      • Update function HAL_I2C_IsDeviceReady() to take into account the number of trials.
        • +
      • Fix INTEGER_OVERFLOW Coverity warning
        • +
      • Add note to clarify HAL_SPI_Receive() behavior in master mode
        • +
      • Add units to physical measurements
        • +
      • +
    • HAL RTC driver +
        +
      • Expand the cast of ‘RTC_CR_BYPSHAD’ to 32 bits when writing to the CR register in HAL_RTCEx_DisableBypassShadow() to avoid overwriting its upper bits.
        • +
      • Fix CONSTANT_EXPRESSION_RESULT/UNUSED_VALUE Coverity warnings.
        • +
      • +
    • HAL TIM driver +
        +
      • Update TIM_CCER_CCxE_MASK to support internal TIM Channel5 and TIM Channel6.
        • +
      • +
    +

    LL Drivers updates

    +
      +
    • LL IWDG driver +
        +
      • Fix MISRAC2012 Rule 8.13 errors
        +
        • +
      • +
    +

    Backward Compatibility

    +

    This release is compatible with the previous versions.

    +
+
+
+ +
+

Main Changes

+
    +
  • Maintenance release of HAL and Low Layer drivers to include latest corrections
    • +
  • HAL/LL code quality enhancement
    • +
+

Contents

+

HAL Drivers updates

+
  • HAL RNG driver
    • Update Distinguish error coming from RecoverSeedError or from SeedError.
      • @@ -79,7 +130,7 @@

      HAL Drivers updates

    • Fix update flag (UIF) clearing in TIM_Base_SetConfig
-

LL Drivers updates

+

LL Drivers updates

  • LL LPUART driver
      @@ -89,20 +140,20 @@

      LL Drivers updates


    -

    Backward Compatibility

    +

    Backward Compatibility

    This release is compatible with the previous versions.

-

Main Changes

+

Main Changes

  • Maintenance release of HAL and Low Layer drivers to include latest corrections
  • HAL/LL code quality enhancement
-

Contents

-

HAL Drivers updates

+

Contents

+

HAL Drivers updates

  • HAL ADC driver
      @@ -126,7 +177,7 @@

      HAL Drivers updates

    • Fix added to support bulk transfer in double buffer mode
-

LL Drivers updates

+

LL Drivers updates

  • LL ADC driver
      @@ -143,20 +194,20 @@

      LL Drivers updates


    -

    Backward Compatibility

    +

    Backward Compatibility

    This release is compatible with the previous versions.

-

Main Changes

+

Main Changes

  • Maintenance release of HAL and Low Layer drivers to include latest corrections
  • HAL/LL code quality enhancement
-

Contents

-

HAL Drivers updates

+

Contents

+

HAL Drivers updates

  • HAL CRYP driver
      @@ -186,7 +237,7 @@

      HAL Drivers updates


    -

    LL Drivers updates

    +

    LL Drivers updates

    • LL LPUART driver
        @@ -199,20 +250,20 @@

        LL Drivers updates


      -

      Backward Compatibility

      +

      Backward Compatibility

      This release is compatible with the previous versions.

-

Main Changes

+

Main Changes

  • Maintenance release of HAL and Low Layer drivers to include latest corrections
  • HAL/LL code quality enhancement
-

Contents

-

HAL Drivers updates

+

Contents

+

HAL Drivers updates

  • HAL GPIO driver
      @@ -252,7 +303,7 @@

      HAL Drivers updates


    -

    LL Drivers updates

    +

    LL Drivers updates

    • LL UTILS driver
        @@ -261,20 +312,20 @@

        LL Drivers updates


      -

      Backward Compatibility

      +

      Backward Compatibility

      This release is compatible with the previous versions.

-

Main Changes

+

Main Changes

  • Maintenance release of HAL and Low Layer drivers to include latest corrections
  • HAL/LL code quality enhancement
-

Contents

-

HAL Drivers updates

+

Contents

+

HAL Drivers updates

  • HAL I2C driver
      @@ -309,7 +360,7 @@

      HAL Drivers updates


    -

    LL Drivers updates

    +

    LL Drivers updates

    • LL I2C driver
        @@ -327,20 +378,20 @@

        LL Drivers updates


      -

      Backward Compatibility

      +

      Backward Compatibility

      This release is compatible with the previous versions.

-

Main Changes

+

Main Changes

  • Maintenance release of HAL and Low Layer drivers to include latest corrections
  • HAL/LL code quality enhancement
-

Contents

-

HAL Drivers updates

+

Contents

+

HAL Drivers updates

  • HAL CRYP driver
      @@ -379,7 +430,7 @@

      HAL Drivers updates


    -

    LL Drivers updates

    +

    LL Drivers updates

    • LL USB driver
        @@ -388,20 +439,20 @@

        LL Drivers updates


      -

      Backward Compatibility

      +

      Backward Compatibility

      This release is compatible with the previous versions.

-

Main Changes

+

Main Changes

  • Maintenance release of HAL and Low Layer drivers to include latest corrections
  • HAL/LL code quality enhancement
-

Contents

-

HAL Drivers updates

+

Contents

+

HAL Drivers updates

  • HAL FLASH driver
      @@ -432,20 +483,20 @@

      HAL Drivers updates


    -

    Backward Compatibility

    +

    Backward Compatibility

    This release is compatible with the previous versions.

-

Main Changes

+

Main Changes

  • Maintenance release of HAL and Low Layer drivers to include latest corrections
  • Remove HAL_LOCK/HAL_UNLOCK calls in HAL_xxxx_RegisterCallback & HAL_xxxx_UnregisterCallback for IPs (IRDA, LPTIM, SMARTCARD, TIM, UART, USART)
-

Contents

-

HAL Drivers updates

+

Contents

+

HAL Drivers updates

  • HAL ADC driver
      @@ -492,7 +543,7 @@

      HAL Drivers updates


    -

    LL Drivers updates

    +

    LL Drivers updates

    • LL ADC driver
        @@ -513,20 +564,20 @@

        LL Drivers updates


      -

      Backward Compatibility

      +

      Backward Compatibility

      This release is compatible with the previous versions.

-

Main Changes

+

Main Changes

  • Maintenance release of HAL and Low Layer drivers to include latest corrections
  • Correct English spelling errors and typos
-

Contents

-

HAL Drivers updates

+

Contents

+

HAL Drivers updates

  • HAL EXTI driver
      @@ -602,7 +653,7 @@

      HAL Drivers updates


    -

    LL Drivers updates

    +

    LL Drivers updates

    • LL I2C driver
        @@ -638,19 +689,19 @@

        LL Drivers updates


      -

      Backward Compatibility

      +

      Backward Compatibility

      This release is compatible with the previous versions.

-

Main Changes

+

Main Changes

  • Patch release of HAL and Low Layer drivers
-

Contents

-

HAL Drivers updates

+

Contents

+

HAL Drivers updates

  • HAL COMP driver
      @@ -659,7 +710,7 @@

      HAL Drivers updates


    -

    LL Drivers updates

    +

    LL Drivers updates

    • LL COMP driver
        @@ -668,21 +719,21 @@

        LL Drivers updates


      -

      Backward Compatibility

      +

      Backward Compatibility

      This release is compatible with the previous versions.

-

Main Changes

+

Main Changes

  • Maintenance release of HAL and Low Layer drivers to include latest corrections
  • All source files: update disclaimer to add reference to the new license agreement
  • Correct English spelling errors and typos
-

Contents

-

HAL Drivers updates

+

Contents

+

HAL Drivers updates

  • HAL ADC driver
      @@ -753,7 +804,7 @@

      HAL Drivers updates


    -

    LL Drivers updates

    +

    LL Drivers updates

    • LL ADC driver
        @@ -768,14 +819,14 @@

        LL Drivers updates


      -

      Backward Compatibility

      +

      Backward Compatibility

      This release is compatible with the previous versions.

-

Main Changes

+

Main Changes

  • Maintenance release of HAL and Low Layer drivers to include latest corrections
  • Update of HAL SMBUS driver to introduce fast mode and fast mode plus @@ -789,8 +840,8 @@

    Main Changes


-

Contents

-

HAL Drivers updates

+

Contents

+

HAL Drivers updates

  • HAL CORTEX driver
      @@ -866,7 +917,7 @@

      HAL Drivers updates


    -

    LL Drivers updates

    +

    LL Drivers updates

    • LL DMA driver
        @@ -893,14 +944,14 @@

        LL Drivers updates


      -

      Backward Compatibility

      +

      Backward Compatibility

      This release is compatible with the previous versions.

-

Main Changes

+

Main Changes

Add support for STM32WB15xx and STM32WB10xx

@@ -1036,14 +1087,14 @@

Add support for STM32WB15xx

-

Backward Compatibility

+

Backward Compatibility

This release is compatible with the previous versions.

-

Main Changes

+

Main Changes

Maitenance release

All peripheral

@@ -1116,14 +1167,14 @@

Maitenance release

-

Backward Compatibility

+

Backward Compatibility

This release is compatible with the previous versions.

-

Main Changes

+

Main Changes

Maitenance release

All peripheral

@@ -1228,14 +1279,14 @@

Maitenance release

-

Backward Compatibility

+

Backward Compatibility

This release is compatible with the previous versions.

-

Main Changes

+

Main Changes

Introduction of STM32WB5M, STM32WB35xx and STM32WB30xx product

This release introduce the support of STM32WB5Mxx, STM32WB35xx product and its value line STM32WB30xx.

Added features:

@@ -1280,14 +1331,14 @@

Introduct -

Backward Compatibility

+

Backward Compatibility

This release is compatible with the previous versions.

-

Main Changes

+

Main Changes

Maitenance release

@@ -1331,7 +1382,7 @@

Maitenance release

-

Backward Compatibility

+

Backward Compatibility

This release is compatible with the previous versions.

Dependencies

This software release is compatible with:

@@ -1341,7 +1392,7 @@

Dependencies

-

Main Changes

+

Main Changes

Maitenance release

@@ -1413,7 +1464,7 @@

Maitenance release

-

Backward Compatibility

+

Backward Compatibility

This release is compatible with the previous versions.

Dependencies

This software release is compatible with:

@@ -1423,7 +1474,7 @@

Dependencies

-

Main Changes

+

Main Changes

STM32WB50xx introduction and maintenance release

First release for STM32WBxx HAL drivers introducing stm32wb50xx devices.

@@ -1492,7 +1543,7 @@

STM32WB50xx introducti

-

Backward Compatibility

+

Backward Compatibility

This release is compatible with the previous versions.

Dependencies

This software release is compatible with:

@@ -1502,7 +1553,7 @@

Dependencies

-

Main Changes

+

Main Changes

Maintenance release

Maintenance release of HAL and Low layers drivers supporting STM32WB55xx devices.

@@ -1556,7 +1607,7 @@

Maintenance release

-

Backward Compatibility

+

Backward Compatibility

This release is compatible with the previous versions.

Dependencies

This software release is compatible with:

@@ -1566,7 +1617,7 @@

Dependencies

-

Main Changes

+

Main Changes

First release

First official release of HAL (Hardware Abstraction Layer) and LL (Low layers) drivers to support STM32WB55xx.

diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c index a6cff1ffa3..c848af1601 100644 --- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c +++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c @@ -56,7 +56,7 @@ */ #define __STM32WBxx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */ #define __STM32WBxx_HAL_VERSION_SUB1 (0x0EU) /*!< [23:16] sub1 version */ -#define __STM32WBxx_HAL_VERSION_SUB2 (0x05U) /*!< [15:8] sub2 version */ +#define __STM32WBxx_HAL_VERSION_SUB2 (0x06U) /*!< [15:8] sub2 version */ #define __STM32WBxx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */ #define __STM32WBxx_HAL_VERSION ((__STM32WBxx_HAL_VERSION_MAIN << 24U)\ |(__STM32WBxx_HAL_VERSION_SUB1 << 16U)\ diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_i2c.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_i2c.c index ef5eaf81a1..91993d6780 100644 --- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_i2c.c +++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_i2c.c @@ -3277,6 +3277,8 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd __IO uint32_t I2C_Trials = 0UL; + HAL_StatusTypeDef status = HAL_OK; + FlagStatus tmp1; FlagStatus tmp2; @@ -3334,37 +3336,64 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd /* Wait until STOPF flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) { - return HAL_ERROR; + /* A non acknowledge appear during STOP Flag waiting process, a new trial must be performed */ + if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) + { + /* Clear STOP Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); + + /* Reset the error code for next trial */ + hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + } + else + { + status = HAL_ERROR; + } } + else + { + /* A acknowledge appear during STOP Flag waiting process, this mean that device respond to its address */ - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); + /* Clear STOP Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - /* Device is ready */ - hi2c->State = HAL_I2C_STATE_READY; + /* Device is ready */ + hi2c->State = HAL_I2C_STATE_READY; - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); + /* Process Unlocked */ + __HAL_UNLOCK(hi2c); - return HAL_OK; + return HAL_OK; + } } else { - /* Wait until STOPF flag is reset */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_ERROR; - } + /* A non acknowledge is detected, this mean that device not respond to its address, + a new trial must be performed */ /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - /* Clear STOP Flag, auto generated with autoend*/ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); + /* Wait until STOPF flag is reset */ + if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) + { + status = HAL_ERROR; + } + else + { + /* Clear STOP Flag, auto generated with autoend*/ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); + } } /* Increment Trials */ I2C_Trials++; + + if ((I2C_Trials < Trials) && (status == HAL_ERROR)) + { + status = HAL_OK; + } + } while (I2C_Trials < Trials); /* Update I2C state */ @@ -6377,7 +6406,7 @@ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) /* Increment Buffer pointer */ hi2c->pBuffPtr++; - if ((hi2c->XferSize > 0U)) + if (hi2c->XferSize > 0U) { hi2c->XferSize--; hi2c->XferCount--; @@ -6533,7 +6562,7 @@ static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) /* Increment Buffer pointer */ hi2c->pBuffPtr++; - if ((hi2c->XferSize > 0U)) + if (hi2c->XferSize > 0U) { hi2c->XferSize--; hi2c->XferCount--; @@ -6987,7 +7016,7 @@ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uin { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) { - if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)) + if (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; hi2c->State = HAL_I2C_STATE_READY; @@ -7027,7 +7056,7 @@ static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) { - if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)) + if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; hi2c->State = HAL_I2C_STATE_READY; @@ -7066,7 +7095,7 @@ static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, /* Check for the Timeout */ if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) { - if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)) + if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; hi2c->State = HAL_I2C_STATE_READY; @@ -7144,7 +7173,7 @@ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, /* Check for the Timeout */ if ((((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) && (status == HAL_OK)) { - if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)) + if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; hi2c->State = HAL_I2C_STATE_READY; @@ -7311,15 +7340,17 @@ static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t T static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request) { + uint32_t tmp; + /* Check the parameters */ assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_TRANSFER_MODE(Mode)); assert_param(IS_TRANSFER_REQUEST(Request)); /* Declaration of tmp to prevent undefined behavior of volatile usage */ - uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ - (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ - (uint32_t)Mode | (uint32_t)Request) & (~0x80000000U)); + tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ + (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + (uint32_t)Mode | (uint32_t)Request) & (~0x80000000U)); /* update CR2 register */ MODIFY_REG(hi2c->Instance->CR2, \ diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_iwdg.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_iwdg.c index 4ad95acdd5..7be6dd0dba 100644 --- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_iwdg.c +++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_iwdg.c @@ -126,7 +126,8 @@ The timeout value is multiplied by 1000 to be converted in milliseconds. LSI startup time is also considered here by adding LSI_STARTUP_TIME converted in milliseconds. */ -#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL)) +#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / (LSI_VALUE / 128U)) + \ + ((LSI_STARTUP_TIME / 1000UL) + 1UL)) #define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU) /** * @} diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd.c index 4003cad00a..a5fd6ec9c5 100644 --- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd.c +++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd.c @@ -49,6 +49,9 @@ (#)Enable PCD transmission and reception: (##) HAL_PCD_Start(); + (#)NOTE: For applications not using double buffer mode, define the symbol + 'USE_USB_DOUBLE_BUFFER' as 0 to reduce the driver's memory footprint. + @endverbatim ****************************************************************************** */ @@ -1770,6 +1773,18 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) /* Get SETUP Packet */ ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); + if (ep->xfer_count != 8U) + { + /* Set Stall condition for EP0 IN/OUT */ + PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_STALL); + PCD_SET_EP_TX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_TX_STALL); + + /* SETUP bit kept frozen while CTR_RX = 1 */ + PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); + + return HAL_OK; + } + USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, ep->pmaadress, (uint16_t)ep->xfer_count); @@ -1790,26 +1805,27 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) /* Get Control Data OUT Packet */ ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); - if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U)) + if (ep->xfer_count == 0U) { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, - ep->pmaadress, (uint16_t)ep->xfer_count); + /* Status phase re-arm for next setup */ + PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); + } + else + { + if (ep->xfer_buff != 0U) + { + USB_ReadPMA(hpcd->Instance, ep->xfer_buff, + ep->pmaadress, (uint16_t)ep->xfer_count); /* max 64bytes */ - ep->xfer_buff += ep->xfer_count; + ep->xfer_buff += ep->xfer_count; - /* Process Control Data OUT Packet */ + /* Process Control Data OUT Packet */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->DataOutStageCallback(hpcd, 0U); + hpcd->DataOutStageCallback(hpcd, 0U); #else - HAL_PCD_DataOutStageCallback(hpcd, 0U); + HAL_PCD_DataOutStageCallback(hpcd, 0U); #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - - wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); - - if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID)) - { - PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); + } } } } @@ -1875,7 +1891,6 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) /* multi-packet on the NON control OUT endpoint */ ep->xfer_count += count; - ep->xfer_buff += count; if ((ep->xfer_len == 0U) || (count < ep->maxpacket)) { @@ -1888,6 +1903,7 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) } else { + ep->xfer_buff += count; (void)USB_EPStartXfer(hpcd->Instance, ep); } } diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc.c index 9216b6fa3f..b5ba9b2fba 100644 --- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc.c +++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc.c @@ -254,7 +254,7 @@ */ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) { - HAL_StatusTypeDef status = HAL_ERROR; + HAL_StatusTypeDef status; /* Check RTC handler validity */ if (hrtc == NULL) @@ -377,7 +377,7 @@ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) */ HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc) { - HAL_StatusTypeDef status = HAL_ERROR; + HAL_StatusTypeDef status; /* Check the parameters */ assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance)); @@ -396,7 +396,7 @@ HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc) /* Reset RTC registers */ hrtc->Instance->TR = 0x00000000U; hrtc->Instance->DR = (RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0); - hrtc->Instance->CR &= 0x00000000U; + hrtc->Instance->CR = 0x00000000U; hrtc->Instance->WUTR = RTC_WUTR_WUT; hrtc->Instance->PRER = (uint32_t)(RTC_PRER_PREDIV_A | 0x000000FFU); hrtc->Instance->ALRMAR = 0x00000000U; diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_smartcard.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_smartcard.c index 6f5cd70e52..c58b0655b5 100644 --- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_smartcard.c +++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_smartcard.c @@ -2406,7 +2406,7 @@ static HAL_StatusTypeDef SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsmartcard assert_param(IS_SMARTCARD_TIMEOUT_VALUE(hsmartcard->Init.TimeOutValue)); tmpreg |= (uint32_t) hsmartcard->Init.TimeOutValue; } - MODIFY_REG(hsmartcard->Instance->RTOR, (USART_RTOR_RTO | USART_RTOR_BLEN), tmpreg); + WRITE_REG(hsmartcard->Instance->RTOR, tmpreg); /*-------------------------- USART BRR Configuration -----------------------*/ SMARTCARD_GETCLOCKSOURCE(hsmartcard, clocksource); diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_smbus.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_smbus.c index 9751bdbd13..899f59242e 100644 --- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_smbus.c +++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_smbus.c @@ -1959,7 +1959,7 @@ static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t /* Increment Buffer pointer */ hsmbus->pBuffPtr++; - if ((hsmbus->XferSize > 0U)) + if (hsmbus->XferSize > 0U) { hsmbus->XferSize--; hsmbus->XferCount--; @@ -2387,7 +2387,7 @@ static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t S /* Increment Buffer pointer */ hsmbus->pBuffPtr++; - if ((hsmbus->XferSize > 0U)) + if (hsmbus->XferSize > 0U) { hsmbus->XferSize--; hsmbus->XferCount--; diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_spi.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_spi.c index cab31ee3da..b29694cf24 100644 --- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_spi.c +++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_spi.c @@ -815,9 +815,9 @@ HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_Ca * @brief Transmit an amount of data in blocking mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent - * @param Timeout Timeout duration + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent + * @param Timeout Timeout duration in ms * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size, uint32_t Timeout) @@ -1001,10 +1001,13 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData * @brief Receive an amount of data in blocking mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be received - * @param Timeout Timeout duration + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be received + * @param Timeout Timeout duration in ms * @retval HAL status + * @note In master mode, if the direction is set to SPI_DIRECTION_2LINES + * the receive buffer is written to data register (DR) to generate + * clock pulses and receive data */ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) { @@ -1243,10 +1246,10 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 * @brief Transmit and Receive an amount of data in blocking mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pTxData pointer to transmission data buffer - * @param pRxData pointer to reception data buffer - * @param Size amount of data to be sent and received - * @param Timeout Timeout duration + * @param pTxData pointer to transmission data buffer (u8 or u16 data elements) + * @param pRxData pointer to reception data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent and received + * @param Timeout Timeout duration in ms * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, @@ -1593,8 +1596,8 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t * @brief Transmit an amount of data in non-blocking mode with Interrupt. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size) @@ -1675,8 +1678,8 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, const uint8_t *pD * @brief Receive an amount of data in non-blocking mode with Interrupt. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be received * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) @@ -1778,9 +1781,9 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui * @brief Transmit and Receive an amount of data in non-blocking mode with Interrupt. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pTxData pointer to transmission data buffer - * @param pRxData pointer to reception data buffer - * @param Size amount of data to be sent and received + * @param pTxData pointer to transmission data buffer (u8 or u16 data elements) + * @param pRxData pointer to reception data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent and received * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, @@ -1887,8 +1890,8 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint * @brief Transmit an amount of data in non-blocking mode with DMA. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer - * @param Size amount of data to be sent + * @param pData pointer to data buffer (u8 or u16 data elements) + * @param Size amount of data elements (u8 or u16) to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size) @@ -2007,9 +2010,9 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, const uint8_t *p * @note In case of MASTER mode and SPI_DIRECTION_2LINES direction, hdmatx shall be defined. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pData pointer to data buffer + * @param pData pointer to data buffer (u8 or u16 data elements) * @note When the CRC feature is enabled the pData Length must be Size + 1. - * @param Size amount of data to be sent + * @param Size amount of data elements (u8 or u16) to be received * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) @@ -2146,10 +2149,10 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u * @brief Transmit and Receive an amount of data in non-blocking mode with DMA. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. - * @param pTxData pointer to transmission data buffer - * @param pRxData pointer to reception data buffer + * @param pTxData pointer to transmission data buffer (u8 or u16 data elements) + * @param pRxData pointer to reception data buffer (u8 or u16 data elements) * @note When the CRC feature is enabled the pRxData Length must be Size + 1 - * @param Size amount of data to be sent + * @param Size amount of data elements (u8 or u16) to be sent and received * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, @@ -3995,7 +3998,10 @@ static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, { tmp_timeout = 0U; } - count--; + else + { + count--; + } } } @@ -4077,7 +4083,10 @@ static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, { tmp_timeout = 0U; } - count--; + else + { + count--; + } } } diff --git a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_usb.c b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_usb.c index 27662c249a..ee652db260 100644 --- a/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_usb.c +++ b/system/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_usb.c @@ -33,6 +33,9 @@ (#) The upper HAL HCD/PCD driver will call the right routines for its internal processes. + (#)NOTE: For applications not using double buffer mode, define the symbol + 'USE_USB_DOUBLE_BUFFER' as 0 to reduce the driver's memory footprint. + @endverbatim ****************************************************************************** diff --git a/system/Drivers/STM32YYxx_HAL_Driver_version.md b/system/Drivers/STM32YYxx_HAL_Driver_version.md index 456e403fc1..9797ea0a5b 100644 --- a/system/Drivers/STM32YYxx_HAL_Driver_version.md +++ b/system/Drivers/STM32YYxx_HAL_Driver_version.md @@ -19,7 +19,7 @@ * STM32U0: 1.2.0 * STM32U3: 1.1.0 * STM32U5: 1.6.2 - * STM32WB: 1.14.5 + * STM32WB: 1.14.6 * STM32WB0: 1.3.0 * STM32WBA: 1.5.0 * STM32WL: 1.3.1 From ecca6dc241eb95ed41ec44cec8d4cbde930ded95 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Thu, 10 Jul 2025 12:25:49 +0200 Subject: [PATCH 2/2] system(wb): update STM32WBxx CMSIS Drivers to v1.12.3 Included in STM32CubeWB FW v1.23.0 Signed-off-by: Frederic Pillon --- .../Device/ST/STM32WBxx/Include/stm32wb10xx.h | 2 +- .../Device/ST/STM32WBxx/Include/stm32wb15xx.h | 2 +- .../Device/ST/STM32WBxx/Include/stm32wb1mxx.h | 2 +- .../Device/ST/STM32WBxx/Include/stm32wb30xx.h | 2 +- .../Device/ST/STM32WBxx/Include/stm32wb35xx.h | 2 +- .../Device/ST/STM32WBxx/Include/stm32wb50xx.h | 2 +- .../Device/ST/STM32WBxx/Include/stm32wb55xx.h | 2 +- .../Device/ST/STM32WBxx/Include/stm32wb5mxx.h | 2 +- .../Device/ST/STM32WBxx/Include/stm32wbxx.h | 2 +- .../Device/ST/STM32WBxx/Release_Notes.html | 70 +++++++++++-------- .../Source/Templates/system_stm32wbxx.c | 10 ++- .../Device/ST/STM32YYxx_CMSIS_version.md | 2 +- 12 files changed, 60 insertions(+), 40 deletions(-) diff --git a/system/Drivers/CMSIS/Device/ST/STM32WBxx/Include/stm32wb10xx.h b/system/Drivers/CMSIS/Device/ST/STM32WBxx/Include/stm32wb10xx.h index 6b98ca85a3..87eb11320d 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32WBxx/Include/stm32wb10xx.h +++ b/system/Drivers/CMSIS/Device/ST/STM32WBxx/Include/stm32wb10xx.h @@ -9266,7 +9266,7 @@ typedef struct /******************* Bit definition for TIM_CCR5 register *******************/ #define TIM_CCR5_CCR5_Pos (0U) -#define TIM_CCR5_CCR5_Msk (0xFFFFFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFFFFFF */ +#define TIM_CCR5_CCR5_Msk (0xFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFF */ #define TIM_CCR5_CCR5 TIM_CCR5_CCR5_Msk /*!STM32WB15xx, STM32WB10xx and ST

Update History

- +

Main Changes

    -
  • Properly mark sections readonly for GCC
    • +
  • Fix Capture Compare register TIMx_CCR5 defintion
    • +
  • Allow redefinition of the macro ‘VECT_TAB_OFFSET’ externally from the IDE, makefile, or command line.

Supported Devices and boards

    @@ -103,11 +104,11 @@

    Supported Devices and boards

- +

Main Changes

    -
  • Update declaration of g_pfnVectors size in gcc/startup files
    • +
  • Properly mark sections readonly for GCC

Supported Devices and boards

    @@ -116,15 +117,28 @@

    Supported Devices and boards

- +

Main Changes

    +
  • Update declaration of g_pfnVectors size in gcc/startup files
    • +
+

Supported Devices and boards

+
    +
  • STM32WB55xx, STM32WB5Mxx, STM32WB50xx, STM32WB35xx, STM32WB30xx, STM32WB15xx, STM32WB10xx and STM32WB1Mxx devices.
    • +
+
+
+
+ +
+

Main Changes

+
  • Fix incorrect USB_BASE and USB_PMAADDR addresses
  • Fix initialization missing of data in RAM2 memory
  • Add specific LSE_VALUE for STM32WB5Mxx
-

Supported Devices and boards

+

Supported Devices and boards

  • STM32WB55xx, STM32WB5Mxx, STM32WB50xx, STM32WB35xx, STM32WB30xx, STM32WB15xx, STM32WB10xx and STM32WB1Mxx devices.
@@ -133,11 +147,11 @@

Supported Devices and boards

-

Main Changes

+

Main Changes

  • Add support for the upcoming STM32WB1M device
-

Supported Devices and boards

+

Supported Devices and boards

  • STM32WB55xx, STM32WB5Mxx, STM32WB50xx, STM32WB35xx, STM32WB30xx, STM32WB15xx, STM32WB10xx and STM32WB1Mxx devices.
@@ -146,11 +160,11 @@

Supported Devices and boards

-

Main Changes

+

Main Changes

  • Align ADC registers naming on Reference Manual (For STM32WB15xx & STM32WB10xx)
-

Supported Devices and boards

+

Supported Devices and boards

  • STM32WB55xx, STM32WB5Mxx, STM32WB50xx, STM32WB35xx, STM32WB30xx, STM32WB15xx and STM32WB10xx devices.
@@ -159,13 +173,13 @@

Supported Devices and boards

-

Main Changes

+

Main Changes

  • Update CMSIS devices drivers for all value lines not supporting SMPS
  • All source files and templates: update disclaimer to add reference to the new license agreement
  • Correct English spelling typos and remove non UTF-8 characters in comments
-

Supported Devices and boards

+

Supported Devices and boards

  • STM32WB55xx, STM32WB5Mxx, STM32WB50xx, STM32WB35xx, STM32WB30xx, STM32WB15xx and STM32WB10xx devices.
@@ -174,7 +188,7 @@

Supported Devices and boards

-

Main Changes

+

Main Changes

  • Add atomic register access services:
      @@ -188,7 +202,7 @@

      Main Changes

    • Add define LSI_STARTUP_TIME used in default IWDG timeout calculation (HAL_IWDG_DEFAULT_TIMEOUT)
    • Add define FLASH_ECCR_CPUID bits for new macro __HAL_FLASH_ECC_CPUID() macro
    -

    Supported Devices and boards

    +

    Supported Devices and boards

    • STM32WB55xx, STM32WB5Mxx, STM32WB50xx, STM32WB35xx, STM32WB30xx, STM32WB15xx and STM32WB10xx devices.
    @@ -197,7 +211,7 @@

    Supported Devices and boards

    -

    Main Changes

    +

    Main Changes

    Add support for STM32WB15xx and STM32WB10xx

    • Change how to adapt VTOR for user
      • @@ -208,7 +222,7 @@

      Development Toolchains and Compile
    • RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.25
    • System Workbench STM32 (SW4STM32) toolchain V2.7

    -

    Supported Devices and boards

    +

    Supported Devices and boards

    • STM32WB55xx, STM32WB5Mxx, STM32WB50xx, STM32WB35xx, STM32WB30xx, STM32WB15xx and STM32WB10xx devices.
    @@ -217,7 +231,7 @@

    Supported Devices and boards

    -

    Main Changes

    +

    Main Changes

    Maintenance release

    Maintenance release for STM32WBxx devices (stm32wb55xx, stm32wb50xx, stm32wb35xx and stm32wb30xx devices)

    @@ -247,7 +261,7 @@

    Development Toolchains and Compi
  • RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.25
  • System Workbench STM32 (SW4STM32) toolchain V2.7
    • -

    Supported Devices and boards

    +

    Supported Devices and boards

    • STM32WB55xx, STM32WB5Mxx, STM32WB50xx, STM32WB35xx and STM32WB30xx devices.
    @@ -256,7 +270,7 @@

    Supported Devices and boards

    -

    Main Changes

    +

    Main Changes

    Maintenance release

    Maintenance release for STM32WBxx devices (stm32wb55xx, stm32wb50xx, stm32wb35xx and stm32wb30xx devices)

    @@ -295,7 +309,7 @@

    Development Toolchains and Compi
  • RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.25
  • System Workbench STM32 (SW4STM32) toolchain V2.7
    • -

    Supported Devices and boards

    +

    Supported Devices and boards

    • STM32WB55xx, STM32WB5Mxx, STM32WB50xx, STM32WB35xx and STM32WB30xx devices.
    @@ -304,7 +318,7 @@

    Supported Devices and boards

    -

    Main Changes

    +

    Main Changes

    Introduction of STM32WB35xx, STM32WB30xx and STM32WB5Mxx product

    This release introduce the support of STM32WB5Mxx, STM32WB35xx product and its value line STM32WB30xx.

    Added features:

    @@ -322,7 +336,7 @@

    Development Toolchains and Compi
  • RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.25
  • System Workbench STM32 (SW4STM32) toolchain V2.7
    • -

    Supported Devices and boards

    +

    Supported Devices and boards

    • STM32WB55xx, STM32WB5Mxx, STM32WB50xx, STM32WB35xx and STM32WB30xx devices.
    @@ -331,7 +345,7 @@

    Supported Devices and boards

    -

    Main Changes

    +

    Main Changes

    Maintenance release for STM32WBxx devices (stm32wb55xx and stm32wb50xx devices)

    @@ -360,7 +374,7 @@

    Development Toolchains and Compi
  • RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.25
  • System Workbench STM32 (SW4STM32) toolchain V2.7
    • -

    Supported Devices and boards

    +

    Supported Devices and boards

    • STM32WB55xx, STM32WB50xx devices
    @@ -369,7 +383,7 @@

    Supported Devices and boards

    -

    Main Changes

    +

    Main Changes

    Introduction of STM32WB50xx device

    First release for STM32WBxx CMSIS introducing stm32wb50xx devices.

    Contents

    @@ -380,7 +394,7 @@

    Development Toolchains and Compi
  • RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.25
  • System Workbench STM32 (SW4STM32) toolchain V2.7
    • -

    Supported Devices and boards

    +

    Supported Devices and boards

    • STM32WB55xx and STM32WB50xx devices
    @@ -389,7 +403,7 @@

    Supported Devices and boards

    -

    Main Changes

    +

    Main Changes

    Maintenance release

    Maintenance release for STM32WBxx devices (stm32wb55xx devices)

    @@ -413,7 +427,7 @@

    Maintenance release

    -

    Main Changes

    +

    Main Changes

    First release

    Add support of STM32WB55xx.

    diff --git a/system/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/system_stm32wbxx.c b/system/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/system_stm32wbxx.c index dc38e46705..57f6a4e802 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/system_stm32wbxx.c +++ b/system/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/system_stm32wbxx.c @@ -137,13 +137,19 @@ #if defined(VECT_TAB_SRAM) #define VECT_TAB_BASE_ADDRESS SRAM1_BASE /*!< Vector Table base address field. This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. +#if !defined(VECT_TAB_OFFSET) +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table offset field. This value must be a multiple of 0x200. */ +#endif /* VECT_TAB_OFFSET */ + #else #define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field. This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. +#if !defined(VECT_TAB_OFFSET) +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table offset field. This value must be a multiple of 0x200. */ +#endif /* VECT_TAB_OFFSET */ + #endif /* VECT_TAB_SRAM */ #endif /* USER_VECT_TAB_ADDRESS */ diff --git a/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md b/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md index bec9198264..f2f4efff5e 100644 --- a/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md +++ b/system/Drivers/CMSIS/Device/ST/STM32YYxx_CMSIS_version.md @@ -19,7 +19,7 @@ * STM32U0: 1.2.0 * STM32U3: 1.1.0 * STM32U5: 1.4.2 - * STM32WB: 1.12.2 + * STM32WB: 1.12.3 * STM32WB0: 1.3.0 * STM32WBA: 1.5.0 * STM32WL: 1.2.0