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Currently the GPIO driver doesn't use this clock. The only use I can see is for power management.
While we do know GPIO is clocked by APB1, we do not know yet whether it is clocked directly (always-on), or if the clock supply can be gated, through a (to be implemented) gateable child clock of APB1.
I wouldn't be surprised if the "PCR (Power/Clock/Reset) Management Unit" would provide invididual gateable clocks for each module, which would bring us to power-domains and Runtime PM. Probably the PMR provides individual resets for each module, too.
Any chance we can get full documentation for the PMR block?
The text was updated successfully, but these errors were encountered:
@pdp7 double confirmed with SoC team, there is no power gate for JH7100 that means all IPs will be powered up if SoC is powered. that's why our JH7100 consume so much power. howerver, JH7110 will fix this issue.
From
esmil/linux#18 (comment)
@geertu writes
The text was updated successfully, but these errors were encountered: