diff --git a/.azure-pipelines/azure-pipelines-build.yml b/.azure-pipelines/azure-pipelines-build.yml index 9ef929530d50..941c30ecbea2 100644 --- a/.azure-pipelines/azure-pipelines-build.yml +++ b/.azure-pipelines/azure-pipelines-build.yml @@ -186,3 +186,13 @@ jobs: fi displayName: "Build sonic image" - template: .azure-pipelines/check-dirty-version.yml@buildimage + - task: ManifestGeneratorTask@0 + condition: ne(variables.SKIP_MG, 'y') + timeoutInMinutes: 60 + continueOnError: true + displayName: "Manifest Generator" + inputs: + BuildDropPath: '$(System.DefaultWorkingDirectory)/target/' + ManifestDirPath: 'target/' + BuildComponentPath: $(System.DefaultWorkingDirectory)/src/ + diff --git a/Makefile.work b/Makefile.work index c81fe2483096..6079906a1005 100644 --- a/Makefile.work +++ b/Makefile.work @@ -68,7 +68,11 @@ SHELL = /bin/bash USER := $(shell id -un) PWD := $(shell pwd) USER_LC := $(shell echo $(USER) | tr A-Z a-z) +ifneq ($(DEFAULT_CONTAINER_REGISTRY),) +DOCKER_MACHINE := $(shell docker run --rm $(DEFAULT_CONTAINER_REGISTRY)/debian:buster uname -m) +else DOCKER_MACHINE := $(shell docker run --rm debian:buster uname -m) +endif HOST_DOCKERD_GID := $(shell getent group docker | cut -d : -f3) comma := , @@ -563,6 +567,7 @@ SONIC_BUILD_INSTRUCTION := $(MAKE) \ ONIE_IMAGE_PART_SIZE=$(ONIE_IMAGE_PART_SIZE) \ SONIC_OS_VERSION=$(SONIC_OS_VERSION) \ PIP_HTTP_TIMEOUT=$(PIP_HTTP_TIMEOUT) \ + BUILD_PROCESS_TIMEOUT=$(BUILD_PROCESS_TIMEOUT) \ LEGACY_SONIC_MGMT_DOCKER=$(LEGACY_SONIC_MGMT_DOCKER) \ SONIC_PTF_ENV_PY_VER=$(SONIC_PTF_ENV_PY_VER) \ $(SONIC_OVERRIDE_BUILD_VARS) diff --git a/README.md b/README.md index 25fc9699ac7f..c0fe8ba0f9ee 100644 --- a/README.md +++ b/README.md @@ -13,6 +13,20 @@ [![VS](https://dev.azure.com/mssonic/build/_apis/build/status/vs/Azure.sonic-buildimage.official.vs?branchName=master&label=VS)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=142&branchName=master) +*202405 builds*: + +[![Broadcom](https://dev.azure.com/mssonic/build/_apis/build/status/broadcom/Azure.sonic-buildimage.official.broadcom?branchName=202405&label=Broadcom)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=138&branchName=202405) +[![Centec](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec?branchName=202405&label=Centec)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=143&branchName=202405) +[![Centec(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec-arm64?branchName=202405&label=Centec-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=140&branchName=202405) +[![Innovium](https://dev.azure.com/mssonic/build/_apis/build/status/innovium/Azure.sonic-buildimage.official.innovium?branchName=202405&label=Innovium)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=148&branchName=202405) +[![Mellanox](https://dev.azure.com/mssonic/build/_apis/build/status/mellanox/Azure.sonic-buildimage.official.mellanox?branchName=202405&label=Mellanox)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=139&branchName=202405) +[![Marvell(armhf)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-armhf?branchName=202405&label=Marvell-armhf)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=141&branchName=202405) +[![Marvell(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-arm64?branchName=202405&label=Marvell-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=999&branchName=202405) +[![Nephos](https://dev.azure.com/mssonic/build/_apis/build/status/nephos/Azure.sonic-buildimage.official.nephos?branchName=202405&label=Nephos)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=149&branchName=202405) +[![Nvidia-Bluefield](https://dev.azure.com/mssonic/build/_apis/build/status/nvidia/Azure.sonic-buildimage.official.nvidia-bluefield?branchName=202405&label=Nvidia-Bluefield)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=1665&branchName=202405) +[![Pensando](https://dev.azure.com/mssonic/build/_apis/build/status/pensando/Azure.sonic-buildimage.official.pensando?branchName=202405&label=Pensando)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=1366&branchName=202405) +[![VS](https://dev.azure.com/mssonic/build/_apis/build/status/vs/Azure.sonic-buildimage.official.vs?branchName=202405&label=VS)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=142&branchName=202405) + *202311 builds*: [![Broadcom](https://dev.azure.com/mssonic/build/_apis/build/status/broadcom/Azure.sonic-buildimage.official.broadcom?branchName=202311&label=Broadcom)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=138&branchName=202311) diff --git a/azure-pipelines.yml b/azure-pipelines.yml index 4144bf801f84..b72aa967cc2e 100644 --- a/azure-pipelines.yml +++ b/azure-pipelines.yml @@ -262,7 +262,7 @@ stages: MGMT_BRANCH: $(BUILD_BRANCH) - job: onboarding_elastictest_t0 - displayName: "onboarding testcases by Elastictest" + displayName: "onboarding t0 testcases by Elastictest - optional" timeoutInMinutes: 240 continueOnError: true pool: sonic-ubuntu-1c @@ -270,12 +270,47 @@ stages: - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt parameters: TOPOLOGY: t0 + STOP_ON_FAILURE: "False" + RETRY_TIMES: 0 MIN_WORKER: $(T0_ONBOARDING_SONIC_INSTANCE_NUM) MAX_WORKER: $(T0_ONBOARDING_SONIC_INSTANCE_NUM) KVM_IMAGE_BRANCH: $(BUILD_BRANCH) MGMT_BRANCH: $(BUILD_BRANCH) TEST_SET: onboarding_t0 + - job: onboarding_elastictest_t1 + displayName: "onboarding t1 testcases by Elastictest - optional" + timeoutInMinutes: 240 + continueOnError: true + pool: sonic-ubuntu-1c + steps: + - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt + parameters: + TOPOLOGY: t1-lag + STOP_ON_FAILURE: "False" + RETRY_TIMES: 0 + MIN_WORKER: $(T1_LAG_ONBOARDING_INSTANCE_NUM) + MAX_WORKER: $(T1_LAG_ONBOARDING_INSTANCE_NUM) + KVM_IMAGE_BRANCH: $(BUILD_BRANCH) + MGMT_BRANCH: $(BUILD_BRANCH) + TEST_SET: onboarding_t1 + + - job: onboarding_elastictest_dualtor + displayName: "onboarding dualtor testcases by Elastictest - optional" + timeoutInMinutes: 240 + continueOnError: true + pool: sonic-ubuntu-1c + steps: + - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt + parameters: + TOPOLOGY: dualtor + STOP_ON_FAILURE: "False" + RETRY_TIMES: 0 + MIN_WORKER: $(T0_DUALTOR_INSTANCE_NUM) + MAX_WORKER: $(T0_DUALTOR_INSTANCE_NUM) + KVM_IMAGE_BRANCH: $(BUILD_BRANCH) + MGMT_BRANCH: $(BUILD_BRANCH) + TEST_SET: onboarding_dualtor # - job: wan_elastictest # displayName: "kvmtest-wan by Elastictest" diff --git a/build_debian.sh b/build_debian.sh index 3763e5e25336..8c767d619196 100755 --- a/build_debian.sh +++ b/build_debian.sh @@ -33,7 +33,7 @@ CONFIGURED_ARCH=$([ -f .arch ] && cat .arch || echo amd64) ## docker engine version (with platform) DOCKER_VERSION=5:24.0.2-1~debian.12~$IMAGE_DISTRO CONTAINERD_IO_VERSION=1.6.21-1 -LINUX_KERNEL_VERSION=6.1.0-11-2 +LINUX_KERNEL_VERSION=6.1.0-22-2 ## Working directory to prepare the file system FILESYSTEM_ROOT=./fsroot diff --git a/build_image.sh b/build_image.sh index 571febe5cbaa..2ef9be097568 100755 --- a/build_image.sh +++ b/build_image.sh @@ -253,6 +253,17 @@ elif [ "$IMAGE_TYPE" = "dsc" ]; then generate_onie_installer_image +elif [ "$IMAGE_TYPE" = "bfb" ]; then + echo "Build BFB installer" + + if [[ $SECURE_UPGRADE_MODE != "no_sign" ]]; then + secure_upgrade_keys="--signing-key "$SECURE_UPGRADE_DEV_SIGNING_KEY" --signing-cert "$SECURE_UPGRADE_SIGNING_CERT"" + fi + + sudo -E ./platform/${CONFIGURED_PLATFORM}/installer/create_sonic_image --kernel $KVERSION "$secure_upgrade_keys" + + sudo chown $USER $OUTPUT_BFB_IMAGE + else echo "Error: Non supported image type $IMAGE_TYPE" exit 1 diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/hwsku.json b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/hwsku.json new file mode 100644 index 000000000000..ad8ffe6d8a95 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/hwsku.json @@ -0,0 +1,104 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet8": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet16": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet24": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet32": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet40": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet48": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet56": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet64": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet72": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet80": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet88": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet96": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet104": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet112": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet120": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet128": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet136": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet144": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet152": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet160": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet168": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet176": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet184": { + "default_brkout_mode": "2x100G[50G,40G,25G,10G]" + }, + "Ethernet192": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet200": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet208": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet216": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet224": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet232": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet240": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet248": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]" + }, + "Ethernet256": { + "default_brkout_mode": "1x10G", + "fec": "none" + } + } +} diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/media_settings.json b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/media_settings.json new file mode 100644 index 000000000000..080607fa20b5 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/media_settings.json @@ -0,0 +1,2397 @@ +{ + "PORT_MEDIA_SETTINGS": { + "1": { + "Default": { + "main": { + "lane0": "0x71", + "lane1": "0x71", + "lane2": "0x71", + "lane3": "0x71", + "lane4": "0x71", + "lane5": "0x71", + "lane6": "0x71", + "lane7": "0x71" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "2": { + "Default": { + "main": { + "lane0": "0x71", + "lane1": "0x71", + "lane2": "0x71", + "lane3": "0x71", + "lane4": "0x71", + "lane5": "0x71", + "lane6": "0x71", + "lane7": "0x71" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "3": { + "Default": { + "main": { + "lane0": "0x71", + "lane1": "0x71", + "lane2": "0x71", + "lane3": "0x71", + "lane4": "0x71", + "lane5": "0x71", + "lane6": "0x71", + "lane7": "0x71" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "4": { + "Default": { + "main": { + "lane0": "0x71", + "lane1": "0x71", + "lane2": "0x71", + "lane3": "0x71", + "lane4": "0x71", + "lane5": "0x71", + "lane6": "0x71", + "lane7": "0x71" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + 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+ "main": { + "lane0": "0x85", + "lane1": "0x80", + "lane2": "0x85", + "lane3": "0x85", + "lane4": "0x80", + "lane5": "0x85", + "lane6": "0x85", + "lane7": "0x85" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xffffffee", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xffffffee", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x2", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x2", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "29": { + "Default": { + "main": { + "lane0": "0x82", + "lane1": "0x82", + "lane2": "0x82", + "lane3": "0x82", + "lane4": "0x82", + "lane5": "0x82", + "lane6": "0x82", + "lane7": "0x82" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xfffffff2", + "lane5": "0xffffffed", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffb", + "lane5": "0xfffffffd", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff1", + "lane5": "0xfffffff2", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x3", + "lane5": "0x1", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "30": { + "Default": { + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xffffffee", + "lane1": "0xffffffee", + "lane2": "0xffffffee", + "lane3": "0xffffffee", + "lane4": "0xffffffee", + "lane5": "0xffffffee", + "lane6": "0xffffffee", + "lane7": "0xffffffee" + }, + "post2": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2", + "lane4": "0x2", + "lane5": "0x2", + "lane6": "0x2", + "lane7": "0x2" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "31": { + "Default": { + "main": { + "lane0": "0x85", + "lane1": "0x85", + "lane2": "0x85", + "lane3": "0x82", + "lane4": "0x85", + "lane5": "0x85", + "lane6": "0x85", + "lane7": "0x85" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xffffffee", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffc", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff1", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff3", + "lane4": "0xfffffff1", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": "0xfffffff1" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2", + "lane4": "0x2", + "lane5": "0x2", + "lane6": "0x2", + "lane7": "0x2" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "32": { + "Default": { + "main": { + "lane0": "0x82", + "lane1": "0x7e", + "lane2": "0x7e", + "lane3": "0x7e", + "lane4": "0x82", + "lane5": "0x7e", + "lane6": "0x82", + "lane7": "0x82" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xffffffef", + "lane2": "0xffffffef", + "lane3": "0xffffffef", + "lane4": "0xfffffff4", + "lane5": "0xffffffef", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffa", + "lane5": "0xfffffffc", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre1": { + "lane0": "0xfffffff0", + "lane1": "0xffffffef", + "lane2": "0xffffffef", + "lane3": "0xffffffef", + "lane4": "0xfffffff0", + "lane5": "0xffffffef", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "pre2": { + "lane0": "0x3", + "lane1": "0x3", + "lane2": "0x3", + "lane3": "0x3", + "lane4": "0x3", + "lane5": "0x3", + "lane6": "0x3", + "lane7": "0x3" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "33": { + "Default": { + "main": { + "lane0": "0x22" + }, + "post1": { + "lane0": "0x9" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + }, + "pre1": { + "lane0": "0x1" + }, + "pre2": { + "lane0": "0x0" + }, + "pre3": { + "lane0": "0x0" + } + } + } + } +} \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/sai.profile b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/sai.profile new file mode 100644 index 000000000000..20bd05292042 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th4-a7060dx5-32-100Gx48-400Gx8.config.bcm diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/th4-a7060dx5-32-100Gx48-400Gx8.config.bcm b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/th4-a7060dx5-32-100Gx48-400Gx8.config.bcm new file mode 100644 index 000000000000..19a537063da4 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/th4-a7060dx5-32-100Gx48-400Gx8.config.bcm @@ -0,0 +1,789 @@ +# configuration yaml file +# device: +# : +# : +# ? +# : +# : +# ... +# : +# : +# : +# : +# ... +# : +# + +--- +bcm_device: + 0: + global: + pktio_mode: 1 + default_cpu_tx_queue: 7 + vlan_flooding_l2mc_num_reserved: 0 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + # LTSW uses value 1 for ALPM combined mode + l3_alpm_template: 1 + l3_alpm_hit_skip: 1 + sai_feat_tail_timestamp : 1 + sai_field_group_auto_prioritize: 1 + #l3_intf_vlan_split_egress for MTU at L3IF + l3_intf_vlan_split_egress : 1 + + # vxlan + l3_alpm_template: 1 + riot_overlay_l3_egress_mem_size: 16384 + riot_overlay_l3_intf_mem_size: 4096 + l3_ecmp_member_first_lkup_mem_size: 12288 + bcm_tunnel_term_compatible_mode: 1 + shared_l2_tunnel: 1 + sai_tunnel_support: 10 + sai_tunnel_underlay_route_mode: 2 + sai_tunnel_ecmp_sharing_mode: 0 # change to 2 if SAI_NEXT_HOP_GROUP_ATTR_LEVEL_1 used + + # bfd + #bfd_enable: 1 + #bfd_sha1_keys: 5 + #bfd_num_sessions: 2048 + #bfd_simple_password_keys: 5 + #num_queues_pci: 47 + #num_queues_uc0: 1 + #bfd_feature_enable: 1 + #bfd_use_endpoint_id_as_discriminator: 1 + #bfd_tx_raw_ingress_enable: 1 + #sai_eapp_config_file: "/usr/share/sonic/device/x86_64-broadcom_common/eapps/eapp_config.json" +--- +device: + 0: + PC_SERDES_CONFIG: + PKG_SWAP_BYPASS: 1 + + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67235401 + TX_LANE_MAP: 0x2731465 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x31752064 + TX_LANE_MAP: 0x76025314 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67241503 + TX_LANE_MAP: 0x13650274 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x01 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x46025713 + TX_LANE_MAP: 0x31650274 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62713054 + TX_LANE_MAP: 0x21703465 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0xd8 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13460257 + TX_LANE_MAP: 0x64137502 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43512670 + TX_LANE_MAP: 0x2571364 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x14270356 + TX_LANE_MAP: 0x64237501 + RX_POLARITY_FLIP: 0xfb + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76140235 + TX_LANE_MAP: 0x74036521 + RX_POLARITY_FLIP: 0xc1 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47125603 + TX_LANE_MAP: 0x30451276 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76041235 + TX_LANE_MAP: 0x74036512 + RX_POLARITY_FLIP: 0x40 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x27145603 + TX_LANE_MAP: 0x21450376 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x2735146 + TX_LANE_MAP: 0x3657421 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0xc8 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47306521 + TX_LANE_MAP: 0x12643075 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x20157436 + TX_LANE_MAP: 0x56237104 + RX_POLARITY_FLIP: 0x08 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x14270356 + TX_LANE_MAP: 0x76325014 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56704312 + TX_LANE_MAP: 0x32641570 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21564073 + TX_LANE_MAP: 0x50314762 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36715402 + TX_LANE_MAP: 0x32641075 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x51462073 + TX_LANE_MAP: 0x5127634 + RX_POLARITY_FLIP: 0x69 + TX_POLARITY_FLIP: 0x08 + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73204651 + TX_LANE_MAP: 0x32640175 + RX_POLARITY_FLIP: 0x69 + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x5134627 + TX_LANE_MAP: 0x60137254 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57420163 + TX_LANE_MAP: 0x32651074 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x5134627 + TX_LANE_MAP: 0x10524376 + RX_POLARITY_FLIP: 0x05 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73520146 + TX_LANE_MAP: 0x31650274 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x16072354 + TX_LANE_MAP: 0x51634270 + RX_POLARITY_FLIP: 0x01 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72530164 + TX_LANE_MAP: 0x32506147 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x4371256 + TX_LANE_MAP: 0x21673054 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0xcc + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67241503 + TX_LANE_MAP: 0x12730465 + RX_POLARITY_FLIP: 0x20 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73625140 + TX_LANE_MAP: 0x12640573 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23674015 + TX_LANE_MAP: 0x57206143 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xff + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57314260 + TX_LANE_MAP: 0x1735264 + RX_POLARITY_FLIP: 0x10 + TX_POLARITY_FLIP: 0x00 +... +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 3 + ? + PORT_ID: 5 + : + PC_PHYS_PORT_ID: 5 + ? + PORT_ID: 6 + : + PC_PHYS_PORT_ID: 7 + ? + PORT_ID: 9 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 10 + : + PC_PHYS_PORT_ID: 11 + ? + PORT_ID: 13 + : + PC_PHYS_PORT_ID: 13 + ? + PORT_ID: 14 + : + PC_PHYS_PORT_ID: 15 + ? + PORT_ID: 17 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 18 + : + PC_PHYS_PORT_ID: 19 + ? + PORT_ID: 21 + : + PC_PHYS_PORT_ID: 21 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 23 + ? + PORT_ID: 25 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 26 + : + PC_PHYS_PORT_ID: 27 + ? + PORT_ID: 29 + : + PC_PHYS_PORT_ID: 29 + ? + PORT_ID: 30 + : + PC_PHYS_PORT_ID: 31 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 259 + ? + PORT_ID: 34 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 35 + : + PC_PHYS_PORT_ID: 35 + ? + PORT_ID: 38 + : + PC_PHYS_PORT_ID: 37 + ? + PORT_ID: 39 + : + PC_PHYS_PORT_ID: 39 + ? + PORT_ID: 42 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 43 + : + PC_PHYS_PORT_ID: 43 + ? + PORT_ID: 46 + : + PC_PHYS_PORT_ID: 45 + ? + PORT_ID: 47 + : + PC_PHYS_PORT_ID: 47 + ? + PORT_ID: 50 + : + PC_PHYS_PORT_ID: 258 + ? + PORT_ID: 51 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 52 + : + PC_PHYS_PORT_ID: 51 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 53 + ? + PORT_ID: 56 + : + PC_PHYS_PORT_ID: 55 + ? + PORT_ID: 59 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 60 + : + PC_PHYS_PORT_ID: 59 + ? + PORT_ID: 63 + : + PC_PHYS_PORT_ID: 61 + ? + PORT_ID: 64 + : + PC_PHYS_PORT_ID: 63 + ? + PORT_ID: 67 + : + PC_PHYS_PORT_ID: 260 + ? + PORT_ID: 204 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 205 + : + PC_PHYS_PORT_ID: 195 + ? + PORT_ID: 208 + : + PC_PHYS_PORT_ID: 197 + ? + PORT_ID: 209 + : + PC_PHYS_PORT_ID: 199 + ? + PORT_ID: 212 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 213 + : + PC_PHYS_PORT_ID: 203 + ? + PORT_ID: 216 + : + PC_PHYS_PORT_ID: 205 + ? + PORT_ID: 217 + : + PC_PHYS_PORT_ID: 207 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 222 + : + PC_PHYS_PORT_ID: 211 + ? + PORT_ID: 225 + : + PC_PHYS_PORT_ID: 213 + ? + PORT_ID: 226 + : + PC_PHYS_PORT_ID: 215 + ? + PORT_ID: 229 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 230 + : + PC_PHYS_PORT_ID: 219 + ? + PORT_ID: 233 + : + PC_PHYS_PORT_ID: 221 + ? + PORT_ID: 234 + : + PC_PHYS_PORT_ID: 223 + ? + PORT_ID: 237 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 238 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 229 + ? + PORT_ID: 246 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 250 + : + PC_PHYS_PORT_ID: 237 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 259 + : + PC_PHYS_PORT_ID: 245 + ? + PORT_ID: 263 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 267 + : + PC_PHYS_PORT_ID: 253 + ? + PORT_ID: 271 + : + PC_PHYS_PORT_ID: 266 + + +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: 0 + : + &port_mode_10g + ENABLE: 1 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [[50, 50]] + : + ENABLE: 0 + MAX_FRAME_SIZE: 9416 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [[1, 2], + [5, 6], + [9, 10], + [13, 14], + [17, 18], + [21, 22], + [25, 26], + [29, 30], + [34, 35], + [38, 39], + [42, 43], + [46, 47], + [51, 52], + [55, 56], + [59, 60], + [63, 64], + [204, 205], + [208, 209], + [212, 213], + [216, 217], + [221, 222], + [225, 226], + [229, 230], + [233, 234]] + : + ENABLE: 0 + SPEED: 100000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS528 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: [[238], + [242], + [246], + [250], + [255], + [259], + [263], + [267]] + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0 + + # Per pipe flex state configuration + #FLEX_STATE_CONFIG: + # FLEX_STATE_ING_OPERMODE_PIPEUNIQUE: 0 + # FLEX_STATE_EGR_OPERMODE_PIPEUNIQUE: 1 + + # Lossy vs Lossless mode + TM_THD_CONFIG: + THRESHOLD_MODE: LOSSLESS + + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/media_settings.json b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/media_settings.json new file mode 100644 index 000000000000..40dee23001f3 --- /dev/null +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/media_settings.json @@ -0,0 +1,2397 @@ +{ + "PORT_MEDIA_SETTINGS": { + "1": { + "Default": { + "main": { + "lane0": "0x82", + "lane1": "0x82", + "lane2": "0x82", + "lane3": "0x82", + "lane4": "0x82", + "lane5": "0x82", + "lane6": "0x82", + "lane7": "0x82" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "pre2": { + "lane0": "0x8", + "lane1": "0x8", + "lane2": "0x8", + "lane3": "0x8", + "lane4": "0x8", + "lane5": "0x8", + "lane6": "0x8", + "lane7": "0x8" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "2": { + "Default": { + "main": { + "lane0": "0x82", + "lane1": "0x82", + "lane2": "0x82", + "lane3": "0x82", + "lane4": "0x82", + "lane5": "0x82", + "lane6": "0x82", + "lane7": "0x82" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "pre2": { + "lane0": "0x8", + "lane1": "0x8", + "lane2": "0x8", + "lane3": "0x8", + "lane4": "0x8", + "lane5": "0x8", + "lane6": "0x8", + "lane7": "0x8" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "3": { + "Default": { + "main": { + "lane0": "0x82", + "lane1": "0x82", + "lane2": "0x82", + "lane3": "0x82", + "lane4": "0x82", + "lane5": "0x82", + "lane6": "0x82", + "lane7": "0x82" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "pre2": { + "lane0": "0x8", + "lane1": "0x8", + "lane2": "0x8", + "lane3": "0x8", + "lane4": "0x8", + "lane5": "0x8", + "lane6": "0x8", + "lane7": "0x8" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "4": { + "Default": { + "main": { + "lane0": "0x82", + "lane1": "0x82", + "lane2": "0x82", + "lane3": "0x82", + "lane4": "0x82", + "lane5": "0x82", + "lane6": "0x82", + "lane7": "0x82" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { 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+ "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "pre2": { + "lane0": "0x8", + "lane1": "0x8", + "lane2": "0x8", + "lane3": "0x8", + "lane4": "0x8", + "lane5": "0x8", + "lane6": "0x8", + "lane7": "0x8" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "33": { + "Default": { + "main": { + "lane0": "0x22" + }, + "post1": { + "lane0": "0x9" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + }, + "pre1": { + "lane0": "0x1" + }, + "pre2": { + "lane0": "0x0" + }, + "pre3": { + "lane0": "0x0" + } + } + } + } +} \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/port_config.ini b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/port_config.ini index 8a509463df4c..eff97ad3254a 100644 --- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/port_config.ini +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/port_config.ini @@ -1,114 +1,114 @@ -#name lanes alias index speed fec -Ethernet0 1 Ethernet1/1 1 25000 -Ethernet1 5 Ethernet1/2 1 25000 -Ethernet2 3 Ethernet1/3 1 25000 -Ethernet3 7 Ethernet1/4 1 25000 -Ethernet8 9 Ethernet2/1 2 25000 -Ethernet9 13 Ethernet2/2 2 25000 -Ethernet10 11 Ethernet2/3 2 25000 -Ethernet11 15 Ethernet2/4 2 25000 -Ethernet16 17 Ethernet3/1 3 25000 -Ethernet17 21 Ethernet3/2 3 25000 -Ethernet18 19 Ethernet3/3 3 25000 -Ethernet19 23 Ethernet3/4 3 25000 -Ethernet24 25 Ethernet4/1 4 25000 -Ethernet25 29 Ethernet4/2 4 25000 -Ethernet26 27 Ethernet4/3 4 25000 -Ethernet27 31 Ethernet4/4 4 25000 -Ethernet32 33 Ethernet5/1 5 25000 -Ethernet33 37 Ethernet5/2 5 25000 -Ethernet34 35 Ethernet5/3 5 25000 -Ethernet35 39 Ethernet5/4 5 25000 -Ethernet40 41 Ethernet6/1 6 25000 -Ethernet41 45 Ethernet6/2 6 25000 -Ethernet42 43 Ethernet6/3 6 25000 -Ethernet43 47 Ethernet6/4 6 25000 -Ethernet48 49 Ethernet7/1 7 25000 -Ethernet49 53 Ethernet7/2 7 25000 -Ethernet50 51 Ethernet7/3 7 25000 -Ethernet51 55 Ethernet7/4 7 25000 -Ethernet56 57 Ethernet8/1 8 25000 -Ethernet57 61 Ethernet8/2 8 25000 -Ethernet58 59 Ethernet8/3 8 25000 -Ethernet59 63 Ethernet8/4 8 25000 -Ethernet64 65 Ethernet9/1 9 25000 -Ethernet65 69 Ethernet9/2 9 25000 -Ethernet66 67 Ethernet9/3 9 25000 -Ethernet67 71 Ethernet9/4 9 25000 -Ethernet72 73 Ethernet10/1 10 25000 -Ethernet73 77 Ethernet10/2 10 25000 -Ethernet74 75 Ethernet10/3 10 25000 -Ethernet75 79 Ethernet10/4 10 25000 -Ethernet80 81 Ethernet11/1 11 25000 -Ethernet81 85 Ethernet11/2 11 25000 -Ethernet82 83 Ethernet11/3 11 25000 -Ethernet83 87 Ethernet11/4 11 25000 -Ethernet88 89 Ethernet12/1 12 25000 -Ethernet89 93 Ethernet12/2 12 25000 -Ethernet90 91 Ethernet12/3 12 25000 -Ethernet91 95 Ethernet12/4 12 25000 -Ethernet96 97 Ethernet13/1 13 25000 -Ethernet97 101 Ethernet13/2 13 25000 -Ethernet98 99 Ethernet13/3 13 25000 -Ethernet99 103 Ethernet13/4 13 25000 -Ethernet104 105 Ethernet14/1 14 25000 -Ethernet105 109 Ethernet14/2 14 25000 -Ethernet106 107 Ethernet14/3 14 25000 -Ethernet107 111 Ethernet14/4 14 25000 -Ethernet112 113 Ethernet15/1 15 25000 -Ethernet113 117 Ethernet15/2 15 25000 -Ethernet114 115 Ethernet15/3 15 25000 -Ethernet115 119 Ethernet15/4 15 25000 -Ethernet120 121 Ethernet16/1 16 25000 -Ethernet121 125 Ethernet16/2 16 25000 -Ethernet122 123 Ethernet16/3 16 25000 -Ethernet123 127 Ethernet16/4 16 25000 -Ethernet128 385 Ethernet17/1 17 25000 -Ethernet129 389 Ethernet17/2 17 25000 -Ethernet130 387 Ethernet17/3 17 25000 -Ethernet131 391 Ethernet17/4 17 25000 -Ethernet136 393 Ethernet18/1 18 25000 -Ethernet137 397 Ethernet18/2 18 25000 -Ethernet138 395 Ethernet18/3 18 25000 -Ethernet139 399 Ethernet18/4 18 25000 -Ethernet144 401 Ethernet19/1 19 25000 -Ethernet145 405 Ethernet19/2 19 25000 -Ethernet146 403 Ethernet19/3 19 25000 -Ethernet147 407 Ethernet19/4 19 25000 -Ethernet152 409 Ethernet20/1 20 25000 -Ethernet153 413 Ethernet20/2 20 25000 -Ethernet154 411 Ethernet20/3 20 25000 -Ethernet155 415 Ethernet20/4 20 25000 -Ethernet160 417 Ethernet21/1 21 25000 -Ethernet161 421 Ethernet21/2 21 25000 -Ethernet162 419 Ethernet21/3 21 25000 -Ethernet163 423 Ethernet21/4 21 25000 -Ethernet168 425 Ethernet22/1 22 25000 -Ethernet169 429 Ethernet22/2 22 25000 -Ethernet170 427 Ethernet22/3 22 25000 -Ethernet171 431 Ethernet22/4 22 25000 -Ethernet176 433 Ethernet23/1 23 25000 -Ethernet177 437 Ethernet23/2 23 25000 -Ethernet178 435 Ethernet23/3 23 25000 -Ethernet179 439 Ethernet23/4 23 25000 -Ethernet184 441 Ethernet24/1 24 25000 -Ethernet185 445 Ethernet24/2 24 25000 -Ethernet186 443 Ethernet24/3 24 25000 -Ethernet187 447 Ethernet24/4 24 25000 -Ethernet192 449,450,451,452 Ethernet25/1 25 100000 rs -Ethernet196 453,454,455,456 Ethernet25/5 25 100000 rs -Ethernet200 457,458,459,460 Ethernet26/1 26 100000 rs -Ethernet204 461,462,463,464 Ethernet26/5 26 100000 rs -Ethernet208 465,466,467,468 Ethernet27/1 27 100000 rs -Ethernet212 469,470,471,472 Ethernet27/5 27 100000 rs -Ethernet216 473,474,475,476 Ethernet28/1 28 100000 rs -Ethernet220 477,478,479,480 Ethernet28/5 28 100000 rs -Ethernet224 481,482,483,484 Ethernet29/1 29 200000 rs -Ethernet228 485,486,487,488 Ethernet29/5 29 200000 rs -Ethernet232 489,490,491,492 Ethernet30/1 30 200000 rs -Ethernet236 493,494,495,496 Ethernet30/5 30 200000 rs -Ethernet240 497,498,499,500 Ethernet31/1 31 200000 rs -Ethernet244 501,502,503,504 Ethernet31/5 31 200000 rs -Ethernet248 505,506,507,508 Ethernet32/1 32 200000 rs -Ethernet252 509,510,511,512 Ethernet32/5 32 200000 rs -Ethernet256 513 Ethernet33 33 10000 none +#name lanes alias index speed fec subport +Ethernet0 1 Ethernet1/1 1 25000 none 1 +Ethernet1 5 Ethernet1/2 1 25000 none 2 +Ethernet2 3 Ethernet1/3 1 25000 none 3 +Ethernet3 7 Ethernet1/4 1 25000 none 4 +Ethernet8 9 Ethernet2/1 2 25000 none 1 +Ethernet9 13 Ethernet2/2 2 25000 none 2 +Ethernet10 11 Ethernet2/3 2 25000 none 3 +Ethernet11 15 Ethernet2/4 2 25000 none 4 +Ethernet16 17 Ethernet3/1 3 25000 none 1 +Ethernet17 21 Ethernet3/2 3 25000 none 2 +Ethernet18 19 Ethernet3/3 3 25000 none 3 +Ethernet19 23 Ethernet3/4 3 25000 none 4 +Ethernet24 25 Ethernet4/1 4 25000 none 1 +Ethernet25 29 Ethernet4/2 4 25000 none 2 +Ethernet26 27 Ethernet4/3 4 25000 none 3 +Ethernet27 31 Ethernet4/4 4 25000 none 4 +Ethernet32 33 Ethernet5/1 5 25000 none 1 +Ethernet33 37 Ethernet5/2 5 25000 none 2 +Ethernet34 35 Ethernet5/3 5 25000 none 3 +Ethernet35 39 Ethernet5/4 5 25000 none 4 +Ethernet40 41 Ethernet6/1 6 25000 none 1 +Ethernet41 45 Ethernet6/2 6 25000 none 2 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Ethernet12/2 12 25000 none 2 +Ethernet90 91 Ethernet12/3 12 25000 none 3 +Ethernet91 95 Ethernet12/4 12 25000 none 4 +Ethernet96 97 Ethernet13/1 13 25000 none 1 +Ethernet97 101 Ethernet13/2 13 25000 none 2 +Ethernet98 99 Ethernet13/3 13 25000 none 3 +Ethernet99 103 Ethernet13/4 13 25000 none 4 +Ethernet104 105 Ethernet14/1 14 25000 none 1 +Ethernet105 109 Ethernet14/2 14 25000 none 2 +Ethernet106 107 Ethernet14/3 14 25000 none 3 +Ethernet107 111 Ethernet14/4 14 25000 none 4 +Ethernet112 113 Ethernet15/1 15 25000 none 1 +Ethernet113 117 Ethernet15/2 15 25000 none 2 +Ethernet114 115 Ethernet15/3 15 25000 none 3 +Ethernet115 119 Ethernet15/4 15 25000 none 4 +Ethernet120 121 Ethernet16/1 16 25000 none 1 +Ethernet121 125 Ethernet16/2 16 25000 none 2 +Ethernet122 123 Ethernet16/3 16 25000 none 3 +Ethernet123 127 Ethernet16/4 16 25000 none 4 +Ethernet128 385 Ethernet17/1 17 25000 none 1 +Ethernet129 389 Ethernet17/2 17 25000 none 2 +Ethernet130 387 Ethernet17/3 17 25000 none 3 +Ethernet131 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"0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "pre2": { + "lane0": "0x8", + "lane1": "0x8", + "lane2": "0x8", + "lane3": "0x8", + "lane4": "0x8", + "lane5": "0x8", + "lane6": "0x8", + "lane7": "0x8" + }, + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "33": { + "Default": { + "main": { + "lane0": "0x22" + }, + "post1": { + "lane0": "0x9" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + }, + "pre1": { + "lane0": "0x1" + }, + "pre2": { + "lane0": "0x0" + }, + "pre3": { + "lane0": "0x0" + } + } + } + } +} \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffer_ports.j2 new file mode 100644 index 000000000000..6b6ae10e51c1 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffer_ports.j2 @@ -0,0 +1,6 @@ +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 512, 8) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffer_ports.j2 new file mode 100644 index 000000000000..6b6ae10e51c1 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffer_ports.j2 @@ -0,0 +1,6 @@ +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 512, 8) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm index 6915862e1966..d4af799ff797 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm @@ -1395,14 +1395,25 @@ bcm_device: 0: global: ftem_mem_entries: 65536 + sai_stats_support_mask: 0 + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 ... --- device: 0: # Per pipe flex counter configuration CTR_EFLEX_CONFIG: - CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0 - CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0 + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 # IFP mode FP_CONFIG: diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED deleted file mode 120000 index afd21766cc64..000000000000 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED +++ /dev/null @@ -1 +0,0 @@ -../../../common/profiles/th5/gen/BALANCED \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..b1418a68eb31 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "165603428", + "type": "ingress", + "mode": "dynamic", + "xoff": "29520896" + }, + "egress_lossless_pool": { + "size": "165603428", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool": "ingress_lossless_pool", + "size": "0", + "static_th": "167546528" + }, + "egress_lossy_profile": { + "pool": "egress_lossless_pool", + "size": "1778", + "dynamic_th": "0" + }, + "egress_lossless_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "static_th": "167546528" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..46a7b799acf2 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t1.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "121964196", + "type": "ingress", + "mode": "dynamic", + "xoff": "29520896" + }, + "egress_lossless_pool": { + "size": "121964196", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool": "ingress_lossless_pool", + "size": "0", + "static_th": "167546528" + }, + "egress_lossy_profile": { + "pool": "egress_lossless_pool", + "size": "1778", + "dynamic_th": "1" + }, + "egress_lossless_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "static_th": "125995684" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/pg_profile_lookup.ini new file mode 100644 index 000000000000..bc4b6528ea10 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/pg_profile_lookup.ini @@ -0,0 +1,23 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 1248 2288 35776 0 2288 + 25000 5m 1248 2288 53248 0 2288 + 40000 5m 1248 2288 66560 0 2288 + 50000 5m 1248 2288 90272 0 2288 + 100000 5m 18796 3556 300990 0 3556 + 200000 5m 18796 3556 300990 0 3556 + 400000 5m 18796 3556 300990 0 3556 + 10000 40m 1248 2288 37024 0 2288 + 25000 40m 1248 2288 53248 0 2288 + 40000 40m 1248 2288 71552 0 2288 + 50000 40m 1248 2288 96096 0 2288 + 100000 40m 18796 3556 300990 0 3556 + 200000 40m 18796 3556 300990 0 3556 + 400000 40m 18796 3556 300990 0 3556 + 10000 300m 1248 2288 46176 0 2288 + 25000 300m 1248 2288 79040 0 2288 + 40000 300m 1248 2288 108160 0 2288 + 50000 300m 1248 2288 141856 0 2288 + 100000 300m 18796 3556 300990 0 3556 + 200000 300m 18796 3556 300990 0 3556 + 400000 300m 18796 3556 300990 0 3556 diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm index 103fff69eb34..eecb986fdb45 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm @@ -19,7 +19,6 @@ # ... # : # - --- bcm_device: 0: @@ -40,6 +39,7 @@ bcm_device: l3_intf_vlan_split_egress : 1 pfc_deadlock_seq_control : 1 sai_tunnel_support: 2 + mmu_init_config: "\"TH5-MSFT-PROD\"" bcm_tunnel_term_compatible_mode: 1 l3_ecmp_member_first_lkup_mem_size: 12288 --- @@ -1907,14 +1907,25 @@ bcm_device: 0: global: ftem_mem_entries: 65536 + sai_stats_support_mask: 0 + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 ... --- device: 0: # Per pipe flex counter configuration CTR_EFLEX_CONFIG: - CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0 - CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0 + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 # IFP mode FP_CONFIG: @@ -1926,3 +1937,1185 @@ device: DEVICE_CONFIG: AUTOLOAD_BOARD_SETTINGS: 0 ... +### Baseline +# Skipping buffer reservation. This means that don't use SDK default setings. +--- +device: + 0: + TM_THD_CONFIG: + SKIP_BUFFER_RESERVATION: 1 + THRESHOLD_MODE: LOSSY_AND_LOSSLESS + + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_2 + +... + +# Initialize the various thresholds to zero +--- +# Ingress service pool level initialization +device: + 0: + # Ingress service pool + TM_ING_THD_SERVICE_POOL: + ? + BUFFER_POOL: [0,1] + TM_ING_SERVICE_POOL_ID: [[0,3]] + : + COLOR_SPECIFIC_LIMITS: 0 + SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_OFFSET_CELLS: 0 + YELLOW_OFFSET_CELLS: 0 + RED_OFFSET_CELLS: 0 + + # Ingress headroom pool + TM_ING_THD_HEADROOM_POOL: + ? + BUFFER_POOL: [0,1] + TM_HEADROOM_POOL_ID: [[0,3]] + : + LIMIT_CELLS: 0 + +... +# Ingress priority to PG mappings +--- +device: + 0: + # priority to PG mapping for UC traffic, 8 profiles (IDs), 16 priorties + TM_ING_UC_ING_PRI_MAP: + ? + # Profile 0 + TM_ING_UC_ING_PRI_MAP_ID: [0,7] + ING_PRI: [0,15] + : + TM_PRI_GRP_ID: 0 + + # priority to PG mapping for MC traffic, 8 profiles( IDs) 16 priorities + TM_ING_NONUC_ING_PRI_MAP: + ? + # Profile 0 + TM_ING_NONUC_ING_PRI_MAP_ID: [0,7] + ING_PRI: [0,15] + : + TM_PRI_GRP_ID: 0 + + TM_PRI_GRP_POOL_MAP: + ? + TM_PRI_GRP_POOL_MAP_ID: [0,7] + TM_PRI_GRP_ID: [[0,7]] + : + TM_ING_SERVICE_POOL_ID: 0 + TM_HEADROOM_POOL_ID: 0 + + # PFC generation: Priority group(s) + TM_PFC_PRI_TO_PRI_GRP_MAP: + ? + TM_PFC_PRI_TO_PRI_GRP_MAP_ID: [0,7] + PFC_PRI: [0,7] + : + TM_PRI_GRP_ID: 0 + +... +# Egress service pool level initialization +# Output port Thresholds +--- +device: + 0: + # Egress unicast shared pool + TM_EGR_THD_SERVICE_POOL: + ? + BUFFER_POOL: [0,1] + TM_EGR_SERVICE_POOL_ID: [[0,3]] + : + COLOR_SPECIFIC_LIMITS: 0 + SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_LIMIT_CELLS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 + RED_SHARED_LIMIT_CELLS: 0 + RED_SHARED_RESUME_LIMIT_CELLS: 0 + + # Egress multicast CQE pool + TM_THD_MC_EGR_SERVICE_POOL: + ? + BUFFER_POOL: [0,1] + TM_EGR_SERVICE_POOL_ID: [[0,3]] + : + COLOR_SPECIFIC_LIMITS: 0 + SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_LIMIT_CELLS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 + RED_SHARED_LIMIT_CELLS: 0 + RED_SHARED_RESUME_LIMIT_CELLS: 0 + + + TM_THD_DYNAMIC_MARGIN: + ? + BUFFER_POOL: [0,1] + TM_EGR_SERVICE_POOL_ID: [0,3] + : + MARGIN: [8256,16513,24769,33026,41282,49539,57795,66052,82565,99078] + +... +#Per Port Registers +#Input Port Thresholds +--- +device: + 0: + # Set PG is LOSSLESS, PFC enable bit + TM_ING_PORT_PRI_GRP: + ? + PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_PRI_GRP_ID: [[0,7]] + : + PFC: 0 + LOSSLESS: 0 + ING_MIN_MODE: USE_PRI_GRP_MIN + + TM_ING_PORT: + ? + PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + : + # Pause enable bit, + PAUSE: 0 + # Ingress priority profile select, maps to priority group + ING_PRI_MAP_ID: 0 + #Priority group profile select, maps to service pool + PRI_GRP_MAP_ID: 0 + + # Ingress port Level to Service Pool limits + TM_ING_THD_PORT_SERVICE_POOL: + ? + PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_ING_SERVICE_POOL_ID: [[0,3]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMIT_CELLS: 0 + RESUME_LIMIT_CELLS: 0 + + # Port level PG limits + TM_ING_THD_PORT_PRI_GRP: + ? + PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_PRI_GRP_ID: [[0,7]] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + RESUME_OFFSET_CELLS: 0 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 0 + EARLY_PFC_XOFF_OFFSET_CELLS: 0 + EARLY_PFC_XON_OFFSET_CELLS: 0 + EARLY_PFC_FLOOR_CELLS: 0 + +... +# Output Port Thresholds -2 +# Per Unicast Queue Thresholds +--- +device: + 0: + TM_EGR_SERVICE_POOL_DYNAMIC: + ? + BUFFER_POOL: [0,1] + TM_EGR_SERVICE_POOL_ID: [0,3] + : + ADAPTIVE_DYNAMIC: ALPHA_1 + + TM_PORT_UC_Q_TO_SERVICE_POOL: + ? + PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_UC_Q_ID: [[0,7]] + : + USE_QGROUP_MIN: 0 + + TM_THD_UC_Q: + ? + PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_UC_Q_ID: [[0,7]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + + TM_PORT_MC_Q_TO_SERVICE_POOL: + ? + PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_MC_Q_ID: [[0,1]] + : + USE_QGROUP_MIN: 0 + + TM_THD_MC_Q: + ? + # CPU port, 48 MC queues + PORT_ID: 0 + TM_MC_Q_ID: [[0,47]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + ? + # uplink, downlink and loopback ports, 2 MC queues + PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_MC_Q_ID: [[0,1]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + + TM_THD_Q_GRP: + ? + PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + : + UC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + + TM_EGR_THD_UC_PORT_SERVICE_POOL: + ? + PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_EGR_SERVICE_POOL_ID: [0,3] + : + COLOR_SPECIFIC_LIMITS: 0 + SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_LIMIT_CELLS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 + RED_SHARED_LIMIT_CELLS: 0 + RED_SHARED_RESUME_LIMIT_CELLS: 0 + + TM_EGR_THD_MC_PORT_SERVICE_POOL: + ? + PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_EGR_SERVICE_POOL_ID: [0,3] + : + COLOR_SPECIFIC_LIMITS: 0 + RED_SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + SHARED_LIMIT_CELLS: 0 + RED_SHARED_RESUME_LIMIT_CELLS: 0 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 + SHARED_RESUME_LIMIT_CELLS: 0 +... +### THDR Limits : initialization +--- +device: + 0: + TM_THD_REPL_Q: + ? + REPL_Q_NUM: [0,6] + : + SHARED_LIMITS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 0 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + SHARED_LIMIT_PKTS: 0 + DYNAMIC_SHARED_LIMIT_PKTS: 0 + SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1 + RESUME_OFFSET_PKTS: 0 + COLOR_SPECIFIC_LIMIT_PKTS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0 + YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750 + RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625 + MIN_GUARANTEE_CELLS: 0 + MIN_GUARANTEE_PKTS: 0 + + TM_THD_REPL_SERVICE_POOL: + SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_LIMIT_CELLS: 0 + COLOR_SPECIFIC_LIMITS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 + RED_SHARED_LIMIT_CELLS: 0 + RED_SHARED_RESUME_LIMIT_CELLS: 0 + SHARED_LIMIT_PKTS: 0 + SHARED_RESUME_LIMIT_PKTS: 0 + COLOR_SPECIFIC_LIMITS: 0 + YELLOW_SHARED_LIMIT_PKTS: 0 + YELLOW_SHARED_RESUME_LIMIT_PKTS: 0 + RED_SHARED_LIMIT_PKTS: 0 + RED_SHARED_RESUME_LIMIT_PKTS: 0 + +... +### Begin MMU ingress threshold settings + +### Pools +--- +device: + 0: +# Ingress Service Pool Thresholds + TM_ING_THD_SERVICE_POOL: + ? + BUFFER_POOL: [0,1] + TM_ING_SERVICE_POOL_ID: 0 + : + SHARED_LIMIT_CELLS: 240087 + SHARED_RESUME_OFFSET_CELLS: 74 + COLOR_SPECIFIC_LIMITS: 0 + ? + BUFFER_POOL: [0,1] + TM_ING_SERVICE_POOL_ID: 1 + : + SHARED_LIMIT_CELLS: 605 + SHARED_RESUME_OFFSET_CELLS: 74 + COLOR_SPECIFIC_LIMITS: 0 + + +# Ingress Headroom Pool Thresholds + TM_ING_THD_HEADROOM_POOL: + ? + BUFFER_POOL: [0,1] + TM_HEADROOM_POOL_ID: 0 + : + LIMIT_CELLS: 58112 + +... +--- +device: + 0: +# UC Traffic Priority to PG mapping + TM_ING_UC_ING_PRI_MAP: + ? + # Profile 0 + TM_ING_UC_ING_PRI_MAP_ID: 0 + ING_PRI: [0, 1, 2, 5, 6, [8,15]] + : + TM_PRI_GRP_ID: 0 + ? + TM_ING_UC_ING_PRI_MAP_ID: 0 + ING_PRI: 3 + : + TM_PRI_GRP_ID: 3 + ? + TM_ING_UC_ING_PRI_MAP_ID: 0 + ING_PRI: 4 + : + TM_PRI_GRP_ID: 4 + ? + TM_ING_UC_ING_PRI_MAP_ID: 0 + ING_PRI: 7 + : + TM_PRI_GRP_ID: 7 + ? + # Profile 1 + TM_ING_UC_ING_PRI_MAP_ID: 1 + ING_PRI: [[0,7]] + : + TM_PRI_GRP_ID: 7 + ? + TM_ING_UC_ING_PRI_MAP_ID: 1 + ING_PRI: [[8,15]] + : + TM_PRI_GRP_ID: 0 + +# MC Traffic Priority to PG mapping + TM_ING_NONUC_ING_PRI_MAP: + ? + # Profile 0 + TM_ING_NONUC_ING_PRI_MAP_ID: 0 + ING_PRI: [0, 1, 2, 5, 6, [8,15]] + : + TM_PRI_GRP_ID: 0 + ? + TM_ING_NONUC_ING_PRI_MAP_ID: 0 + ING_PRI: 3 + : + TM_PRI_GRP_ID: 3 + ? + TM_ING_NONUC_ING_PRI_MAP_ID: 0 + ING_PRI: 4 + : + TM_PRI_GRP_ID: 4 + ? + TM_ING_NONUC_ING_PRI_MAP_ID: 0 + ING_PRI: 7 + : + TM_PRI_GRP_ID: 7 + ? + # Profile 1 + TM_ING_NONUC_ING_PRI_MAP_ID: 1 + ING_PRI: [[0,7]] + : + TM_PRI_GRP_ID: 7 + ? + TM_ING_NONUC_ING_PRI_MAP_ID: 1 + ING_PRI: [[8,15]] + : + TM_PRI_GRP_ID: 0 + +# PG to Headroom Pool Mapping + TM_PRI_GRP_POOL_MAP: + ? + TM_PRI_GRP_POOL_MAP_ID: 0 + TM_PRI_GRP_ID: [[0,6]] + : + TM_HEADROOM_POOL_ID: 0 + ? + TM_PRI_GRP_POOL_MAP_ID: 0 + TM_PRI_GRP_ID: 7 + : + TM_HEADROOM_POOL_ID: 1 + +# PG to Service Pool Mapping + TM_PRI_GRP_POOL_MAP: + ? + TM_PRI_GRP_POOL_MAP_ID: 0 + TM_PRI_GRP_ID: [[0,6]] + : + TM_ING_SERVICE_POOL_ID: 0 + ? + TM_PRI_GRP_POOL_MAP_ID: 0 + TM_PRI_GRP_ID: 7 + : + TM_ING_SERVICE_POOL_ID: 1 + +# Ingress PG to PFC priority mapping +# TM_PFC_PRI_TO_PRI_GRP_MAP is mapped to MMU_THDI_PFCPRI_PG_PROFILE in physical table. There are 8 profiles to configure the PFC to priority group mappings. For exmple, you could map multiple PG to a PFC. This is needed to generate PFC when a PG is hitting the limits. + TM_PFC_PRI_TO_PRI_GRP_MAP: + ? + TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0 + PFC_PRI: 3 + : + TM_PRI_GRP_ID: 3 + ? + TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0 + PFC_PRI: 4 + : + TM_PRI_GRP_ID: 4 + +# Per input port PG and flow control configurations +# TM_ING_PORT_PRI_GRP is mapped to MMU_THDI_ING_PORT_CONFIG in physical table + TM_ING_PORT_PRI_GRP: + ? + PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]] + TM_PRI_GRP_ID: [3,4] + : + PFC: 1 + LOSSLESS: 1 + ? + PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]] + TM_PRI_GRP_ID: [3,4] + : + PFC: 1 + LOSSLESS: 1 + +# ING_PRI_MAP_ID is the ingress priority PG profile select, which maps to the Priority Group +# PRI_GRP_MAP_ID is the Priority Group profile select, which maps to service pool + TM_ING_PORT: + ? + PORT_ID: [0] + : + ING_PRI_MAP_ID: 1 + PRI_GRP_MAP_ID: 0 + ? + PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]] + : + ING_PRI_MAP_ID: 0 + PRI_GRP_MAP_ID: 0 + ? + PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]] + : + ING_PRI_MAP_ID: 0 + PRI_GRP_MAP_ID: 0 + ? + PORT_ID: [76, 274] + : + ING_PRI_MAP_ID: 1 + PRI_GRP_MAP_ID: 0 + ? + PORT_ID: [21, 43, 65, 87, 109, 131, 153, 175, 197, 219, 241, 263, 285, 307, 329, 351] + : + ING_PRI_MAP_ID: 1 + PRI_GRP_MAP_ID: 0 + +... + + +###################################### +--- +device: + 0: +# Per input port Service Pool Thresholds + TM_ING_THD_PORT_SERVICE_POOL: + ? + PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_ING_SERVICE_POOL_ID: [0, 1] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMIT_CELLS: 329816 + RESUME_LIMIT_CELLS: 329816 + +# Per input Port PG Thresholds + TM_ING_THD_PORT_PRI_GRP: + ? + PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_PRI_GRP_ID: [0, 1, 2, 5, 6, 7] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 329816 + HEADROOM_LIMIT_CELLS: 0 + RESUME_OFFSET_CELLS: 0 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + ? + PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]] + TM_PRI_GRP_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 74 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 14 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 1185 + ? + PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]] + TM_PRI_GRP_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 74 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 14 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 1185 + ? + PORT_ID: [76, 274] + TM_PRI_GRP_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 0 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 0 + ? + PORT_ID: [21, 43, 65, 87, 109, 131, 153, 175, 197, 219, 241, 263, 285, 307, 329, 351] + TM_PRI_GRP_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 0 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + ? + PORT_ID: [0] + TM_PRI_GRP_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1_4 + RESUME_OFFSET_CELLS: 0 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + +... + + +### Egress Service Pools +--- +device: + 0: +# Unicast Egress Service Pool Limits + TM_EGR_THD_SERVICE_POOL: + ? + BUFFER_POOL: [0,1] + TM_EGR_SERVICE_POOL_ID: 0 + : + SHARED_LIMIT_CELLS: 240087 + SHARED_RESUME_LIMIT_CELLS: 30001 + COLOR_SPECIFIC_LIMITS: 0 + YELLOW_SHARED_LIMIT_CELLS: 22509 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 22499 + RED_SHARED_LIMIT_CELLS: 18757 + RED_SHARED_RESUME_LIMIT_CELLS: 18747 + ? + BUFFER_POOL: [0,1] + TM_EGR_SERVICE_POOL_ID: 1 + : + SHARED_LIMIT_CELLS: 605 + SHARED_RESUME_LIMIT_CELLS: 73 + COLOR_SPECIFIC_LIMITS: 0 + YELLOW_SHARED_LIMIT_CELLS: 57 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 55 + RED_SHARED_LIMIT_CELLS: 48 + RED_SHARED_RESUME_LIMIT_CELLS: 46 +... +--- +device: + 0: +# Multicast Egress Service Pool Limits, CQEs + TM_THD_MC_EGR_SERVICE_POOL: + ? + BUFFER_POOL: [0,1] + TM_EGR_SERVICE_POOL_ID: 0 + : + SHARED_LIMIT_CELLS: 19538 + ? + BUFFER_POOL: [0,1] + TM_EGR_SERVICE_POOL_ID: 1 + : + SHARED_LIMIT_CELLS: 605 +... +--- +device: + 0: +# Multicast Egress Service Pool Limits, CQEs + TM_THD_MC_EGR_SERVICE_POOL: + ? + BUFFER_POOL: [0,1] + TM_EGR_SERVICE_POOL_ID: 0 + : + SHARED_RESUME_LIMIT_CELLS: 2432 + COLOR_SPECIFIC_LIMITS: 0 + YELLOW_SHARED_LIMIT_CELLS: 1832 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 1822 + RED_SHARED_LIMIT_CELLS: 1527 + RED_SHARED_RESUME_LIMIT_CELLS: 1517 + ? + BUFFER_POOL: [0,1] + TM_EGR_SERVICE_POOL_ID: 1 + : + SHARED_RESUME_LIMIT_CELLS: 73 + COLOR_SPECIFIC_LIMITS: 0 + YELLOW_SHARED_LIMIT_CELLS: 57 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 55 + RED_SHARED_LIMIT_CELLS: 48 + RED_SHARED_RESUME_LIMIT_CELLS: 46 +... + +... +### Adaptive Alpha +--- +device: + 0: + TM_EGR_SERVICE_POOL_DYNAMIC: + ? + BUFFER_POOL: [0,1] + TM_EGR_SERVICE_POOL_ID: [0] + : + ADAPTIVE_DYNAMIC: ALPHA_1 + + TM_THD_DYNAMIC_MARGIN: + ? + BUFFER_POOL: [0,1] + TM_EGR_SERVICE_POOL_ID: [0] + : + MARGIN: [16513, 33026, 49539, 66052, 82565, 99078, 115591, 132104, 148617, 165130] + +... + +--- +device: + 0: + TM_PORT_UC_Q_TO_SERVICE_POOL: + ? + PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_UC_Q_ID: [0,1,2,5,6,8,9] + : + USE_QGROUP_MIN: 0 + TM_EGR_SERVICE_POOL_ID: 0 + ? + PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_UC_Q_ID: [3,4] + : + USE_QGROUP_MIN: 0 + TM_EGR_SERVICE_POOL_ID: 0 + ? + PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_UC_Q_ID: 7 + : + USE_QGROUP_MIN: 0 + TM_EGR_SERVICE_POOL_ID: 1 + + TM_PORT_MC_Q_TO_SERVICE_POOL: + ? + PORT_ID: [0] + TM_MC_Q_ID: [[0,47]] + : + USE_QGROUP_MIN: 0 + TM_EGR_SERVICE_POOL_ID: 1 + ? + PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_MC_Q_ID: [[0,1]] + : + USE_QGROUP_MIN: 0 + TM_EGR_SERVICE_POOL_ID: 0 +... +### Queue Thresholds +###################################### +--- +device: + 0: + TM_THD_UC_Q: + ? + PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]] + TM_UC_Q_ID: [0, 1, 2, 5, 6, 7] + : + MIN_GUARANTEE_CELLS: 7 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_CELLS_STATIC: 0 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 2 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]] + TM_UC_Q_ID: [8,9] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_CELLS_STATIC: 0 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 2 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]] + TM_UC_Q_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 329816 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 2 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_CELLS_STATIC: 0 + ? + PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]] + TM_UC_Q_ID: [0, 1, 2, 5, 6, 7] + : + MIN_GUARANTEE_CELLS: 7 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_CELLS_STATIC: 0 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 2 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]] + TM_UC_Q_ID: [8,9] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_CELLS_STATIC: 0 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 2 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]] + TM_UC_Q_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 329816 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 2 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_CELLS_STATIC: 0 + + TM_THD_Q_GRP: + ? + PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + : + UC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + + TM_THD_MC_Q: + ? + PORT_ID: [0] + TM_MC_Q_ID: [[0,47]] + : + MIN_GUARANTEE_CELLS: 7 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1_4 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + RESUME_OFFSET_CELLS: 2 + ? + PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_MC_Q_ID: [0,1] + SHARED_LIMIT_DYNAMIC: ALPHA_2 + : + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + RESUME_OFFSET_CELLS: 2 + + TM_EGR_THD_UC_PORT_SERVICE_POOL: + ? + PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_EGR_SERVICE_POOL_ID: 0 + : + COLOR_SPECIFIC_LIMITS: 0 + RED_SHARED_LIMIT_CELLS: 18756 + YELLOW_SHARED_LIMIT_CELLS: 22508 + SHARED_LIMIT_CELLS: 240087 + RED_SHARED_RESUME_LIMIT_CELLS: 18754 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 22506 + SHARED_RESUME_LIMIT_CELLS: 30009 + ? + PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_EGR_SERVICE_POOL_ID: 1 + : + COLOR_SPECIFIC_LIMITS: 0 + RED_SHARED_LIMIT_CELLS: 47 + YELLOW_SHARED_LIMIT_CELLS: 56 + SHARED_LIMIT_CELLS: 605 + RED_SHARED_RESUME_LIMIT_CELLS: 45 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 54 + SHARED_RESUME_LIMIT_CELLS: 73 + + TM_EGR_THD_MC_PORT_SERVICE_POOL: + ? + PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_EGR_SERVICE_POOL_ID: 0 + : + COLOR_SPECIFIC_LIMITS: 0 + RED_SHARED_LIMIT_CELLS: 1526 + YELLOW_SHARED_LIMIT_CELLS: 1831 + SHARED_LIMIT_CELLS: 19538 + RED_SHARED_RESUME_LIMIT_CELLS: 1524 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 1829 + SHARED_RESUME_LIMIT_CELLS: 2440 + ? + PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + TM_EGR_SERVICE_POOL_ID: 1 + : + COLOR_SPECIFIC_LIMITS: 0 + RED_SHARED_LIMIT_CELLS: 47 + YELLOW_SHARED_LIMIT_CELLS: 56 + SHARED_LIMIT_CELLS: 605 + RED_SHARED_RESUME_LIMIT_CELLS: 45 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 54 + SHARED_RESUME_LIMIT_CELLS: 73 + +... + + +### PFC mapping +--- +device: + 0: + PC_MAC_CONTROL: + ? + PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] + : + PAUSE_TX: 0 + PAUSE_RX: 0 + + TM_PFC_EGR: + ? + PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]] + : + TM_PFC_PRI_PROFILE_ID: 0 + + TM_PFC_EGR: + ? + PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]] + : + TM_PFC_PRI_PROFILE_ID: 0 +... +--- +device: + 0: +# TM_PFC_PRI_PROFILE is mapped to MMU_INTFI_PFCRPI_PROFILE in physical table. There are 8 profiles to configure the PFC value to COS/priorities mapping. For example, you could map multiple coses to a PFC. This mapping is needed when receiving PFC frames and stopping queues(coses) according to the PFC frame received. + TM_PFC_PRI_PROFILE: + ? + TM_PFC_PRI_PROFILE_ID: 0 + PFC_PRI: 3 + : + PFC: 1 + COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0] + ? + TM_PFC_PRI_PROFILE_ID: 0 + PFC_PRI: 4 + : + PFC: 1 + COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0] + + +# enable the MAC's PFC controls. + PC_PFC: + ? + PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]] + : + ENABLE_RX: 1 + ENABLE_TX: 1 + + PC_PFC: + ? + PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]] + : + ENABLE_RX: 1 + ENABLE_TX: 1 +... +### Mirror-on-drop +--- +device: + 0: + TM_MIRROR_ON_DROP_CONTROL: + RESERVED_LIMIT_CELLS: 0 + + TM_MIRROR_ON_DROP_PROFILE: + ? + TM_MIRROR_ON_DROP_PROFILE_ID: 0 + : + PERCENTAGE_0_25: 65535 + PERCENTAGE_25_50: 65535 + PERCENTAGE_50_75: 65535 + PERCENTAGE_75_100: 65535 + INGRESS_LIMIT: 0 + SHARED_LIMIT: 0 + + TM_MIRROR_ON_DROP_DESTINATION: + ? + TM_MIRROR_ON_DROP_DESTINATION_ID: 0 + : + TM_MC_Q_ID: 11 + PORT_ID: 1 +... +### THDR Limits +--- +device: + 0: + TM_THD_REPL_Q: + ? + REPL_Q_NUM: [0,6] + : + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 14 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + SHARED_LIMIT_PKTS: 1 + DYNAMIC_SHARED_LIMIT_PKTS: 1 + SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1 + RESUME_OFFSET_PKTS: 14 + COLOR_SPECIFIC_LIMIT_PKTS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0 + YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750 + RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625 + + TM_THD_REPL_Q: + ? + REPL_Q_NUM: [0,3] + : + MIN_GUARANTEE_CELLS: 0 + MIN_GUARANTEE_PKTS: 0 + ? + REPL_Q_NUM: [4,6] + : + MIN_GUARANTEE_CELLS: 37 + MIN_GUARANTEE_PKTS: 7 + + + TM_THD_REPL_SERVICE_POOL: + SHARED_LIMIT_CELLS: 11153 + SHARED_RESUME_LIMIT_CELLS: 11139 + SHARED_LIMIT_PKTS: 3051 + SHARED_RESUME_LIMIT_PKTS: 3037 + COLOR_SPECIFIC_LIMITS: 0 + YELLOW_SHARED_LIMIT_CELLS: 8364 + RED_SHARED_LIMIT_CELLS: 6970 + YELLOW_SHARED_LIMIT_PKTS: 2288 + RED_SHARED_LIMIT_PKTS: 1906 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 8350 + RED_SHARED_RESUME_LIMIT_CELLS: 6956 + YELLOW_SHARED_RESUME_LIMIT_PKTS: 2274 + RED_SHARED_RESUME_LIMIT_PKTS: 1892 + +... +### OBM +--- +device: + 0: + TM_OBM_PORT_PKT_PARSE: + ? + PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]] + : + OUTER_TPID: 1 + HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET + DEFAULT_PKT_PRI: 0 # mapp to obm_lossy_low + + TM_OBM_PORT_PKT_PARSE: + ? + PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]] + : + OUTER_TPID: 1 + HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET + DEFAULT_PKT_PRI: 0 # mapp to obm_lossy_low + + TM_OBM_PORT_PKT_PRI_TC_MAP: + ? + PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]] + PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN + PKT_PRI: 1 + : + TRAFFIC_CLASS: OBM_TC_LOSSLESS0 + ? + PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]] + PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN + PKT_PRI: 1 + : + TRAFFIC_CLASS: OBM_TC_LOSSLESS0 + + TM_OBM_PC_PM_PKT_PARSE: + ? + PC_PM_ID: [1,65] + : + OUTER_TPID: 0x8100 + + TM_OBM_THD_PORT: + ? + PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]] + : + THD_AUTO: 0 + MAX_BYTES: 125440 + LOSSY_LOW_MAX_BYTES: 18688 + LOSSY_MAX_BYTES: 25472 + LOSSLESS0_MAX_BYTES: 502528 + LOSSLESS1_MAX_BYTES: 502528 + ? + PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]] + : + THD_AUTO: 0 + MAX_BYTES: 125440 + LOSSY_LOW_MAX_BYTES: 18688 + LOSSY_MAX_BYTES: 25472 + LOSSLESS0_MAX_BYTES: 502528 + LOSSLESS1_MAX_BYTES: 502528 + + TM_OBM_THD_PORT_FLOW_CTRL: + ? + PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]] + : + THD_AUTO: 0 + XOFF_BYTES: 76992 + XON_BYTES: 76480 + LOSSLESS0_XOFF_BYTES: 5184 + LOSSLESS0_XON_BYTES: 4672 + LOSSLESS1_XOFF_BYTES: 5184 + LOSSLESS1_XON_BYTES: 4672 + ? + PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]] + : + THD_AUTO: 0 + XOFF_BYTES: 76992 + XON_BYTES: 76480 + LOSSLESS0_XOFF_BYTES: 5184 + LOSSLESS0_XON_BYTES: 4672 + LOSSLESS1_XOFF_BYTES: 5184 + LOSSLESS1_XON_BYTES: 4672 + + TM_OBM_PORT_FLOW_CTRL: + ? + PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]] + : + FLOW_CTRL: 1 + FLOW_CTRL_TYPE: PFC + LOSSLESS0_FLOW_CTRL: 1 + LOSSLESS1_FLOW_CTRL: 0 + COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0] + COS_BMAP_LOSSLESS1: 0 + + ? + PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]] + : + FLOW_CTRL: 1 + FLOW_CTRL_TYPE: PFC + LOSSLESS0_FLOW_CTRL: 1 + LOSSLESS1_FLOW_CTRL: 0 + COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0] + COS_BMAP_LOSSLESS1: 0 + + TM_OBM_PORT_PKT_PRI_TC_MAP: + ? + PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]] + PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN + PKT_PRI: [0,1,2,5,6,7] + : + TRAFFIC_CLASS: OBM_TC_LOSSY_LOW + ? + PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]] + PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN + PKT_PRI: [3,4] + : + TRAFFIC_CLASS: OBM_TC_LOSSLESS0 + ? + PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]] + PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN + PKT_PRI: [0,1,2,5,6,7] + : + TRAFFIC_CLASS: OBM_TC_LOSSY_LOW + ? + PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]] + PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN + PKT_PRI: [3,4] + : + TRAFFIC_CLASS: OBM_TC_LOSSLESS0 + ? + PORT_ID: [76, 274] + PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN + PKT_PRI: [0,1,2,5,6,7] + : + TRAFFIC_CLASS: OBM_TC_LOSSY_LOW + ? + PORT_ID: [76, 274] + PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN + PKT_PRI: [3,4] + : + TRAFFIC_CLASS: OBM_TC_LOSSLESS0 + +... diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm index a8f3023f96ce..bc493b222406 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm @@ -1139,14 +1139,25 @@ bcm_device: 0: global: ftem_mem_entries: 65536 + sai_stats_support_mask: 0 + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 ... --- device: 0: # Per pipe flex counter configuration CTR_EFLEX_CONFIG: - CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0 - CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0 + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 # IFP mode FP_CONFIG: diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm index 2db52548e224..b76c615c26f2 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm @@ -1139,14 +1139,25 @@ bcm_device: 0: global: ftem_mem_entries: 65536 + sai_stats_support_mask: 0 + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 ... --- device: 0: # Per pipe flex counter configuration CTR_EFLEX_CONFIG: - CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0 - CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0 + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 # IFP mode FP_CONFIG: diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/config.bcm.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/config.bcm.j2 index ee67a684bf77..97040d332ced 100644 --- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/config.bcm.j2 +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/config.bcm.j2 @@ -14,7 +14,8 @@ {%- set switch_subtype = DEVICE_METADATA['localhost']['subtype'] -%} {%- if 'dualtor' in switch_subtype.lower() %} {%- set IPinIP_sock = -'sai_tunnel_underlay_route_mode=1 +'sai_tunnel_support=1 +sai_tunnel_underlay_route_mode=1 host_as_route_disable=1 l3_ecmp_levels=2' -%} {%- set map_prio = 'sai_remap_prio_on_tnl_egress=1' -%} @@ -1048,6 +1049,5 @@ serdes_preemphasis_116=0x103706 serdes_preemphasis_117=0x133c06 {{ mmu_sock }} -sai_tunnel_support=1 {{ IPinIP_sock }} phy_an_lt_msft=1 diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C10/config.bcm.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C10/config.bcm.j2 index 9ba820196e68..019f556edb8f 100644 --- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C10/config.bcm.j2 +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C10/config.bcm.j2 @@ -6,7 +6,8 @@ {%- set switch_subtype = DEVICE_METADATA['localhost']['subtype'] -%} {%- if 'dualtor' in switch_subtype.lower() %} {%- set IPinIP_sock = -'sai_tunnel_underlay_route_mode=1 +'sai_tunnel_support=1 +sai_tunnel_underlay_route_mode=1 host_as_route_disable=1 l3_ecmp_levels=2' -%} {%- set map_prio = 'sai_remap_prio_on_tnl_egress=1' -%} @@ -955,6 +956,5 @@ serdes_preemphasis_130=0x580c serdes_preemphasis_131=0x580c mmu_init_config="MSFT-TH2-Tier0" -sai_tunnel_support=1 {{ IPinIP_sock }} phy_an_lt_msft=1 diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/config.bcm.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/config.bcm.j2 index 70403df33967..1efa8ef69567 100644 --- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/config.bcm.j2 +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/config.bcm.j2 @@ -6,7 +6,8 @@ {%- set switch_subtype = DEVICE_METADATA['localhost']['subtype'] -%} {%- if 'dualtor' in switch_subtype.lower() %} {%- set IPinIP_sock = -'sai_tunnel_underlay_route_mode=1 +'sai_tunnel_support=1 +sai_tunnel_underlay_route_mode=1 host_as_route_disable=1 l3_ecmp_levels=2' -%} {%- set map_prio = 'sai_remap_prio_on_tnl_egress=1' -%} @@ -959,6 +960,5 @@ serdes_preemphasis_130=0x580c serdes_preemphasis_131=0x580c mmu_init_config="MSFT-TH2-Tier0" -sai_tunnel_support=1 {{ IPinIP_sock }} phy_an_lt_msft=1 diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2 index 464796bf4d72..de7cac15435a 100644 --- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2 +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2 @@ -14,7 +14,8 @@ {%- set switch_subtype = DEVICE_METADATA['localhost']['subtype'] -%} {%- if 'dualtor' in switch_subtype.lower() %} {%- set IPinIP_sock = -'sai_tunnel_underlay_route_mode=1 +'sai_tunnel_support=1 +sai_tunnel_underlay_route_mode=1 host_as_route_disable=1 l3_ecmp_levels=2' -%} {%- set map_prio = 'sai_remap_prio_on_tnl_egress=1' -%} @@ -1047,6 +1048,5 @@ serdes_preemphasis_116=0x105004 serdes_preemphasis_117=0x105004 {{ mmu_sock }} -sai_tunnel_support=1 {{ IPinIP_sock }} phy_an_lt_msft=1 diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 index 6ff77dc43e7f..b036683d1dba 100644 --- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 @@ -28,19 +28,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm index f5f261610d25..43535d05b9bd 100644 --- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm +++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm @@ -2,7 +2,7 @@ soc_family.BCM8869X=BCM8869X system_ref_core_clock_khz=1600000 dpp_db_path=/usr/share/bcm/db -custom_feature_ucode_path=u_code_db2pem.txt +programmability_ucode_relative_path.BCM8869X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt system_headers_mode=1 suppress_unknown_prop_warnings=1 l4_protocols_load_balancing_enable=1 diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/pg_profile_lookup.ini b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/pg_profile_lookup.ini index e8289ab03112..5670401e02f1 100644 --- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/pg_profile_lookup.ini +++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/pg_profile_lookup.ini @@ -1,17 +1,17 @@ # PG lossless profiles. # speed cable size xon xoff threshold xon_offset - 40000 300m 1280 2560 69632 0 1280 - 100000 300m 1280 2560 110592 0 1280 - 400000 300m 1280 2560 315392 0 1280 - 40000 1000m 1280 2560 114688 0 1280 - 100000 1000m 1280 2560 225280 0 1280 - 400000 1000m 1280 2560 778240 0 1280 - 40000 2000m 1280 2560 184320 0 1280 - 100000 2000m 1280 2560 393216 0 1280 - 400000 2000m 1280 2560 1445888 0 1280 - 40000 80000m 1280 2560 5369856 0 1280 - 100000 80000m 1280 2560 13357056 0 1280 - 400000 80000m 1280 2560 53305344 0 1280 - 40000 120000m 1280 2560 8028160 0 1280 - 100000 120000m 1280 2560 20004864 0 1280 - 400000 120000m 1280 2560 79900672 0 1280 + 40000 300m 0 2560 69632 -6 181753 + 100000 300m 0 2560 110592 -6 363506 + 400000 300m 0 2560 315392 -6 1454025 + 40000 1000m 0 2560 114688 -6 181753 + 100000 1000m 0 2560 225280 -6 363506 + 400000 1000m 0 2560 778240 -6 1454025 + 40000 2000m 0 2560 184320 -6 181753 + 100000 2000m 0 2560 393216 -6 363506 + 400000 2000m 0 2560 1445888 -6 1454025 + 40000 80000m 0 2560 5369856 -6 181753 + 100000 80000m 0 2560 13357056 -6 363506 + 400000 80000m 0 2560 53305344 -6 1454025 + 40000 120000m 0 2560 8028160 -6 181753 + 100000 120000m 0 2560 20004864 -6 363506 + 400000 120000m 0 2560 79900672 -6 1454025 diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2 index 068cb8a6352c..38ee97c304e8 100644 --- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2 @@ -28,19 +28,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/pg_profile_lookup.ini b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/pg_profile_lookup.ini index e8289ab03112..5670401e02f1 100644 --- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/pg_profile_lookup.ini +++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/pg_profile_lookup.ini @@ -1,17 +1,17 @@ # PG lossless profiles. # speed cable size xon xoff threshold xon_offset - 40000 300m 1280 2560 69632 0 1280 - 100000 300m 1280 2560 110592 0 1280 - 400000 300m 1280 2560 315392 0 1280 - 40000 1000m 1280 2560 114688 0 1280 - 100000 1000m 1280 2560 225280 0 1280 - 400000 1000m 1280 2560 778240 0 1280 - 40000 2000m 1280 2560 184320 0 1280 - 100000 2000m 1280 2560 393216 0 1280 - 400000 2000m 1280 2560 1445888 0 1280 - 40000 80000m 1280 2560 5369856 0 1280 - 100000 80000m 1280 2560 13357056 0 1280 - 400000 80000m 1280 2560 53305344 0 1280 - 40000 120000m 1280 2560 8028160 0 1280 - 100000 120000m 1280 2560 20004864 0 1280 - 400000 120000m 1280 2560 79900672 0 1280 + 40000 300m 0 2560 69632 -6 181753 + 100000 300m 0 2560 110592 -6 363506 + 400000 300m 0 2560 315392 -6 1454025 + 40000 1000m 0 2560 114688 -6 181753 + 100000 1000m 0 2560 225280 -6 363506 + 400000 1000m 0 2560 778240 -6 1454025 + 40000 2000m 0 2560 184320 -6 181753 + 100000 2000m 0 2560 393216 -6 363506 + 400000 2000m 0 2560 1445888 -6 1454025 + 40000 80000m 0 2560 5369856 -6 181753 + 100000 80000m 0 2560 13357056 -6 363506 + 400000 80000m 0 2560 53305344 -6 1454025 + 40000 120000m 0 2560 8028160 -6 181753 + 100000 120000m 0 2560 20004864 -6 363506 + 400000 120000m 0 2560 79900672 -6 1454025 diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2 index d6e3466898df..6990e4de7a9b 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2 @@ -28,19 +28,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm index b0be0c5617b3..473988f4e1b3 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm @@ -2,6 +2,7 @@ soc_family=BCM8885X system_ref_core_clock_khz=1600000 dpp_db_path=/usr/share/bcm/db +programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt #################################################### ##Reference applications related properties - Start diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/pg_profile_lookup.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/pg_profile_lookup.ini index e8289ab03112..5670401e02f1 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/pg_profile_lookup.ini +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/pg_profile_lookup.ini @@ -1,17 +1,17 @@ # PG lossless profiles. # speed cable size xon xoff threshold xon_offset - 40000 300m 1280 2560 69632 0 1280 - 100000 300m 1280 2560 110592 0 1280 - 400000 300m 1280 2560 315392 0 1280 - 40000 1000m 1280 2560 114688 0 1280 - 100000 1000m 1280 2560 225280 0 1280 - 400000 1000m 1280 2560 778240 0 1280 - 40000 2000m 1280 2560 184320 0 1280 - 100000 2000m 1280 2560 393216 0 1280 - 400000 2000m 1280 2560 1445888 0 1280 - 40000 80000m 1280 2560 5369856 0 1280 - 100000 80000m 1280 2560 13357056 0 1280 - 400000 80000m 1280 2560 53305344 0 1280 - 40000 120000m 1280 2560 8028160 0 1280 - 100000 120000m 1280 2560 20004864 0 1280 - 400000 120000m 1280 2560 79900672 0 1280 + 40000 300m 0 2560 69632 -6 181753 + 100000 300m 0 2560 110592 -6 363506 + 400000 300m 0 2560 315392 -6 1454025 + 40000 1000m 0 2560 114688 -6 181753 + 100000 1000m 0 2560 225280 -6 363506 + 400000 1000m 0 2560 778240 -6 1454025 + 40000 2000m 0 2560 184320 -6 181753 + 100000 2000m 0 2560 393216 -6 363506 + 400000 2000m 0 2560 1445888 -6 1454025 + 40000 80000m 0 2560 5369856 -6 181753 + 100000 80000m 0 2560 13357056 -6 363506 + 400000 80000m 0 2560 53305344 -6 1454025 + 40000 120000m 0 2560 8028160 -6 181753 + 100000 120000m 0 2560 20004864 -6 363506 + 400000 120000m 0 2560 79900672 -6 1454025 diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2 index 341fa591d6f5..857d7f26511e 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2 @@ -28,19 +28,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm index 5ece4f833fc4..54cfe519d0ca 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm @@ -2,6 +2,7 @@ soc_family=BCM8885X system_ref_core_clock_khz=1600000 dpp_db_path=/usr/share/bcm/db +programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt #################################################### ##Reference applications related properties - Start diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/pg_profile_lookup.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/pg_profile_lookup.ini index e8289ab03112..5670401e02f1 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/pg_profile_lookup.ini +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/pg_profile_lookup.ini @@ -1,17 +1,17 @@ # PG lossless profiles. # speed cable size xon xoff threshold xon_offset - 40000 300m 1280 2560 69632 0 1280 - 100000 300m 1280 2560 110592 0 1280 - 400000 300m 1280 2560 315392 0 1280 - 40000 1000m 1280 2560 114688 0 1280 - 100000 1000m 1280 2560 225280 0 1280 - 400000 1000m 1280 2560 778240 0 1280 - 40000 2000m 1280 2560 184320 0 1280 - 100000 2000m 1280 2560 393216 0 1280 - 400000 2000m 1280 2560 1445888 0 1280 - 40000 80000m 1280 2560 5369856 0 1280 - 100000 80000m 1280 2560 13357056 0 1280 - 400000 80000m 1280 2560 53305344 0 1280 - 40000 120000m 1280 2560 8028160 0 1280 - 100000 120000m 1280 2560 20004864 0 1280 - 400000 120000m 1280 2560 79900672 0 1280 + 40000 300m 0 2560 69632 -6 181753 + 100000 300m 0 2560 110592 -6 363506 + 400000 300m 0 2560 315392 -6 1454025 + 40000 1000m 0 2560 114688 -6 181753 + 100000 1000m 0 2560 225280 -6 363506 + 400000 1000m 0 2560 778240 -6 1454025 + 40000 2000m 0 2560 184320 -6 181753 + 100000 2000m 0 2560 393216 -6 363506 + 400000 2000m 0 2560 1445888 -6 1454025 + 40000 80000m 0 2560 5369856 -6 181753 + 100000 80000m 0 2560 13357056 -6 363506 + 400000 80000m 0 2560 53305344 -6 1454025 + 40000 120000m 0 2560 8028160 -6 181753 + 100000 120000m 0 2560 20004864 -6 363506 + 400000 120000m 0 2560 79900672 -6 1454025 diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2 index 012a369b542a..1aea50e1fd28 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2 @@ -28,19 +28,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0 ", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm index 34b8c52a91d3..1582449b6b2a 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm @@ -2,6 +2,7 @@ soc_family=BCM8885X system_ref_core_clock_khz=1600000 dpp_db_path=/usr/share/bcm/db +programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt #################################################### ##Reference applications related properties - Start diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/pg_profile_lookup.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/pg_profile_lookup.ini index e8289ab03112..5670401e02f1 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/pg_profile_lookup.ini +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/pg_profile_lookup.ini @@ -1,17 +1,17 @@ # PG lossless profiles. # speed cable size xon xoff threshold xon_offset - 40000 300m 1280 2560 69632 0 1280 - 100000 300m 1280 2560 110592 0 1280 - 400000 300m 1280 2560 315392 0 1280 - 40000 1000m 1280 2560 114688 0 1280 - 100000 1000m 1280 2560 225280 0 1280 - 400000 1000m 1280 2560 778240 0 1280 - 40000 2000m 1280 2560 184320 0 1280 - 100000 2000m 1280 2560 393216 0 1280 - 400000 2000m 1280 2560 1445888 0 1280 - 40000 80000m 1280 2560 5369856 0 1280 - 100000 80000m 1280 2560 13357056 0 1280 - 400000 80000m 1280 2560 53305344 0 1280 - 40000 120000m 1280 2560 8028160 0 1280 - 100000 120000m 1280 2560 20004864 0 1280 - 400000 120000m 1280 2560 79900672 0 1280 + 40000 300m 0 2560 69632 -6 181753 + 100000 300m 0 2560 110592 -6 363506 + 400000 300m 0 2560 315392 -6 1454025 + 40000 1000m 0 2560 114688 -6 181753 + 100000 1000m 0 2560 225280 -6 363506 + 400000 1000m 0 2560 778240 -6 1454025 + 40000 2000m 0 2560 184320 -6 181753 + 100000 2000m 0 2560 393216 -6 363506 + 400000 2000m 0 2560 1445888 -6 1454025 + 40000 80000m 0 2560 5369856 -6 181753 + 100000 80000m 0 2560 13357056 -6 363506 + 400000 80000m 0 2560 53305344 -6 1454025 + 40000 120000m 0 2560 8028160 -6 181753 + 100000 120000m 0 2560 20004864 -6 363506 + 400000 120000m 0 2560 79900672 -6 1454025 diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2 index 012a369b542a..19caf55f0009 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2 @@ -28,19 +28,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm index ed7d23113add..820bbdf2ac91 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm @@ -2,6 +2,7 @@ soc_family=BCM8885X system_ref_core_clock_khz=1600000 dpp_db_path=/usr/share/bcm/db +programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt #################################################### ##Reference applications related properties - Start diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/pg_profile_lookup.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/pg_profile_lookup.ini index e8289ab03112..5670401e02f1 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/pg_profile_lookup.ini +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/pg_profile_lookup.ini @@ -1,17 +1,17 @@ # PG lossless profiles. # speed cable size xon xoff threshold xon_offset - 40000 300m 1280 2560 69632 0 1280 - 100000 300m 1280 2560 110592 0 1280 - 400000 300m 1280 2560 315392 0 1280 - 40000 1000m 1280 2560 114688 0 1280 - 100000 1000m 1280 2560 225280 0 1280 - 400000 1000m 1280 2560 778240 0 1280 - 40000 2000m 1280 2560 184320 0 1280 - 100000 2000m 1280 2560 393216 0 1280 - 400000 2000m 1280 2560 1445888 0 1280 - 40000 80000m 1280 2560 5369856 0 1280 - 100000 80000m 1280 2560 13357056 0 1280 - 400000 80000m 1280 2560 53305344 0 1280 - 40000 120000m 1280 2560 8028160 0 1280 - 100000 120000m 1280 2560 20004864 0 1280 - 400000 120000m 1280 2560 79900672 0 1280 + 40000 300m 0 2560 69632 -6 181753 + 100000 300m 0 2560 110592 -6 363506 + 400000 300m 0 2560 315392 -6 1454025 + 40000 1000m 0 2560 114688 -6 181753 + 100000 1000m 0 2560 225280 -6 363506 + 400000 1000m 0 2560 778240 -6 1454025 + 40000 2000m 0 2560 184320 -6 181753 + 100000 2000m 0 2560 393216 -6 363506 + 400000 2000m 0 2560 1445888 -6 1454025 + 40000 80000m 0 2560 5369856 -6 181753 + 100000 80000m 0 2560 13357056 -6 363506 + 400000 80000m 0 2560 53305344 -6 1454025 + 40000 120000m 0 2560 8028160 -6 181753 + 100000 120000m 0 2560 20004864 -6 363506 + 400000 120000m 0 2560 79900672 -6 1454025 diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2 index a7ba10216954..2af84b9a9c55 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2 @@ -28,19 +28,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm index bcb27b873431..3702d9b3a82a 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm @@ -2,6 +2,7 @@ soc_family=BCM8885X system_ref_core_clock_khz=1600000 dpp_db_path=/usr/share/bcm/db +programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt #################################################### ##Reference applications related properties - Start diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/pg_profile_lookup.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/pg_profile_lookup.ini index e8289ab03112..99fbd830e291 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/pg_profile_lookup.ini +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/pg_profile_lookup.ini @@ -1,17 +1,17 @@ # PG lossless profiles. # speed cable size xon xoff threshold xon_offset - 40000 300m 1280 2560 69632 0 1280 - 100000 300m 1280 2560 110592 0 1280 - 400000 300m 1280 2560 315392 0 1280 - 40000 1000m 1280 2560 114688 0 1280 - 100000 1000m 1280 2560 225280 0 1280 - 400000 1000m 1280 2560 778240 0 1280 - 40000 2000m 1280 2560 184320 0 1280 - 100000 2000m 1280 2560 393216 0 1280 - 400000 2000m 1280 2560 1445888 0 1280 - 40000 80000m 1280 2560 5369856 0 1280 - 100000 80000m 1280 2560 13357056 0 1280 - 400000 80000m 1280 2560 53305344 0 1280 - 40000 120000m 1280 2560 8028160 0 1280 - 100000 120000m 1280 2560 20004864 0 1280 - 400000 120000m 1280 2560 79900672 0 1280 + 40000 300m 0 2560 69632 -5 181753 + 100000 300m 0 2560 110592 -5 363506 + 400000 300m 0 2560 315392 -5 1454025 + 40000 1000m 0 2560 114688 -5 181753 + 100000 1000m 0 2560 225280 -5 363506 + 400000 1000m 0 2560 778240 -5 1454025 + 40000 2000m 0 2560 184320 -5 181753 + 100000 2000m 0 2560 393216 -5 363506 + 400000 2000m 0 2560 1445888 -5 1454025 + 40000 80000m 0 2560 5369856 -5 181753 + 100000 80000m 0 2560 13357056 -5 363506 + 400000 80000m 0 2560 53305344 -5 1454025 + 40000 120000m 0 2560 8028160 -5 181753 + 100000 120000m 0 2560 20004864 -5 363506 + 400000 120000m 0 2560 79900672 -5 1454025 diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2 index e61ada6f0891..b4c4ff9ccf0b 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2 @@ -28,19 +28,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm index 30b740af2ae2..1f26bc66d50d 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm @@ -2,6 +2,7 @@ soc_family=BCM8885X system_ref_core_clock_khz=1600000 dpp_db_path=/usr/share/bcm/db +programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt #################################################### ##Reference applications related properties - Start diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/pg_profile_lookup.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/pg_profile_lookup.ini index e8289ab03112..99fbd830e291 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/pg_profile_lookup.ini +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/pg_profile_lookup.ini @@ -1,17 +1,17 @@ # PG lossless profiles. # speed cable size xon xoff threshold xon_offset - 40000 300m 1280 2560 69632 0 1280 - 100000 300m 1280 2560 110592 0 1280 - 400000 300m 1280 2560 315392 0 1280 - 40000 1000m 1280 2560 114688 0 1280 - 100000 1000m 1280 2560 225280 0 1280 - 400000 1000m 1280 2560 778240 0 1280 - 40000 2000m 1280 2560 184320 0 1280 - 100000 2000m 1280 2560 393216 0 1280 - 400000 2000m 1280 2560 1445888 0 1280 - 40000 80000m 1280 2560 5369856 0 1280 - 100000 80000m 1280 2560 13357056 0 1280 - 400000 80000m 1280 2560 53305344 0 1280 - 40000 120000m 1280 2560 8028160 0 1280 - 100000 120000m 1280 2560 20004864 0 1280 - 400000 120000m 1280 2560 79900672 0 1280 + 40000 300m 0 2560 69632 -5 181753 + 100000 300m 0 2560 110592 -5 363506 + 400000 300m 0 2560 315392 -5 1454025 + 40000 1000m 0 2560 114688 -5 181753 + 100000 1000m 0 2560 225280 -5 363506 + 400000 1000m 0 2560 778240 -5 1454025 + 40000 2000m 0 2560 184320 -5 181753 + 100000 2000m 0 2560 393216 -5 363506 + 400000 2000m 0 2560 1445888 -5 1454025 + 40000 80000m 0 2560 5369856 -5 181753 + 100000 80000m 0 2560 13357056 -5 363506 + 400000 80000m 0 2560 53305344 -5 1454025 + 40000 120000m 0 2560 8028160 -5 181753 + 100000 120000m 0 2560 20004864 -5 363506 + 400000 120000m 0 2560 79900672 -5 1454025 diff --git a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2 b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2 index dc707599f70a..daaba0539382 100644 --- a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2 +++ b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2 @@ -2,35 +2,18 @@ {%- include 'buffer_ports.j2' %} +{# Skip BUFFER_POOL, BUFFER_PROFILE #} {%- macro generate_buffer_pool_and_profiles() %} - "BUFFER_POOL": { - "ingress_lossless_pool": { - "type": "ingress", - "mode": "dynamic", - "size": "60000000", - "xoff": "22600000" - }, - "egress_lossless_pool": { - "type": "egress", - "mode": "static", - "size": "82600000" - } - }, - "BUFFER_PROFILE": { - "ingress_lossy_profile": { - "pool": "ingress_lossless_pool", - "size": "0", - "dynamic_th": "3" - }, - "egress_lossless_profile": { - "pool": "egress_lossless_pool", - "size": "0", - "static_th": "82600000" - }, - "egress_lossy_profile": { - "pool": "egress_lossless_pool", - "size": "0", - "dynamic_th": "3" - } +{%- endmacro %} + +{# Skip BUFFER_QUEUE #} +{%- macro generate_queue_buffers(ports) %} + "BUFFER_QUEUE": { + } +{%- endmacro %} + +{# Skip BUFFER_PG #} +{%- macro generate_pg_profils(ports) %} + "BUFFER_PG": { }, {%- endmacro %} diff --git a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2 b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2 index dc707599f70a..daaba0539382 100644 --- a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2 +++ b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2 @@ -2,35 +2,18 @@ {%- include 'buffer_ports.j2' %} +{# Skip BUFFER_POOL, BUFFER_PROFILE #} {%- macro generate_buffer_pool_and_profiles() %} - "BUFFER_POOL": { - "ingress_lossless_pool": { - "type": "ingress", - "mode": "dynamic", - "size": "60000000", - "xoff": "22600000" - }, - "egress_lossless_pool": { - "type": "egress", - "mode": "static", - "size": "82600000" - } - }, - "BUFFER_PROFILE": { - "ingress_lossy_profile": { - "pool": "ingress_lossless_pool", - "size": "0", - "dynamic_th": "3" - }, - "egress_lossless_profile": { - "pool": "egress_lossless_pool", - "size": "0", - "static_th": "82600000" - }, - "egress_lossy_profile": { - "pool": "egress_lossless_pool", - "size": "0", - "dynamic_th": "3" - } +{%- endmacro %} + +{# Skip BUFFER_QUEUE #} +{%- macro generate_queue_buffers(ports) %} + "BUFFER_QUEUE": { + } +{%- endmacro %} + +{# Skip BUFFER_PG #} +{%- macro generate_pg_profils(ports) %} + "BUFFER_PG": { }, {%- endmacro %} diff --git a/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini b/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini index ec695eca62d0..2e2b7e88e75e 100644 --- a/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini +++ b/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini @@ -1,20 +1,2 @@ # PG lossless profiles. # speed cable size xon xoff threshold xon_offset - 10000 5m 1248 2288 35776 0 2288 - 25000 5m 1248 2288 53248 0 2288 - 40000 5m 1248 2288 66560 0 2288 - 50000 5m 1248 2288 90272 0 2288 - 100000 5m 1248 2288 165568 0 2288 - 400000 5m 1248 2288 165568 0 2288 - 10000 40m 1248 2288 37024 0 2288 - 25000 40m 1248 2288 53248 0 2288 - 40000 40m 1248 2288 71552 0 2288 - 50000 40m 1248 2288 96096 0 2288 - 100000 40m 1248 2288 177632 0 2288 - 400000 40m 1248 2288 177632 0 2288 - 10000 300m 1248 2288 46176 0 2288 - 25000 300m 1248 2288 79040 0 2288 - 40000 300m 1248 2288 108160 0 2288 - 50000 300m 1248 2288 141856 0 2288 - 100000 300m 1248 2288 268736 0 2288 - 400000 300m 1248 2288 268736 0 2288 diff --git a/device/dell/x86_64-dellemc_z9432f_c3758-r0/DellEMC-Z9432f-O32/td4-z9432f-32x400G.config.yml b/device/dell/x86_64-dellemc_z9432f_c3758-r0/DellEMC-Z9432f-O32/td4-z9432f-32x400G.config.yml index c93590a022c6..ad17e7e28ff5 100644 --- a/device/dell/x86_64-dellemc_z9432f_c3758-r0/DellEMC-Z9432f-O32/td4-z9432f-32x400G.config.yml +++ b/device/dell/x86_64-dellemc_z9432f_c3758-r0/DellEMC-Z9432f-O32/td4-z9432f-32x400G.config.yml @@ -5,12 +5,12 @@ bcm_device: l2_table_default_view: 1 pktio_mode: 1 vlan_flooding_l2mc_num_reserved: 0 - shared_block_mask_section: uc_mc + shared_block_mask_section: uc_bc ctr_evict_enable: 0 uat_mode: 1 uft_mode: 4 sai_brcm_sonic_acl_enhancements: 1 - sai_tunnel_support: 1 + sai_tunnel_support: 2 multi_network_groups: 1 sai_field_group_auto_prioritize: 1 sai_modify_hash_flexdigest: 1 @@ -24,7 +24,7 @@ device: CORE_CLK_FREQ: CLK_1350MHZ # PP CLOCK FREQUENCY PP_CLK_FREQ: CLK_1350MHZ - VARIANT: DNA_4_9_5_0 + VARIANT: DNA_4_11_4_0 ... --- device: @@ -625,7 +625,7 @@ device: NUM_LANES: 1 MAX_FRAME_SIZE: 9416 SER_CONFIG: - SER_ENABLE: 0 + SER_ENABLE: 1 ... --- device: @@ -690,6 +690,17 @@ device: 0: FP_CONFIG: FP_ING_OPERMODE: GLOBAL_PIPE_AWARE + + TM_ING_PORT_PRI_GRP: + ? + PORT_ID: [ [1, 18], [20, 38], + [40, 57], [60, 78], + [80, 97], [100, 118], + [120, 137], [140, 158] ] + + TM_PRI_GRP_ID: [[3,4]] + : + LOSSLESS: 0 ... --- device: diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 index 0e8ad2bf7e9d..a8dd0dadcaec 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 +++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 @@ -1 +1 @@ -266aa59b7e63faf97657313fe65cdf86 \ No newline at end of file +8b28fac0d174b9f0e9120f8ee8c52fd2 \ No newline at end of file diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml index fc26d290eedd..ecda116a6ef1 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml +++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml @@ -1,5 +1,5 @@ - + @@ -727,7 +727,6 @@ lowercase characters. 1 1 - 63 false @@ -746,7 +745,6 @@ lowercase characters. 0 1 - 63 false @@ -765,7 +763,6 @@ lowercase characters. 3 1 - 63 false @@ -784,7 +781,6 @@ lowercase characters. 2 1 - 63 false @@ -803,7 +799,6 @@ lowercase characters. 5 1 - 63 false @@ -822,7 +817,6 @@ lowercase characters. 4 1 - 63 false @@ -841,7 +835,6 @@ lowercase characters. 7 1 - 63 false @@ -860,7 +853,6 @@ lowercase characters. 6 1 - 63 false @@ -879,7 +871,6 @@ lowercase characters. 9 1 - 63 false @@ -898,7 +889,6 @@ lowercase characters. 8 1 - 63 false @@ -917,7 +907,6 @@ lowercase characters. 11 1 - 63 false @@ -936,7 +925,6 @@ lowercase characters. 10 1 - 63 false @@ -955,7 +943,6 @@ lowercase characters. 13 1 - 63 false @@ -974,7 +961,6 @@ lowercase characters. 12 1 - 63 false @@ -993,7 +979,6 @@ lowercase characters. 15 1 - 63 false @@ -1012,7 +997,6 @@ lowercase characters. 14 1 - 63 false @@ -1031,7 +1015,6 @@ lowercase characters. 17 1 - 63 false @@ -1050,7 +1033,6 @@ lowercase characters. 16 1 - 63 false @@ -1069,7 +1051,6 @@ lowercase characters. 19 1 - 63 false @@ -1088,7 +1069,6 @@ lowercase characters. 18 1 - 63 false @@ -1107,7 +1087,6 @@ lowercase characters. 21 1 - 63 false @@ -1126,7 +1105,6 @@ lowercase characters. 20 1 - 63 false @@ -1145,7 +1123,6 @@ lowercase characters. 23 1 - 63 false @@ -1164,7 +1141,6 @@ lowercase characters. 22 1 - 63 false @@ -1183,7 +1159,6 @@ lowercase characters. 25 1 - 63 false @@ -1202,7 +1177,6 @@ lowercase characters. 24 1 - 63 false @@ -1221,7 +1195,6 @@ lowercase characters. 27 1 - 63 false @@ -1240,7 +1213,6 @@ lowercase characters. 26 1 - 63 false @@ -1259,7 +1231,6 @@ lowercase characters. 29 1 - 63 false @@ -1278,7 +1249,6 @@ lowercase characters. 28 1 - 63 false @@ -1297,7 +1267,6 @@ lowercase characters. 31 1 - 63 false @@ -1316,7 +1285,6 @@ lowercase characters. 30 1 - 63 false @@ -1335,7 +1303,6 @@ lowercase characters. 1 0 - 63 false @@ -1354,7 +1321,6 @@ lowercase characters. 14 0 - 63 false @@ -1373,7 +1339,6 @@ lowercase characters. 15 0 - 63 false @@ -1392,7 +1357,6 @@ lowercase characters. 12 0 - 63 false @@ -1411,7 +1375,6 @@ lowercase characters. 13 0 - 63 false @@ -1430,7 +1393,6 @@ lowercase characters. 10 0 - 63 false @@ -1449,7 +1411,6 @@ lowercase characters. 11 0 - 63 false @@ -1468,7 +1429,6 @@ lowercase characters. 8 0 - 63 false @@ -1487,7 +1447,6 @@ lowercase characters. 9 0 - 63 false @@ -1506,7 +1465,6 @@ lowercase characters. 6 0 - 63 false @@ -1525,7 +1483,6 @@ lowercase characters. 7 0 - 63 false @@ -1544,7 +1501,6 @@ lowercase characters. 4 0 - 63 false @@ -1563,7 +1519,6 @@ lowercase characters. 5 0 - 63 false @@ -1582,7 +1537,6 @@ lowercase characters. 2 0 - 63 false @@ -1601,7 +1555,6 @@ lowercase characters. 3 0 - 63 false @@ -1620,7 +1573,6 @@ lowercase characters. 0 0 - 63 false @@ -1636,7 +1588,6 @@ lowercase characters. NA - 0 @@ -1656,7 +1607,6 @@ lowercase characters. NA - 1 @@ -1676,7 +1626,6 @@ lowercase characters. NA - 0 @@ -1696,7 +1645,6 @@ lowercase characters. NA - 1 @@ -1716,7 +1664,6 @@ lowercase characters. NA - 2 @@ -1736,7 +1683,6 @@ lowercase characters. NA - 3 @@ -1810,6 +1756,53 @@ lowercase characters. + + + alaska-88E1780 + + 16 + 3 + 23 + 65280 + + + 1 + 28 + 1024 + 64511 + + + + alaska-88E2580 + + 61472 + 31 + 168 + 57351 + + + 61473 + 31 + 296 + 57351 + + + + alaska-88E2540 + + 61472 + 31 + 168 + 57351 + + + 61473 + 31 + 296 + 57351 + + + . 1 diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 index f2cf3d5b688e..e4baf309b51c 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 +++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 @@ -1 +1 @@ -85b49bcb9d399bcd1b8128a42caba2d2 \ No newline at end of file +fcd5642435f602883aab5c9672e96aa5 \ No newline at end of file diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml index 980d4267b1bb..78460a4e0a9e 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml +++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml @@ -1,5 +1,5 @@ - + @@ -239,8 +239,8 @@ enumeration Tx parameter type - atten - atten + pre + pre 0 @@ -248,75 +248,10 @@ post 1 - - pre - pre - 2 - - - pre2 - pre2 - 3 - - - pre3 - pre3 - 4 - peak peak - 5 - - - main - main - 6 - - - txAmpAdjEn - txAmpAdjEn - 7 - - - emph0 - emph0 - 8 - - - emph1 - emph1 - 9 - - - txAmpShft - txAmpShft - 10 - - - txEmphEn - txEmphEn - 11 - - - txEmphEn1 - txEmphEn1 - 12 - - - txAmpAdj - txAmpAdj - 13 - - - slewCtrlEn - slewCtrlEn - 14 - - - slewRate - slewRate - 15 + 2 @@ -324,400 +259,180 @@ enumeration Rx parameter type - sqlch - sqlch + dataRate + dataRate 0 - DC - DC + res1Sel + res1Sel 1 - LF - LF + res2Sel + res2Sel 2 - HF - HF + cap1Sel + cap1Sel 3 - gainShape1 - gainShape1 + cap2Sel + cap2Sel 4 - gainShape2 - gainShape2 + minCap + minCap 5 - shortChannelEn - shortChannelEn + minCapN + minCapN + 6 + + + sumfBoostTargetC0 + sumfBoostTargetC0 7 - bfLf - bfLf + sumfBoostTargetC1 + sumfBoostTargetC1 8 - bfHf - bfHf + sumfBoostTargetC2 + sumfBoostTargetC2 9 - minLf - minLf + midpointPhaseOs0 + midpointPhaseOs0 10 - maxLf - maxLf + midpointPhaseOs1 + midpointPhaseOs1 11 - minHf - minHf + midpointPhaseOs2 + midpointPhaseOs2 12 - - maxHf - maxHf - 13 - - - minPre1 - minPre1 - 14 - - - maxPre1 - maxPre1 - 15 - - - minPre2 - minPre2 - 16 - - - maxPre2 - - 17 - - - minPost - minPost - 18 - - - maxPost - maxPost - 19 - - - squelch - squelch - 20 - - - termination - termination - 27 - - - coldEnvelope - coldEnvelope - 35 - - - hotEnvelope - hotEnvelope - 36 - - - dcGain - dcGain - 37 - - - bandWidth - bandWidth - 38 - - - dfe - dfe - 39 - - - ffeR - ffeR - 40 - - - ffeC - ffeC - 41 - - - sampler - sampler - 42 - - - align90 - align90 - 43 - - - ffeS - ffeS - 44 - - - resSel - resSel - 45 - - - resShift - resShift - 46 - - - capSel - capSel - 47 - - - ffeSettingForce - ffeSettingForce - 48 - - - adaptedResSel - adaptedResSel - 49 - - - adaptedCapSel - adaptedCapSel - 50 - selmufi selmufi - 51 + 13 selmuff selmuff - 52 + 14 selmupi selmupi - 53 + 15 selmupf selmupf - 54 - - - slewRateCtrl0 - slewRateCtrl0 - 55 - - - slewRateCtrl1 - slewRateCtrl1 - 56 - - - EO - EO - 57 - - - dataRate - dataRate - 58 - - - res1Sel - res1Sel - 59 - - - res2Sel - res2Sel - 60 - - - cap1Sel - cap1Sel - 61 - - - cap2Sel - cap2Sel - 62 + 16 midpointLargeThresKLane midpointLargeThresKLane - 63 + 17 midpointSmallThresKLane midpointSmallThresKLane - 64 + 18 midpointLargeThresCLane midpointLargeThresCLane - 65 + 19 midpointSmallThresCLane midpointSmallThresCLane - 66 + 20 + + + inxSumfMidpointAdatptiveEnLane + inxSumfMidpointAdatptiveEnLane + 21 dfeResF0aHighThresInitLane dfeResF0aHighThresInitLane - 67 + 22 dfeResF0aHighThresEndLane dfeResF0aHighThresEndLane - 68 - - - current1Sel - current1Sel - 69 - - - rl1Sel - rl1Sel - 70 + 23 - rl1Extra - rl1Extra - 71 - - - cl1Ctrl - cl1Ctrl - 72 - - - enMidFreq - enMidFreq - 73 - - - cs1Mid - cs1Mid - 74 - - - rs1Mid - rs1Mid - 75 - - - rfCtrl - rfCtrl - 76 - - - rl1TiaSel - rl1TiaSel - 77 - - - rl1TiaExtra - rl1TiaExtra - 78 - - - hpfRSel1st - hpfRSel1st - 79 - - - current1TiaSel - current1TiaSel - 80 - - - rl2Tune - rl2Tune - 81 - - - rl2Sel - rl2Sel - 82 + squelch + squelch + 24 - rs2Sel - rs2Sel - 83 + align90 + align90 + 25 - current2Sel - current2Sel - 84 + sampler + sampler + 26 - hpfRsel2nd - hpfRsel2nd - 85 + slewRateCtrl0 + slewRateCtrl0 + 27 - BW - BW - 86 + slewRateCtrl1 + slewRateCtrl1 + 28 - dfeGAIN - dfeGAIN - 87 + EO + EO + 29 - dfeGAIN2 - dfeGAIN2 - 88 + minCap1 + minCap1 + 30 - pre1 - pre1 - 89 + maxCap1 + maxCap1 + 31 - pre2 - pre2 - 90 + minRes1 + minRes1 + 32 - post1 - post1 - 91 + maxRes1 + maxRes1 + 33 boolean-type enumeration - Boolean 32 bits , due to bing endian + Boolean 32 bits , due to big endian false False @@ -764,33 +479,6 @@ 5 - - uint8-type - uint32 - Uint8 32 bits , due to bing endian - 0 - 255 - - - serdes-termination-type - enumeration - RX termination mode - - GND - Enabled - 0 - - - VDD - Disabled - 1 - - - FLOATING - RS FEC enabled - 2 - - port-interconnect-profile-type enumeration @@ -912,327 +600,381 @@ 0 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 1 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 2 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 3 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 4 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 5 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 6 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 7 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 8 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 9 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 10 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 11 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 12 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 13 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 14 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 15 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 16 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 17 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 18 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 19 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 20 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 21 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 22 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 23 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 24 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 25 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 26 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 27 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 28 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 29 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 30 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 31 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 32 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 33 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 34 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 35 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 36 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 37 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 38 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 39 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 40 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 41 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 42 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 43 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 44 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 45 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 46 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 47 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 48 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 49 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 50 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 51 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 52 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 53 - AVAGO + COMPHY_C28G profile_default 25GR1 + false diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.md5 b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.md5 index c043a0d7231f..a8cacfdd9823 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.md5 +++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.md5 @@ -1 +1 @@ -209426f8b550ddf85db19925f9f202a1 \ No newline at end of file +7e0317c4f0c86cc16929b1a143d90c32 \ No newline at end of file diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.xml b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.xml index 9e40492cfe8f..8ed10be62722 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.xml +++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.xml @@ -1,5 +1,5 @@ - + diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 index 41cd1629560b..cee8e830a24f 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 +++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 @@ -1 +1 @@ -fec8b7884a940c38451ef84be6fdbb24 \ No newline at end of file +feb884bbff293ba58dc7b1cae36aa1d1 \ No newline at end of file diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml index bbedd396d2b7..58298363c3e4 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml +++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml @@ -1,5 +1,5 @@ - + @@ -50,10 +50,20 @@ Router In Drop Counters track Route Black Hole Packets 1 + + + Feature-enable + enumeration + Feature Enabled/Disabled - IN_DROP_ANY - Router In Drop Counters track either TTL & Hop Limit Exceeded or Route Black Hole Packets - 2 + Disabled + Disabled + 0 + + + Enabled + Enabled + 1 @@ -442,14 +452,15 @@ 1024 - - 0 - - IN_DROP_ANY + 0 + ROUTE_BLACKHOLE SAI_LOG_SYSLOG + + Disabled + control-acl 3 diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 index 7b8c7b490de9..42941a1d23be 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 +++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 @@ -1 +1 @@ -69af36a9007f8c9e4d33ea6465cc6b89 \ No newline at end of file +1e32906bd09b43df35ce12534b2599c8 \ No newline at end of file diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml index 7fd11122c546..253c46780aaa 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml +++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml @@ -1,5 +1,5 @@ - + @@ -727,7 +727,6 @@ lowercase characters. 1 1 - 63 false @@ -746,7 +745,6 @@ lowercase characters. 0 1 - 63 false @@ -765,7 +763,6 @@ lowercase characters. 3 1 - 63 false @@ -784,7 +781,6 @@ lowercase characters. 2 1 - 63 false @@ -803,7 +799,6 @@ lowercase characters. 5 1 - 63 false @@ -822,7 +817,6 @@ lowercase characters. 4 1 - 63 false @@ -841,7 +835,6 @@ lowercase characters. 7 1 - 63 false @@ -860,7 +853,6 @@ lowercase characters. 6 1 - 63 false @@ -879,7 +871,6 @@ lowercase characters. 9 1 - 63 false @@ -898,7 +889,6 @@ lowercase characters. 8 1 - 63 false @@ -917,7 +907,6 @@ lowercase characters. 11 1 - 63 false @@ -936,7 +925,6 @@ lowercase characters. 10 1 - 63 false @@ -955,7 +943,6 @@ lowercase characters. 13 1 - 63 false @@ -974,7 +961,6 @@ lowercase characters. 12 1 - 63 false @@ -993,7 +979,6 @@ lowercase characters. 15 1 - 63 false @@ -1012,7 +997,6 @@ lowercase characters. 14 1 - 63 false @@ -1031,7 +1015,6 @@ lowercase characters. 17 1 - 63 false @@ -1050,7 +1033,6 @@ lowercase characters. 16 1 - 63 false @@ -1069,7 +1051,6 @@ lowercase characters. 19 1 - 63 false @@ -1088,7 +1069,6 @@ lowercase characters. 18 1 - 63 false @@ -1107,7 +1087,6 @@ lowercase characters. 21 1 - 63 false @@ -1126,7 +1105,6 @@ lowercase characters. 20 1 - 63 false @@ -1145,7 +1123,6 @@ lowercase characters. 23 1 - 63 false @@ -1164,7 +1141,6 @@ lowercase characters. 22 1 - 63 false @@ -1183,7 +1159,6 @@ lowercase characters. 25 1 - 63 false @@ -1202,7 +1177,6 @@ lowercase characters. 24 1 - 63 false @@ -1221,7 +1195,6 @@ lowercase characters. 27 1 - 63 false @@ -1240,7 +1213,6 @@ lowercase characters. 26 1 - 63 false @@ -1259,7 +1231,6 @@ lowercase characters. 29 1 - 63 false @@ -1278,7 +1249,6 @@ lowercase characters. 28 1 - 63 false @@ -1297,7 +1267,6 @@ lowercase characters. 31 1 - 63 false @@ -1316,7 +1285,6 @@ lowercase characters. 30 1 - 63 false @@ -1335,7 +1303,6 @@ lowercase characters. 1 0 - 63 false @@ -1354,7 +1321,6 @@ lowercase characters. 14 0 - 63 false @@ -1373,7 +1339,6 @@ lowercase characters. 15 0 - 63 false @@ -1392,7 +1357,6 @@ lowercase characters. 12 0 - 63 false @@ -1411,7 +1375,6 @@ lowercase characters. 13 0 - 63 false @@ -1430,7 +1393,6 @@ lowercase characters. 10 0 - 63 false @@ -1449,7 +1411,6 @@ lowercase characters. 11 0 - 63 false @@ -1468,7 +1429,6 @@ lowercase characters. 8 0 - 63 false @@ -1487,7 +1447,6 @@ lowercase characters. 9 0 - 63 false @@ -1506,7 +1465,6 @@ lowercase characters. 6 0 - 63 false @@ -1525,7 +1483,6 @@ lowercase characters. 7 0 - 63 false @@ -1544,7 +1501,6 @@ lowercase characters. 4 0 - 63 false @@ -1563,7 +1519,6 @@ lowercase characters. 5 0 - 63 false @@ -1582,7 +1537,6 @@ lowercase characters. 2 0 - 63 false @@ -1601,7 +1555,6 @@ lowercase characters. 3 0 - 63 false @@ -1620,7 +1573,6 @@ lowercase characters. 0 0 - 63 false @@ -1636,7 +1588,6 @@ lowercase characters. NA - 0 @@ -1656,7 +1607,6 @@ lowercase characters. NA - 1 @@ -1676,7 +1626,6 @@ lowercase characters. NA - 0 @@ -1696,7 +1645,6 @@ lowercase characters. NA - 1 @@ -1716,7 +1664,6 @@ lowercase characters. NA - 2 @@ -1736,7 +1683,6 @@ lowercase characters. NA - 3 @@ -1810,6 +1756,53 @@ lowercase characters. + + + alaska-88E1780 + + 16 + 3 + 23 + 65280 + + + 1 + 28 + 1024 + 64511 + + + + alaska-88E2580 + + 61472 + 31 + 168 + 57351 + + + 61473 + 31 + 296 + 57351 + + + + alaska-88E2540 + + 61472 + 31 + 168 + 57351 + + + 61473 + 31 + 296 + 57351 + + + . 1 diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 index f2cf3d5b688e..e4baf309b51c 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 +++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 @@ -1 +1 @@ -85b49bcb9d399bcd1b8128a42caba2d2 \ No newline at end of file +fcd5642435f602883aab5c9672e96aa5 \ No newline at end of file diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml index 980d4267b1bb..78460a4e0a9e 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml +++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml @@ -1,5 +1,5 @@ - + @@ -239,8 +239,8 @@ enumeration Tx parameter type - atten - atten + pre + pre 0 @@ -248,75 +248,10 @@ post 1 - - pre - pre - 2 - - - pre2 - pre2 - 3 - - - pre3 - pre3 - 4 - peak peak - 5 - - - main - main - 6 - - - txAmpAdjEn - txAmpAdjEn - 7 - - - emph0 - emph0 - 8 - - - emph1 - emph1 - 9 - - - txAmpShft - txAmpShft - 10 - - - txEmphEn - txEmphEn - 11 - - - txEmphEn1 - txEmphEn1 - 12 - - - txAmpAdj - txAmpAdj - 13 - - - slewCtrlEn - slewCtrlEn - 14 - - - slewRate - slewRate - 15 + 2 @@ -324,400 +259,180 @@ enumeration Rx parameter type - sqlch - sqlch + dataRate + dataRate 0 - DC - DC + res1Sel + res1Sel 1 - LF - LF + res2Sel + res2Sel 2 - HF - HF + cap1Sel + cap1Sel 3 - gainShape1 - gainShape1 + cap2Sel + cap2Sel 4 - gainShape2 - gainShape2 + minCap + minCap 5 - shortChannelEn - shortChannelEn + minCapN + minCapN + 6 + + + sumfBoostTargetC0 + sumfBoostTargetC0 7 - bfLf - bfLf + sumfBoostTargetC1 + sumfBoostTargetC1 8 - bfHf - bfHf + sumfBoostTargetC2 + sumfBoostTargetC2 9 - minLf - minLf + midpointPhaseOs0 + midpointPhaseOs0 10 - maxLf - maxLf + midpointPhaseOs1 + midpointPhaseOs1 11 - minHf - minHf + midpointPhaseOs2 + midpointPhaseOs2 12 - - maxHf - maxHf - 13 - - - minPre1 - minPre1 - 14 - - - maxPre1 - maxPre1 - 15 - - - minPre2 - minPre2 - 16 - - - maxPre2 - - 17 - - - minPost - minPost - 18 - - - maxPost - maxPost - 19 - - - squelch - squelch - 20 - - - termination - termination - 27 - - - coldEnvelope - coldEnvelope - 35 - - - hotEnvelope - hotEnvelope - 36 - - - dcGain - dcGain - 37 - - - bandWidth - bandWidth - 38 - - - dfe - dfe - 39 - - - ffeR - ffeR - 40 - - - ffeC - ffeC - 41 - - - sampler - sampler - 42 - - - align90 - align90 - 43 - - - ffeS - ffeS - 44 - - - resSel - resSel - 45 - - - resShift - resShift - 46 - - - capSel - capSel - 47 - - - ffeSettingForce - ffeSettingForce - 48 - - - adaptedResSel - adaptedResSel - 49 - - - adaptedCapSel - adaptedCapSel - 50 - selmufi selmufi - 51 + 13 selmuff selmuff - 52 + 14 selmupi selmupi - 53 + 15 selmupf selmupf - 54 - - - slewRateCtrl0 - slewRateCtrl0 - 55 - - - slewRateCtrl1 - slewRateCtrl1 - 56 - - - EO - EO - 57 - - - dataRate - dataRate - 58 - - - res1Sel - res1Sel - 59 - - - res2Sel - res2Sel - 60 - - - cap1Sel - cap1Sel - 61 - - - cap2Sel - cap2Sel - 62 + 16 midpointLargeThresKLane midpointLargeThresKLane - 63 + 17 midpointSmallThresKLane midpointSmallThresKLane - 64 + 18 midpointLargeThresCLane midpointLargeThresCLane - 65 + 19 midpointSmallThresCLane midpointSmallThresCLane - 66 + 20 + + + inxSumfMidpointAdatptiveEnLane + inxSumfMidpointAdatptiveEnLane + 21 dfeResF0aHighThresInitLane dfeResF0aHighThresInitLane - 67 + 22 dfeResF0aHighThresEndLane dfeResF0aHighThresEndLane - 68 - - - current1Sel - current1Sel - 69 - - - rl1Sel - rl1Sel - 70 + 23 - rl1Extra - rl1Extra - 71 - - - cl1Ctrl - cl1Ctrl - 72 - - - enMidFreq - enMidFreq - 73 - - - cs1Mid - cs1Mid - 74 - - - rs1Mid - rs1Mid - 75 - - - rfCtrl - rfCtrl - 76 - - - rl1TiaSel - rl1TiaSel - 77 - - - rl1TiaExtra - rl1TiaExtra - 78 - - - hpfRSel1st - hpfRSel1st - 79 - - - current1TiaSel - current1TiaSel - 80 - - - rl2Tune - rl2Tune - 81 - - - rl2Sel - rl2Sel - 82 + squelch + squelch + 24 - rs2Sel - rs2Sel - 83 + align90 + align90 + 25 - current2Sel - current2Sel - 84 + sampler + sampler + 26 - hpfRsel2nd - hpfRsel2nd - 85 + slewRateCtrl0 + slewRateCtrl0 + 27 - BW - BW - 86 + slewRateCtrl1 + slewRateCtrl1 + 28 - dfeGAIN - dfeGAIN - 87 + EO + EO + 29 - dfeGAIN2 - dfeGAIN2 - 88 + minCap1 + minCap1 + 30 - pre1 - pre1 - 89 + maxCap1 + maxCap1 + 31 - pre2 - pre2 - 90 + minRes1 + minRes1 + 32 - post1 - post1 - 91 + maxRes1 + maxRes1 + 33 boolean-type enumeration - Boolean 32 bits , due to bing endian + Boolean 32 bits , due to big endian false False @@ -764,33 +479,6 @@ 5 - - uint8-type - uint32 - Uint8 32 bits , due to bing endian - 0 - 255 - - - serdes-termination-type - enumeration - RX termination mode - - GND - Enabled - 0 - - - VDD - Disabled - 1 - - - FLOATING - RS FEC enabled - 2 - - port-interconnect-profile-type enumeration @@ -912,327 +600,381 @@ 0 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 1 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 2 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 3 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 4 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 5 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 6 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 7 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 8 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 9 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 10 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 11 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 12 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 13 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 14 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 15 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 16 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 17 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 18 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 19 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 20 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 21 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 22 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 23 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 24 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 25 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 26 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 27 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 28 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 29 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 30 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 31 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 32 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 33 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 34 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 35 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 36 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 37 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 38 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 39 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 40 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 41 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 42 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 43 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 44 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 45 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 46 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 47 - AVAGO + COMPHY_C28G profile_default 2500MR1 + false 48 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 49 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 50 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 51 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 52 - AVAGO + COMPHY_C28G profile_default 25GR1 + false 53 - AVAGO + COMPHY_C28G profile_default 25GR1 + false diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5 b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5 index c043a0d7231f..a8cacfdd9823 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5 +++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5 @@ -1 +1 @@ -209426f8b550ddf85db19925f9f202a1 \ No newline at end of file +7e0317c4f0c86cc16929b1a143d90c32 \ No newline at end of file diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml index 9e40492cfe8f..8ed10be62722 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml +++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml @@ -1,5 +1,5 @@ - + diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 index 41cd1629560b..cee8e830a24f 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 +++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 @@ -1 +1 @@ -fec8b7884a940c38451ef84be6fdbb24 \ No newline at end of file +feb884bbff293ba58dc7b1cae36aa1d1 \ No newline at end of file diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml index bbedd396d2b7..58298363c3e4 100644 --- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml +++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml @@ -1,5 +1,5 @@ - + @@ -50,10 +50,20 @@ Router In Drop Counters track Route Black Hole Packets 1 + + + Feature-enable + enumeration + Feature Enabled/Disabled - IN_DROP_ANY - Router In Drop Counters track either TTL & Hop Limit Exceeded or Route Black Hole Packets - 2 + Disabled + Disabled + 0 + + + Enabled + Enabled + 1 @@ -442,14 +452,15 @@ 1024 - - 0 - - IN_DROP_ANY + 0 + ROUTE_BLACKHOLE SAI_LOG_SYSLOG + + Disabled + control-acl 3 diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json index 983325f1e733..73f011e29d71 100644 --- a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json @@ -26,7 +26,10 @@ }, "MSN2700-A1": { "default": { - "bus": [], + "bus": [ + "i2c-10", + "i2c-1-mux (chan_id 10)" + ], "chip": { "dps460-i2c-*-58": ["2", "R"], "dps460-i2c-*-59": ["1", "L"] @@ -363,7 +366,7 @@ "MTEF-AC-G-ACBEL": { "label": [ "in1 PSU 220V Rail (in)", - "in3 PSU 12V Rail (out)", + "in2 PSU 12V Rail (out)", "fan1 PSU Fan 1", "temp1 PSU Temp 1", "temp2 PSU Temp 2", diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater index a548d7f985d8..1c60a574085c 100644 --- a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater @@ -55,11 +55,11 @@ function update_psu_sensors_configuration() { # keep looking for the rest psus continue else - if [ "$psu" == "MTEF-PSF-AC-G" ]; then + psu=$(echo "$psu" | sed -r 's/-PSR|-PSF//g') + if [ "$psu" == "MTEF-AC-G" ]; then vendor=$(cat /var/run/hw-management/eeprom/psu${number}_vpd | grep "MFR_NAME:" | cut -d ' ' -f 2 2>&1) psu="${psu}-${vendor}" fi - psu=$(echo "$psu" | sed -r 's/-PSR|-PSF//g') echo " chip \""$chip"\"" >> $SENSORS_CONFIG_FILE mapfile -t opers < <(jq -r --arg psu "$psu" '.psu[$psu] | keys[]' $PSU_SENSORS_CONFIG) diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf index 495627c1b389..286685a46c47 100644 --- a/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf +++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf @@ -174,27 +174,27 @@ chip "xdpe15284-i2c-*-61" ignore curr3 # Power supplies -chip "dps460-i2c-*-58" - label in1 "PSU-2(R) 220V Rail (in)" - label in2 "PSU-2(R) 12V Rail (out)" - label fan1 "PSU-2(R) Fan 1" - label temp1 "PSU-2(R) Temp 1" - label temp2 "PSU-2(R) Temp 2" - label power1 "PSU-2(R) 220V Rail Pwr (in)" - label power2 "PSU-2(R) 12V Rail Pwr (out)" - label curr1 "PSU-2(R) 220V Rail Curr (in)" - label curr2 "PSU-2(R) 12V Rail Curr (out)" - -chip "dps460-i2c-*-59" - label in1 "PSU-1(L) 220V Rail (in)" - label in2 "PSU-1(L) 12V Rail (out)" - label fan1 "PSU-1(L) Fan 1" - label temp1 "PSU-1(L) Temp 1" - label temp2 "PSU-1(L) Temp 2" - label power1 "PSU-1(L) 220V Rail Pwr (in)" - label power2 "PSU-1(L) 12V Rail Pwr (out)" - label curr1 "PSU-1(L) 220V Rail Curr (in)" - label curr2 "PSU-1(L) 12V Rail Curr (out)" +bus "i2c-10" "i2c-1-mux (chan_id 1)" + chip "dps460-i2c-*-58" + label in1 "PSU-2(R) 220V Rail (in)" + label in2 "PSU-2(R) 12V Rail (out)" + label fan1 "PSU-2(R) Fan 1" + label temp1 "PSU-2(R) Temp 1" + label temp2 "PSU-2(R) Temp 2" + label power1 "PSU-2(R) 220V Rail Pwr (in)" + label power2 "PSU-2(R) 12V Rail Pwr (out)" + label curr1 "PSU-2(R) 220V Rail Curr (in)" + label curr2 "PSU-2(R) 12V Rail Curr (out)" + chip "dps460-i2c-*-59" + label in1 "PSU-1(L) 220V Rail (in)" + label in2 "PSU-1(L) 12V Rail (out)" + label fan1 "PSU-1(L) Fan 1" + label temp1 "PSU-1(L) Temp 1" + label temp2 "PSU-1(L) Temp 2" + label power1 "PSU-1(L) 220V Rail Pwr (in)" + label power2 "PSU-1(L) 12V Rail Pwr (out)" + label curr1 "PSU-1(L) 220V Rail Curr (in)" + label curr2 "PSU-1(L) 12V Rail Curr (out)" # Chassis fans chip "mlxreg_fan-isa-*" diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers.json.j2 index add8bf8bb7c2..b57f1dc31b43 120000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers.json.j2 +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers.json.j2 @@ -1 +1 @@ -../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file +../Mellanox-SN4700-O8C48/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 deleted file mode 120000 index 33b6704f9902..000000000000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 +++ /dev/null @@ -1 +0,0 @@ -../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 new file mode 100644 index 000000000000..20273084f7de --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 @@ -0,0 +1,435 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} + +{% set PORT_DPC = [] %} +{%- for port in PORT %} + {%- if 'role' in PORT[port] and PORT[port]['role'] == 'Dpc' %} + {%- if PORT_DPC.append(port) %}{%- endif %} + {%- endif %} +{%- endfor %} + +{% set PROFILE_PORT_MAP = { + "BUFFER_PORT_INGRESS_PROFILE_LIST": { + "Dpc": { + "active": { + "dynamic": "ingress_lossy_profile", + "static": "ingress_lossy_profile" + }, + "inactive": { + "dynamic": "ingress_lossy_profile", + "static": "ingress_lossy_zero_profile" + } + }, + "Ext": { + "active": { + "dynamic": "ingress_lossless_profile", + "static": "ingress_lossless_profile" + }, + "inactive": { + "dynamic": "ingress_lossless_profile", + "static": "ingress_lossless_zero_profile" + } + } + }, + "BUFFER_PORT_EGRESS_PROFILE_LIST": { + "Dpc": { + "active": { + "dynamic": "egress_lossy_profile", + "static": "egress_lossy_profile" + }, + "inactive": { + "dynamic": "egress_lossy_profile", + "static": "egress_lossy_zero_profile" + } + }, + "Ext": { + "active": { + "dynamic": "egress_lossless_profile,egress_lossy_profile", + "static": "egress_lossless_profile,egress_lossy_profile" + }, + "inactive": { + "dynamic": "egress_lossless_profile,egress_lossy_profile", + "static": "egress_lossless_zero_profile,egress_lossy_zero_profile" + } + } + }, + "BUFFER_QUEUE": { + "Dpc": { + "active": { + "dynamic": "q_lossy_profile", + "static": "q_lossy_profile" + }, + "inactive": { + "dynamic": "q_lossy_profile", + "static": "egress_lossy_zero_profile" + } + }, + "Ext": { + "active": { + "dynamic": "egress_lossless_profile", + "static": "egress_lossless_profile" + }, + "inactive": { + "dynamic": "egress_lossless_profile", + "static": "egress_lossless_zero_profile" + } + } + }, + "BUFFER_PG": { + "Dpc": { + "active": { + "dynamic": "ingress_lossy_profile", + "static": "ingress_lossy_profile" + }, + "inactive": { + "dynamic": "ingress_lossy_profile", + "static": "ingress_lossy_pg_zero_profile" + } + }, + "Ext": { + "active": { + "dynamic": "NULL" + }, + "inactive": { + "dynamic": "ingress_lossy_profile", + "static": "ingress_lossy_pg_zero_profile" + } + } + } +} %} + +{%- macro find_profile_to_attach(table, port, active_status, dynamic_status) -%} +{% if port in PORT_DPC %} +"{{PROFILE_PORT_MAP[table]['Dpc'][active_status][dynamic_status]}}" +{% else %} +"{{PROFILE_PORT_MAP[table]['Ext'][active_status][dynamic_status]}}" +{% endif %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} + "BUFFER_POOL": { + {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%} + "ingress_zero_pool" : { + "mode": "static", + "type": "ingress", + "size": "0" + }, + {% endif -%} + "ingress_lossless_pool": { + {% if dynamic_mode is not defined -%} + "size": "{{ ingress_lossless_pool_size }}", + "xoff": "{{ ingress_lossless_pool_xoff }}", + {% endif -%} + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + {% if dynamic_mode is not defined -%} + "size": "{{ egress_lossy_pool_size }}", + {% endif -%} + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%} + "ingress_lossy_pg_zero_profile" : { + "pool":"ingress_zero_pool", + "size":"0", + "static_th":"0" + }, + "ingress_lossless_zero_profile" : { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"-8" + }, + "egress_lossless_zero_profile" : { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"-8" + }, + "egress_lossy_zero_profile" : { + "pool":"egress_lossy_pool", + "size":"0", + "dynamic_th":"-8" + }, + {% endif -%} + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"7" + }, + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"egress_lossy_pool", + "size":"9216", + "dynamic_th":"7" + }, + "q_lossy_profile": { + "pool":"egress_lossy_pool", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_profile_lists(port_names_active, port_names_inactive) %} + "BUFFER_PORT_INGRESS_PROFILE_LIST": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_INGRESS_PROFILE_LIST', port, 'active', 'static')}} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +, +{% for port in port_names_inactive.split(',') %} + "{{ port }}": { +{% if dynamic_mode is defined %} + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_INGRESS_PROFILE_LIST', port, 'inactive', 'dynamic')}} +{% else %} + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_INGRESS_PROFILE_LIST', port, 'inactive', 'static')}} +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + }, + "BUFFER_PORT_EGRESS_PROFILE_LIST": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_EGRESS_PROFILE_LIST', port, 'active', 'static')}} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +, +{% for port in port_names_inactive.split(',') %} + "{{ port }}": { +{% if dynamic_mode is defined %} + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_EGRESS_PROFILE_LIST', port, 'inactive', 'dynamic')}} +{% else %} + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_EGRESS_PROFILE_LIST', port, 'inactive', 'static')}} +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + } +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) %} + "BUFFER_QUEUE": { +{% set q_loop = namespace(last_valid=false) %} +{% for port in port_names_active.split(',') %} +{% if port not in port_names_extra_queues.split(',') %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_QUEUE', port, 'active', 'static')}} + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} +{% if port not in port_names_extra_queues.split(',') %} + "{{ port }}|0-2": { + "profile" : "q_lossy_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} +{% if port not in port_names_extra_queues.split(',') %} +{% if port_names_extra_queues|length > 0 %} + "{{ port }}|5-7": { +{% else %} + "{{ port }}|5-6": { +{% endif %} + "profile" : "q_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% set q_loop.last_valid = true %} +{% else %} +{% set q_loop.last_valid = false %} +{% endif %} +{% endfor %} +{% if port_names_extra_queues|length > 0 %} +{% if q_loop.last_valid %},{% endif %} +{% for port in port_names_extra_queues.split(',') %} + "{{ port }}|0-1": { + "profile" : "q_lossy_profile" + }, + "{{ port }}|2-4": { + "profile" : "egress_lossless_profile" + }, + "{{ port }}|5": { + "profile" : "q_lossy_profile" + }, + "{{ port }}|6": { + "profile" : "egress_lossless_profile" + }, + "{{ port }}|7": { + "profile" : "q_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} +{% if port_names_inactive|length > 0 %} +, +{% if dynamic_mode is defined %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_QUEUE', port, 'inactive', 'dynamic')}} + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|0-2": { + "profile" : "q_lossy_profile" + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} +{% if port_names_extra_queues|length > 0 %} + "{{ port }}|5-7": { +{% else %} + "{{ port }}|5-6": { +{% endif %} + "profile" : "q_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% else %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_QUEUE', port, 'inactive', 'static')}} + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|0-2": { + "profile" : "egress_lossy_zero_profile" + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} +{% if port_names_extra_queues|length > 0 %} + "{{ port }}|5-7": { +{% else %} + "{{ port }}|5-6": { +{% endif %} + "profile" : "egress_lossy_zero_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} +{% endif %} + } +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names_active, port_names_inactive) %} +{{ generate_queue_buffers_with_extra_lossless_queues(port_names_active, "", port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) %} + "BUFFER_PG": { +{% set pg_loop = namespace(last_valid=false) %} +{% for port in port_names_active.split(',') %} +{% if port not in port_names_extra_pgs.split(',') %} +{% if dynamic_mode is defined %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'dynamic')}} + }, +{% else %} +{% if port in PORT_DPC %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'static')}} + }, +{% endif %} +{% endif %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% set pg_loop.last_valid = true %} +{% else %} +{% set pg_loop.last_valid = false %} +{% endif %} +{% endfor %} +{% if port_names_extra_pgs|length > 0 %} +{% if pg_loop.last_valid %},{% endif %} +{% for port in port_names_extra_pgs.split(',') %} +{% if dynamic_mode is defined %} + "{{ port }}|2-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'dynamic')}} + }, + "{{ port }}|6": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'dynamic')}} + }, +{% else %} +{% if port in PORT_DPC %} + "{{ port }}|2-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'static')}} + }, + "{{ port }}|6": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'static')}} + }, +{% endif %} +{% endif %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} +{% if port_names_inactive|length > 0 %} +{%- for port in port_names_inactive.split(',') %} + {%- if loop.first -%},{%- endif -%} +{% if dynamic_mode is defined %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'inactive', 'dynamic')}} + }, +{% else %} +{% if port in PORT_DPC %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'inactive', 'static')}} + }, +{% endif %} +{% endif %} + "{{ port }}|0": { +{% if dynamic_mode is defined %} + "profile" : "ingress_lossy_profile" +{% else %} + "profile" : "ingress_lossy_pg_zero_profile" +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + } +{%- endmacro %} + +{%- macro generate_pg_profiles(port_names_active, port_names_inactive) %} +{{ generate_pg_profiles_with_extra_lossless_pgs(port_names_active, "", port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2 deleted file mode 120000 index 38216fb84301..000000000000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2 +++ /dev/null @@ -1 +0,0 @@ -../ACS-MSN4700/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..175618cc95be --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2 @@ -0,0 +1,38 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '52219872' %} +{% set ingress_lossless_pool_xoff = '3305376' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '52219872' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2 deleted file mode 120000 index c09ab38502d4..000000000000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2 +++ /dev/null @@ -1 +0,0 @@ -../ACS-MSN4700/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..39cee7576e2c --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2 @@ -0,0 +1,38 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '300m' %} +{% set ingress_lossless_pool_size = '49934304' %} +{% set ingress_lossless_pool_xoff = '5590944' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '49934304' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_dynamic.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_dynamic.json.j2 index 8c4117c66214..d5a441408f93 120000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_dynamic.json.j2 +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_dynamic.json.j2 @@ -1 +1 @@ -../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2 \ No newline at end of file +../Mellanox-SN4700-O8C48/buffers_dynamic.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/pg_profile_lookup.ini index 7813e1697844..66cab04d2c42 120000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/pg_profile_lookup.ini +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/pg_profile_lookup.ini @@ -1 +1 @@ -../ACS-MSN4700/pg_profile_lookup.ini \ No newline at end of file +../Mellanox-SN4700-C128/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/port_config.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/port_config.ini index bdc1dc6766f9..3e9701359868 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/port_config.ini +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/port_config.ini @@ -1,5 +1,5 @@ ## -## Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. +## Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. ## Apache-2.0 ## ## Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers.json.j2 new file mode 100644 index 000000000000..dbcb63bdcc06 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers.json.j2 @@ -0,0 +1,15 @@ +{# + Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_objects.j2 new file mode 120000 index 000000000000..c01aebb7ae12 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..7ab8d157343f --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2 @@ -0,0 +1,51 @@ +{# + Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '5m' %} +{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%} +{% set ingress_lossless_pool_size = '49381376' %} +{% set ingress_lossless_pool_xoff = '5210112' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '49381376' %} +{%- else -%} +{% set ingress_lossless_pool_size = '51806208' %} +{% set ingress_lossless_pool_xoff = '3407872' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '51806208' %} +{%- endif -%} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..d30bedeace97 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2 @@ -0,0 +1,51 @@ +{# + Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '40m' %} +{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%} +{% set ingress_lossless_pool_size = '38256640' %} +{% set ingress_lossless_pool_xoff = '15089664' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '38256640' %} +{%- else -%} +{% set ingress_lossless_pool_size = '45531136' %} +{% set ingress_lossless_pool_xoff = '9682944' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '45531136' %} +{%- endif -%} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_dynamic.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_dynamic.json.j2 new file mode 100644 index 000000000000..84b330d42dbd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_dynamic.json.j2 @@ -0,0 +1,16 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't1' %} +{%- set dynamic_mode = 'true' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/hwsku.json new file mode 100644 index 000000000000..e316fc1bb675 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/hwsku.json @@ -0,0 +1,132 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet8": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet16": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet24": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet32": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet40": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet48": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet56": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet64": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet72": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet80": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet88": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet96": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet104": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet112": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet120": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet128": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet136": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet144": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet152": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet160": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet168": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet176": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet184": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet192": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet200": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet208": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet216": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet224": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet232": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet240": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + }, + "Ethernet248": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "autoneg": "off" + } + } +} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/media_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/media_settings.json new file mode 120000 index 000000000000..79e88a14f519 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/media_settings.json @@ -0,0 +1 @@ +../Mellanox-SN4700-O8C48/media_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/optics_si_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/optics_si_settings.json new file mode 120000 index 000000000000..f2f54cb0b7b6 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/optics_si_settings.json @@ -0,0 +1 @@ +../Mellanox-SN4700-O8C48/optics_si_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pg_profile_lookup.ini new file mode 120000 index 000000000000..745cc6e12ca5 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pg_profile_lookup.ini @@ -0,0 +1 @@ +../../x86_64-nvidia_sn4280-r0/ACS-SN4280/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pmon_daemon_control.json new file mode 100644 index 000000000000..208fa63ca294 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pmon_daemon_control.json @@ -0,0 +1,6 @@ +{ + "skip_ledd": true, + "skip_fancontrol": true, + "skip_xcvrd_cmis_mgr": false +} + diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/port_config.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/port_config.ini new file mode 120000 index 000000000000..e5ffca0b3e57 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/port_config.ini @@ -0,0 +1 @@ +../ACS-MSN4700/port_config.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2 new file mode 120000 index 000000000000..48221aa2b3de --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai.profile new file mode 100644 index 000000000000..b49fe9c199a4 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_32x400g.xml +SAI_INDEPENDENT_MODULE_MODE=1 diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai_4700_32x400g.xml b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai_4700_32x400g.xml new file mode 100644 index 000000000000..50bf43b1b5da --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai_4700_32x400g.xml @@ -0,0 +1,297 @@ + + + + + + + 00:02:03:04:05:00 + + + 1 + + + 32 + + + 1 + + + + + 1 + 8 + 17 + + + 0 + + --> + 32768 + 1 + + + 5 + 8 + 16 + 0 + 32768 + 1 + + + 9 + 8 + 19 + 0 + 32768 + 1 + + + 13 + 8 + 18 + 0 + 32768 + 1 + + + 17 + 8 + 21 + 0 + 32768 + 1 + + + 21 + 8 + 20 + 0 + 32768 + 1 + + + 25 + 8 + 23 + 1 + 32768 + 1 + + + 29 + 8 + 22 + 0 + 32768 + 1 + + + 33 + 8 + 29 + 0 + 32768 + 1 + + + 37 + 8 + 28 + 0 + 32768 + 1 + + + 41 + 8 + 31 + 0 + 32768 + 1 + + + 45 + 8 + 30 + 0 + 32768 + 1 + + + 49 + 8 + 25 + 0 + 32768 + 1 + + + 53 + 8 + 24 + 0 + 32768 + 1 + + + 57 + 8 + 27 + 0 + 32768 + 1 + + + 61 + 8 + 26 + 0 + 32768 + 1 + + + 65 + 8 + 14 + 0 + 32768 + 1 + + + 69 + 8 + 15 + 0 + 32768 + 1 + + + 73 + 8 + 12 + 0 + 32768 + 1 + + + 77 + 8 + 13 + 0 + 32768 + 1 + + + 81 + 8 + 10 + 0 + 32768 + 1 + + + 85 + 8 + 11 + 0 + 32768 + 1 + + + 89 + 8 + 8 + 0 + 32768 + 1 + + + 93 + 8 + 9 + 0 + 32768 + 1 + + + 97 + 8 + 2 + 0 + 32768 + 1 + + + 101 + 8 + 3 + 0 + 32768 + 1 + + + 105 + 8 + 0 + 0 + 32768 + 1 + + + 109 + 8 + 1 + 0 + 32768 + 1 + + + 113 + 8 + 6 + 0 + 32768 + 1 + + + 117 + 8 + 7 + 0 + 32768 + 1 + + + 121 + 8 + 4 + 0 + 32768 + 1 + + + 125 + 8 + 5 + 0 + 32768 + 1 + + + + diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t0.j2 index a4aa03be88a1..4caa1ca8f699 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t0.j2 +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t0.j2 @@ -1,5 +1,5 @@ {# - Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. + Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. Apache-2.0 Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -12,10 +12,17 @@ limitations under the License. #} {% set default_cable = '5m' %} -{% set ingress_lossless_pool_size = '44433408' %} -{% set ingress_lossless_pool_xoff = '9576448' %} +{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%} +{% set ingress_lossless_pool_size = '50397184' %} +{% set ingress_lossless_pool_xoff = '2990080' %} {% set egress_lossless_pool_size = '60817392' %} -{% set egress_lossy_pool_size = '44433408' %} +{% set egress_lossy_pool_size = '50397184' %} +{%- else -%} +{% set ingress_lossless_pool_size = '51748864' %} +{% set ingress_lossless_pool_xoff = '2260992' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '51748864' %} +{%- endif -%} {% import 'buffers_defaults_objects.j2' as defs with context %} @@ -23,10 +30,18 @@ {{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} {%- endmacro %} +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + {%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} {{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} {%- endmacro %} +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + {%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} {{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} {%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t1.j2 index 40048d03eaa8..0cb2d6fc6b6b 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t1.j2 +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t1.j2 @@ -1,5 +1,5 @@ {# - Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. + Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. Apache-2.0 Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -12,10 +12,17 @@ limitations under the License. #} {% set default_cable = '300m' %} -{% set ingress_lossless_pool_size = '44089344' %} -{% set ingress_lossless_pool_xoff = '9920512' %} +{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%} +{% set ingress_lossless_pool_size = '43859968' %} +{% set ingress_lossless_pool_xoff = '8282112' %} {% set egress_lossless_pool_size = '60817392' %} -{% set egress_lossy_pool_size = '44089344' %} +{% set egress_lossy_pool_size = '43859968' %} +{%- else -%} +{% set ingress_lossless_pool_size = '47792128' %} +{% set ingress_lossless_pool_xoff = '6217728 ' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '47792128 ' %} +{%- endif -%} {% import 'buffers_defaults_objects.j2' as defs with context %} @@ -27,10 +34,18 @@ {{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} {%- endmacro %} +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + {%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} {{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} {%- endmacro %} +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + {%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} {{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} {%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/hwsku.json index d50fae23ec92..d317f873764a 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/hwsku.json +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/hwsku.json @@ -2,227 +2,283 @@ "interfaces": { "Ethernet0": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet4": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet8": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet12": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet16": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet20": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet24": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet28": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet32": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet36": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet40": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet44": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet48": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet52": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet56": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet60": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet64": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet68": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet72": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet76": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet80": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet84": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet88": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet92": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet96": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet104": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet112": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet120": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet128": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet136": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet144": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet152": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet160": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet164": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet168": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet172": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet176": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet180": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet184": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet188": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet192": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet196": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet200": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet204": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet208": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet212": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet216": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet220": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet224": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet228": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet232": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet236": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet240": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet244": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet248": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet252": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" } } } diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini deleted file mode 120000 index 66cab04d2c42..000000000000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini +++ /dev/null @@ -1 +0,0 @@ -../Mellanox-SN4700-C128/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini new file mode 100644 index 000000000000..9fbb8eacf9ca --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini @@ -0,0 +1,53 @@ +## +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 19456 19456 16384 0 + 25000 5m 19456 19456 17408 0 + 40000 5m 19456 19456 19456 0 + 50000 5m 19456 19456 21504 0 + 100000 5m 19456 19456 37888 0 + 200000 5m 19456 19456 43008 0 + 400000 5m 38912 38912 73728 0 + 10000 40m 19456 19456 16384 0 + 25000 40m 19456 19456 18432 0 + 40000 40m 19456 19456 21504 0 + 50000 40m 19456 19456 23552 0 + 100000 40m 19456 19456 43008 0 + 200000 40m 19456 19456 51200 0 + 400000 40m 38912 38912 91136 0 + 10000 300m 19456 19456 19456 0 + 25000 300m 19456 19456 26624 0 + 40000 300m 19456 19456 34816 0 + 50000 300m 19456 19456 40960 0 + 100000 300m 19456 19456 75776 0 + 200000 300m 19456 19456 118784 0 + 400000 300m 38912 38912 225280 0 + 10000 1500m 19456 19456 35840 0 + 25000 1500m 19456 19456 65536 0 + 40000 1500m 19456 19456 96256 0 + 50000 1500m 19456 19456 117760 0 + 100000 1500m 19456 19456 230400 0 + 200000 1500m 19456 19456 427008 0 + 400000 1500m 38912 38912 427008 0 + 10000 2000m 19456 19456 41984 0 + 25000 2000m 19456 19456 80896 0 + 40000 2000m 19456 19456 121856 0 + 50000 2000m 19456 19456 149504 0 + 100000 2000m 19456 19456 293888 0 + 200000 2000m 19456 19456 555008 0 + 400000 2000m 38912 38912 555008 0 diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/qos.json.j2 index eccf286dc879..48221aa2b3de 120000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/qos.json.j2 +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/qos.json.j2 @@ -1 +1 @@ -../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file +../../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json index 3d51a36be689..e3aa3f8d77d6 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json @@ -2,227 +2,283 @@ "interfaces": { "Ethernet0": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet4": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet8": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet12": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet16": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet20": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet24": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet28": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet32": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet36": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet40": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet44": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet48": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet52": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet56": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet60": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet64": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet68": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet72": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet76": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet80": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet84": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet88": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet92": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet96": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet104": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet112": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet120": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet128": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet136": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet144": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet152": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet160": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet164": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet168": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet172": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet176": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet180": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet184": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet188": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet192": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet196": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet200": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet204": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet208": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet212": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet216": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet220": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet224": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet228": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet232": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet236": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet240": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet244": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" }, "Ethernet248": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "subport": "1", + "autoneg": "off" }, "Ethernet252": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "subport": "2", + "autoneg": "off" } } } diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json deleted file mode 100644 index 372b1cb2861c..000000000000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json +++ /dev/null @@ -1,506 +0,0 @@ -{ - "GLOBAL_MEDIA_SETTINGS": { - "1-32": { - "QSFP-DD-sm_media_interface": { - "speed:400GAUI-8": { - "idriver": { - "lane0": "0x0000003c", - "lane1": "0x0000003c", - "lane2": "0x0000003c", - "lane3": "0x0000003c", - "lane4": "0x0000003c", - "lane5": "0x0000003c", - "lane6": "0x0000003c", - "lane7": "0x0000003c" - }, - "pre1": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "main": { - "lane0": "0x00000020", - "lane1": "0x00000020", - "lane2": "0x00000020", - "lane3": "0x00000020", - "lane4": "0x00000020", - "lane5": "0x00000020", - "lane6": "0x00000020", - "lane7": "0x00000020" - }, - "post1": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "ob_m2lp": { - "lane0": "0x00000004", - "lane1": "0x00000004", - "lane2": "0x00000004", - "lane3": "0x00000004", - "lane4": "0x00000004", - "lane5": "0x00000004", - "lane6": "0x00000004", - "lane7": "0x00000004" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f", - "lane2": "0x0000000f", - "lane3": "0x0000000f", - "lane4": "0x0000000f", - "lane5": "0x0000000f", - "lane6": "0x0000000f", - "lane7": "0x0000000f" - }, - "obplev": { - "lane0": "0x00000069", - "lane1": "0x00000069", - "lane2": "0x00000069", - "lane3": "0x00000069", - "lane4": "0x00000069", - "lane5": "0x00000069", - "lane6": "0x00000069", - "lane7": "0x00000069" - }, - "obnlev": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "regn_bfm1p": { - "lane0": "0x0000001e", - "lane1": "0x0000001e", - "lane2": "0x0000001e", - "lane3": "0x0000001e", - "lane4": "0x0000001e", - "lane5": "0x0000001e", - "lane6": "0x0000001e", - "lane7": "0x0000001e" - }, - "regn_bfm1n": { - "lane0": "0x000000aa", - "lane1": "0x000000aa", - "lane2": "0x000000aa", - "lane3": "0x000000aa", - "lane4": "0x000000aa", - "lane5": "0x000000aa", - "lane6": "0x000000aa", - "lane7": "0x000000aa" - } - }, - "speed:100GAUI-2": { - "idriver": { - "lane0": "0x0000003c", - "lane1": "0x0000003c" - }, - "pre1": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000" - }, - "main": { - "lane0": "0x00000020", - "lane1": "0x00000020" - }, - "post1": { - "lane0": "0x00000006", - "lane1": "0x00000006" - }, - "ob_m2lp": { - "lane0": "0x00000004", - "lane1": "0x00000004" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f" - }, - "obplev": { - "lane0": "0x00000069", - "lane1": "0x00000069" - }, - "obnlev": { - "lane0": "0x0000005f", - "lane1": "0x0000005f" - }, - "regn_bfm1p": { - "lane0": "0x0000001e", - "lane1": "0x0000001e" - }, - "regn_bfm1n": { - "lane0": "0x000000aa", - "lane1": "0x000000aa" - } - } - }, - "QSFP-DD-active_cable_media_interface": { - "speed:400GAUI-8": { - "idriver": { - "lane0": "0x0000003c", - "lane1": "0x0000003c", - "lane2": "0x0000003c", - "lane3": "0x0000003c", - "lane4": "0x0000003c", - "lane5": "0x0000003c", - "lane6": "0x0000003c", - "lane7": "0x0000003c" - }, - "pre1": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "main": { - "lane0": "0x00000020", - "lane1": "0x00000020", - "lane2": "0x00000020", - "lane3": "0x00000020", - "lane4": "0x00000020", - "lane5": "0x00000020", - "lane6": "0x00000020", - "lane7": "0x00000020" - }, - "post1": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "ob_m2lp": { - "lane0": "0x00000004", - "lane1": "0x00000004", - "lane2": "0x00000004", - "lane3": "0x00000004", - "lane4": "0x00000004", - "lane5": "0x00000004", - "lane6": "0x00000004", - "lane7": "0x00000004" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f", - "lane2": "0x0000000f", - "lane3": "0x0000000f", - "lane4": "0x0000000f", - "lane5": "0x0000000f", - "lane6": "0x0000000f", - "lane7": "0x0000000f" - }, - "obplev": { - "lane0": "0x00000069", - "lane1": "0x00000069", - "lane2": "0x00000069", - "lane3": "0x00000069", - "lane4": "0x00000069", - "lane5": "0x00000069", - "lane6": "0x00000069", - "lane7": "0x00000069" - }, - "obnlev": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "regn_bfm1p": { - "lane0": "0x0000001e", - "lane1": "0x0000001e", - "lane2": "0x0000001e", - "lane3": "0x0000001e", - "lane4": "0x0000001e", - "lane5": "0x0000001e", - "lane6": "0x0000001e", - "lane7": "0x0000001e" - }, - "regn_bfm1n": { - "lane0": "0x000000aa", - "lane1": "0x000000aa", - "lane2": "0x000000aa", - "lane3": "0x000000aa", - "lane4": "0x000000aa", - "lane5": "0x000000aa", - "lane6": "0x000000aa", - "lane7": "0x000000aa" - } - }, - "speed:CAUI-4": { - "idriver": { - "lane0": "0x00000028", - "lane1": "0x00000028", - "lane2": "0x00000028", - "lane3": "0x00000028", - "lane4": "0x00000028", - "lane5": "0x00000028", - "lane6": "0x00000028", - "lane7": "0x00000028" - }, - "pre1": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": "0xfffffff3" - }, - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "main": { - "lane0": "0x00000033", - "lane1": "0x00000033", - "lane2": "0x00000033", - "lane3": "0x00000033", - "lane4": "0x00000033", - "lane5": "0x00000033", - "lane6": "0x00000033", - "lane7": "0x00000033" - }, - "post1": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "ob_m2lp": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f", - "lane2": "0x0000000f", - "lane3": "0x0000000f", - "lane4": "0x0000000f", - "lane5": "0x0000000f", - "lane6": "0x0000000f", - "lane7": "0x0000000f" - }, - "obplev": { - "lane0": "0x00000050", - "lane1": "0x00000050", - "lane2": "0x00000050", - "lane3": "0x00000050", - "lane4": "0x00000050", - "lane5": "0x00000050", - "lane6": "0x00000050", - "lane7": "0x00000050" - }, - "obnlev": { - "lane0": "0x00000078", - "lane1": "0x00000078", - "lane2": "0x00000078", - "lane3": "0x00000078", - "lane4": "0x00000078", - "lane5": "0x00000078", - "lane6": "0x00000078", - "lane7": "0x00000078" - }, - "regn_bfm1p": { - "lane0": "0x0000003c", - "lane1": "0x0000003c", - "lane2": "0x0000003c", - "lane3": "0x0000003c", - "lane4": "0x0000003c", - "lane5": "0x0000003c", - "lane6": "0x0000003c", - "lane7": "0x0000003c" - }, - "regn_bfm1n": { - "lane0": "0x0000008c", - "lane1": "0x0000008c", - "lane2": "0x0000008c", - "lane3": "0x0000008c", - "lane4": "0x0000008c", - "lane5": "0x0000008c", - "lane6": "0x0000008c", - "lane7": "0x0000008c" - } - } - }, - "QSFP+-active_cable_media_interface": { - "speed:CAUI-4": { - "idriver": { - "lane0": "0x00000028", - "lane1": "0x00000028", - "lane2": "0x00000028", - "lane3": "0x00000028", - "lane4": "0x00000028", - "lane5": "0x00000028", - "lane6": "0x00000028", - "lane7": "0x00000028" - }, - "pre1": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": "0xfffffff3" - }, - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "main": { - "lane0": "0x00000033", - "lane1": "0x00000033", - "lane2": "0x00000033", - "lane3": "0x00000033", - "lane4": "0x00000033", - "lane5": "0x00000033", - "lane6": "0x00000033", - "lane7": "0x00000033" - }, - "post1": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "ob_m2lp": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f", - "lane2": "0x0000000f", - "lane3": "0x0000000f", - "lane4": "0x0000000f", - "lane5": "0x0000000f", - "lane6": "0x0000000f", - "lane7": "0x0000000f" - }, - "obplev": { - "lane0": "0x00000050", - "lane1": "0x00000050", - "lane2": "0x00000050", - "lane3": "0x00000050", - "lane4": "0x00000050", - "lane5": "0x00000050", - "lane6": "0x00000050", - "lane7": "0x00000050" - }, - "obnlev": { - "lane0": "0x00000078", - "lane1": "0x00000078", - "lane2": "0x00000078", - "lane3": "0x00000078", - "lane4": "0x00000078", - "lane5": "0x00000078", - "lane6": "0x00000078", - "lane7": "0x00000078" - }, - "regn_bfm1p": { - "lane0": "0x0000003c", - "lane1": "0x0000003c", - "lane2": "0x0000003c", - "lane3": "0x0000003c", - "lane4": "0x0000003c", - "lane5": "0x0000003c", - "lane6": "0x0000003c", - "lane7": "0x0000003c" - }, - "regn_bfm1n": { - "lane0": "0x0000008c", - "lane1": "0x0000008c", - "lane2": "0x0000008c", - "lane3": "0x0000008c", - "lane4": "0x0000008c", - "lane5": "0x0000008c", - "lane6": "0x0000008c", - "lane7": "0x0000008c" - } - } - } - } - } -} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json new file mode 120000 index 000000000000..79e88a14f519 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json @@ -0,0 +1 @@ +../Mellanox-SN4700-O8C48/media_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json deleted file mode 100644 index bf71e818a869..000000000000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json +++ /dev/null @@ -1,108 +0,0 @@ -{ - "GLOBAL_MEDIA_SETTINGS": { - "1-32": { - "50G_SPEED": { - "Default": { - "OutputAmplitudeTargetRx": { - "OutputAmplitudeTargetRx1": 0, - "OutputAmplitudeTargetRx2": 0, - "OutputAmplitudeTargetRx3": 0, - "OutputAmplitudeTargetRx4": 0, - "OutputAmplitudeTargetRx5": 0, - "OutputAmplitudeTargetRx6": 0, - "OutputAmplitudeTargetRx7": 0, - "OutputAmplitudeTargetRx8": 0 - }, - "OutputEqPreCursorTargetRx": { - "OutputEqPreCursorTargetRx1": 0, - "OutputEqPreCursorTargetRx2": 0, - "OutputEqPreCursorTargetRx3": 0, - "OutputEqPreCursorTargetRx4": 0, - "OutputEqPreCursorTargetRx5": 0, - "OutputEqPreCursorTargetRx6": 0, - "OutputEqPreCursorTargetRx7": 0, - "OutputEqPreCursorTargetRx8": 0 - }, - "OutputEqPostCursorTargetRx": { - "OutputEqPostCursorTargetRx1": 0, - "OutputEqPostCursorTargetRx2": 0, - "OutputEqPostCursorTargetRx3": 0, - "OutputEqPostCursorTargetRx4": 0, - "OutputEqPostCursorTargetRx5": 0, - "OutputEqPostCursorTargetRx6": 0, - "OutputEqPostCursorTargetRx7": 0, - "OutputEqPostCursorTargetRx8": 0 - } - } - }, - "25G_SPEED": { - "Default": { - "OutputAmplitudeTargetRx": { - "OutputAmplitudeTargetRx1": 0, - "OutputAmplitudeTargetRx2": 0, - "OutputAmplitudeTargetRx3": 0, - "OutputAmplitudeTargetRx4": 0, - "OutputAmplitudeTargetRx5": 0, - "OutputAmplitudeTargetRx6": 0, - "OutputAmplitudeTargetRx7": 0, - "OutputAmplitudeTargetRx8": 0 - }, - "OutputEqPreCursorTargetRx": { - "OutputEqPreCursorTargetRx1": 0, - "OutputEqPreCursorTargetRx2": 0, - "OutputEqPreCursorTargetRx3": 0, - "OutputEqPreCursorTargetRx4": 0, - "OutputEqPreCursorTargetRx5": 0, - "OutputEqPreCursorTargetRx6": 0, - "OutputEqPreCursorTargetRx7": 0, - "OutputEqPreCursorTargetRx8": 0 - }, - "OutputEqPostCursorTargetRx": { - "OutputEqPostCursorTargetRx1": 0, - "OutputEqPostCursorTargetRx2": 0, - "OutputEqPostCursorTargetRx3": 0, - "OutputEqPostCursorTargetRx4": 0, - "OutputEqPostCursorTargetRx5": 0, - "OutputEqPostCursorTargetRx6": 0, - "OutputEqPostCursorTargetRx7": 0, - "OutputEqPostCursorTargetRx8": 0 - } - } - }, - "10G_SPEED": { - "Default": { - "OutputAmplitudeTargetRx": { - "OutputAmplitudeTargetRx1": 0, - "OutputAmplitudeTargetRx2": 0, - "OutputAmplitudeTargetRx3": 0, - "OutputAmplitudeTargetRx4": 0, - "OutputAmplitudeTargetRx5": 0, - "OutputAmplitudeTargetRx6": 0, - "OutputAmplitudeTargetRx7": 0, - "OutputAmplitudeTargetRx8": 0 - }, - "OutputEqPreCursorTargetRx": { - "OutputEqPreCursorTargetRx1": 0, - "OutputEqPreCursorTargetRx2": 0, - "OutputEqPreCursorTargetRx3": 0, - "OutputEqPreCursorTargetRx4": 0, - "OutputEqPreCursorTargetRx5": 0, - "OutputEqPreCursorTargetRx6": 0, - "OutputEqPreCursorTargetRx7": 0, - "OutputEqPreCursorTargetRx8": 0 - }, - "OutputEqPostCursorTargetRx": { - "OutputEqPostCursorTargetRx1": 0, - "OutputEqPostCursorTargetRx2": 0, - "OutputEqPostCursorTargetRx3": 0, - "OutputEqPostCursorTargetRx4": 0, - "OutputEqPostCursorTargetRx5": 0, - "OutputEqPostCursorTargetRx6": 0, - "OutputEqPostCursorTargetRx7": 0, - "OutputEqPostCursorTargetRx8": 0 - } - } - } - } - } -} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json new file mode 120000 index 000000000000..f2f54cb0b7b6 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json @@ -0,0 +1 @@ +../Mellanox-SN4700-O8C48/optics_si_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers.json.j2 new file mode 100644 index 000000000000..adf9fec9070f --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers.json.j2 @@ -0,0 +1,15 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_objects.j2 new file mode 120000 index 000000000000..c01aebb7ae12 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..1d9c616b5dd0 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t0.j2 @@ -0,0 +1,53 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '5m' %} +{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%} +{% set ingress_lossless_pool_size = '47448064' %} +{% set ingress_lossless_pool_xoff = '5537792' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '47448064' %} +{%- else -%} +{% set ingress_lossless_pool_size = '49971200' %} +{% set ingress_lossless_pool_xoff = '3637248' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '49971200' %} +{%- endif -%} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..56ba492c3dc8 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t1.j2 @@ -0,0 +1,56 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} + +{% set default_cable = '40m' %} +{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%} +{% set ingress_lossless_pool_size = '31784960' %} +{% set ingress_lossless_pool_xoff = '19955712' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '31784960' %} +{%- else -%} +{% set ingress_lossless_pool_size = '39354368' %} +{% set ingress_lossless_pool_xoff = '14254080' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '39354368' %} +{%- endif -%} + + + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_dynamic.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_dynamic.json.j2 new file mode 100644 index 000000000000..008ba6d1ecfd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_dynamic.json.j2 @@ -0,0 +1,18 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't0' %} +{%- set dynamic_mode = 'true' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/hwsku.json new file mode 100644 index 000000000000..4915aa51b852 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/hwsku.json @@ -0,0 +1,324 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet4": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet8": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet12": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet16": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet20": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet24": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet28": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet32": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet36": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet40": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet44": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet48": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet52": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet56": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet60": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet64": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet68": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet72": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet76": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet80": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet84": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet88": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet92": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet96": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet100": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet104": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet108": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet112": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet116": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet120": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet124": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet128": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet132": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet136": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet140": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet144": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet148": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet152": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet156": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet160": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet164": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet168": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet172": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet176": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet180": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet184": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet188": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet192": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet196": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet200": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet204": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet208": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet212": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet216": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet220": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet224": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet228": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet232": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet236": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet240": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet244": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + }, + "Ethernet248": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet252": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", + "subport": "2", + "autoneg": "off" + } + } +} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/media_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/media_settings.json new file mode 120000 index 000000000000..79e88a14f519 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/media_settings.json @@ -0,0 +1 @@ +../Mellanox-SN4700-O8C48/media_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/optics_si_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/optics_si_settings.json new file mode 120000 index 000000000000..f2f54cb0b7b6 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/optics_si_settings.json @@ -0,0 +1 @@ +../Mellanox-SN4700-O8C48/optics_si_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pg_profile_lookup.ini new file mode 120000 index 000000000000..745cc6e12ca5 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pg_profile_lookup.ini @@ -0,0 +1 @@ +../../x86_64-nvidia_sn4280-r0/ACS-SN4280/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pmon_daemon_control.json new file mode 100644 index 000000000000..208fa63ca294 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pmon_daemon_control.json @@ -0,0 +1,6 @@ +{ + "skip_ledd": true, + "skip_fancontrol": true, + "skip_xcvrd_cmis_mgr": false +} + diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/port_config.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/port_config.ini new file mode 100644 index 000000000000..b055a95ed15e --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/port_config.ini @@ -0,0 +1,81 @@ +## +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# name lanes alias index speed +Ethernet0 0,1,2,3 etp1a 1 200000 +Ethernet4 4,5,6,7 etp1b 1 200000 +Ethernet8 8,9,10,11 etp2a 2 200000 +Ethernet12 12,13,14,15 etp2b 2 200000 +Ethernet16 16,17,18,19 etp3a 3 200000 +Ethernet20 20,21,22,23 etp3b 3 200000 +Ethernet24 24,25,26,27 etp4a 4 200000 +Ethernet28 28,29,30,31 etp4b 4 200000 +Ethernet32 32,33,34,35 etp5a 5 200000 +Ethernet36 36,37,38,39 etp5b 5 200000 +Ethernet40 40,41,42,43 etp6a 6 200000 +Ethernet44 44,45,46,47 etp6b 6 200000 +Ethernet48 48,49,50,51 etp7a 7 200000 +Ethernet52 52,53,54,55 etp7b 7 200000 +Ethernet56 56,57,58,59 etp8a 8 200000 +Ethernet60 60,61,62,63 etp8b 8 200000 +Ethernet64 64,65,66,67 etp9a 9 200000 +Ethernet68 68,69,70,71 etp9b 9 200000 +Ethernet72 72,73,74,75 etp10a 10 200000 +Ethernet76 76,77,78,79 etp10b 10 200000 +Ethernet80 80,81,82,83 etp11a 11 200000 +Ethernet84 84,85,86,87 etp11b 11 200000 +Ethernet88 88,89,90,91 etp12a 12 200000 +Ethernet92 92,93,94,95 etp12b 12 200000 +Ethernet96 96,97,98,99 etp13a 13 200000 +Ethernet100 100,101,102,103 etp13b 13 200000 +Ethernet104 104,105,106,107 etp14a 14 200000 +Ethernet108 108,109,110,111 etp14b 14 200000 +Ethernet112 112,113,114,115 etp15a 15 200000 +Ethernet116 116,117,118,119 etp15b 15 200000 +Ethernet120 120,121,122,123 etp16a 16 200000 +Ethernet124 124,125,126,127 etp16b 16 200000 +Ethernet128 128,129,130,131 etp17a 17 200000 +Ethernet132 132,133,134,135 etp17b 17 200000 +Ethernet136 136,137,138,139 etp18a 18 200000 +Ethernet140 140,141,142,143 etp18b 18 200000 +Ethernet144 144,145,146,147 etp19a 19 200000 +Ethernet148 148,149,150,151 etp19b 19 200000 +Ethernet152 152,153,154,155 etp20a 20 200000 +Ethernet156 156,157,158,159 etp20b 20 200000 +Ethernet160 160,161,162,163 etp21a 21 200000 +Ethernet164 164,165,166,167 etp21b 21 200000 +Ethernet168 168,169,170,171 etp22a 22 200000 +Ethernet172 172,173,174,175 etp22b 22 200000 +Ethernet176 176,177,178,179 etp23a 23 200000 +Ethernet180 180,181,182,183 etp23b 23 200000 +Ethernet184 184,185,186,187 etp24a 24 200000 +Ethernet188 188,189,190,191 etp24b 24 200000 +Ethernet192 192,193,194,195 etp25a 25 200000 +Ethernet196 196,197,198,199 etp25b 25 200000 +Ethernet200 200,201,202,203 etp26a 26 200000 +Ethernet204 204,205,206,207 etp26b 26 200000 +Ethernet208 208,209,210,211 etp27a 27 200000 +Ethernet212 212,213,214,215 etp27b 27 200000 +Ethernet216 216,217,218,219 etp28a 28 200000 +Ethernet220 220,221,222,223 etp28b 28 200000 +Ethernet224 224,225,226,227 etp29a 29 200000 +Ethernet228 228,229,230,231 etp29b 29 200000 +Ethernet232 232,233,234,235 etp30a 30 200000 +Ethernet236 236,237,238,239 etp30b 30 200000 +Ethernet240 240,241,242,243 etp31a 31 200000 +Ethernet244 244,245,246,247 etp31b 31 200000 +Ethernet248 248,249,250,251 etp32a 32 200000 +Ethernet252 252,253,254,255 etp32b 32 200000 diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/qos.json.j2 new file mode 120000 index 000000000000..48221aa2b3de --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai.profile new file mode 100644 index 000000000000..2ba019b874ec --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_64x200g.xml +SAI_INDEPENDENT_MODULE_MODE=1 diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai_4700_64x200g.xml b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai_4700_64x200g.xml new file mode 100644 index 000000000000..4732b2c28c0d --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai_4700_64x200g.xml @@ -0,0 +1,297 @@ + + + + + + + 00:02:03:04:05:00 + + + 1 + + + 32 + + + 1 + + + + + 1 + 8 + 17 + + + 1 + + --> + 4096 + 2 + + + 5 + 8 + 16 + 1 + 4096 + 2 + + + 9 + 8 + 19 + 1 + 4096 + 2 + + + 13 + 8 + 18 + 1 + 4096 + 2 + + + 17 + 8 + 21 + 1 + 4096 + 2 + + + 21 + 8 + 20 + 1 + 4096 + 2 + + + 25 + 8 + 23 + 1 + 4096 + 2 + + + 29 + 8 + 22 + 1 + 4096 + 2 + + + 33 + 8 + 29 + 1 + 4096 + 2 + + + 37 + 8 + 28 + 1 + 4096 + 2 + + + 41 + 8 + 31 + 1 + 4096 + 2 + + + 45 + 8 + 30 + 1 + 4096 + 2 + + + 49 + 8 + 25 + 1 + 4096 + 2 + + + 53 + 8 + 24 + 1 + 4096 + 2 + + + 57 + 8 + 27 + 1 + 4096 + 2 + + + 61 + 8 + 26 + 1 + 4096 + 2 + + + 65 + 8 + 14 + 1 + 4096 + 1 + + + 69 + 8 + 15 + 1 + 4096 + 1 + + + 73 + 8 + 12 + 1 + 4096 + 1 + + + 77 + 8 + 13 + 1 + 4096 + 1 + + + 81 + 8 + 10 + 1 + 4096 + 2 + + + 85 + 8 + 11 + 1 + 4096 + 2 + + + 89 + 8 + 8 + 1 + 4096 + 2 + + + 93 + 8 + 9 + 1 + 4096 + 2 + + + 97 + 8 + 2 + 1 + 4096 + 2 + + + 101 + 8 + 3 + 1 + 4096 + 2 + + + 105 + 8 + 0 + 1 + 4096 + 2 + + + 109 + 8 + 1 + 1 + 4096 + 2 + + + 113 + 8 + 6 + 1 + 4096 + 2 + + + 117 + 8 + 7 + 1 + 4096 + 2 + + + 121 + 8 + 4 + 1 + 4096 + 2 + + + 125 + 8 + 5 + 1 + 4096 + 2 + + + + diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers.json.j2 new file mode 100644 index 000000000000..e7817793ba3a --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers.json.j2 @@ -0,0 +1,18 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_objects.j2 new file mode 120000 index 000000000000..09998eb836e5 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..0814c102746c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_t0.j2 @@ -0,0 +1,43 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '40m' %} +{%-set ports2cable = { + 'leafrouter_torrouter' : '300m', + 'torrouter_server' : '40m' + } +-%} +{% set ingress_lossless_pool_size = '52064208' %} +{% set ingress_lossless_pool_xoff = '3461040' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '52064208' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..c816c29f560d --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_t1.j2 @@ -0,0 +1,44 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '300m' %} +{%-set ports2cable = { + 'spinerouter_leafrouter' : '2000m', + 'leafrouter_torrouter' : '300m' + } +-%} +{% set ingress_lossless_pool_size = '46743552' %} +{% set ingress_lossless_pool_xoff = '8781696' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '46743552' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} + diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_dynamic.json.j2 new file mode 100644 index 000000000000..54964e94b1df --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_dynamic.json.j2 @@ -0,0 +1,19 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't1' %} +{%- set dynamic_mode = 'true' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/hwsku.json new file mode 100644 index 000000000000..44cce9bf468f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/hwsku.json @@ -0,0 +1,140 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet8": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet16": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet24": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet32": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet40": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet48": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet56": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet64": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet72": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet80": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet88": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet96": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet104": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet112": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet120": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet128": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet136": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet144": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet152": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet160": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet168": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet176": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet184": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet192": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet200": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet208": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet216": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1" + }, + "Ethernet224": { + "default_brkout_mode": "1x400G", + "subport": "1", + "autoneg": "on", + "role": "Dpc" + }, + "Ethernet232": { + "default_brkout_mode": "1x400G", + "subport": "1", + "autoneg": "on", + "role": "Dpc" + }, + "Ethernet240": { + "default_brkout_mode": "1x400G", + "subport": "1", + "autoneg": "on", + "role": "Dpc" + }, + "Ethernet248": { + "default_brkout_mode": "1x400G", + "subport": "1", + "autoneg": "on", + "role": "Dpc" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/pg_profile_lookup.ini new file mode 100644 index 000000000000..9fbb8eacf9ca --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/pg_profile_lookup.ini @@ -0,0 +1,53 @@ +## +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 19456 19456 16384 0 + 25000 5m 19456 19456 17408 0 + 40000 5m 19456 19456 19456 0 + 50000 5m 19456 19456 21504 0 + 100000 5m 19456 19456 37888 0 + 200000 5m 19456 19456 43008 0 + 400000 5m 38912 38912 73728 0 + 10000 40m 19456 19456 16384 0 + 25000 40m 19456 19456 18432 0 + 40000 40m 19456 19456 21504 0 + 50000 40m 19456 19456 23552 0 + 100000 40m 19456 19456 43008 0 + 200000 40m 19456 19456 51200 0 + 400000 40m 38912 38912 91136 0 + 10000 300m 19456 19456 19456 0 + 25000 300m 19456 19456 26624 0 + 40000 300m 19456 19456 34816 0 + 50000 300m 19456 19456 40960 0 + 100000 300m 19456 19456 75776 0 + 200000 300m 19456 19456 118784 0 + 400000 300m 38912 38912 225280 0 + 10000 1500m 19456 19456 35840 0 + 25000 1500m 19456 19456 65536 0 + 40000 1500m 19456 19456 96256 0 + 50000 1500m 19456 19456 117760 0 + 100000 1500m 19456 19456 230400 0 + 200000 1500m 19456 19456 427008 0 + 400000 1500m 38912 38912 427008 0 + 10000 2000m 19456 19456 41984 0 + 25000 2000m 19456 19456 80896 0 + 40000 2000m 19456 19456 121856 0 + 50000 2000m 19456 19456 149504 0 + 100000 2000m 19456 19456 293888 0 + 200000 2000m 19456 19456 555008 0 + 400000 2000m 38912 38912 555008 0 diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/port_config.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/port_config.ini new file mode 100644 index 000000000000..5a5faf7b9875 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/port_config.ini @@ -0,0 +1,51 @@ +## +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + + +# name lanes alias index +Ethernet0 0,1,2,3,4,5,6,7 etp1 1 +Ethernet8 8,9,10,11,12,13,14,15 etp2 2 +Ethernet16 16,17,18,19,20,21,22,23 etp3 3 +Ethernet24 24,25,26,27,28,29,30,31 etp4 4 +Ethernet32 32,33,34,35,36,37,38,39 etp5 5 +Ethernet40 40,41,42,43,44,45,46,47 etp6 6 +Ethernet48 48,49,50,51,52,53,54,55 etp7 7 +Ethernet56 56,57,58,59,60,61,62,63 etp8 8 +Ethernet64 64,65,66,67,68,69,70,71 etp9 9 +Ethernet72 72,73,74,75,76,77,78,79 etp10 10 +Ethernet80 80,81,82,83,84,85,86,87 etp11 11 +Ethernet88 88,89,90,91,92,93,94,95 etp12 12 +Ethernet96 96,97,98,99,100,101,102,103 etp13 13 +Ethernet104 104,105,106,107,108,109,110,111 etp14 14 +Ethernet112 112,113,114,115,116,117,118,119 etp15 15 +Ethernet120 120,121,122,123,124,125,126,127 etp16 16 +Ethernet128 128,129,130,131,132,133,134,135 etp17 17 +Ethernet136 136,137,138,139,140,141,142,143 etp18 18 +Ethernet144 144,145,146,147,148,149,150,151 etp19 19 +Ethernet152 152,153,154,155,156,157,158,159 etp20 20 +Ethernet160 160,161,162,163,164,165,166,167 etp21 21 +Ethernet168 168,169,170,171,172,173,174,175 etp22 22 +Ethernet176 176,177,178,179,180,181,182,183 etp23 23 +Ethernet184 184,185,186,187,188,189,190,191 etp24 24 +Ethernet192 192,193,194,195,196,197,198,199 etp25 25 +Ethernet200 200,201,202,203,204,205,206,207 etp26 26 +Ethernet208 208,209,210,211,212,213,214,215 etp27 27 +Ethernet216 216,217,218,219,220,221,222,223 etp28 28 +Ethernet224 224,225,226,227,228,229,230,231 etp29 29 +Ethernet232 232,233,234,235,236,237,238,239 etp30 30 +Ethernet240 240,241,242,243,244,245,246,247 etp31 31 +Ethernet248 248,249,250,251,252,253,254,255 etp32 32 diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/qos.json.j2 new file mode 120000 index 000000000000..eccf286dc879 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/sai.profile b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/sai.profile new file mode 100644 index 000000000000..33a14a2ecc7f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4280.xml diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/sai_4280.xml b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/sai_4280.xml new file mode 100644 index 000000000000..185aae6cf999 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/sai_4280.xml @@ -0,0 +1,265 @@ + + + + + + + 00:77:66:55:44:00 + + + 1 + + + 32 + + + 1 + + + + + 1 + 8 + 13 + + + 3 + + + 32768 + + + 5 + 8 + 12 + 3 + 32768 + + + 9 + 8 + 15 + 3 + 32768 + + + 13 + 8 + 14 + 3 + 32768 + + + 17 + 8 + 17 + 3 + 32768 + + + 21 + 8 + 16 + 3 + 32768 + + + 25 + 8 + 19 + 3 + 32768 + + + 29 + 8 + 18 + 3 + 32768 + + + 33 + 8 + 25 + 3 + 32768 + + + 37 + 8 + 24 + 3 + 32768 + + + 41 + 8 + 27 + 3 + 32768 + + + 45 + 8 + 26 + 3 + 32768 + + + 49 + 8 + 21 + 3 + 32768 + + + 53 + 8 + 20 + 3 + 32768 + + + 57 + 8 + 23 + 3 + 32768 + + + 61 + 8 + 22 + 3 + 32768 + + + 65 + 8 + 10 + 3 + 32768 + + + 69 + 8 + 11 + 3 + 32768 + + + 73 + 8 + 8 + 3 + 32768 + + + 77 + 8 + 9 + 3 + 32768 + + + 81 + 8 + 6 + 3 + 32768 + + + 85 + 8 + 7 + 3 + 32768 + + + 89 + 8 + 4 + 3 + 32768 + + + 93 + 8 + 5 + 3 + 32768 + + + 97 + 8 + 31 + 3 + 32768 + + + 101 + 8 + 30 + 3 + 32768 + + + 105 + 8 + 29 + 3 + 32768 + + + 109 + 8 + 28 + 3 + 32768 + + + 113 + 8 + 2 + 3 + 32768 + + + 117 + 8 + 3 + 3 + 32768 + + + 121 + 8 + 0 + 3 + 32768 + + + 125 + 8 + 1 + 3 + 32768 + + + + diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers.json.j2 new file mode 120000 index 000000000000..16698726c6b8 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers.json.j2 @@ -0,0 +1 @@ +../ACS-SN4280/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_objects.j2 new file mode 120000 index 000000000000..09998eb836e5 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_t0.j2 new file mode 120000 index 000000000000..f6b2affa3064 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +../ACS-SN4280/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_t1.j2 new file mode 120000 index 000000000000..e464a9c5e64a --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_t1.j2 @@ -0,0 +1 @@ +../ACS-SN4280/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_dynamic.json.j2 new file mode 120000 index 000000000000..12e94d69128c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_dynamic.json.j2 @@ -0,0 +1 @@ +../ACS-SN4280/buffers_dynamic.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json new file mode 100644 index 000000000000..41e245c85e1c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json @@ -0,0 +1,168 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet8": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet16": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet24": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet32": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet40": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet48": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet56": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet64": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet72": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet80": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet88": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet96": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet104": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet112": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet120": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet128": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet136": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet144": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet152": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet160": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet168": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet176": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet184": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet192": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet200": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet208": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet216": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", + "subport": "1", + "autoneg": "off" + }, + "Ethernet224": { + "default_brkout_mode": "1x400G", + "subport": "1", + "autoneg": "on", + "role": "Dpc" + }, + "Ethernet232": { + "default_brkout_mode": "1x400G", + "subport": "1", + "autoneg": "on", + "role": "Dpc" + }, + "Ethernet240": { + "default_brkout_mode": "1x400G", + "subport": "1", + "autoneg": "on", + "role": "Dpc" + }, + "Ethernet248": { + "default_brkout_mode": "1x400G", + "subport": "1", + "autoneg": "on", + "role": "Dpc" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/media_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/media_settings.json new file mode 100644 index 000000000000..3bd288caa9cc --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/media_settings.json @@ -0,0 +1,506 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-28": { + "QSFP-DD-sm_media_interface": { + "speed:400GAUI-8": { + "idriver": { + "lane0": "0x0000003c", + "lane1": "0x0000003c", + "lane2": "0x0000003c", + "lane3": "0x0000003c", + "lane4": "0x0000003c", + "lane5": "0x0000003c", + "lane6": "0x0000003c", + "lane7": "0x0000003c" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x00000020", + "lane1": "0x00000020", + "lane2": "0x00000020", + "lane3": "0x00000020", + "lane4": "0x00000020", + "lane5": "0x00000020", + "lane6": "0x00000020", + "lane7": "0x00000020" + }, + "post1": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "ob_m2lp": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "ob_alev_out": { + "lane0": "0x0000000f", + "lane1": "0x0000000f", + "lane2": "0x0000000f", + "lane3": "0x0000000f", + "lane4": "0x0000000f", + "lane5": "0x0000000f", + "lane6": "0x0000000f", + "lane7": "0x0000000f" + }, + "obplev": { + "lane0": "0x00000069", + "lane1": "0x00000069", + "lane2": "0x00000069", + "lane3": "0x00000069", + "lane4": "0x00000069", + "lane5": "0x00000069", + "lane6": "0x00000069", + "lane7": "0x00000069" + }, + "obnlev": { + "lane0": "0x0000005f", + "lane1": "0x0000005f", + "lane2": "0x0000005f", + "lane3": "0x0000005f", + "lane4": "0x0000005f", + "lane5": "0x0000005f", + "lane6": "0x0000005f", + "lane7": "0x0000005f" + }, + "regn_bfm1p": { + "lane0": "0x0000001e", + "lane1": "0x0000001e", + "lane2": "0x0000001e", + "lane3": "0x0000001e", + "lane4": "0x0000001e", + "lane5": "0x0000001e", + "lane6": "0x0000001e", + "lane7": "0x0000001e" + }, + "regn_bfm1n": { + "lane0": "0x000000aa", + "lane1": "0x000000aa", + "lane2": "0x000000aa", + "lane3": "0x000000aa", + "lane4": "0x000000aa", + "lane5": "0x000000aa", + "lane6": "0x000000aa", + "lane7": "0x000000aa" + } + }, + "speed:100GAUI-2": { + "idriver": { + "lane0": "0x0000003c", + "lane1": "0x0000003c" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000" + }, + "main": { + "lane0": "0x00000020", + "lane1": "0x00000020" + }, + "post1": { + "lane0": "0x00000006", + "lane1": "0x00000006" + }, + "ob_m2lp": { + "lane0": "0x00000004", + "lane1": "0x00000004" + }, + "ob_alev_out": { + "lane0": "0x0000000f", + "lane1": "0x0000000f" + }, + "obplev": { + "lane0": "0x00000069", + "lane1": "0x00000069" + }, + "obnlev": { + "lane0": "0x0000005f", + "lane1": "0x0000005f" + }, + "regn_bfm1p": { + "lane0": "0x0000001e", + "lane1": "0x0000001e" + }, + "regn_bfm1n": { + "lane0": "0x000000aa", + "lane1": "0x000000aa" + } + } + }, + "QSFP-DD-active_cable_media_interface": { + "speed:400GAUI-8": { + "idriver": { + "lane0": "0x0000003c", + "lane1": "0x0000003c", + "lane2": "0x0000003c", + "lane3": "0x0000003c", + "lane4": "0x0000003c", + "lane5": "0x0000003c", + "lane6": "0x0000003c", + "lane7": "0x0000003c" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x00000020", + "lane1": "0x00000020", + "lane2": "0x00000020", + "lane3": "0x00000020", + "lane4": "0x00000020", + "lane5": "0x00000020", + "lane6": "0x00000020", + "lane7": "0x00000020" + }, + "post1": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "ob_m2lp": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "ob_alev_out": { + "lane0": "0x0000000f", + "lane1": "0x0000000f", + "lane2": "0x0000000f", + "lane3": "0x0000000f", + "lane4": "0x0000000f", + "lane5": "0x0000000f", + "lane6": "0x0000000f", + "lane7": "0x0000000f" + }, + "obplev": { + "lane0": "0x00000069", + "lane1": "0x00000069", + "lane2": "0x00000069", + "lane3": "0x00000069", + "lane4": "0x00000069", + "lane5": "0x00000069", + "lane6": "0x00000069", + "lane7": "0x00000069" + }, + "obnlev": { + "lane0": "0x0000005f", + "lane1": "0x0000005f", + "lane2": "0x0000005f", + "lane3": "0x0000005f", + "lane4": "0x0000005f", + "lane5": "0x0000005f", + "lane6": "0x0000005f", + "lane7": "0x0000005f" + }, + "regn_bfm1p": { + "lane0": "0x0000001e", + "lane1": "0x0000001e", + "lane2": "0x0000001e", + "lane3": "0x0000001e", + "lane4": "0x0000001e", + "lane5": "0x0000001e", + "lane6": "0x0000001e", + "lane7": "0x0000001e" + }, + "regn_bfm1n": { + "lane0": "0x000000aa", + "lane1": "0x000000aa", + "lane2": "0x000000aa", + "lane3": "0x000000aa", + "lane4": "0x000000aa", + "lane5": "0x000000aa", + "lane6": "0x000000aa", + "lane7": "0x000000aa" + } + }, + "speed:CAUI-4": { + "idriver": { + "lane0": "0x00000028", + "lane1": "0x00000028", + "lane2": "0x00000028", + "lane3": "0x00000028", + "lane4": "0x00000028", + "lane5": "0x00000028", + "lane6": "0x00000028", + "lane7": "0x00000028" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x00000033", + "lane1": "0x00000033", + "lane2": "0x00000033", + "lane3": "0x00000033", + "lane4": "0x00000033", + "lane5": "0x00000033", + "lane6": "0x00000033", + "lane7": "0x00000033" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "ob_m2lp": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "ob_alev_out": { + "lane0": "0x0000000f", + "lane1": "0x0000000f", + "lane2": "0x0000000f", + "lane3": "0x0000000f", + "lane4": "0x0000000f", + "lane5": "0x0000000f", + "lane6": "0x0000000f", + "lane7": "0x0000000f" + }, + "obplev": { + "lane0": "0x00000050", + "lane1": "0x00000050", + "lane2": "0x00000050", + "lane3": "0x00000050", + "lane4": "0x00000050", + "lane5": "0x00000050", + "lane6": "0x00000050", + "lane7": "0x00000050" + }, + "obnlev": { + "lane0": "0x00000078", + "lane1": "0x00000078", + "lane2": "0x00000078", + "lane3": "0x00000078", + "lane4": "0x00000078", + "lane5": "0x00000078", + "lane6": "0x00000078", + "lane7": "0x00000078" + }, + "regn_bfm1p": { + "lane0": "0x0000003c", + "lane1": "0x0000003c", + "lane2": "0x0000003c", + "lane3": "0x0000003c", + "lane4": "0x0000003c", + "lane5": "0x0000003c", + "lane6": "0x0000003c", + "lane7": "0x0000003c" + }, + "regn_bfm1n": { + "lane0": "0x0000008c", + "lane1": "0x0000008c", + "lane2": "0x0000008c", + "lane3": "0x0000008c", + "lane4": "0x0000008c", + "lane5": "0x0000008c", + "lane6": "0x0000008c", + "lane7": "0x0000008c" + } + } + }, + "QSFP+-active_cable_media_interface": { + "speed:CAUI-4": { + "idriver": { + "lane0": "0x00000028", + "lane1": "0x00000028", + "lane2": "0x00000028", + "lane3": "0x00000028", + "lane4": "0x00000028", + "lane5": "0x00000028", + "lane6": "0x00000028", + "lane7": "0x00000028" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x00000033", + "lane1": "0x00000033", + "lane2": "0x00000033", + "lane3": "0x00000033", + "lane4": "0x00000033", + "lane5": "0x00000033", + "lane6": "0x00000033", + "lane7": "0x00000033" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "ob_m2lp": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "ob_alev_out": { + "lane0": "0x0000000f", + "lane1": "0x0000000f", + "lane2": "0x0000000f", + "lane3": "0x0000000f", + "lane4": "0x0000000f", + "lane5": "0x0000000f", + "lane6": "0x0000000f", + "lane7": "0x0000000f" + }, + "obplev": { + "lane0": "0x00000050", + "lane1": "0x00000050", + "lane2": "0x00000050", + "lane3": "0x00000050", + "lane4": "0x00000050", + "lane5": "0x00000050", + "lane6": "0x00000050", + "lane7": "0x00000050" + }, + "obnlev": { + "lane0": "0x00000078", + "lane1": "0x00000078", + "lane2": "0x00000078", + "lane3": "0x00000078", + "lane4": "0x00000078", + "lane5": "0x00000078", + "lane6": "0x00000078", + "lane7": "0x00000078" + }, + "regn_bfm1p": { + "lane0": "0x0000003c", + "lane1": "0x0000003c", + "lane2": "0x0000003c", + "lane3": "0x0000003c", + "lane4": "0x0000003c", + "lane5": "0x0000003c", + "lane6": "0x0000003c", + "lane7": "0x0000003c" + }, + "regn_bfm1n": { + "lane0": "0x0000008c", + "lane1": "0x0000008c", + "lane2": "0x0000008c", + "lane3": "0x0000008c", + "lane4": "0x0000008c", + "lane5": "0x0000008c", + "lane6": "0x0000008c", + "lane7": "0x0000008c" + } + } + } + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/optics_si_settings.json new file mode 100644 index 000000000000..6e427a5b03e2 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/optics_si_settings.json @@ -0,0 +1,108 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-28": { + "50G_SPEED": { + "Default": { + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 0, + "OutputAmplitudeTargetRx2": 0, + "OutputAmplitudeTargetRx3": 0, + "OutputAmplitudeTargetRx4": 0, + "OutputAmplitudeTargetRx5": 0, + "OutputAmplitudeTargetRx6": 0, + "OutputAmplitudeTargetRx7": 0, + "OutputAmplitudeTargetRx8": 0 + }, + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + } + } + }, + "25G_SPEED": { + "Default": { + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 0, + "OutputAmplitudeTargetRx2": 0, + "OutputAmplitudeTargetRx3": 0, + "OutputAmplitudeTargetRx4": 0, + "OutputAmplitudeTargetRx5": 0, + "OutputAmplitudeTargetRx6": 0, + "OutputAmplitudeTargetRx7": 0, + "OutputAmplitudeTargetRx8": 0 + }, + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + } + } + }, + "10G_SPEED": { + "Default": { + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 0, + "OutputAmplitudeTargetRx2": 0, + "OutputAmplitudeTargetRx3": 0, + "OutputAmplitudeTargetRx4": 0, + "OutputAmplitudeTargetRx5": 0, + "OutputAmplitudeTargetRx6": 0, + "OutputAmplitudeTargetRx7": 0, + "OutputAmplitudeTargetRx8": 0 + }, + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + } + } + } + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pg_profile_lookup.ini new file mode 120000 index 000000000000..35b70c764a93 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pg_profile_lookup.ini @@ -0,0 +1 @@ +../ACS-SN4280/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pmon_daemon_control.json new file mode 120000 index 000000000000..5f26f0b03a99 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pmon_daemon_control.json @@ -0,0 +1 @@ +../../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/port_config.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/port_config.ini new file mode 120000 index 000000000000..155ca39e4c86 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/port_config.ini @@ -0,0 +1 @@ +../ACS-SN4280/port_config.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/qos.json.j2 new file mode 120000 index 000000000000..eb7a6af87698 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/qos.json.j2 @@ -0,0 +1 @@ +../ACS-SN4280/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai.profile b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai.profile new file mode 100644 index 000000000000..84e9021d0c8d --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai.profile @@ -0,0 +1,4 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4280.xml +SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1 +SAI_INDEPENDENT_MODULE_MODE=1 +SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai_4280.xml b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai_4280.xml new file mode 120000 index 000000000000..4aa1ca449855 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai_4280.xml @@ -0,0 +1 @@ +../ACS-SN4280/sai_4280.xml \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/default_sku b/device/mellanox/x86_64-nvidia_sn4280-r0/default_sku new file mode 100644 index 000000000000..4b5ca0bd1a7e --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/default_sku @@ -0,0 +1 @@ +ACS-SN4280 t1-smartswitch diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf new file mode 100644 index 000000000000..867e2217ce1b --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf @@ -0,0 +1 @@ +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq module_blacklist=mlx5_ib,mlx5_core ima_hash=sha384" diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml new file mode 100644 index 000000000000..c9ef7ee705d3 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml @@ -0,0 +1,378 @@ +## +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + +- bus: '00' + dev: '00' + fn: '0' + id: '1450' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Root Complex' +- bus: '00' + dev: '00' + fn: '2' + id: '1451' + name: 'IOMMU: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) I/O + Memory Management Unit' +- bus: '00' + dev: '01' + fn: '0' + id: '1452' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) + PCIe Dummy Host Bridge' +- bus: '00' + dev: '01' + fn: '2' + id: '1453' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + PCIe GPP Bridge' +- bus: '00' + dev: '01' + fn: '3' + id: '1453' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + PCIe GPP Bridge' +- bus: '00' + dev: '01' + fn: '4' + id: '1453' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + PCIe GPP Bridge' +- bus: '00' + dev: '02' + fn: '0' + id: '1452' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) + PCIe Dummy Host Bridge' +- bus: '00' + dev: '03' + fn: '0' + id: '1452' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) + PCIe Dummy Host Bridge' +- bus: '00' + dev: '03' + fn: '1' + id: '1453' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + PCIe GPP Bridge' +- bus: '00' + dev: '03' + fn: '2' + id: '1453' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + PCIe GPP Bridge' +- bus: '00' + dev: '03' + fn: '3' + id: '1453' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + PCIe GPP Bridge' +- bus: '00' + dev: '04' + fn: '0' + id: '1452' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) + PCIe Dummy Host Bridge' +- bus: '00' + dev: '07' + fn: '0' + id: '1452' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) + PCIe Dummy Host Bridge' +- bus: '00' + dev: '07' + fn: '1' + id: '1454' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Internal PCIe GPP Bridge 0 to Bus B' +- bus: '00' + dev: 08 + fn: '0' + id: '1452' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) + PCIe Dummy Host Bridge' +- bus: '00' + dev: 08 + fn: '1' + id: '1454' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Internal PCIe GPP Bridge 0 to Bus B' +- bus: '00' + dev: '14' + fn: '0' + id: 790b + name: 'SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 59)' +- bus: '00' + dev: '14' + fn: '3' + id: 790e + name: 'ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51)' +- bus: '00' + dev: '18' + fn: '0' + id: '1460' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Data Fabric: Device 18h; Function 0' +- bus: '00' + dev: '18' + fn: '1' + id: '1461' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Data Fabric: Device 18h; Function 1' +- bus: '00' + dev: '18' + fn: '2' + id: '1462' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Data Fabric: Device 18h; Function 2' +- bus: '00' + dev: '18' + fn: '3' + id: '1463' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Data Fabric: Device 18h; Function 3' +- bus: '00' + dev: '18' + fn: '4' + id: '1464' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Data Fabric: Device 18h; Function 4' +- bus: '00' + dev: '18' + fn: '5' + id: '1465' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Data Fabric: Device 18h; Function 5' +- bus: '00' + dev: '18' + fn: '6' + id: '1466' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Data Fabric: Device 18h; Function 6' +- bus: '00' + dev: '18' + fn: '7' + id: '1467' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Data Fabric: Device 18h; Function 7' +- bus: '00' + dev: '19' + fn: '0' + id: '1460' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Data Fabric: Device 18h; Function 0' +- bus: '00' + dev: '19' + fn: '1' + id: '1461' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Data Fabric: Device 18h; Function 1' +- bus: '00' + dev: '19' + fn: '2' + id: '1462' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Data Fabric: Device 18h; Function 2' +- bus: '00' + dev: '19' + fn: '3' + id: '1463' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Data Fabric: Device 18h; Function 3' +- bus: '00' + dev: '19' + fn: '4' + id: '1464' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Data Fabric: Device 18h; Function 4' +- bus: '00' + dev: '19' + fn: '5' + id: '1465' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Data Fabric: Device 18h; Function 5' +- bus: '00' + dev: '19' + fn: '6' + id: '1466' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Data Fabric: Device 18h; Function 6' +- bus: '00' + dev: '19' + fn: '7' + id: '1467' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Data Fabric: Device 18h; Function 7' +- bus: '01' + dev: '00' + fn: '0' + id: c2d5 + name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management + Interface (rev 01)' +- bus: '02' + dev: '00' + fn: '0' + id: c2d5 + name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management + Interface (rev 01)' +- bus: '03' + dev: '00' + fn: '0' + id: '5765' + name: 'Non-Volatile memory controller: Device 1f9f:5765 (rev 01)' +- bus: '04' + dev: '00' + fn: '0' + id: cf70 + name: 'Ethernet controller: Mellanox Technologies Spectrum-3' +- bus: '05' + dev: '00' + fn: '0' + id: c2d5 + name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management + Interface (rev 01)' +- bus: '06' + dev: '00' + fn: '0' + id: c2d5 + name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management + Interface (rev 01)' +- bus: '07' + dev: '00' + fn: '0' + id: 145a + name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] + Zeppelin/Raven/Raven2 PCIe Dummy Function' +- bus: '07' + dev: '00' + fn: '2' + id: '1456' + name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 17h (Models + 00h-0fh) Platform Security Processor (PSP) 3.0 Device' +- bus: '07' + dev: '00' + fn: '3' + id: 145f + name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Zeppelin USB 3.0 xHCI + Compliant Host Controller' +- bus: 08 + dev: '00' + fn: '0' + id: '1455' + name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] + Zeppelin/Renoir PCIe Dummy Function' +- bus: 08 + dev: '00' + fn: '1' + id: '1468' + name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Zeppelin Cryptographic + Coprocessor NTBCCP' +- bus: 08 + dev: '00' + fn: '4' + id: '1458' + name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller' +- bus: '40' + dev: '00' + fn: '0' + id: '1450' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Root Complex' +- bus: '40' + dev: '00' + fn: '2' + id: '1451' + name: 'IOMMU: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) I/O + Memory Management Unit' +- bus: '40' + dev: '01' + fn: '0' + id: '1452' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) + PCIe Dummy Host Bridge' +- bus: '40' + dev: '02' + fn: '0' + id: '1452' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) + PCIe Dummy Host Bridge' +- bus: '40' + dev: '03' + fn: '0' + id: '1452' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) + PCIe Dummy Host Bridge' +- bus: '40' + dev: '04' + fn: '0' + id: '1452' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) + PCIe Dummy Host Bridge' +- bus: '40' + dev: '07' + fn: '0' + id: '1452' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) + PCIe Dummy Host Bridge' +- bus: '40' + dev: '07' + fn: '1' + id: '1454' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Internal PCIe GPP Bridge 0 to Bus B' +- bus: '40' + dev: 08 + fn: '0' + id: '1452' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh) + PCIe Dummy Host Bridge' +- bus: '40' + dev: 08 + fn: '1' + id: '1454' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) + Internal PCIe GPP Bridge 0 to Bus B' +- bus: '41' + dev: '00' + fn: '0' + id: 145a + name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] + Zeppelin/Raven/Raven2 PCIe Dummy Function' +- bus: '41' + dev: '00' + fn: '2' + id: '1456' + name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 17h (Models + 00h-0fh) Platform Security Processor (PSP) 3.0 Device' +- bus: '41' + dev: '00' + fn: '3' + id: 145f + name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Zeppelin USB 3.0 xHCI + Compliant Host Controller' +- bus: '42' + dev: '00' + fn: '0' + id: '1455' + name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] + Zeppelin/Renoir PCIe Dummy Function' +- bus: '42' + dev: '00' + fn: '1' + id: '1468' + name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Zeppelin Cryptographic + Coprocessor NTBCCP' diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json b/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json new file mode 100644 index 000000000000..8597bb955dd4 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json @@ -0,0 +1,664 @@ +{ + "chassis": { + "name": "SN4280", + "components": [ + { + "name": "ONIE" + }, + { + "name": "SSD" + }, + { + "name": "BIOS" + }, + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + }, + { + "name": "CPLD3" + } + ], + "fans": [], + "fan_drawers": [ + { + "name": "drawer1", + "fans": [ + { + "name": "fan1" + } + ] + }, + { + "name": "drawer2", + "fans": [ + { + "name": "fan2" + } + ] + }, + { + "name": "drawer3", + "fans": [ + { + "name": "fan3" + } + ] + }, + { + "name": "drawer4", + "fans": [ + { + "name": "fan4" + } + ] + } + ], + "psus": [ + { + "name": "PSU 1", + "fans": [ + { + "name": "psu1_fan1" + } + ], + "thermals": [ + { + "name": "PSU-1 Temp" + } + ] + }, + { + "name": "PSU 2", + "fans": [ + { + "name": "psu2_fan1" + } + ], + "thermals": [ + { + "name": "PSU-2 Temp" + } + ] + } + ], + "thermals": [ + { + "name": "ASIC" + }, + { + "name": "Ambient Fan Side Temp" + }, + { + "name": "Ambient Port Side Temp" + }, + { + "name": "CPU Pack Temp" + }, + { + "name": "SODIMM 1 Temp" + }, + { + "name": "SODIMM 2 Temp" + }, + { + "name": "SODIMM 3 Temp" + }, + { + "name": "SODIMM 4 Temp" + } + ], + "sfps": [ + { + "name": "sfp1", + "thermals": [ + { + "name": "xSFP module 1 Temp" + } + ] + }, + { + "name": "sfp2", + "thermals": [ + { + "name": "xSFP module 2 Temp" + } + ] + }, + { + "name": "sfp3", + "thermals": [ + { + "name": "xSFP module 3 Temp" + } + ] + }, + { + "name": "sfp4", + "thermals": [ + { + "name": "xSFP module 4 Temp" + } + ] + }, + { + "name": "sfp5", + "thermals": [ + { + "name": "xSFP module 5 Temp" + } + ] + }, + { + "name": "sfp6", + "thermals": [ + { + "name": "xSFP module 6 Temp" + } + ] + }, + { + "name": "sfp7", + "thermals": [ + { + "name": "xSFP module 7 Temp" + } + ] + }, + { + "name": "sfp8", + "thermals": [ + { + "name": "xSFP module 8 Temp" + } + ] + }, + { + "name": "sfp9", + "thermals": [ + { + "name": "xSFP module 9 Temp" + } + ] + }, + { + "name": "sfp10", + "thermals": [ + { + "name": "xSFP module 10 Temp" + } + ] + }, + { + "name": "sfp11", + "thermals": [ + { + "name": "xSFP module 11 Temp" + } + ] + }, + { + "name": "sfp12", + "thermals": [ + { + "name": "xSFP module 12 Temp" + } + ] + }, + { + "name": "sfp13", + "thermals": [ + { + "name": "xSFP module 13 Temp" + } + ] + }, + { + "name": "sfp14", + "thermals": [ + { + "name": "xSFP module 14 Temp" + } + ] + }, + { + "name": "sfp15", + "thermals": [ + { + "name": "xSFP module 15 Temp" + } + ] + }, + { + "name": "sfp16", + "thermals": [ + { + "name": "xSFP module 16 Temp" + } + ] + }, + { + "name": "sfp17", + "thermals": [ + { + "name": "xSFP module 17 Temp" + } + ] + }, + { + "name": "sfp18", + "thermals": [ + { + "name": "xSFP module 18 Temp" + } + ] + }, + { + "name": "sfp19", + "thermals": [ + { + "name": "xSFP module 19 Temp" + } + ] + }, + { + "name": "sfp20", + "thermals": [ + { + "name": "xSFP module 20 Temp" + } + ] + }, + { + "name": "sfp21", + "thermals": [ + { + "name": "xSFP module 21 Temp" + } + ] + }, + { + "name": "sfp22", + "thermals": [ + { + "name": "xSFP module 22 Temp" + } + ] + }, + { + "name": "sfp23", + "thermals": [ + { + "name": "xSFP module 23 Temp" + } + ] + }, + { + "name": "sfp24", + "thermals": [ + { + "name": "xSFP module 24 Temp" + } + ] + }, + { + "name": "sfp25", + "thermals": [ + { + "name": "xSFP module 25 Temp" + } + ] + }, + { + "name": "sfp26", + "thermals": [ + { + "name": "xSFP module 26 Temp" + } + ] + }, + { + "name": "sfp27", + "thermals": [ + { + "name": "xSFP module 27 Temp" + } + ] + }, + { + "name": "sfp28", + "thermals": [ + { + "name": "xSFP module 28 Temp" + } + ] + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "0,1,2,3,4,5,6,7", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp1"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp1a", "etp1b"], + "4x100G[50G,25G,10G,1G]": ["etp1a", "etp1b", "etp1c", "etp1d"], + "4x25G(4)[10G,1G]": ["etp1a", "etp1b", "etp1c", "etp1d"] + } + }, + "Ethernet8": { + "index": "2,2,2,2,2,2,2,2", + "lanes": "8,9,10,11,12,13,14,15", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp2"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp2a", "etp2b"], + "4x100G[50G,25G,10G,1G]": ["etp2a", "etp2b", "etp2c", "etp2d"], + "4x25G(4)[10G,1G]": ["etp2a", "etp2b", "etp2c", "etp2d"] + } + }, + "Ethernet16": { + "index": "3,3,3,3,3,3,3,3", + "lanes": "16,17,18,19,20,21,22,23", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp3"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp3a", "etp3b"], + "4x100G[50G,25G,10G,1G]": ["etp3a", "etp3b", "etp3c", "etp3d"], + "4x25G(4)[10G,1G]": ["etp3a", "etp3b", "etp3c", "etp3d"] + } + }, + "Ethernet24": { + "index": "4,4,4,4,4,4,4,4", + "lanes": "24,25,26,27,28,29,30,31", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp4"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp4a", "etp4b"], + "4x100G[50G,25G,10G,1G]": ["etp4a", "etp4b", "etp4c", "etp4d"], + "4x25G(4)[10G,1G]": ["etp4a", "etp4b", "etp4c", "etp4d"] + } + }, + "Ethernet32": { + "index": "5,5,5,5,5,5,5,5", + "lanes": "32,33,34,35,36,37,38,39", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp5"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp5a", "etp5b"], + "4x100G[50G,25G,10G,1G]": ["etp5a", "etp5b", "etp5c", "etp5d"], + "4x25G(4)[10G,1G]": ["etp5a", "etp5b", "etp5c", "etp5d"] + } + }, + "Ethernet40": { + "index": "6,6,6,6,6,6,6,6", + "lanes": "40,41,42,43,44,45,46,47", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp6"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp6a", "etp6b"], + "4x100G[50G,25G,10G,1G]": ["etp6a", "etp6b", "etp6c", "etp6d"], + "4x25G(4)[10G,1G]": ["etp6a", "etp6b", "etp6c", "etp6d"] + } + }, + "Ethernet48": { + "index": "7,7,7,7,7,7,7,7", + "lanes": "48,49,50,51,52,53,54,55", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp7"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp7a", "etp7b"], + "4x100G[50G,25G,10G,1G]": ["etp7a", "etp7b", "etp7c", "etp7d"], + "4x25G(4)[10G,1G]": ["etp7a", "etp7b", "etp7c", "etp7d"] + } + }, + "Ethernet56": { + "index": "8,8,8,8,8,8,8,8", + "lanes": "56,57,58,59,60,61,62,63", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp8"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp8a", "etp8b"], + "4x100G[50G,25G,10G,1G]": ["etp8a", "etp8b", "etp8c", "etp8d"], + "4x25G(4)[10G,1G]": ["etp8a", "etp8b", "etp8c", "etp8d"] + } + }, + "Ethernet64": { + "index": "9,9,9,9,9,9,9,9", + "lanes": "64,65,66,67,68,69,70,71", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp9"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp9a", "etp9b"], + "4x100G[50G,25G,10G,1G]": ["etp9a", "etp9b", "etp9c", "etp9d"], + "4x25G(4)[10G,1G]": ["etp9a", "etp9b", "etp9c", "etp9d"] + } + }, + "Ethernet72": { + "index": "10,10,10,10,10,10,10,10", + "lanes": "72,73,74,75,76,77,78,79", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp10"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp10a", "etp10b"], + "4x100G[50G,25G,10G,1G]": ["etp10a", "etp10b", "etp10c", "etp10d"], + "4x25G(4)[10G,1G]": ["etp10a", "etp10b", "etp10c", "etp10d"] + } + }, + "Ethernet80": { + "index": "11,11,11,11,11,11,11,11", + "lanes": "80,81,82,83,84,85,86,87", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp11"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp11a", "etp11b"], + "4x100G[50G,25G,10G,1G]": ["etp11a", "etp11b", "etp11c", "etp11d"], + "4x25G(4)[10G,1G]": ["etp11a", "etp11b", "etp11c", "etp11d"] + } + }, + "Ethernet88": { + "index": "12,12,12,12,12,12,12,12", + "lanes": "88,89,90,91,92,93,94,95", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp12"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp12a", "etp12b"], + "4x100G[50G,25G,10G,1G]": ["etp12a", "etp12b", "etp12c", "etp12d"], + "4x25G(4)[10G,1G]": ["etp12a", "etp12b", "etp12c", "etp12d"] + } + }, + "Ethernet96": { + "index": "13,13,13,13,13,13,13,13", + "lanes": "96,97,98,99,100,101,102,103", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp13"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp13a", "etp13b"], + "4x100G[50G,25G,10G,1G]": ["etp13a", "etp13b", "etp13c", "etp13d"], + "4x25G(4)[10G,1G]": ["etp13a", "etp13b", "etp13c", "etp13d"] + } + }, + "Ethernet104": { + "index": "14,14,14,14,14,14,14,14", + "lanes": "104,105,106,107,108,109,110,111", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp14"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp14a", "etp14b"], + "4x100G[50G,25G,10G,1G]": ["etp14a", "etp14b", "etp14c", "etp14d"], + "4x25G(4)[10G,1G]": ["etp14a", "etp14b", "etp14c", "etp14d"] + } + }, + "Ethernet112": { + "index": "15,15,15,15,15,15,15,15", + "lanes": "112,113,114,115,116,117,118,119", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp15"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp15a", "etp15b"], + "4x100G[50G,25G,10G,1G]": ["etp15a", "etp15b", "etp15c", "etp15d"], + "4x25G(4)[10G,1G]": ["etp15a", "etp15b", "etp15c", "etp15d"] + } + }, + "Ethernet120": { + "index": "16,16,16,16,16,16,16,16", + "lanes": "120,121,122,123,124,125,126,127", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp16"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp16a", "etp16b"], + "4x100G[50G,25G,10G,1G]": ["etp16a", "etp16b", "etp16c", "etp16d"], + "4x25G(4)[10G,1G]": ["etp16a", "etp16b", "etp16c", "etp16d"] + } + }, + "Ethernet128": { + "index": "17,17,17,17,17,17,17,17", + "lanes": "128,129,130,131,132,133,134,135", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp17"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp17a", "etp17b"], + "4x100G[50G,25G,10G,1G]": ["etp17a", "etp17b", "etp17c", "etp17d"], + "4x25G(4)[10G,1G]": ["etp17a", "etp17b", "etp17c", "etp17d"] + } + }, + "Ethernet136": { + "index": "18,18,18,18,18,18,18,18", + "lanes": "136,137,138,139,140,141,142,143", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp18"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp18a", "etp18b"], + "4x100G[50G,25G,10G,1G]": ["etp18a", "etp18b", "etp18c", "etp18d"], + "4x25G(4)[10G,1G]": ["etp18a", "etp18b", "etp18c", "etp18d"] + } + }, + "Ethernet144": { + "index": "19,19,19,19,19,19,19,19", + "lanes": "144,145,146,147,148,149,150,151", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp19"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp19a", "etp19b"], + "4x100G[50G,25G,10G,1G]": ["etp19a", "etp19b", "etp19c", "etp19d"], + "4x25G(4)[10G,1G]": ["etp19a", "etp19b", "etp19c", "etp19d"] + } + }, + "Ethernet152": { + "index": "20,20,20,20,20,20,20,20", + "lanes": "152,153,154,155,156,157,158,159", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp20"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp20a", "etp20b"], + "4x100G[50G,25G,10G,1G]": ["etp20a", "etp20b", "etp20c", "etp20d"], + "4x25G(4)[10G,1G]": ["etp20a", "etp20b", "etp20c", "etp20d"] + } + }, + "Ethernet160": { + "index": "21,21,21,21,21,21,21,21", + "lanes": "160,161,162,163,164,165,166,167", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp21"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp21a", "etp21b"], + "4x100G[50G,25G,10G,1G]": ["etp21a", "etp21b", "etp21c", "etp21d"], + "4x25G(4)[10G,1G]": ["etp21a", "etp21b", "etp21c", "etp21d"] + } + }, + "Ethernet168": { + "index": "22,22,22,22,22,22,22,22", + "lanes": "168,169,170,171,172,173,174,175", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp22"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp22a", "etp22b"], + "4x100G[50G,25G,10G,1G]": ["etp22a", "etp22b", "etp22c", "etp22d"], + "4x25G(4)[10G,1G]": ["etp22a", "etp22b", "etp22c", "etp22d"] + } + }, + "Ethernet176": { + "index": "23,23,23,23,23,23,23,23", + "lanes": "176,177,178,179,180,181,182,183", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp23"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp23a", "etp23b"], + "4x100G[50G,25G,10G,1G]": ["etp23a", "etp23b", "etp23c", "etp23d"], + "4x25G(4)[10G,1G]": ["etp23a", "etp23b", "etp23c", "etp23d"] + } + }, + "Ethernet184": { + "index": "24,24,24,24,24,24,24,24", + "lanes": "184,185,186,187,188,189,190,191", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp24"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp24a", "etp24b"], + "4x100G[50G,25G,10G,1G]": ["etp24a", "etp24b", "etp24c", "etp24d"], + "4x25G(4)[10G,1G]": ["etp24a", "etp24b", "etp24c", "etp24d"] + } + }, + "Ethernet192": { + "index": "25,25,25,25,25,25,25,25", + "lanes": "192,193,194,195,196,197,198,199", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp25"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp25a", "etp25b"], + "4x100G[50G,25G,10G,1G]": ["etp25a", "etp25b", "etp25c", "etp25d"], + "4x25G(4)[10G,1G]": ["etp25a", "etp25b", "etp25c", "etp25d"] + } + }, + "Ethernet200": { + "index": "26,26,26,26,26,26,26,26", + "lanes": "200,201,202,203,204,205,206,207", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp26"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp26a", "etp26b"], + "4x100G[50G,25G,10G,1G]": ["etp26a", "etp26b", "etp26c", "etp26d"], + "4x25G(4)[10G,1G]": ["etp26a", "etp26b", "etp26c", "etp26d"] + } + }, + "Ethernet208": { + "index": "27,27,27,27,27,27,27,27", + "lanes": "208,209,210,211,212,213,214,215", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp27"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp27a", "etp27b"], + "4x100G[50G,25G,10G,1G]": ["etp27a", "etp27b", "etp27c", "etp27d"], + "4x25G(4)[10G,1G]": ["etp27a", "etp27b", "etp27c", "etp27d"] + } + }, + "Ethernet216": { + "index": "28,28,28,28,28,28,28,28", + "lanes": "216,217,218,219,220,221,222,223", + "breakout_modes": { + "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp28"], + "2x200G[100G,50G,40G,25G,10G,1G]": ["etp28a", "etp28b"], + "4x100G[50G,25G,10G,1G]": ["etp28a", "etp28b", "etp28c", "etp28d"], + "4x25G(4)[10G,1G]": ["etp28a", "etp28b", "etp28c", "etp28d"] + } + }, + "Ethernet224": { + "index": "29,29,29,29,29,29,29,29", + "lanes": "224,225,226,227,228,229,230,231", + "breakout_modes": { + "1x400G": ["etp29"] + } + }, + "Ethernet232": { + "index": "30,30,30,30,30,30,30,30", + "lanes": "232,233,234,235,236,237,238,239", + "breakout_modes": { + "1x400G": ["etp30"] + } + }, + "Ethernet240": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "240,241,242,243,244,245,246,247", + "breakout_modes": { + "1x400G": ["etp31"] + } + }, + "Ethernet248": { + "index": "32,32,32,32,32,32,32,32", + "lanes": "248,249,250,251,252,253,254,255", + "breakout_modes": { + "1x400G": ["etp32"] + } + } + }, + "DPUS": { + "dpu0": { + "midplane_interface": "dpu0" + }, + "dpu1": { + "midplane_interface": "dpu1" + }, + "dpu2": { + "midplane_interface": "dpu2" + }, + "dpu3": { + "midplane_interface": "dpu3" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/platform_asic b/device/mellanox/x86_64-nvidia_sn4280-r0/platform_asic new file mode 100644 index 000000000000..70c074885557 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/platform_asic @@ -0,0 +1 @@ +mellanox diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/platform_components.json b/device/mellanox/x86_64-nvidia_sn4280-r0/platform_components.json new file mode 100644 index 000000000000..ff3e406d8cc9 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/platform_components.json @@ -0,0 +1,18 @@ +{ + "chassis": { + "SN4280": { + "component": { + "ONIE": { }, + "SSD": { }, + "BIOS": { }, + "CPLD1": { }, + "CPLD2": { }, + "CPLD3": { }, + "DPU1_FPGA": { }, + "DPU2_FPGA": { }, + "DPU3_FPGA": { }, + "DPU4_FPGA": { } + } + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/platform_wait b/device/mellanox/x86_64-nvidia_sn4280-r0/platform_wait new file mode 120000 index 000000000000..4b30bd429854 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/platform_wait @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/platform_wait \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/eeprom.py b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/eeprom.py new file mode 120000 index 000000000000..b4e2a6a61671 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/eeprom.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/eeprom.py \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/psuutil.py b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/psuutil.py new file mode 120000 index 000000000000..9f724238a8d5 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/psuutil.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/psuutil.py \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfplpmget.py b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfplpmget.py new file mode 120000 index 000000000000..2e84f435abd9 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfplpmget.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfplpmset.py b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfplpmset.py new file mode 120000 index 000000000000..6a88bac30467 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfplpmset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfpreset.py b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfpreset.py new file mode 120000 index 000000000000..fef2063e3496 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfpreset.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfpreset.py \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfputil.py b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfputil.py new file mode 120000 index 000000000000..45909b880fc9 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfputil.py @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/plugins/sfputil.py \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4280-r0/pmon_daemon_control.json new file mode 120000 index 000000000000..435a2ce7c0ba --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/pmon_immediate_start b/device/mellanox/x86_64-nvidia_sn4280-r0/pmon_immediate_start new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/pre_reboot_hook b/device/mellanox/x86_64-nvidia_sn4280-r0/pre_reboot_hook new file mode 120000 index 000000000000..6fc31078ee86 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/pre_reboot_hook @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/pre_reboot_hook \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf new file mode 100644 index 000000000000..111e469675d3 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf @@ -0,0 +1,565 @@ +########################################################################### +# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# +# Platform specific sensors config for SN4280 +########################################################################### + +# Temperature sensors +bus "i2c-2" "i2c-1-mux (chan_id 1)" + chip "mlxsw-i2c-*-48" + label temp1 "Ambient ASIC Temp" + ignore temp2 + ignore temp3 + ignore temp4 + ignore temp5 + ignore temp6 + ignore temp7 + ignore temp8 + ignore temp9 + ignore temp10 + ignore temp11 + ignore temp12 + ignore temp13 + ignore temp14 + ignore temp15 + ignore temp16 + ignore temp17 + ignore temp18 + ignore temp19 + ignore temp20 + ignore temp21 + ignore temp22 + ignore temp23 + ignore temp24 + ignore temp25 + ignore temp26 + ignore temp27 + ignore temp28 + ignore temp29 + +bus "i2c-7" "i2c-1-mux (chan_id 6)" + chip "tmp102-i2c-*-49" + label temp1 "Ambient Fan Side Temp (air intake)" + chip "adt75-i2c-*-49" + label temp1 "Ambient Fan Side Temp (air intake)" + chip "stts751-i2c-*-49" + label temp1 "Ambient Fan Side Temp (air intake)" + chip "tmp102-i2c-*-4a" + label temp1 "Ambient Port Side Temp (air exhaust)" + chip "adt75-i2c-*-4a" + label temp1 "Ambient Port Side Temp (air exhaust)" + +# Power controllers +bus "i2c-5" "i2c-1-mux (chan_id 4)" + chip "xdpe12284-i2c-*-62" + label in1 "PMIC-1 12V ASIC VDD_M (in1)" + ignore in2 + label in3 "PMIC-1 ASIC VCORE_MAIN Rail (out1)" + ignore in4 + label temp1 "PMIC-1 ASIC VCORE_MAIN Temp 1" + ignore temp2 + label power1 "PMIC-1 12V ASIC VCORE_MAIN Rail Pwr (in)" + ignore power2 + label power3 "PMIC-1 ASIC VCORE_MAIN Rail Pwr (out1)" + ignore power4 + label curr1 "PMIC-1 12V ASIC VCORE_MAIN Rail Curr (in1)" + ignore curr2 + label curr3 "PMIC-1 ASIC VCORE_MAIN Rail Curr (out1)" + ignore curr4 + chip "mp2975-i2c-*-62" + label in1 "PMIC-1 12V ASIC VDD_M (in)" + label in2 "PMIC-1 ASIC VCORE_MAIN Rail (out)" + ignore in3 + ignore in4 + label temp1 "PMIC-1 ASIC VCORE_MAIN Temp 1" + ignore temp2 + label power1 "PMIC-1 12V ASIC VCORE_MAIN Rail Pwr (in)" + label power2 "PMIC-1 ASIC VCORE_MAIN Rail Pwr (out)" + ignore power3 + ignore power4 + label curr1 "PMIC-1 12V ASIC VCORE_MAIN Rail Curr (in)" + label curr2 "PMIC-1 ASIC VCORE_MAIN Rail Curr (out)" + ignore curr3 + ignore curr4 + + chip "xdpe12284-i2c-*-64" + label in1 "PMIC-2 12V ASIC VDDI_M VDDHS_M (in1)" + label in2 "PMIC-2 12V ASIC VDDI_M VDDHS_M (in2)" + label in3 "PMIC-2 ASIC 1.8V_MAIN Rail (out1)" + label in4 "PMIC-2 ASIC 1.2V_MAIN Rail (out2)" + label temp1 "PMIC-2 ASIC 1.8V_MAIN Temp 1" + label temp2 "PMIC-2 ASIC 1.2V_MAIN Temp 2" + label power1 "PMIC-2 12V ASIC 1.8V_1.2V_MAIN Rail Pwr (in)" + ignore power2 + label power3 "PMIC-2 ASIC 1.8V_MAIN Rail Pwr (out1)" + label power4 "PMIC-2 ASIC 1.2V_MAIN Rail Pwr (out2)" + label curr1 "PMIC-2 12V ASIC 1.8V_MAIN Rail Curr (in1)" + label curr2 "PMIC-2 12V ASIC 1.2V_MAIN Rail Curr (in2)" + label curr3 "PMIC-2 ASIC 1.8V_MAIN Rail Curr (out1)" + label curr4 "PMIC-2 ASIC 1.2V_MAIN Rail Curr (out2)" + chip "mp2975-i2c-*-64" + label in1 "PMIC-2 12V ASIC VDDI_M VDDHS_M (in)" + label in2 "PMIC-2 ASIC 1.8V_MAIN Rail (out1)" + label in3 "PMIC-2 ASIC 1.2V_MAIN Rail (out2)" + ignore in4 + label temp1 "PMIC-2 ASIC 1.8V_1.2V_MAIN Temp 1" + ignore temp2 + label power1 "PMIC-2 12V ASIC 1.8V_1.2V_MAIN Rail Pwr (in)" + label power2 "PMIC-2 ASIC 1.8V_MAIN Rail Pwr (out1)" + label power3 "PMIC-2 ASIC 1.2V_MAIN Rail Pwr (out2)" + ignore power4 + label curr1 "PMIC-2 12V ASIC 1.8V_1.2V_MAIN Rail Curr (in)" + label curr2 "PMIC-2 ASIC 1.8V_MAIN Rail Curr (out1)" + label curr3 "PMIC-2 ASIC 1.2V_MAIN Rail Curr (out2)" + ignore curr4 + + chip "xdpe12284-i2c-*-66" + label in1 "PMIC-3 12V ASIC VDD_T0_T3 VDDI_T0_T3 (in1)" + label in2 "PMIC-3 12V ASIC VDD_T0_T3 VDDI_T0_T3 (in2)" + label in3 "PMIC-3 ASIC VCORE_T0_1 Rail (out1)" + label in4 "PMIC-3 ASIC 1.8V_T0_1 Rail (out2)" + label temp1 "PMIC-3 ASIC VCORE_T0_1 Temp 1" + label temp2 "PMIC-3 ASIC 1.8V_T0_1 Temp 2" + label power1 "PMIC-3 12V ASIC VCORE_1.8V_T0_1 Rail Pwr (in) " + ignore power2 + label power3 "PMIC-3 ASIC VCORE_T0_1 Rail Pwr (out1)" + label power4 "PMIC-3 ASIC 1.8V_T0_1 Rail Pwr (out2)" + label curr1 "PMIC-3 12V ASIC VCORE_T0_1 Rail Curr (in1)" + label curr2 "PMIC-3 12V ASIC 1.8V_T0_1 Rail Curr (in2)" + label curr3 "PMIC-3 ASIC VCORE_T0_1 Rail Curr (out1)" + label curr4 "PMIC-3 ASIC 1.8V_T0_1 Rail Curr (out2)" + chip "mp2975-i2c-*-66" + label in1 "PMIC-3 12V ASIC VDD_T0_T3 VDDI_T0_T3 (in)" + label in2 "PMIC-3 ASIC VCORE_T0_3 Rail (out1)" + label in3 "PMIC-3 ASIC 1.8V_T0_3 Rail (out2)" + ignore in4 + label temp1 "PMIC-3 ASIC VCORE_1.8V_T0_3 Temp 1" + ignore temp2 + label power1 "PMIC-3 12V ASIC VCORE_1.8V_T0_3 Rail Pwr (in) " + label power2 "PMIC-3 ASIC VCORE_T0_3 Rail Pwr (out1)" + label power3 "PMIC-3 ASIC 1.8V_T0_3 Rail Pwr (out2)" + ignore power4 + label curr1 "PMIC-3 12V ASIC VCORE_1.8V_T0_3 Rail Curr (in)" + label curr2 "PMIC-3 ASIC VCORE_T0_3 Rail Curr (out1)" + label curr3 "PMIC-3 ASIC 1.8V_T0_3 Rail Curr (out2)" + ignore curr4 + + chip "xdpe12284-i2c-*-6a" + label in1 "PMIC-4 12V ASIC VDD_T4_T7 VDDI_T4_T7 (in1)" + label in2 "PMIC-4 12V ASIC VDD_T4_T7 VDDI_T4_T7 (in2)" + label in3 "PMIC-4 ASIC VCORE_T2_3 Rail (out1)" + label in4 "PMIC-4 ASIC 1.8V_T2_3 Rail (out2)" + label temp1 "PMIC-4 ASIC VCORE_T2_3 Temp 1" + label temp2 "PMIC-4 ASIC 1.8V_T2_3 Temp 2" + label power1 "PMIC-4 12V ASIC VCORE_1.8V_T2_3 Rail Pwr (in) " + ignore power2 + label power3 "PMIC-4 ASIC VCORE_T2_3 Rail Pwr (out1)" + label power4 "PMIC-4 ASIC 1.8V_T2_3 Rail Pwr (out2)" + label curr1 "PMIC-4 12V ASIC VCORE_T2_3 Rail Curr (in1)" + label curr2 "PMIC-4 12V ASIC 1.8V_T2_3 Rail Curr (in2)" + label curr3 "PMIC-4 ASIC VCORE_T2_3 Rail Curr (out1)" + label curr4 "PMIC-4 ASIC 1.8V_T2_3 Rail Curr (out2)" + chip "mp2975-i2c-*-6a" + label in1 "PMIC-4 12V ASIC VDD_T4_T7 VDDI_T4_T7 (in1)" + label in2 "PMIC-4 12V ASIC VDD_T4_T7 VDDI_T4_T7 (in2)" + label in3 "PMIC-4 ASIC VCORE_T2_3 Rail (out1)" + label in4 "PMIC-4 ASIC 1.8V_T2_3 Rail (out2)" + label temp1 "PMIC-4 ASIC VCORE_T2_3 Temp 1" + label temp2 "PMIC-4 ASIC 1.8V_T2_3 Temp 2" + label power1 "PMIC-4 12V ASIC VCORE_1.8V_T2_3 Rail Pwr (in) " + ignore power2 + label power3 "PMIC-4 ASIC VCORE_T2_3 Rail Pwr (out1)" + label power4 "PMIC-4 ASIC 1.8V_T2_3 Rail Pwr (out2)" + label curr1 "PMIC-4 12V ASIC VCORE_T2_3 Rail Curr (in1)" + label curr2 "PMIC-4 12V ASIC 1.8V_T2_3 Rail Curr (in2)" + label curr3 "PMIC-4 ASIC VCORE_T2_3 Rail Curr (out1)" + label curr4 "PMIC-4 ASIC 1.8V_T2_3 Rail Curr (out2)" + + chip "xdpe12284-i2c-*-6e" + label in1 "PMIC-5 12V ASIC VDDHS_T0_T3 VDDHS_T4_T7 (in1)" + label in2 "PMIC-5 12V ASIC VDDHS_T0_T3 VDDHS_T4_T7 (in2)" + label in3 "PMIC-5 ASIC 1.2V_T0_3 Rail (out1)" + label in4 "PMIC-5 ASIC 1.2V_T4_7 Rail (out2)" + label temp1 "PMIC-5 ASIC 1.2V_T0_3 Temp 1" + label temp2 "PMIC-5 ASIC 1.2V_T4_7 Temp 2" + label power1 "PMIC-5 12V ASIC 1.2V_T0_3_T4_7 Rail Pwr (in) " + ignore power2 + label power3 "PMIC-5 ASIC 1.2V_T0_3 Rail Pwr (out1)" + label power4 "PMIC-5 ASIC 1.2V_T4_7 Rail Pwr (out2)" + label curr1 "PMIC-5 12V ASIC 1.2V_T0_3 Rail Curr (in1)" + label curr2 "PMIC-5 12V ASIC 1.2V_T4_7 Rail Curr (in2)" + label curr3 "PMIC-5 ASIC 1.2V_T0_3 Rail Curr (out1)" + label curr4 "PMIC-5 ASIC 1.2V_T4_7 Rail Curr (out2)" + chip "mp2975-i2c-*-6e" + label in1 "PMIC-5 12V ASIC VDDHS_T0_T3 VDDHS_T4_T7 (in)" + label in2 "PMIC-5 12V ASIC VDDHS_T0_T3 VDDHS_T4_T7 Rail (out1)" + label in3 "PMIC-5 ASIC 1.2V_T4_7 Rail (out2)" + ignore in4 + label temp1 "PMIC-5 ASIC 1.2V_T0_3_T4_7 Temp 1" + ignore temp2 + label power1 "PMIC-5 12V ASIC 1.2V_T0_3_T4_7 Rail Pwr (in)" + label power2 "PMIC-5 ASIC 1.2V_T0_3 Rail Pwr (out1)" + label power3 "PMIC-5 ASIC 1.2V_T4_7 Rail Pwr (out2)" + ignore power4 + label curr1 "PMIC-5 12V ASIC 1.2V_T0_3_T4_7 Rail Curr (in)" + label curr2 "PMIC-5 ASIC 1.2V_T0_3 Rail Curr (out1)" + label curr3 "PMIC-5 ASIC 1.2V_T4_7 Rail Curr (out2)" + ignore curr4 + +# DPU 1 +bus "i2c-18" "i2c-1-mux (chan_id 17)" + chip "xdpe12284-i2c-18-69" + label in1 "PMIC-6 12V DPU1 VDD VDDQ_DDR (in1)" + label in2 "PMIC-6 DPU1 VDD (out1)" + label in3 "PMIC-6 DPU1 VDD_DDR (out2)" + ignore in4 + label temp1 "PMIC-6 DPU1 VDD VDD_DDR Temp 1" + ignore temp2 + label power1 "PMIC-6 12V DPU1 VDD VDDQ_DDR (in)" + label power2 "PMIC-6 DPU1 VDD Rail Pwr (out1)" + label power3 "PMIC-6 DPU1 VDD_DDR Rail Pwr (out1)" + ignore power4 + label curr1 "PMIC-6 12V DPU1 VDD VDDQ_DDR Rail Curr (in1)" + label curr2 "PMIC-6 DPU1 VDD Rail Curr (in1)" + label curr3 "PMIC-6 DPU1 VDD_DDR Rail Curr (out1)" + ignore curr4 + chip "mp2975-i2c-18-69" + label in1 "PMIC-6 12V DPU1 VDD VDDQ_DDR (in1)" + label in2 "PMIC-6 DPU1 VDD (out1)" + label in3 "PMIC-6 DPU1 VDD_DDR (out2)" + ignore in4 + label temp1 "PMIC-6 DPU1 VDD VDD_DDR Temp 1" + ignore temp2 + label power1 "PMIC-6 12V DPU1 VDD VDDQ_DDR (in)" + label power2 "PMIC-6 DPU1 VDD Rail Pwr (out1)" + label power3 "PMIC-6 DPU1 VDD_DDR Rail Pwr (out1)" + ignore power4 + label curr1 "PMIC-6 12V DPU1 VDD VDDQ_DDR Rail Curr (in1)" + label curr2 "PMIC-6 DPU1 VDD Rail Curr (in1)" + label curr3 "PMIC-6 DPU1 VDD_DDR Rail Curr (out1)" + ignore curr4 + + chip "xdpe12284-i2c-18-6A" + label in1 "PMIC-7 12V DPU1 VDD_CPU (in1)" + label in2 "PMIC-7 DPU1 VDD_CPU (out)" + ignore in3 + ignore in4 + label temp1 "PMIC-7 DPU1 VDD_CPU Temp 1" + ignore temp2 + label power1 "PMIC-7 12V DPU1 VDD_CPU (in)" + label power2 "PMIC-7 DPU1 VDD_CPU Rail Pwr (out)" + ignore power3 + ignore power4 + label curr1 "PMIC-7 12V DPU1 VDD_CPU Rail Curr (in)" + label curr2 "PMIC-7 DPU1 VDD_CPU Rail Curr (out)" + ignore curr3 + ignore curr4 + chip "mp2975-i2c-18-6A" + label in1 "PMIC-7 12V DPU1 VDD_CPU (in1)" + label in2 "PMIC-7 DPU1 VDD_CPU (out)" + ignore in3 + ignore in4 + label temp1 "PMIC-7 DPU1 VDD_CPU Temp 1" + ignore temp2 + label power1 "PMIC-7 12V DPU1 VDD_CPU (in)" + label power2 "PMIC-7 DPU1 VDD_CPU Rail Pwr (out)" + ignore power3 + ignore power4 + label curr1 "PMIC-7 12V DPU1 VDD_CPU Rail Curr (in)" + label curr2 "PMIC-7 DPU1 VDD_CPU Rail Curr (out)" + ignore curr3 + ignore curr4 + + chip "tmp421-i2c-18-1F" + label temp1 "Ambient DPU1 Side (air exhaust)" + +# DPU 2 +bus "i2c-19" "i2c-1-mux (chan_id 18)" + chip "xdpe12284-i2c-19-69" + label in1 "PMIC-8 12V DPU2 VDD VDDQ_DDR (in1)" + label in2 "PMIC-8 DPU2 VDD (out1)" + label in3 "PMIC-8 DPU2 VDD_DDR (out2)" + ignore in4 + label temp1 "PMIC-8 DPU2 VDD VDD_DDR Temp 1" + ignore temp2 + label power1 "PMIC-8 12V DPU2 VDD VDDQ_DDR (in)" + label power2 "PMIC-8 DPU2 VDD Rail Pwr (out1)" + label power3 "PMIC-8 DPU2 VDD_DDR Rail Pwr (out1)" + ignore power4 + label curr1 "PMIC-8 12V DPU2 VDD VDDQ_DDR Rail Curr (in1)" + label curr2 "PMIC-8 DPU2 VDD Rail Curr (in1)" + label curr3 "PMIC-8 DPU2 VDD_DDR Rail Curr (out1)" + ignore curr4 + chip "mp2975-i2c-19-69" + label in1 "PMIC-8 12V DPU2 VDD VDDQ_DDR (in1)" + label in2 "PMIC-8 DPU2 VDD (out1)" + label in3 "PMIC-8 DPU2 VDD_DDR (out2)" + ignore in4 + label temp1 "PMIC-8 DPU2 VDD VDD_DDR Temp 1" + ignore temp2 + label power1 "PMIC-8 12V DPU2 VDD VDDQ_DDR (in)" + label power2 "PMIC-8 DPU2 VDD Rail Pwr (out1)" + label power3 "PMIC-8 DPU2 VDD_DDR Rail Pwr (out1)" + ignore power4 + label curr1 "PMIC-8 12V DPU2 VDD VDDQ_DDR Rail Curr (in1)" + label curr2 "PMIC-8 DPU2 VDD Rail Curr (in1)" + label curr3 "PMIC-8 DPU2 VDD_DDR Rail Curr (out1)" + ignore curr4 + chip "xdpe12284-i2c-19-6A" + label in1 "PMIC-9 12V DPU2 VDD_CPU (in1)" + label in2 "PMIC-9 DPU2 VDD_CPU (out)" + ignore in3 + ignore in4 + label temp1 "PMIC-9 DPU2 VDD_CPU Temp 1" + ignore temp2 + label power1 "PMIC-9 12V DPU2 VDD_CPU (in)" + label power2 "PMIC-9 DPU2 VDD_CPU Rail Pwr (out)" + ignore power3 + ignore power4 + label curr1 "PMIC-9 12V DPU2 VDD_CPU Rail Curr (in)" + label curr2 "PMIC-9 DPU2 VDD_CPU Rail Curr (out)" + ignore curr3 + ignore curr4 + chip "mp2975-i2c-19-6A" + label in1 "PMIC-9 12V DPU2 VDD_CPU (in1)" + label in2 "PMIC-9 DPU2 VDD_CPU (out)" + ignore in3 + ignore in4 + label temp1 "PMIC-9 DPU2 VDD_CPU Temp 1" + ignore temp2 + label power1 "PMIC-9 12V DPU2 VDD_CPU (in)" + label power2 "PMIC-9 DPU2 VDD_CPU Rail Pwr (out)" + ignore power3 + ignore power4 + label curr1 "PMIC-9 12V DPU2 VDD_CPU Rail Curr (in)" + label curr2 "PMIC-9 DPU2 VDD_CPU Rail Curr (out)" + ignore curr3 + ignore curr4 + + chip "tmp421-i2c-19-1F" + label temp1 "Ambient DPU2 Side (air exhaust)" + + +# DPU 3 +bus "i2c-20" "i2c-1-mux (chan_id 19)" + chip "xdpe12284-i2c-20-69" + label in1 "PMIC-10 12V DPU3 VDD VDDQ_DDR (in1)" + label in2 "PMIC-10 DPU3 VDD (out1)" + label in3 "PMIC-10 DPU3 VDD_DDR (out2)" + ignore in4 + label temp1 "PMIC-10 DPU3 VDD VDD_DDR Temp 1" + ignore temp2 + label power1 "PMIC-10 12V DPU3 VDD VDDQ_DDR (in)" + label power2 "PMIC-10 DPU3 VDD Rail Pwr (out1)" + label power3 "PMIC-10 DPU3 VDD_DDR Rail Pwr (out1)" + ignore power4 + label curr1 "PMIC-10 12V DPU3 VDD VDDQ_DDR Rail Curr (in1)" + label curr2 "PMIC-10 DPU3 VDD Rail Curr (in1)" + label curr3 "PMIC-10 DPU3 VDD_DDR Rail Curr (out1)" + ignore curr4 + chip "mp2975-i2c-20-69" + label in1 "PMIC-10 12V DPU3 VDD VDDQ_DDR (in1)" + label in2 "PMIC-10 DPU3 VDD (out1)" + label in3 "PMIC-10 DPU3 VDD_DDR (out2)" + ignore in4 + label temp1 "PMIC-10 DPU3 VDD VDD_DDR Temp 1" + ignore temp2 + label power1 "PMIC-10 12V DPU3 VDD VDDQ_DDR (in)" + label power2 "PMIC-10 DPU3 VDD Rail Pwr (out1)" + label power3 "PMIC-10 DPU3 VDD_DDR Rail Pwr (out1)" + ignore power4 + label curr1 "PMIC-10 12V DPU3 VDD VDDQ_DDR Rail Curr (in1)" + label curr2 "PMIC-10 DPU3 VDD Rail Curr (in1)" + label curr3 "PMIC-10 DPU3 VDD_DDR Rail Curr (out1)" + ignore curr4 + chip "xdpe12284-i2c-20-6A" + label in1 "PMIC-11 12V DPU3 VDD_CPU (in1)" + label in2 "PMIC-11 DPU3 VDD_CPU (out)" + ignore in3 + ignore in4 + label temp1 "PMIC-11 DPU3 VDD_CPU Temp 1" + ignore temp2 + label power1 "PMIC-11 12V DPU3 VDD_CPU (in)" + label power2 "PMIC-11 DPU3 VDD_CPU Rail Pwr (out)" + ignore power3 + ignore power4 + label curr1 "PMIC-11 12V DPU3 VDD_CPU Rail Curr (in)" + label curr2 "PMIC-11 DPU3 VDD_CPU Rail Curr (out)" + ignore curr3 + ignore curr4 + chip "mp2975-i2c-20-6A" + label in1 "PMIC-11 12V DPU3 VDD_CPU (in1)" + label in2 "PMIC-11 DPU3 VDD_CPU (out)" + ignore in3 + ignore in4 + label temp1 "PMIC-11 DPU3 VDD_CPU Temp 1" + ignore temp2 + label power1 "PMIC-11 12V DPU3 VDD_CPU (in)" + label power2 "PMIC-11 DPU3 VDD_CPU Rail Pwr (out)" + ignore power3 + ignore power4 + label curr1 "PMIC-11 12V DPU3 VDD_CPU Rail Curr (in)" + label curr2 "PMIC-11 DPU3 VDD_CPU Rail Curr (out)" + ignore curr3 + ignore curr4 + + chip "tmp421-i2c-20-1F" + label temp1 "Ambient DPU3 Side (air exhaust)" + + +# DPU 4 +bus "i2c-21" "i2c-1-mux (chan_id 20)" + chip "xdpe12284-i2c-21-69" + label in1 "PMIC-12 12V DPU4 VDD VDDQ_DDR (in1)" + label in2 "PMIC-12 DPU4 VDD (out1)" + label in3 "PMIC-12 DPU4 VDD_DDR (out2)" + ignore in4 + label temp1 "PMIC-12 DPU4 VDD VDD_DDR Temp 1" + ignore temp2 + label power1 "PMIC-12 12V DPU3 VDD VDDQ_DDR (in)" + label power2 "PMIC-12 DPU4 VDD Rail Pwr (out1)" + label power3 "PMIC-12 DPU4 VDD_DDR Rail Pwr (out1)" + ignore power4 + label curr1 "PMIC-12 12V DPU4 VDD VDDQ_DDR Rail Curr (in1)" + label curr2 "PMIC-12 DPU4 VDD Rail Curr (in1)" + label curr3 "PMIC-12 DPU4 VDD_DDR Rail Curr (out1)" + ignore curr4 + chip "mp2975-i2c-21-69" + label in1 "PMIC-12 12V DPU4 VDD VDDQ_DDR (in1)" + label in2 "PMIC-12 DPU4 VDD (out1)" + label in3 "PMIC-12 DPU4 VDD_DDR (out2)" + ignore in4 + label temp1 "PMIC-12 DPU4 VDD VDD_DDR Temp 1" + ignore temp2 + label power1 "PMIC-12 12V DPU3 VDD VDDQ_DDR (in)" + label power2 "PMIC-12 DPU4 VDD Rail Pwr (out1)" + label power3 "PMIC-12 DPU4 VDD_DDR Rail Pwr (out1)" + ignore power4 + label curr1 "PMIC-12 12V DPU4 VDD VDDQ_DDR Rail Curr (in1)" + label curr2 "PMIC-12 DPU4 VDD Rail Curr (in1)" + label curr3 "PMIC-12 DPU4 VDD_DDR Rail Curr (out1)" + ignore curr4 + chip "xdpe12284-i2c-21-6A" + label in1 "PMIC-13 12V DPU4 VDD_CPU (in1)" + label in2 "PMIC-13 DPU4 VDD_CPU (out)" + ignore in3 + ignore in4 + label temp1 "PMIC-13 DPU4 VDD_CPU Temp 1" + ignore temp2 + label power1 "PMIC-13 12V DPU4 VDD_CPU (in)" + label power2 "PMIC-13 DPU4 VDD_CPU Rail Pwr (out)" + ignore power3 + ignore power4 + label curr1 "PMIC-13 12V DPU4 VDD_CPU Rail Curr (in)" + label curr2 "PMIC-13 DPU4 VDD_CPU Rail Curr (out)" + ignore curr3 + ignore curr4 + chip "mp2975-i2c-21-6A" + label in1 "PMIC-13 12V DPU4 VDD_CPU (in1)" + label in2 "PMIC-13 DPU4 VDD_CPU (out)" + ignore in3 + ignore in4 + label temp1 "PMIC-13 DPU4 VDD_CPU Temp 1" + ignore temp2 + label power1 "PMIC-13 12V DPU4 VDD_CPU (in)" + label power2 "PMIC-13 DPU4 VDD_CPU Rail Pwr (out)" + ignore power3 + ignore power4 + label curr1 "PMIC-13 12V DPU4 VDD_CPU Rail Curr (in)" + label curr2 "PMIC-13 DPU4 VDD_CPU Rail Curr (out)" + ignore curr3 + ignore curr4 + + chip "tmp421-i2c-21-1F" + label temp1 "Ambient DPU4 Side (air exhaust)" + +# Power supplies +bus "i2c-4" "i2c-1-mux (chan_id 3)" + chip "dps460-i2c-*-58" + label in1 "PSU-2(R) 220V Rail (in)" + ignore in2 + label in3 "PSU-2(R) 12V Rail (out)" + label fan1 "PSU-2(R) Fan 1" + ignore fan2 + ignore fan3 + label temp1 "PSU-2(R) Temp 1" + label temp2 "PSU-2(R) Temp 2" + label temp3 "PSU-2(R) Temp 3" + label power1 "PSU-2(R) 220V Rail Pwr (in)" + label power2 "PSU-2(R) 12V Rail Pwr (out)" + label curr1 "PSU-2(R) 220V Rail Curr (in)" + label curr2 "PSU-2(R) 12V Rail Curr (out)" + chip "dps460-i2c-*-59" + label in1 "PSU-1(L) 220V Rail (in)" + ignore in2 + label in3 "PSU-1(L) 12V Rail (out)" + label fan1 "PSU-1(L) Fan 1" + ignore fan2 + ignore fan3 + label temp1 "PSU-1(L) Temp 1" + label temp2 "PSU-1(L) Temp 2" + label temp3 "PSU-1(L) Temp 3" + label power1 "PSU-1(L) 220V Rail Pwr (in)" + label power2 "PSU-1(L) 12V Rail Pwr (out)" + label curr1 "PSU-1(L) 220V Rail Curr (in)" + label curr2 "PSU-1(L) 12V Rail Curr (out)" + +# Chassis fans +chip "mlxreg_fan-isa-*" + label fan1 "Chassis Fan Drawer-1 Tach 1" + label fan2 "Chassis Fan Drawer-2 Tach 1" + label fan3 "Chassis Fan Drawer-3 Tach 1" + label fan4 "Chassis Fan Drawer-4 Tach 1" + + +# Miscellaneous +chip "*-virtual-*" + ignore temp1 + +# AMD Comex + +bus "i2c-39" "i2c-1-mux (chan_id 6)" +chip "mp2855-i2c-39-69" + label in1 "PMIC-14 COMEX VDDCR INPUT VOLT (in1)" + label in2 "PMIC-14 COMEX VDDCR_CPU VOLT (out1)" + label in3 "PMIC-14 COMEX VDDCR_SOC VOLT (out2)" + label temp1 "PMIC-14 COMEX VDDCR_CPU PHASE TEMP" + label temp2 "PMIC-14 COMEX VDDCR_SOC PHASE TEMP" + label curr1 "PMIC-14 COMEX VDDCR_CPU CURR" + label curr2 "PMIC-14 COMEX VDDCR_SOC CURR" + +chip "mp2975-i2c-39-6a" + label in1 "PMIC-15 COMEX VDD_MEM INPUT VOLT" + label in2 "PMIC-15 COMEX VDD_MEM OUTPUT VOLT" + label temp1 "PMIC-15 COMEX VDD_MEM PHASE TEMP" + label curr1 "PMIC-15 COMEX VDD_MEM INPUT CURR" + label curr2 "PMIC-15 COMEX VDD_MEM OUTPUT CURR" + ignore curr1 + ignore curr2 + label power1 "PMIC-15 COMEX VDD_MEM INPUT POWER" + label power2 "PMIC-15 COMEX VDD_MEM OUTPUT POWER" + +bus "i2c-43" "Synopsys DesignWare I2C adapter" +chip "jc42-i2c-43-1a" + label temp1 "SODIMM1 Temp" + +chip "jc42-i2c-43-1b" + label temp1 "SODIMM2 Temp" + +chip "jc42-i2c-43-1e" + label temp1 "SODIMM3 Temp" + +chip "jc42-i2c-43-1f" + label temp1 "SODIMM4 Temp" + +chip "k10temp-pci-*" + label temp1 "CPU PACKAGE TEMP" + label temp2 "CPU DIE0 TEMP" + +chip "nvme-pci-*" + label temp1 "SSD Temp" + ignore temp2 + ignore temp3 + +chip "00000400400-mdio-*" + label temp1 "PHY TEMP" \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf new file mode 100644 index 000000000000..7621d96e72ac --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf @@ -0,0 +1 @@ +rshim-manager.service diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn4280-r0/system_health_monitoring_config.json new file mode 120000 index 000000000000..98df66c27ca5 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/system_health_monitoring_config.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/thermal_policy.json b/device/mellanox/x86_64-nvidia_sn4280-r0/thermal_policy.json new file mode 120000 index 000000000000..5a25cd87f70c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/thermal_policy.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/thermal_policy.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/create_only_config_db_buffers.json new file mode 100644 index 000000000000..6feb156714fe --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/create_only_config_db_buffers.json @@ -0,0 +1,7 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "create_only_config_db_buffers": "true" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf index d43a240ee0ad..cdaaf72f616f 100644 --- a/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf +++ b/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf @@ -1 +1 @@ -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=tpm_tis,tpm_crb,tpm" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tpm_tis.interrupts=0" diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json index f4f9ed17d60e..b2c0264ba142 100644 --- a/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json @@ -681,8 +681,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp1"], "2x200G[100G,50G,40G,25G,10G]": ["etp1a", "etp1b"], - "4x100G[50G,25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d"], - "8x50G[25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e", "etp1f", "etp1g", "etp1h"] + "4x100G[50G,25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d"] } }, "Ethernet8": { @@ -691,8 +690,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp2"], "2x200G[100G,50G,40G,25G,10G]": ["etp2a", "etp2b"], - "4x100G[50G,25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d"], - "8x50G[25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d", "etp2e", "etp2f", "etp2g", "etp2h"] + "4x100G[50G,25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d"] } }, "Ethernet16": { @@ -701,8 +699,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp3"], "2x200G[100G,50G,40G,25G,10G]": ["etp3a", "etp3b"], - "4x100G[50G,25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d"], - "8x50G[25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d", "etp3e", "etp3f", "etp3g", "etp3h"] + "4x100G[50G,25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d"] } }, "Ethernet24": { @@ -711,8 +708,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp4"], "2x200G[100G,50G,40G,25G,10G]": ["etp4a", "etp4b"], - "4x100G[50G,25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d"], - "8x50G[25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d", "etp4e", "etp4f", "etp4g", "etp4h"] + "4x100G[50G,25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d"] } }, "Ethernet32": { @@ -721,8 +717,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp5"], "2x200G[100G,50G,40G,25G,10G]": ["etp5a", "etp5b"], - "4x100G[50G,25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d"], - "8x50G[25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d", "etp5e", "etp5f", "etp5g", "etp5h"] + "4x100G[50G,25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d"] } }, "Ethernet40": { @@ -731,8 +726,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp6"], "2x200G[100G,50G,40G,25G,10G]": ["etp6a", "etp6b"], - "4x100G[50G,25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d"], - "8x50G[25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d", "etp6e", "etp6f", "etp6g", "etp6h"] + "4x100G[50G,25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d"] } }, "Ethernet48": { @@ -741,8 +735,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp7"], "2x200G[100G,50G,40G,25G,10G]": ["etp7a", "etp7b"], - "4x100G[50G,25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d"], - "8x50G[25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d", "etp7e", "etp7f", "etp7g", "etp7h"] + "4x100G[50G,25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d"] } }, "Ethernet56": { @@ -751,8 +744,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp8"], "2x200G[100G,50G,40G,25G,10G]": ["etp8a", "etp8b"], - "4x100G[50G,25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d"], - "8x50G[25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d", "etp8e", "etp8f", "etp8g", "etp8h"] + "4x100G[50G,25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d"] } }, "Ethernet64": { @@ -761,8 +753,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp9"], "2x200G[100G,50G,40G,25G,10G]": ["etp9a", "etp9b"], - "4x100G[50G,25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d"], - "8x50G[25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d", "etp9e", "etp9f", "etp9g", "etp9h"] + "4x100G[50G,25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d"] } }, "Ethernet72": { @@ -771,8 +762,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp10"], "2x200G[100G,50G,40G,25G,10G]": ["etp10a", "etp10b"], - "4x100G[50G,25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d"], - "8x50G[25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d", "etp10e", "etp10f", "etp10g", "etp10h"] + "4x100G[50G,25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d"] } }, "Ethernet80": { @@ -781,8 +771,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp11"], "2x200G[100G,50G,40G,25G,10G]": ["etp11a", "etp11b"], - "4x100G[50G,25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d"], - "8x50G[25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e", "etp11f", "etp11g", "etp11h"] + "4x100G[50G,25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d"] } }, "Ethernet88": { @@ -791,8 +780,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp12"], "2x200G[100G,50G,40G,25G,10G]": ["etp12a", "etp12b"], - "4x100G[50G,25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d"], - "8x50G[25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e", "etp12f", "etp12g", "etp12h"] + "4x100G[50G,25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d"] } }, "Ethernet96": { @@ -801,8 +789,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp13"], "2x200G[100G,50G,40G,25G,10G]": ["etp13a", "etp13b"], - "4x100G[50G,25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d"], - "8x50G[25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d", "etp13e", "etp13f", "etp13g", "etp13h"] + "4x100G[50G,25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d"] } }, "Ethernet104": { @@ -811,8 +798,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp14"], "2x200G[100G,50G,40G,25G,10G]": ["etp14a", "etp14b"], - "4x100G[50G,25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d"], - "8x50G[25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d", "etp14e", "etp14f", "etp14g", "etp14h"] + "4x100G[50G,25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d"] } }, "Ethernet112": { @@ -821,8 +807,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp15"], "2x200G[100G,50G,40G,25G,10G]": ["etp15a", "etp15b"], - "4x100G[50G,25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d"], - "8x50G[25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d", "etp15e", "etp15f", "etp15g", "etp15h"] + "4x100G[50G,25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d"] } }, "Ethernet120": { @@ -831,8 +816,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp16"], "2x200G[100G,50G,40G,25G,10G]": ["etp16a", "etp16b"], - "4x100G[50G,25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d"], - "8x50G[25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d", "etp16e", "etp16f", "etp16g", "etp16h"] + "4x100G[50G,25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d"] } }, "Ethernet128": { @@ -841,8 +825,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp17"], "2x200G[100G,50G,40G,25G,10G]": ["etp17a", "etp17b"], - "4x100G[50G,25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d"], - "8x50G[25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d", "etp17e", "etp17f", "etp17g", "etp17h"] + "4x100G[50G,25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d"] } }, "Ethernet136": { @@ -851,8 +834,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp18"], "2x200G[100G,50G,40G,25G,10G]": ["etp18a", "etp18b"], - "4x100G[50G,25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d"], - "8x50G[25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d", "etp18e", "etp18f", "etp18g", "etp18h"] + "4x100G[50G,25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d"] } }, "Ethernet144": { @@ -861,8 +843,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp19"], "2x200G[100G,50G,40G,25G,10G]": ["etp19a", "etp19b"], - "4x100G[50G,25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d"], - "8x50G[25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d", "etp19e", "etp19f", "etp19g", "etp19h"] + "4x100G[50G,25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d"] } }, "Ethernet152": { @@ -871,8 +852,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp20"], "2x200G[100G,50G,40G,25G,10G]": ["etp20a", "etp20b"], - "4x100G[50G,25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d"], - "8x50G[25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e", "etp20f", "etp20g", "etp20h"] + "4x100G[50G,25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d"] } }, "Ethernet160": { @@ -881,8 +861,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp21"], "2x200G[100G,50G,40G,25G,10G]": ["etp21a", "etp21b"], - "4x100G[50G,25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d"], - "8x50G[25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e", "etp21f", "etp21g", "etp21h"] + "4x100G[50G,25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d"] } }, "Ethernet168": { @@ -891,8 +870,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp22"], "2x200G[100G,50G,40G,25G,10G]": ["etp22a", "etp22b"], - "4x100G[50G,25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d"], - "8x50G[25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d", "etp22e", "etp22f", "etp22g", "etp22h"] + "4x100G[50G,25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d"] } }, "Ethernet176": { @@ -901,8 +879,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp23"], "2x200G[100G,50G,40G,25G,10G]": ["etp23a", "etp23b"], - "4x100G[50G,25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d"], - "8x50G[25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d", "etp23e", "etp23f", "etp23g", "etp23h"] + "4x100G[50G,25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d"] } }, "Ethernet184": { @@ -911,8 +888,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp24"], "2x200G[100G,50G,40G,25G,10G]": ["etp24a", "etp24b"], - "4x100G[50G,25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d"], - "8x50G[25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d", "etp24e", "etp24f", "etp24g", "etp24h"] + "4x100G[50G,25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d"] } }, "Ethernet192": { @@ -921,8 +897,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp25"], "2x200G[100G,50G,40G,25G,10G]": ["etp25a", "etp25b"], - "4x100G[50G,25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d"], - "8x50G[25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d", "etp25e", "etp25f", "etp25g", "etp25h"] + "4x100G[50G,25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d"] } }, "Ethernet200": { @@ -931,8 +906,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp26"], "2x200G[100G,50G,40G,25G,10G]": ["etp26a", "etp26b"], - "4x100G[50G,25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d"], - "8x50G[25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e", "etp26f", "etp26g", "etp26h"] + "4x100G[50G,25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d"] } }, "Ethernet208": { @@ -941,8 +915,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp27"], "2x200G[100G,50G,40G,25G,10G]": ["etp27a", "etp27b"], - "4x100G[50G,25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d"], - "8x50G[25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e", "etp27f", "etp27g", "etp27h"] + "4x100G[50G,25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d"] } }, "Ethernet216": { @@ -951,8 +924,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp28"], "2x200G[100G,50G,40G,25G,10G]": ["etp28a", "etp28b"], - "4x100G[50G,25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d"], - "8x50G[25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e", "etp28f", "etp28g", "etp28h"] + "4x100G[50G,25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d"] } }, "Ethernet224": { @@ -961,8 +933,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp29"], "2x200G[100G,50G,40G,25G,10G]": ["etp29a", "etp29b"], - "4x100G[50G,25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d"], - "8x50G[25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e", "etp29f", "etp29g", "etp29h"] + "4x100G[50G,25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d"] } }, "Ethernet232": { @@ -971,8 +942,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp30"], "2x200G[100G,50G,40G,25G,10G]": ["etp30a", "etp30b"], - "4x100G[50G,25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d"], - "8x50G[25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e", "etp30f", "etp30g", "etp30h"] + "4x100G[50G,25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d"] } }, "Ethernet240": { @@ -981,8 +951,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp31"], "2x200G[100G,50G,40G,25G,10G]": ["etp31a", "etp31b"], - "4x100G[50G,25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d"], - "8x50G[25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e", "etp31f", "etp31g", "etp31h"] + "4x100G[50G,25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d"] } }, "Ethernet248": { @@ -991,8 +960,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp32"], "2x200G[100G,50G,40G,25G,10G]": ["etp32a", "etp32b"], - "4x100G[50G,25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d"], - "8x50G[25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e", "etp32f", "etp32g", "etp32h"] + "4x100G[50G,25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d"] } }, "Ethernet256": { @@ -1001,8 +969,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp33"], "2x200G[100G,50G,40G,25G,10G]": ["etp33a", "etp33b"], - "4x100G[50G,25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d"], - "8x50G[25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e", "etp33f", "etp33g", "etp33h"] + "4x100G[50G,25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d"] } }, "Ethernet264": { @@ -1011,8 +978,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp34"], "2x200G[100G,50G,40G,25G,10G]": ["etp34a", "etp34b"], - "4x100G[50G,25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d"], - "8x50G[25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e", "etp34f", "etp34g", "etp34h"] + "4x100G[50G,25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d"] } }, "Ethernet272": { @@ -1021,8 +987,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp35"], "2x200G[100G,50G,40G,25G,10G]": ["etp35a", "etp35b"], - "4x100G[50G,25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d"], - "8x50G[25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d", "etp35e", "etp35f", "etp35g", "etp35h"] + "4x100G[50G,25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d"] } }, "Ethernet280": { @@ -1031,8 +996,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp36"], "2x200G[100G,50G,40G,25G,10G]": ["etp36a", "etp36b"], - "4x100G[50G,25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d"], - "8x50G[25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d", "etp36e", "etp36f", "etp36g", "etp36h"] + "4x100G[50G,25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d"] } }, "Ethernet288": { @@ -1041,8 +1005,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp37"], "2x200G[100G,50G,40G,25G,10G]": ["etp37a", "etp37b"], - "4x100G[50G,25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d"], - "8x50G[25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e", "etp37f", "etp37g", "etp37h"] + "4x100G[50G,25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d"] } }, "Ethernet296": { @@ -1051,8 +1014,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp38"], "2x200G[100G,50G,40G,25G,10G]": ["etp38a", "etp38b"], - "4x100G[50G,25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d"], - "8x50G[25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e", "etp38f", "etp38g", "etp38h"] + "4x100G[50G,25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d"] } }, "Ethernet304": { @@ -1061,8 +1023,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp39"], "2x200G[100G,50G,40G,25G,10G]": ["etp39a", "etp39b"], - "4x100G[50G,25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d"], - "8x50G[25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e", "etp39f", "etp39g", "etp39h"] + "4x100G[50G,25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d"] } }, "Ethernet312": { @@ -1071,8 +1032,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp40"], "2x200G[100G,50G,40G,25G,10G]": ["etp40a", "etp40b"], - "4x100G[50G,25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d"], - "8x50G[25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e", "etp40f", "etp40g", "etp40h"] + "4x100G[50G,25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d"] } }, "Ethernet320": { @@ -1081,8 +1041,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp41"], "2x200G[100G,50G,40G,25G,10G]": ["etp41a", "etp41b"], - "4x100G[50G,25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d"], - "8x50G[25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d", "etp41e", "etp41f", "etp41g", "etp41h"] + "4x100G[50G,25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d"] } }, "Ethernet328": { @@ -1091,8 +1050,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp42"], "2x200G[100G,50G,40G,25G,10G]": ["etp42a", "etp42b"], - "4x100G[50G,25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d"], - "8x50G[25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d", "etp42e", "etp42f", "etp42g", "etp42h"] + "4x100G[50G,25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d"] } }, "Ethernet336": { @@ -1101,8 +1059,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp43"], "2x200G[100G,50G,40G,25G,10G]": ["etp43a", "etp43b"], - "4x100G[50G,25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d"], - "8x50G[25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e", "etp43f", "etp43g", "etp43h"] + "4x100G[50G,25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d"] } }, "Ethernet344": { @@ -1111,8 +1068,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp44"], "2x200G[100G,50G,40G,25G,10G]": ["etp44a", "etp44b"], - "4x100G[50G,25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d"], - "8x50G[25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e", "etp44f", "etp44g", "etp44h"] + "4x100G[50G,25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d"] } }, "Ethernet352": { @@ -1121,8 +1077,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp45"], "2x200G[100G,50G,40G,25G,10G]": ["etp45a", "etp45b"], - "4x100G[50G,25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d"], - "8x50G[25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e", "etp45f", "etp45g", "etp45h"] + "4x100G[50G,25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d"] } }, "Ethernet360": { @@ -1131,8 +1086,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp46"], "2x200G[100G,50G,40G,25G,10G]": ["etp46a", "etp46b"], - "4x100G[50G,25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d"], - "8x50G[25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e", "etp46f", "etp46g", "etp46h"] + "4x100G[50G,25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d"] } }, "Ethernet368": { @@ -1141,8 +1095,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp47"], "2x200G[100G,50G,40G,25G,10G]": ["etp47a", "etp47b"], - "4x100G[50G,25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d"], - "8x50G[25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d", "etp47e", "etp47f", "etp47g", "etp47h"] + "4x100G[50G,25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d"] } }, "Ethernet376": { @@ -1151,8 +1104,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp48"], "2x200G[100G,50G,40G,25G,10G]": ["etp48a", "etp48b"], - "4x100G[50G,25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d"], - "8x50G[25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e", "etp48f", "etp48g", "etp48h"] + "4x100G[50G,25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d"] } }, "Ethernet384": { @@ -1161,8 +1113,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp49"], "2x200G[100G,50G,40G,25G,10G]": ["etp49a", "etp49b"], - "4x100G[50G,25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d"], - "8x50G[25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e", "etp49f", "etp49g", "etp49h"] + "4x100G[50G,25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d"] } }, "Ethernet392": { @@ -1171,8 +1122,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp50"], "2x200G[100G,50G,40G,25G,10G]": ["etp50a", "etp50b"], - "4x100G[50G,25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d"], - "8x50G[25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e", "etp50f", "etp50g", "etp50h"] + "4x100G[50G,25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d"] } }, "Ethernet400": { @@ -1181,8 +1131,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp51"], "2x200G[100G,50G,40G,25G,10G]": ["etp51a", "etp51b"], - "4x100G[50G,25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d"], - "8x50G[25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e", "etp51f", "etp51g", "etp51h"] + "4x100G[50G,25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d"] } }, "Ethernet408": { @@ -1191,8 +1140,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp52"], "2x200G[100G,50G,40G,25G,10G]": ["etp52a", "etp52b"], - "4x100G[50G,25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d"], - "8x50G[25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e", "etp52f", "etp52g", "etp52h"] + "4x100G[50G,25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d"] } }, "Ethernet416": { @@ -1201,8 +1149,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp53"], "2x200G[100G,50G,40G,25G,10G]": ["etp53a", "etp53b"], - "4x100G[50G,25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d"], - "8x50G[25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e", "etp53f", "etp53g", "etp53h"] + "4x100G[50G,25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d"] } }, "Ethernet424": { @@ -1211,8 +1158,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp54"], "2x200G[100G,50G,40G,25G,10G]": ["etp54a", "etp54b"], - "4x100G[50G,25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d"], - "8x50G[25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e", "etp54f", "etp54g", "etp54h"] + "4x100G[50G,25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d"] } }, "Ethernet432": { @@ -1221,8 +1167,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp55"], "2x200G[100G,50G,40G,25G,10G]": ["etp55a", "etp55b"], - "4x100G[50G,25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d"], - "8x50G[25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e", "etp55f", "etp55g", "etp55h"] + "4x100G[50G,25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d"] } }, "Ethernet440": { @@ -1231,8 +1176,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp56"], "2x200G[100G,50G,40G,25G,10G]": ["etp56a", "etp56b"], - "4x100G[50G,25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d"], - "8x50G[25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e", "etp56f", "etp56g", "etp56h"] + "4x100G[50G,25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d"] } }, "Ethernet448": { @@ -1241,8 +1185,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp57"], "2x200G[100G,50G,40G,25G,10G]": ["etp57a", "etp57b"], - "4x100G[50G,25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d"], - "8x50G[25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e", "etp57f", "etp57g", "etp57h"] + "4x100G[50G,25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d"] } }, "Ethernet456": { @@ -1251,8 +1194,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp58"], "2x200G[100G,50G,40G,25G,10G]": ["etp58a", "etp58b"], - "4x100G[50G,25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d"], - "8x50G[25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e", "etp58f", "etp58g", "etp58h"] + "4x100G[50G,25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d"] } }, "Ethernet464": { @@ -1261,8 +1203,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp59"], "2x200G[100G,50G,40G,25G,10G]": ["etp59a", "etp59b"], - "4x100G[50G,25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d"], - "8x50G[25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e", "etp59f", "etp59g", "etp59h"] + "4x100G[50G,25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d"] } }, "Ethernet472": { @@ -1271,8 +1212,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp60"], "2x200G[100G,50G,40G,25G,10G]": ["etp60a", "etp60b"], - "4x100G[50G,25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d"], - "8x50G[25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e", "etp60f", "etp60g", "etp60h"] + "4x100G[50G,25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d"] } }, "Ethernet480": { @@ -1281,8 +1221,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp61"], "2x200G[100G,50G,40G,25G,10G]": ["etp61a", "etp61b"], - "4x100G[50G,25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d"], - "8x50G[25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d", "etp61e", "etp61f", "etp61g", "etp61h"] + "4x100G[50G,25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d"] } }, "Ethernet488": { @@ -1291,8 +1230,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp62"], "2x200G[100G,50G,40G,25G,10G]": ["etp62a", "etp62b"], - "4x100G[50G,25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d"], - "8x50G[25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e", "etp62f", "etp62g", "etp62h"] + "4x100G[50G,25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d"] } }, "Ethernet496": { @@ -1301,8 +1239,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp63"], "2x200G[100G,50G,40G,25G,10G]": ["etp63a", "etp63b"], - "4x100G[50G,25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d"], - "8x50G[25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e", "etp63f", "etp63g", "etp63h"] + "4x100G[50G,25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d"] } }, "Ethernet504": { @@ -1311,8 +1248,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp64"], "2x200G[100G,50G,40G,25G,10G]": ["etp64a", "etp64b"], - "4x100G[50G,25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d"], - "8x50G[25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e", "etp64f", "etp64g", "etp64h"] + "4x100G[50G,25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d"] } }, "Ethernet512": { diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json index e85c160d0cc2..ff58f12eda70 100644 --- a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json @@ -684,8 +684,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp1"], "2x200G[100G,50G,40G,25G,10G]": ["etp1a", "etp1b"], - "4x100G[50G,25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d"], - "8x50G[25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e", "etp1f", "etp1g", "etp1h"] + "4x100G[50G,25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d"] } }, "Ethernet8": { @@ -694,8 +693,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp2"], "2x200G[100G,50G,40G,25G,10G]": ["etp2a", "etp2b"], - "4x100G[50G,25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d"], - "8x50G[25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d", "etp2e", "etp2f", "etp2g", "etp2h"] + "4x100G[50G,25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d"] } }, "Ethernet16": { @@ -704,8 +702,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp3"], "2x200G[100G,50G,40G,25G,10G]": ["etp3a", "etp3b"], - "4x100G[50G,25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d"], - "8x50G[25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d", "etp3e", "etp3f", "etp3g", "etp3h"] + "4x100G[50G,25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d"] } }, "Ethernet24": { @@ -714,8 +711,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp4"], "2x200G[100G,50G,40G,25G,10G]": ["etp4a", "etp4b"], - "4x100G[50G,25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d"], - "8x50G[25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d", "etp4e", "etp4f", "etp4g", "etp4h"] + "4x100G[50G,25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d"] } }, "Ethernet32": { @@ -724,8 +720,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp5"], "2x200G[100G,50G,40G,25G,10G]": ["etp5a", "etp5b"], - "4x100G[50G,25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d"], - "8x50G[25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d", "etp5e", "etp5f", "etp5g", "etp5h"] + "4x100G[50G,25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d"] } }, "Ethernet40": { @@ -734,8 +729,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp6"], "2x200G[100G,50G,40G,25G,10G]": ["etp6a", "etp6b"], - "4x100G[50G,25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d"], - "8x50G[25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d", "etp6e", "etp6f", "etp6g", "etp6h"] + "4x100G[50G,25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d"] } }, "Ethernet48": { @@ -744,8 +738,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp7"], "2x200G[100G,50G,40G,25G,10G]": ["etp7a", "etp7b"], - "4x100G[50G,25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d"], - "8x50G[25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d", "etp7e", "etp7f", "etp7g", "etp7h"] + "4x100G[50G,25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d"] } }, "Ethernet56": { @@ -754,8 +747,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp8"], "2x200G[100G,50G,40G,25G,10G]": ["etp8a", "etp8b"], - "4x100G[50G,25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d"], - "8x50G[25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d", "etp8e", "etp8f", "etp8g", "etp8h"] + "4x100G[50G,25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d"] } }, "Ethernet64": { @@ -764,8 +756,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp9"], "2x200G[100G,50G,40G,25G,10G]": ["etp9a", "etp9b"], - "4x100G[50G,25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d"], - "8x50G[25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d", "etp9e", "etp9f", "etp9g", "etp9h"] + "4x100G[50G,25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d"] } }, "Ethernet72": { @@ -774,8 +765,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp10"], "2x200G[100G,50G,40G,25G,10G]": ["etp10a", "etp10b"], - "4x100G[50G,25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d"], - "8x50G[25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d", "etp10e", "etp10f", "etp10g", "etp10h"] + "4x100G[50G,25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d"] } }, "Ethernet80": { @@ -784,8 +774,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp11"], "2x200G[100G,50G,40G,25G,10G]": ["etp11a", "etp11b"], - "4x100G[50G,25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d"], - "8x50G[25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e", "etp11f", "etp11g", "etp11h"] + "4x100G[50G,25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d"] } }, "Ethernet88": { @@ -794,8 +783,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp12"], "2x200G[100G,50G,40G,25G,10G]": ["etp12a", "etp12b"], - "4x100G[50G,25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d"], - "8x50G[25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e", "etp12f", "etp12g", "etp12h"] + "4x100G[50G,25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d"] } }, "Ethernet96": { @@ -804,8 +792,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp13"], "2x200G[100G,50G,40G,25G,10G]": ["etp13a", "etp13b"], - "4x100G[50G,25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d"], - "8x50G[25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d", "etp13e", "etp13f", "etp13g", "etp13h"] + "4x100G[50G,25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d"] } }, "Ethernet104": { @@ -814,8 +801,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp14"], "2x200G[100G,50G,40G,25G,10G]": ["etp14a", "etp14b"], - "4x100G[50G,25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d"], - "8x50G[25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d", "etp14e", "etp14f", "etp14g", "etp14h"] + "4x100G[50G,25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d"] } }, "Ethernet112": { @@ -824,8 +810,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp15"], "2x200G[100G,50G,40G,25G,10G]": ["etp15a", "etp15b"], - "4x100G[50G,25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d"], - "8x50G[25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d", "etp15e", "etp15f", "etp15g", "etp15h"] + "4x100G[50G,25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d"] } }, "Ethernet120": { @@ -834,8 +819,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp16"], "2x200G[100G,50G,40G,25G,10G]": ["etp16a", "etp16b"], - "4x100G[50G,25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d"], - "8x50G[25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d", "etp16e", "etp16f", "etp16g", "etp16h"] + "4x100G[50G,25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d"] } }, "Ethernet128": { @@ -844,8 +828,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp17"], "2x200G[100G,50G,40G,25G,10G]": ["etp17a", "etp17b"], - "4x100G[50G,25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d"], - "8x50G[25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d", "etp17e", "etp17f", "etp17g", "etp17h"] + "4x100G[50G,25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d"] } }, "Ethernet136": { @@ -854,8 +837,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp18"], "2x200G[100G,50G,40G,25G,10G]": ["etp18a", "etp18b"], - "4x100G[50G,25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d"], - "8x50G[25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d", "etp18e", "etp18f", "etp18g", "etp18h"] + "4x100G[50G,25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d"] } }, "Ethernet144": { @@ -864,8 +846,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp19"], "2x200G[100G,50G,40G,25G,10G]": ["etp19a", "etp19b"], - "4x100G[50G,25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d"], - "8x50G[25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d", "etp19e", "etp19f", "etp19g", "etp19h"] + "4x100G[50G,25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d"] } }, "Ethernet152": { @@ -874,8 +855,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp20"], "2x200G[100G,50G,40G,25G,10G]": ["etp20a", "etp20b"], - "4x100G[50G,25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d"], - "8x50G[25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e", "etp20f", "etp20g", "etp20h"] + "4x100G[50G,25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d"] } }, "Ethernet160": { @@ -884,8 +864,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp21"], "2x200G[100G,50G,40G,25G,10G]": ["etp21a", "etp21b"], - "4x100G[50G,25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d"], - "8x50G[25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e", "etp21f", "etp21g", "etp21h"] + "4x100G[50G,25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d"] } }, "Ethernet168": { @@ -894,8 +873,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp22"], "2x200G[100G,50G,40G,25G,10G]": ["etp22a", "etp22b"], - "4x100G[50G,25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d"], - "8x50G[25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d", "etp22e", "etp22f", "etp22g", "etp22h"] + "4x100G[50G,25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d"] } }, "Ethernet176": { @@ -904,8 +882,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp23"], "2x200G[100G,50G,40G,25G,10G]": ["etp23a", "etp23b"], - "4x100G[50G,25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d"], - "8x50G[25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d", "etp23e", "etp23f", "etp23g", "etp23h"] + "4x100G[50G,25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d"] } }, "Ethernet184": { @@ -914,8 +891,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp24"], "2x200G[100G,50G,40G,25G,10G]": ["etp24a", "etp24b"], - "4x100G[50G,25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d"], - "8x50G[25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d", "etp24e", "etp24f", "etp24g", "etp24h"] + "4x100G[50G,25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d"] } }, "Ethernet192": { @@ -924,8 +900,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp25"], "2x200G[100G,50G,40G,25G,10G]": ["etp25a", "etp25b"], - "4x100G[50G,25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d"], - "8x50G[25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d", "etp25e", "etp25f", "etp25g", "etp25h"] + "4x100G[50G,25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d"] } }, "Ethernet200": { @@ -934,8 +909,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp26"], "2x200G[100G,50G,40G,25G,10G]": ["etp26a", "etp26b"], - "4x100G[50G,25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d"], - "8x50G[25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e", "etp26f", "etp26g", "etp26h"] + "4x100G[50G,25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d"] } }, "Ethernet208": { @@ -944,8 +918,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp27"], "2x200G[100G,50G,40G,25G,10G]": ["etp27a", "etp27b"], - "4x100G[50G,25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d"], - "8x50G[25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e", "etp27f", "etp27g", "etp27h"] + "4x100G[50G,25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d"] } }, "Ethernet216": { @@ -954,8 +927,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp28"], "2x200G[100G,50G,40G,25G,10G]": ["etp28a", "etp28b"], - "4x100G[50G,25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d"], - "8x50G[25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e", "etp28f", "etp28g", "etp28h"] + "4x100G[50G,25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d"] } }, "Ethernet224": { @@ -964,8 +936,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp29"], "2x200G[100G,50G,40G,25G,10G]": ["etp29a", "etp29b"], - "4x100G[50G,25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d"], - "8x50G[25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e", "etp29f", "etp29g", "etp29h"] + "4x100G[50G,25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d"] } }, "Ethernet232": { @@ -974,8 +945,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp30"], "2x200G[100G,50G,40G,25G,10G]": ["etp30a", "etp30b"], - "4x100G[50G,25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d"], - "8x50G[25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e", "etp30f", "etp30g", "etp30h"] + "4x100G[50G,25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d"] } }, "Ethernet240": { @@ -984,8 +954,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp31"], "2x200G[100G,50G,40G,25G,10G]": ["etp31a", "etp31b"], - "4x100G[50G,25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d"], - "8x50G[25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e", "etp31f", "etp31g", "etp31h"] + "4x100G[50G,25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d"] } }, "Ethernet248": { @@ -994,8 +963,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp32"], "2x200G[100G,50G,40G,25G,10G]": ["etp32a", "etp32b"], - "4x100G[50G,25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d"], - "8x50G[25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e", "etp32f", "etp32g", "etp32h"] + "4x100G[50G,25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d"] } }, "Ethernet256": { @@ -1004,8 +972,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp33"], "2x200G[100G,50G,40G,25G,10G]": ["etp33a", "etp33b"], - "4x100G[50G,25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d"], - "8x50G[25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e", "etp33f", "etp33g", "etp33h"] + "4x100G[50G,25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d"] } }, "Ethernet264": { @@ -1014,8 +981,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp34"], "2x200G[100G,50G,40G,25G,10G]": ["etp34a", "etp34b"], - "4x100G[50G,25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d"], - "8x50G[25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e", "etp34f", "etp34g", "etp34h"] + "4x100G[50G,25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d"] } }, "Ethernet272": { @@ -1024,8 +990,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp35"], "2x200G[100G,50G,40G,25G,10G]": ["etp35a", "etp35b"], - "4x100G[50G,25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d"], - "8x50G[25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d", "etp35e", "etp35f", "etp35g", "etp35h"] + "4x100G[50G,25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d"] } }, "Ethernet280": { @@ -1034,8 +999,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp36"], "2x200G[100G,50G,40G,25G,10G]": ["etp36a", "etp36b"], - "4x100G[50G,25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d"], - "8x50G[25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d", "etp36e", "etp36f", "etp36g", "etp36h"] + "4x100G[50G,25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d"] } }, "Ethernet288": { @@ -1044,8 +1008,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp37"], "2x200G[100G,50G,40G,25G,10G]": ["etp37a", "etp37b"], - "4x100G[50G,25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d"], - "8x50G[25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e", "etp37f", "etp37g", "etp37h"] + "4x100G[50G,25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d"] } }, "Ethernet296": { @@ -1054,8 +1017,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp38"], "2x200G[100G,50G,40G,25G,10G]": ["etp38a", "etp38b"], - "4x100G[50G,25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d"], - "8x50G[25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e", "etp38f", "etp38g", "etp38h"] + "4x100G[50G,25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d"] } }, "Ethernet304": { @@ -1064,8 +1026,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp39"], "2x200G[100G,50G,40G,25G,10G]": ["etp39a", "etp39b"], - "4x100G[50G,25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d"], - "8x50G[25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e", "etp39f", "etp39g", "etp39h"] + "4x100G[50G,25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d"] } }, "Ethernet312": { @@ -1074,8 +1035,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp40"], "2x200G[100G,50G,40G,25G,10G]": ["etp40a", "etp40b"], - "4x100G[50G,25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d"], - "8x50G[25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e", "etp40f", "etp40g", "etp40h"] + "4x100G[50G,25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d"] } }, "Ethernet320": { @@ -1084,8 +1044,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp41"], "2x200G[100G,50G,40G,25G,10G]": ["etp41a", "etp41b"], - "4x100G[50G,25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d"], - "8x50G[25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d", "etp41e", "etp41f", "etp41g", "etp41h"] + "4x100G[50G,25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d"] } }, "Ethernet328": { @@ -1094,8 +1053,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp42"], "2x200G[100G,50G,40G,25G,10G]": ["etp42a", "etp42b"], - "4x100G[50G,25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d"], - "8x50G[25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d", "etp42e", "etp42f", "etp42g", "etp42h"] + "4x100G[50G,25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d"] } }, "Ethernet336": { @@ -1104,8 +1062,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp43"], "2x200G[100G,50G,40G,25G,10G]": ["etp43a", "etp43b"], - "4x100G[50G,25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d"], - "8x50G[25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e", "etp43f", "etp43g", "etp43h"] + "4x100G[50G,25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d"] } }, "Ethernet344": { @@ -1114,8 +1071,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp44"], "2x200G[100G,50G,40G,25G,10G]": ["etp44a", "etp44b"], - "4x100G[50G,25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d"], - "8x50G[25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e", "etp44f", "etp44g", "etp44h"] + "4x100G[50G,25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d"] } }, "Ethernet352": { @@ -1124,8 +1080,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp45"], "2x200G[100G,50G,40G,25G,10G]": ["etp45a", "etp45b"], - "4x100G[50G,25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d"], - "8x50G[25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e", "etp45f", "etp45g", "etp45h"] + "4x100G[50G,25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d"] } }, "Ethernet360": { @@ -1134,8 +1089,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp46"], "2x200G[100G,50G,40G,25G,10G]": ["etp46a", "etp46b"], - "4x100G[50G,25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d"], - "8x50G[25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e", "etp46f", "etp46g", "etp46h"] + "4x100G[50G,25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d"] } }, "Ethernet368": { @@ -1144,8 +1098,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp47"], "2x200G[100G,50G,40G,25G,10G]": ["etp47a", "etp47b"], - "4x100G[50G,25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d"], - "8x50G[25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d", "etp47e", "etp47f", "etp47g", "etp47h"] + "4x100G[50G,25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d"] } }, "Ethernet376": { @@ -1154,8 +1107,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp48"], "2x200G[100G,50G,40G,25G,10G]": ["etp48a", "etp48b"], - "4x100G[50G,25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d"], - "8x50G[25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e", "etp48f", "etp48g", "etp48h"] + "4x100G[50G,25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d"] } }, "Ethernet384": { @@ -1164,8 +1116,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp49"], "2x200G[100G,50G,40G,25G,10G]": ["etp49a", "etp49b"], - "4x100G[50G,25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d"], - "8x50G[25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e", "etp49f", "etp49g", "etp49h"] + "4x100G[50G,25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d"] } }, "Ethernet392": { @@ -1174,8 +1125,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp50"], "2x200G[100G,50G,40G,25G,10G]": ["etp50a", "etp50b"], - "4x100G[50G,25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d"], - "8x50G[25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e", "etp50f", "etp50g", "etp50h"] + "4x100G[50G,25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d"] } }, "Ethernet400": { @@ -1184,8 +1134,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp51"], "2x200G[100G,50G,40G,25G,10G]": ["etp51a", "etp51b"], - "4x100G[50G,25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d"], - "8x50G[25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e", "etp51f", "etp51g", "etp51h"] + "4x100G[50G,25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d"] } }, "Ethernet408": { @@ -1194,8 +1143,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp52"], "2x200G[100G,50G,40G,25G,10G]": ["etp52a", "etp52b"], - "4x100G[50G,25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d"], - "8x50G[25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e", "etp52f", "etp52g", "etp52h"] + "4x100G[50G,25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d"] } }, "Ethernet416": { @@ -1204,8 +1152,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp53"], "2x200G[100G,50G,40G,25G,10G]": ["etp53a", "etp53b"], - "4x100G[50G,25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d"], - "8x50G[25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e", "etp53f", "etp53g", "etp53h"] + "4x100G[50G,25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d"] } }, "Ethernet424": { @@ -1214,8 +1161,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp54"], "2x200G[100G,50G,40G,25G,10G]": ["etp54a", "etp54b"], - "4x100G[50G,25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d"], - "8x50G[25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e", "etp54f", "etp54g", "etp54h"] + "4x100G[50G,25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d"] } }, "Ethernet432": { @@ -1224,8 +1170,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp55"], "2x200G[100G,50G,40G,25G,10G]": ["etp55a", "etp55b"], - "4x100G[50G,25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d"], - "8x50G[25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e", "etp55f", "etp55g", "etp55h"] + "4x100G[50G,25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d"] } }, "Ethernet440": { @@ -1234,8 +1179,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp56"], "2x200G[100G,50G,40G,25G,10G]": ["etp56a", "etp56b"], - "4x100G[50G,25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d"], - "8x50G[25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e", "etp56f", "etp56g", "etp56h"] + "4x100G[50G,25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d"] } }, "Ethernet448": { @@ -1244,8 +1188,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp57"], "2x200G[100G,50G,40G,25G,10G]": ["etp57a", "etp57b"], - "4x100G[50G,25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d"], - "8x50G[25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e", "etp57f", "etp57g", "etp57h"] + "4x100G[50G,25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d"] } }, "Ethernet456": { @@ -1254,8 +1197,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp58"], "2x200G[100G,50G,40G,25G,10G]": ["etp58a", "etp58b"], - "4x100G[50G,25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d"], - "8x50G[25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e", "etp58f", "etp58g", "etp58h"] + "4x100G[50G,25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d"] } }, "Ethernet464": { @@ -1264,8 +1206,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp59"], "2x200G[100G,50G,40G,25G,10G]": ["etp59a", "etp59b"], - "4x100G[50G,25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d"], - "8x50G[25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e", "etp59f", "etp59g", "etp59h"] + "4x100G[50G,25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d"] } }, "Ethernet472": { @@ -1274,8 +1215,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp60"], "2x200G[100G,50G,40G,25G,10G]": ["etp60a", "etp60b"], - "4x100G[50G,25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d"], - "8x50G[25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e", "etp60f", "etp60g", "etp60h"] + "4x100G[50G,25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d"] } }, "Ethernet480": { @@ -1284,8 +1224,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp61"], "2x200G[100G,50G,40G,25G,10G]": ["etp61a", "etp61b"], - "4x100G[50G,25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d"], - "8x50G[25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d", "etp61e", "etp61f", "etp61g", "etp61h"] + "4x100G[50G,25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d"] } }, "Ethernet488": { @@ -1294,8 +1233,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp62"], "2x200G[100G,50G,40G,25G,10G]": ["etp62a", "etp62b"], - "4x100G[50G,25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d"], - "8x50G[25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e", "etp62f", "etp62g", "etp62h"] + "4x100G[50G,25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d"] } }, "Ethernet496": { @@ -1304,8 +1242,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp63"], "2x200G[100G,50G,40G,25G,10G]": ["etp63a", "etp63b"], - "4x100G[50G,25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d"], - "8x50G[25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e", "etp63f", "etp63g", "etp63h"] + "4x100G[50G,25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d"] } }, "Ethernet504": { @@ -1314,8 +1251,7 @@ "breakout_modes": { "1x400G[200G,100G,50G,40G,25G,10G]": ["etp64"], "2x200G[100G,50G,40G,25G,10G]": ["etp64a", "etp64b"], - "4x100G[50G,25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d"], - "8x50G[25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e", "etp64f", "etp64g", "etp64h"] + "4x100G[50G,25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d"] } }, "Ethernet512": { diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/hwsku.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/hwsku.json index 04211490cdf6..be1f3c62d1f4 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/hwsku.json +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/hwsku.json @@ -1,772 +1,1284 @@ { "interfaces": { "Ethernet0": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet2": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet4": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet6": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet8": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet10": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet12": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet14": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet16": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet18": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet20": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet22": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet24": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet26": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet28": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet30": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet32": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet34": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet36": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet38": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet40": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet42": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet44": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet46": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet48": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet50": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet52": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet54": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet56": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet58": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet60": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet62": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet64": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet66": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet68": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet70": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet72": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet74": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet76": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet78": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet80": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet82": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet84": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet86": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet88": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet90": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet92": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet94": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet96": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet98": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet100": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet102": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet104": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet106": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet108": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet110": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet112": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet114": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet116": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet118": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet120": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet122": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet124": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet126": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet128": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet130": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet132": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": 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"autoneg": "off" }, "Ethernet158": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet160": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet162": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet164": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet166": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet168": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, 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"default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet208": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet210": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet212": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet214": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet216": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet218": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": 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"autoneg": "off" }, "Ethernet244": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet246": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet248": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet250": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet252": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet254": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, 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"default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet270": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet272": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet274": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet276": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet278": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet280": { - "default_brkout_mode": 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"default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet294": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet296": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet298": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet300": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet302": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet304": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet306": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet308": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet310": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet312": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet314": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet316": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", 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"autoneg": "off" }, "Ethernet330": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet332": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet334": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet336": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet338": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet340": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, 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"default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet442": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet444": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "3", + "autoneg": "off" }, "Ethernet446": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "4", + "autoneg": "off" }, "Ethernet448": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "1", + "autoneg": "off" }, "Ethernet450": { - "default_brkout_mode": "4x200G[100G,50G,25G,10G]" + "default_brkout_mode": "4x200G[100G,50G,25G,10G]", + "subport": "2", + "autoneg": "off" }, "Ethernet452": { - "default_brkout_mode": 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b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json new file mode 100644 index 000000000000..6b48c7b70adc --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json @@ -0,0 +1,544 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-64": { + "OSFP-8X-sm_media_interface": { + "speed:400GAUI-4-L": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xfffffff1", + "lane1": "0xfffffff1", + "lane2": "0xfffffff1", + "lane3": "0xfffffff1", + "lane4": "0xfffffff1", + "lane5": "0xfffffff1", + "lane6": "0xfffffff1", + "lane7": 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"0x00000032", + "lane6": "0x00000032", + "lane7": "0x00000032" + } + }, + "speed:200GAUI-4": { + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "idriver": { + "lane0": "0x0000003f", + "lane1": "0x0000003f", + "lane2": "0x0000003f", + "lane3": "0x0000003f" + }, + "main": { + "lane0": "0x0000003f", + "lane1": "0x0000003f", + "lane2": "0x0000003f", + "lane3": "0x0000003f" + }, + "pre1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + } + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/optics_si_settings.json new file mode 100644 index 000000000000..80d06ac743a8 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/optics_si_settings.json @@ -0,0 +1,142 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-64": { + "100G_SPEED": { + "Default": { + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 1, + "OutputAmplitudeTargetRx2": 1, + "OutputAmplitudeTargetRx3": 1, + "OutputAmplitudeTargetRx4": 1, + "OutputAmplitudeTargetRx5": 1, + "OutputAmplitudeTargetRx6": 1, + "OutputAmplitudeTargetRx7": 1, + "OutputAmplitudeTargetRx8": 1 + }, + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + } + } + }, + "50G_SPEED": { + "Default": { + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 1, + "OutputAmplitudeTargetRx2": 1, + "OutputAmplitudeTargetRx3": 1, + "OutputAmplitudeTargetRx4": 1, + "OutputAmplitudeTargetRx5": 1, + "OutputAmplitudeTargetRx6": 1, + "OutputAmplitudeTargetRx7": 1, + "OutputAmplitudeTargetRx8": 1 + }, + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + } + } + }, + "25G_SPEED": { + "Default": { + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 0, + "OutputAmplitudeTargetRx2": 0, + "OutputAmplitudeTargetRx3": 0, + "OutputAmplitudeTargetRx4": 0, + "OutputAmplitudeTargetRx5": 0, + "OutputAmplitudeTargetRx6": 0, + "OutputAmplitudeTargetRx7": 0, + "OutputAmplitudeTargetRx8": 0 + }, + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + } + } + }, + "10G_SPEED": { + "Default": { + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 0, + "OutputAmplitudeTargetRx2": 0, + "OutputAmplitudeTargetRx3": 0, + "OutputAmplitudeTargetRx4": 0, + "OutputAmplitudeTargetRx5": 0, + "OutputAmplitudeTargetRx6": 0, + "OutputAmplitudeTargetRx7": 0, + "OutputAmplitudeTargetRx8": 0 + }, + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + } + } + } + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pmon_daemon_control.json new file mode 100644 index 000000000000..208fa63ca294 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pmon_daemon_control.json @@ -0,0 +1,6 @@ +{ + "skip_ledd": true, + "skip_fancontrol": true, + "skip_xcvrd_cmis_mgr": false +} + diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile index 0d93ea989b31..8677e1faf336 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile @@ -1 +1,2 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5600_256x200g.xml +SAI_INDEPENDENT_MODULE_MODE=1 diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai_5600_256x200g.xml b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai_5600_256x200g.xml index 89518aa8cfca..c03466d84476 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai_5600_256x200g.xml +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai_5600_256x200g.xml @@ -27,6 +27,9 @@ 65 + + 1 + diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf index 306cde03b174..71628d62e1f7 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf @@ -1 +1 @@ -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq modprobe.blacklist=tpm_tis,tpm_crb,tpm" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq tpm_tis.interrupts=0" diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 index b11b209e5598..d38f07fac66d 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 @@ -1 +1 @@ -c99947340cd205fa728bd418d1ca7a92 \ No newline at end of file +f3d3345bef9c6ac4eea19c6170e92970 \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml index f23c2e9badda..6f615816bf42 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml @@ -1,5 +1,5 @@ - + @@ -727,7 +727,6 @@ lowercase characters. 0 0 - 63 false @@ -746,7 +745,6 @@ lowercase characters. 1 0 - 63 false @@ -765,7 +763,6 @@ lowercase characters. 2 0 - 63 false @@ -784,7 +781,6 @@ lowercase characters. 3 0 - 63 false @@ -803,7 +799,6 @@ lowercase characters. 4 0 - 63 false @@ -822,7 +817,6 @@ lowercase characters. 5 0 - 63 false @@ -841,7 +835,6 @@ lowercase characters. 6 0 - 63 false @@ -860,7 +853,6 @@ lowercase characters. 7 0 - 63 false @@ -879,7 +871,6 @@ lowercase characters. 8 0 - 63 false @@ -898,7 +889,6 @@ lowercase characters. 9 0 - 63 false @@ -917,7 +907,6 @@ lowercase characters. 10 0 - 63 false @@ -936,7 +925,6 @@ lowercase characters. 11 0 - 63 false @@ -955,7 +943,6 @@ lowercase characters. 12 0 - 63 false @@ -974,7 +961,6 @@ lowercase characters. 13 0 - 63 false @@ -993,7 +979,6 @@ lowercase characters. 14 0 - 63 false @@ -1012,7 +997,6 @@ lowercase characters. 15 0 - 63 false @@ -1031,7 +1015,6 @@ lowercase characters. 16 0 - 63 false @@ -1050,7 +1033,6 @@ lowercase characters. 17 0 - 63 false @@ -1069,7 +1051,6 @@ lowercase characters. 18 0 - 63 false @@ -1088,7 +1069,6 @@ lowercase characters. 19 0 - 63 false @@ -1107,7 +1087,6 @@ lowercase characters. 20 0 - 63 false @@ -1126,7 +1105,6 @@ lowercase characters. 21 0 - 63 false @@ -1145,7 +1123,6 @@ lowercase characters. 22 0 - 63 false @@ -1164,7 +1141,6 @@ lowercase characters. 23 0 - 63 false @@ -1183,7 +1159,6 @@ lowercase characters. 0 1 - 63 false @@ -1202,7 +1177,6 @@ lowercase characters. 1 1 - 63 false @@ -1221,7 +1195,6 @@ lowercase characters. 2 1 - 63 false @@ -1240,7 +1213,6 @@ lowercase characters. 3 1 - 63 false @@ -1259,7 +1231,6 @@ lowercase characters. 4 1 - 63 false @@ -1278,7 +1249,6 @@ lowercase characters. 5 1 - 63 false @@ -1297,7 +1267,6 @@ lowercase characters. 6 1 - 63 false @@ -1316,7 +1285,6 @@ lowercase characters. 7 1 - 63 false @@ -1335,7 +1303,6 @@ lowercase characters. 8 1 - 63 false @@ -1354,7 +1321,6 @@ lowercase characters. 23 1 - 63 false @@ -1373,7 +1339,6 @@ lowercase characters. 22 1 - 63 false @@ -1392,7 +1357,6 @@ lowercase characters. 21 1 - 63 false @@ -1411,7 +1375,6 @@ lowercase characters. 20 1 - 63 false @@ -1430,7 +1393,6 @@ lowercase characters. 19 1 - 63 false @@ -1449,7 +1411,6 @@ lowercase characters. 18 1 - 63 false @@ -1468,7 +1429,6 @@ lowercase characters. 17 1 - 63 false @@ -1487,7 +1447,6 @@ lowercase characters. 16 1 - 63 false @@ -1506,7 +1465,6 @@ lowercase characters. 15 1 - 63 false @@ -1525,7 +1483,6 @@ lowercase characters. 14 1 - 63 false @@ -1544,7 +1501,6 @@ lowercase characters. 13 1 - 63 false @@ -1563,7 +1519,6 @@ lowercase characters. 12 1 - 63 false @@ -1582,7 +1537,6 @@ lowercase characters. 11 1 - 63 false @@ -1601,7 +1555,6 @@ lowercase characters. 10 1 - 63 false @@ -1620,7 +1573,6 @@ lowercase characters. 9 1 - 63 false @@ -1636,7 +1588,6 @@ lowercase characters. NA - 0 @@ -1656,7 +1607,6 @@ lowercase characters. NA - 1 @@ -1676,7 +1626,6 @@ lowercase characters. NA - 0 @@ -1696,7 +1645,6 @@ lowercase characters. NA - 1 @@ -1874,6 +1822,23 @@ lowercase characters. + + + alaska-88E1780 + + 16 + 3 + 64 + 65280 + + + 1 + 28 + 1024 + 64511 + + + . 1 diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 index 575bbf06a1b2..1d7a5566018a 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 @@ -1 +1 @@ -83b91095c99529e49619e31e3fd72101 \ No newline at end of file +4ad719e69b522db7ee969da2894cb04a \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml index eff23c06ff2b..7789d25115e7 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml @@ -1,5 +1,5 @@ - + @@ -239,8 +239,8 @@ enumeration Tx parameter type - atten - atten + pre + pre 0 @@ -248,75 +248,10 @@ post 1 - - pre - pre - 2 - - - pre2 - pre2 - 3 - - - pre3 - pre3 - 4 - peak peak - 5 - - - main - main - 6 - - - txAmpAdjEn - txAmpAdjEn - 7 - - - emph0 - emph0 - 8 - - - emph1 - emph1 - 9 - - - txAmpShft - txAmpShft - 10 - - - txEmphEn - txEmphEn - 11 - - - txEmphEn1 - txEmphEn1 - 12 - - - txAmpAdj - txAmpAdj - 13 - - - slewCtrlEn - slewCtrlEn - 14 - - - slewRate - slewRate - 15 + 2 @@ -324,400 +259,180 @@ enumeration Rx parameter type - sqlch - sqlch + dataRate + dataRate 0 - DC - DC + res1Sel + res1Sel 1 - LF - LF + res2Sel + res2Sel 2 - HF - HF + cap1Sel + cap1Sel 3 - gainShape1 - gainShape1 + cap2Sel + cap2Sel 4 - gainShape2 - gainShape2 + minCap + minCap 5 - shortChannelEn - shortChannelEn + minCapN + minCapN + 6 + + + sumfBoostTargetC0 + sumfBoostTargetC0 7 - bfLf - bfLf + sumfBoostTargetC1 + sumfBoostTargetC1 8 - bfHf - bfHf + sumfBoostTargetC2 + sumfBoostTargetC2 9 - minLf - minLf + midpointPhaseOs0 + midpointPhaseOs0 10 - maxLf - maxLf + midpointPhaseOs1 + midpointPhaseOs1 11 - minHf - minHf + midpointPhaseOs2 + midpointPhaseOs2 12 - - maxHf - maxHf - 13 - - - minPre1 - minPre1 - 14 - - - maxPre1 - maxPre1 - 15 - - - minPre2 - minPre2 - 16 - - - maxPre2 - - 17 - - - minPost - minPost - 18 - - - maxPost - maxPost - 19 - - - squelch - squelch - 20 - - - termination - termination - 27 - - - coldEnvelope - coldEnvelope - 35 - - - hotEnvelope - hotEnvelope - 36 - - - dcGain - dcGain - 37 - - - bandWidth - bandWidth - 38 - - - dfe - dfe - 39 - - - ffeR - ffeR - 40 - - - ffeC - ffeC - 41 - - - sampler - sampler - 42 - - - align90 - align90 - 43 - - - ffeS - ffeS - 44 - - - resSel - resSel - 45 - - - resShift - resShift - 46 - - - capSel - capSel - 47 - - - ffeSettingForce - ffeSettingForce - 48 - - - adaptedResSel - adaptedResSel - 49 - - - adaptedCapSel - adaptedCapSel - 50 - selmufi selmufi - 51 + 13 selmuff selmuff - 52 + 14 selmupi selmupi - 53 + 15 selmupf selmupf - 54 - - - slewRateCtrl0 - slewRateCtrl0 - 55 - - - slewRateCtrl1 - slewRateCtrl1 - 56 - - - EO - EO - 57 - - - dataRate - dataRate - 58 - - - res1Sel - res1Sel - 59 - - - res2Sel - res2Sel - 60 - - - cap1Sel - cap1Sel - 61 - - - cap2Sel - cap2Sel - 62 + 16 midpointLargeThresKLane midpointLargeThresKLane - 63 + 17 midpointSmallThresKLane midpointSmallThresKLane - 64 + 18 midpointLargeThresCLane midpointLargeThresCLane - 65 + 19 midpointSmallThresCLane midpointSmallThresCLane - 66 + 20 + + + inxSumfMidpointAdatptiveEnLane + inxSumfMidpointAdatptiveEnLane + 21 dfeResF0aHighThresInitLane dfeResF0aHighThresInitLane - 67 + 22 dfeResF0aHighThresEndLane dfeResF0aHighThresEndLane - 68 - - - current1Sel - current1Sel - 69 - - - rl1Sel - rl1Sel - 70 + 23 - rl1Extra - rl1Extra - 71 - - - cl1Ctrl - cl1Ctrl - 72 - - - enMidFreq - enMidFreq - 73 - - - cs1Mid - cs1Mid - 74 - - - rs1Mid - rs1Mid - 75 - - - rfCtrl - rfCtrl - 76 - - - rl1TiaSel - rl1TiaSel - 77 - - - rl1TiaExtra - rl1TiaExtra - 78 - - - hpfRSel1st - hpfRSel1st - 79 - - - current1TiaSel - current1TiaSel - 80 - - - rl2Tune - rl2Tune - 81 - - - rl2Sel - rl2Sel - 82 + squelch + squelch + 24 - rs2Sel - rs2Sel - 83 + align90 + align90 + 25 - current2Sel - current2Sel - 84 + sampler + sampler + 26 - hpfRsel2nd - hpfRsel2nd - 85 + slewRateCtrl0 + slewRateCtrl0 + 27 - BW - BW - 86 + slewRateCtrl1 + slewRateCtrl1 + 28 - dfeGAIN - dfeGAIN - 87 + EO + EO + 29 - dfeGAIN2 - dfeGAIN2 - 88 + minCap1 + minCap1 + 30 - pre1 - pre1 - 89 + maxCap1 + maxCap1 + 31 - pre2 - pre2 - 90 + minRes1 + minRes1 + 32 - post1 - post1 - 91 + maxRes1 + maxRes1 + 33 boolean-type enumeration - Boolean 32 bits , due to bing endian + Boolean 32 bits , due to big endian false False @@ -764,33 +479,6 @@ 5 - - uint8-type - uint32 - Uint8 32 bits , due to bing endian - 0 - 255 - - - serdes-termination-type - enumeration - RX termination mode - - GND - Enabled - 0 - - - VDD - Disabled - 1 - - - FLOATING - RS FEC enabled - 2 - - port-interconnect-profile-type enumeration @@ -860,315 +548,517 @@ 0 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false + + 0 + + pre + 0 + + + post + 0 + + + peak + 1 + + 1 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 2 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 3 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 4 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 5 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 6 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 7 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 8 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false + + 0 + + pre + 0 + + + post + 0 + + + peak + 5 + + 9 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 10 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 11 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 12 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 13 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 14 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 15 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 16 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false + + 0 + + pre + 0 + + + post + 0 + + + peak + 9 + + 17 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 18 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 19 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 20 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 21 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 22 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 23 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 24 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false + + 0 + + pre + 0 + + + post + 0 + + + peak + 10 + + 25 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 26 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 27 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 28 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 29 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 30 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 31 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 32 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false + + 0 + + pre + 0 + + + post + 0 + + + peak + 14 + + 33 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 34 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 35 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 36 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 37 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 38 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 39 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 40 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false + + 0 + + pre + 0 + + + post + 0 + + + peak + 11 + + 41 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 42 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 43 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 44 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 45 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 46 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 47 - AVAGO + COMPHY_C28G profile_default 1000MR1 + false 48 - AVAGO + COMPHY_C28G profile_default 10GR1 + false + + 0 + + pre + 0 + + + peak + 0 + + + post + 9 + + 49 - AVAGO + COMPHY_C28G profile_default 10GR1 + false + + 0 + + pre + 0 + + + peak + 0 + + + post + 10 + + 50 - AVAGO + COMPHY_C28G profile_default 10GR1 + false + + 0 + + pre + 0 + + + post + 9 + + + peak + 0 + + 51 - AVAGO + COMPHY_C28G profile_default 10GR1 + false + + 0 + + pre + 0 + + + post + 10 + + + peak + 0 + + diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 index c043a0d7231f..5c1c480ebb3e 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 @@ -1 +1 @@ -209426f8b550ddf85db19925f9f202a1 \ No newline at end of file +7ca6eaf67da8ee4c5b2a4f480db8919f \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml index 9e40492cfe8f..13b344d6b964 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml @@ -1,5 +1,5 @@ - + diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 index 04eaffc09efc..7d2cfc524b98 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 @@ -1 +1 @@ -8918d787a5ccaa80a481ddb8b169574a \ No newline at end of file +751d5fb74a0861240aa86afad8ad13ef \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml index 00c77001f56b..91246fc35848 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml @@ -1,5 +1,5 @@ - + @@ -50,10 +50,20 @@ Router In Drop Counters track Route Black Hole Packets 1 + + + Feature-enable + enumeration + Feature Enabled/Disabled - IN_DROP_ANY - Router In Drop Counters track either TTL & Hop Limit Exceeded or Route Black Hole Packets - 2 + Disabled + Disabled + 0 + + + Enabled + Enabled + 1 @@ -432,14 +442,15 @@ 1024 - - 0 - - IN_DROP_ANY + 0 + ROUTE_BLACKHOLE SAI_LOG_SYSLOG + + Disabled + control-acl 3 diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 index d381d2541957..5422b86a598d 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 @@ -1 +1 @@ -78ea2f9bc238a32b68823bc7b082198d \ No newline at end of file +d7069397e7466efe2bd6cf4a952b56db \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml index 63b6aeba3bd3..efb1432c65de 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + @@ -52,7 +52,7 @@ board-pp-interface-channel-type enumeration - Specifies interface tunnel. + Specifies channel interface type. pci PCI @@ -64,19 +64,29 @@ 1 - pex - PEX - 3 + twsi + TWSI + 2 + + + board-pp-as-type + enumeration + Specifies Address space type. - pex_eagle - PEX EAGLE - 5 + 4_regions + address-space 4 regions + 0 - pex_falcon_z - PEX FALCON Z - 6 + 8_regions + address-space 8 regions + 1 + + + atu + address translation unit + 2 @@ -683,6 +693,11 @@ lowercase characters. AC5X 1 + + ASIC_Falcon + FALCON + 2 + ASIC_AC3X @@ -691,7 +706,8 @@ lowercase characters. linux-static autoscan external - pex + pci + 8_regions 0 0 @@ -713,7 +729,6 @@ lowercase characters. 1 0 - 63 false @@ -734,7 +749,6 @@ lowercase characters. 0 0 - 63 false @@ -755,7 +769,6 @@ lowercase characters. 3 0 - 63 false @@ -776,7 +789,6 @@ lowercase characters. 2 0 - 63 false @@ -797,7 +809,6 @@ lowercase characters. 5 0 - 63 false @@ -818,7 +829,6 @@ lowercase characters. 4 0 - 63 false @@ -839,7 +849,6 @@ lowercase characters. 7 0 - 63 false @@ -860,7 +869,6 @@ lowercase characters. 6 0 - 63 false @@ -881,7 +889,6 @@ lowercase characters. 1 1 - 63 false @@ -902,7 +909,6 @@ lowercase characters. 0 1 - 63 false @@ -923,7 +929,6 @@ lowercase characters. 3 1 - 63 false @@ -944,7 +949,6 @@ lowercase characters. 2 1 - 63 false @@ -965,7 +969,6 @@ lowercase characters. 5 1 - 63 false @@ -986,7 +989,6 @@ lowercase characters. 4 1 - 63 false @@ -1007,7 +1009,6 @@ lowercase characters. 7 1 - 63 false @@ -1028,7 +1029,6 @@ lowercase characters. 6 1 - 63 false @@ -1049,7 +1049,6 @@ lowercase characters. 9 1 - 63 false @@ -1070,7 +1069,6 @@ lowercase characters. 8 1 - 63 false @@ -1091,7 +1089,6 @@ lowercase characters. 11 1 - 63 false @@ -1112,7 +1109,6 @@ lowercase characters. 10 1 - 63 false @@ -1133,7 +1129,6 @@ lowercase characters. 13 1 - 63 false @@ -1154,7 +1149,6 @@ lowercase characters. 12 1 - 63 false @@ -1175,7 +1169,6 @@ lowercase characters. 15 1 - 63 false @@ -1196,7 +1189,6 @@ lowercase characters. 14 1 - 63 false @@ -1214,7 +1206,6 @@ lowercase characters. NA - 0 @@ -1242,7 +1233,6 @@ lowercase characters. NA - 1 @@ -1274,7 +1264,6 @@ lowercase characters. NA - 63 false @@ -1296,7 +1285,6 @@ lowercase characters. NA - 63 false @@ -1318,7 +1306,6 @@ lowercase characters. NA - 63 false @@ -1444,7 +1431,6 @@ lowercase characters. 5 0 - 63 false @@ -1465,7 +1451,6 @@ lowercase characters. 4 0 - 63 false @@ -1486,7 +1471,6 @@ lowercase characters. 7 0 - 63 false @@ -1507,7 +1491,6 @@ lowercase characters. 6 0 - 63 false @@ -1528,7 +1511,6 @@ lowercase characters. 1 0 - 63 false @@ -1549,7 +1531,6 @@ lowercase characters. 0 0 - 63 false @@ -1570,7 +1551,6 @@ lowercase characters. 3 0 - 63 false @@ -1591,7 +1571,6 @@ lowercase characters. 2 0 - 63 false @@ -1612,7 +1591,6 @@ lowercase characters. 1 1 - 63 false @@ -1633,7 +1611,6 @@ lowercase characters. 0 1 - 63 false @@ -1654,7 +1631,6 @@ lowercase characters. 3 1 - 63 false @@ -1675,7 +1651,6 @@ lowercase characters. 2 1 - 63 false @@ -1696,7 +1671,6 @@ lowercase characters. 5 1 - 63 false @@ -1717,7 +1691,6 @@ lowercase characters. 4 1 - 63 false @@ -1738,7 +1711,6 @@ lowercase characters. 7 1 - 63 false @@ -1759,7 +1731,6 @@ lowercase characters. 6 1 - 63 false @@ -1780,7 +1751,6 @@ lowercase characters. 9 1 - 63 false @@ -1801,7 +1771,6 @@ lowercase characters. 8 1 - 63 false @@ -1822,7 +1791,6 @@ lowercase characters. 11 1 - 63 false @@ -1843,7 +1811,6 @@ lowercase characters. 10 1 - 63 false @@ -1864,7 +1831,6 @@ lowercase characters. 13 1 - 63 false @@ -1885,7 +1851,6 @@ lowercase characters. 12 1 - 63 false @@ -1906,7 +1871,6 @@ lowercase characters. 15 1 - 63 false @@ -1927,7 +1891,6 @@ lowercase characters. 14 1 - 63 false @@ -1945,7 +1908,6 @@ lowercase characters. NA - 0 @@ -1973,7 +1935,6 @@ lowercase characters. NA - 1 @@ -2005,7 +1966,6 @@ lowercase characters. NA - 63 false @@ -2027,7 +1987,6 @@ lowercase characters. NA - 63 false @@ -2049,7 +2008,6 @@ lowercase characters. NA - 63 false @@ -2154,6 +2112,23 @@ lowercase characters. + + + alaska-88E1680 + + 16 + 3 + 23 + 65280 + + + 27 + 4 + 32 + 65503 + + + . 1 diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 index 7ff2b96da2e7..a232c8381527 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 @@ -1 +1 @@ -a51445be255ef6afa324278ba9e191d9 \ No newline at end of file +bf932ba262c96acdfe677bd5078a21d7 \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml index a254fbaa5283..f1cc5989dddb 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + @@ -239,8 +239,8 @@ enumeration Tx parameter type - atten - atten + pre + pre 0 @@ -248,75 +248,10 @@ post 1 - - pre - pre - 2 - - - pre2 - pre2 - 3 - - - pre3 - pre3 - 4 - peak peak - 5 - - - main - main - 6 - - - txAmpAdjEn - txAmpAdjEn - 7 - - - emph0 - emph0 - 8 - - - emph1 - emph1 - 9 - - - txAmpShft - txAmpShft - 10 - - - txEmphEn - txEmphEn - 11 - - - txEmphEn1 - txEmphEn1 - 12 - - - txAmpAdj - txAmpAdj - 13 - - - slewCtrlEn - slewCtrlEn - 14 - - - slewRate - slewRate - 15 + 2 @@ -324,400 +259,180 @@ enumeration Rx parameter type - sqlch - sqlch + dataRate + dataRate 0 - DC - DC + res1Sel + res1Sel 1 - LF - LF + res2Sel + res2Sel 2 - HF - HF + cap1Sel + cap1Sel 3 - gainShape1 - gainShape1 + cap2Sel + cap2Sel 4 - gainShape2 - gainShape2 + minCap + minCap 5 - shortChannelEn - shortChannelEn + minCapN + minCapN + 6 + + + sumfBoostTargetC0 + sumfBoostTargetC0 7 - bfLf - bfLf + sumfBoostTargetC1 + sumfBoostTargetC1 8 - bfHf - bfHf + sumfBoostTargetC2 + sumfBoostTargetC2 9 - minLf - minLf + midpointPhaseOs0 + midpointPhaseOs0 10 - maxLf - maxLf + midpointPhaseOs1 + midpointPhaseOs1 11 - minHf - minHf + midpointPhaseOs2 + midpointPhaseOs2 12 - - maxHf - maxHf - 13 - - - minPre1 - minPre1 - 14 - - - maxPre1 - maxPre1 - 15 - - - minPre2 - minPre2 - 16 - - - maxPre2 - - 17 - - - minPost - minPost - 18 - - - maxPost - maxPost - 19 - - - squelch - squelch - 20 - - - termination - termination - 27 - - - coldEnvelope - coldEnvelope - 35 - - - hotEnvelope - hotEnvelope - 36 - - - dcGain - dcGain - 37 - - - bandWidth - bandWidth - 38 - - - dfe - dfe - 39 - - - ffeR - ffeR - 40 - - - ffeC - ffeC - 41 - - - sampler - sampler - 42 - - - align90 - align90 - 43 - - - ffeS - ffeS - 44 - - - resSel - resSel - 45 - - - resShift - resShift - 46 - - - capSel - capSel - 47 - - - ffeSettingForce - ffeSettingForce - 48 - - - adaptedResSel - adaptedResSel - 49 - - - adaptedCapSel - adaptedCapSel - 50 - selmufi selmufi - 51 + 13 selmuff selmuff - 52 + 14 selmupi selmupi - 53 + 15 selmupf selmupf - 54 - - - slewRateCtrl0 - slewRateCtrl0 - 55 - - - slewRateCtrl1 - slewRateCtrl1 - 56 - - - EO - EO - 57 - - - dataRate - dataRate - 58 - - - res1Sel - res1Sel - 59 - - - res2Sel - res2Sel - 60 - - - cap1Sel - cap1Sel - 61 - - - cap2Sel - cap2Sel - 62 + 16 midpointLargeThresKLane midpointLargeThresKLane - 63 + 17 midpointSmallThresKLane midpointSmallThresKLane - 64 + 18 midpointLargeThresCLane midpointLargeThresCLane - 65 + 19 midpointSmallThresCLane midpointSmallThresCLane - 66 + 20 + + + inxSumfMidpointAdatptiveEnLane + inxSumfMidpointAdatptiveEnLane + 21 dfeResF0aHighThresInitLane dfeResF0aHighThresInitLane - 67 + 22 dfeResF0aHighThresEndLane dfeResF0aHighThresEndLane - 68 - - - current1Sel - current1Sel - 69 - - - rl1Sel - rl1Sel - 70 + 23 - rl1Extra - rl1Extra - 71 - - - cl1Ctrl - cl1Ctrl - 72 - - - enMidFreq - enMidFreq - 73 - - - cs1Mid - cs1Mid - 74 - - - rs1Mid - rs1Mid - 75 - - - rfCtrl - rfCtrl - 76 - - - rl1TiaSel - rl1TiaSel - 77 - - - rl1TiaExtra - rl1TiaExtra - 78 - - - hpfRSel1st - hpfRSel1st - 79 - - - current1TiaSel - current1TiaSel - 80 - - - rl2Tune - rl2Tune - 81 - - - rl2Sel - rl2Sel - 82 + squelch + squelch + 24 - rs2Sel - rs2Sel - 83 + align90 + align90 + 25 - current2Sel - current2Sel - 84 + sampler + sampler + 26 - hpfRsel2nd - hpfRsel2nd - 85 + slewRateCtrl0 + slewRateCtrl0 + 27 - BW - BW - 86 + slewRateCtrl1 + slewRateCtrl1 + 28 - dfeGAIN - dfeGAIN - 87 + EO + EO + 29 - dfeGAIN2 - dfeGAIN2 - 88 + minCap1 + minCap1 + 30 - pre1 - pre1 - 89 + maxCap1 + maxCap1 + 31 - pre2 - pre2 - 90 + minRes1 + minRes1 + 32 - post1 - post1 - 91 + maxRes1 + maxRes1 + 33 boolean-type enumeration - Boolean 32 bits , due to bing endian + Boolean 32 bits , due to big endian false False @@ -764,33 +479,6 @@ 5 - - uint8-type - uint32 - Uint8 32 bits , due to bing endian - 0 - 255 - - - serdes-termination-type - enumeration - RX termination mode - - GND - Enabled - 0 - - - VDD - Disabled - 1 - - - FLOATING - RS FEC enabled - 2 - - port-interconnect-profile-type enumeration @@ -870,174 +558,203 @@ AVAGO profile_default 1000MR1 + false 18 AVAGO profile_default 1000MR1 + false 19 AVAGO profile_default 1000MR1 + false 20 AVAGO profile_default 1000MR1 + false 21 AVAGO profile_default 1000MR1 + false 22 AVAGO profile_default 1000MR1 + false 23 AVAGO profile_default 1000MR1 + false 24 AVAGO profile_default 1000MR1 + false 25 AVAGO profile_default 1000MR1 + false 26 AVAGO profile_default 1000MR1 + false 27 AVAGO profile_default 1000MR1 + false 28 AVAGO profile_default 1000MR1 + false 29 AVAGO profile_default 1000MR1 + false 30 AVAGO profile_default 1000MR1 + false 31 AVAGO profile_default 1000MR1 + false 32 AVAGO profile_default 1000MR1 + false 33 AVAGO profile_default 1000MR1 + false 34 AVAGO profile_default 1000MR1 + false 35 AVAGO profile_default 1000MR1 + false 36 AVAGO profile_default 1000MR1 + false 37 AVAGO profile_default 1000MR1 + false 38 AVAGO profile_default 1000MR1 + false 39 AVAGO profile_default 1000MR1 + false 40 AVAGO profile_default 1000MR1 + false 49 AVAGO profile_default 10GR1 + false 50 AVAGO profile_default 10GR1 + false 53 AVAGO profile_default 25GR2 + false 55 AVAGO profile_default 25GR2 + false 57 AVAGO profile_default 25GR2 + false diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 index 63460edb35f8..2e3f0e0342dd 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 @@ -1 +1 @@ -afe146bae79635a1513eba92343210b6 \ No newline at end of file +bb2f27ac93e33103554948dee6f3a1f1 \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml index d9ea4a9e233b..30c2712f2a37 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + @@ -239,8 +239,8 @@ enumeration Tx parameter type - atten - atten + pre + pre 0 @@ -248,75 +248,10 @@ post 1 - - pre - pre - 2 - - - pre2 - pre2 - 3 - - - pre3 - pre3 - 4 - peak peak - 5 - - - main - main - 6 - - - txAmpAdjEn - txAmpAdjEn - 7 - - - emph0 - emph0 - 8 - - - emph1 - emph1 - 9 - - - txAmpShft - txAmpShft - 10 - - - txEmphEn - txEmphEn - 11 - - - txEmphEn1 - txEmphEn1 - 12 - - - txAmpAdj - txAmpAdj - 13 - - - slewCtrlEn - slewCtrlEn - 14 - - - slewRate - slewRate - 15 + 2 @@ -324,400 +259,180 @@ enumeration Rx parameter type - sqlch - sqlch + dataRate + dataRate 0 - DC - DC + res1Sel + res1Sel 1 - LF - LF + res2Sel + res2Sel 2 - HF - HF + cap1Sel + cap1Sel 3 - gainShape1 - gainShape1 + cap2Sel + cap2Sel 4 - gainShape2 - gainShape2 + minCap + minCap 5 - shortChannelEn - shortChannelEn + minCapN + minCapN + 6 + + + sumfBoostTargetC0 + sumfBoostTargetC0 7 - bfLf - bfLf + sumfBoostTargetC1 + sumfBoostTargetC1 8 - bfHf - bfHf + sumfBoostTargetC2 + sumfBoostTargetC2 9 - minLf - minLf + midpointPhaseOs0 + midpointPhaseOs0 10 - maxLf - maxLf + midpointPhaseOs1 + midpointPhaseOs1 11 - minHf - minHf + midpointPhaseOs2 + midpointPhaseOs2 12 - - maxHf - maxHf - 13 - - - minPre1 - minPre1 - 14 - - - maxPre1 - maxPre1 - 15 - - - minPre2 - minPre2 - 16 - - - maxPre2 - - 17 - - - minPost - minPost - 18 - - - maxPost - maxPost - 19 - - - squelch - squelch - 20 - - - termination - termination - 27 - - - coldEnvelope - coldEnvelope - 35 - - - hotEnvelope - hotEnvelope - 36 - - - dcGain - dcGain - 37 - - - bandWidth - bandWidth - 38 - - - dfe - dfe - 39 - - - ffeR - ffeR - 40 - - - ffeC - ffeC - 41 - - - sampler - sampler - 42 - - - align90 - align90 - 43 - - - ffeS - ffeS - 44 - - - resSel - resSel - 45 - - - resShift - resShift - 46 - - - capSel - capSel - 47 - - - ffeSettingForce - ffeSettingForce - 48 - - - adaptedResSel - adaptedResSel - 49 - - - adaptedCapSel - adaptedCapSel - 50 - selmufi selmufi - 51 + 13 selmuff selmuff - 52 + 14 selmupi selmupi - 53 + 15 selmupf selmupf - 54 - - - slewRateCtrl0 - slewRateCtrl0 - 55 - - - slewRateCtrl1 - slewRateCtrl1 - 56 - - - EO - EO - 57 - - - dataRate - dataRate - 58 - - - res1Sel - res1Sel - 59 - - - res2Sel - res2Sel - 60 - - - cap1Sel - cap1Sel - 61 - - - cap2Sel - cap2Sel - 62 + 16 midpointLargeThresKLane midpointLargeThresKLane - 63 + 17 midpointSmallThresKLane midpointSmallThresKLane - 64 + 18 midpointLargeThresCLane midpointLargeThresCLane - 65 + 19 midpointSmallThresCLane midpointSmallThresCLane - 66 + 20 + + + inxSumfMidpointAdatptiveEnLane + inxSumfMidpointAdatptiveEnLane + 21 dfeResF0aHighThresInitLane dfeResF0aHighThresInitLane - 67 + 22 dfeResF0aHighThresEndLane dfeResF0aHighThresEndLane - 68 - - - current1Sel - current1Sel - 69 - - - rl1Sel - rl1Sel - 70 + 23 - rl1Extra - rl1Extra - 71 - - - cl1Ctrl - cl1Ctrl - 72 - - - enMidFreq - enMidFreq - 73 - - - cs1Mid - cs1Mid - 74 - - - rs1Mid - rs1Mid - 75 - - - rfCtrl - rfCtrl - 76 - - - rl1TiaSel - rl1TiaSel - 77 - - - rl1TiaExtra - rl1TiaExtra - 78 - - - hpfRSel1st - hpfRSel1st - 79 - - - current1TiaSel - current1TiaSel - 80 - - - rl2Tune - rl2Tune - 81 - - - rl2Sel - rl2Sel - 82 + squelch + squelch + 24 - rs2Sel - rs2Sel - 83 + align90 + align90 + 25 - current2Sel - current2Sel - 84 + sampler + sampler + 26 - hpfRsel2nd - hpfRsel2nd - 85 + slewRateCtrl0 + slewRateCtrl0 + 27 - BW - BW - 86 + slewRateCtrl1 + slewRateCtrl1 + 28 - dfeGAIN - dfeGAIN - 87 + EO + EO + 29 - dfeGAIN2 - dfeGAIN2 - 88 + minCap1 + minCap1 + 30 - pre1 - pre1 - 89 + maxCap1 + maxCap1 + 31 - pre2 - pre2 - 90 + minRes1 + minRes1 + 32 - post1 - post1 - 91 + maxRes1 + maxRes1 + 33 boolean-type enumeration - Boolean 32 bits , due to bing endian + Boolean 32 bits , due to big endian false False @@ -764,33 +479,6 @@ 5 - - uint8-type - uint32 - Uint8 32 bits , due to bing endian - 0 - 255 - - - serdes-termination-type - enumeration - RX termination mode - - GND - Enabled - 0 - - - VDD - Disabled - 1 - - - FLOATING - RS FEC enabled - 2 - - port-interconnect-profile-type enumeration @@ -870,174 +558,203 @@ AVAGO profile_default 1000MR1 + false 2 AVAGO profile_default 1000MR1 + false 3 AVAGO profile_default 1000MR1 + false 4 AVAGO profile_default 1000MR1 + false 5 AVAGO profile_default 1000MR1 + false 6 AVAGO profile_default 1000MR1 + false 7 AVAGO profile_default 1000MR1 + false 8 AVAGO profile_default 1000MR1 + false 9 AVAGO profile_default 1000MR1 + false 10 AVAGO profile_default 1000MR1 + false 11 AVAGO profile_default 1000MR1 + false 12 AVAGO profile_default 1000MR1 + false 13 AVAGO profile_default 1000MR1 + false 14 AVAGO profile_default 1000MR1 + false 15 AVAGO profile_default 1000MR1 + false 16 AVAGO profile_default 1000MR1 + false 41 AVAGO profile_default 1000MR1 + false 42 AVAGO profile_default 1000MR1 + false 43 AVAGO profile_default 1000MR1 + false 44 AVAGO profile_default 1000MR1 + false 45 AVAGO profile_default 1000MR1 + false 46 AVAGO profile_default 1000MR1 + false 47 AVAGO profile_default 1000MR1 + false 48 AVAGO profile_default 1000MR1 + false 51 AVAGO profile_default 10GR1 + false 52 AVAGO profile_default 10GR1 + false 53 AVAGO profile_default 25GR2 + false 55 AVAGO profile_default 25GR2 + false 57 AVAGO profile_default 25GR2 + false diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 index 6405ae29196c..410763693907 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 @@ -1 +1 @@ -e9257245632ec82a066bef433451b17f \ No newline at end of file +411f788b1a253e5ad2e0e9026d0bb1aa \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml index 4c89ace68533..fe782eb5ce97 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + @@ -519,7 +519,28 @@ 1 + + asic-type + enumeration + ASIC Type + + ASIC_AC3X + AC3X + 0 + + + ASIC_AC5X + AC5X + 1 + + + ASIC_Falcon + FALCON + 2 + + + ASIC_AC3X AC3X @@ -593,7 +614,6 @@ TCAM_ROUTER_BASED 0 - MID_L3_MID_L2_NO_EM false diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 index 3f32972fed77..97def7a90484 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 @@ -1 +1 @@ -999d0a26c697a35601fcef34127c216d \ No newline at end of file +e56672c96f9a00b3652bdbe8a4ec4a23 \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml index ca34f67ad124..43dde6b94705 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + @@ -36,6 +36,36 @@ 2 + + InDropCounter-type + enumeration + Router In Drop Reason Feature Options + + TTL_HOPLIMIT_EXCEEDED + Router In Drop Counters track TTL & Hop Limit Exceeded Packets + 0 + + + ROUTE_BLACKHOLE + Router In Drop Counters track Route Black Hole Packets + 1 + + + + Feature-enable + enumeration + Feature Enabled/Disabled + + Disabled + Disabled + 0 + + + Enabled + Enabled + 1 + + log-dest-file-path-type string @@ -62,6 +92,11 @@ ACLs for control packet handling 2 + + debug-counter-acl + ACLs for Debug Counters + 3 + ingress-acl-stage-type @@ -126,13 +161,15 @@ AC5X 1 + + ASIC_Falcon + FALCON + 2 + ASIC_AC3X ASK-Board-M0-48x1G-4x10G.xml - - false - 1 @@ -405,9 +442,7 @@ 1024 - - 4096 - + 4096 SAI_LOG_SYSLOG diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2 index 4862eca56c23..f911a0e58054 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2 +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2 @@ -28,19 +28,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm index bb75db8b984b..6f07539f976c 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm @@ -8,6 +8,8 @@ dma_desc_aggregator_chain_length_max.BCM8885X=1000 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1 dma_desc_aggregator_timeout_usec.BCM8885X=1000 dport_map_direct.BCM8885X=1 +programmability_image_name.BCM8885X=standard_1 +programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt dtm_flow_mapping_mode_region_64.BCM8885X=3 dtm_flow_mapping_mode_region_65.BCM8885X=3 dtm_flow_mapping_mode_region_66.BCM8885X=3 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/pg_profile_lookup.ini index e8289ab03112..5670401e02f1 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/pg_profile_lookup.ini +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/pg_profile_lookup.ini @@ -1,17 +1,17 @@ # PG lossless profiles. # speed cable size xon xoff threshold xon_offset - 40000 300m 1280 2560 69632 0 1280 - 100000 300m 1280 2560 110592 0 1280 - 400000 300m 1280 2560 315392 0 1280 - 40000 1000m 1280 2560 114688 0 1280 - 100000 1000m 1280 2560 225280 0 1280 - 400000 1000m 1280 2560 778240 0 1280 - 40000 2000m 1280 2560 184320 0 1280 - 100000 2000m 1280 2560 393216 0 1280 - 400000 2000m 1280 2560 1445888 0 1280 - 40000 80000m 1280 2560 5369856 0 1280 - 100000 80000m 1280 2560 13357056 0 1280 - 400000 80000m 1280 2560 53305344 0 1280 - 40000 120000m 1280 2560 8028160 0 1280 - 100000 120000m 1280 2560 20004864 0 1280 - 400000 120000m 1280 2560 79900672 0 1280 + 40000 300m 0 2560 69632 -6 181753 + 100000 300m 0 2560 110592 -6 363506 + 400000 300m 0 2560 315392 -6 1454025 + 40000 1000m 0 2560 114688 -6 181753 + 100000 1000m 0 2560 225280 -6 363506 + 400000 1000m 0 2560 778240 -6 1454025 + 40000 2000m 0 2560 184320 -6 181753 + 100000 2000m 0 2560 393216 -6 363506 + 400000 2000m 0 2560 1445888 -6 1454025 + 40000 80000m 0 2560 5369856 -6 181753 + 100000 80000m 0 2560 13357056 -6 363506 + 400000 80000m 0 2560 53305344 -6 1454025 + 40000 120000m 0 2560 8028160 -6 181753 + 100000 120000m 0 2560 20004864 -6 363506 + 400000 120000m 0 2560 79900672 -6 1454025 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2 index 4862eca56c23..f911a0e58054 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2 +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2 @@ -28,19 +28,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm index d97725a266f8..a1419db8fd64 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm @@ -8,6 +8,8 @@ dma_desc_aggregator_chain_length_max.BCM8885X=1000 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1 dma_desc_aggregator_timeout_usec.BCM8885X=1000 dport_map_direct.BCM8885X=1 +programmability_image_name.BCM8885X=standard_1 +programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt dtm_flow_mapping_mode_region_64.BCM8885X=3 dtm_flow_mapping_mode_region_65.BCM8885X=3 dtm_flow_mapping_mode_region_66.BCM8885X=3 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/pg_profile_lookup.ini index e8289ab03112..b1dd17d9dab9 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/pg_profile_lookup.ini +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/pg_profile_lookup.ini @@ -1,17 +1,17 @@ # PG lossless profiles. # speed cable size xon xoff threshold xon_offset - 40000 300m 1280 2560 69632 0 1280 - 100000 300m 1280 2560 110592 0 1280 - 400000 300m 1280 2560 315392 0 1280 - 40000 1000m 1280 2560 114688 0 1280 - 100000 1000m 1280 2560 225280 0 1280 - 400000 1000m 1280 2560 778240 0 1280 - 40000 2000m 1280 2560 184320 0 1280 - 100000 2000m 1280 2560 393216 0 1280 - 400000 2000m 1280 2560 1445888 0 1280 - 40000 80000m 1280 2560 5369856 0 1280 - 100000 80000m 1280 2560 13357056 0 1280 - 400000 80000m 1280 2560 53305344 0 1280 - 40000 120000m 1280 2560 8028160 0 1280 - 100000 120000m 1280 2560 20004864 0 1280 - 400000 120000m 1280 2560 79900672 0 1280 + 40000 300m 0 2560 69632 -6 181753 + 100000 300m 0 2560 110592 -6 363506 + 400000 300m 0 2560 315392 -6 1454025 + 40000 1000m 0 2560 114688 -6 181753 + 100000 1000m 0 2560 225280 -6 363506 + 400000 1000m 0 2560 778240 -6 1454025 + 40000 2000m 0 2560 184320 -6 181753 + 100000 2000m 0 2560 393216 -6 363506 + 400000 2000m 0 2560 1445888 -6 1454025 + 40000 80000m 0 2560 5369856 -6 181753 + 100000 80000m 0 2560 13357056 -6 363506 + 400000 80000m 0 2560 53305344 -6 1454025 + 40000 120000m 0 2560 8028160 -6 181753 + 100000 120000m 0 2560 20004864 -6 363506 + 400000 120000m 0 2560 79900672 -6 1454025 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_monitor_config.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_monitor_config.json index 2d641f92ac89..7c360948fcf5 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_monitor_config.json +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_monitor_config.json @@ -5,6 +5,6 @@ "monPollThreshRecovery": 8, "monPollThreshIsolation": 1, "monCapacityThreshWarn": 85, - "monState": enable + "monState": "enable" } } diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2 index f6ceecc55411..cf0e02f6d7c8 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2 +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2 @@ -28,19 +28,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm index a14241358841..fa5849f4549f 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm @@ -8,6 +8,8 @@ dma_desc_aggregator_chain_length_max.BCM8885X=1000 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1 dma_desc_aggregator_timeout_usec.BCM8885X=1000 dport_map_direct.BCM8885X=1 +programmability_image_name.BCM8885X=standard_1 +programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc dtm_flow_mapping_mode_region_64.BCM8885X=3 dtm_flow_mapping_mode_region_65.BCM8885X=3 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/pg_profile_lookup.ini index e8289ab03112..99fbd830e291 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/pg_profile_lookup.ini +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/pg_profile_lookup.ini @@ -1,17 +1,17 @@ # PG lossless profiles. # speed cable size xon xoff threshold xon_offset - 40000 300m 1280 2560 69632 0 1280 - 100000 300m 1280 2560 110592 0 1280 - 400000 300m 1280 2560 315392 0 1280 - 40000 1000m 1280 2560 114688 0 1280 - 100000 1000m 1280 2560 225280 0 1280 - 400000 1000m 1280 2560 778240 0 1280 - 40000 2000m 1280 2560 184320 0 1280 - 100000 2000m 1280 2560 393216 0 1280 - 400000 2000m 1280 2560 1445888 0 1280 - 40000 80000m 1280 2560 5369856 0 1280 - 100000 80000m 1280 2560 13357056 0 1280 - 400000 80000m 1280 2560 53305344 0 1280 - 40000 120000m 1280 2560 8028160 0 1280 - 100000 120000m 1280 2560 20004864 0 1280 - 400000 120000m 1280 2560 79900672 0 1280 + 40000 300m 0 2560 69632 -5 181753 + 100000 300m 0 2560 110592 -5 363506 + 400000 300m 0 2560 315392 -5 1454025 + 40000 1000m 0 2560 114688 -5 181753 + 100000 1000m 0 2560 225280 -5 363506 + 400000 1000m 0 2560 778240 -5 1454025 + 40000 2000m 0 2560 184320 -5 181753 + 100000 2000m 0 2560 393216 -5 363506 + 400000 2000m 0 2560 1445888 -5 1454025 + 40000 80000m 0 2560 5369856 -5 181753 + 100000 80000m 0 2560 13357056 -5 363506 + 400000 80000m 0 2560 53305344 -5 1454025 + 40000 120000m 0 2560 8028160 -5 181753 + 100000 120000m 0 2560 20004864 -5 363506 + 400000 120000m 0 2560 79900672 -5 1454025 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2 index f6ceecc55411..cf0e02f6d7c8 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2 +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2 @@ -28,19 +28,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, {%- endmacro %} diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm index dc8f73ae62d7..ccb87e9ad0e9 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm @@ -8,6 +8,8 @@ dma_desc_aggregator_chain_length_max.BCM8885X=1000 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1 dma_desc_aggregator_timeout_usec.BCM8885X=1000 dport_map_direct.BCM8885X=1 +programmability_image_name.BCM8885X=standard_1 +programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc dtm_flow_mapping_mode_region_64.BCM8885X=3 dtm_flow_mapping_mode_region_65.BCM8885X=3 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/pg_profile_lookup.ini index e8289ab03112..99fbd830e291 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/pg_profile_lookup.ini +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/pg_profile_lookup.ini @@ -1,17 +1,17 @@ # PG lossless profiles. # speed cable size xon xoff threshold xon_offset - 40000 300m 1280 2560 69632 0 1280 - 100000 300m 1280 2560 110592 0 1280 - 400000 300m 1280 2560 315392 0 1280 - 40000 1000m 1280 2560 114688 0 1280 - 100000 1000m 1280 2560 225280 0 1280 - 400000 1000m 1280 2560 778240 0 1280 - 40000 2000m 1280 2560 184320 0 1280 - 100000 2000m 1280 2560 393216 0 1280 - 400000 2000m 1280 2560 1445888 0 1280 - 40000 80000m 1280 2560 5369856 0 1280 - 100000 80000m 1280 2560 13357056 0 1280 - 400000 80000m 1280 2560 53305344 0 1280 - 40000 120000m 1280 2560 8028160 0 1280 - 100000 120000m 1280 2560 20004864 0 1280 - 400000 120000m 1280 2560 79900672 0 1280 + 40000 300m 0 2560 69632 -5 181753 + 100000 300m 0 2560 110592 -5 363506 + 400000 300m 0 2560 315392 -5 1454025 + 40000 1000m 0 2560 114688 -5 181753 + 100000 1000m 0 2560 225280 -5 363506 + 400000 1000m 0 2560 778240 -5 1454025 + 40000 2000m 0 2560 184320 -5 181753 + 100000 2000m 0 2560 393216 -5 363506 + 400000 2000m 0 2560 1445888 -5 1454025 + 40000 80000m 0 2560 5369856 -5 181753 + 100000 80000m 0 2560 13357056 -5 363506 + 400000 80000m 0 2560 53305344 -5 1454025 + 40000 120000m 0 2560 8028160 -5 181753 + 100000 120000m 0 2560 20004864 -5 363506 + 400000 120000m 0 2560 79900672 -5 1454025 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_monitor_config.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_monitor_config.json index 2d641f92ac89..7c360948fcf5 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_monitor_config.json +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_monitor_config.json @@ -5,6 +5,6 @@ "monPollThreshRecovery": 8, "monPollThreshIsolation": 1, "monCapacityThreshWarn": 85, - "monState": enable + "monState": "enable" } } diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/pmon_daemon_control.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/pmon_daemon_control.json index 74ade4eb97a7..2c63c0851048 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/pmon_daemon_control.json +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/pmon_daemon_control.json @@ -1,3 +1,2 @@ { - "skip_psud": true } diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm index 3ebf67393531..12a0b532fd84 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm @@ -1396,3 +1396,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm index e4b15db2a021..59106ba59387 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm @@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm index 6bc3e88c91a3..a481d75a94bf 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm @@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm index 6fcec3b66c3e..2c315e84ac4c 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm @@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm index 2e0aedcc03ba..581b5d76a914 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm @@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm index faea7ed7189a..364690e7ae40 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm @@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm index 8a03f70e4064..d12d791c83e2 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm @@ -1394,3 +1394,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm index 94afa0bc139a..86d9af38e0b2 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm @@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm index 182fdc17615a..0c4b5403bf51 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm @@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm index 199a57b72b9f..1617c40e6ca2 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm @@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm index dac08d72acca..f905a66b2e97 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm @@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm index d60d6a4f7bee..f25c8b10d2a8 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm @@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm index 1b1932a99673..5a824fcde8aa 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm @@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm index 8f7adaaff115..d27ebd282729 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm @@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm index 96ceaa6cfec2..cb8307452b6a 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm @@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm index abc566225a23..184d1136033e 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm @@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1 serdes_qrtt_active_45.0=1 serdes_qrtt_active_46.0=1 serdes_qrtt_active_47.0=1 + +dpp_db_path=/usr/share/bcm/db diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/fabric_monitor_config.json b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/fabric_monitor_config.json index 0476a2c15fd3..acea5cc6bda2 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/fabric_monitor_config.json +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/fabric_monitor_config.json @@ -5,6 +5,6 @@ "monPollThreshRecovery": 8, "monPollThreshIsolation": 1, "monCapacityThreshWarn": 10, - "monState": enable + "monState": "enable" } } diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/hwsku.json b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/hwsku.json new file mode 100644 index 000000000000..a0f9dda6b250 --- /dev/null +++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/hwsku.json @@ -0,0 +1,9 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G", + "autoneg": "on", + "role": "Dpc" + } + } +} diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/port_config.ini b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/port_config.ini new file mode 100644 index 000000000000..6cfe733cb65f --- /dev/null +++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/port_config.ini @@ -0,0 +1,18 @@ +## +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# name lanes alias index +Ethernet0 0,1,2,3 etp1 1 diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/sai.profile b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/sai.profile new file mode 100644 index 000000000000..d86d58acb003 --- /dev/null +++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/sai.profile @@ -0,0 +1,5 @@ +SAI_DUMP_STORE_PATH=/var/log/bluefield/sdk-dumps +SAI_DUMP_STORE_AMOUNT=10 +DASH_ACL_DEFAULT_RULE_ACTION=permit +PORT_LAYOUT=1x400G +HAIRPIN=false diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/default_sku b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/default_sku new file mode 100644 index 000000000000..4653aa86a561 --- /dev/null +++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/default_sku @@ -0,0 +1 @@ +Nvidia-bf3-com-dpu t1-smartswitch diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/installer.conf b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/installer.conf new file mode 100644 index 000000000000..66c2a99a31e4 --- /dev/null +++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/installer.conf @@ -0,0 +1,2 @@ +GRUB_CMDLINE_LINUX="console=ttyAMA1 console=hvc0 console=ttyAMA0 earlycon=pl011,0x13010000 quiet" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="isolcpus=1-13 nohz_full=1-13 rcu_nocbs=1-13" diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pcie.yaml b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pcie.yaml new file mode 100644 index 000000000000..bb2a783fe2bc --- /dev/null +++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pcie.yaml @@ -0,0 +1,47 @@ +- bus: '00' + dev: '00' + fn: '0' + id: a2da + name: 'PCI bridge: Mellanox Technologies MT43244 BlueField-3 SoC Crypto enabled + (rev 01)' +- bus: '01' + dev: '00' + fn: '0' + id: 197b + name: 'PCI bridge: Mellanox Technologies MT43244 Family [BlueField-3 SoC PCIe Bridge] + (rev 01)' +- bus: '02' + dev: '00' + fn: '0' + id: 197b + name: 'PCI bridge: Mellanox Technologies MT43244 Family [BlueField-3 SoC PCIe Bridge] + (rev 01)' +- bus: '02' + dev: '03' + fn: '0' + id: 197b + name: 'PCI bridge: Mellanox Technologies MT43244 Family [BlueField-3 SoC PCIe Bridge] + (rev 01)' +- bus: '03' + dev: '00' + fn: '0' + id: a2dc + name: 'Ethernet controller: Mellanox Technologies MT43244 BlueField-3 integrated + ConnectX-7 network controller (rev 01)' +- bus: '04' + dev: '00' + fn: '0' + id: 197b + name: 'PCI bridge: Mellanox Technologies MT43244 Family [BlueField-3 SoC PCIe Bridge] + (rev 01)' +- bus: '05' + dev: '00' + fn: '0' + id: 197b + name: 'PCI bridge: Mellanox Technologies MT43244 Family [BlueField-3 SoC PCIe Bridge] + (rev 01)' +- bus: '06' + dev: '00' + fn: '0' + id: '5765' + name: 'Non-Volatile memory controller: Device 1f9f:5765 (rev 01)' diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/platform.json b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/platform.json new file mode 100644 index 000000000000..b50809fd4225 --- /dev/null +++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/platform.json @@ -0,0 +1,21 @@ +{ + "chassis": { + "name": "Nvidia-bf3-com-dpu", + "components": [], + "fans": [], + "fan_drawers": [], + "psus": [], + "thermals": [], + "sfps": [] + }, + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1", + "lanes": "0,1,2,3", + "breakout_modes": { + "1x400G": ["etp1"] + } + } + }, + "DPU": {} +} diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/platform_asic b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/platform_asic new file mode 100644 index 000000000000..ce453ec804ad --- /dev/null +++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/platform_asic @@ -0,0 +1 @@ +nvidia-bluefield diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/plugins/ssd_util.py b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/plugins/ssd_util.py new file mode 100644 index 000000000000..22a6f3eca14f --- /dev/null +++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/plugins/ssd_util.py @@ -0,0 +1,10 @@ + +import os + +from sonic_platform_base.sonic_storage.emmc import EmmcUtil +from sonic_platform_base.sonic_storage.ssd import SsdUtil as SsdUtilDefault + +def SsdUtil(diskdev): + if os.path.basename(diskdev).startswith('mmcblk'): + return EmmcUtil(diskdev) + return SsdUtilDefault(diskdev) diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json new file mode 100644 index 000000000000..86f807221ef5 --- /dev/null +++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json @@ -0,0 +1,7 @@ +{ + "skip_ledd": true, + "skip_psud": true, + "skip_fancontrol": true, + "skip_chassisd": true, + "skip_ycabled": true +} diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/system_health_monitoring_config.json b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/system_health_monitoring_config.json new file mode 100644 index 000000000000..fff1c7ca7492 --- /dev/null +++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/system_health_monitoring_config.json @@ -0,0 +1,6 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu", "fan"], + "user_defined_checkers": [], + "polling_interval": 60 +} diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/installer.conf b/device/ufispace/x86_64-ufispace_s6301_56st-r0/installer.conf index 8f9944da69a6..74b02f076689 100644 --- a/device/ufispace/x86_64-ufispace_s6301_56st-r0/installer.conf +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/installer.conf @@ -1,4 +1,4 @@ CONSOLE_PORT=0x3f8 CONSOLE_DEV=0 CONSOLE_SPEED=115200 -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich nomodeset pcie_aspm=off" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx nomodeset pcie_aspm=off" diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pd-plugin.json index 49c09b0a7888..eae9cd37952a 100644 --- a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pd-plugin.json +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pd-plugin.json @@ -21,6 +21,10 @@ "psu_present": { "i2c": + { + "valmap": { "1":true, "0":false } + }, + "bmc": { "valmap": { "1":true, "0":false } } @@ -33,14 +37,15 @@ "valmap": { "1": true, "0":false } } }, + "psu_support_list": [ - {"Mfr_id": "ASPOWER","Model": "U1A-K10150-DRB-13", "Dir": "EXHAUST"}, - {"Mfr_id": "ASPOWER","Model": "U1A-K0150-B-13", "Dir": "INTAKE"}, - {"Mfr_id": "ASPOWER","Model": "U1D-K0150-A-13", "Dir": "EXHAUST"}, - {"Mfr_id": "ASPOWER","Model": "U1D-K0150-B-13", "Dir": "INTAKE"} + {"Manufacturer": "ASPOWER","Name": "U1A-K10150-DRB-13", "MaxSpd": "PSU_AC_FAN_MAX_SPEED", "Dir": "EXHAUST", "Type": "AC" }, + {"Manufacturer": "ASPOWER","Name": "U1A-K0150-B-13", "MaxSpd": "PSU_AC_FAN_MAX_SPEED", "Dir": "INTAKE", "Type": "AC"}, + {"Manufacturer": "ASPOWER","Name": "U1D-K0150-A-13", "MaxSpd": "PSU_DC_FAN_MAX_SPEED", "Dir": "EXHAUST", "Type": "DC"}, + {"Manufacturer": "ASPOWER","Name": "U1D-K0150-B-13", "MaxSpd": "PSU_DC_FAN_MAX_SPEED", "Dir": "INTAKE", "Type": "DC"} ], - "PSU_FAN_MAX_SPEED":"13000" + "valmap": {"PSU_FAN_MAX_SPEED": "13000", "PSU_AC_FAN_MAX_SPEED": "13000", "PSU_DC_FAN_MAX_SPEED":"13000", "DEFAULT_TYPE": "AC"} }, "FAN": @@ -63,15 +68,6 @@ "FAN_MAX_SPEED":"25000" }, - - "LED": - { - "capability": - { - "ro": ["SYS_LED", "FAN_LED", "PSU1_LED", "PSU2_LED"], - "rw": ["ID_LED"] - } - }, "REBOOT_CAUSE": { "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt" diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json index abf83dd93e48..5f906161fe21 100644 --- a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json @@ -24,9 +24,11 @@ "pddf_xcvr" ] }, + "std_perm_kos": [ + "i2c-i801", + "i2c-ismt" + ], "std_kos": [ - "i2c_i801", - "i2c-ismt", "i2c_dev", "i2c_mux_pca954x", "optoe", @@ -41,9 +43,12 @@ "pddf_cpld_driver", "pddf_mux_module", "pddf_xcvr_module", + "pddf_fpgapci_driver", "pddf_xcvr_driver_module", "pddf_psu_driver_module", "pddf_psu_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", "pddf_fan_driver_module", "pddf_fan_module", "pddf_led_module", @@ -51,7 +56,8 @@ ], "custom_kos": [ "x86-64-ufispace-s6301-56st-lpc", - "x86-64-ufispace-s6301-56st-sys-eeprom" + "x86-64-ufispace-s6301-56st-sys-eeprom", + "pddf_custom_psu" ] }, "SYSTEM": { @@ -861,7 +867,19 @@ { "itf":"pmbus", "dev":"PSU1-PMBUS" }, { "itf":"eeprom", "dev":"PSU1-EEPROM" } ] - } + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_present", + "bmc_cmd": "i2cget -y -f 2 0x58 0x0 > /dev/null 2>&1; [ $? -ne 0 ] && echo '0' || echo '1'", + "raw": "1", + "type": "raw" + } + ] + } + } }, "PSU1-PMBUS": { "dev_info": { @@ -877,16 +895,6 @@ "dev_type": "psu_pmbus" }, "attr_list": [ - { - "attr_name": "psu_present", - "attr_devaddr":"0x33", - "attr_devtype": "cpld", - "attr_devname":"CPLD1", - "attr_offset": "0x59", - "attr_mask": "0x1", - "attr_cmpval": "0x0", - "attr_len": "1" - }, { "attr_name": "psu_power_good", "attr_devaddr": "0x33", @@ -951,6 +959,24 @@ "attr_cmpval": "0xff", "attr_len": "2" }, + { + "attr_name": "psu_v_out_min", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa4", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out_max", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa5", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, { "attr_name": "psu_i_out", "attr_devaddr": "0x58", @@ -969,6 +995,15 @@ "attr_cmpval": "0xff", "attr_len": "2" }, + { + "attr_name": "psu_p_out_max", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa7", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, { "attr_name": "psu_fan1_speed_rpm", "attr_devaddr": "0x58", @@ -1026,7 +1061,19 @@ { "itf":"pmbus", "dev":"PSU2-PMBUS" }, { "itf":"eeprom", "dev":"PSU2-EEPROM" } ] - } + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_present", + "bmc_cmd": "i2cget -y -f 2 0x59 0x0 > /dev/null 2>&1; [ $? -ne 0 ] && echo '0' || echo '1'", + "raw": "1", + "type": "raw" + } + ] + } + } }, "PSU2-PMBUS": { "dev_info": { @@ -1042,16 +1089,6 @@ "dev_type": "psu_pmbus" }, "attr_list": [ - { - "attr_name": "psu_present", - "attr_devaddr":"0x33", - "attr_devtype": "cpld", - "attr_devname":"CPLD1", - "attr_offset": "0x59", - "attr_mask": "0x2", - "attr_cmpval": "0x0", - "attr_len": "1" - }, { "attr_name": "psu_power_good", "attr_devaddr": "0x33", @@ -1116,6 +1153,24 @@ "attr_cmpval": "0xff", "attr_len": "2" }, + { + "attr_name": "psu_v_out_min", + "attr_devaddr": "0x59", + "attr_devtype": "pmbus", + "attr_offset": "0xa4", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out_max", + "attr_devaddr": "0x59", + "attr_devtype": "pmbus", + "attr_offset": "0xa5", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, { "attr_name": "psu_i_out", "attr_devaddr": "0x59", @@ -1134,6 +1189,15 @@ "attr_cmpval": "0xff", "attr_len": "2" }, + { + "attr_name": "psu_p_out_max", + "attr_devaddr": "0x59", + "attr_devtype": "pmbus", + "attr_offset": "0xa7", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, { "attr_name": "psu_fan1_speed_rpm", "attr_devaddr": "0x59", @@ -1239,7 +1303,8 @@ "device_name": "SYS_LED" }, "dev_attr": { - "index": "0" + "index": "0", + "flag": "ro" }, "i2c": { "attr_list": [ @@ -1286,13 +1351,14 @@ ] } }, - "ID_LED": { + "LOC_LED": { "dev_info": { "device_type": "LED", "device_name": "LOC_LED" }, "dev_attr": { - "index": "0" + "index": "0", + "flag": "rw" }, "i2c": { "attr_list": [ @@ -1329,7 +1395,8 @@ "device_name": "FAN_LED" }, "dev_attr": { - "index": "0" + "index": "0", + "flag": "ro" }, "i2c": { "attr_list": [ @@ -1382,7 +1449,8 @@ "device_name": "PSU_LED" }, "dev_attr": { - "index": "1" + "index": "1", + "flag": "ro" }, "i2c": { "attr_list": [ @@ -1435,7 +1503,8 @@ "device_name": "PSU_LED" }, "dev_attr": { - "index": "0" + "index": "0", + "flag": "ro" }, "i2c": { "attr_list": [ diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s6301_56st-r0/sensors.conf deleted file mode 100644 index b1a69433405b..000000000000 --- a/device/ufispace/x86_64-ufispace_s6301_56st-r0/sensors.conf +++ /dev/null @@ -1 +0,0 @@ -# libsensors configuration file diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/installer.conf b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/installer.conf index 8f9944da69a6..74b02f076689 100644 --- a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/installer.conf +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/installer.conf @@ -1,4 +1,4 @@ CONSOLE_PORT=0x3f8 CONSOLE_DEV=0 CONSOLE_SPEED=115200 -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich nomodeset pcie_aspm=off" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx nomodeset pcie_aspm=off" diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pd-plugin.json index 81ff5e283bc9..842d9996a0ba 100644 --- a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pd-plugin.json +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pd-plugin.json @@ -55,16 +55,19 @@ "psu_support_list": [ - {"Manufacturer": "FSPGROUP", "Name": "YNEB0450BM", "MaxSpd": "PSU_FAN_MAX_SPEED_AC"}, - {"Manufacturer": "FSPGROUP", "Name": "YNEB0450AM", "MaxSpd": "PSU_FAN_MAX_SPEED_DC"}, - {"Manufacturer": "DELTA", "Name": "DPS-450AB-27", "MaxSpd": "PSU_FAN_MAX_SPEED_AC"}, - {"Manufacturer": "DELTA", "Name": "DPS-450AB-28", "MaxSpd": "PSU_FAN_MAX_SPEED_DC"} + {"Manufacturer": "FSPGROUP", "Name": "YNEB0450BM", "MaxSpd": "PSU_FAN_MAX_SPEED_AC", "Type": "AC"}, + {"Manufacturer": "FSPGROUP", "Name": "YNEB0450AM", "MaxSpd": "PSU_FAN_MAX_SPEED_DC", "Type": "DC"}, + {"Manufacturer": "DELTA", "Name": "DPS-450AB-27", "MaxSpd": "PSU_FAN_MAX_SPEED_AC", "Type": "AC"}, + {"Manufacturer": "DELTA", "Name": "DPS-450AB-28", "MaxSpd": "PSU_FAN_MAX_SPEED_DC", "Type": "DC"}, + {"Manufacturer": "DELTA", "Name": "DPS-450AB-32", "MaxSpd": "PSU_FAN_MAX_SPEED_DC", "Type": "DC"}, + {"Manufacturer": "DELTA", "Name": "DPS-450AB-33", "MaxSpd": "PSU_FAN_MAX_SPEED_AC", "Type": "AC"} ], "valmap": { "PSU_FAN_MAX_SPEED":"20000", "PSU_FAN_MAX_SPEED_AC":"20000", - "PSU_FAN_MAX_SPEED_DC":"18000" + "PSU_FAN_MAX_SPEED_DC":"18000", + "DEFAULT_TYPE": "AC" } }, "FAN": diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json index 7110b2ed6cc3..640a61800ed4 100644 --- a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json @@ -18,9 +18,11 @@ "pddf_xcvr" ] }, + "std_perm_kos": [ + "i2c-i801", + "i2c-ismt" + ], "std_kos": [ - "i2c_i801", - "i2c_ismt", "i2c_dev", "i2c_mux_pca954x", "coretemp", @@ -33,9 +35,12 @@ "pddf_cpld_driver", "pddf_mux_module", "pddf_xcvr_module", + "pddf_fpgapci_driver", "pddf_xcvr_driver_module", "pddf_psu_driver_module", "pddf_psu_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", "pddf_fan_driver_module", "pddf_fan_module", "pddf_led_module", @@ -1907,6 +1912,24 @@ "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", "raw": "1", "type": "raw" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IIN", + "field_pos": "2", + "mult": "1000" } ] } @@ -2030,6 +2053,24 @@ "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", "raw": "1", "type": "raw" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IIN", + "field_pos": "2", + "mult": "1000" } ] } @@ -2463,7 +2504,7 @@ ] } }, - "ID_LED": { + "LOC_LED": { "dev_info": { "device_type": "LED", "device_name": "LOC_LED" diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/sensors.conf deleted file mode 100644 index b1a69433405b..000000000000 --- a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/sensors.conf +++ /dev/null @@ -1 +0,0 @@ -# libsensors configuration file diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/installer.conf b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/installer.conf index 8f9944da69a6..74b02f076689 100644 --- a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/installer.conf +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/installer.conf @@ -1,4 +1,4 @@ CONSOLE_PORT=0x3f8 CONSOLE_DEV=0 CONSOLE_SPEED=115200 -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich nomodeset pcie_aspm=off" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx nomodeset pcie_aspm=off" diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pd-plugin.json index 81ff5e283bc9..842d9996a0ba 100644 --- a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pd-plugin.json +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pd-plugin.json @@ -55,16 +55,19 @@ "psu_support_list": [ - {"Manufacturer": "FSPGROUP", "Name": "YNEB0450BM", "MaxSpd": "PSU_FAN_MAX_SPEED_AC"}, - {"Manufacturer": "FSPGROUP", "Name": "YNEB0450AM", "MaxSpd": "PSU_FAN_MAX_SPEED_DC"}, - {"Manufacturer": "DELTA", "Name": "DPS-450AB-27", "MaxSpd": "PSU_FAN_MAX_SPEED_AC"}, - {"Manufacturer": "DELTA", "Name": "DPS-450AB-28", "MaxSpd": "PSU_FAN_MAX_SPEED_DC"} + {"Manufacturer": "FSPGROUP", "Name": "YNEB0450BM", "MaxSpd": "PSU_FAN_MAX_SPEED_AC", "Type": "AC"}, + {"Manufacturer": "FSPGROUP", "Name": "YNEB0450AM", "MaxSpd": "PSU_FAN_MAX_SPEED_DC", "Type": "DC"}, + {"Manufacturer": "DELTA", "Name": "DPS-450AB-27", "MaxSpd": "PSU_FAN_MAX_SPEED_AC", "Type": "AC"}, + {"Manufacturer": "DELTA", "Name": "DPS-450AB-28", "MaxSpd": "PSU_FAN_MAX_SPEED_DC", "Type": "DC"}, + {"Manufacturer": "DELTA", "Name": "DPS-450AB-32", "MaxSpd": "PSU_FAN_MAX_SPEED_DC", "Type": "DC"}, + {"Manufacturer": "DELTA", "Name": "DPS-450AB-33", "MaxSpd": "PSU_FAN_MAX_SPEED_AC", "Type": "AC"} ], "valmap": { "PSU_FAN_MAX_SPEED":"20000", "PSU_FAN_MAX_SPEED_AC":"20000", - "PSU_FAN_MAX_SPEED_DC":"18000" + "PSU_FAN_MAX_SPEED_DC":"18000", + "DEFAULT_TYPE": "AC" } }, "FAN": diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json index 18d0dd9abe2b..2fb21d277e57 100644 --- a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json @@ -18,9 +18,11 @@ "pddf_xcvr" ] }, + "std_perm_kos": [ + "i2c-i801", + "i2c-ismt" + ], "std_kos": [ - "i2c_i801", - "i2c_ismt", "i2c_dev", "i2c_mux_pca954x", "coretemp", @@ -33,9 +35,12 @@ "pddf_cpld_driver", "pddf_mux_module", "pddf_xcvr_module", + "pddf_fpgapci_driver", "pddf_xcvr_driver_module", "pddf_psu_driver_module", "pddf_psu_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", "pddf_fan_driver_module", "pddf_fan_module", "pddf_led_module", @@ -1907,6 +1912,24 @@ "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", "raw": "1", "type": "raw" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IIN", + "field_pos": "2", + "mult": "1000" } ] } @@ -2030,6 +2053,24 @@ "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", "raw": "1", "type": "raw" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IIN", + "field_pos": "2", + "mult": "1000" } ] } @@ -2463,7 +2504,7 @@ ] } }, - "ID_LED": { + "LOC_LED": { "dev_info": { "device_type": "LED", "device_name": "LOC_LED" diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/sensors.conf deleted file mode 100644 index b1a69433405b..000000000000 --- a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/sensors.conf +++ /dev/null @@ -1 +0,0 @@ -# libsensors configuration file diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/sai.profile b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/sai.profile old mode 100755 new mode 100644 diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/td3-x7-s9110-32x.config.bcm b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/td3-x7-s9110-32x.config.bcm old mode 100755 new mode 100644 diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s9110_32x-r0/custom_led.bin old mode 100755 new mode 100644 diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/installer.conf b/device/ufispace/x86_64-ufispace_s9110_32x-r0/installer.conf index 8f9944da69a6..74b02f076689 100644 --- a/device/ufispace/x86_64-ufispace_s9110_32x-r0/installer.conf +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/installer.conf @@ -1,4 +1,4 @@ CONSOLE_PORT=0x3f8 CONSOLE_DEV=0 CONSOLE_SPEED=115200 -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich nomodeset pcie_aspm=off" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx nomodeset pcie_aspm=off" diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/led_proc_init.soc b/device/ufispace/x86_64-ufispace_s9110_32x-r0/led_proc_init.soc old mode 100755 new mode 100644 diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pd-plugin.json index 775f0c934f05..99e551ed2845 100644 --- a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pd-plugin.json +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pd-plugin.json @@ -45,12 +45,12 @@ }, "psu_support_list": [ - {"Manufacturer": "FSPGROUP","Name": "YNEE0750EM", "MaxSpd": "PSU_AC_FAN_MAX_SPEED"}, - {"Manufacturer": "FSPGROUP","Name": "YNEE0750BM", "MaxSpd": "PSU_AC_FAN_MAX_SPEED"}, - {"Manufacturer": "FSPGROUP","Name": "YNEE0750AM", "MaxSpd": "PSU_DC_FAN_MAX_SPEED"} + {"Manufacturer": "FSPGROUP","Name": "YNEE0750EM", "MaxSpd": "PSU_AC_FAN_MAX_SPEED", "Type":"AC"}, + {"Manufacturer": "FSPGROUP","Name": "YNEE0750BM", "MaxSpd": "PSU_AC_FAN_MAX_SPEED", "Type":"AC"}, + {"Manufacturer": "FSPGROUP","Name": "YNEE0750AM", "MaxSpd": "PSU_DC_FAN_MAX_SPEED", "Type":"DC"} ], - "valmap": {"PSU_AC_FAN_MAX_SPEED": "26500", "PSU_DC_FAN_MAX_SPEED":"29000"} + "valmap": {"PSU_AC_FAN_MAX_SPEED": "26500", "PSU_DC_FAN_MAX_SPEED":"29000", "DEFAULT_TYPE": "AC"} }, "FAN": diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json index d55cf071f5c3..aafa6cc81447 100644 --- a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json @@ -18,9 +18,11 @@ "pddf_xcvr" ] }, + "std_perm_kos": [ + "i2c-i801", + "i2c-ismt" + ], "std_kos": [ - "i2c_i801", - "i2c-ismt", "i2c_dev", "i2c_mux_pca954x", "optoe" @@ -31,9 +33,12 @@ "pddf_cpld_driver", "pddf_mux_module", "pddf_xcvr_module", + "pddf_fpgapci_driver", "pddf_xcvr_driver_module", "pddf_psu_driver_module", "pddf_psu_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", "pddf_fan_driver_module", "pddf_fan_module", "pddf_led_module" @@ -65,7 +70,7 @@ }, "SMBUS1": { "dev_info": { - "device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM" + "device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM" }, "i2c": { "topo_info": { @@ -752,6 +757,24 @@ "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", "raw": "1", "type": "raw" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IIN", + "field_pos": "2", + "mult": "1000" } ] } @@ -875,6 +898,24 @@ "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", "raw": "1", "type": "raw" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IIN", + "field_pos": "2", + "mult": "1000" } ] } @@ -1320,7 +1361,7 @@ ] } }, - "ID_LED": { + "LOC_LED": { "dev_info": { "device_type": "LED", "device_name": "LOC_LED" @@ -1360,7 +1401,7 @@ }, "PORT1": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT1", "device_parent": "MUX3" }, @@ -1459,7 +1500,7 @@ }, "PORT2": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT2", "device_parent": "MUX3" }, @@ -1558,7 +1599,7 @@ }, "PORT3": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT3", "device_parent": "MUX3" }, @@ -1657,7 +1698,7 @@ }, "PORT4": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT4", "device_parent": "MUX3" }, @@ -1756,7 +1797,7 @@ }, "PORT5": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT5", "device_parent": "MUX3" }, @@ -1855,7 +1896,7 @@ }, "PORT6": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT6", "device_parent": "MUX3" }, @@ -1954,7 +1995,7 @@ }, "PORT7": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT7", "device_parent": "MUX3" }, @@ -2053,7 +2094,7 @@ }, "PORT8": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT8", "device_parent": "MUX3" }, @@ -2152,7 +2193,7 @@ }, "PORT9": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT9", "device_parent": "MUX4" }, @@ -2251,7 +2292,7 @@ }, "PORT10": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT10", "device_parent": "MUX4" }, @@ -2350,7 +2391,7 @@ }, "PORT11": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT11", "device_parent": "MUX4" }, @@ -2449,7 +2490,7 @@ }, "PORT12": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT12", "device_parent": "MUX4" }, @@ -2548,7 +2589,7 @@ }, "PORT13": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT13", "device_parent": "MUX4" }, @@ -2647,7 +2688,7 @@ }, "PORT14": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT14", "device_parent": "MUX4" }, @@ -2746,7 +2787,7 @@ }, "PORT15": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT15", "device_parent": "MUX4" }, @@ -2845,7 +2886,7 @@ }, "PORT16": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT16", "device_parent": "MUX4" }, @@ -2944,7 +2985,7 @@ }, "PORT17": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT17", "device_parent": "MUX5" }, @@ -3043,7 +3084,7 @@ }, "PORT18": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT18", "device_parent": "MUX5" }, @@ -3142,7 +3183,7 @@ }, "PORT19": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT19", "device_parent": "MUX5" }, @@ -3241,7 +3282,7 @@ }, "PORT20": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT20", "device_parent": "MUX5" }, @@ -3340,7 +3381,7 @@ }, "PORT21": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT21", "device_parent": "MUX5" }, @@ -3439,7 +3480,7 @@ }, "PORT22": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT22", "device_parent": "MUX5" }, @@ -3538,7 +3579,7 @@ }, "PORT23": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT23", "device_parent": "MUX5" }, @@ -3635,17 +3676,17 @@ ] } }, - "PORT24": { - "dev_info": { - "device_type": "QSFP", - "device_name": "PORT24", - "device_parent": "MUX5" - }, - "dev_attr": { - "dev_idx": "24" - }, - "i2c": { - "interface": [ + "PORT24": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT24", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ { "itf": "eeprom", "dev": "PORT24-EEPROM" @@ -3654,9 +3695,9 @@ "itf": "control", "dev": "PORT24-CTRL" } - ] - } - }, + ] + } + }, "PORT24-EEPROM": { "dev_info": { "device_type": "", @@ -3736,7 +3777,7 @@ }, "PORT25": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT25", "device_parent": "MUX6" }, @@ -3835,7 +3876,7 @@ }, "PORT26": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT26", "device_parent": "MUX6" }, @@ -3934,7 +3975,7 @@ }, "PORT27": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT27", "device_parent": "MUX6" }, @@ -4033,7 +4074,7 @@ }, "PORT28": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT28", "device_parent": "MUX6" }, @@ -4132,7 +4173,7 @@ }, "PORT29": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT29", "device_parent": "MUX6" }, @@ -4231,7 +4272,7 @@ }, "PORT30": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT30", "device_parent": "MUX6" }, @@ -4330,7 +4371,7 @@ }, "PORT31": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT31", "device_parent": "MUX6" }, @@ -4429,7 +4470,7 @@ }, "PORT32": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT32", "device_parent": "MUX6" }, diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json index 4f86b045c858..dec149491308 100644 --- a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json @@ -18,9 +18,11 @@ "pddf_xcvr" ] }, + "std_perm_kos": [ + "i2c-i801", + "i2c-ismt" + ], "std_kos": [ - "i2c_i801", - "i2c-ismt", "i2c_dev", "i2c_mux_pca954x", "optoe" @@ -31,9 +33,12 @@ "pddf_cpld_driver", "pddf_mux_module", "pddf_xcvr_module", + "pddf_fpgapci_driver", "pddf_xcvr_driver_module", "pddf_psu_driver_module", "pddf_psu_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", "pddf_fan_driver_module", "pddf_fan_module", "pddf_led_module" @@ -65,7 +70,7 @@ }, "SMBUS1": { "dev_info": { - "device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM" + "device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM" }, "i2c": { "topo_info": { @@ -752,6 +757,24 @@ "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", "raw": "1", "type": "raw" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IIN", + "field_pos": "2", + "mult": "1000" } ] } @@ -875,6 +898,24 @@ "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", "raw": "1", "type": "raw" + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IIN", + "field_pos": "2", + "mult": "1000" } ] } @@ -1276,7 +1317,7 @@ ] } }, - "ID_LED": { + "LOC_LED": { "dev_info": { "device_type": "LED", "device_name": "LOC_LED" @@ -1316,7 +1357,7 @@ }, "PORT1": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT1", "device_parent": "MUX3" }, @@ -1415,7 +1456,7 @@ }, "PORT2": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT2", "device_parent": "MUX3" }, @@ -1514,7 +1555,7 @@ }, "PORT3": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT3", "device_parent": "MUX3" }, @@ -1613,7 +1654,7 @@ }, "PORT4": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT4", "device_parent": "MUX3" }, @@ -1712,7 +1753,7 @@ }, "PORT5": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT5", "device_parent": "MUX3" }, @@ -1811,7 +1852,7 @@ }, "PORT6": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT6", "device_parent": "MUX3" }, @@ -1910,7 +1951,7 @@ }, "PORT7": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT7", "device_parent": "MUX3" }, @@ -2009,7 +2050,7 @@ }, "PORT8": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT8", "device_parent": "MUX3" }, @@ -2108,7 +2149,7 @@ }, "PORT9": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT9", "device_parent": "MUX4" }, @@ -2207,7 +2248,7 @@ }, "PORT10": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT10", "device_parent": "MUX4" }, @@ -2306,7 +2347,7 @@ }, "PORT11": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT11", "device_parent": "MUX4" }, @@ -2405,7 +2446,7 @@ }, "PORT12": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT12", "device_parent": "MUX4" }, @@ -2504,7 +2545,7 @@ }, "PORT13": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT13", "device_parent": "MUX4" }, @@ -2603,7 +2644,7 @@ }, "PORT14": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT14", "device_parent": "MUX4" }, @@ -2702,7 +2743,7 @@ }, "PORT15": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT15", "device_parent": "MUX4" }, @@ -2801,7 +2842,7 @@ }, "PORT16": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT16", "device_parent": "MUX4" }, @@ -2900,7 +2941,7 @@ }, "PORT17": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT17", "device_parent": "MUX5" }, @@ -2999,7 +3040,7 @@ }, "PORT18": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT18", "device_parent": "MUX5" }, @@ -3098,7 +3139,7 @@ }, "PORT19": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT19", "device_parent": "MUX5" }, @@ -3197,7 +3238,7 @@ }, "PORT20": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT20", "device_parent": "MUX5" }, @@ -3296,7 +3337,7 @@ }, "PORT21": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT21", "device_parent": "MUX5" }, @@ -3395,7 +3436,7 @@ }, "PORT22": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT22", "device_parent": "MUX5" }, @@ -3494,7 +3535,7 @@ }, "PORT23": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT23", "device_parent": "MUX5" }, @@ -3591,17 +3632,17 @@ ] } }, - "PORT24": { - "dev_info": { - "device_type": "QSFP", - "device_name": "PORT24", - "device_parent": "MUX5" - }, - "dev_attr": { - "dev_idx": "24" - }, - "i2c": { - "interface": [ + "PORT24": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT24", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ { "itf": "eeprom", "dev": "PORT24-EEPROM" @@ -3610,9 +3651,9 @@ "itf": "control", "dev": "PORT24-CTRL" } - ] - } - }, + ] + } + }, "PORT24-EEPROM": { "dev_info": { "device_type": "", @@ -3692,7 +3733,7 @@ }, "PORT25": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT25", "device_parent": "MUX6" }, @@ -3791,7 +3832,7 @@ }, "PORT26": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT26", "device_parent": "MUX6" }, @@ -3890,7 +3931,7 @@ }, "PORT27": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT27", "device_parent": "MUX6" }, @@ -3989,7 +4030,7 @@ }, "PORT28": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT28", "device_parent": "MUX6" }, @@ -4088,7 +4129,7 @@ }, "PORT29": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT29", "device_parent": "MUX6" }, @@ -4187,7 +4228,7 @@ }, "PORT30": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT30", "device_parent": "MUX6" }, @@ -4286,7 +4327,7 @@ }, "PORT31": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT31", "device_parent": "MUX6" }, @@ -4385,7 +4426,7 @@ }, "PORT32": { "dev_info": { - "device_type": "QSFP", + "device_type": "QSFP28", "device_name": "PORT32", "device_parent": "MUX6" }, diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s9110_32x-r0/sensors.conf deleted file mode 100644 index 29e3604b4127..000000000000 --- a/device/ufispace/x86_64-ufispace_s9110_32x-r0/sensors.conf +++ /dev/null @@ -1 +0,0 @@ -# libsensors configuration file \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/td4-s9300-32x400G.config.yml b/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/td4-s9300-32x400G.config.yml old mode 100644 new mode 100755 index a661adfdc4a4..a96a322940a5 --- a/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/td4-s9300-32x400G.config.yml +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/td4-s9300-32x400G.config.yml @@ -1,4 +1,4 @@ -#r1.0.0 +#r1.0.2 # # BCM56880 32x400g port configuration. # @@ -26,7 +26,6 @@ device: CORE_CLK_FREQ: CLK_1350MHZ # PP CLOCK FREQUENCY PP_CLK_FREQ: CLK_1350MHZ - VARIANT: DNA_4_9_5_0 ... --- device: @@ -35,12 +34,6 @@ device: FP_ING_OPERMODE: GLOBAL_PIPE_AWARE ... --- -device: - 0: - TM_SCHEDULER_CONFIG: - NUM_MC_Q: NUM_MC_Q_4 -... ---- bcm_device: 0: global: @@ -249,7 +242,7 @@ device: SPEED: 400000 NUM_LANES: 8 FEC_MODE: PC_FEC_RS544_2XN - LINK_TRAINING: 1 + LINK_TRAINING: 0 MAX_FRAME_SIZE: 9416 ? PORT_ID: [38, # Management port 0 (Pipe 1) diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s9300_32d-r0/custom_led.bin index 1cbd43d6a5f1..968e54a03e12 100644 Binary files a/device/ufispace/x86_64-ufispace_s9300_32d-r0/custom_led.bin and b/device/ufispace/x86_64-ufispace_s9300_32d-r0/custom_led.bin differ diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/installer.conf b/device/ufispace/x86_64-ufispace_s9300_32d-r0/installer.conf index 8f9944da69a6..81844d3a8259 100644 --- a/device/ufispace/x86_64-ufispace_s9300_32d-r0/installer.conf +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/installer.conf @@ -1,4 +1,4 @@ CONSOLE_PORT=0x3f8 CONSOLE_DEV=0 CONSOLE_SPEED=115200 -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich nomodeset pcie_aspm=off" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=i40e,gpio_ich,qat_c3xxx nomodeset pcie_aspm=off" diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pd-plugin.json index 5467dad66382..c741940a1c14 100644 --- a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pd-plugin.json +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pd-plugin.json @@ -27,7 +27,7 @@ }, "bmc": { - "valmap": { "0x0280|":true, "0x0180|":false } + "valmap": { "Device Present":true, "Device Absent":false } } }, @@ -39,7 +39,7 @@ }, "bmc": { - "valmap": { "0x0280|":true, "0x0180|":false } + "valmap": { "State Asserted":true, "State Deasserted":false } } }, @@ -50,7 +50,7 @@ "valmap": { "F2B":"EXHAUST", "B2F":"INTAKE" } } }, - + "DEFAULT_TYPE": "AC", "PSU_FAN_MAX_SPEED":"30000" }, diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pddf-device.json index 90cf4037b92c..dbb64c7dbc91 100644 --- a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pddf-device.json +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pddf-device.json @@ -18,6 +18,10 @@ "pddf_xcvr" ] }, + "std_perm_kos": [ + "igb", + "i40e" + ], "std_kos": [ "i2c_i801", "i2c_dev", @@ -32,9 +36,12 @@ "pddf_cpld_driver", "pddf_mux_module", "pddf_xcvr_module", + "pddf_fpgapci_driver", "pddf_xcvr_driver_module", "pddf_psu_driver_module", "pddf_psu_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", "pddf_fan_driver_module", "pddf_fan_module", "pddf_led_module", @@ -141,13 +148,6 @@ "raw": "0", "field_name": "TEMP_CPU_PECI", "field_pos": "18" - }, - { - "attr_name": "temp1_low_threshold", - "bmc_cmd": "ipmitool sensor", - "raw": "0", - "field_name": "TEMP_CPU_PECI", - "field_pos": "16" } ] } @@ -185,14 +185,7 @@ "raw": "0", "field_name": "TEMP_CPU_ENV", "field_pos": "18" - }, - { - "attr_name": "temp1_low_threshold", - "bmc_cmd": "ipmitool sensor", - "raw": "0", - "field_name": "TEMP_CPU_ENV", - "field_pos": "16" - } + } ] } } @@ -229,13 +222,6 @@ "raw": "0", "field_name": "TEMP_CPU_ENV_2", "field_pos": "18" - }, - { - "attr_name": "temp1_low_threshold", - "bmc_cmd": "ipmitool sensor", - "raw": "0", - "field_name": "TEMP_CPU_ENV_2", - "field_pos": "16" } ] } @@ -273,13 +259,6 @@ "raw": "0", "field_name": "TEMP_MAC_ENV", "field_pos": "18" - }, - { - "attr_name": "temp1_low_threshold", - "bmc_cmd": "ipmitool sensor", - "raw": "0", - "field_name": "TEMP_MAC_ENV", - "field_pos": "16" } ] } @@ -317,13 +296,6 @@ "raw": "0", "field_name": "TEMP_MAC_DIE", "field_pos": "18" - }, - { - "attr_name": "temp1_low_threshold", - "bmc_cmd": "ipmitool sensor", - "raw": "0", - "field_name": "TEMP_MAC_DIE", - "field_pos": "16" } ] } @@ -361,13 +333,6 @@ "raw": "0", "field_name": "TEMP_CAGE", "field_pos": "18" - }, - { - "attr_name": "temp1_low_threshold", - "bmc_cmd": "ipmitool sensor", - "raw": "0", - "field_name": "TEMP_CAGE", - "field_pos": "16" } ] } @@ -405,13 +370,6 @@ "raw": "0", "field_name": "TEMP_PSU_CONN", "field_pos": "18" - }, - { - "attr_name": "temp1_low_threshold", - "bmc_cmd": "ipmitool sensor", - "raw": "0", - "field_name": "TEMP_PSU_CONN", - "field_pos": "16" } ] } @@ -1116,72 +1074,96 @@ "attr_list": [ { "attr_name": "psu_present", - "bmc_cmd": "ipmitool sensor", + "bmc_cmd": "ipmitool sdr -c get PSU0_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", "raw": "0", "field_name": "PSU0_PRSNT_L", - "field_pos": "7" + "field_pos": "5", + "separator": "," }, { "attr_name": "psu_power_good", - "bmc_cmd": "ipmitool sensor", + "bmc_cmd": "ipmitool sdr -c get PSU0_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", "raw": "0", "field_name": "PSU0_PWROK_H", - "field_pos": "7" + "field_pos": "5", + "separator": "," }, { "attr_name": "psu_v_out", - "bmc_cmd": "ipmitool sensor", + "bmc_cmd": "ipmitool sdr -c get PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", "raw": "0", "field_name": "PSU0_VOUT", - "field_pos": "3", - "mult": "1000" + "field_pos": "2", + "mult": "1000", + "separator": "," }, { "attr_name": "psu_i_out", - "bmc_cmd": "ipmitool sensor", + "bmc_cmd": "ipmitool sdr -c get PSU0_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", "raw": "0", "field_name": "PSU0_IOUT", - "field_pos": "3", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IIN", + "field_pos": "2", "mult": "1000" }, { "attr_name": "psu_temp1_input", - "bmc_cmd": "ipmitool sensor", + "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", "raw": "0", "field_name": "PSU0_TEMP", - "field_pos": "3", - "mult": "1000" + "field_pos": "2", + "mult": "1000", + "separator": "," }, { "attr_name": "psu_fan1_speed_rpm", - "bmc_cmd": "ipmitool sensor", + "bmc_cmd": "ipmitool sdr -c get PSU0_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", "raw": "0", "field_name": "PSU0_FAN1", - "field_pos": "3" + "field_pos": "2", + "separator": "," }, { "attr_name": "psu_mfr_id", - "bmc_cmd": "ipmitool fru print 1 | tr -s ' ' | cut -d' ' -f3-5", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", "raw": "0", + "separator": ":", "field_name": "Manufacturer", - "field_pos": "3", - "delimiter": ":" + "field_pos": "2" }, { "attr_name": "psu_model_name", - "bmc_cmd": "ipmitool fru print 1 | tr -s ' ' | cut -d' ' -f3-5", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", "raw": "0", + "separator": ":", "field_name": "Name", - "field_pos": "3", - "delimiter": ":" + "field_pos": "2" }, { "attr_name": "psu_serial_num", - "bmc_cmd": "ipmitool fru print 1 | tr -s ' ' | cut -d' ' -f3-5", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", "raw": "0", + "separator": ":", "field_name": "Serial", - "field_pos": "3", - "delimiter": ":" + "field_pos": "2" }, { "attr_name": "psu_fan1_dir", @@ -1211,72 +1193,96 @@ "attr_list": [ { "attr_name": "psu_present", - "bmc_cmd": "ipmitool sensor", + "bmc_cmd": "ipmitool sdr -c get PSU1_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", "raw": "0", "field_name": "PSU1_PRSNT_L", - "field_pos": "7" + "field_pos": "5", + "separator": "," }, { "attr_name": "psu_power_good", - "bmc_cmd": "ipmitool sensor", + "bmc_cmd": "ipmitool sdr -c get PSU1_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", "raw": "0", "field_name": "PSU1_PWROK_H", - "field_pos": "7" + "field_pos": "5", + "separator": "," }, { "attr_name": "psu_v_out", - "bmc_cmd": "ipmitool sensor", + "bmc_cmd": "ipmitool sdr -c get PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", "raw": "0", "field_name": "PSU1_VOUT", - "field_pos": "3", - "mult": "1000" + "field_pos": "2", + "mult": "1000", + "separator": "," }, { "attr_name": "psu_i_out", - "bmc_cmd": "ipmitool sensor", + "bmc_cmd": "ipmitool sdr -c get PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", "raw": "0", "field_name": "PSU1_IOUT", - "field_pos": "3", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IIN", + "field_pos": "2", "mult": "1000" }, { "attr_name": "psu_temp1_input", - "bmc_cmd": "ipmitool sensor", + "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", "raw": "0", "field_name": "PSU1_TEMP", - "field_pos": "3", - "mult": "1000" + "field_pos": "2", + "mult": "1000", + "separator": "," }, { "attr_name": "psu_fan1_speed_rpm", - "bmc_cmd": "ipmitool sensor", + "bmc_cmd": "ipmitool sdr -c get PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", "raw": "0", "field_name": "PSU1_FAN1", - "field_pos": "3" + "field_pos": "2", + "separator": "," }, { "attr_name": "psu_mfr_id", - "bmc_cmd": "ipmitool fru print 2 | tr -s ' ' | cut -d' ' -f3-5", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", "raw": "0", + "separator": ":", "field_name": "Manufacturer", - "field_pos": "3", - "delimiter": ":" + "field_pos": "2" }, { "attr_name": "psu_model_name", - "bmc_cmd": "ipmitool fru print 2 | tr -s ' ' | cut -d' ' -f3-5", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", "raw": "0", + "separator": ":", "field_name": "Name", - "field_pos": "3", - "delimiter": ":" + "field_pos": "2" }, { "attr_name": "psu_serial_num", - "bmc_cmd": "ipmitool fru print 2 | tr -s ' ' | cut -d' ' -f3-5", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", "raw": "0", + "separator": ":", "field_name": "Serial", - "field_pos": "3", - "delimiter": ":" + "field_pos": "2" }, { "attr_name": "psu_fan1_dir", @@ -1679,7 +1685,7 @@ ] } }, - "ID_LED": { + "LOC_LED": { "dev_info": { "device_type": "LED", "device_name": "LOC_LED" diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform_components.json new file mode 100644 index 000000000000..30f8635ca822 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform_components.json @@ -0,0 +1,13 @@ +{ + "chassis": { + "x86_64-ufispace_s9300_32d-r0": { + "component": { + "CPLD1": { }, + "CPLD2": { }, + "CPLD3": { }, + "BIOS": { }, + "BMC": {} + } + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/hwsku.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/hwsku.json new file mode 100644 index 000000000000..066985e74dd5 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/hwsku.json @@ -0,0 +1,140 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet8": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet16": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet24": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet32": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet40": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet48": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet56": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet64": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet72": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet80": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet88": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet96": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet104": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet112": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet120": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet128": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet136": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet144": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet152": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet160": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet168": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet176": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet184": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet192": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet200": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet208": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet216": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet224": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet232": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet240": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet248": { + "default_brkout_mode": "1x400G" + }, + + "Ethernet256": { + "default_brkout_mode": "1x10G" + }, + + "Ethernet257": { + "default_brkout_mode": "1x10G" + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/port_config.ini b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/port_config.ini new file mode 100644 index 000000000000..9bbc85e114fb --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/port_config.ini @@ -0,0 +1,35 @@ +# name lanes alias index speed +Ethernet0 1,2,3,4,5,6,7,8 Ethernet1/1 0 400000 +Ethernet8 9,10,11,12,13,14,15,16 Ethernet2/1 1 400000 +Ethernet16 17,18,19,20,21,22,23,24 Ethernet3/1 2 400000 +Ethernet24 25,26,27,28,29,30,31,32 Ethernet4/1 3 400000 +Ethernet32 33,34,35,36,37,38,39,40 Ethernet5/1 4 400000 +Ethernet40 41,42,43,44,45,46,47,48 Ethernet6/1 5 400000 +Ethernet48 49,50,51,52,53,54,55,56 Ethernet7/1 6 400000 +Ethernet56 57,58,59,60,61,62,63,64 Ethernet8/1 7 400000 +Ethernet64 65,66,67,68,69,70,71,72 Ethernet9/1 8 400000 +Ethernet72 73,74,75,76,77,78,79,80 Ethernet10/1 9 400000 +Ethernet80 81,82,83,84,85,86,87,88 Ethernet11/1 10 400000 +Ethernet88 89,90,91,92,93,94,95,96 Ethernet12/1 11 400000 +Ethernet96 97,98,99,100,101,102,103,104 Ethernet13/1 12 400000 +Ethernet104 105,106,107,108,109,110,111,112 Ethernet14/1 13 400000 +Ethernet112 113,114,115,116,117,118,119,120 Ethernet15/1 14 400000 +Ethernet120 121,122,123,124,125,126,127,128 Ethernet16/1 15 400000 +Ethernet128 129,130,131,132,133,134,135,136 Ethernet17/1 16 400000 +Ethernet136 137,138,139,140,141,142,143,144 Ethernet18/1 17 400000 +Ethernet144 145,146,147,148,149,150,151,152 Ethernet19/1 18 400000 +Ethernet152 153,154,155,156,157,158,159,160 Ethernet20/1 19 400000 +Ethernet160 161,162,163,164,165,166,167,168 Ethernet21/1 20 400000 +Ethernet168 169,170,171,172,173,174,175,176 Ethernet22/1 21 400000 +Ethernet176 177,178,179,180,181,182,183,184 Ethernet23/1 22 400000 +Ethernet184 185,186,187,188,189,190,191,192 Ethernet24/1 23 400000 +Ethernet192 193,194,195,196,197,198,199,200 Ethernet25/1 24 400000 +Ethernet200 201,202,203,204,205,206,207,208 Ethernet26/1 25 400000 +Ethernet208 209,210,211,212,213,214,215,216 Ethernet27/1 26 400000 +Ethernet216 217,218,219,220,221,222,223,224 Ethernet28/1 27 400000 +Ethernet224 225,226,227,228,229,230,231,232 Ethernet29/1 28 400000 +Ethernet232 233,234,235,236,237,238,239,240 Ethernet30/1 29 400000 +Ethernet240 241,242,243,244,245,246,247,248 Ethernet31/1 30 400000 +Ethernet248 249,250,251,252,253,254,255,256 Ethernet32/1 31 400000 +Ethernet256 257 Ethernet33 32 10000 +Ethernet257 258 Ethernet34 33 10000 diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/sai.profile b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/sai.profile new file mode 100644 index 000000000000..19d521413bc9 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-s9301-32x400G.config.bcm diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/th3-s9301-32x400G.config.bcm b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/th3-s9301-32x400G.config.bcm new file mode 100644 index 000000000000..6f6e84b4d20b --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/th3-s9301-32x400G.config.bcm @@ -0,0 +1,284 @@ +# r1.0.0 +sai_tunnel_global_sip_mask_enable=1 +bcm_tunnel_term_compatible_mode=1 +sai_tunnel_support=0 + +pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff9fffe + +ccm_dma_enable=0 +ccmdma_intr_enable=0 +mem_cache_enable=0 +parity_correction=0 +parity_enable=0 +phy_enable=0 +phy_null=1 + +core_clock_frequency=1325 +dpr_clock_frequency=1000 +device_clock_frequency=1325 +port_flex_enable=1 +load_firmware=0x2 + +portmap_1=1:400 +portmap_5=9:400 +portmap_9=17:400 +portmap_13=25:400 + +portmap_19=259:10 + +portmap_20=33:400 +portmap_24=41:400 +portmap_28=49:400 +portmap_32=57:400 + +portmap_38=257:10 +#portmap_38=257:10:1 + +portmap_39=260:10 + +portmap_40=65:400 +portmap_44=73:400 +portmap_48=81:400 +portmap_52=89:400 + +portmap_59=261:10 + +portmap_60=97:400 +portmap_64=105:400 +portmap_68=113:400 +portmap_72=121:400 + +portmap_79=262:10 + +portmap_80=129:400 +portmap_84=137:400 +portmap_88=145:400 +portmap_92=153:400 + +portmap_99=263:10 + +portmap_100=161:400 +portmap_104=169:400 +portmap_108=177:400 +portmap_112=185:400 + +portmap_118=258:10 +#portmap_118=258:10:1 + +portmap_119=264:10 + +portmap_120=193:400 +portmap_124=201:400 +portmap_128=209:400 +portmap_132=217:400 + +portmap_139=265:10 + +portmap_140=225:400 +portmap_144=233:400 +portmap_148=241:400 +portmap_152=249:400 + +portmap_159=266:10 + +port_fec_cd=9 + + +phy_chain_rx_lane_map_physical{1}=0x60357412 +phy_chain_tx_lane_map_physical{1}=0x02537164 +serdes_core_rx_polarity_flip_physical{1}=0x53 +serdes_core_tx_polarity_flip_physical{1}=0xa5 + +phy_chain_rx_lane_map_physical{9}=0x31472056 +phy_chain_tx_lane_map_physical{9}=0x51306274 +serdes_core_rx_polarity_flip_physical{9}=0x1e +serdes_core_tx_polarity_flip_physical{9}=0x7d + +phy_chain_rx_lane_map_physical{17}=0x21347065 +phy_chain_tx_lane_map_physical{17}=0x73046512 +serdes_core_rx_polarity_flip_physical{17}=0x78 +serdes_core_tx_polarity_flip_physical{17}=0x1d + +phy_chain_rx_lane_map_physical{25}=0x36507124 +phy_chain_tx_lane_map_physical{25}=0x45102736 +serdes_core_rx_polarity_flip_physical{25}=0xb0 +serdes_core_tx_polarity_flip_physical{25}=0x46 + +phy_chain_rx_lane_map_physical{33}=0x27603145 +phy_chain_tx_lane_map_physical{33}=0x06372514 +serdes_core_rx_polarity_flip_physical{33}=0x24 +serdes_core_tx_polarity_flip_physical{33}=0x66 + +phy_chain_rx_lane_map_physical{41}=0x20643175 +phy_chain_tx_lane_map_physical{41}=0x65107423 +serdes_core_rx_polarity_flip_physical{41}=0xc3 +serdes_core_tx_polarity_flip_physical{41}=0x5a + +phy_chain_rx_lane_map_physical{49}=0x20653174 +phy_chain_tx_lane_map_physical{49}=0x65217043 +serdes_core_rx_polarity_flip_physical{49}=0x27 +serdes_core_tx_polarity_flip_physical{49}=0x92 + +phy_chain_rx_lane_map_physical{57}=0x23417065 +phy_chain_tx_lane_map_physical{57}=0x46102735 +serdes_core_rx_polarity_flip_physical{57}=0x8d +serdes_core_tx_polarity_flip_physical{57}=0x17 + +phy_chain_rx_lane_map_physical{65}=0x32406175 +phy_chain_tx_lane_map_physical{65}=0x26073415 +serdes_core_rx_polarity_flip_physical{65}=0xa6 +serdes_core_tx_polarity_flip_physical{65}=0x4b + +phy_chain_rx_lane_map_physical{73}=0x30642175 +phy_chain_tx_lane_map_physical{73}=0x76415230 +serdes_core_rx_polarity_flip_physical{73}=0x4b +serdes_core_tx_polarity_flip_physical{73}=0x8f + +phy_chain_rx_lane_map_physical{81}=0x21743065 +phy_chain_tx_lane_map_physical{81}=0x42507361 +serdes_core_rx_polarity_flip_physical{81}=0x50 +serdes_core_tx_polarity_flip_physical{81}=0xb2 + +phy_chain_rx_lane_map_physical{89}=0x23407165 +phy_chain_tx_lane_map_physical{89}=0x30147625 +serdes_core_rx_polarity_flip_physical{89}=0x99 +serdes_core_tx_polarity_flip_physical{89}=0x0b + +phy_chain_rx_lane_map_physical{97}=0x10652437 +phy_chain_tx_lane_map_physical{97}=0x76352014 +serdes_core_rx_polarity_flip_physical{97}=0xac +serdes_core_tx_polarity_flip_physical{97}=0xe6 + +phy_chain_rx_lane_map_physical{105}=0x74306521 +phy_chain_tx_lane_map_physical{105}=0x73046215 +serdes_core_rx_polarity_flip_physical{105}=0x96 +serdes_core_tx_polarity_flip_physical{105}=0xaf + +phy_chain_rx_lane_map_physical{113}=0x02741365 +phy_chain_tx_lane_map_physical{113}=0x60425371 +serdes_core_rx_polarity_flip_physical{113}=0x14 +serdes_core_tx_polarity_flip_physical{113}=0xa5 + +phy_chain_rx_lane_map_physical{121}=0x76241503 +phy_chain_tx_lane_map_physical{121}=0x76541320 +serdes_core_rx_polarity_flip_physical{121}=0x59 +serdes_core_tx_polarity_flip_physical{121}=0x5f + +phy_chain_rx_lane_map_physical{129}=0x67351402 +phy_chain_tx_lane_map_physical{129}=0x61047253 +serdes_core_rx_polarity_flip_physical{129}=0x59 +serdes_core_tx_polarity_flip_physical{129}=0x63 + +phy_chain_rx_lane_map_physical{137}=0x21743065 +phy_chain_tx_lane_map_physical{137}=0x61405372 +serdes_core_rx_polarity_flip_physical{137}=0xa5 +serdes_core_tx_polarity_flip_physical{137}=0x31 + +phy_chain_rx_lane_map_physical{145}=0x21743065 +phy_chain_tx_lane_map_physical{145}=0x76503214 +serdes_core_rx_polarity_flip_physical{145}=0x50 +serdes_core_tx_polarity_flip_physical{145}=0x46 + +phy_chain_rx_lane_map_physical{153}=0x10652437 +phy_chain_tx_lane_map_physical{153}=0x42537160 +serdes_core_rx_polarity_flip_physical{153}=0x59 +serdes_core_tx_polarity_flip_physical{153}=0x63 + +phy_chain_rx_lane_map_physical{161}=0x76125340 +phy_chain_tx_lane_map_physical{161}=0x25043716 +serdes_core_rx_polarity_flip_physical{161}=0x6c +serdes_core_tx_polarity_flip_physical{161}=0x1e + +phy_chain_rx_lane_map_physical{169}=0x20743165 +phy_chain_tx_lane_map_physical{169}=0x41507263 +serdes_core_rx_polarity_flip_physical{169}=0xe1 +serdes_core_tx_polarity_flip_physical{169}=0x36 + +phy_chain_rx_lane_map_physical{177}=0x30742165 +phy_chain_tx_lane_map_physical{177}=0x74036125 +serdes_core_rx_polarity_flip_physical{177}=0x9c +serdes_core_tx_polarity_flip_physical{177}=0x58 + +phy_chain_rx_lane_map_physical{185}=0x23406175 +phy_chain_tx_lane_map_physical{185}=0x63127450 +serdes_core_rx_polarity_flip_physical{185}=0x93 +serdes_core_tx_polarity_flip_physical{185}=0x11 + +phy_chain_rx_lane_map_physical{193}=0x23507164 +phy_chain_tx_lane_map_physical{193}=0x75140326 +serdes_core_rx_polarity_flip_physical{193}=0x4d +serdes_core_tx_polarity_flip_physical{193}=0x30 + +phy_chain_rx_lane_map_physical{201}=0x20743165 +phy_chain_tx_lane_map_physical{201}=0x13640275 +serdes_core_rx_polarity_flip_physical{201}=0xe1 +serdes_core_tx_polarity_flip_physical{201}=0x05 + +phy_chain_rx_lane_map_physical{209}=0x30742165 +phy_chain_tx_lane_map_physical{209}=0x03645271 +serdes_core_rx_polarity_flip_physical{209}=0x9c +serdes_core_tx_polarity_flip_physical{209}=0x74 + +phy_chain_rx_lane_map_physical{217}=0x32604175 +phy_chain_tx_lane_map_physical{217}=0x46213750 +serdes_core_rx_polarity_flip_physical{217}=0x53 +serdes_core_tx_polarity_flip_physical{217}=0x2d + +phy_chain_rx_lane_map_physical{225}=0x23471605 +phy_chain_tx_lane_map_physical{225}=0x16304725 +serdes_core_rx_polarity_flip_physical{225}=0x66 +serdes_core_tx_polarity_flip_physical{225}=0xef + +phy_chain_rx_lane_map_physical{233}=0x63051274 +phy_chain_tx_lane_map_physical{233}=0x73046251 +serdes_core_rx_polarity_flip_physical{233}=0x9c +serdes_core_tx_polarity_flip_physical{233}=0xae + +phy_chain_rx_lane_map_physical{241}=0x21473056 +phy_chain_tx_lane_map_physical{241}=0x74503261 +serdes_core_rx_polarity_flip_physical{241}=0x63 +serdes_core_tx_polarity_flip_physical{241}=0x4e + +phy_chain_rx_lane_map_physical{249}=0x76341502 +phy_chain_tx_lane_map_physical{249}=0x45603271 +serdes_core_rx_polarity_flip_physical{249}=0x78 +serdes_core_tx_polarity_flip_physical{249}=0x03 + + +dport_map_enable=1 + +dport_map_port_1=0 +dport_map_port_5=1 +dport_map_port_9=2 +dport_map_port_13=3 +dport_map_port_20=4 +dport_map_port_24=5 +dport_map_port_28=6 +dport_map_port_32=7 +dport_map_port_40=8 +dport_map_port_44=9 +dport_map_port_48=10 +dport_map_port_52=11 +dport_map_port_60=12 +dport_map_port_64=13 +dport_map_port_68=14 +dport_map_port_72=15 +dport_map_port_80=16 +dport_map_port_84=17 +dport_map_port_88=18 +dport_map_port_92=19 +dport_map_port_100=20 +dport_map_port_104=21 +dport_map_port_108=22 +dport_map_port_112=23 +dport_map_port_120=24 +dport_map_port_124=25 +dport_map_port_128=26 +dport_map_port_132=27 +dport_map_port_140=28 +dport_map_port_144=29 +dport_map_port_148=30 +dport_map_port_152=31 + +dport_map_port_38=32 +dport_map_port_118=33 \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/cmicx_customer_led.bin b/device/ufispace/x86_64-ufispace_s9301_32d-r0/cmicx_customer_led.bin new file mode 100644 index 000000000000..1cbd43d6a5f1 Binary files /dev/null and b/device/ufispace/x86_64-ufispace_s9301_32d-r0/cmicx_customer_led.bin differ diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/default_sku b/device/ufispace/x86_64-ufispace_s9301_32d-r0/default_sku new file mode 100644 index 000000000000..90501be97b9d --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/default_sku @@ -0,0 +1 @@ +UFISPACE-S9301-32D t1 diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/fancontrol b/device/ufispace/x86_64-ufispace_s9301_32d-r0/fancontrol new file mode 100644 index 000000000000..1234cd994f3f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH= +DEVNAME= +FCTEMPS= +FCFANS= +MINTEMP= +MAXTEMP= +MINSTART= +MINSTOP= diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/installer.conf b/device/ufispace/x86_64-ufispace_s9301_32d-r0/installer.conf new file mode 100644 index 000000000000..81844d3a8259 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=i40e,gpio_ich,qat_c3xxx nomodeset pcie_aspm=off" diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/led_proc_init.soc b/device/ufispace/x86_64-ufispace_s9301_32d-r0/led_proc_init.soc new file mode 100644 index 000000000000..1c9cb334d98a --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/led_proc_init.soc @@ -0,0 +1,3 @@ +m0 load 0 0x3800 /usr/share/sonic/platform/cmicx_customer_led.bin +led auto on +led start diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pcie.yaml b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pcie.yaml new file mode 100644 index 000000000000..ce0a45f5d626 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pcie.yaml @@ -0,0 +1,742 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '2020' + name: 'Host bridge: Intel Corporation Sky Lake-E DMI3 Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '0' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '1' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '2' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '3' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '4' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '5' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '6' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '7' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '05' + fn: '0' + id: '2024' + name: 'System peripheral: Intel Corporation Sky Lake-E MM/Vt-d Configuration Registers + (rev 04)' +- bus: '00' + dev: '05' + fn: '2' + id: '2025' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS (rev 04)' +- bus: '00' + dev: '05' + fn: '4' + id: '2026' + name: 'PIC: Intel Corporation Sky Lake-E IOAPIC (rev 04)' +- bus: '00' + dev: 08 + fn: '0' + id: '2014' + name: 'System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)' +- bus: '00' + dev: 08 + fn: '1' + id: '2015' + name: 'Performance counters: Intel Corporation Sky Lake-E Ubox Registers (rev 04)' +- bus: '00' + dev: 08 + fn: '2' + id: '2016' + name: 'System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)' +- bus: '00' + dev: '11' + fn: '0' + id: a1ec + name: 'Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM + 0 (rev 04)' +- bus: '00' + dev: '11' + fn: '1' + id: a1ed + name: 'Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM + 1 (rev 04)' +- bus: '00' + dev: '14' + fn: '0' + id: a1af + name: 'USB controller: Intel Corporation C620 Series Chipset Family USB 3.0 xHCI + Controller (rev 04)' +- bus: '00' + dev: '14' + fn: '2' + id: a1b1 + name: 'Signal processing controller: Intel Corporation C620 Series Chipset Family + Thermal Subsystem (rev 04)' +- bus: '00' + dev: '16' + fn: '0' + id: a1ba + name: 'Communication controller: Intel Corporation C620 Series Chipset Family MEI + Controller #1 (rev 04)' +- bus: '00' + dev: '16' + fn: '4' + id: a1be + name: 'Communication controller: Intel Corporation C620 Series Chipset Family MEI + Controller #3 (rev 04)' +- bus: '00' + dev: 1c + fn: '0' + id: a190 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #1 (rev f4)' +- bus: '00' + dev: 1c + fn: '4' + id: a194 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #5 (rev f4)' +- bus: '00' + dev: 1c + fn: '5' + id: a195 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #6 (rev f4)' +- bus: '00' + dev: 1d + fn: '0' + id: a198 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #9 (rev f4)' +- bus: '00' + dev: 1d + fn: '2' + id: a19a + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #11 (rev f4)' +- bus: '00' + dev: 1f + fn: '0' + id: a1c8 + name: 'ISA bridge: Intel Corporation Device a1c8 (rev 04)' +- bus: '00' + dev: 1f + fn: '2' + id: a1a1 + name: 'Memory controller: Intel Corporation C620 Series Chipset Family Power Management + Controller (rev 04)' +- bus: '00' + dev: 1f + fn: '4' + id: a1a3 + name: 'SMBus: Intel Corporation C620 Series Chipset Family SMBus (rev 04)' +- bus: '00' + dev: 1f + fn: '5' + id: a1a4 + name: 'Serial bus controller [0c80]: Intel Corporation C620 Series Chipset Family + SPI Controller (rev 04)' +- bus: '02' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '03' + dev: '00' + fn: '0' + id: '1150' + name: 'PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge (rev 03)' +- bus: '04' + dev: '00' + fn: '0' + id: '2000' + name: 'VGA compatible controller: ASPEED Technology, Inc. ASPEED Graphics Family + (rev 30)' +- bus: '06' + dev: '00' + fn: '0' + id: '0625' + name: 'SATA controller: ASMedia Technology Inc. Device 0625 (rev 01)' +- bus: '16' + dev: '00' + fn: '0' + id: '2030' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)' +- bus: '16' + dev: '01' + fn: '0' + id: '2031' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port B (rev 04)' +- bus: '16' + dev: '02' + fn: '0' + id: '2032' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)' +- bus: '16' + dev: '03' + fn: '0' + id: '2033' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port D (rev 04)' +- bus: '16' + dev: '05' + fn: '0' + id: '2034' + name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)' +- bus: '16' + dev: '05' + fn: '2' + id: '2035' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers + (rev 04)' +- bus: '16' + dev: '05' + fn: '4' + id: '2036' + name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '0' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '1' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '2' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '3' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '4' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '5' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '6' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '7' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '0' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '1' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '2' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '3' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '4' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '5' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '6' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '7' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0a + fn: '0' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0a + fn: '1' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '0' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '1' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '2' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '3' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '4' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '5' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '6' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '7' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '0' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '1' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '2' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '3' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '4' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '5' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '6' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '7' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: '10' + fn: '0' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: '10' + fn: '1' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '0' + id: '2054' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '1' + id: '2055' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '2' + id: '2056' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '3' + id: '2057' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '0' + id: '2080' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '1' + id: '2081' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '2' + id: '2082' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '3' + id: '2083' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '4' + id: '2084' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '5' + id: '2085' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '6' + id: '2086' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '17' + dev: '00' + fn: '0' + id: b880 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM56880 Switch ASIC + (rev 11)' +- bus: '64' + dev: '00' + fn: '0' + id: '2030' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)' +- bus: '64' + dev: '01' + fn: '0' + id: '2031' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port B (rev 04)' +- bus: '64' + dev: '02' + fn: '0' + id: '2032' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)' +- bus: '64' + dev: '03' + fn: '0' + id: '2033' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port D (rev 04)' +- bus: '64' + dev: '05' + fn: '0' + id: '2034' + name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)' +- bus: '64' + dev: '05' + fn: '2' + id: '2035' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers + (rev 04)' +- bus: '64' + dev: '05' + fn: '4' + id: '2036' + name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)' +- bus: '64' + dev: 08 + fn: '0' + id: '2066' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 09 + fn: '0' + id: '2066' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '0' + id: '2040' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '1' + id: '2041' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '2' + id: '2042' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '3' + id: '2043' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '4' + id: '2044' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '5' + id: '2045' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)' +- bus: '64' + dev: 0a + fn: '6' + id: '2046' + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)' +- bus: '64' + dev: 0a + fn: '7' + id: '2047' + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)' +- bus: '64' + dev: 0b + fn: '0' + id: '2048' + name: 'System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)' +- bus: '64' + dev: 0b + fn: '1' + id: '2049' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)' +- bus: '64' + dev: 0b + fn: '2' + id: 204a + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)' +- bus: '64' + dev: 0b + fn: '3' + id: 204b + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)' +- bus: '64' + dev: 0c + fn: '0' + id: '2040' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '1' + id: '2041' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '2' + id: '2042' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '3' + id: '2043' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '4' + id: '2044' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '5' + id: '2045' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)' +- bus: '64' + dev: 0c + fn: '6' + id: '2046' + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)' +- bus: '64' + dev: 0c + fn: '7' + id: '2047' + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)' +- bus: '64' + dev: 0d + fn: '0' + id: '2048' + name: 'System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)' +- bus: '64' + dev: 0d + fn: '1' + id: '2049' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)' +- bus: '64' + dev: 0d + fn: '2' + id: 204a + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)' +- bus: '64' + dev: 0d + fn: '3' + id: 204b + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)' +- bus: b2 + dev: '00' + fn: '0' + id: '2030' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)' +- bus: b2 + dev: '05' + fn: '0' + id: '2034' + name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)' +- bus: b2 + dev: '05' + fn: '2' + id: '2035' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers + (rev 04)' +- bus: b2 + dev: '05' + fn: '4' + id: '2036' + name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)' +- bus: b2 + dev: '12' + fn: '0' + id: 204c + name: 'Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)' +- bus: b2 + dev: '12' + fn: '1' + id: 204d + name: 'Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)' +- bus: b2 + dev: '12' + fn: '2' + id: 204e + name: 'System peripheral: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)' +- bus: b2 + dev: '15' + fn: '0' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b2 + dev: '16' + fn: '0' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b2 + dev: '16' + fn: '4' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b2 + dev: '17' + fn: '0' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b3 + dev: '00' + fn: '0' + id: 37c0 + name: 'PCI bridge: Intel Corporation Device 37c0 (rev 04)' +- bus: b4 + dev: '00' + fn: '0' + id: 37c2 + name: 'PCI bridge: Intel Corporation Device 37c2 (rev 04)' +- bus: b4 + dev: '03' + fn: '0' + id: 37c5 + name: 'PCI bridge: Intel Corporation Device 37c5 (rev 04)' +- bus: b5 + dev: '00' + fn: '0' + id: 37c8 + name: 'Co-processor: Intel Corporation C62x Chipset QuickAssist Technology (rev + 04)' +- bus: b6 + dev: '00' + fn: '0' + id: 37d3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + SFP+ (rev 04)' +- bus: b6 + dev: '00' + fn: '1' + id: 37d3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + SFP+ (rev 04)' +- bus: b6 + dev: '00' + fn: '2' + id: 37ce + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + backplane (rev 04)' +- bus: b6 + dev: '00' + fn: '3' + id: 37ce + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + backplane (rev 04)' diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pd-plugin.json new file mode 100644 index 000000000000..24aa151f89cd --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pd-plugin.json @@ -0,0 +1,86 @@ +{ + + "XCVR": + { + "xcvr_present": + { + "i2c": + { + "valmap-SFP": {"1":true, "0":false }, + "valmap-QSFP-DD": {"1":true, "0":false} + } + + }, + "plug_status": + { + "inserted": "1", + "removed": "0" + } + }, + "PSU": + { + "psu_present": + { + "i2c": + { + "valmap": { "1":true, "0":false } + }, + "bmc": + { + "valmap": { "Device Present":true, "Device Absent":false } + } + }, + + "psu_power_good": + { + "i2c": + { + "valmap": { "1": true, "0":false } + }, + "bmc": + { + "valmap": { "State Asserted":true, "State Deasserted":false } + } + }, + + "psu_fan_dir": + { + "i2c": + { + "valmap": { "F2B":"EXHAUST", "B2F":"INTAKE" } + } + }, + "DEFAULT_TYPE": "AC", + "PSU_FAN_MAX_SPEED":"30000" + }, + + "FAN": + { + "direction": + { + "bmc": + { + "valmap": {"0": "UNKNOW", "1":"INTAKE", "2":"EXHAUST"} + } + }, + + "present": + { + "i2c": + { + "valmap": {"1":true, "0":false} + }, + "bmc": + { + "valmap": { "0x0280|":true, "0x0180|":false } + } + }, + "FAN_R_MAX_SPEED":"32000", + "FAN_F_MAX_SPEED":"36200" + }, + + "REBOOT_CAUSE": + { + "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt" + } +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pddf-device.json new file mode 100644 index 000000000000..ac5052e64593 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pddf-device.json @@ -0,0 +1,5092 @@ +{ + "PLATFORM": { + "num_psus": 2, + "num_fantrays": 6, + "num_fans_pertray": 2, + "num_ports": 34, + "num_temps": 7, + "pddf_dev_types": { + "description": "PDDF supported devices", + "CPLD": [ + "i2c_cpld" + ], + "PSU": [ + "psu_eeprom", + "psu_pmbus" + ], + "PORT_MODULE": [ + "pddf_xcvr" + ] + }, + "std_perm_kos": [ + "igb", + "i40e" + ], + "std_kos": [ + "i2c_i801", + "i2c_dev", + "i2c_mux_pca954x", + "optoe", + "lm75", + "gpio-pca953x" + ], + "pddf_kos": [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_xcvr_module", + "pddf_fpgapci_driver", + "pddf_xcvr_driver_module", + "pddf_psu_driver_module", + "pddf_psu_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_led_module", + "pddf_gpio_module" + ], + "custom_kos": [ + "x86-64-ufispace-s9301-32d-lpc", + "x86-64-ufispace-s9301-32d-sys-eeprom", + "pddf_custom_sysstatus_module" + ] + }, + "SYSTEM": { + "dev_info": { + "device_type": "CPU", + "device_name": "ROOT_COMPLEX", + "device_parent": null + }, + "i2c": { + "CONTROLLERS": [ + { + "dev_name": "i2c-0", + "dev": "SMBUS0" + } + ] + } + }, + "SMBUS0": { + "dev_info": { + "device_type": "SMBUS", + "device_name": "SMBUS0", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x0" + }, + "DEVICES": [ + { + "dev": "EEPROM1" + }, + { + "dev": "MUX1" + }, + { + "dev": "MUX2" + }, + { + "dev": "GPIO1" + } + ] + } + }, + "EEPROM1": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "EEPROM1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x57", + "dev_type": "sys_eeprom" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "TEMP1": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CPU_PECI" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "18" + } + ] + } + } + }, + "TEMP2": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CPU_ENV" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "18" + } + ] + } + } + }, + "TEMP3": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP3", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CPU_ENV2" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "18" + } + ] + } + } + }, + "TEMP4": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP4", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_MAC_ENV" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "18" + } + ] + } + } + }, + "TEMP5": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP5", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_MAC_DIE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "18" + } + ] + } + } + }, + "TEMP6": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP6", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CAGE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "18" + } + ] + } + } + }, + "TEMP7": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP7", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_PSU_CONNTOR" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "18" + } + ] + } + } + }, + "MUX1": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x1", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "1", + "dev": "CPLD1" + }, + { + "chn": "1", + "dev": "CPLD2" + }, + { + "chn": "1", + "dev": "CPLD3" + }, + { + "chn": "4", + "dev": "GPIO2" + } + ] + } + }, + "MUX2": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX2", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x72", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x9", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "MUX3" + }, + { + "chn": "1", + "dev": "MUX4" + }, + { + "chn": "2", + "dev": "MUX5" + }, + { + "chn": "3", + "dev": "MUX6" + }, + { + "chn": "4", + "dev": "PORT33" + }, + { + "chn": "5", + "dev": "PORT34" + } + ] + } + }, + "MUX3": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX3", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x11", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT1" + }, + { + "chn": "1", + "dev": "PORT2" + }, + { + "chn": "2", + "dev": "PORT3" + }, + { + "chn": "3", + "dev": "PORT4" + }, + { + "chn": "4", + "dev": "PORT5" + }, + { + "chn": "5", + "dev": "PORT6" + }, + { + "chn": "6", + "dev": "PORT7" + }, + { + "chn": "7", + "dev": "PORT8" + } + ] + } + }, + "MUX4": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX4", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x19", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT9" + }, + { + "chn": "1", + "dev": "PORT10" + }, + { + "chn": "2", + "dev": "PORT11" + }, + { + "chn": "3", + "dev": "PORT12" + }, + { + "chn": "4", + "dev": "PORT13" + }, + { + "chn": "5", + "dev": "PORT14" + }, + { + "chn": "6", + "dev": "PORT15" + }, + { + "chn": "7", + "dev": "PORT16" + } + ] + } + }, + "MUX5": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX5", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x21", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT17" + }, + { + "chn": "1", + "dev": "PORT18" + }, + { + "chn": "2", + "dev": "PORT19" + }, + { + "chn": "3", + "dev": "PORT20" + }, + { + "chn": "4", + "dev": "PORT21" + }, + { + "chn": "5", + "dev": "PORT22" + }, + { + "chn": "6", + "dev": "PORT23" + }, + { + "chn": "7", + "dev": "PORT24" + } + ] + } + }, + "MUX6": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX6", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x29", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT25" + }, + { + "chn": "1", + "dev": "PORT26" + }, + { + "chn": "2", + "dev": "PORT27" + }, + { + "chn": "3", + "dev": "PORT28" + }, + { + "chn": "4", + "dev": "PORT29" + }, + { + "chn": "5", + "dev": "PORT30" + }, + { + "chn": "6", + "dev": "PORT31" + }, + { + "chn": "7", + "dev": "PORT32" + } + ] + } + }, + "GPIO1": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x77", + "dev_type": "pca9539" + }, + "dev_attr": { + "gpio_base": "0x1f0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO2": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x76", + "dev_type": "pca9539" + }, + "dev_attr": { + "gpio_base": "0x1e0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "CPLD1": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD1", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x30", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD2": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x31", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD3": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD3", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x32", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "SYSSTATUS": { + "dev_info": { + "device_type": "SYSSTAT", + "device_name": "SYSSTATUS" + }, + "dev_attr": {}, + "attr_list": [ + { + "attr_name": "board_info", + "attr_devaddr": "0x30", + "attr_offset": "0x0", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_version", + "attr_devaddr": "0x30", + "attr_offset": "0x2", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_version", + "attr_devaddr": "0x31", + "attr_offset": "0x2", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld3_version", + "attr_devaddr": "0x32", + "attr_offset": "0x2", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "mac_reset", + "attr_devaddr": "0x30", + "attr_offset": "0x40", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "mux_reset", + "attr_devaddr": "0x30", + "attr_offset": "0x46", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "psu_status", + "attr_devaddr": "0x30", + "attr_offset": "0x51", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_0", + "attr_devaddr": "0x30", + "attr_offset": "0x80", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_1", + "attr_devaddr": "0x30", + "attr_offset": "0x81", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "beacon_led", + "attr_devaddr": "0x30", + "attr_offset": "0x84", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "port_led_clr_ctrl", + "attr_devaddr": "0x30", + "attr_offset": "0x85", + "attr_mask": "0xff", + "attr_len": "0x1" + } + ] + }, + "PSU1": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "dev_idx": "1", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_present", + "bmc_cmd": "ipmitool sdr -c get PSU0_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_power_good", + "bmc_cmd": "ipmitool sdr -c get PSU0_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_PWROK_H", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_VOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get PSU0_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_IOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_TEMP", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get PSU0_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_FAN1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan1_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_present", + "bmc_cmd": "ipmitool sdr -c get PSU1_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_power_good", + "bmc_cmd": "ipmitool sdr -c get PSU1_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_PWROK_H", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_VOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_IOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_TEMP", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_FAN1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan1_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "fan1_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN0_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan2_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN1_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan3_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN2_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan4_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN3_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan5_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN4_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan6_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN5_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan1_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN0_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan1_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN0_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan2_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN1_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan2_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN1_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan3_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN2_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan3_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN2_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan4_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN3_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan4_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN3_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan5_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN4_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan5_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN4_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan6_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN5_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan6_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN5_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan1_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan2_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan3_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan4_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f4", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan5_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f5", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan6_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f6", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "SYS_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FAN_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "PSU1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "PSU2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "1", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "LOC_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "LOC_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "blue", + "bits": "2:1", + "descr": "Blue", + "value": "0x02", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "blue_blink", + "bits": "2:1", + "descr": "Blue Blinking", + "value": "0x03", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "off", + "bits": "2", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + } + ] + } + }, + "PORT1": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT1", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, + { + "itf": "control", + "dev": "PORT1-CTRL" + } + ] + } + }, + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x11", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x11", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT2": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT2", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, + { + "itf": "control", + "dev": "PORT2-CTRL" + } + ] + } + }, + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT3": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT3", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, + { + "itf": "control", + "dev": "PORT3-CTRL" + } + ] + } + }, + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT4": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT4", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, + { + "itf": "control", + "dev": "PORT4-CTRL" + } + ] + } + }, + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT5": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT5", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, + { + "itf": "control", + "dev": "PORT5-CTRL" + } + ] + } + }, + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT6": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT6", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, + { + "itf": "control", + "dev": "PORT6-CTRL" + } + ] + } + }, + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT7": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT7", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, + { + "itf": "control", + "dev": "PORT7-CTRL" + } + ] + } + }, + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT8": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT8", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, + { + "itf": "control", + "dev": "PORT8-CTRL" + } + ] + } + }, + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT9": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT9", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, + { + "itf": "control", + "dev": "PORT9-CTRL" + } + ] + } + }, + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT10": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT10", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, + { + "itf": "control", + "dev": "PORT10-CTRL" + } + ] + } + }, + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT11": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT11", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, + { + "itf": "control", + "dev": "PORT11-CTRL" + } + ] + } + }, + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT12": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT12", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, + { + "itf": "control", + "dev": "PORT12-CTRL" + } + ] + } + }, + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT13": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT13", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, + { + "itf": "control", + "dev": "PORT13-CTRL" + } + ] + } + }, + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT14": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT14", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, + { + "itf": "control", + "dev": "PORT14-CTRL" + } + ] + } + }, + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT15": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT15", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, + { + "itf": "control", + "dev": "PORT15-CTRL" + } + ] + } + }, + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT16": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT16", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, + { + "itf": "control", + "dev": "PORT16-CTRL" + } + ] + } + }, + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT17": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT17", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, + { + "itf": "control", + "dev": "PORT17-CTRL" + } + ] + } + }, + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT17-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT18": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT18", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "18" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT18-EEPROM" + }, + { + "itf": "control", + "dev": "PORT18-CTRL" + } + ] + } + }, + "PORT18-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT18-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT19": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT19", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "19" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT19-EEPROM" + }, + { + "itf": "control", + "dev": "PORT19-CTRL" + } + ] + } + }, + "PORT19-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT19-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT20": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT20", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "20" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT20-EEPROM" + }, + { + "itf": "control", + "dev": "PORT20-CTRL" + } + ] + } + }, + "PORT20-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT20-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT21": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT21", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, + { + "itf": "control", + "dev": "PORT21-CTRL" + } + ] + } + }, + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT22": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT22", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, + { + "itf": "control", + "dev": "PORT22-CTRL" + } + ] + } + }, + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT23": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT23", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "23" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT23-EEPROM" + }, + { + "itf": "control", + "dev": "PORT23-CTRL" + } + ] + } + }, + "PORT23-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT24": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT24", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, + { + "itf": "control", + "dev": "PORT24-CTRL" + } + ] + } + }, + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT25": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT25", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, + { + "itf": "control", + "dev": "PORT25-CTRL" + } + ] + } + }, + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT26": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT26", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "26" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT26-EEPROM" + }, + { + "itf": "control", + "dev": "PORT26-CTRL" + } + ] + } + }, + "PORT26-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT26-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT27": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT27", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "27" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT27-EEPROM" + }, + { + "itf": "control", + "dev": "PORT27-CTRL" + } + ] + } + }, + "PORT27-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT27-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT28": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT28", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, + { + "itf": "control", + "dev": "PORT28-CTRL" + } + ] + } + }, + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT29": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT29", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, + { + "itf": "control", + "dev": "PORT29-CTRL" + } + ] + } + }, + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT30": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT30", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "30" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT30-EEPROM" + }, + { + "itf": "control", + "dev": "PORT30-CTRL" + } + ] + } + }, + "PORT30-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT30-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT31": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT31", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, + { + "itf": "control", + "dev": "PORT31-CTRL" + } + ] + } + }, + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT32": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT32", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, + { + "itf": "control", + "dev": "PORT32-CTRL" + } + ] + } + }, + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT33": { + "dev_info": { + "device_type": "SFP", + "device_name": "PORT33", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "33" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT33-EEPROM" + }, + { + "itf": "control", + "dev": "PORT33-CTRL" + } + ] + } + }, + "PORT33-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT33", + "device_parent": "MUX2", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xd", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT33-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-CTRL", + "device_parent": "MUX2", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xd", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1e", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1f", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1d", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x55", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + } + ] + } + }, + "PORT34": { + "dev_info": { + "device_type": "SFP", + "device_name": "PORT34", + "device_parent": "MUX2" + }, + "dev_attr": { + "dev_idx": "34" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT34-EEPROM" + }, + { + "itf": "control", + "dev": "PORT34-CTRL" + } + ] + } + }, + "PORT34-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT34", + "device_parent": "MUX2", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xe", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT34-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT34-CTRL", + "device_parent": "MUX2", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xe", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1e", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1f", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1d", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x55", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + } + ] + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf_support b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf_support new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform.json new file mode 100644 index 000000000000..de873b4d5699 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform.json @@ -0,0 +1,659 @@ +{ + "chassis": { + "name": "S9301-32D", + "components": [ + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + }, + { + "name": "CPLD3" + }, + { + "name": "BIOS" + }, + { + "name": "BMC" + } + ], + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + }, + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + }, + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + }, + { + "name": "Fantray4_1" + }, + { + "name": "Fantray4_2" + }, + { + "name": "Fantray5_1" + }, + { + "name": "Fantray5_2" + }, + { + "name": "Fantray6_1" + }, + { + "name": "Fantray6_2" + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + } + ] + }, + { + "name": "Fantray4", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray4_1" + }, + { + "name": "Fantray4_2" + } + ] + }, + { + "name": "Fantray5", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray5_1" + }, + { + "name": "Fantray5_2" + } + ] + }, + { + "name": "Fantray6", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray6_1" + }, + { + "name": "Fantray6_2" + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "fans": [ + { + "name": "PSU1_FAN1" + } + ], + "thermals": [ + { + "name": "PSU1_TEMP1" + } + ] + }, + { + "name": "PSU2", + "fans": [ + { + "name": "PSU2_FAN1" + } + ], + "thermals": [ + { + "name": "PSU2_TEMP1" + } + ] + } + ], + "thermals": [ + { + "name": "Temp_CPU_PECI" + }, + { + "name": "Temp_CPU_ENV" + }, + { + "name": "Temp_CPU_ENV2" + }, + { + "name": "Temp_CPU_PECI" + }, + { + "name": "Temp_MAC_DIE" + }, + { + "name": "Temp_MAC_ENV" + }, + { + "name": "Temp_PSU_CONNTOR" + } + ], + "sfps": [ + { + "name": "Ethernet0" + }, + { + "name": "Ethernet8" + }, + { + "name": "Ethernet16" + }, + { + "name": "Ethernet24" + }, + { + "name": "Ethernet32" + }, + { + "name": "Ethernet40" + }, + { + "name": "Ethernet48" + }, + { + "name": "Ethernet56" + }, + { + "name": "Ethernet64" + }, + { + "name": "Ethernet72" + }, + { + "name": "Ethernet80" + }, + { + "name": "Ethernet88" + }, + { + "name": "Ethernet96" + }, + { + "name": "Ethernet104" + }, + { + "name": "Ethernet112" + }, + { + "name": "Ethernet120" + }, + { + "name": "Ethernet128" + }, + { + "name": "Ethernet136" + }, + { + "name": "Ethernet144" + }, + { + "name": "Ethernet152" + }, + { + "name": "Ethernet160" + }, + { + "name": "Ethernet168" + }, + { + "name": "Ethernet176" + }, + { + "name": "Ethernet184" + }, + { + "name": "Ethernet192" + }, + { + "name": "Ethernet200" + }, + { + "name": "Ethernet208" + }, + { + "name": "Ethernet216" + }, + { + "name": "Ethernet224" + }, + { + "name": "Ethernet232" + }, + { + "name": "Ethernet240" + }, + { + "name": "Ethernet248" + }, + { + "name": "Ethernet256" + }, + { + "name": "Ethernet257" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "0,0,0,0,0,0,0,0", + "lanes": "1,2,3,4,5,6,7,8", + "breakout_modes": { + "1x400G": ["Eth0(Port0)"], + "2x200G": ["Eth0/1(Port0)", "Eth0/2(Port0)"], + "4x100G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"], + "8x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)", "Eth0/5(Port0)", "Eth0/6(Port0)", "Eth0/7(Port0)", "Eth0/8(Port0)"] + } + }, + + "Ethernet8": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "9,10,11,12,13,14,15,16", + "breakout_modes": { + "1x400G": ["Eth1(Port1)"], + "2x200G": ["Eth1/1(Port1)", "Eth1/2(Port1)"], + "4x100G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"], + "8x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)", "Eth1/5(Port1)", "Eth1/6(Port1)", "Eth1/7(Port1)", "Eth1/8(Port1)"] + } + }, + + "Ethernet16": { + "index": "2,2,2,2,2,2,2,2", + "lanes": "17,18,19,20,21,22,23,24", + "breakout_modes": { + "1x400G": ["Eth2(Port2)"], + "2x200G": ["Eth2/1(Port2)", "Eth2/2(Port2)"], + "4x100G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"], + "8x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)", "Eth2/5(Port2)", "Eth2/6(Port2)", "Eth2/7(Port2)", "Eth2/8(Port2)"] + } + }, + + "Ethernet24": { + "index": "3,3,3,3,3,3,3,3", + "lanes": "25,26,27,28,29,30,31,32", + "breakout_modes": { + "1x400G": ["Eth3(Port3)"], + "2x200G": ["Eth3/1(Port3)", "Eth3/2(Port3)"], + "4x100G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"], + "8x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)", "Eth3/5(Port3)", "Eth3/6(Port3)", "Eth3/7(Port3)", "Eth3/8(Port3)"] + } + }, + + "Ethernet32": { + "index": "4,4,4,4,4,4,4,4", + "lanes": "33,34,35,36,37,38,39,40", + "breakout_modes": { + "1x400G": ["Eth4(Port4)"], + "2x200G": ["Eth4/1(Port4)", "Eth4/2(Port4)"], + "4x100G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"], + "8x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)", "Eth4/5(Port4)", "Eth4/6(Port4)", "Eth4/7(Port4)", "Eth4/8(Port4)"] + } + }, + + "Ethernet40": { + "index": "5,5,5,5,5,5,5,5", + "lanes": "41,42,43,44,45,46,47,48", + "breakout_modes": { + "1x400G": ["Eth5(Port5)"], + "2x200G": ["Eth5/1(Port5)", "Eth5/2(Port5)"], + "4x100G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"], + "8x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)", "Eth5/5(Port5)", "Eth5/6(Port5)", "Eth5/7(Port5)", "Eth5/8(Port5)"] + } + }, + + "Ethernet48": { + "index": "6,6,6,6,6,6,6,6", + "lanes": "49,50,51,52,53,54,55,56", + "breakout_modes": { + "1x400G": ["Eth6(Port6)"], + "2x200G": ["Eth6/1(Port6)", "Eth6/2(Port6)"], + "4x100G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"], + "8x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)", "Eth6/5(Port6)", "Eth6/6(Port6)", "Eth6/7(Port6)", "Eth6/8(Port6)"] + } + }, + + "Ethernet56": { + "index": "7,7,7,7,7,7,7,7", + "lanes": "57,58,59,60,61,62,63,64", + "breakout_modes": { + "1x400G": ["Eth7(Port7)"], + "2x200G": ["Eth7/1(Port7)", "Eth7/2(Port7)"], + "4x100G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"], + "8x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)", "Eth7/5(Port7)", "Eth7/6(Port7)", "Eth7/7(Port7)", "Eth7/8(Port7)"] + } + }, + + "Ethernet64": { + "index": "8,8,8,8,8,8,8,8", + "lanes": "65,66,67,68,69,70,71,72", + "breakout_modes": { + "1x400G": ["Eth8(Port8)"], + "2x200G": ["Eth8/1(Port8)", "Eth8/2(Port8)"], + "4x100G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"], + "8x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)", "Eth8/5(Port8)", "Eth8/6(Port8)", "Eth8/7(Port8)", "Eth8/8(Port8)"] + } + }, + + "Ethernet72": { + "index": "9,9,9,9,9,9,9,9", + "lanes": "73,74,75,76,77,78,79,80", + "breakout_modes": { + "1x400G": ["Eth9(Port9)"], + "2x200G": ["Eth9/1(Port9)", "Eth9/2(Port9)"], + "4x100G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"], + "8x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)", "Eth9/5(Port9)", "Eth9/6(Port9)", "Eth9/7(Port9)", "Eth9/8(Port9)"] + } + }, + + "Ethernet80": { + "index": "10,10,10,10,10,10,10,10", + "lanes": "81,82,83,84,85,86,87,88", + "breakout_modes": { + "1x400G": ["Eth10(Port10)"], + "2x200G": ["Eth10/1(Port10)", "Eth10/2(Port10)"], + "4x100G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"], + "8x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)", "Eth10/5(Port10)", "Eth10/6(Port10)", "Eth10/7(Port10)", "Eth10/8(Port10)"] + } + }, + + "Ethernet88": { + "index": "11,11,11,11,11,11,11,11", + "lanes": "89,90,91,92,93,94,95,96", + "breakout_modes": { + "1x400G": ["Eth11(Port11)"], + "2x200G": ["Eth11/1(Port11)", "Eth11/2(Port11)"], + "4x100G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"], + "8x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)", "Eth11/5(Port11)", "Eth11/6(Port11)", "Eth11/7(Port11)", "Eth11/8(Port11)"] + } + }, + + "Ethernet96": { + "index": "12,12,12,12,12,12,12,12", + "lanes": "97,98,99,100,101,102,103,104", + "breakout_modes": { + "1x400G": ["Eth12(Port12)"], + "2x200G": ["Eth12/1(Port12)", "Eth12/2(Port12)"], + "4x100G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"], + "8x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)", "Eth12/5(Port12)", "Eth12/6(Port12)", "Eth12/7(Port12)", "Eth12/8(Port12)"] + } + }, + + "Ethernet104": { + "index": "13,13,13,13,13,13,13,13", + "lanes": "105,106,107,108,109,110,111,112", + "breakout_modes": { + "1x400G": ["Eth13(Port13)"], + "2x200G": ["Eth13/1(Port13)", "Eth13/2(Port13)"], + "4x100G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"], + "8x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)", "Eth13/5(Port13)", "Eth13/6(Port13)", "Eth13/7(Port13)", "Eth13/8(Port13)"] + } + }, + + "Ethernet112": { + "index": "14,14,14,14,14,14,14,14", + "lanes": "113,114,115,116,117,118,119,120", + "breakout_modes": { + "1x400G": ["Eth14(Port14)"], + "2x200G": ["Eth14/1(Port14)", "Eth14/2(Port14)"], + "4x100G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"], + "8x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)", "Eth14/5(Port14)", "Eth14/6(Port14)", "Eth14/7(Port14)", "Eth14/8(Port14)"] + } + }, + + "Ethernet120": { + "index": "15,15,15,15,15,15,15,15", + "lanes": "121,122,123,124,125,126,127,128", + "breakout_modes": { + "1x400G": ["Eth15(Port15)"], + "2x200G": ["Eth15/1(Port15)", "Eth15/2(Port15)"], + "4x100G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"], + "8x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)", "Eth15/5(Port15)", "Eth15/6(Port15)", "Eth15/7(Port15)", "Eth15/8(Port15)"] + } + }, + + "Ethernet128": { + "index": "16,16,16,16,16,16,16,16", + "lanes": "129,130,131,132,133,134,135,136", + "breakout_modes": { + "1x400G": ["Eth16(Port16)"], + "2x200G": ["Eth16/1(Port16)", "Eth16/2(Port16)"], + "4x100G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"], + "8x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)", "Eth16/5(Port16)", "Eth16/6(Port16)", "Eth16/7(Port16)", "Eth16/8(Port16)"] + } + }, + + "Ethernet136": { + "index": "17,17,17,17,17,17,17,17", + "lanes": "137,138,139,140,141,142,143,144", + "breakout_modes": { + "1x400G": ["Eth17(Port17)"], + "2x200G": ["Eth17/1(Port17)", "Eth17/2(Port17)"], + "4x100G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"], + "8x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)", "Eth17/5(Port17)", "Eth17/6(Port17)", "Eth17/7(Port17)", "Eth17/8(Port17)"] + } + }, + + "Ethernet144": { + "index": "18,18,18,18,18,18,18,18", + "lanes": "145,146,147,148,149,150,151,152", + "breakout_modes": { + "1x400G": ["Eth18(Port18)"], + "2x200G": ["Eth18/1(Port18)", "Eth18/2(Port18)"], + "4x100G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"], + "8x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)", "Eth18/5(Port18)", "Eth18/6(Port18)", "Eth18/7(Port18)", "Eth18/8(Port18)"] + } + }, + + "Ethernet152": { + "index": "19,19,19,19,19,19,19,19", + "lanes": "153,154,155,156,157,158,159,160", + "breakout_modes": { + "1x400G": ["Eth19(Port19)"], + "2x200G": ["Eth19/1(Port19)", "Eth19/2(Port19)"], + "4x100G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"], + "8x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)", "Eth19/5(Port19)", "Eth19/6(Port19)", "Eth19/7(Port19)", "Eth19/8(Port19)"] + } + }, + + "Ethernet160": { + "index": "20,20,20,20,20,20,20,20", + "lanes": "161,162,163,164,165,166,167,168", + "breakout_modes": { + "1x400G": ["Eth20(Port20)"], + "2x200G": ["Eth20/1(Port20)", "Eth20/2(Port20)"], + "4x100G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"], + "8x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)", "Eth20/5(Port20)", "Eth20/6(Port20)", "Eth20/7(Port20)", "Eth20/8(Port20)"] + } + }, + + "Ethernet168": { + "index": "21,21,21,21,21,21,21,21", + "lanes": "169,170,171,172,173,174,175,176", + "breakout_modes": { + "1x400G": ["Eth21(Port21)"], + "2x200G": ["Eth21/1(Port21)", "Eth21/2(Port21)"], + "4x100G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"], + "8x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)", "Eth21/5(Port21)", "Eth21/6(Port21)", "Eth21/7(Port21)", "Eth21/8(Port21)"] + } + }, + + "Ethernet176": { + "index": "22,22,22,22,22,22,22,22", + "lanes": "177,178,179,180,181,182,183,184", + "breakout_modes": { + "1x400G": ["Eth22(Port22)"], + "2x200G": ["Eth22/1(Port22)", "Eth22/2(Port22)"], + "4x100G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"], + "8x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)", "Eth22/5(Port22)", "Eth22/6(Port22)", "Eth22/7(Port22)", "Eth22/8(Port22)"] + } + }, + + "Ethernet184": { + "index": "23,23,23,23,23,23,23,23", + "lanes": "185,186,187,188,189,190,191,192", + "breakout_modes": { + "1x400G": ["Eth23(Port23)"], + "2x200G": ["Eth23/1(Port23)", "Eth23/2(Port23)"], + "4x100G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"], + "8x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)", "Eth23/5(Port23)", "Eth23/6(Port23)", "Eth23/7(Port23)", "Eth23/8(Port23)"] + } + }, + + "Ethernet192": { + "index": "24,24,24,24,24,24,24,24", + "lanes": "193,194,195,196,197,198,199,200", + "breakout_modes": { + "1x400G": ["Eth24(Port24)"], + "2x200G": ["Eth24/1(Port24)", "Eth24/2(Port24)"], + "4x100G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"], + "8x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)", "Eth24/5(Port24)", "Eth24/6(Port24)", "Eth24/7(Port24)", "Eth24/8(Port24)"] + } + }, + + "Ethernet200": { + "index": "25,25,25,25,25,25,25,25", + "lanes": "201,202,203,204,205,206,207,208", + "breakout_modes": { + "1x400G": ["Eth25(Port25)"], + "2x200G": ["Eth25/1(Port25)", "Eth25/2(Port25)"], + "4x100G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"], + "8x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)", "Eth25/5(Port25)", "Eth25/6(Port25)", "Eth25/7(Port25)", "Eth25/8(Port25)"] + } + }, + + "Ethernet208": { + "index": "26,26,26,26,26,26,26,26", + "lanes": "209,210,211,212,213,214,215,216", + "breakout_modes": { + "1x400G": ["Eth26(Port26)"], + "2x200G": ["Eth26/1(Port26)", "Eth26/2(Port26)"], + "4x100G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"], + "8x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)", "Eth26/5(Port26)", "Eth26/6(Port26)", "Eth26/7(Port26)", "Eth26/8(Port26)"] + } + }, + + "Ethernet216": { + "index": "27,27,27,27,27,27,27,27", + "lanes": "217,218,219,220,221,222,223,224", + "breakout_modes": { + "1x400G": ["Eth27(Port27)"], + "2x200G": ["Eth27/1(Port27)", "Eth27/2(Port27)"], + "4x100G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"], + "8x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)", "Eth27/5(Port27)", "Eth27/6(Port27)", "Eth27/7(Port27)", "Eth27/8(Port27)"] + } + }, + + "Ethernet224": { + "index": "28,28,28,28,28,28,28,28", + "lanes": "225,226,227,228,229,230,231,232", + "breakout_modes": { + "1x400G": ["Eth28(Port28)"], + "2x200G": ["Eth28/1(Port28)", "Eth28/2(Port28)"], + "4x100G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"], + "8x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)", "Eth28/5(Port28)", "Eth28/6(Port28)", "Eth28/7(Port28)", "Eth28/8(Port28)"] + } + }, + + "Ethernet232": { + "index": "29,29,29,29,29,29,29,29", + "lanes": "233,234,235,236,237,238,239,240", + "breakout_modes": { + "1x400G": ["Eth29(Port29)"], + "2x200G": ["Eth29/1(Port29)", "Eth29/2(Port29)"], + "4x100G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"], + "8x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)", "Eth29/5(Port29)", "Eth29/6(Port29)", "Eth29/7(Port29)", "Eth29/8(Port29)"] + } + }, + + "Ethernet240": { + "index": "30,30,30,30,30,30,30,30", + "lanes": "241,242,243,244,245,246,247,248", + "breakout_modes": { + "1x400G": ["Eth30(Port30)"], + "2x200G": ["Eth30/1(Port30)", "Eth30/2(Port30)"], + "4x100G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"], + "8x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)", "Eth30/5(Port30)", "Eth30/6(Port30)", "Eth30/7(Port30)", "Eth30/8(Port30)"] + } + }, + + "Ethernet248": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "249,250,251,252,253,254,255,256", + "breakout_modes": { + "1x400G": ["Eth31(Port31)"], + "2x200G": ["Eth31/1(Port31)", "Eth31/2(Port31)"], + "4x100G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"], + "8x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)", "Eth31/5(Port31)", "Eth31/6(Port31)", "Eth31/7(Port31)", "Eth31/8(Port31)"] + } + }, + + "Ethernet256": { + "index": "32", + "lanes": "257", + "breakout_modes": { + "1x10G": ["Eth32(Port32)"] + } + }, + + "Ethernet257": { + "index": "33", + "lanes": "258", + "breakout_modes": { + "1x10G": ["Eth33(Port33)"] + } + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_asic b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_asic new file mode 100644 index 000000000000..960467652765 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_components.json new file mode 100644 index 000000000000..af225f80ccee --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_components.json @@ -0,0 +1,13 @@ +{ + "chassis": { + "x86_64-ufispace_s9301_32d-r0": { + "component": { + "CPLD1": { }, + "CPLD2": { }, + "CPLD3": { }, + "BIOS": { }, + "BMC": {} + } + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_env.conf b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_env.conf new file mode 100644 index 000000000000..03a43af978aa --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_env.conf @@ -0,0 +1 @@ +SYNCD_SHM_SIZE=512m diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pmon_daemon_control.json new file mode 100644 index 000000000000..e348e0168fa5 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pmon_daemon_control.json @@ -0,0 +1,9 @@ +{ + "skip_pcied": false, + "skip_fancontrol": false, + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s9301_32d-r0/sensors.conf new file mode 100644 index 000000000000..7a1c0408810f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/sensors.conf @@ -0,0 +1,9 @@ +# libsensors configuration file + +bus "i2c-0" "I2C I801" +chip "tmp75-i2c-*-4f" + label temp1 "CPU Board Temp" + set temp1_max 70 + set temp1_max_hyst 75 + set temp1_crit 85 + diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..6291e81a0621 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/system_health_monitoring_config.json @@ -0,0 +1,15 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu", + "fan" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "yellow", + "normal": "green", + "booting": "blinking_green" + } +} \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/hwsku.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/hwsku.json new file mode 100644 index 000000000000..c104b8d8c5ec --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/hwsku.json @@ -0,0 +1,101 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x200G" + }, + "Ethernet4": { + "default_brkout_mode": "1x200G" + }, + "Ethernet8": { + "default_brkout_mode": "1x200G" + }, + "Ethernet12": { + "default_brkout_mode": "1x200G" + }, + "Ethernet16": { + "default_brkout_mode": "1x200G" + }, + "Ethernet20": { + "default_brkout_mode": "1x200G" + }, + "Ethernet24": { + "default_brkout_mode": "1x200G" + }, + "Ethernet28": { + "default_brkout_mode": "1x200G" + }, + "Ethernet32": { + "default_brkout_mode": "1x200G" + }, + "Ethernet36": { + "default_brkout_mode": "1x200G" + }, + "Ethernet40": { + "default_brkout_mode": "1x200G" + }, + "Ethernet44": { + "default_brkout_mode": "1x200G" + }, + "Ethernet48": { + "default_brkout_mode": "1x200G" + }, + "Ethernet52": { + "default_brkout_mode": "1x200G" + }, + "Ethernet56": { + "default_brkout_mode": "1x200G" + }, + "Ethernet60": { + "default_brkout_mode": "1x200G" + }, + "Ethernet64": { + "default_brkout_mode": "1x200G" + }, + "Ethernet68": { + "default_brkout_mode": "1x200G" + }, + "Ethernet72": { + "default_brkout_mode": "1x200G" + }, + "Ethernet76": { + "default_brkout_mode": "1x200G" + }, + "Ethernet80": { + "default_brkout_mode": "1x200G" + }, + "Ethernet84": { + "default_brkout_mode": "1x200G" + }, + "Ethernet88": { + "default_brkout_mode": "1x200G" + }, + "Ethernet92": { + "default_brkout_mode": "1x200G" + }, + "Ethernet96": { + "default_brkout_mode": "1x400G" + }, + "Ethernet104": { + "default_brkout_mode": "1x400G" + }, + "Ethernet112": { + "default_brkout_mode": "1x400G" + }, + "Ethernet120": { + "default_brkout_mode": "1x400G" + }, + "Ethernet128": { + "default_brkout_mode": "1x400G" + }, + "Ethernet136": { + "default_brkout_mode": "1x400G" + }, + "Ethernet144": { + "default_brkout_mode": "1x400G" + }, + "Ethernet152": { + "default_brkout_mode": "1x400G" + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/port_config.ini b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/port_config.ini new file mode 100644 index 000000000000..ad745c44db11 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias index speed +Ethernet0 1,2,3,4 Ethernet1/1 0 200000 +Ethernet4 5,6,7,8 Ethernet2/1 1 200000 +Ethernet8 9,10,11,12 Ethernet3/1 2 200000 +Ethernet12 13,14,15,16 Ethernet4/1 3 200000 +Ethernet16 17,18,19,20 Ethernet5/1 4 200000 +Ethernet20 21,22,23,24 Ethernet6/1 5 200000 +Ethernet24 25,26,27,28 Ethernet7/1 6 200000 +Ethernet28 29,30,31,32 Ethernet8/1 7 200000 +Ethernet32 33,34,35,36 Ethernet9/1 8 200000 +Ethernet36 37,38,39,40 Ethernet10/1 9 200000 +Ethernet40 41,42,43,44 Ethernet11/1 10 200000 +Ethernet44 45,46,47,48 Ethernet12/1 11 200000 +Ethernet48 49,50,51,52 Ethernet13/1 12 200000 +Ethernet52 53,54,55,56 Ethernet14/1 13 200000 +Ethernet56 57,58,59,60 Ethernet15/1 14 200000 +Ethernet60 61,62,63,64 Ethernet16/1 15 200000 +Ethernet64 65,66,67,68 Ethernet17/1 16 200000 +Ethernet68 69,70,71,72 Ethernet18/1 17 200000 +Ethernet72 73,74,75,76 Ethernet19/1 18 200000 +Ethernet76 77,78,79,80 Ethernet20/1 19 200000 +Ethernet80 81,82,83,84 Ethernet21/1 20 200000 +Ethernet84 85,86,87,88 Ethernet22/1 21 200000 +Ethernet88 89,90,91,92 Ethernet23/1 22 200000 +Ethernet92 93,94,95,96 Ethernet24/1 23 200000 +Ethernet96 97,98,99,100,101,102,103,104 Ethernet25/1 24 400000 +Ethernet104 105,106,107,108,109,110,111,112 Ethernet26/1 25 400000 +Ethernet112 113,114,115,116,117,118,119,120 Ethernet27/1 26 400000 +Ethernet120 121,122,123,124,125,126,127,128 Ethernet28/1 27 400000 +Ethernet128 129,130,131,132,133,134,135,136 Ethernet29/1 28 400000 +Ethernet136 137,138,139,140,141,142,143,144 Ethernet30/1 29 400000 +Ethernet144 145,146,147,148,149,150,151,152 Ethernet31/1 30 400000 +Ethernet152 153,154,155,156,157,158,159,160 Ethernet32/1 31 400000 diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/sai.profile b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/sai.profile new file mode 100644 index 000000000000..f0f476720805 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td4-s9301-24x200G-8x400G.config.yml diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/td4-s9301-24x200G-8x400G.config.yml b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/td4-s9301-24x200G-8x400G.config.yml new file mode 100755 index 000000000000..149e549bbf6e --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/td4-s9301-24x200G-8x400G.config.yml @@ -0,0 +1,503 @@ +#r1.0.2 +# +# BCM56780 24x200g 8x400g port configuration. +# +# configuration yaml file +# device: +# : +#
: +# ? +# : +# : +# ... +# : +# : +# : +# : +# ... +# : +# + +--- +device: + 0: + DEVICE_CONFIG: + # CORE CLOCK FREQUENCY + CORE_CLK_FREQ: CLK_1350MHZ + # PP CLOCK FREQUENCY + PP_CLK_FREQ: CLK_1350MHZ +... +--- +device: + 0: + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... +--- +bcm_device: + 0: + global: + sai_remap_prio_on_tnl_egress: 1 + global_flexctr_ing_action_num_reserved: 32 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_ing_pool_num_reserved: 12 + global_flexctr_ing_quant_num_reserved: 2 + global_flexctr_ing_op_profile_num_reserved: 32 + l3_intf_vlan_split_egress: 1 + pktio_mode: 1 + bcm_tunnel_term_compatible_mode: 1 + vlan_flooding_l2mc_num_reserved: 0 + l3_alpm_template: 1 + l3_alpm2_bnk_threshold: 100 + l2_hitbit_enable: 0 + uft_mode: 1 + l3_enable: 1 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + sai_tunnel_support: 0 + flexctr_action_reserved_ipmc_hitbit: 1 + sai_nbr_bcast_ifp_optimized: 1 + use_all_splithorizon_groups: 1 + riot_enable: 1 + riot_overlay_l3_intf_mem_size: 8192 + riot_overlay_l3_egress_mem_size: 32768 + l3_ecmp_levels: 2 + riot_overlay_ecmp_resilient_hash_size: 16384 + sai_feat_tail_timestamp: 1 + sai_port_queue_ecn_counter: 1 + sai_field_group_auto_prioritize: 1 +... +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + # CPU port + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + # pipe 0 + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 5 + ? + PORT_ID: 3 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 4 + : + PC_PHYS_PORT_ID: 13 + ? + PORT_ID: 5 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 6 + : + PC_PHYS_PORT_ID: 21 + ? + PORT_ID: 7 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 8 + : + PC_PHYS_PORT_ID: 29 + ? + PORT_ID: 9 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 10 + : + PC_PHYS_PORT_ID: 37 + ? + # pipe 1 + PORT_ID: 20 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 21 + : + PC_PHYS_PORT_ID: 45 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 23 + : + PC_PHYS_PORT_ID: 53 + ? + PORT_ID: 24 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 25 + : + PC_PHYS_PORT_ID: 61 + ? + PORT_ID: 26 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 27 + : + PC_PHYS_PORT_ID: 69 + ? + PORT_ID: 28 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 29 + : + PC_PHYS_PORT_ID: 77 + ? + # pipe 2 + PORT_ID: 40 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 41 + : + PC_PHYS_PORT_ID: 85 + ? + PORT_ID: 42 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 43 + : + PC_PHYS_PORT_ID: 93 + ? + # BC12 400G + PORT_ID: 44 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 45 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 46 + : + PC_PHYS_PORT_ID: 113 + ? + # pipe 3 + PORT_ID: 60 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 61 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 62 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 63 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 64 + : + PC_PHYS_PORT_ID: 153 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: 0 + : + &port_mode_10g + ENABLE: 1 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [[1, 10], + [20, 29], + [40, 43]] + : + &port_mode_200g + ENABLE: 0 + SPEED: 200000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + LINK_TRAINING: 0 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: [[44, 46], + [60, 64]] + : + &port_mode_400g + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN + LINK_TRAINING: 0 + MAX_FRAME_SIZE: 9416 +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0 +... +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32105476 + TX_LANE_MAP: 0x54763210 + RX_POLARITY_FLIP: 0x0f + TX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75043216 + TX_LANE_MAP: 0x32107456 + RX_POLARITY_FLIP: 0x53 + TX_POLARITY_FLIP: 0x5e + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54763210 + TX_LANE_MAP: 0x23104567 + RX_POLARITY_FLIP: 0x4c + TX_POLARITY_FLIP: 0x03 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54763210 + TX_LANE_MAP: 0x23104756 + RX_POLARITY_FLIP: 0x14 + TX_POLARITY_FLIP: 0xa6 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54763210 + TX_LANE_MAP: 0x23104576 + RX_POLARITY_FLIP: 0x0c + TX_POLARITY_FLIP: 0x80 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13206475 + TX_LANE_MAP: 0x46573210 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0xc0 + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13206475 + TX_LANE_MAP: 0x46573210 + RX_POLARITY_FLIP: 0x10 + TX_POLARITY_FLIP: 0xc0 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13206475 + TX_LANE_MAP: 0x46573210 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0xc0 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x05674123 + TX_LANE_MAP: 0x76543210 + RX_POLARITY_FLIP: 0xb5 + TX_POLARITY_FLIP: 0x0e + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45763210 + TX_LANE_MAP: 0x32105476 + RX_POLARITY_FLIP: 0x60 + TX_POLARITY_FLIP: 0x50 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32105476 + TX_LANE_MAP: 0x54763210 + RX_POLARITY_FLIP: 0x4f + TX_POLARITY_FLIP: 0x2f + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x41230567 + TX_LANE_MAP: 0x31207564 + RX_POLARITY_FLIP: 0xa + TX_POLARITY_FLIP: 0x2a + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67243501 + TX_LANE_MAP: 0x53426170 + RX_POLARITY_FLIP: 0x3f + TX_POLARITY_FLIP: 0xC3 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12743065 + TX_LANE_MAP: 0x42537061 + RX_POLARITY_FLIP: 0xd1 + TX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x74126530 + TX_LANE_MAP: 0x02136574 + RX_POLARITY_FLIP: 0x7e + TX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x46352701 + TX_LANE_MAP: 0x27360514 + RX_POLARITY_FLIP: 0x36 + TX_POLARITY_FLIP: 0x61 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x20534167 + TX_LANE_MAP: 0x34250617 + RX_POLARITY_FLIP: 0x7b + TX_POLARITY_FLIP: 0xcc + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x65034721 + TX_LANE_MAP: 0x24351607 + RX_POLARITY_FLIP: 0x74 + TX_POLARITY_FLIP: 0x63 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15473620 + TX_LANE_MAP: 0x57640213 + RX_POLARITY_FLIP: 0xf9 + TX_POLARITY_FLIP: 0x56 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23504167 + TX_LANE_MAP: 0x32056714 + RX_POLARITY_FLIP: 0x65 + TX_POLARITY_FLIP: 0x02 +... + + diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s9301_32db-r0/custom_led.bin new file mode 100755 index 000000000000..6d45222731c4 Binary files /dev/null and b/device/ufispace/x86_64-ufispace_s9301_32db-r0/custom_led.bin differ diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/default_sku b/device/ufispace/x86_64-ufispace_s9301_32db-r0/default_sku new file mode 100644 index 000000000000..0125446bfe48 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/default_sku @@ -0,0 +1 @@ +UFISPACE-S9301-32DB t1 diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/fancontrol b/device/ufispace/x86_64-ufispace_s9301_32db-r0/fancontrol new file mode 100644 index 000000000000..1234cd994f3f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/fancontrol @@ -0,0 +1,10 @@ +# Configuration file generated by pwmconfig, changes will be lost +INTERVAL=10 +DEVPATH= +DEVNAME= +FCTEMPS= +FCFANS= +MINTEMP= +MAXTEMP= +MINSTART= +MINSTOP= diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/installer.conf b/device/ufispace/x86_64-ufispace_s9301_32db-r0/installer.conf new file mode 100644 index 000000000000..81844d3a8259 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=i40e,gpio_ich,qat_c3xxx nomodeset pcie_aspm=off" diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/led_proc_init.soc b/device/ufispace/x86_64-ufispace_s9301_32db-r0/led_proc_init.soc new file mode 100644 index 000000000000..eda09a0dd1f2 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/led_proc_init.soc @@ -0,0 +1,4 @@ +led stop +led load /usr/share/sonic/platform/custom_led.bin +led auto on +led start diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pcie.yaml b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pcie.yaml new file mode 100644 index 000000000000..131d55222657 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pcie.yaml @@ -0,0 +1,741 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '2020' + name: 'Host bridge: Intel Corporation Sky Lake-E DMI3 Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '0' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '1' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '2' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '3' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '4' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '5' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '6' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '04' + fn: '7' + id: '2021' + name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)' +- bus: '00' + dev: '05' + fn: '0' + id: '2024' + name: 'System peripheral: Intel Corporation Sky Lake-E MM/Vt-d Configuration Registers + (rev 04)' +- bus: '00' + dev: '05' + fn: '2' + id: '2025' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS (rev 04)' +- bus: '00' + dev: '05' + fn: '4' + id: '2026' + name: 'PIC: Intel Corporation Sky Lake-E IOAPIC (rev 04)' +- bus: '00' + dev: 08 + fn: '0' + id: '2014' + name: 'System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)' +- bus: '00' + dev: 08 + fn: '1' + id: '2015' + name: 'Performance counters: Intel Corporation Sky Lake-E Ubox Registers (rev 04)' +- bus: '00' + dev: 08 + fn: '2' + id: '2016' + name: 'System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)' +- bus: '00' + dev: '11' + fn: '0' + id: a1ec + name: 'Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM + 0 (rev 04)' +- bus: '00' + dev: '11' + fn: '1' + id: a1ed + name: 'Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM + 1 (rev 04)' +- bus: '00' + dev: '14' + fn: '0' + id: a1af + name: 'USB controller: Intel Corporation C620 Series Chipset Family USB 3.0 xHCI + Controller (rev 04)' +- bus: '00' + dev: '14' + fn: '2' + id: a1b1 + name: 'Signal processing controller: Intel Corporation C620 Series Chipset Family + Thermal Subsystem (rev 04)' +- bus: '00' + dev: '16' + fn: '0' + id: a1ba + name: 'Communication controller: Intel Corporation C620 Series Chipset Family MEI + Controller #1 (rev 04)' +- bus: '00' + dev: '16' + fn: '4' + id: a1be + name: 'Communication controller: Intel Corporation C620 Series Chipset Family MEI + Controller #3 (rev 04)' +- bus: '00' + dev: 1c + fn: '0' + id: a190 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #1 (rev f4)' +- bus: '00' + dev: 1c + fn: '4' + id: a194 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #5 (rev f4)' +- bus: '00' + dev: 1c + fn: '5' + id: a195 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #6 (rev f4)' +- bus: '00' + dev: 1d + fn: '0' + id: a198 + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #9 (rev f4)' +- bus: '00' + dev: 1d + fn: '2' + id: a19a + name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root + Port #11 (rev f4)' +- bus: '00' + dev: 1f + fn: '0' + id: a1c8 + name: 'ISA bridge: Intel Corporation Device a1c8 (rev 04)' +- bus: '00' + dev: 1f + fn: '2' + id: a1a1 + name: 'Memory controller: Intel Corporation C620 Series Chipset Family Power Management + Controller (rev 04)' +- bus: '00' + dev: 1f + fn: '4' + id: a1a3 + name: 'SMBus: Intel Corporation C620 Series Chipset Family SMBus (rev 04)' +- bus: '00' + dev: 1f + fn: '5' + id: a1a4 + name: 'Serial bus controller [0c80]: Intel Corporation C620 Series Chipset Family + SPI Controller (rev 04)' +- bus: '02' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '03' + dev: '00' + fn: '0' + id: '1150' + name: 'PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge (rev 03)' +- bus: '04' + dev: '00' + fn: '0' + id: '2000' + name: 'VGA compatible controller: ASPEED Technology, Inc. ASPEED Graphics Family + (rev 30)' +- bus: '06' + dev: '00' + fn: '0' + id: '0625' + name: 'SATA controller: ASMedia Technology Inc. Device 0625 (rev 01)' +- bus: '16' + dev: '00' + fn: '0' + id: '2030' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)' +- bus: '16' + dev: '01' + fn: '0' + id: '2031' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port B (rev 04)' +- bus: '16' + dev: '02' + fn: '0' + id: '2032' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)' +- bus: '16' + dev: '03' + fn: '0' + id: '2033' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port D (rev 04)' +- bus: '16' + dev: '05' + fn: '0' + id: '2034' + name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)' +- bus: '16' + dev: '05' + fn: '2' + id: '2035' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers + (rev 04)' +- bus: '16' + dev: '05' + fn: '4' + id: '2036' + name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '0' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '1' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '2' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '3' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '4' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '5' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '6' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 08 + fn: '7' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '0' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '1' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '2' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '3' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '4' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '5' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '6' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 09 + fn: '7' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0a + fn: '0' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0a + fn: '1' + id: 208d + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '0' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '1' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '2' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '3' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '4' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '5' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '6' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0e + fn: '7' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '0' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '1' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '2' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '3' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '4' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '5' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '6' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 0f + fn: '7' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: '10' + fn: '0' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: '10' + fn: '1' + id: 208e + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '0' + id: '2054' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '1' + id: '2055' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '2' + id: '2056' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1d + fn: '3' + id: '2057' + name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '0' + id: '2080' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '1' + id: '2081' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '2' + id: '2082' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '3' + id: '2083' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '4' + id: '2084' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '5' + id: '2085' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '16' + dev: 1e + fn: '6' + id: '2086' + name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)' +- bus: '17' + dev: '00' + fn: '0' + id: b780 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b780 (rev 01)' +- bus: '64' + dev: '00' + fn: '0' + id: '2030' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)' +- bus: '64' + dev: '01' + fn: '0' + id: '2031' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port B (rev 04)' +- bus: '64' + dev: '02' + fn: '0' + id: '2032' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)' +- bus: '64' + dev: '03' + fn: '0' + id: '2033' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port D (rev 04)' +- bus: '64' + dev: '05' + fn: '0' + id: '2034' + name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)' +- bus: '64' + dev: '05' + fn: '2' + id: '2035' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers + (rev 04)' +- bus: '64' + dev: '05' + fn: '4' + id: '2036' + name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)' +- bus: '64' + dev: 08 + fn: '0' + id: '2066' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 09 + fn: '0' + id: '2066' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '0' + id: '2040' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '1' + id: '2041' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '2' + id: '2042' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '3' + id: '2043' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '4' + id: '2044' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0a + fn: '5' + id: '2045' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)' +- bus: '64' + dev: 0a + fn: '6' + id: '2046' + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)' +- bus: '64' + dev: 0a + fn: '7' + id: '2047' + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)' +- bus: '64' + dev: 0b + fn: '0' + id: '2048' + name: 'System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)' +- bus: '64' + dev: 0b + fn: '1' + id: '2049' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)' +- bus: '64' + dev: 0b + fn: '2' + id: 204a + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)' +- bus: '64' + dev: 0b + fn: '3' + id: 204b + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)' +- bus: '64' + dev: 0c + fn: '0' + id: '2040' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '1' + id: '2041' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '2' + id: '2042' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '3' + id: '2043' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '4' + id: '2044' + name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller + (rev 04)' +- bus: '64' + dev: 0c + fn: '5' + id: '2045' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)' +- bus: '64' + dev: 0c + fn: '6' + id: '2046' + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)' +- bus: '64' + dev: 0c + fn: '7' + id: '2047' + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)' +- bus: '64' + dev: 0d + fn: '0' + id: '2048' + name: 'System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)' +- bus: '64' + dev: 0d + fn: '1' + id: '2049' + name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)' +- bus: '64' + dev: 0d + fn: '2' + id: 204a + name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)' +- bus: '64' + dev: 0d + fn: '3' + id: 204b + name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)' +- bus: b2 + dev: '00' + fn: '0' + id: '2030' + name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)' +- bus: b2 + dev: '05' + fn: '0' + id: '2034' + name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)' +- bus: b2 + dev: '05' + fn: '2' + id: '2035' + name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers + (rev 04)' +- bus: b2 + dev: '05' + fn: '4' + id: '2036' + name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)' +- bus: b2 + dev: '12' + fn: '0' + id: 204c + name: 'Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)' +- bus: b2 + dev: '12' + fn: '1' + id: 204d + name: 'Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)' +- bus: b2 + dev: '12' + fn: '2' + id: 204e + name: 'System peripheral: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)' +- bus: b2 + dev: '15' + fn: '0' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b2 + dev: '16' + fn: '0' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b2 + dev: '16' + fn: '4' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b2 + dev: '17' + fn: '0' + id: '2018' + name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)' +- bus: b3 + dev: '00' + fn: '0' + id: 37c0 + name: 'PCI bridge: Intel Corporation Device 37c0 (rev 04)' +- bus: b4 + dev: '02' + fn: '0' + id: 37c4 + name: 'PCI bridge: Intel Corporation Device 37c4 (rev 04)' +- bus: b4 + dev: '03' + fn: '0' + id: 37c5 + name: 'PCI bridge: Intel Corporation Device 37c5 (rev 04)' +- bus: b5 + dev: '00' + fn: '0' + id: 37c8 + name: 'Co-processor: Intel Corporation C62x Chipset QuickAssist Technology (rev + 04)' +- bus: b6 + dev: '00' + fn: '0' + id: 37d3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + SFP+ (rev 04)' +- bus: b6 + dev: '00' + fn: '1' + id: 37d3 + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + SFP+ (rev 04)' +- bus: b6 + dev: '00' + fn: '2' + id: 37ce + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + backplane (rev 04)' +- bus: b6 + dev: '00' + fn: '3' + id: 37ce + name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE + backplane (rev 04)' diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pd-plugin.json new file mode 100644 index 000000000000..76096d82e35b --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pd-plugin.json @@ -0,0 +1,86 @@ +{ + + "XCVR": + { + "xcvr_present": + { + "i2c": + { + "valmap-QSFP28": {"1":true, "0":false }, + "valmap-QSFP-DD": {"1":true, "0":false} + } + + }, + "plug_status": + { + "inserted": "1", + "removed": "0" + } + }, + "PSU": + { + "psu_present": + { + "i2c": + { + "valmap": { "1":true, "0":false } + }, + "bmc": + { + "valmap": { "Device Present":true, "Device Absent":false } + } + }, + + "psu_power_good": + { + "i2c": + { + "valmap": { "1": true, "0":false } + }, + "bmc": + { + "valmap": { "State Asserted":true, "State Deasserted":false } + } + }, + + "psu_fan_dir": + { + "i2c": + { + "valmap": { "F2B":"EXHAUST", "B2F":"INTAKE" } + } + }, + "DEFAULT_TYPE": "AC", + "PSU_FAN_MAX_SPEED":"30000" + }, + + "FAN": + { + "direction": + { + "bmc": + { + "valmap": {"0": "UNKNOW", "1":"INTAKE", "2":"EXHAUST"} + } + }, + + "present": + { + "i2c": + { + "valmap": {"1":true, "0":false} + }, + "bmc": + { + "valmap": { "0x0280|":true, "0x0180|":false } + } + }, + "FAN_R_MAX_SPEED":"32000", + "FAN_F_MAX_SPEED":"36200" + }, + + "REBOOT_CAUSE": + { + "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt" + } +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pddf-device.json new file mode 100644 index 000000000000..a7b4bf73d10e --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pddf-device.json @@ -0,0 +1,4886 @@ +{ + "PLATFORM": { + "num_psus": 2, + "num_fantrays": 6, + "num_fans_pertray": 2, + "num_ports": 32, + "num_temps": 7, + "pddf_dev_types": { + "description": "PDDF supported devices", + "CPLD": [ + "i2c_cpld" + ], + "PSU": [ + "psu_eeprom", + "psu_pmbus" + ], + "PORT_MODULE": [ + "pddf_xcvr" + ] + }, + "std_perm_kos": [ + "igb", + "i40e" + ], + "std_kos": [ + "i2c_i801", + "i2c_dev", + "i2c_mux_pca954x", + "optoe", + "lm75", + "gpio-pca953x" + ], + "pddf_kos": [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_xcvr_module", + "pddf_fpgapci_driver", + "pddf_xcvr_driver_module", + "pddf_psu_driver_module", + "pddf_psu_module", + "pddf_fpgai2c_module", + "pddf_fpgai2c_driver", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_led_module", + "pddf_gpio_module" + ], + "custom_kos": [ + "x86-64-ufispace-s9301-32db-lpc", + "x86-64-ufispace-s9301-32db-sys-eeprom", + "pddf_custom_sysstatus_module" + ] + }, + "SYSTEM": { + "dev_info": { + "device_type": "CPU", + "device_name": "ROOT_COMPLEX", + "device_parent": null + }, + "i2c": { + "CONTROLLERS": [ + { + "dev_name": "i2c-0", + "dev": "SMBUS0" + } + ] + } + }, + "SMBUS0": { + "dev_info": { + "device_type": "SMBUS", + "device_name": "SMBUS0", + "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x0" + }, + "DEVICES": [ + { + "dev": "EEPROM1" + }, + { + "dev": "MUX1" + }, + { + "dev": "MUX2" + }, + { + "dev": "GPIO1" + } + ] + } + }, + "EEPROM1": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "EEPROM1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x57", + "dev_type": "sys_eeprom" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "TEMP1": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CPU_PECI" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_PECI", + "field_pos": "18" + } + ] + } + } + }, + "TEMP2": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CPU_ENV" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV", + "field_pos": "18" + } + ] + } + } + }, + "TEMP3": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP3", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CPU_ENV2" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CPU_ENV_2", + "field_pos": "18" + } + ] + } + } + }, + "TEMP4": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP4", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_MAC_ENV" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_ENV", + "field_pos": "18" + } + ] + } + } + }, + "TEMP5": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP5", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_MAC_DIE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_MAC_DIE", + "field_pos": "18" + } + ] + } + } + }, + "TEMP6": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP6", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_CAGE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_CAGE", + "field_pos": "18" + } + ] + } + } + }, + "TEMP7": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP7", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "Temp_PSU_CONNTOR" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "3" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "20" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "TEMP_PSU_CONN", + "field_pos": "18" + } + ] + } + } + }, + "MUX1": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x73", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x1", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "1", + "dev": "CPLD1" + }, + { + "chn": "1", + "dev": "CPLD2" + }, + { + "chn": "1", + "dev": "CPLD3" + }, + { + "chn": "4", + "dev": "GPIO2" + } + ] + } + }, + "MUX2": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX2", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x72", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x9", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "MUX3" + }, + { + "chn": "1", + "dev": "MUX4" + }, + { + "chn": "2", + "dev": "MUX5" + }, + { + "chn": "3", + "dev": "MUX6" + } + ] + } + }, + "MUX3": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX3", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x11", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT1" + }, + { + "chn": "1", + "dev": "PORT2" + }, + { + "chn": "2", + "dev": "PORT3" + }, + { + "chn": "3", + "dev": "PORT4" + }, + { + "chn": "4", + "dev": "PORT5" + }, + { + "chn": "5", + "dev": "PORT6" + }, + { + "chn": "6", + "dev": "PORT7" + }, + { + "chn": "7", + "dev": "PORT8" + } + ] + } + }, + "MUX4": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX4", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x19", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT9" + }, + { + "chn": "1", + "dev": "PORT10" + }, + { + "chn": "2", + "dev": "PORT11" + }, + { + "chn": "3", + "dev": "PORT12" + }, + { + "chn": "4", + "dev": "PORT13" + }, + { + "chn": "5", + "dev": "PORT14" + }, + { + "chn": "6", + "dev": "PORT15" + }, + { + "chn": "7", + "dev": "PORT16" + } + ] + } + }, + "MUX5": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX5", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x21", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT17" + }, + { + "chn": "1", + "dev": "PORT18" + }, + { + "chn": "2", + "dev": "PORT19" + }, + { + "chn": "3", + "dev": "PORT20" + }, + { + "chn": "4", + "dev": "PORT21" + }, + { + "chn": "5", + "dev": "PORT22" + }, + { + "chn": "6", + "dev": "PORT23" + }, + { + "chn": "7", + "dev": "PORT24" + } + ] + } + }, + "MUX6": { + "dev_info": { + "device_type": "MUX", + "device_name": "MUX6", + "device_parent": "MUX2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc", + "dev_addr": "0x76", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x29", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "PORT25" + }, + { + "chn": "1", + "dev": "PORT26" + }, + { + "chn": "2", + "dev": "PORT27" + }, + { + "chn": "3", + "dev": "PORT28" + }, + { + "chn": "4", + "dev": "PORT29" + }, + { + "chn": "5", + "dev": "PORT30" + }, + { + "chn": "6", + "dev": "PORT31" + }, + { + "chn": "7", + "dev": "PORT32" + } + ] + } + }, + "GPIO1": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO1", + "device_parent": "SMBUS0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x0", + "dev_addr": "0x77", + "dev_type": "pca9539" + }, + "dev_attr": { + "gpio_base": "0x1f0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "GPIO2": { + "dev_info": { + "device_type": "GPIO", + "device_name": "GPIO2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6", + "dev_addr": "0x76", + "dev_type": "pca9539" + }, + "dev_attr": { + "gpio_base": "0x1e0" + }, + "ports": [ + { + "port_num": "0", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "1", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "2", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "3", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "4", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "5", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "6", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "7", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "8", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "9", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "10", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "11", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "12", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "13", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "14", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + }, + { + "port_num": "15", + "direction": "in", + "value": "", + "edge": "", + "active_low": "" + } + ] + } + }, + "CPLD1": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD1", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x30", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD2": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x31", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD3": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD3", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x32", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "SYSSTATUS": { + "dev_info": { + "device_type": "SYSSTAT", + "device_name": "SYSSTATUS" + }, + "dev_attr": {}, + "attr_list": [ + { + "attr_name": "board_info", + "attr_devaddr": "0x30", + "attr_offset": "0x0", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_version", + "attr_devaddr": "0x30", + "attr_offset": "0x2", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_version", + "attr_devaddr": "0x31", + "attr_offset": "0x2", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld3_version", + "attr_devaddr": "0x32", + "attr_offset": "0x2", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "mac_reset", + "attr_devaddr": "0x30", + "attr_offset": "0x40", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "mux_reset", + "attr_devaddr": "0x30", + "attr_offset": "0x46", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "psu_status", + "attr_devaddr": "0x30", + "attr_offset": "0x51", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_0", + "attr_devaddr": "0x30", + "attr_offset": "0x80", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_1", + "attr_devaddr": "0x30", + "attr_offset": "0x81", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "beacon_led", + "attr_devaddr": "0x30", + "attr_offset": "0x84", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "port_led_clr_ctrl", + "attr_devaddr": "0x30", + "attr_offset": "0x85", + "attr_mask": "0xff", + "attr_len": "0x1" + } + ] + }, + "PSU1": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "dev_idx": "1", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_present", + "bmc_cmd": "ipmitool sdr -c get PSU0_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_power_good", + "bmc_cmd": "ipmitool sdr -c get PSU0_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_PWROK_H", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_VOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get PSU0_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_IOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_TEMP", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get PSU0_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU0_FAN1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan1_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_present", + "bmc_cmd": "ipmitool sdr -c get PSU1_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_power_good", + "bmc_cmd": "ipmitool sdr -c get PSU1_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_PWROK_H", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_VOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_IOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_v_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_in", + "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IIN", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_TEMP", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_FAN1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan1_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "fan1_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN0_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan2_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN1_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan3_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN2_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan4_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN3_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan5_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN4_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan6_present", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN5_PSNT_L", + "field_pos": "7" + }, + { + "attr_name": "fan1_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN0_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan1_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN0_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan2_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN1_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan2_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN1_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan3_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN2_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan3_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN2_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan4_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN3_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan4_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN3_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan5_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN4_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan5_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN4_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan6_f_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN5_RPM_F", + "field_pos": "3" + }, + { + "attr_name": "fan6_r_speed_rpm", + "bmc_cmd": "ipmitool sensor", + "raw": "0", + "field_name": "FAN5_RPM_R", + "field_pos": "3" + }, + { + "attr_name": "fan1_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan2_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan3_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan4_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f4", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan5_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f5", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan6_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f6", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "SYS_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FAN_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "PSU1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "PSU2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "1", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "LOC_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "LOC_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "blue", + "bits": "2:1", + "descr": "Blue", + "value": "0x02", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "blue_blink", + "bits": "2:1", + "descr": "Blue Blinking", + "value": "0x03", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "off", + "bits": "2", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + } + ] + } + }, + "PORT1": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT1", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, + { + "itf": "control", + "dev": "PORT1-CTRL" + } + ] + } + }, + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x11", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x11", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT2": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT2", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, + { + "itf": "control", + "dev": "PORT2-CTRL" + } + ] + } + }, + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT3": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT3", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, + { + "itf": "control", + "dev": "PORT3-CTRL" + } + ] + } + }, + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT4": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT4", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, + { + "itf": "control", + "dev": "PORT4-CTRL" + } + ] + } + }, + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT5": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT5", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, + { + "itf": "control", + "dev": "PORT5-CTRL" + } + ] + } + }, + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT6": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT6", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, + { + "itf": "control", + "dev": "PORT6-CTRL" + } + ] + } + }, + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT7": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT7", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, + { + "itf": "control", + "dev": "PORT7-CTRL" + } + ] + } + }, + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT8": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT8", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, + { + "itf": "control", + "dev": "PORT8-CTRL" + } + ] + } + }, + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT9": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT9", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, + { + "itf": "control", + "dev": "PORT9-CTRL" + } + ] + } + }, + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT10": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT10", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, + { + "itf": "control", + "dev": "PORT10-CTRL" + } + ] + } + }, + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT11": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT11", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, + { + "itf": "control", + "dev": "PORT11-CTRL" + } + ] + } + }, + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT12": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT12", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, + { + "itf": "control", + "dev": "PORT12-CTRL" + } + ] + } + }, + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT13": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT13", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, + { + "itf": "control", + "dev": "PORT13-CTRL" + } + ] + } + }, + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT14": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT14", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, + { + "itf": "control", + "dev": "PORT14-CTRL" + } + ] + } + }, + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT15": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT15", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, + { + "itf": "control", + "dev": "PORT15-CTRL" + } + ] + } + }, + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT16": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT16", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, + { + "itf": "control", + "dev": "PORT16-CTRL" + } + ] + } + }, + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT17": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT17", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, + { + "itf": "control", + "dev": "PORT17-CTRL" + } + ] + } + }, + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT17-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT18": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT18", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "18" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT18-EEPROM" + }, + { + "itf": "control", + "dev": "PORT18-CTRL" + } + ] + } + }, + "PORT18-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT18-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT19": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT19", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "19" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT19-EEPROM" + }, + { + "itf": "control", + "dev": "PORT19-CTRL" + } + ] + } + }, + "PORT19-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT19-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT20": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT20", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "20" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT20-EEPROM" + }, + { + "itf": "control", + "dev": "PORT20-CTRL" + } + ] + } + }, + "PORT20-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT20-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT21": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT21", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, + { + "itf": "control", + "dev": "PORT21-CTRL" + } + ] + } + }, + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT22": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT22", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, + { + "itf": "control", + "dev": "PORT22-CTRL" + } + ] + } + }, + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT23": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT23", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "23" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT23-EEPROM" + }, + { + "itf": "control", + "dev": "PORT23-CTRL" + } + ] + } + }, + "PORT23-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT24": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT24", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, + { + "itf": "control", + "dev": "PORT24-CTRL" + } + ] + } + }, + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT25": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT25", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, + { + "itf": "control", + "dev": "PORT25-CTRL" + } + ] + } + }, + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT26": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT26", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "26" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT26-EEPROM" + }, + { + "itf": "control", + "dev": "PORT26-CTRL" + } + ] + } + }, + "PORT26-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT26-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT27": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT27", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "27" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT27-EEPROM" + }, + { + "itf": "control", + "dev": "PORT27-CTRL" + } + ] + } + }, + "PORT27-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT27-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT28": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT28", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, + { + "itf": "control", + "dev": "PORT28-CTRL" + } + ] + } + }, + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT29": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT29", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, + { + "itf": "control", + "dev": "PORT29-CTRL" + } + ] + } + }, + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT30": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT30", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "30" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT30-EEPROM" + }, + { + "itf": "control", + "dev": "PORT30-CTRL" + } + ] + } + }, + "PORT30-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT30-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT31": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT31", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, + { + "itf": "control", + "dev": "PORT31-CTRL" + } + ] + } + }, + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT32": { + "dev_info": { + "device_type": "QSFP-DD", + "device_name": "PORT32", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, + { + "itf": "control", + "dev": "PORT32-CTRL" + } + ] + } + }, + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf_support b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf_support new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform.json new file mode 100644 index 000000000000..65a45fd2414c --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform.json @@ -0,0 +1,613 @@ +{ + "chassis": { + "name": "S9301-32DB", + "components": [ + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + }, + { + "name": "CPLD3" + }, + { + "name": "BIOS" + }, + { + "name": "BMC" + } + ], + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + }, + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + }, + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + }, + { + "name": "Fantray4_1" + }, + { + "name": "Fantray4_2" + }, + { + "name": "Fantray5_1" + }, + { + "name": "Fantray5_2" + }, + { + "name": "Fantray6_1" + }, + { + "name": "Fantray6_2" + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + } + ] + }, + { + "name": "Fantray4", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray4_1" + }, + { + "name": "Fantray4_2" + } + ] + }, + { + "name": "Fantray5", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray5_1" + }, + { + "name": "Fantray5_2" + } + ] + }, + { + "name": "Fantray6", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray6_1" + }, + { + "name": "Fantray6_2" + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "fans": [ + { + "name": "PSU1_FAN1" + } + ], + "thermals": [ + { + "name": "PSU1_TEMP1" + } + ] + }, + { + "name": "PSU2", + "fans": [ + { + "name": "PSU2_FAN1" + } + ], + "thermals": [ + { + "name": "PSU2_TEMP1" + } + ] + } + ], + "thermals": [ + { + "name": "Temp_CPU_PECI" + }, + { + "name": "Temp_CPU_ENV" + }, + { + "name": "Temp_CPU_ENV2" + }, + { + "name": "Temp_CPU_PECI" + }, + { + "name": "Temp_MAC_DIE" + }, + { + "name": "Temp_MAC_ENV" + }, + { + "name": "Temp_PSU_CONNTOR" + } + ], + "sfps": [ + { + "name": "Ethernet0" + }, + { + "name": "Ethernet4" + }, + { + "name": "Ethernet8" + }, + { + "name": "Ethernet12" + }, + { + "name": "Ethernet16" + }, + { + "name": "Ethernet20" + }, + { + "name": "Ethernet24" + }, + { + "name": "Ethernet28" + }, + { + "name": "Ethernet32" + }, + { + "name": "Ethernet36" + }, + { + "name": "Ethernet40" + }, + { + "name": "Ethernet44" + }, + { + "name": "Ethernet48" + }, + { + "name": "Ethernet52" + }, + { + "name": "Ethernet56" + }, + { + "name": "Ethernet60" + }, + { + "name": "Ethernet64" + }, + { + "name": "Ethernet68" + }, + { + "name": "Ethernet72" + }, + { + "name": "Ethernet76" + }, + { + "name": "Ethernet80" + }, + { + "name": "Ethernet84" + }, + { + "name": "Ethernet88" + }, + { + "name": "Ethernet92" + }, + { + "name": "Ethernet96" + }, + { + "name": "Ethernet104" + }, + { + "name": "Ethernet112" + }, + { + "name": "Ethernet120" + }, + { + "name": "Ethernet128" + }, + { + "name": "Ethernet136" + }, + { + "name": "Ethernet144" + }, + { + "name": "Ethernet152" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "0,0,0,0", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x200G": ["Eth0(Port0)"], + "2x100G": ["Eth0/1(Port0)", "Eth0/2(Port0)"], + "4x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"] + } + }, + + "Ethernet4": { + "index": "1,1,1,1", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x200G": ["Eth1(Port1)"], + "2x100G": ["Eth1/1(Port1)", "Eth1/2(Port1)"], + "4x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"] + } + }, + + "Ethernet8": { + "index": "2,2,2,2", + "lanes": "9,10,11,12", + "breakout_modes": { + "1x200G": ["Eth2(Port2)"], + "2x100G": ["Eth2/1(Port2)", "Eth2/2(Port2)"], + "4x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"] + } + }, + + "Ethernet12": { + "index": "3,3,3,3", + "lanes": "13,14,15,16", + "breakout_modes": { + "1x200G": ["Eth3(Port3)"], + "2x100G": ["Eth3/1(Port3)", "Eth3/2(Port3)"], + "4x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"] + } + }, + + "Ethernet16": { + "index": "4,4,4,4", + "lanes": "17,18,19,20", + "breakout_modes": { + "1x200G": ["Eth4(Port4)"], + "2x100G": ["Eth4/1(Port4)", "Eth4/2(Port4)"], + "4x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"] + } + }, + + "Ethernet20": { + "index": "5,5,5,5", + "lanes": "21,22,23,24", + "breakout_modes": { + "1x200G": ["Eth5(Port5)"], + "2x100G": ["Eth5/1(Port5)", "Eth5/2(Port5)"], + "4x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"] + } + }, + + "Ethernet24": { + "index": "6,6,6,6", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x200G": ["Eth6(Port6)"], + "2x100G": ["Eth6/1(Port6)", "Eth6/2(Port6)"], + "4x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"] + } + }, + + "Ethernet28": { + "index": "7,7,7,7", + "lanes": "29,30,31,32", + "breakout_modes": { + "1x200G": ["Eth7(Port7)"], + "2x100G": ["Eth7/1(Port7)", "Eth7/2(Port7)"], + "4x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"] + } + }, + + "Ethernet32": { + "index": "8,8,8,8", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x200G": ["Eth8(Port8)"], + "2x100G": ["Eth8/1(Port8)", "Eth8/2(Port8)"], + "4x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"] + } + }, + + "Ethernet36": { + "index": "9,9,9,9", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x200G": ["Eth9(Port9)"], + "2x100G": ["Eth9/1(Port9)", "Eth9/2(Port9)"], + "4x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"] + } + }, + + "Ethernet40": { + "index": "10,10,10,10", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x200G": ["Eth10(Port10)"], + "2x100G": ["Eth10/1(Port10)", "Eth10/2(Port10)"], + "4x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"] + } + }, + + "Ethernet44": { + "index": "11,11,11,11", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x200G": ["Eth11(Port11)"], + "2x100G": ["Eth11/1(Port11)", "Eth11/2(Port11)"], + "4x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"] + } + }, + + "Ethernet48": { + "index": "12,12,12,12", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x200G": ["Eth12(Port12)"], + "2x100G": ["Eth12/1(Port12)", "Eth12/2(Port12)"], + "4x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"] + } + }, + + "Ethernet52": { + "index": "13,13,13,13", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x200G": ["Eth13(Port13)"], + "2x100G": ["Eth13/1(Port13)", "Eth13/2(Port13)"], + "4x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"] + } + }, + + "Ethernet56": { + "index": "14,14,14,14", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x200G": ["Eth14(Port14)"], + "2x100G": ["Eth14/1(Port14)", "Eth14/2(Port14)"], + "4x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"] + } + }, + + "Ethernet60": { + "index": "15,15,15,15", + "lanes": "61,62,63,64", + "breakout_modes": { + "1x200G": ["Eth15(Port15)"], + "2x100G": ["Eth15/1(Port15)", "Eth15/2(Port15)"], + "4x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"] + } + }, + + "Ethernet64": { + "index": "16,16,16,16", + "lanes": "65,66,67,68", + "breakout_modes": { + "1x200G": ["Eth16(Port16)"], + "2x100G": ["Eth16/1(Port16)", "Eth16/2(Port16)"], + "4x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"] + } + }, + + "Ethernet68": { + "index": "17,17,17,17", + "lanes": "69,70,71,72", + "breakout_modes": { + "1x200G": ["Eth17(Port17)"], + "2x100G": ["Eth17/1(Port17)", "Eth17/2(Port17)"], + "4x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"] + } + }, + + "Ethernet72": { + "index": "18,18,18,18", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x200G": ["Eth18(Port18)"], + "2x100G": ["Eth18/1(Port18)", "Eth18/2(Port18)"], + "4x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"] + } + }, + + "Ethernet76": { + "index": "19,19,19,19", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x200G": ["Eth19(Port19)"], + "2x100G": ["Eth19/1(Port19)", "Eth19/2(Port19)"], + "4x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"] + } + }, + + "Ethernet80": { + "index": "20,20,20,20", + "lanes": "81,82,83,84", + "breakout_modes": { + "1x200G": ["Eth20(Port20)"], + "2x100G": ["Eth20/1(Port20)", "Eth20/2(Port20)"], + "4x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"] + } + }, + + "Ethernet84": { + "index": "21,21,21,21", + "lanes": "85,86,87,88", + "breakout_modes": { + "1x200G": ["Eth21(Port21)"], + "2x100G": ["Eth21/1(Port21)", "Eth21/2(Port21)"], + "4x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"] + } + }, + + "Ethernet88": { + "index": "22,22,22,22", + "lanes": "89,90,91,92", + "breakout_modes": { + "1x200G": ["Eth22(Port22)"], + "2x100G": ["Eth22/1(Port22)", "Eth22/2(Port22)"], + "4x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"] + } + }, + + "Ethernet92": { + "index": "23,23,23,23", + "lanes": "93,94,95,96", + "breakout_modes": { + "1x200G": ["Eth23(Port23)"], + "2x100G": ["Eth23/1(Port23)", "Eth23/2(Port23)"], + "4x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"] + } + }, + + "Ethernet96": { + "index": "24,24,24,24,24,24,24,24", + "lanes": "97,98,99,100,101,102,103,104", + "breakout_modes": { + "1x400G": ["Eth24(Port24)"], + "2x200G": ["Eth24/1(Port24)", "Eth24/2(Port24)"], + "4x100G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"], + "8x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)", "Eth24/5(Port24)", "Eth24/6(Port24)", "Eth24/7(Port24)", "Eth24/8(Port24)"] + } + }, + + "Ethernet104": { + "index": "25,25,25,25,25,25,25,25", + "lanes": "105,106,107,108,109,110,111,112", + "breakout_modes": { + "1x400G": ["Eth25(Port25)"], + "2x200G": ["Eth25/1(Port25)", "Eth25/2(Port25)"], + "4x100G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"], + "8x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)", "Eth25/5(Port25)", "Eth25/6(Port25)", "Eth25/7(Port25)", "Eth25/8(Port25)"] + } + }, + + "Ethernet112": { + "index": "26,26,26,26,26,26,26,26", + "lanes": "113,114,115,116,117,118,119,120", + "breakout_modes": { + "1x400G": ["Eth26(Port26)"], + "2x200G": ["Eth26/1(Port26)", "Eth26/2(Port26)"], + "4x100G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"], + "8x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)", "Eth26/5(Port26)", "Eth26/6(Port26)", "Eth26/7(Port26)", "Eth26/8(Port26)"] + } + }, + + "Ethernet120": { + "index": "27,27,27,27,27,27,27,27", + "lanes": "121,122,123,124,125,126,127,128", + "breakout_modes": { + "1x400G": ["Eth27(Port27)"], + "2x200G": ["Eth27/1(Port27)", "Eth27/2(Port27)"], + "4x100G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"], + "8x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)", "Eth27/5(Port27)", "Eth27/6(Port27)", "Eth27/7(Port27)", "Eth27/8(Port27)"] + } + }, + + "Ethernet128": { + "index": "28,28,28,28,28,28,28,28", + "lanes": "129,130,131,132,133,134,135,136", + "breakout_modes": { + "1x400G": ["Eth28(Port28)"], + "2x200G": ["Eth28/1(Port28)", "Eth28/2(Port28)"], + "4x100G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"], + "8x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)", "Eth28/5(Port28)", "Eth28/6(Port28)", "Eth28/7(Port28)", "Eth28/8(Port28)"] + } + }, + + "Ethernet136": { + "index": "29,29,29,29,29,29,29,29", + "lanes": "137,138,139,140,141,142,143,144", + "breakout_modes": { + "1x400G": ["Eth29(Port29)"], + "2x200G": ["Eth29/1(Port29)", "Eth29/2(Port29)"], + "4x100G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"], + "8x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)", "Eth29/5(Port29)", "Eth29/6(Port29)", "Eth29/7(Port29)", "Eth29/8(Port29)"] + } + }, + + "Ethernet144": { + "index": "30,30,30,30,30,30,30,30", + "lanes": "145,146,147,148,149,150,151,152", + "breakout_modes": { + "1x400G": ["Eth30(Port30)"], + "2x200G": ["Eth30/1(Port30)", "Eth30/2(Port30)"], + "4x100G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"], + "8x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)", "Eth30/5(Port30)", "Eth30/6(Port30)", "Eth30/7(Port30)", "Eth30/8(Port30)"] + } + }, + + "Ethernet152": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "153,154,155,156,157,158,159,160", + "breakout_modes": { + "1x400G": ["Eth31(Port31)"], + "2x200G": ["Eth31/1(Port31)", "Eth31/2(Port31)"], + "4x100G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"], + "8x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)", "Eth31/5(Port31)", "Eth31/6(Port31)", "Eth31/7(Port31)", "Eth31/8(Port31)"] + } + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_asic b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_asic new file mode 100644 index 000000000000..960467652765 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_components.json new file mode 100644 index 000000000000..4274a79774ed --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_components.json @@ -0,0 +1,13 @@ +{ + "chassis": { + "x86_64-ufispace_s9301_32db-r0": { + "component": { + "CPLD1": { }, + "CPLD2": { }, + "CPLD3": { }, + "BIOS": { }, + "BMC": {} + } + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_env.conf b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_env.conf new file mode 100644 index 000000000000..dd7cf4fe01c5 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_env.conf @@ -0,0 +1,2 @@ +SYNCD_SHM_SIZE=512m +is_ltsw_chip=1 diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pmon_daemon_control.json new file mode 100644 index 000000000000..e348e0168fa5 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pmon_daemon_control.json @@ -0,0 +1,9 @@ +{ + "skip_pcied": false, + "skip_fancontrol": false, + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false +} diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s9301_32db-r0/sensors.conf new file mode 100644 index 000000000000..7a1c0408810f --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/sensors.conf @@ -0,0 +1,9 @@ +# libsensors configuration file + +bus "i2c-0" "I2C I801" +chip "tmp75-i2c-*-4f" + label temp1 "CPU Board Temp" + set temp1_max 70 + set temp1_max_hyst 75 + set temp1_crit 85 + diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..6291e81a0621 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/system_health_monitoring_config.json @@ -0,0 +1,15 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu", + "fan" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "yellow", + "normal": "green", + "booting": "blinking_green" + } +} \ No newline at end of file diff --git a/dockers/docker-dhcp-relay/Dockerfile.j2 b/dockers/docker-dhcp-relay/Dockerfile.j2 index 48375e214689..5b0dc82c314b 100644 --- a/dockers/docker-dhcp-relay/Dockerfile.j2 +++ b/dockers/docker-dhcp-relay/Dockerfile.j2 @@ -50,8 +50,7 @@ COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] COPY ["critical_processes", "/etc/supervisor"] COPY ["cli", "/cli/"] -{% if include_system_eventd == "y" %} -{% if build_reduce_image_size != "y" or sonic_asic_platform != "broadcom" %} +{% if include_system_eventd == "y" and build_reduce_image_size != "y" %} # Copy regex json and rsyslog_plugin.conf file into rsyslog.d COPY ["*.json", "/etc/rsyslog.d/"] COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"] @@ -60,6 +59,5 @@ RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info. RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2 RUN rm -f /etc/rsyslog.d/events_info.json {% endif %} -{% endif %} ENTRYPOINT ["/usr/bin/docker_init.sh"] diff --git a/dockers/docker-dhcp-server/Dockerfile.j2 b/dockers/docker-dhcp-server/Dockerfile.j2 index 4ca46d5c5d54..3b4bf7587919 100755 --- a/dockers/docker-dhcp-server/Dockerfile.j2 +++ b/dockers/docker-dhcp-server/Dockerfile.j2 @@ -3,7 +3,6 @@ FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} ARG docker_container_name ARG image_version -RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf ## Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive @@ -21,8 +20,6 @@ RUN apt-get update && \ RUN mkdir -p /var/run/kea RUN pip3 install psutil -# TODO issue on remote rsyslog server in non-host container -RUN rm -f /etc/supervisor/conf.d/containercfgd.conf {% if docker_dhcp_server_debs.strip() -%} # Copy locally-built Debian package dependencies @@ -52,11 +49,10 @@ RUN apt-get clean -y && \ COPY ["docker_init.sh", "start.sh", "/usr/bin/"] COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] COPY ["files/supervisor-proc-exit-listener", "/usr/bin"] -COPY ["rsyslog/rsyslog.conf.j2", "kea-dhcp4.conf.j2", "/usr/share/sonic/templates/"] +COPY ["kea-dhcp4.conf.j2", "/usr/share/sonic/templates/"] COPY ["critical_processes", "/etc/supervisor/"] COPY ["lease_update.sh", "/etc/kea/"] COPY ["kea-dhcp4-init.conf", "/etc/kea/kea-dhcp4.conf"] COPY ["cli", "/cli/"] -COPY ["rsyslog/default.conf", "/etc/rsyslog.d"] ENTRYPOINT ["/usr/bin/docker_init.sh"] diff --git a/dockers/docker-dhcp-server/docker_init.sh b/dockers/docker-dhcp-server/docker_init.sh index 5220f9ffec44..a9ffc27354c0 100755 --- a/dockers/docker-dhcp-server/docker_init.sh +++ b/dockers/docker-dhcp-server/docker_init.sh @@ -7,11 +7,6 @@ mkdir -p /etc/supervisor/conf.d/ mkdir -p /etc/kea/ udp_server_ip=$(ip -j -4 addr list lo scope host | jq -r -M '.[0].addr_info[0].local') hostname=$(hostname) -# Generate the following files from templates: -# port-to-alias name map -sonic-cfggen -d -t /usr/share/sonic/templates/rsyslog.conf.j2 \ - -a "{\"udp_server_ip\": \"$udp_server_ip\", \"hostname\": \"$hostname\"}" \ - > /etc/rsyslog.conf # Make the script that waits for all interfaces to come up executable chmod +x /etc/kea/lease_update.sh /usr/bin/start.sh diff --git a/dockers/docker-dhcp-server/rsyslog/default.conf b/dockers/docker-dhcp-server/rsyslog/default.conf deleted file mode 100644 index 77609410c57a..000000000000 --- a/dockers/docker-dhcp-server/rsyslog/default.conf +++ /dev/null @@ -1,27 +0,0 @@ -# -# First some standard log files. Log by facility. -# - -# Log all facilities to /var/log/syslog except cron, auth -# and authpriv. They are noisy - log them to their own files -*.*;cron,auth,authpriv.none -/var/log/syslog -auth,authpriv.* /var/log/auth.log -cron.* /var/log/cron.log - -# -# Emergencies are sent to everybody logged in. -# -*.emerg :omusrmsg:* - -# The named pipe /dev/xconsole is for the `xconsole' utility. To use it, -# you must invoke `xconsole' with the `-file' option: -# -# $ xconsole -file /dev/xconsole [...] -# -# NOTE: adjust the list below, or you'll go crazy if you have a reasonably -# busy site.. -# -#daemon.*;mail.*;\ -# news.err;\ -# *.=debug;*.=info;\ -# *.=notice;*.=warn |/dev/xconsole diff --git a/dockers/docker-fpm-frr/Dockerfile.j2 b/dockers/docker-fpm-frr/Dockerfile.j2 index b0dc413c8c89..98c4593811f7 100644 --- a/dockers/docker-fpm-frr/Dockerfile.j2 +++ b/dockers/docker-fpm-frr/Dockerfile.j2 @@ -59,14 +59,12 @@ RUN chmod a+x /usr/bin/TSA && \ chmod a+x /usr/bin/TSC && \ chmod a+x /usr/bin/zsocket.sh -{% if include_system_eventd == "y" %} -{% if build_reduce_image_size != "y" or sonic_asic_platform != "broadcom" %} +{% if include_system_eventd == "y" and build_reduce_image_size != "y" %} COPY ["*.json", "/etc/rsyslog.d/"] COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"] RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json > /etc/rsyslog.d/bgp_events.conf RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2 RUN rm -f /etc/rsyslog.d/events_info.json {% endif %} -{% endif %} ENTRYPOINT ["/usr/bin/docker_init.sh"] diff --git a/dockers/docker-fpm-frr/base_image_files/TS b/dockers/docker-fpm-frr/base_image_files/TS index fcff1f80674c..fb1c077cb371 100755 --- a/dockers/docker-fpm-frr/base_image_files/TS +++ b/dockers/docker-fpm-frr/base_image_files/TS @@ -4,17 +4,31 @@ [ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment PLATFORM=${PLATFORM:-`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`} +type=`sonic-db-cli CONFIG_DB hget 'DEVICE_METADATA|localhost' 'type'` +TSA_CHASSIS_STATE=false + +if [[ $type == *"SpineRouter"* ]]; then + TSA_CHASSIS_STATE="$(sonic-db-cli CHASSIS_APP_DB HGET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled)" +fi if [[ $1 == "TSA" ]]; then TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "true"}}}' - log_msg='System Mode: Normal -> Maintenance' + if [[ $TSA_CHASSIS_STATE == true ]]; then + log_msg='System Mode: Maintenance -> Maintenance' + else + log_msg='System Mode: Normal -> Maintenance' + fi err_msg='System is already in Maintenance' - desired_tsa_state=true + desired_tsa_state=true elif [[ $1 == "TSB" ]]; then TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "false"}}}' - log_msg='System Mode: Maintenance -> Normal' + if [[ $TSA_CHASSIS_STATE == true ]]; then + log_msg='System Mode: Maintenance -> Maintenance' + else + log_msg='System Mode: Maintenance -> Normal' + fi err_msg='System is already in Normal mode' - desired_tsa_state=false + desired_tsa_state=false fi # Parse the device specific asic conf file, if it exists diff --git a/dockers/docker-fpm-frr/base_image_files/TSA b/dockers/docker-fpm-frr/base_image_files/TSA index 4b26b2d430b5..beeb86819f67 100755 --- a/dockers/docker-fpm-frr/base_image_files/TSA +++ b/dockers/docker-fpm-frr/base_image_files/TSA @@ -7,8 +7,19 @@ if [ "$EUID" -ne 0 ] ; then fi if [ -f /etc/sonic/chassisdb.conf ]; then - rexec all -c "sudo TSA chassis" - echo "Please execute \"rexec all -c 'sudo config save -y'\" to preserve System mode in Maintenance after reboot\ + CHASSIS_TSA_STATE_UPDATE="CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL\|STATE" tsa_enabled "true"" + CONFIG_DB_TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "true"}}}' + current_tsa_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.tsa_enabled)" + if [[ $current_tsa_state == true ]]; then + echo "Chassis is already in Maintenance" + logger -t TSA -p user.info "Chassis is already in Maintenance" + else + sonic-db-cli $CHASSIS_TSA_STATE_UPDATE + sonic-cfggen -a "$CONFIG_DB_TSA_STATE_UPDATE" -w + echo "Chassis Mode: Normal -> Maintenance" + logger -t TSA -p user.info "Chassis Mode: Normal -> Maintenance" + fi + echo "Please execute 'sudo config save' to preserve System mode in Maintenance after reboot\ or config reload on all linecards" exit 0 fi diff --git a/dockers/docker-fpm-frr/base_image_files/TSB b/dockers/docker-fpm-frr/base_image_files/TSB index ec353148a72f..36c69843b1b3 100755 --- a/dockers/docker-fpm-frr/base_image_files/TSB +++ b/dockers/docker-fpm-frr/base_image_files/TSB @@ -6,11 +6,21 @@ if [ "$EUID" -ne 0 ] ; then exit 1 fi -# If run on supervisor of chassis, trigger remote execution of TSB on all linecards if [ -f /etc/sonic/chassisdb.conf ]; then - rexec all -c "sudo TSB chassis" - echo "Please execute \"rexec all -c 'sudo config save -y'\" to preserve System mode in Normal state after reboot\ - or config reload on all linecards" + CHASSIS_TSA_STATE_UPDATE="CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL\|STATE" tsa_enabled "false"" + CONFIG_DB_TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "false"}}}' + current_tsa_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.tsa_enabled)" + if [[ $current_tsa_state == false ]]; then + echo "Chassis is already in Normal mode" + logger -t TSB -p user.info "Chassis is already in Normal mode" + else + sonic-db-cli $CHASSIS_TSA_STATE_UPDATE + sonic-cfggen -a "$CONFIG_DB_TSA_STATE_UPDATE" -w + echo "Chassis Mode: Maintenance -> Normal" + logger -t TSB -p user.info "Chassis Mode: Maintenance -> Normal" + fi + echo "Please execute 'sudo config save' to preserve System mode in Normal state after reboot\ + or config reload on all linecards" exit 0 fi diff --git a/dockers/docker-fpm-frr/docker_init.sh b/dockers/docker-fpm-frr/docker_init.sh index 0ed274ec703f..662a78b5adcf 100755 --- a/dockers/docker-fpm-frr/docker_init.sh +++ b/dockers/docker-fpm-frr/docker_init.sh @@ -88,6 +88,7 @@ elif [ "$CONFIG_TYPE" == "unified" ]; then CFGGEN_PARAMS=" \ -d \ -y /etc/sonic/constants.yml \ + -T /usr/local/sonic/frrcfgd \ -t /usr/share/sonic/templates/gen_frr.conf.j2,/etc/frr/frr.conf \ " sonic-cfggen $CFGGEN_PARAMS diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2 index 7cf5e148f694..3dc9447f75bb 100644 --- a/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2 +++ b/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2 @@ -50,6 +50,7 @@ route-map FROM_BGP_PEER_V6 permit 11 route-map FROM_BGP_PEER_V4 permit 100 ! route-map TO_BGP_PEER_V4 permit 100 + call CHECK_IDF_ISOLATION ! ! route-map FROM_BGP_PEER_V6 permit 1 @@ -59,6 +60,9 @@ route-map FROM_BGP_PEER_V6 permit 1 route-map FROM_BGP_PEER_V6 permit 100 ! route-map TO_BGP_PEER_V6 permit 100 + call CHECK_IDF_ISOLATION +! +route-map CHECK_IDF_ISOLATION permit 10 ! ! end of template: bgpd/templates/general/policies.conf.j2 ! diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/instance.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/instance.conf.j2 index 4f7bde5ddf1a..c40d3b84235b 100644 --- a/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/instance.conf.j2 +++ b/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/instance.conf.j2 @@ -11,7 +11,7 @@ {% endif %} neighbor {{ neighbor_addr }} remote-as {{ bgp_session['asn'] }} neighbor {{ neighbor_addr }} description {{ bgp_session['name'] }} - neighbor {{ neighbor_addr }} timers 3 10 + neighbor {{ neighbor_addr }} timers 2 7 neighbor {{ neighbor_addr }} timers connect 10 ! {% if 'admin_status' in bgp_session and bgp_session['admin_status'] == 'down' or 'admin_status' not in bgp_session and 'default_bgp_status' in CONFIG_DB__DEVICE_METADATA['localhost'] and CONFIG_DB__DEVICE_METADATA['localhost']['default_bgp_status'] == 'down' %} diff --git a/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2 b/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2 index 82b973d37cc9..88ad9b46dac2 100644 --- a/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2 +++ b/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2 @@ -4,6 +4,7 @@ {% for vnet_name, vnet_metadata in VNET.items() %} vrf {{ vnet_name }} vni {{ vnet_metadata['vni'] }} +exit ! {% endfor %} {% endif %} diff --git a/dockers/docker-orchagent/Dockerfile.j2 b/dockers/docker-orchagent/Dockerfile.j2 index 3bc02a9d8fc4..fb90b4f09c22 100755 --- a/dockers/docker-orchagent/Dockerfile.j2 +++ b/dockers/docker-orchagent/Dockerfile.j2 @@ -80,8 +80,7 @@ RUN sonic-cfggen -a "{\"ENABLE_ASAN\":\"{{ENABLE_ASAN}}\"}" -t /usr/share/sonic/ RUN rm -f /usr/share/sonic/templates/docker-init.j2 RUN chmod 755 /usr/bin/docker-init.sh -{% if include_system_eventd == "y" %} -{% if build_reduce_image_size != "y" or sonic_asic_platform != "broadcom" %} +{% if include_system_eventd == "y" and build_reduce_image_size != "y" %} # Copy all regex json files and rsyslog_plugin.conf to rsyslog.d COPY ["*.json", "/etc/rsyslog.d/"] COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"] @@ -90,6 +89,5 @@ RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info. RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2 RUN rm -f /etc/rsyslog.d/events_info.json {% endif %} -{% endif %} ENTRYPOINT ["/usr/bin/docker-init.sh"] diff --git a/dockers/docker-orchagent/ipinip.json.j2 b/dockers/docker-orchagent/ipinip.json.j2 index f25f7d9fb695..478a19a8fe2b 100644 --- a/dockers/docker-orchagent/ipinip.json.j2 +++ b/dockers/docker-orchagent/ipinip.json.j2 @@ -3,6 +3,8 @@ {% else %} {% set ipv4_addresses = [] %} {% set ipv6_addresses = [] %} +{% set ipv4_vlan_addresses = [] %} +{% set ipv6_vlan_addresses = [] %} {% set ipv4_loopback_addresses = [] %} {% set ipv6_loopback_addresses = [] %} {% if DEVICE_METADATA['localhost']['sub_role'] == 'FrontEnd' or DEVICE_METADATA['localhost']['sub_role'] == 'BackEnd'%} @@ -44,12 +46,14 @@ {% endfor %} {% for (name, prefix) in VLAN_INTERFACE|pfx_filter %} {%- if prefix | ipv4 %} - {%- set ipv4_addresses = ipv4_addresses.append(prefix) %} + {%- set ipv4_vlan_addresses = ipv4_vlan_addresses.append(prefix) %} {%- endif %} {%- if prefix | ipv6 %} - {%- set ipv6_addresses = ipv6_addresses.append(prefix) %} + {%- set ipv6_vlan_addresses = ipv6_vlan_addresses.append(prefix) %} {%- endif %} {% endfor %} +{%- set ipv4_addresses = ipv4_addresses + ipv4_vlan_addresses %} +{%- set ipv6_addresses = ipv6_addresses + ipv6_vlan_addresses %} [ {% if ipv4_loopback_addresses %} {% if subnet_decap.enable %} @@ -66,6 +70,15 @@ }, "OP": "SET" }, +{% for prefix in ipv4_vlan_addresses|sort %} + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:{{ prefix | network }}/{{ prefix | prefixlen }}" : { + "term_type":"MP2MP", + "subnet_type": "vlan" + }, + "OP": "SET" + }, +{% endfor %} {% endif %} { "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : { @@ -110,6 +123,15 @@ }, "OP": "SET" }, +{% for prefix in ipv6_vlan_addresses|sort %} + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET_V6:{{ prefix | network }}/{{ prefix | prefixlen }}" : { + "term_type":"MP2MP", + "subnet_type": "vlan" + }, + "OP": "SET" + }, +{% endfor %} {% endif %} { "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : { diff --git a/dockers/docker-orchagent/switch.json.j2 b/dockers/docker-orchagent/switch.json.j2 index 565d6b5005e4..63d3e80e3175 100644 --- a/dockers/docker-orchagent/switch.json.j2 +++ b/dockers/docker-orchagent/switch.json.j2 @@ -26,8 +26,10 @@ "ecmp_hash_seed": "{{ hash_seed_value }}", "lag_hash_seed": "{{ hash_seed_value }}", "fdb_aging_time": "600", +{% if not DEVICE_METADATA.localhost.switch_type or DEVICE_METADATA.localhost.switch_type != "chassis-packet" %} "ecmp_hash_offset": "{{ ecmp_hash_offset_value }}", "lag_hash_offset": "{{ lag_hash_offset_value }}", +{% endif %} {% if DEVICE_METADATA.localhost.type and "LeafRouter" in DEVICE_METADATA.localhost.type %} "ordered_ecmp": "true" {% else %} diff --git a/dockers/docker-platform-monitor/Dockerfile.j2 b/dockers/docker-platform-monitor/Dockerfile.j2 index 9f44ca004594..1bd0b1b1c082 100755 --- a/dockers/docker-platform-monitor/Dockerfile.j2 +++ b/dockers/docker-platform-monitor/Dockerfile.j2 @@ -27,7 +27,8 @@ RUN apt-get update && \ iputils-ping \ pciutils \ nvme-cli \ - ethtool + ethtool \ + xxd # smartmontools version should match the installed smartmontools in sonic_debian_extension build template RUN apt-get install -y -t bookworm-backports \ diff --git a/dockers/docker-ptf/Dockerfile.j2 b/dockers/docker-ptf/Dockerfile.j2 index 95a7cb9eee41..5148dd1125f1 100644 --- a/dockers/docker-ptf/Dockerfile.j2 +++ b/dockers/docker-ptf/Dockerfile.j2 @@ -18,6 +18,7 @@ LABEL maintainer="Pavel Shirshov" COPY ["sources.list.{{ CONFIGURED_ARCH }}", "/etc/apt/sources.list"] COPY ["no-check-valid-until", "/etc/apt/apt.conf.d"] +COPY ["apt-retries-count", "/etc/apt/apt.conf.d"] ## Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive @@ -117,11 +118,12 @@ RUN rm -rf /debs \ && rm -fr scapy-vxlan \ {% else %} && wget --https-only https://bootstrap.pypa.io/pip/get-pip.py \ - && python get-pip.py \ + && python3 get-pip.py \ && rm -f get-pip.py \ {% endif %} && git clone https://github.com/sflow/sflowtool \ && cd sflowtool \ + && git checkout v6.04 \ && ./boot.sh \ && ./configure \ && make \ @@ -195,7 +197,7 @@ RUN pip3 install setuptools \ && pip3 install Flask \ && pip3 install exabgp \ && pip3 install pyaml \ - && pip3 install pybrctl pyro4 rpyc yabgp \ + && pip3 install pybrctl pyro4 rpyc \ && pip3 install unittest-xml-reporting \ && pip3 install pyrasite \ && pip3 install python-libpcap \ @@ -265,6 +267,18 @@ RUN dpkg -i \ debs/{{ deb }}{{' '}} {%- endfor %} +{% if PTF_ENV_PY_VER == "py3" %} +# Create symlink so that test scripts and ptf_runner invocation path +# is same across python 2 and python 3 envs. Note that for virtual-env +# ptf is under /root/env-python3/bin. +# TODO - cleanup when the supported PTF image is py3only across all branches +RUN mkdir -p /root/env-python3/bin \ + && ln -s /usr/local/bin/ptf /usr/bin/ptf \ + && ln -s /usr/bin/python /root/env-python3/bin/python3 \ + && ln -s /usr/bin/python /root/env-python3/bin/python \ + && ln -s /usr/local/bin/ptf /root/env-python3/bin/ptf +{% endif %} + COPY ["*.ini", "/etc/ptf/"] EXPOSE 22 8009 diff --git a/dockers/docker-sonic-gnmi/gnmi-native.sh b/dockers/docker-sonic-gnmi/gnmi-native.sh index d9bab2700e4b..e9f15810a226 100755 --- a/dockers/docker-sonic-gnmi/gnmi-native.sh +++ b/dockers/docker-sonic-gnmi/gnmi-native.sh @@ -33,6 +33,8 @@ if [ -n "$CERTS" ]; then if [ ! -z $CA_CRT ]; then TELEMETRY_ARGS+=" --ca_crt $CA_CRT" fi + + TELEMETRY_ARGS+=" --config_table_name GNMI_CLIENT_CERT" elif [ -n "$X509" ]; then SERVER_CRT=$(echo $X509 | jq -r '.server_crt') SERVER_KEY=$(echo $X509 | jq -r '.server_key') diff --git a/dockers/docker-sonic-telemetry/telemetry.sh b/dockers/docker-sonic-telemetry/telemetry.sh index 061046d2594f..d1c9216d4195 100755 --- a/dockers/docker-sonic-telemetry/telemetry.sh +++ b/dockers/docker-sonic-telemetry/telemetry.sh @@ -34,6 +34,9 @@ if [ -n "$CERTS" ]; then if [ ! -z $CA_CRT ]; then TELEMETRY_ARGS+=" --ca_crt $CA_CRT" fi + + # Reuse GNMI_CLIENT_CERT for telemetry service + TELEMETRY_ARGS+=" --config_table_name GNMI_CLIENT_CERT" elif [ -n "$X509" ]; then SERVER_CRT=$(echo $X509 | jq -r '.server_crt') SERVER_KEY=$(echo $X509 | jq -r '.server_key') diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm index 97bc192b067e..9e866beb21e2 100644 --- a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm +++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm @@ -1,15 +1,15 @@ -applibs==1.mlnx.4.6.3064 -applibs-dev==1.mlnx.4.6.3064 -bfscripts==4.6.0-13035 -doca-cx-libs==2.7.0034-1 -ibverbs-providers==2307mlnx47-1.2310036 +applibs==1.mlnx.4.6.4072 +applibs-dev==1.mlnx.4.6.4072 +bfscripts==4.7.0-13127 +doca-cx-libs==2.8.0005-1 +ibverbs-providers==2404mlnx51-1.2404066 kernel-mft-dkms==4.28.0-96 -kernel-mft-dkms-modules-6.1.0-11-2-arm64==4.26.1 +kernel-mft-dkms-modules-6.1.0-11-2-arm64==4.28.0 libdashapi==1.0.0 -libdoca-cx-libs-dev==2.7.0034-1 +libdoca-cx-libs-dev==2.8.0005-1 libgrpc-dev==1.39.0-1 -libibverbs-dev==2307mlnx47-1.2310036 -libibverbs1==2307mlnx47-1.2310036 +libibverbs-dev==2404mlnx51-1.2404066 +libibverbs1==2404mlnx51-1.2404066 libnl-3-200==3.5.0-1 libnl-3-dev==3.5.0-1 libnl-cli-3-200==3.5.0-1 @@ -42,38 +42,39 @@ libyang-dev==1.0.73 linux-headers-6.1.0-11-2-amd64==6.1.38-4 linux-headers-6.1.0-11-2-arm64==6.1.38-4 linux-headers-6.1.0-11-2-common==6.1.38-4 -mft==4.26.1-3 +mft==4.28.0-96 mlnx-dpdk==22.11.0-2404.0.2 mlnx-dpdk-dev==22.11.0-2404.0.2 -mlnx-iproute2==6.4.0-1.2310036 -mlnx-ofed-kernel-utils==23.10.OFED.23.10.0.3.6.1-1 -mlnx-tools==23.10.0-1.2310036 +mlnx-iproute2==6.7.0-1.2404066 +mlnx-ofed-kernel-utils==24.04.OFED.24.04.0.6.6.1-1 +mlnx-sai==1.mlnx.SAIBuild2405.28.0.33 +mlnx-tools==24.04.0-1.2404066 mlxbf-bootctl==2.1 -mlxbf-bootimages==4.6.0-13035 +mlxbf-bootimages==4.7.0-13127 p4lang-bmv2==1.15.0-7 p4lang-p4c==1.2.4.2-2 p4lang-pi==0.1.0-15 python3-swsscommon==1.0.0 python3-yang==1.0.73 -rdma-core==2307mlnx47-1.2310036 +rdma-core==2404mlnx51-1.2404066 rxp-compiler==22.05.1 sdn-appliance==1.5-1mlnx1 sonic-mgmt-common==1.0.0 sonic-mgmt-common-codegen==1.0.0 sonic-platform-pddf==1.1 sonic-platform-pddf-sym==1.1 -sx-acl-helper==1.mlnx.4.6.3064 -sx-acl-helper-dev==1.mlnx.4.6.3064 -sx-complib==1.mlnx.4.6.3064 -sx-complib-dev==1.mlnx.4.6.3064 -sx-examples==1.mlnx.4.6.3064 -sx-examples-dev==1.mlnx.4.6.3064 -sx-gen-utils==1.mlnx.4.6.3064 -sx-gen-utils-dev==1.mlnx.4.6.3064 -sx-hash-calc==1.mlnx.4.6.3064 -sx-obj-desc-lib==1.mlnx.4.6.3064 -sx-obj-desc-lib-dev==1.mlnx.4.6.3064 -sxd-libs==1.mlnx.4.6.3064 -sxd-libs-dev==1.mlnx.4.6.3064 -wjh-libs==1.mlnx.4.6.3064 -wjh-libs-dev==1.mlnx.4.6.3064 +sx-acl-helper==1.mlnx.4.6.4072 +sx-acl-helper-dev==1.mlnx.4.6.4072 +sx-complib==1.mlnx.4.6.4072 +sx-complib-dev==1.mlnx.4.6.4072 +sx-examples==1.mlnx.4.6.4072 +sx-examples-dev==1.mlnx.4.6.4072 +sx-gen-utils==1.mlnx.4.6.4072 +sx-gen-utils-dev==1.mlnx.4.6.4072 +sx-hash-calc==1.mlnx.4.6.4072 +sx-obj-desc-lib==1.mlnx.4.6.4072 +sx-obj-desc-lib-dev==1.mlnx.4.6.4072 +sxd-libs==1.mlnx.4.6.4072 +sxd-libs-dev==1.mlnx.4.6.4072 +wjh-libs==1.mlnx.4.6.4072 +wjh-libs-dev==1.mlnx.4.6.4072 diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64 b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64 new file mode 100644 index 000000000000..5ab60ae1ec1f --- /dev/null +++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64 @@ -0,0 +1 @@ +mrvllibsai==1.14.0-1 diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 index cabe3e8db4cd..933217760ecd 100644 --- a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 +++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 @@ -1,20 +1,21 @@ bitarray==2.8.1 blessed==1.20.0 -cffi==1.16.0 +cffi==1.17.0 click==7.0 click-log==0.4.0 colorful==0.5.6 deepdiff==6.2.2 docker==7.1.0 -docker-image-py==0.1.12 +docker-image-py==0.1.13 enlighten==1.12.4 -filelock==3.14.0 +enum34==1.1.10 +filelock==3.15.4 freezegun==1.5.1 ijson==3.2.3 ipaddress==1.0.23 -jsondiff==2.0.0 +jsondiff==2.2.1 jsonpatch==1.33 -jsonpointer==2.4 +jsonpointer==3.0.0 jsonschema==2.6.0 lxml==4.9.1 natsort==6.2.1 @@ -23,20 +24,21 @@ netifaces==0.11.0 ordered-set==4.1.0 paramiko==2.11.0 pexpect==4.9.0 -prefixed==0.7.1 +prefixed==0.8.0 prettyprinter==0.18.0 ptyprocess==0.7.0 -pycairo==1.26.0 +pycairo==1.26.1 pycparser==2.22 pynacl==1.5.0 pyroute2==0.5.19 python-arptable==0.0.2 pyyaml==6.0.1 +scp==0.14.5 semantic-version==2.10.0 systemd-python==235 tabulate==0.9.0 toposort==1.6 -urllib3==2.2.1 +urllib3==2.2.2 wcwidth==0.2.13 www-authenticate==0.9.2 xmltodict==0.12.0 diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye index 1a89e443ed52..ed43881c5f4e 100644 --- a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye +++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye @@ -13,7 +13,7 @@ libprotobuf-dev==3.21.12-3 libprotobuf-lite32==3.21.12-3 libprotobuf32==3.21.12-3 libprotoc32==3.21.12-3 -libsai==1.13.0-1 +libsai==1.10.1-0 libsai-dev==1.13.0-1 libsaimetadata==1.0.0 libsaimetadata-dev==1.0.0 diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64 b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64 new file mode 100644 index 000000000000..2ccb237ebd9e --- /dev/null +++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64 @@ -0,0 +1 @@ +libsai==1.13.0-1 diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 index ab8c14a49c65..1ef3c81eab16 100644 --- a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 +++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 @@ -1,28 +1,27 @@ -bitarray==2.8.1 blessed==1.20.0 -cffi==1.16.0 +cffi==1.17.0 charset-normalizer==3.3.2 click-log==0.4.0 colorful==0.5.6 docker==7.1.0 -docker-image-py==0.1.12 +docker-image-py==0.1.13 enlighten==1.12.4 -filelock==3.14.0 +filelock==3.15.4 ijson==3.2.3 ipaddress==1.0.23 -jsondiff==2.0.0 +jsondiff==2.2.1 jsonpatch==1.33 -jsonpointer==2.4 +jsonpointer==3.0.0 natsort==6.2.1 netaddr==0.8.0 netifaces==0.11.0 paramiko==2.11.0 -prefixed==0.7.1 +prefixed==0.8.0 prettyprinter==0.18.0 -pycairo==1.26.0 +pycairo==1.26.1 pycparser==2.22 pynacl==1.5.0 -pyyaml==6.0.1 +scp==0.14.5 semantic-version==2.10.0 systemd-python==235 tabulate==0.9.0 diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-arm64 b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-arm64 new file mode 100644 index 000000000000..dd22191a0c63 --- /dev/null +++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-arm64 @@ -0,0 +1,2 @@ +bitarray==2.8.1 +pyyaml==6.0.1 diff --git a/files/build/versions/default/versions-docker b/files/build/versions/default/versions-docker index 0a183990093f..0a4ed7b06419 100644 --- a/files/build/versions/default/versions-docker +++ b/files/build/versions/default/versions-docker @@ -1,15 +1,15 @@ -amd64:amd64/debian:bookworm==sha256:08f76151d500d9e021b9f793364a3e9e534433297d16ba0152d69d1914b64d17 -amd64:amd64/debian:bullseye==sha256:5f2875f43c30349791f096598cbc96a774c422eeb2405e09ac4a7fc97492b623 -amd64:debian:bookworm==sha256:fac2c0fd33e88dfd3bc88a872cfb78dcb167e74af6162d31724df69e482f886c -amd64:debian:bullseye==sha256:2c7a92a41cb814c00e7d455b2bc0c90ccdb9a4ced2ffdc10e562c7a84a186032 -amd64:debian:buster==sha256:6e7bd55a5705914837aad8db01b349f4617510c11e47ccae8e87f6f14e489626 +amd64:amd64/debian:bookworm==sha256:69af26f9843be43dc53ec473972fb9176a1d50551c1dc0a80662ddeb1cb809f7 +amd64:amd64/debian:bullseye==sha256:49f482896ab298ec24b8b6e51aa835e9ae71cffb3c03bb4f7c21303a8b371564 +amd64:debian:bookworm==sha256:aadf411dc9ed5199bc7dab48b3e6ce18f8bbee4f170127f5ff1b75cd8035eb36 +amd64:debian:bullseye==sha256:0bb606aad3307370c8b4502eff11fde298e5b7721e59a0da3ce9b30cb92045ed +amd64:debian:buster==sha256:58ce6f1271ae1c8a2006ff7d3e54e9874d839f573d8009c20154ad0f2fb0a225 amd64:p4lang/behavioral-model@sha256:ce45720e28a96a50f275c1b511cd84c2558b62f2cf7a7e506765183bc3fb2e32==sha256:ce45720e28a96a50f275c1b511cd84c2558b62f2cf7a7e506765183bc3fb2e32 -arm64:arm64v8/debian:bookworm==sha256:3d67cec2f6aa8a4d6aa496ae8097747f216fe850aebc8db99548cb8a85e73181 -arm64:arm64v8/debian:bullseye==sha256:2fcb4b943d3c026dff3bb55f470140bea8c1ce2e05a03e62185d6f12dd131ac2 -arm64:debian:bookworm==sha256:fac2c0fd33e88dfd3bc88a872cfb78dcb167e74af6162d31724df69e482f886c -arm64:debian:bullseye==sha256:2c7a92a41cb814c00e7d455b2bc0c90ccdb9a4ced2ffdc10e562c7a84a186032 -arm64:debian:buster==sha256:6e7bd55a5705914837aad8db01b349f4617510c11e47ccae8e87f6f14e489626 -armhf:arm32v7/debian:bookworm==sha256:c5f29bcdb75f6a394c94d3f57daa79503870d45a3cd48b4a04fda725e9bd45db -armhf:debian:bookworm==sha256:fac2c0fd33e88dfd3bc88a872cfb78dcb167e74af6162d31724df69e482f886c -armhf:debian:bullseye==sha256:2c7a92a41cb814c00e7d455b2bc0c90ccdb9a4ced2ffdc10e562c7a84a186032 -armhf:debian:buster==sha256:6e7bd55a5705914837aad8db01b349f4617510c11e47ccae8e87f6f14e489626 +arm64:arm64v8/debian:bookworm==sha256:67b8fe57fcc540f94cf89327ba06e120fdd0ca6637b1f7e5fb003269c49be6fc +arm64:arm64v8/debian:bullseye==sha256:fdad84a235716d4f605a279cd34fa47d88789f24939cdbdc2e0ecdbc1e525a79 +arm64:debian:bookworm==sha256:aadf411dc9ed5199bc7dab48b3e6ce18f8bbee4f170127f5ff1b75cd8035eb36 +arm64:debian:bullseye==sha256:0bb606aad3307370c8b4502eff11fde298e5b7721e59a0da3ce9b30cb92045ed +arm64:debian:buster==sha256:58ce6f1271ae1c8a2006ff7d3e54e9874d839f573d8009c20154ad0f2fb0a225 +armhf:arm32v7/debian:bookworm==sha256:f8b683ce2fc0be935a1dd1e531d4fd3ecf56419876dfb1d46f674a972f95aab6 +armhf:debian:bookworm==sha256:aadf411dc9ed5199bc7dab48b3e6ce18f8bbee4f170127f5ff1b75cd8035eb36 +armhf:debian:bullseye==sha256:0bb606aad3307370c8b4502eff11fde298e5b7721e59a0da3ce9b30cb92045ed +armhf:debian:buster==sha256:58ce6f1271ae1c8a2006ff7d3e54e9874d839f573d8009c20154ad0f2fb0a225 diff --git a/files/build/versions/default/versions-git b/files/build/versions/default/versions-git index 7ac0b5c3bc23..cd33a9ac65b1 100644 --- a/files/build/versions/default/versions-git +++ b/files/build/versions/default/versions-git @@ -1,23 +1,22 @@ -https://chromium.googlesource.com/chromium/tools/depot_tools.git==ada9211999786073eb44acab46e596311523e0df +https://chromium.googlesource.com/chromium/tools/depot_tools.git==2836a02f55cd943760ab4949d5846cc5fb1fadcb https://github.com/aristanetworks/swi-tools.git==b5f087e4774168bf536360d43c9c509c8f14ad9f -https://github.com/CESNET/libyang.git==4c733412e7173219166be7053940326a92699765 +https://github.com/CESNET/libyang.git==fba28260f382d81cf8f4b91b24cd717b52324fc2 https://github.com/daveolson53/audisp-tacplus.git==559c9f22edd4f2dea0ecedffb3ad9502b12a75b6 https://github.com/daveolson53/libnss-tacplus.git==19008ab68d9d504aa58eb34d5f564755a1613b8b https://github.com/dyninc/OpenBFDD.git==e35f43ad8d2b3f084e96a84c392528a90d05a287 -https://github.com/flashrom/flashrom.git==e25129d9b6cf5bc39fed03cbf60af2378a3e745f -https://github.com/FreeRADIUS/freeradius-server.git==3eb4a4b01e4b33a44b07a6ae6b50071fe09ad1f8 -https://github.com/FreeRADIUS/pam_radius.git==d802da75cbfc3062ae1b18d0bf26ac2a030ffdaa +https://github.com/flashrom/flashrom.git==00e02a61840d0f230d25f8988d2f30100ae1388d +https://github.com/FreeRADIUS/freeradius-server.git==e61cfd0d01dfebd290beb499fce6476443018c98 +https://github.com/FreeRADIUS/pam_radius.git==c898ed12675cf386218e6e071bb158b725e9bdf4 https://github.com/jeroennijhof/pam_tacplus.git==b839c440e33c36eced9dcbc287fcfe6237c4c4ce https://github.com/lguohan/gnxi.git==3adf8b97755b49947e465b5a14645f11e79fa0cd https://github.com/Mellanox/libpsample.git==62bb27d9a49424e45191eee81df7ce0d8c74e774 https://github.com/openconfig/oc-pyang.git==4607fd1987d4f586aba03b40f222015cb3ef8161 https://github.com/p4lang/ptf.git==c554f83685186be4cfa9387eb5d6d700d2bbd7c0 https://github.com/p4lang/scapy-vxlan.git==85ffe83da156568ee47a0750f638227e6e1d7479 -https://github.com/sflow/host-sflow==a3ce4814bb6673a314142183e22c0e710cd21292 -https://github.com/sflow/sflowtool==c42c49cb80b927a4c02e54fc26430417f18f4833 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b/files/build/versions/default/versions-mirror index 8fbce29f2a86..dc917aeaf967 100644 --- a/files/build/versions/default/versions-mirror +++ b/files/build/versions/default/versions-mirror @@ -1,24 +1,24 @@ archive.ubuntu.com_ubuntu_dists_focal==2020-04-23T17:33:17Z archive.ubuntu.com_ubuntu_dists_focal-backports==2024-05-31T11:48:10Z -archive.ubuntu.com_ubuntu_dists_focal-updates==2024-06-05T02:25:09Z +archive.ubuntu.com_ubuntu_dists_focal-updates==2024-08-31T04:28:43Z deb.nodesource.com_node%5f14.x_dists_bookworm==2023-02-17T00:35:29Z deb.nodesource.com_node%5f14.x_dists_bullseye==2023-02-17T00:35:28Z deb.nodesource.com_node%5f14.x_dists_buster==2023-02-17T00:35:28Z -debian==20240605T000248Z -debian-security==20240605T000248Z -download.docker.com_linux_debian_dists_bookworm==2024-05-28T14:05:22Z -download.docker.com_linux_debian_dists_bullseye==2024-05-28T14:05:22Z -download.docker.com_linux_debian_dists_buster==2024-05-23T13:29:25Z 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+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.13/arm64/python3.9-minimal_3.9.2-1+fips_arm64.deb==146da01b9364f54ec022b77f2502cb1c +https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.13/arm64/python3.9_3.9.2-1+fips_arm64.deb==4d6307dabcd3060235d6188cfa0346b8 +https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.13/arm64/ssh_8.4p1-5+deb11u2+fips_all.deb==d1f50482046b4b4e39fd2a0273f5ecef +https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.13/arm64/symcrypt-openssl_0.13_arm64.deb==596652c7d5df5981844f5236d5615d40 +https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.13/armhf/golang-1.15-go_1.15.15-1~deb11u4+fips_armhf.deb==62c200bd7bf79df11cfdace12a351a73 +https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.13/armhf/golang-1.15-src_1.15.15-1~deb11u4+fips_armhf.deb==644145b4473d863edc1aaf98dfc92acf https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64-r0.iso==54e11e450a461b1f4ae39c3ce3f15eff https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64_4_asic-r0.iso==1d8b8d3fa37f842d0184b5205be22be9 https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64_6_asic-r0.iso==58494305d4ac201daedf9364a1018a1b https://sonicstorage.blob.core.windows.net/public/sai/bcmpai/REL_3.11/3.11/libsaibroncos_3.11_amd64.deb==6e21a16126e833516a9659d4c35c284e +https://static.rust-lang.org/rustup/dist/aarch64-unknown-linux-gnu/rustup-init==21b27f4a24c066ff3c4158998d4f794b +https://static.rust-lang.org/rustup/dist/armv7-unknown-linux-gnueabihf/rustup-init==13b8d6e5edef35414c2e28db31576656 +https://static.rust-lang.org/rustup/dist/x86_64-unknown-linux-gnu/rustup-init==eedd8a5a6ebbc921301660acb99646a5 https://storage.googleapis.com/golang/go1.15.15.linux-amd64.tar.gz==b75227438c6129b5013da053b3aa3f38 https://storage.googleapis.com/golang/go1.15.15.linux-arm64.tar.gz==6d721146a9195592d92a80cf27d475f9 https://storage.googleapis.com/golang/go1.15.15.linux-armv6l.tar.gz==23d140bbeedc978b954de1a199a22bdb diff --git a/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm b/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm index 023141a8fb42..dcf93868ad9f 100644 --- a/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm @@ -1,5 +1,5 @@ ca-certificates==20230311 -curl==7.88.1-10+deb12u5 +curl==7.88.1-10+deb12u6 iproute2==6.1.0-3 jq==1.6-2.1 less==590-2.1~deb12u2 @@ -8,7 +8,7 @@ libbpf1==1:1.1.0-1 libbrotli1==1.0.9-2+b6 libbsd0==0.11.7-2 libcap2-bin==1:2.66-4 -libcurl4==7.88.1-10+deb12u5 +libcurl4==7.88.1-10+deb12u6 libdaemon0==0.14-7.1 libdbus-1-3==1.14.10-1~deb12u1 libelf1==0.188-2.1 @@ -17,14 +17,14 @@ libexpat1==2.5.0-1 libfastjson4==1.2304.0-1 libgdbm-compat4==1.23-3 libgdbm6==1.23-3 -libgssapi-krb5-2==1.20.1-2+deb12u1 +libgssapi-krb5-2==1.20.1-2+deb12u2 libjansson4==2.14-2 libjemalloc2==5.3.0-1 libjq1==1.6-2.1 libk5crypto3==1.20.1-2+deb12u1+fips libkeyutils1==1.6.3-2 -libkrb5-3==1.20.1-2+deb12u1 -libkrb5support0==1.20.1-2+deb12u1 +libkrb5-3==1.20.1-2+deb12u2 +libkrb5support0==1.20.1-2+deb12u2 libldap-2.5-0==2.5.13+dfsg-5 liblognorm5==2.0.6-4 liblzf1==3.6-3 @@ -39,8 +39,8 @@ libpgm-5.3-0==5.3.128~dfsg-2 libproc2-0==2:4.0.2-3 libpsl5==0.21.2-1 libpython3-stdlib==3.11.2-1+b1 -libpython3.11-minimal==3.11.2-6 -libpython3.11-stdlib==3.11.2-6 +libpython3.11-minimal==3.11.2-6+deb12u2 +libpython3.11-stdlib==3.11.2-6+deb12u2 libreadline8==8.2-1.3 librtmp1==2.4+20151223.gitfa8646d.1-2+b2 libsasl2-2==2.1.28+dfsg-10 @@ -61,7 +61,7 @@ openssl==3.0.11-1~deb12u2+fips perl==5.36.0-7+deb12u1 perl-modules-5.36==5.36.0-7+deb12u1 procps==2:4.0.2-3 -python-is-python3==3.11.1-3 +python-is-python3==3.11.2-1+deb12u1 python3==3.11.2-1+b1 python3-distutils==3.11.2-3 python3-lib2to3==3.11.2-3 @@ -69,8 +69,8 @@ python3-minimal==3.11.2-1+b1 python3-pkg-resources==66.1.1-1 python3-setuptools==66.1.1-1 python3-wheel==0.38.4-2 -python3.11==3.11.2-6 -python3.11-minimal==3.11.2-6 +python3.11==3.11.2-6+deb12u2 +python3.11-minimal==3.11.2-6+deb12u2 readline-common==8.2-1.3 redis-tools==5:7.0.15-1~deb12u1 rsyslog==8.2302.0-1 diff --git a/files/build/versions/dockers/docker-base-bookworm/versions-py3 b/files/build/versions/dockers/docker-base-bookworm/versions-py3 index 13275869ad3c..0b0379415118 100644 --- a/files/build/versions/dockers/docker-base-bookworm/versions-py3 +++ b/files/build/versions/dockers/docker-base-bookworm/versions-py3 @@ -2,10 +2,10 @@ async-timeout==4.0.3 j2cli==0.3.10 jinja2==3.1.4 markupsafe==2.1.5 -pip==24.0 +pip==24.2 python-lzf==0.2.4 rdbtools==0.1.15 -redis==5.0.4 +redis==5.0.8 setuptools==66.1.1 supervisor==4.2.5 supervisord-dependent-startup==1.4.0 diff --git a/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye b/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye index f27b2dcab27a..2195c07ddbef 100644 --- a/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye +++ b/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye @@ -1,5 +1,5 @@ ca-certificates==20210119 -curl==7.74.0-1.3+deb11u11 +curl==7.74.0-1.3+deb11u12 iproute2==5.10.0-4 jq==1.6-2.1 less==551-2+deb11u2 @@ -9,7 +9,7 @@ libbrotli1==1.0.9-2+b2 libbsd0==0.11.3-1+deb11u1 libcap2==1:2.44-1 libcap2-bin==1:2.44-1 -libcurl4==7.74.0-1.3+deb11u11 +libcurl4==7.74.0-1.3+deb11u12 libdaemon0==0.14-7.1 libdbus-1-3==1.12.28-0+deb11u1 libelf1==0.183-1 @@ -21,7 +21,7 @@ libgdbm6==1.19-2 libjansson4==2.13.1-1.1 libjemalloc2==5.2.1-3 libjq1==1.6-2.1 -libk5crypto3==1.18.3-6+deb11u4+fips +libk5crypto3==1.18.3-6+deb11u5+fips libldap-2.4-2==2.4.57+dfsg-3+deb11u1 liblognorm5==2.0.5-1.1 liblua5.1-0==5.1.5-8.1+b3 @@ -47,7 +47,7 @@ libsasl2-2==2.1.27+dfsg-2.1+deb11u1 libsasl2-modules-db==2.1.27+dfsg-2.1+deb11u1 libsodium23==1.0.18-1 libsqlite3-0==3.34.1-3 -libssh2-1==1.9.0-2 +libssh2-1==1.9.0-2+deb11u1 libssl-dev==1.1.1n-0+deb11u5+fips libssl1.1==1.1.1n-0+deb11u5+fips libwrap0==7.6.q-31 diff --git a/files/build/versions/dockers/docker-base-bullseye/versions-py3 b/files/build/versions/dockers/docker-base-bullseye/versions-py3 index c927d101229d..2b94f59fbdd4 100644 --- a/files/build/versions/dockers/docker-base-bullseye/versions-py3 +++ b/files/build/versions/dockers/docker-base-bullseye/versions-py3 @@ -2,10 +2,10 @@ async-timeout==4.0.3 j2cli==0.3.10 jinja2==3.1.4 markupsafe==2.1.5 -pip==24.0 +pip==24.2 python-lzf==0.2.4 rdbtools==0.1.15 -redis==5.0.4 +redis==5.0.8 setuptools==49.6.0 supervisor==4.2.1 supervisord-dependent-startup==1.4.0 diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm b/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm index 4cbe81273067..0455e42e34d6 100644 --- a/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm @@ -10,6 +10,7 @@ libhiredis0.14==0.14.1-3 libicu-dev==72.1-3 libicu72==72.1-3 libjs-jquery==3.6.1+dfsg+~3.5.14-1 +libk5crypto3==1.20.1-2+deb12u2 libnl-3-200==3.5.0-1 libnl-cli-3-200==3.5.0-1 libnl-genl-3-200==3.5.0-1 @@ -17,7 +18,7 @@ libnl-nf-3-200==3.5.0-1 libnl-route-3-200==3.5.0-1 libnsl-dev==1.3.0-2 libpcre3==2:8.39-15 -libpython3.11==3.11.2-6 +libpython3.11==3.11.2-6+deb12u2 libswsscommon==1.0.0 libtirpc-dev==1.3.3+ds-1 libxml2==2.9.14+dfsg-1.3~deb12u1 @@ -27,7 +28,7 @@ libxslt1.1==1.1.35-1 libyaml-0-2==0.2.5-1 libyang==1.0.73 libyang-cpp==1.0.73 -linux-libc-dev==6.1.90-1 +linux-libc-dev==6.1.99-1 python3-swsscommon==1.0.0 python3-yaml==6.0-3+b2 python3-yang==1.0.73 diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3 b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3 index 22c19f5eb583..463edbeae50f 100644 --- a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3 +++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3 @@ -1,7 +1,7 @@ bitarray==2.8.1 ijson==3.2.3 ipaddress==1.0.23 -jsondiff==2.0.0 +jsondiff==2.2.1 lxml==4.9.1 natsort==6.2.1 netaddr==0.8.0 @@ -10,7 +10,7 @@ pyangbind==0.8.2 pyyaml==6.0.1 redis==5.0.1 redis-dump-load==1.1 -regex==2024.5.15 +regex==2024.7.24 six==1.16.0 tabulate==0.9.0 xmltodict==0.12.0 diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye index e1c0445e1539..5e5f371abe21 100644 --- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye +++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye @@ -24,7 +24,7 @@ libxslt1-dev==1.1.34-4+deb11u1 libxslt1.1==1.1.34-4+deb11u1 libyang==1.0.73 libyang-cpp==1.0.73 -linux-libc-dev==5.10.218-1 +linux-libc-dev==5.10.221-1 python3-swsscommon==1.0.0 python3-yang==1.0.73 sonic-db-cli==1.0.0 diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3 b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3 index 4ee744daedb7..51c6d30ebb12 100644 --- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3 +++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3 @@ -1,7 +1,7 @@ bitarray==2.8.1 ijson==3.2.3 ipaddress==1.0.23 -jsondiff==2.0.0 +jsondiff==2.2.1 lxml==4.9.1 natsort==6.2.1 netaddr==0.8.0 @@ -10,7 +10,7 @@ pyangbind==0.8.1 pyyaml==6.0.1 redis==4.5.4 redis-dump-load==1.1 -regex==2024.5.15 +regex==2024.7.24 six==1.16.0 tabulate==0.9.0 xmltodict==0.12.0 diff --git a/files/build/versions/dockers/docker-dash-engine/versions-deb-focal b/files/build/versions/dockers/docker-dash-engine/versions-deb-focal index 723eaaedd005..e85f77f6c294 100644 --- a/files/build/versions/dockers/docker-dash-engine/versions-deb-focal +++ b/files/build/versions/dockers/docker-dash-engine/versions-deb-focal @@ -67,10 +67,10 @@ libnpth0==1.6-1 libperl5.30==5.30.0-9ubuntu0.5 libpopt0==1.16-14 libpython3-dev==3.8.2-0ubuntu2 -libpython3.8==3.8.10-0ubuntu1~20.04.9 -libpython3.8-dev==3.8.10-0ubuntu1~20.04.9 -libpython3.8-minimal==3.8.10-0ubuntu1~20.04.9 -libpython3.8-stdlib==3.8.10-0ubuntu1~20.04.9 +libpython3.8==3.8.10-0ubuntu1~20.04.11 +libpython3.8-dev==3.8.10-0ubuntu1~20.04.11 +libpython3.8-minimal==3.8.10-0ubuntu1~20.04.11 +libpython3.8-stdlib==3.8.10-0ubuntu1~20.04.11 libquadmath0==10.5.0-1ubuntu1~20.04 libroken18-heimdal==7.7.0+dfsg-1ubuntu1.4 libstdc++-9-dev==9.4.0-1ubuntu1~20.04.2 @@ -81,7 +81,7 @@ libwind0-heimdal==7.7.0+dfsg-1ubuntu1.4 logrotate==3.14.0-4ubuntu3 make==4.2.1-1.2 netbase==6.1 -openssl==1.1.1f-1ubuntu2.22 +openssl==1.1.1f-1ubuntu2.23 patch==2.7.6-6 perl==5.30.0-9ubuntu0.5 perl-base==5.30.0-9ubuntu0.5 @@ -91,9 +91,9 @@ python-pip-whl==20.0.2-5ubuntu1.10 python3-dev==3.8.2-0ubuntu2 python3-pip==20.0.2-5ubuntu1.10 python3-wheel==0.34.2-1ubuntu0.1 -python3.8==3.8.10-0ubuntu1~20.04.9 -python3.8-dev==3.8.10-0ubuntu1~20.04.9 -python3.8-minimal==3.8.10-0ubuntu1~20.04.9 +python3.8==3.8.10-0ubuntu1~20.04.11 +python3.8-dev==3.8.10-0ubuntu1~20.04.11 +python3.8-minimal==3.8.10-0ubuntu1~20.04.11 rsyslog==8.2001.0-1ubuntu1.3 supervisor==4.1.0-1ubuntu1 ucf==3.0038+nmu1 diff --git a/files/build/versions/dockers/docker-database/versions-deb-bookworm b/files/build/versions/dockers/docker-database/versions-deb-bookworm index d4a0316f6cd4..252f970eb514 100644 --- a/files/build/versions/dockers/docker-database/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-database/versions-deb-bookworm @@ -3,14 +3,14 @@ gdbserver==13.1-3 libbabeltrace1==1.5.11-1+b2 libboost-regex1.74.0==1.74.0+ds1-21 libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 libdashapi==1.0.0 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 libdw1==0.188-2.1 libedit2==3.1-20221030-2 libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libicu72==72.1-3 libipt2==2.0.5-1 @@ -19,9 +19,12 @@ libprotobuf-lite32==3.21.12-3 libprotobuf32==3.21.12-3 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libunwind8==1.6.2-3 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 redis-server==5:7.0.15-1~deb12u1 sensible-utils==0.0.17+nmu1 sshpass==1.09-1+b1 diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm b/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm index 3da29ccd3fdb..c89c3cb30ac6 100644 --- a/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm @@ -5,7 +5,7 @@ isc-dhcp-relay-dbgsym==4.4.3-P1-2 libbabeltrace1==1.5.11-1+b2 libboost-regex1.74.0==1.74.0+ds1-21 libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 libdw1==0.188-2.1 @@ -13,7 +13,7 @@ libedit2==3.1-20221030-2 libevent-2.1-7==2.1.12-stable-8 libexplain51==1.4.D001-12+b1 libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libicu72==72.1-3 libipt2==2.0.5-1 @@ -23,10 +23,13 @@ liblua5.1-0==5.1.5-9 libmpfr6==4.2.0-1 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libunwind8==1.6.2-3 lsof==4.95.0-1 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 sensible-utils==0.0.17+nmu1 sonic-dhcp6relay==1.0.0-0 sonic-dhcp6relay-dbgsym==1.0.0-0 diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-py3 b/files/build/versions/dockers/docker-dhcp-relay/versions-py3 index 7d60ac8db299..3ba2e7a2c6b5 100644 --- a/files/build/versions/dockers/docker-dhcp-relay/versions-py3 +++ b/files/build/versions/dockers/docker-dhcp-relay/versions-py3 @@ -1,3 +1,3 @@ freezegun==1.5.1 -psutil==5.9.8 +psutil==6.0.0 python-dateutil==2.9.0.post0 diff --git a/files/build/versions/dockers/docker-eventd/versions-deb-bookworm b/files/build/versions/dockers/docker-eventd/versions-deb-bookworm index f865853059e8..7b13519ae379 100644 --- a/files/build/versions/dockers/docker-eventd/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-eventd/versions-deb-bookworm @@ -3,22 +3,25 @@ gdbserver==13.1-3 libbabeltrace1==1.5.11-1+b2 libboost-regex1.74.0==1.74.0+ds1-21 libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 libdw1==0.188-2.1 libedit2==3.1-20221030-2 libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libicu72==72.1-3 libipt2==2.0.5-1 libmpfr6==4.2.0-1 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libunwind8==1.6.2-3 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 sensible-utils==0.0.17+nmu1 sonic-eventd-dbgsym==1.0.0-0 sshpass==1.09-1+b1 diff --git a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bookworm b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bookworm index 0da31e794f37..d994e066d58a 100644 --- a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bookworm @@ -10,13 +10,13 @@ libbabeltrace1==1.5.11-1+b2 libboost-regex1.74.0==1.74.0+ds1-21 libc-ares2==1.18.1-3 libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 libdw1==0.188-2.1 libedit2==3.1-20221030-2 libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libicu72==72.1-3 libipt2==2.0.5-1 @@ -31,13 +31,16 @@ libsnmp-base==5.9.3+dfsg-2 libsnmp40==5.9.3+dfsg-2 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libunwind8==1.6.2-3 libyang2==2.0.112-6 libyang2-dbgsym==2.0.112-6 logrotate==3.21.0-1 lsof==4.95.0-1 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 pci.ids==0.0~2023.04.11-1 sensible-utils==0.0.17+nmu1 sonic-rsyslog-plugin==1.0.0-0 diff --git a/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye b/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye index 5c4d5df38329..1b81a742370b 100644 --- a/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye +++ b/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye @@ -6,12 +6,12 @@ libc-dev-bin==2.31-13+deb11u10 libc6-dev==2.31-13+deb11u10 libcbor0==0.5.0+dfsg-2 libcrypt-dev==1:4.4.18-4 -libcurl3-gnutls==7.74.0-1.3+deb11u11 +libcurl3-gnutls==7.74.0-1.3+deb11u12 libdebuginfod1==0.183-1 libdw1==0.183-1 libedit2==3.1-20191231-2+b1 libfido2-1==1.6.0-2 -libglib2.0-0==2.66.8-1+deb11u3 +libglib2.0-0==2.66.8-1+deb11u4 libgpm2==1.20.7-8 libicu67==67.1-7 libipt2==2.0.3-1 @@ -28,7 +28,7 @@ libsource-highlight4v5==3.1.9-3+b1 libswsscommon-dbgsym==1.0.0 libtirpc-dev==1.3.1-1+deb11u1 libunwind8==1.3.2-2 -linux-libc-dev==5.10.218-1 +linux-libc-dev==5.10.221-1 openssh-client==1:8.4p1-5+deb11u3 sshpass==1.09-1+b1 strace==5.10-1 diff --git a/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye b/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye index d61c9bbe5283..2060d9bc5d30 100644 --- a/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye +++ b/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye @@ -3,12 +3,12 @@ gdbserver==10.1-1.7 libbabeltrace1==1.5.8-1+b3 libboost-regex1.74.0==1.74.0-9 libcbor0==0.5.0+dfsg-2 -libcurl3-gnutls==7.74.0-1.3+deb11u11 +libcurl3-gnutls==7.74.0-1.3+deb11u12 libdebuginfod1==0.183-1 libdw1==0.183-1 libedit2==3.1-20191231-2+b1 libfido2-1==1.6.0-2 -libglib2.0-0==2.66.8-1+deb11u3 +libglib2.0-0==2.66.8-1+deb11u4 libgpm2==1.20.7-8 libicu67==67.1-7 libipt2==2.0.3-1 diff --git a/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm b/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm index 616dcecd80a9..826787858cec 100644 --- a/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm @@ -129,8 +129,8 @@ libclang-cpp14==1:14.0.6-12 libclang1-14==1:14.0.6-12 libctf-nobfd0==2.40-2 libctf0==2.40-2 -libcurl3-gnutls==7.88.1-10+deb12u5 -libcurl3-nss==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 +libcurl3-nss==7.88.1-10+deb12u6 libdbus-1-dev==1.14.10-1~deb12u1 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 @@ -154,7 +154,7 @@ libgc1==1:8.2.2-3 libgcc-12-dev==12.2.0-14 libgfortran-12-dev==12.2.0-14 libgfortran5==12.2.0-14 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgmp-dev==2:6.2.1+dfsg1-1.1 libgmpxx4ldbl==2:6.2.1+dfsg1-1.1 libgomp1==12.2.0-14 @@ -179,8 +179,8 @@ libjs-sphinxdoc==5.3.0-4 libjs-underscore==1.13.4~dfsg+~1.11.4-3 libllvm14==1:14.0.6-12 liblsan0==12.2.0-14 -libltdl-dev==2.4.7-5 -libltdl7==2.4.7-5 +libltdl-dev==2.4.7-7~deb12u1 +libltdl7==2.4.7-7~deb12u1 libmagic-mgc==1:5.44-3 libmagic1==1:5.44-3 libmpc3==1.3.1-1 @@ -216,10 +216,10 @@ libprotoc32==3.21.12-3 libpsm-infinipath1==3.3+20.604758e7-6.2 libpsm2-2==11.2.185-2 libpython3-dev==3.11.2-1+b1 -libpython3.11-dev==3.11.2-6 -libqt5core5a==5.15.8+dfsg-11 -libqt5dbus5==5.15.8+dfsg-11 -libqt5network5==5.15.8+dfsg-11 +libpython3.11-dev==3.11.2-6+deb12u2 +libqt5core5a==5.15.8+dfsg-11+deb12u2 +libqt5dbus5==5.15.8+dfsg-11+deb12u2 +libqt5network5==5.15.8+dfsg-11+deb12u2 libquadmath0==12.2.0-14 librdmacm1==44.0-2 libre2-9==20220601+dfsg-1+b1 @@ -233,13 +233,14 @@ libsaivs==1.0.0 libsaivs-dbgsym==1.0.0 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.11-1~deb12u2 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libstdc++-12-dev==12.2.0-14 libswsscommon-dbgsym==1.0.0 libthrift-0.17.0==0.17.0-2+b2 libthrift-dev==0.17.0-2+b2 libtirpc-dev==1.3.3+ds-1 -libtool==2.4.7-5 +libtool==2.4.7-7~deb12u1 libtsan2==12.2.0-14 libubsan1==12.2.0-14 libucx0==1.13.1-1 @@ -253,7 +254,7 @@ libxext6==2:1.3.4-1+b1 libxml2==2.9.14+dfsg-1.3~deb12u1 libxnvctrl0==525.85.05-3~deb12u1 libz3-4==4.8.12-3.1 -linux-libc-dev==6.1.90-1 +linux-libc-dev==6.1.99-1 llvm==1:14.0-55.7~deb12u1 llvm-14==1:14.0.6-12 llvm-14-linker-tools==1:14.0.6-12 @@ -267,7 +268,8 @@ nss-plugin-pem==1.0.8+1-1 ocl-icd-libopencl1==2.3.1-1 openmpi-bin==4.1.4-3+b1 openmpi-common==4.1.4-3 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 p4lang-bmv2==1.15.0-7 p4lang-p4c==1.2.4.2-2 p4lang-pi==0.1.0-15 @@ -285,7 +287,7 @@ python3-pyroute2==0.7.2-2 python3-scapy==2.5.0+dfsg-2 python3-six==1.16.0-4 python3-thrift==0.17.0-2+b2 -python3.11-dev==3.11.2-6 +python3.11-dev==3.11.2-6+deb12u2 rpcsvc-proto==1.4.3-1 sensible-utils==0.0.17+nmu1 sgml-base==1.31 diff --git a/files/build/versions/dockers/docker-lldp/versions-deb-bookworm b/files/build/versions/dockers/docker-lldp/versions-deb-bookworm index 3c52fb813cd5..dc68ecce9890 100644 --- a/files/build/versions/dockers/docker-lldp/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-lldp/versions-deb-bookworm @@ -3,14 +3,14 @@ gdbserver==13.1-3 libbabeltrace1==1.5.11-1+b2 libboost-regex1.74.0==1.74.0+ds1-21 libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 libdw1==0.188-2.1 libedit2==3.1-20221030-2 libevent-2.1-7==2.1.12-stable-8 libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libicu72==72.1-3 libipt2==2.0.5-1 @@ -22,12 +22,15 @@ libsnmp-base==5.9.3+dfsg-2 libsnmp40==5.9.3+dfsg-2 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libunwind8==1.6.2-3 libxml2==2.9.14+dfsg-1.3~deb12u1 lldpd==1.0.16-1+deb12u1 lldpd-dbgsym==1.0.16-1+deb12u1 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 pci.ids==0.0~2023.04.11-1 sensible-utils==0.0.17+nmu1 sshpass==1.09-1+b1 diff --git a/files/build/versions/dockers/docker-macsec/versions-deb-bookworm b/files/build/versions/dockers/docker-macsec/versions-deb-bookworm index ecadea5a6d95..f94e72cd0856 100644 --- a/files/build/versions/dockers/docker-macsec/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-macsec/versions-deb-bookworm @@ -3,13 +3,13 @@ gdbserver==13.1-3 libbabeltrace1==1.5.11-1+b2 libboost-regex1.74.0==1.74.0+ds1-21 libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 libdw1==0.188-2.1 libedit2==3.1-20221030-2 libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libicu72==72.1-3 libipt2==2.0.5-1 @@ -17,9 +17,12 @@ libmpfr6==4.2.0-1 libpcsclite1==1.9.9-2 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libunwind8==1.6.2-3 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 sensible-utils==0.0.17+nmu1 sshpass==1.09-1+b1 strace==6.1-0.1 diff --git a/files/build/versions/dockers/docker-mux/versions-deb-bookworm b/files/build/versions/dockers/docker-mux/versions-deb-bookworm index 0838f42f982d..b5f48ce47f59 100644 --- a/files/build/versions/dockers/docker-mux/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-mux/versions-deb-bookworm @@ -7,22 +7,25 @@ libboost-program-options1.74.0==1.74.0+ds1-21 libboost-regex1.74.0==1.74.0+ds1-21 libboost-thread1.74.0==1.74.0+ds1-21 libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 libdw1==0.188-2.1 libedit2==3.1-20221030-2 libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libicu72==72.1-3 libipt2==2.0.5-1 libmpfr6==4.2.0-1 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libunwind8==1.6.2-3 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 sensible-utils==0.0.17+nmu1 sonic-linkmgrd==1.0.0-1 sonic-linkmgrd-dbgsym==1.0.0-1 diff --git a/files/build/versions/dockers/docker-nat/versions-deb-bookworm b/files/build/versions/dockers/docker-nat/versions-deb-bookworm index 6e0af0d6e2d1..d0b5bd2e6aa1 100644 --- a/files/build/versions/dockers/docker-nat/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-nat/versions-deb-bookworm @@ -6,13 +6,13 @@ iptables==1.8.9-2 libbabeltrace1==1.5.11-1+b2 libboost-regex1.74.0==1.74.0+ds1-21 libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 libdw1==0.188-2.1 libedit2==3.1-20221030-2 libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libicu72==72.1-3 libip4tc2==1.8.9-2 @@ -25,10 +25,13 @@ libnfnetlink0==1.0.2-2 libnftnl11==1.2.4-2 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libunwind8==1.6.2-3 netbase==6.4 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 sensible-utils==0.0.17+nmu1 sshpass==1.09-1+b1 strace==6.1-0.1 diff --git a/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm b/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm index f606f8ca6820..ea57df30136a 100644 --- a/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm @@ -7,13 +7,13 @@ ifupdown==0.8.41 libbabeltrace1==1.5.11-1+b2 libboost-regex1.74.0==1.74.0+ds1-21 libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 libdw1==0.188-2.1 libedit2==3.1-20221030-2 libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libicu72==72.1-3 libipt2==2.0.5-1 @@ -28,11 +28,14 @@ libpci3==1:3.9.0-4 libsairedis-dbgsym==1.0.0 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libunwind8==1.6.2-3 ndisc6==1.0.5-1+b2 ndppd==0.2.5-6 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 pci.ids==0.0~2023.04.11-1 pciutils==1:3.9.0-4 python3-protobuf==3.21.12-3 diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm index 293dabbf967b..4e20b15fc7dd 100644 --- a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm @@ -1,5 +1,5 @@ -applibs==1.mlnx.4.6.3064 -applibs-dev==1.mlnx.4.6.3064 +applibs==1.mlnx.4.6.4072 +applibs-dev==1.mlnx.4.6.4072 dmidecode==3.4-1 ethtool==1:6.1-1 fancontrol==1:3.6.0-7.1 @@ -16,7 +16,7 @@ libbabeltrace1==1.5.11-1+b2 libboost-regex1.74.0==1.74.0+ds1-21 libcairo2==1.16.0-7 libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 libdatrie1==0.2.13-2+b1 libdbi1==0.9.0-6 libdebuginfod-common==0.188-2.1 @@ -25,9 +25,9 @@ libdw1==0.188-2.1 libedit2==3.1-20221030-2 libfido2-1==1.12.0-2+b1 libfontconfig1==2.14.1-4 -libfreetype6==2.12.1+dfsg-5 +libfreetype6==2.12.1+dfsg-5+deb12u3 libfribidi0==1.0.8-2.1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libgraphite2-3==1.3.14-1 libharfbuzz0b==6.0.0+dfsg-3 @@ -51,6 +51,8 @@ libsensors5==1:3.6.0-7.1 libsensors5-dbgsym==1:3.6.0-7.1 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libthai-data==0.1.29-1 libthai0==0.1.29-1 @@ -67,13 +69,14 @@ libxml2==2.9.14+dfsg-1.3~deb12u1 libxrender1==1:0.9.10-1.1 lm-sensors==1:3.6.0-7.1 lm-sensors-dbgsym==1:3.6.0-7.1 -mft==4.26.1-3 +mft==4.28.0-96 nvme-cli==2.4+really2.3-3 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 pci.ids==0.0~2023.04.11-1 pciutils==1:3.9.0-4 psmisc==23.6-1 -python-sdk-api==1.mlnx.4.6.3064 +python-sdk-api==1.mlnx.4.6.4072 python3-attr==22.2.0-1 python3-jsonschema==4.10.3-1 python3-pyrsistent==0.18.1-1+b3 @@ -85,14 +88,15 @@ sensord-dbgsym==1:3.6.0-7.1 smartmontools==7.4-2~bpo12+1 sshpass==1.09-1+b1 strace==6.1-0.1 -sx-complib==1.mlnx.4.6.3064 -sx-complib-dev==1.mlnx.4.6.3064 -sx-gen-utils==1.mlnx.4.6.3064 -sx-gen-utils-dev==1.mlnx.4.6.3064 -sxd-libs==1.mlnx.4.6.3064 -sxd-libs-dev==1.mlnx.4.6.3064 +sx-complib==1.mlnx.4.6.4072 +sx-complib-dev==1.mlnx.4.6.4072 +sx-gen-utils==1.mlnx.4.6.4072 +sx-gen-utils-dev==1.mlnx.4.6.4072 +sxd-libs==1.mlnx.4.6.4072 +sxd-libs-dev==1.mlnx.4.6.4072 ucf==3.0043+nmu1 -udev==252.22-1~deb12u1 +udev==252.26-1~deb12u2 uuid-runtime==2.38.1-5+deb12u1 vim==2:9.0.1378-2 vim-runtime==2:9.0.1378-2 +xxd==2:9.0.1378-2 diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-py3 b/files/build/versions/dockers/docker-platform-monitor/versions-py3 index 62d7ff68a570..cede940bf325 100644 --- a/files/build/versions/dockers/docker-platform-monitor/versions-py3 +++ b/files/build/versions/dockers/docker-platform-monitor/versions-py3 @@ -1,17 +1,18 @@ attrs==22.2.0 -certifi==2024.6.2 +certifi==2024.8.30 charset-normalizer==3.3.2 +enum34==1.1.10 grpcio==1.51.1 grpcio-tools==1.51.1 guacamole==0.9.2 -idna==3.7 +idna==3.8 jsonschema==2.6.0 libpci==0.2 netifaces==0.11.0 -protobuf==4.25.3 -psutil==5.9.8 +protobuf==4.25.4 +psutil==6.0.0 pyrsistent==0.18.1 -python-sdk-api==4.6.3064 +python-sdk-api==4.6.4072 requests==2.32.3 thrift==0.13.0 -urllib3==2.2.1 +urllib3==2.2.2 diff --git a/files/build/versions/dockers/docker-ptf-sai/versions-py3 b/files/build/versions/dockers/docker-ptf-sai/versions-py3 index 08550dfeb0ac..cd3358c161fd 100644 --- a/files/build/versions/dockers/docker-ptf-sai/versions-py3 +++ b/files/build/versions/dockers/docker-ptf-sai/versions-py3 @@ -1,10 +1,10 @@ crc16==0.1.1 -getmac==0.9.4 +getmac==0.9.5 importlib-metadata==6.7.0 netifaces==0.11.0 packaging==24.0 packet-helper==0.0.1 -psutil==5.9.8 +psutil==6.0.0 ptf==0.0.0 pyperclip==1.8.2 pysubnettree==0.37 diff --git a/files/build/versions/dockers/docker-ptf/versions-deb-buster b/files/build/versions/dockers/docker-ptf/versions-deb-buster index 529178c9cb97..225391ea8be4 100644 --- a/files/build/versions/dockers/docker-ptf/versions-deb-buster +++ b/files/build/versions/dockers/docker-ptf/versions-deb-buster @@ -47,8 +47,8 @@ gcc==4:8.3.0-1 gcc-8==8.3.0-6 gdb==8.2.1-2+b3 gir1.2-glib-2.0==1.58.3-2 -git==1:2.20.1-2+deb10u8 -git-man==1:2.20.1-2+deb10u8 +git==1:2.20.1-2+deb10u9 +git-man==1:2.20.1-2+deb10u9 glib-networking==2.58.0-2+deb10u2 glib-networking-common==2.58.0-2+deb10u2 glib-networking-services==2.58.0-2+deb10u2 @@ -99,11 +99,11 @@ libboost-atomic1.71.0==1.71.0-6~bpo10+1 libbrotli1==1.0.7-2+deb10u1 libbsd0==0.9.1-2+deb10u1 libc-ares2==1.14.0-1+deb10u4 -libc-bin==2.28-10+deb10u3 -libc-dev-bin==2.28-10+deb10u3 -libc6==2.28-10+deb10u3 -libc6-dbg==2.28-10+deb10u3 -libc6-dev==2.28-10+deb10u3 +libc-bin==2.28-10+deb10u4 +libc-dev-bin==2.28-10+deb10u4 +libc6==2.28-10+deb10u4 +libc6-dbg==2.28-10+deb10u4 +libc6-dev==2.28-10+deb10u4 libcairo-gobject2==1.16.0-4+deb10u1 libcairo2==1.16.0-4+deb10u1 libcc1-0==8.3.0-6 @@ -113,9 +113,9 @@ libcgraph6==2.40.1-6+deb10u1 libcolord2==1.4.3-4 libcroco3==0.6.12-3 libcryptsetup12==2:2.1.0-5+deb10u2 -libcups2==2.2.10-6+deb10u9 +libcups2==2.2.10-6+deb10u10 libcupsfilters1==1.21.6-5+deb10u1 -libcupsimage2==2.2.10-6+deb10u9 +libcupsimage2==2.2.10-6+deb10u10 libcurl3-gnutls==7.64.0-4+deb10u9 libcurl4==7.64.0-4+deb10u9 libdaemon0==0.14-7 @@ -464,7 +464,7 @@ libxxf86dga1==2:1.1.4-1+b3 libxxf86vm1==1:1.1.4-1+b2 libxxhash0==0.6.5-2 libzzip-0-13==0.13.62-3.2+deb10u1 -linux-libc-dev==4.19.304-1 +linux-libc-dev==4.19.316-1 lmodern==2.004.5-6 logrotate==3.14.0-4 lsb-base==10.2019051400 diff --git a/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm index 2c7500156d98..97713014158c 100644 --- a/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm @@ -3,22 +3,25 @@ gdbserver==13.1-3 libbabeltrace1==1.5.11-1+b2 libboost-regex1.74.0==1.74.0+ds1-21 libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 libdw1==0.188-2.1 libedit2==3.1-20221030-2 libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libicu72==72.1-3 libipt2==2.0.5-1 libmpfr6==4.2.0-1 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libunwind8==1.6.2-3 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 radvd==1:2.19-1+b1 sensible-utils==0.0.17+nmu1 sshpass==1.09-1+b1 diff --git a/files/build/versions/dockers/docker-sflow/versions-deb-bookworm b/files/build/versions/dockers/docker-sflow/versions-deb-bookworm index d4868ac3d886..cd199d006d70 100644 --- a/files/build/versions/dockers/docker-sflow/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-sflow/versions-deb-bookworm @@ -6,22 +6,25 @@ hsflowd-dbgsym==2.0.51-26 libbabeltrace1==1.5.11-1+b2 libboost-regex1.74.0==1.74.0+ds1-21 libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 libdw1==0.188-2.1 libedit2==3.1-20221030-2 libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libicu72==72.1-3 libipt2==2.0.5-1 libmpfr6==4.2.0-1 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libunwind8==1.6.2-3 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 psample==1.1-1 sensible-utils==0.0.17+nmu1 sflowtool==5.04 diff --git a/files/build/versions/dockers/docker-snmp/versions-deb-bookworm b/files/build/versions/dockers/docker-snmp/versions-deb-bookworm index 80548bf4227b..32f17d672d24 100644 --- a/files/build/versions/dockers/docker-snmp/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-snmp/versions-deb-bookworm @@ -6,14 +6,14 @@ libbabeltrace1==1.5.11-1+b2 libboost-regex1.74.0==1.74.0+ds1-21 libc-l10n==2.36-9+deb12u7 libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 libdw1==0.188-2.1 libedit2==3.1-20221030-2 libfido2-1==1.12.0-2+b1 libfreeipmi17==1.6.10-1+b1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libicu72==72.1-3 libipt2==2.0.5-1 @@ -26,10 +26,13 @@ libsnmp40==5.9.3+dfsg-2 libsnmp40-dbgsym==5.9.3+dfsg-2 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libunwind8==1.6.2-3 locales==2.36-9+deb12u7 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 pci.ids==0.0~2023.04.11-1 sensible-utils==0.0.17+nmu1 snmp==5.9.3+dfsg-2 diff --git a/files/build/versions/dockers/docker-snmp/versions-py3 b/files/build/versions/dockers/docker-snmp/versions-py3 index 6578258d1527..2d2c196bb3b5 100644 --- a/files/build/versions/dockers/docker-snmp/versions-py3 +++ b/files/build/versions/dockers/docker-snmp/versions-py3 @@ -1,4 +1,4 @@ -hiredis==2.3.2 -psutil==5.9.8 +hiredis==3.0.0 +psutil==6.0.0 python-arptable==0.0.2 smbus==1.1.post2 diff --git a/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bookworm b/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bookworm index 78de7f716989..9f7ac26c38b7 100644 --- a/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bookworm @@ -3,22 +3,25 @@ gdbserver==13.1-3 libbabeltrace1==1.5.11-1+b2 libboost-regex1.74.0==1.74.0+ds1-21 libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 libdw1==0.188-2.1 libedit2==3.1-20221030-2 libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libicu72==72.1-3 libipt2==2.0.5-1 libmpfr6==4.2.0-1 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libunwind8==1.6.2-3 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 sensible-utils==0.0.17+nmu1 sonic-gnmi==0.1 sonic-mgmt-common==1.0.0 diff --git a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm index 4ac805e33146..c01376c3ddde 100644 --- a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm @@ -3,26 +3,29 @@ gdbserver==13.1-3 libbabeltrace1==1.5.11-1+b2 libboost-regex1.74.0==1.74.0+ds1-21 libcbor0.8==0.8.0-2+b1 -libcjson-dev==1.7.15-1 -libcjson1==1.7.15-1 -libcurl3-gnutls==7.88.1-10+deb12u5 -libcurl4-openssl-dev==7.88.1-10+deb12u5 +libcjson-dev==1.7.15-1+deb12u1 +libcjson1==1.7.15-1+deb12u1 +libcurl3-gnutls==7.88.1-10+deb12u6 +libcurl4-openssl-dev==7.88.1-10+deb12u6 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 libdw1==0.188-2.1 libedit2==3.1-20221030-2 libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libicu72==72.1-3 libipt2==2.0.5-1 libmpfr6==4.2.0-1 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libunwind8==1.6.2-3 libxml2==2.9.14+dfsg-1.3~deb12u1 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 sensible-utils==0.0.17+nmu1 sonic-mgmt-common==1.0.0 sonic-mgmt-framework==1.0-01 diff --git a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3 b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3 index fd8654bb5b14..0d7901881f78 100644 --- a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3 +++ b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3 @@ -1,5 +1,5 @@ -certifi==2024.6.2 +certifi==2024.8.30 charset-normalizer==3.3.2 -idna==3.7 +idna==3.8 requests==2.32.3 -urllib3==2.2.1 +urllib3==2.2.2 diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye b/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye index c8b815af33ab..9086a97ef363 100644 --- a/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye +++ b/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye @@ -31,7 +31,7 @@ icu-devtools==67.1-7 ifupdown==0.8.36 iproute2==6.1.0-3~bpo11+1 iptables==1.8.7-1 -krb5-multidev==1.18.3-6+deb11u4+fips +krb5-multidev==1.18.3-6+deb11u5+fips libapparmor1==2.13.6-10 libassuan0==2.5.3-7.1 libblkid-dev==2.36.1-8+deb11u2 @@ -52,10 +52,10 @@ libfreetype6==2.10.4+dfsg-1+deb11u1 libfreetype6-dev==2.10.4+dfsg-1+deb11u1 libfuse2==2.9.9-5 libgirepository-1.0-1==1.66.1-1+b1 -libglib2.0-0==2.66.8-1+deb11u3 -libglib2.0-data==2.66.8-1+deb11u3 -libgssapi-krb5-2==1.18.3-6+deb11u4+fips -libgssrpc4==1.18.3-6+deb11u4+fips +libglib2.0-0==2.66.8-1+deb11u4 +libglib2.0-data==2.66.8-1+deb11u4 +libgssapi-krb5-2==1.18.3-6+deb11u5+fips +libgssrpc4==1.18.3-6+deb11u5+fips libicu-dev==67.1-7 libicu67==67.1-7 libip4tc2==1.8.7-1 @@ -65,12 +65,12 @@ libjs-underscore==1.9.1~dfsg-3 libjson-c5==0.15-2+deb11u1 libjudydebian1==1.0.5-5+b2 libk5crypto3==1.18.3-6+deb11u4 -libkadm5clnt-mit12==1.18.3-6+deb11u4+fips -libkadm5srv-mit12==1.18.3-6+deb11u4+fips -libkdb5-10==1.18.3-6+deb11u4 -libkrb5-3==1.18.3-6+deb11u4+fips -libkrb5-dev==1.18.3-6+deb11u4+fips -libkrb5support0==1.18.3-6+deb11u4+fips +libkadm5clnt-mit12==1.18.3-6+deb11u5+fips +libkadm5srv-mit12==1.18.3-6+deb11u5+fips +libkdb5-10==1.18.3-6+deb11u5 +libkrb5-3==1.18.3-6+deb11u5+fips +libkrb5-dev==1.18.3-6+deb11u5+fips +libkrb5support0==1.18.3-6+deb11u5+fips libksba8==1.5.0-3+deb11u2 libmd-dev==1.0.3-3 libmount1==2.36.1-8+deb11u2 @@ -89,9 +89,9 @@ libpopt0==1.18-2 libpython2-stdlib==2.7.18-3 libpython2.7-minimal==2.7.18-8+deb11u1 libpython2.7-stdlib==2.7.18-8+deb11u1 -libqt5core5a==5.15.2+dfsg-9 -libqt5dbus5==5.15.2+dfsg-9 -libqt5network5==5.15.2+dfsg-9 +libqt5core5a==5.15.2+dfsg-9+deb11u1 +libqt5dbus5==5.15.2+dfsg-9+deb11u1 +libqt5network5==5.15.2+dfsg-9+deb11u1 libsaivs==1.0.0 libsodium-dev==1.0.18-1 libssl1.1==1.1.1w-0+deb11u1 @@ -104,7 +104,7 @@ libxml2==2.9.10+dfsg-6.7+deb11u4 libxml2-dev==2.9.10+dfsg-6.7+deb11u4 libyang2==2.0.112-6 libzmq3-dev==4.3.4-1+deb11u1 -linux-libc-dev==5.10.218-1 +linux-libc-dev==5.10.221-1 logrotate==3.18.0-2+deb11u2 lsof==4.93.2+dfsg-1.1 mailcap==3.69 diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-py3 b/files/build/versions/dockers/docker-sonic-vs/versions-py3 index 72e3c60d5bee..ab8596ef5cdf 100644 --- a/files/build/versions/dockers/docker-sonic-vs/versions-py3 +++ b/files/build/versions/dockers/docker-sonic-vs/versions-py3 @@ -1,46 +1,47 @@ async-timeout==4.0.2 bcrypt==3.2.2 blessed==1.20.0 -certifi==2024.6.2 -cffi==1.16.0 +certifi==2024.8.30 +cffi==1.17.0 charset-normalizer==3.3.2 click==7.0 click-log==0.4.0 colorful==0.5.6 -cryptography==42.0.8 +cryptography==43.0.0 dbus-python==1.3.2 docker==7.1.0 -docker-image-py==0.1.12 +docker-image-py==0.1.13 enlighten==1.12.4 -filelock==3.14.0 -idna==3.7 +filelock==3.15.4 +idna==3.8 importlib-metadata==6.1.0 jsonpatch==1.33 -jsonpointer==2.4 +jsonpointer==3.0.0 lazy-object-proxy==1.10.0 -m2crypto==0.41.0 +m2crypto==0.42.0 netifaces==0.10.9 packaging==24.0 paramiko==2.11.0 pexpect==4.9.0 -prefixed==0.7.1 +prefixed==0.8.0 prettyprinter==0.18.0 -psutil==5.9.8 +psutil==6.0.0 ptyprocess==0.7.0 -pycairo==1.26.0 +pycairo==1.26.1 pycparser==2.22 pygments==2.18.0 pygobject==3.48.2 pynacl==1.5.0 pyroute2==0.5.14 redis==4.5.2 -requests==2.32.3 +requests==2.31.0 scapy==2.4.4 +scp==0.14.5 semantic-version==2.10.0 systemd-python==235 toposort==1.6 typing_extensions==4.7.1 -urllib3==2.2.1 +urllib3==2.2.2 wcwidth==0.2.13 websocket-client==1.6.3 www-authenticate==0.9.2 diff --git a/files/build/versions/dockers/docker-syncd-bluefield/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-bluefield/versions-deb-bookworm index 15f6df1d437d..623e589a699d 100644 --- a/files/build/versions/dockers/docker-syncd-bluefield/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-syncd-bluefield/versions-deb-bookworm @@ -1,10 +1,10 @@ binutils==2.40-2 binutils-aarch64-linux-gnu==2.40-2 binutils-dev==2.40-2 -doca-cx-libs==2.7.0034-1 +doca-cx-libs==2.8.0005-1 ethtool==1:6.1-1 hwdata==0.368-1 -ibverbs-providers==2307mlnx47-1.2310036 +ibverbs-providers==2404mlnx51-1.2404066 kmod==30+20221128-1 libatm1==1:2.5.1-4+b2 libbinutils==2.40-2 @@ -13,8 +13,8 @@ libctf0==2.40-2 libexpat1-dev==2.5.0-1 libgprofng0==2.40-2 libgrpc-dev==1.39.0-1 -libibverbs-dev==2307mlnx47-1.2310036 -libibverbs1==2307mlnx47-1.2310036 +libibverbs-dev==2404mlnx51-1.2404066 +libibverbs1==2404mlnx51-1.2404066 libjs-sphinxdoc==5.3.0-4 libjs-underscore==1.13.4~dfsg+~1.11.4-3 libjson-c5==0.16-2 @@ -30,24 +30,24 @@ libnuma1==2.0.16-1 libpcap0.8==1.10.3-1 libpci3==1:3.9.0-4 libpython3-dev==3.11.2-1+b1 -libpython3.11-dev==3.11.2-6 +libpython3.11-dev==3.11.2-6+deb12u2 librxpcompiler-dev==22.05.1 libsaimetadata==1.0.0 libsairedis==1.0.0 lsof==4.95.0-1 -mft==4.26.1-3 +mft==4.28.0-96 mlnx-dpdk==22.11.0-2404.0.2 -mlnx-iproute2==6.4.0-1.2310036 -mlnx-ofed-kernel-utils==23.10.OFED.23.10.0.3.6.1-1 -mlnx-sai==1.mlnx.SAIBuild0.0.30.0 -mlnx-tools==23.10.0-1.2310036 +mlnx-iproute2==6.7.0-1.2404066 +mlnx-ofed-kernel-utils==24.04.OFED.24.04.0.6.6.1-1 +mlnx-sai==1.mlnx.SAIBuild0.0.32.0 +mlnx-tools==24.04.0-1.2404066 pci.ids==0.0~2023.04.11-1 pciutils==1:3.9.0-4 python3-dev==3.11.2-1+b1 python3-pip==23.0.1+dfsg-1 -python3.11-dev==3.11.2-6 +python3.11-dev==3.11.2-6+deb12u2 rxp-compiler==22.05.1 sdn-appliance==1.5-1mlnx1 syncd==1.0.0 -udev==252.22-1~deb12u1 +udev==252.26-1~deb12u2 usb.ids==2024.01.20-0+deb12u1 diff --git a/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye index 200b0c679d5e..6983b871f817 100644 --- a/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye +++ b/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye @@ -26,7 +26,7 @@ libdpkg-perl==1.20.13 libexpat1-dev==2.2.10-2+deb11u5 libffi-dev==3.3-6 libgcc-10-dev==10.2.1-6 -libglib2.0-0==2.66.8-1+deb11u3 +libglib2.0-0==2.66.8-1+deb11u4 libgomp1==10.2.1-6 libicu67==67.1-7 libisl23==0.23-1 @@ -43,9 +43,9 @@ libpython2.7==2.7.18-8+deb11u1 libpython2.7-dev==2.7.18-8+deb11u1 libpython2.7-minimal==2.7.18-8+deb11u1 libpython2.7-stdlib==2.7.18-8+deb11u1 -libqt5core5a==5.15.2+dfsg-9 -libqt5dbus5==5.15.2+dfsg-9 -libqt5network5==5.15.2+dfsg-9 +libqt5core5a==5.15.2+dfsg-9+deb11u1 +libqt5dbus5==5.15.2+dfsg-9+deb11u1 +libqt5network5==5.15.2+dfsg-9+deb11u1 libquadmath0==10.2.1-6 librhash0==1.4.1-2 libssl-dev==1.1.1w-0+deb11u1 @@ -57,7 +57,7 @@ libtsan0==10.2.1-6 libubsan1==10.2.1-6 libuv1==1.40.0-2+deb11u1 libxml2==2.9.10+dfsg-6.7+deb11u4 -linux-libc-dev==5.10.218-1 +linux-libc-dev==5.10.221-1 mailcap==3.69 make==4.3-4.1 mime-support==3.66 diff --git a/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye index 72bbb5739dfb..b5e8fd335b12 100644 --- a/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye +++ b/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye @@ -5,12 +5,12 @@ kmod==28-1 libbabeltrace1==1.5.8-1+b3 libboost-regex1.74.0==1.74.0-9 libcbor0==0.5.0+dfsg-2 -libcurl3-gnutls==7.74.0-1.3+deb11u11 +libcurl3-gnutls==7.74.0-1.3+deb11u12 libdebuginfod1==0.183-1 libdw1==0.183-1 libedit2==3.1-20191231-2+b1 libfido2-1==1.6.0-2 -libglib2.0-0==2.66.8-1+deb11u3 +libglib2.0-0==2.66.8-1+deb11u4 libgpm2==1.20.7-8 libicu67==67.1-7 libipt2==2.0.3-1 diff --git a/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye index 200b0c679d5e..6983b871f817 100644 --- a/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye +++ b/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye @@ -26,7 +26,7 @@ libdpkg-perl==1.20.13 libexpat1-dev==2.2.10-2+deb11u5 libffi-dev==3.3-6 libgcc-10-dev==10.2.1-6 -libglib2.0-0==2.66.8-1+deb11u3 +libglib2.0-0==2.66.8-1+deb11u4 libgomp1==10.2.1-6 libicu67==67.1-7 libisl23==0.23-1 @@ -43,9 +43,9 @@ libpython2.7==2.7.18-8+deb11u1 libpython2.7-dev==2.7.18-8+deb11u1 libpython2.7-minimal==2.7.18-8+deb11u1 libpython2.7-stdlib==2.7.18-8+deb11u1 -libqt5core5a==5.15.2+dfsg-9 -libqt5dbus5==5.15.2+dfsg-9 -libqt5network5==5.15.2+dfsg-9 +libqt5core5a==5.15.2+dfsg-9+deb11u1 +libqt5dbus5==5.15.2+dfsg-9+deb11u1 +libqt5network5==5.15.2+dfsg-9+deb11u1 libquadmath0==10.2.1-6 librhash0==1.4.1-2 libssl-dev==1.1.1w-0+deb11u1 @@ -57,7 +57,7 @@ libtsan0==10.2.1-6 libubsan1==10.2.1-6 libuv1==1.40.0-2+deb11u1 libxml2==2.9.10+dfsg-6.7+deb11u4 -linux-libc-dev==5.10.218-1 +linux-libc-dev==5.10.221-1 mailcap==3.69 make==4.3-4.1 mime-support==3.66 diff --git a/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye index 1c5b66ad5b5c..dcc9f95ecce0 100644 --- a/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye +++ b/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye @@ -5,12 +5,12 @@ kmod==28-1 libbabeltrace1==1.5.8-1+b3 libboost-regex1.74.0==1.74.0-9 libcbor0==0.5.0+dfsg-2 -libcurl3-gnutls==7.74.0-1.3+deb11u11 +libcurl3-gnutls==7.74.0-1.3+deb11u12 libdebuginfod1==0.183-1 libdw1==0.183-1 libedit2==3.1-20191231-2+b1 libfido2-1==1.6.0-2 -libglib2.0-0==2.66.8-1+deb11u3 +libglib2.0-0==2.66.8-1+deb11u4 libgpm2==1.20.7-8 libicu67==67.1-7 libipt2==2.0.3-1 diff --git a/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye index 200b0c679d5e..6983b871f817 100644 --- a/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye +++ b/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye @@ -26,7 +26,7 @@ libdpkg-perl==1.20.13 libexpat1-dev==2.2.10-2+deb11u5 libffi-dev==3.3-6 libgcc-10-dev==10.2.1-6 -libglib2.0-0==2.66.8-1+deb11u3 +libglib2.0-0==2.66.8-1+deb11u4 libgomp1==10.2.1-6 libicu67==67.1-7 libisl23==0.23-1 @@ -43,9 +43,9 @@ libpython2.7==2.7.18-8+deb11u1 libpython2.7-dev==2.7.18-8+deb11u1 libpython2.7-minimal==2.7.18-8+deb11u1 libpython2.7-stdlib==2.7.18-8+deb11u1 -libqt5core5a==5.15.2+dfsg-9 -libqt5dbus5==5.15.2+dfsg-9 -libqt5network5==5.15.2+dfsg-9 +libqt5core5a==5.15.2+dfsg-9+deb11u1 +libqt5dbus5==5.15.2+dfsg-9+deb11u1 +libqt5network5==5.15.2+dfsg-9+deb11u1 libquadmath0==10.2.1-6 librhash0==1.4.1-2 libssl-dev==1.1.1w-0+deb11u1 @@ -57,7 +57,7 @@ libtsan0==10.2.1-6 libubsan1==10.2.1-6 libuv1==1.40.0-2+deb11u1 libxml2==2.9.10+dfsg-6.7+deb11u4 -linux-libc-dev==5.10.218-1 +linux-libc-dev==5.10.221-1 mailcap==3.69 make==4.3-4.1 mime-support==3.66 diff --git a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye index f9547ecf807d..e2a04839dc68 100644 --- a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye +++ b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye @@ -4,12 +4,12 @@ kmod==28-1 libbabeltrace1==1.5.8-1+b3 libboost-regex1.74.0==1.74.0-9 libcbor0==0.5.0+dfsg-2 -libcurl3-gnutls==7.74.0-1.3+deb11u11 +libcurl3-gnutls==7.74.0-1.3+deb11u12 libdebuginfod1==0.183-1 libdw1==0.183-1 libedit2==3.1-20191231-2+b1 libfido2-1==1.6.0-2 -libglib2.0-0==2.66.8-1+deb11u3 +libglib2.0-0==2.66.8-1+deb11u4 libgpm2==1.20.7-8 libhiredis0.14-dbgsym==0.14.1-1 libicu67==67.1-7 diff --git a/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm index 5fa2d43ee267..55db77737d3d 100644 --- a/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm @@ -1,15 +1,17 @@ cmake-data==3.25.1-1 libboost-atomic1.74.0==1.74.0+ds1-21 libdouble-conversion3==3.2.1-1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libnanomsg-dev==1.1.5+dfsg-1.1+b1 libnanomsg5==1.1.5+dfsg-1.1+b1 libpcre2-16-0==10.42-1 -libqt5core5a==5.15.8+dfsg-11 -libqt5dbus5==5.15.8+dfsg-11 -libqt5network5==5.15.8+dfsg-11 +libqt5core5a==5.15.8+dfsg-11+deb12u2 +libqt5dbus5==5.15.8+dfsg-11+deb12u2 +libqt5network5==5.15.8+dfsg-11+deb12u2 +libssl3==3.0.13-1~deb12u1 libthrift-0.17.0==0.17.0-2+b2 netbase==6.4 +openssl==3.0.13-1~deb12u1 python3-scapy==2.5.0+dfsg-2 python3-thrift==0.17.0-2+b2 shared-mime-info==2.2-1 diff --git a/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm index f0be6ba0d45c..d9ef40d54b94 100644 --- a/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm @@ -1,5 +1,5 @@ -applibs==1.mlnx.4.6.3064 -applibs-dev==1.mlnx.4.6.3064 +applibs==1.mlnx.4.6.4072 +applibs-dev==1.mlnx.4.6.4072 gdb==13.1-3 gdbserver==13.1-3 iproute2-mlnx==6.1.0-3 @@ -8,14 +8,14 @@ libboost-regex1.74.0==1.74.0+ds1-21 libc-dev-bin==2.36-9+deb12u7 libc6-dev==2.36-9+deb12u7 libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 libdw1==0.188-2.1 libedit2==3.1-20221030-2 libexpat1-dev==2.5.0-1 libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libicu72==72.1-3 libipt2==2.0.5-1 @@ -24,51 +24,54 @@ libjs-underscore==1.13.4~dfsg+~1.11.4-3 libmpfr6==4.2.0-1 libnsl-dev==1.3.0-2 libpython3-dev==3.11.2-1+b1 -libpython3.11-dev==3.11.2-6 +libpython3.11-dev==3.11.2-6+deb12u2 libsaimetadata==1.0.0 libsaimetadata-dbgsym==1.0.0 libsairedis==1.0.0 libsairedis-dbgsym==1.0.0 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libtirpc-dev==1.3.3+ds-1 libunwind8==1.6.2-3 libxml2==2.9.14+dfsg-1.3~deb12u1 -linux-libc-dev==6.1.90-1 +linux-libc-dev==6.1.99-1 mft==4.28.0-96 mft-fwtrace-cfg==1.0.0 -mlnx-sai==1.mlnx.SAIBuild2311.27.0.16 -openssh-client==1:9.2p1-2+deb12u2 -python-sdk-api==1.mlnx.4.6.3064 +mlnx-sai==1.mlnx.SAIBuild2405.28.0.33 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 +python-sdk-api==1.mlnx.4.6.4072 python3-attr==22.2.0-1 python3-dev==3.11.2-1+b1 python3-jsonschema==4.10.3-1 python3-pip==23.0.1+dfsg-1 python3-pyrsistent==0.18.1-1+b3 -python3.11-dev==3.11.2-6 +python3.11-dev==3.11.2-6+deb12u2 rpcsvc-proto==1.4.3-1 sensible-utils==0.0.17+nmu1 sshpass==1.09-1+b1 strace==6.1-0.1 -sx-acl-helper==1.mlnx.4.6.3064 -sx-acl-helper-dev==1.mlnx.4.6.3064 -sx-complib==1.mlnx.4.6.3064 -sx-complib-dev==1.mlnx.4.6.3064 -sx-examples==1.mlnx.4.6.3064 -sx-examples-dev==1.mlnx.4.6.3064 -sx-gen-utils==1.mlnx.4.6.3064 -sx-gen-utils-dev==1.mlnx.4.6.3064 -sx-hash-calc==1.mlnx.4.6.3064 -sx-obj-desc-lib==1.mlnx.4.6.3064 -sx-obj-desc-lib-dev==1.mlnx.4.6.3064 -sxd-libs==1.mlnx.4.6.3064 -sxd-libs-dev==1.mlnx.4.6.3064 +sx-acl-helper==1.mlnx.4.6.4072 +sx-acl-helper-dev==1.mlnx.4.6.4072 +sx-complib==1.mlnx.4.6.4072 +sx-complib-dev==1.mlnx.4.6.4072 +sx-examples==1.mlnx.4.6.4072 +sx-examples-dev==1.mlnx.4.6.4072 +sx-gen-utils==1.mlnx.4.6.4072 +sx-gen-utils-dev==1.mlnx.4.6.4072 +sx-hash-calc==1.mlnx.4.6.4072 +sx-obj-desc-lib==1.mlnx.4.6.4072 +sx-obj-desc-lib-dev==1.mlnx.4.6.4072 +sxd-libs==1.mlnx.4.6.4072 +sxd-libs-dev==1.mlnx.4.6.4072 syncd==1.0.0 syncd-dbgsym==1.0.0 ucf==3.0043+nmu1 vim==2:9.0.1378-2 vim-runtime==2:9.0.1378-2 -wjh-libs==1.mlnx.4.6.3064 -wjh-libs-dev==1.mlnx.4.6.3064 +wjh-libs==1.mlnx.4.6.4072 +wjh-libs-dev==1.mlnx.4.6.4072 zlib1g-dev==1:1.2.13.dfsg-1 diff --git a/files/build/versions/dockers/docker-syncd-mlnx/versions-py3 b/files/build/versions/dockers/docker-syncd-mlnx/versions-py3 index 9330926a786d..3ba6921c8800 100644 --- a/files/build/versions/dockers/docker-syncd-mlnx/versions-py3 +++ b/files/build/versions/dockers/docker-syncd-mlnx/versions-py3 @@ -3,6 +3,6 @@ importlib-metadata==1.6.0 jsonschema==4.10.3 more-itertools==4.2.0 pyrsistent==0.18.1 -python-sdk-api==4.6.3064 +python-sdk-api==4.6.4072 python_sdk_api==4.6.3064 zipp==1.0.0 diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64 b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64 index 86b1a2416211..c4a2333b4da0 100644 --- a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64 +++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64 @@ -8,15 +8,15 @@ libpcap0.8==1.10.3-1 libpcap0.8-dev==1.10.3-1 libpkgconf3==1.8.1-1 libpython3-dev==3.11.2-1+b1 -libpython3.11-dev==3.11.2-6 +libpython3.11-dev==3.11.2-6+deb12u2 libsaimetadata==1.0.0 libsairedis==1.0.0 -mrvllibsai==1.13.0-1 +mrvllibsai==1.14.0-1 pkg-config==1.8.1-1 pkgconf==1.8.1-1 pkgconf-bin==1.8.1-1 python3-dev==3.11.2-1+b1 -python3.11-dev==3.11.2-6 +python3.11-dev==3.11.2-6+deb12u2 sgml-base==1.31 swig==4.1.0-0.2 swig4.0==4.1.0-0.2 diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf index 0cc251c1f8d0..c4a2333b4da0 100644 --- a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf +++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf @@ -8,15 +8,15 @@ libpcap0.8==1.10.3-1 libpcap0.8-dev==1.10.3-1 libpkgconf3==1.8.1-1 libpython3-dev==3.11.2-1+b1 -libpython3.11-dev==3.11.2-6 +libpython3.11-dev==3.11.2-6+deb12u2 libsaimetadata==1.0.0 libsairedis==1.0.0 -mrvllibsai==1.13.0-3 +mrvllibsai==1.14.0-1 pkg-config==1.8.1-1 pkgconf==1.8.1-1 pkgconf-bin==1.8.1-1 python3-dev==3.11.2-1+b1 -python3.11-dev==3.11.2-6 +python3.11-dev==3.11.2-6+deb12u2 sgml-base==1.31 swig==4.1.0-0.2 swig4.0==4.1.0-0.2 diff --git a/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm index 616dcecd80a9..826787858cec 100644 --- a/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm @@ -129,8 +129,8 @@ libclang-cpp14==1:14.0.6-12 libclang1-14==1:14.0.6-12 libctf-nobfd0==2.40-2 libctf0==2.40-2 -libcurl3-gnutls==7.88.1-10+deb12u5 -libcurl3-nss==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 +libcurl3-nss==7.88.1-10+deb12u6 libdbus-1-dev==1.14.10-1~deb12u1 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 @@ -154,7 +154,7 @@ libgc1==1:8.2.2-3 libgcc-12-dev==12.2.0-14 libgfortran-12-dev==12.2.0-14 libgfortran5==12.2.0-14 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgmp-dev==2:6.2.1+dfsg1-1.1 libgmpxx4ldbl==2:6.2.1+dfsg1-1.1 libgomp1==12.2.0-14 @@ -179,8 +179,8 @@ libjs-sphinxdoc==5.3.0-4 libjs-underscore==1.13.4~dfsg+~1.11.4-3 libllvm14==1:14.0.6-12 liblsan0==12.2.0-14 -libltdl-dev==2.4.7-5 -libltdl7==2.4.7-5 +libltdl-dev==2.4.7-7~deb12u1 +libltdl7==2.4.7-7~deb12u1 libmagic-mgc==1:5.44-3 libmagic1==1:5.44-3 libmpc3==1.3.1-1 @@ -216,10 +216,10 @@ libprotoc32==3.21.12-3 libpsm-infinipath1==3.3+20.604758e7-6.2 libpsm2-2==11.2.185-2 libpython3-dev==3.11.2-1+b1 -libpython3.11-dev==3.11.2-6 -libqt5core5a==5.15.8+dfsg-11 -libqt5dbus5==5.15.8+dfsg-11 -libqt5network5==5.15.8+dfsg-11 +libpython3.11-dev==3.11.2-6+deb12u2 +libqt5core5a==5.15.8+dfsg-11+deb12u2 +libqt5dbus5==5.15.8+dfsg-11+deb12u2 +libqt5network5==5.15.8+dfsg-11+deb12u2 libquadmath0==12.2.0-14 librdmacm1==44.0-2 libre2-9==20220601+dfsg-1+b1 @@ -233,13 +233,14 @@ libsaivs==1.0.0 libsaivs-dbgsym==1.0.0 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.11-1~deb12u2 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libstdc++-12-dev==12.2.0-14 libswsscommon-dbgsym==1.0.0 libthrift-0.17.0==0.17.0-2+b2 libthrift-dev==0.17.0-2+b2 libtirpc-dev==1.3.3+ds-1 -libtool==2.4.7-5 +libtool==2.4.7-7~deb12u1 libtsan2==12.2.0-14 libubsan1==12.2.0-14 libucx0==1.13.1-1 @@ -253,7 +254,7 @@ libxext6==2:1.3.4-1+b1 libxml2==2.9.14+dfsg-1.3~deb12u1 libxnvctrl0==525.85.05-3~deb12u1 libz3-4==4.8.12-3.1 -linux-libc-dev==6.1.90-1 +linux-libc-dev==6.1.99-1 llvm==1:14.0-55.7~deb12u1 llvm-14==1:14.0.6-12 llvm-14-linker-tools==1:14.0.6-12 @@ -267,7 +268,8 @@ nss-plugin-pem==1.0.8+1-1 ocl-icd-libopencl1==2.3.1-1 openmpi-bin==4.1.4-3+b1 openmpi-common==4.1.4-3 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 p4lang-bmv2==1.15.0-7 p4lang-p4c==1.2.4.2-2 p4lang-pi==0.1.0-15 @@ -285,7 +287,7 @@ python3-pyroute2==0.7.2-2 python3-scapy==2.5.0+dfsg-2 python3-six==1.16.0-4 python3-thrift==0.17.0-2+b2 -python3.11-dev==3.11.2-6 +python3.11-dev==3.11.2-6+deb12u2 rpcsvc-proto==1.4.3-1 sensible-utils==0.0.17+nmu1 sgml-base==1.31 diff --git a/files/build/versions/dockers/docker-teamd/versions-deb-bookworm b/files/build/versions/dockers/docker-teamd/versions-deb-bookworm index b2369562d25c..a14f3b886845 100644 --- a/files/build/versions/dockers/docker-teamd/versions-deb-bookworm +++ b/files/build/versions/dockers/docker-teamd/versions-deb-bookworm @@ -3,25 +3,28 @@ gdbserver==13.1-3 libbabeltrace1==1.5.11-1+b2 libboost-regex1.74.0==1.74.0+ds1-21 libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 libdebuginfod-common==0.188-2.1 libdebuginfod1==0.188-2.1 libdw1==0.188-2.1 libedit2==3.1-20221030-2 libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgpm2==1.20.7-10+b1 libicu72==72.1-3 libipt2==2.0.5-1 libmpfr6==4.2.0-1 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libswsscommon-dbgsym==1.0.0 libteam-utils==1.31-1 libteam-utils-dbgsym==1.31-1 libteamdctl0-dbgsym==1.31-1 libunwind8==1.6.2-3 -openssh-client==1:9.2p1-2+deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 sensible-utils==0.0.17+nmu1 sshpass==1.09-1+b1 strace==6.1-0.1 diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm index dabe98c5ae2f..12e46295fd7a 100644 --- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm +++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm @@ -25,10 +25,10 @@ automake==1:1.16.5-1.3 autopoint==0.21-12 autotools-dev==20220109.1 bash-completion==1:2.11-6 -bc==1.07.1-3+b1 -bind9-dnsutils==1:9.18.24-1 -bind9-host==1:9.18.24-1 -bind9-libs==1:9.18.24-1 +bc==1.07.1-3 +bind9-dnsutils==1:9.18.28-1~deb12u2 +bind9-host==1:9.18.28-1~deb12u2 +bind9-libs==1:9.18.28-1~deb12u2 binutils==2.40-2 binutils-aarch64-linux-gnu==2.40-2 binutils-arm-linux-gnueabihf==2.40-2 @@ -66,7 +66,7 @@ cppcheck==2.10-2 cppzmq-dev==4.9.0-1 cron==3.0pl1-162 cron-daemon-common==3.0pl1-162 -curl==7.88.1-10+deb12u5 +curl==7.88.1-10+deb12u6 cython3==0.29.32-2+b1 dbus==1.14.10-1~deb12u1 dbus-bin==1.14.10-1~deb12u1 @@ -76,7 +76,7 @@ dbus-system-bus-common==1.14.10-1~deb12u1 dbus-user-session==1.14.10-1~deb12u1 dconf-gsettings-backend==0.40.0-4 dconf-service==0.40.0-4 -dctrl-tools==2.24-3+b1 +dctrl-tools==2.24-3 debhelper==13.11.4 debian-keyring==2022.12.24 debootstrap==1.0.128+nmu2+deb12u1 @@ -97,11 +97,11 @@ dh-strip-nondeterminism==1.13.1-1 dictionaries-common==1.29.5 diffstat==1.65-1 dirmngr==2.2.40-1.1 -distro-info-data==0.58+deb12u1 +distro-info-data==0.58+deb12u2 dkms==3.0.10-8+deb12u1 dmidecode==3.4-1 dmsetup==2:1.02.185-2 -dnsutils==1:9.18.24-1 +dnsutils==1:9.18.28-1~deb12u2 docbook==4.5-10 docbook-dsssl==1.79-10 docbook-to-man==1:2.0.0-45 @@ -110,14 +110,14 @@ docbook-xml==4.5-12 docker-buildx-plugin==0.10.5-1~debian.12~bookworm docker-ce==5:24.0.2-1~debian.12~bookworm docker-ce-cli==5:24.0.2-1~debian.12~bookworm -docker-ce-rootless-extras==5:26.1.3-1~debian.12~bookworm +docker-ce-rootless-extras==5:27.2.0-1~debian.12~bookworm docker-compose-plugin==2.18.1-1~debian.12~bookworm docutils-common==0.19+dfsg-6 dosfstools==4.2-1 doxygen==1.9.4-4 dpkg-dev==1.21.22 dput==1.1.3 -dvipng==1.15-1.1+b1 +dvipng==1.15-1.1 dvisvgm==3.0.3-1 dwz==0.15-1 eatmydata==130-2 @@ -126,9 +126,9 @@ efibootmgr==17-2 emacsen-common==3.0.5 enchant-2==2.3.3-2 equivs==2.3.1 -exim4-base==4.96-15+deb12u4 -exim4-config==4.96-15+deb12u4 -exim4-daemon-light==4.96-15+deb12u4 +exim4-base==4.96-15+deb12u5 +exim4-config==4.96-15+deb12u5 +exim4-daemon-light==4.96-15+deb12u5 expat==2.5.0-1 fakeroot==1.31-1.2 fig2dev==1:3.2.8b-3 @@ -171,7 +171,7 @@ ghostscript==10.0.0~dfsg-11+deb12u4 gir1.2-atk-1.0==2.46.0-5 gir1.2-atspi-2.0==2.46.0-5 gir1.2-freedesktop==1.74.0-3 -gir1.2-gdkpixbuf-2.0==2.42.10+dfsg-1+b1 +gir1.2-gdkpixbuf-2.0==2.42.10+dfsg-1+deb12u1 gir1.2-glib-2.0==1.74.0-3 gir1.2-gtk-3.0==3.24.38-2~deb12u1 gir1.2-harfbuzz-0.0==6.0.0+dfsg-3 @@ -250,8 +250,8 @@ junit4==4.13.2-3 junit5==5.9.2-1 kernel-wedge==2.104 kmod==30+20221128-1 -krb5-locales==1.20.1-2+deb12u1 -krb5-multidev==1.20.1-2+deb12u1 +krb5-locales==1.20.1-2+deb12u2 +krb5-multidev==1.20.1-2+deb12u2 lcov==1.16-1 less==590-2.1~deb12u2 lib2geom1.2.0==1.2.2-3 @@ -286,7 +286,7 @@ libappstream4==0.16.1-2 libapt-pkg-perl==0.1.40+b2 libarchive-cpio-perl==0.10-3 libarchive-zip-perl==1.68-1 -libarchive13==3.6.2-1 +libarchive13==3.6.2-1+deb12u1 libargon2-1==0~20171227-0.3+deb12u1 libarray-intspan-perl==2.004-2 libasan8==12.2.0-14 @@ -322,11 +322,11 @@ libavahi-client3==0.8-10 libavahi-common-data==0.8-10 libavahi-common3==0.8-10 libavc1394-0==0.5.4-5 -libavcodec59==7:5.1.4-0+deb12u1 -libavfilter8==7:5.1.4-0+deb12u1 -libavformat59==7:5.1.4-0+deb12u1 +libavcodec59==7:5.1.5-0+deb12u1 +libavfilter8==7:5.1.5-0+deb12u1 +libavformat59==7:5.1.5-0+deb12u1 libavif15==0.11.1-1 -libavutil57==7:5.1.4-0+deb12u1 +libavutil57==7:5.1.5-0+deb12u1 libb-hooks-endofscope-perl==0.26-1 libb-hooks-op-check-perl==0.22-2+b1 libbabeltrace-dev==1.5.11-1+b2 @@ -485,8 +485,8 @@ libcgi-fast-perl==1:2.15-1 libcgi-pm-perl==4.55-1 libcgraph6==2.42.2-7+b3 libchromaprint1==1.5.1-2+b1 -libcjson-dev==1.7.15-1 -libcjson1==1.7.15-1 +libcjson-dev==1.7.15-1+deb12u1 +libcjson1==1.7.15-1+deb12u1 libclang-common-14-dev==1:14.0.6-12 libclang-cpp14==1:14.0.6-12 libclang-rt-14-dev==1:14.0.6-12 @@ -536,10 +536,10 @@ libctf0==2.40-2 libcunit1==2.1-3-dfsg-2.6 libcunit1-dev==2.1-3-dfsg-2.6 libcups2==2.4.2-3+deb12u5 -libcurl3-gnutls==7.88.1-10+deb12u5 -libcurl3-nss==7.88.1-10+deb12u5 -libcurl4==7.88.1-10+deb12u5 -libcurl4-openssl-dev==7.88.1-10+deb12u5 +libcurl3-gnutls==7.88.1-10+deb12u6 +libcurl3-nss==7.88.1-10+deb12u6 +libcurl4==7.88.1-10+deb12u6 +libcurl4-openssl-dev==7.88.1-10+deb12u6 libdaemon-dev==0.14-7.1 libdaemon0==0.14-7.1 libdata-dpath-perl==0.58-2 @@ -680,8 +680,8 @@ libfontconfig-dev==2.14.1-4 libfontconfig1==2.14.1-4 libfontenc1==1:1.1.4-1 libfop-java==1:2.8-2 -libfreetype-dev==2.12.1+dfsg-5 -libfreetype6==2.12.1+dfsg-5 +libfreetype-dev==2.12.1+dfsg-5+deb12u3 +libfreetype6==2.12.1+dfsg-5+deb12u3 libfreezethaw-perl==0.5001-3 libfribidi-dev==1.0.8-2.1 libfribidi0==1.0.8-2.1 @@ -702,10 +702,10 @@ libgd-perl==2.76-4+b1 libgd3==2.3.3-9 libgdbm-compat4==1.23-3 libgdbm6==1.23-3 -libgdk-pixbuf-2.0-0==2.42.10+dfsg-1+b1 -libgdk-pixbuf-2.0-dev==2.42.10+dfsg-1+b1 -libgdk-pixbuf2.0-bin==2.42.10+dfsg-1+b1 -libgdk-pixbuf2.0-common==2.42.10+dfsg-1 +libgdk-pixbuf-2.0-0==2.42.10+dfsg-1+deb12u1 +libgdk-pixbuf-2.0-dev==2.42.10+dfsg-1+deb12u1 +libgdk-pixbuf2.0-bin==2.42.10+dfsg-1+deb12u1 +libgdk-pixbuf2.0-common==2.42.10+dfsg-1+deb12u1 libgeronimo-annotation-1.3-spec-java==1.3-1 libgeronimo-interceptor-3.0-spec-java==1.0.1-4 libgetopt-long-descriptive-perl==0.111-1 @@ -728,11 +728,11 @@ libglapi-mesa==22.3.6-1+deb12u1 libgles-dev==1.6.0-1 libgles1==1.6.0-1 libgles2==1.6.0-1 -libglib2.0-0==2.74.6-2+deb12u2 -libglib2.0-bin==2.74.6-2+deb12u2 -libglib2.0-data==2.74.6-2+deb12u2 -libglib2.0-dev==2.74.6-2+deb12u2 -libglib2.0-dev-bin==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 +libglib2.0-bin==2.74.6-2+deb12u3 +libglib2.0-data==2.74.6-2+deb12u3 +libglib2.0-dev==2.74.6-2+deb12u3 +libglib2.0-dev-bin==2.74.6-2+deb12u3 libglibmm-2.4-1v5==2.66.5-2 libglu1-mesa==9.0.2-1.1 libglu1-mesa-dev==9.0.2-1.1 @@ -747,7 +747,7 @@ libgme0==0.6.3-6 libgmock-dev==1.12.1-0.2 libgmp-dev==2:6.2.1+dfsg1-1.1 libgmpxx4ldbl==2:6.2.1+dfsg1-1.1 -libgnutls-dane0==3.7.9-2+deb12u2 +libgnutls-dane0==3.7.9-2+deb12u3 libgomp1==12.2.0-14 libgomp1-armhf-cross==12.2.0-14cross1 libgoogle-perftools4==2.10-1 @@ -768,8 +768,8 @@ libgslcblas0==2.7.1+dfsg-5 libgsm1==1.0.22-1 libgspell-1-2==1.12.0-1+b2 libgspell-1-common==1.12.0-1 -libgssapi-krb5-2==1.20.1-2+deb12u1 -libgssrpc4==1.20.1-2+deb12u1 +libgssapi-krb5-2==1.20.1-2+deb12u2 +libgssrpc4==1.20.1-2+deb12u2 libgstreamer-plugins-base1.0-0==1.22.0-3+deb12u2 libgstreamer1.0-0==1.22.0-2 libgtest-dev==1.12.1-0.2 @@ -907,16 +907,16 @@ libjudydebian1==1.0.5-5+b2 libjxl0.7==0.7.0-10 libjxr-tools==1.2~git20170615.f752187-5 libjxr0==1.2~git20170615.f752187-5 -libk5crypto3==1.20.1-2+deb12u1 -libkadm5clnt-mit12==1.20.1-2+deb12u1 -libkadm5srv-mit12==1.20.1-2+deb12u1 -libkdb5-10==1.20.1-2+deb12u1 +libk5crypto3==1.20.1-2+deb12u2 +libkadm5clnt-mit12==1.20.1-2+deb12u2 +libkadm5srv-mit12==1.20.1-2+deb12u2 +libkdb5-10==1.20.1-2+deb12u2 libkeyutils1==1.6.3-2 libkmod2==30+20221128-1 libkpathsea6==2022.20220321.62855-5.1+deb12u1 -libkrb5-3==1.20.1-2+deb12u1 -libkrb5-dev==1.20.1-2+deb12u1 -libkrb5support0==1.20.1-2+deb12u1 +libkrb5-3==1.20.1-2+deb12u2 +libkrb5-dev==1.20.1-2+deb12u2 +libkrb5support0==1.20.1-2+deb12u2 libksba8==1.6.3-2 liblab-gamut1==2.42.2-7+b3 liblapack3==3.11.0-2 @@ -944,8 +944,8 @@ liblog-any-perl==1.713-1 liblognorm5==2.0.6-4 liblqr-1-0==0.4.2-2.1 liblsan0==12.2.0-14 -libltdl-dev==2.4.7-5 -libltdl7==2.4.7-5 +libltdl-dev==2.4.7-7~deb12u1 +libltdl7==2.4.7-7~deb12u1 liblua5.1-0==5.1.5-9 liblua5.1-0-dev==5.1.5-9 liblua5.3-0==5.3.6-2 @@ -1016,8 +1016,8 @@ libmunge2==0.5.15-2 libmysofa1==1.3.1~dfsg0-1 libnamespace-autoclean-perl==0.29-2 libnamespace-clean-perl==0.27-2 -libnanomsg-dev==1.1.5+dfsg-1.1+b1 -libnanomsg5==1.1.5+dfsg-1.1+b1 +libnanomsg-dev==1.1.5+dfsg-1.1 +libnanomsg5==1.1.5+dfsg-1.1 libncurses-dev==6.4-4 libncurses5-dev==6.4-4 libncurses6==6.4-4 @@ -1048,14 +1048,14 @@ libnl-3-200==3.7.0-0.2+b1 libnl-3-dev==3.7.0-0.2+b1 libnl-route-3-200==3.7.0-0.2+b1 libnl-route-3-dev==3.7.0-0.2+b1 -libnode108==18.19.0+dfsg-6~deb12u1 +libnode108==18.19.0+dfsg-6~deb12u2 libnorm-dev==1.5.9+dfsg-2 libnorm1==1.5.9+dfsg-2 libnpth0==1.6-3 libnsl-dev==1.3.0-2 libnsl2==1.3.0-2 libnspr4==2:4.35-1 -libnss-systemd==252.22-1~deb12u1 +libnss-systemd==252.26-1~deb12u2 libnss3==2:3.87.1-1 libnuma-dev==2.0.16-1 libnuma1==2.0.16-1 @@ -1094,7 +1094,7 @@ libpackage-stash-xs-perl==0.30-1+b1 libpackagekit-glib2-18==1.2.6-5 libpadwalker-perl==2.5-1+b3 libpam-cap==1:2.66-4 -libpam-systemd==252.22-1~deb12u1 +libpam-systemd==252.26-1~deb12u2 libpam0g-dev==1.5.2-6+deb12u1 libpango-1.0-0==1.50.12+ds-1 libpango1.0-dev==1.50.12+ds-1 @@ -1174,7 +1174,7 @@ libpoppler-glib8==22.12.0-2+b1 libpoppler126==22.12.0-2+b1 libpopt-dev==1.19+dfsg-1 libpopt0==1.19+dfsg-1 -libpostproc56==7:5.1.4-0+deb12u1 +libpostproc56==7:5.1.5-0+deb12u1 libpotrace0==1.16-2 libproc-processtable-perl==0.634-1+b2 libproc2-0==2:4.0.2-3 @@ -1196,33 +1196,33 @@ libpython3-all-dev==3.11.2-1+b1 libpython3-dbg==3.11.2-1+b1 libpython3-dev==3.11.2-1+b1 libpython3-stdlib==3.11.2-1+b1 -libpython3.11==3.11.2-6 -libpython3.11-dbg==3.11.2-6 -libpython3.11-dev==3.11.2-6 -libpython3.11-minimal==3.11.2-6 -libpython3.11-stdlib==3.11.2-6 +libpython3.11==3.11.2-6+deb12u2 +libpython3.11-dbg==3.11.2-6+deb12u2 +libpython3.11-dev==3.11.2-6+deb12u2 +libpython3.11-minimal==3.11.2-6+deb12u2 +libpython3.11-stdlib==3.11.2-6+deb12u2 libqdox-java==1.12.1-3 libqdox2-java==2.0.3-1 libqhull-r8.0==2020.2-5 -libqt5concurrent5==5.15.8+dfsg-11 -libqt5core5a==5.15.8+dfsg-11 -libqt5dbus5==5.15.8+dfsg-11 -libqt5gui5==5.15.8+dfsg-11 -libqt5network5==5.15.8+dfsg-11 -libqt5opengl5==5.15.8+dfsg-11 -libqt5opengl5-dev==5.15.8+dfsg-11 -libqt5printsupport5==5.15.8+dfsg-11 +libqt5concurrent5==5.15.8+dfsg-11+deb12u2 +libqt5core5a==5.15.8+dfsg-11+deb12u2 +libqt5dbus5==5.15.8+dfsg-11+deb12u2 +libqt5gui5==5.15.8+dfsg-11+deb12u2 +libqt5network5==5.15.8+dfsg-11+deb12u2 +libqt5opengl5==5.15.8+dfsg-11+deb12u2 +libqt5opengl5-dev==5.15.8+dfsg-11+deb12u2 +libqt5printsupport5==5.15.8+dfsg-11+deb12u2 libqt5qml5==5.15.8+dfsg-3 libqt5qmlmodels5==5.15.8+dfsg-3 libqt5quick5==5.15.8+dfsg-3 -libqt5sql5==5.15.8+dfsg-11 -libqt5sql5-sqlite==5.15.8+dfsg-11 +libqt5sql5==5.15.8+dfsg-11+deb12u2 +libqt5sql5-sqlite==5.15.8+dfsg-11+deb12u2 libqt5svg5==5.15.8-3 -libqt5test5==5.15.8+dfsg-11 +libqt5test5==5.15.8+dfsg-11+deb12u2 libqt5waylandclient5==5.15.8-2 libqt5waylandcompositor5==5.15.8-2 -libqt5widgets5==5.15.8+dfsg-11 -libqt5xml5==5.15.8+dfsg-11 +libqt5widgets5==5.15.8+dfsg-11+deb12u2 +libqt5xml5==5.15.8+dfsg-11+deb12u2 libquadmath0==12.2.0-14 librabbitmq4==0.11.0-1+b1 librados2==16.2.11+ds-2 @@ -1321,8 +1321,8 @@ libsrt1.5-gnutls==1.5.1-1 libssh-4==0.10.6-0+deb12u1 libssh-gcrypt-4==0.10.6-0+deb12u1 libssh2-1==1.10.0-3+b1 -libssl-dev==3.0.11-1~deb12u2 -libssl3==3.0.11-1~deb12u2 +libssl-dev==3.0.13-1~deb12u1 +libssl3==3.0.13-1~deb12u1 libstdc++-12-dev==12.2.0-14 libstdc++6-armhf-cross==12.2.0-14cross1 libstemmer0d==2.2.0-2 @@ -1343,14 +1343,14 @@ libsubunit0==1.4.0-3 libsurefire-java==2.22.3-2 libsvtav1enc1==1.4.1+dfsg-1 libswitch-perl==2.17-3 -libswresample4==7:5.1.4-0+deb12u1 -libswscale6==7:5.1.4-0+deb12u1 +libswresample4==7:5.1.5-0+deb12u1 +libswscale6==7:5.1.5-0+deb12u1 libsynctex2==2022.20220321.62855-5.1+deb12u1 libsyntax-keyword-try-perl==0.28-1 libsys-cpuaffinity-perl==1.13~03-2+b1 libsys-hostname-long-perl==1.5-3 -libsystemd-dev==252.22-1~deb12u1 -libsystemd-shared==252.22-1~deb12u1 +libsystemd-dev==252.26-1~deb12u2 +libsystemd-shared==252.26-1~deb12u2 libtag1v5==1.13-2 libtag1v5-vanilla==1.13-2 libtask-weaken-perl==1.06-2 @@ -1390,8 +1390,8 @@ libtirpc-common==1.3.3+ds-1 libtirpc-dev==1.3.3+ds-1 libtirpc3==1.3.3+ds-1 libtk8.6==8.6.13-2 -libtool==2.4.7-5 -libtool-bin==2.4.7-5 +libtool==2.4.7-7~deb12u1 +libtool-bin==2.4.7-7~deb12u1 libtraceevent-dev==1:1.7.1-1 libtraceevent1==1:1.7.1-1 libtracefs-dev==1.6.4-1 @@ -1406,7 +1406,7 @@ libubsan1==12.2.0-14 libubsan1-armhf-cross==12.2.0-14cross1 libuchardet0==0.0.7-1 libucx0==1.13.1-1 -libudev-dev==252.22-1~deb12u1 +libudev-dev==252.26-1~deb12u2 libudfread0==1.1.2-1 libunbound8==1.17.1-2+deb12u2 libunicode-map-perl==0.112-13+b1 @@ -1443,7 +1443,7 @@ libvisual-0.4-0==0.4.0-19 libvorbis0a==1.3.7-1 libvorbisenc2==1.3.7-1 libvorbisfile3==1.3.7-1 -libvpx7==1.12.0-1+deb12u2 +libvpx7==1.12.0-1+deb12u3 libvte-2.91-0==0.70.6-2~deb12u1 libvte-2.91-common==0.70.6-2~deb12u1 libvulkan-dev==1.3.239.0-1 @@ -1607,14 +1607,14 @@ libzvbi0==0.2.41-1 libzzip-0-13==0.13.72+dfsg.1-1.1 licensecheck==3.3.5-1 lintian==2.116.3 -linux-compiler-gcc-12-x86==6.1.90-1 -linux-headers-6.1.0-21-amd64==6.1.90-1 -linux-headers-6.1.0-21-arm64==6.1.90-1 -linux-headers-6.1.0-21-common==6.1.90-1 -linux-headers-amd64==6.1.90-1 -linux-headers-arm64==6.1.90-1 -linux-kbuild-6.1==6.1.90-1 -linux-libc-dev==6.1.90-1 +linux-compiler-gcc-12-x86==6.1.99-1 +linux-headers-6.1.0-23-amd64==6.1.99-1 +linux-headers-6.1.0-23-arm64==6.1.99-1 +linux-headers-6.1.0-23-common==6.1.99-1 +linux-headers-amd64==6.1.99-1 +linux-headers-arm64==6.1.99-1 +linux-kbuild-6.1==6.1.99-1 +linux-libc-dev==6.1.99-1 linuxdoc-tools==0.9.82-1 llvm==1:14.0-55.7~deb12u1 llvm-14==1:14.0.6-12 @@ -1670,10 +1670,10 @@ node-acorn==8.8.1+ds+~cs25.17.7-2 node-busboy==1.6.0+~cs2.6.0-2 node-cjs-module-lexer==1.2.2+dfsg-5 node-jquery==3.6.1+dfsg+~3.5.14-1 -node-undici==5.15.0+dfsg1+~cs20.10.9.3-1+deb12u3 +node-undici==5.15.0+dfsg1+~cs20.10.9.3-1+deb12u4 node-xtend==4.0.2-3 -nodejs==18.19.0+dfsg-6~deb12u1 -nodejs-doc==18.19.0+dfsg-6~deb12u1 +nodejs==18.19.0+dfsg-6~deb12u2 +nodejs-doc==18.19.0+dfsg-6~deb12u2 nss-plugin-pem==1.0.8+1-1 ocl-icd-libopencl1==2.3.1-1 openjade==1.4devel1-22 @@ -1684,10 +1684,10 @@ openjdk-17-jre-headless==17.0.11+9-1~deb12u1 openmpi-bin==4.1.4-3+b1 openmpi-common==4.1.4-3 opensp==1.5.2-13+b2 -openssh-client==1:9.2p1-2+deb12u2 -openssh-server==1:9.2p1-2+deb12u2 -openssh-sftp-server==1:9.2p1-2+deb12u2 -openssl==3.0.11-1~deb12u2 +openssh-client==1:9.2p1-2+deb12u3 +openssh-server==1:9.2p1-2+deb12u3 +openssh-sftp-server==1:9.2p1-2+deb12u3 +openssl==3.0.13-1~deb12u1 os-prober==1.81 ovmf==2022.11-6+deb12u1 packagekit==1.2.6-5 @@ -1721,12 +1721,12 @@ php-text-template==2.0.4-2 php-timer==5.0.3-3 php-tokenizer==1.2.1-1 php-xml==2:8.2+93 -php8.2-cli==8.2.18-1~deb12u1 -php8.2-common==8.2.18-1~deb12u1 -php8.2-mbstring==8.2.18-1~deb12u1 -php8.2-opcache==8.2.18-1~deb12u1 -php8.2-readline==8.2.18-1~deb12u1 -php8.2-xml==8.2.18-1~deb12u1 +php8.2-cli==8.2.20-1~deb12u1 +php8.2-common==8.2.20-1~deb12u1 +php8.2-mbstring==8.2.20-1~deb12u1 +php8.2-opcache==8.2.20-1~deb12u1 +php8.2-readline==8.2.20-1~deb12u1 +php8.2-xml==8.2.20-1~deb12u1 phpunit==9.6.7-1 phpunit-cli-parser==1.0.1-3 phpunit-code-unit==1.0.8-3 @@ -1769,7 +1769,7 @@ publicsuffix==20230209.2326-1 pylint==2.16.2-2 python-apt-common==2.6.0 python-babel-localedata==2.10.3-1 -python-is-python3==3.11.1-3 +python-is-python3==3.11.2-1+deb12u1 python-matplotlib-data==3.6.3-1 python3==3.11.2-1+b1 python3-alabaster==0.7.12-1 @@ -1823,7 +1823,7 @@ python3-hamcrest==2.0.3-2 python3-html5lib==1.1-3 python3-httplib2==0.20.4-3 python3-hyperlink==21.0.0-5 -python3-idna==3.3-1 +python3-idna==3.3-1+deb12u1 python3-imagesize==1.4.1-1 python3-importlib-metadata==4.12.0-1 python3-incremental==21.3.0-2 @@ -1865,8 +1865,8 @@ python3-parso==0.8.3-1 python3-pep517==0.13.0-2 python3-pexpect==4.8.0-4 python3-pickleshare==0.7.5-5 -python3-pil==9.4.0-1.1+b1 -python3-pil.imagetk==9.4.0-1.1+b1 +python3-pil==9.4.0-1.1+deb12u1 +python3-pil.imagetk==9.4.0-1.1+deb12u1 python3-pip-whl==23.0.1+dfsg-1 python3-pkg-resources==66.1.1-1 python3-platformdirs==2.6.0-1 @@ -1897,7 +1897,7 @@ python3-setuptools==66.1.1-1 python3-setuptools-whl==66.1.1-1 python3-six==1.16.0-4 python3-snowballstemmer==2.2.0-2 -python3-software-properties==0.99.30-4 +python3-software-properties==0.99.30-4.1~deb12u1 python3-soupsieve==2.3.2-1 python3-sphinx==5.3.0-4 python3-sphinx-rtd-theme==1.2.0+dfsg-1 @@ -1926,22 +1926,22 @@ python3-xdg==0.28-2 python3-yaml==6.0-3+b2 python3-zipp==1.0.0-6 python3-zope.interface==5.5.2-1+b1 -python3.11==3.11.2-6 -python3.11-dbg==3.11.2-6 -python3.11-dev==3.11.2-6 -python3.11-minimal==3.11.2-6 -python3.11-venv==3.11.2-6 -qemu-block-extra==1:7.2+dfsg-7+deb12u5 -qemu-system-common==1:7.2+dfsg-7+deb12u5 -qemu-system-data==1:7.2+dfsg-7+deb12u5 -qemu-system-gui==1:7.2+dfsg-7+deb12u5 -qemu-system-x86==1:7.2+dfsg-7+deb12u5 -qemu-utils==1:7.2+dfsg-7+deb12u5 -qt5-gtk-platformtheme==5.15.8+dfsg-11 -qt5-qmake==5.15.8+dfsg-11 -qt5-qmake-bin==5.15.8+dfsg-11 -qtbase5-dev==5.15.8+dfsg-11 -qtbase5-dev-tools==5.15.8+dfsg-11 +python3.11==3.11.2-6+deb12u2 +python3.11-dbg==3.11.2-6+deb12u2 +python3.11-dev==3.11.2-6+deb12u2 +python3.11-minimal==3.11.2-6+deb12u2 +python3.11-venv==3.11.2-6+deb12u2 +qemu-block-extra==1:7.2+dfsg-7+deb12u6 +qemu-system-common==1:7.2+dfsg-7+deb12u6 +qemu-system-data==1:7.2+dfsg-7+deb12u6 +qemu-system-gui==1:7.2+dfsg-7+deb12u6 +qemu-system-x86==1:7.2+dfsg-7+deb12u6 +qemu-utils==1:7.2+dfsg-7+deb12u6 +qt5-gtk-platformtheme==5.15.8+dfsg-11+deb12u2 +qt5-qmake==5.15.8+dfsg-11+deb12u2 +qt5-qmake-bin==5.15.8+dfsg-11+deb12u2 +qtbase5-dev==5.15.8+dfsg-11+deb12u2 +qtbase5-dev-tools==5.15.8+dfsg-11+deb12u2 qtchooser==66-2 qttranslations5-l10n==5.15.8-2 qtwayland5==5.15.8-2 @@ -1983,7 +1983,7 @@ shim-signed==1.39+15.7-1 shim-signed-common==1.39+15.7-1 shim-unsigned==15.7-1 slirp4netns==1.2.0-1 -software-properties-common==0.99.30-4 +software-properties-common==0.99.30-4.1~deb12u1 sphinx-common==5.3.0-4 sphinx-rtd-theme-common==1.2.0+dfsg-1 squashfs-tools==1:4.5.1-1 @@ -1992,9 +1992,9 @@ strace==6.1-0.1 sudo==1.9.13p3-1+deb12u1 swig==4.1.0-0.2 swig4.0==4.1.0-0.2 -systemd==252.22-1~deb12u1 -systemd-sysv==252.22-1~deb12u1 -systemd-timesyncd==252.22-1~deb12u1 +systemd==252.26-1~deb12u2 +systemd-sysv==252.26-1~deb12u2 +systemd-timesyncd==252.26-1~deb12u2 t1utils==1.41-4 tcl==8.6.13 tcl8.6==8.6.13+dfsg-2 @@ -2022,7 +2022,7 @@ tk==8.6.13 tk8.6==8.6.13-2 tk8.6-blt2.5==2.5.3+dfsg-4.1 ucf==3.0043+nmu1 -udev==252.22-1~deb12u1 +udev==252.26-1~deb12u2 unicode-data==15.0.0-1 unzip==6.0-28 usb.ids==2024.01.20-0+deb12u1 @@ -2035,10 +2035,10 @@ velocity==1.7-6 vim==2:9.0.1378-2 vim-common==2:9.0.1378-2 vim-runtime==2:9.0.1378-2 -watchdog==5.16-1+b2 +watchdog==5.16-1+b1 wayland-protocols==1.31-1 wdiff==1.2.2-5 -wget==1.21.3-1+b2 +wget==1.21.3-1+b1 x11-common==1:7.7+23 x11-utils==7.7+5 x11-xserver-utils==7.7+9+b1 diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64 b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64 deleted file mode 100644 index 3b6c4c092385..000000000000 --- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64 +++ /dev/null @@ -1,7 +0,0 @@ -bc==1.07.1-3 -dctrl-tools==2.24-3 -dvipng==1.15-1.1 -libnanomsg-dev==1.1.5+dfsg-1.1 -libnanomsg5==1.1.5+dfsg-1.1 -watchdog==5.16-1+b1 -wget==1.21.3-1+b1 diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf index 17485c2a2f9a..6fd0984f5ec6 100644 --- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf +++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf @@ -1,10 +1,3 @@ -bc==1.07.1-3 -dctrl-tools==2.24-3 -dvipng==1.15-1.1 -libnanomsg-dev==1.1.5+dfsg-1.1 -libnanomsg5==1.1.5+dfsg-1.1 -linux-compiler-gcc-12-arm==6.1.90-1 -linux-headers-6.1.0-21-armmp==6.1.90-1 -linux-headers-armmp==6.1.90-1 -watchdog==5.16-1+b1 -wget==1.21.3-1+b1 +linux-compiler-gcc-12-arm==6.1.99-1 +linux-headers-6.1.0-23-armmp==6.1.99-1 +linux-headers-armmp==6.1.99-1 diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 index 97db75c96ebf..6ae5e3eda6bf 100644 --- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 +++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 @@ -12,6 +12,7 @@ beautifulsoup4==4.11.2 beniget==0.4.1 bitarray==2.9.2 blinker==1.5 +blkinfo==0.2.0 brotli==1.0.9 build==0.9.0 certifi==2022.9.24 @@ -91,13 +92,13 @@ pep517==0.13.0 pexpect==4.8.0 pickleshare==0.7.5 pillow==10.0.0 -pip==24.0 +pip==24.2 platformdirs==2.6.0 pluggy==1.0.0+repack ply==3.11 prompt-toolkit==3.0.36 -protobuf==4.21.12 -psutil==5.9.4 +protobuf==4.25.4 +psutil==6.0.0 ptyprocess==0.7.0 pure-eval==0.0.0 py==1.11.0 @@ -106,7 +107,7 @@ pyangbind==0.8.2 pyasn1==0.4.8 pyasn1-modules==0.2.8 pyelftools==0.29 -pyfakefs==5.5.0 +pyfakefs==5.6.0 pygments==2.14.0 pygobject==3.42.2 pyhamcrest==2.0.3 @@ -127,8 +128,8 @@ pythran==0.11.0 pytz==2022.7.1 pyxdg==0.28 pyyaml==6.0 -redis==5.0.4 -regex==2024.5.15 +redis==5.0.8 +regex==2024.7.24 requests==2.28.1 roman==3.3 scapy==2.5.0 diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64 deleted file mode 100644 index 980b0b50f9ca..000000000000 --- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64 +++ /dev/null @@ -1,2 +0,0 @@ -protobuf==4.25.3 -psutil==5.9.8 diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf deleted file mode 100644 index 980b0b50f9ca..000000000000 --- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf +++ /dev/null @@ -1,2 +0,0 @@ -protobuf==4.25.3 -psutil==5.9.8 diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye index 055af05f9698..9d40025ca2d5 100644 --- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye +++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye @@ -24,9 +24,9 @@ autopoint==0.21-4 autotools-dev==20180224.1+nmu1 bash-completion==1:2.11-2 bc==1.07.1-2+b2 -bind9-dnsutils==1:9.16.48-1 -bind9-host==1:9.16.48-1 -bind9-libs==1:9.16.48-1 +bind9-dnsutils==1:9.16.50-1~deb11u1 +bind9-host==1:9.16.50-1~deb11u1 +bind9-libs==1:9.16.50-1~deb11u1 binfmt-support==2.2.1-1+deb11u1 binutils==2.35.2-2 binutils-aarch64-linux-gnu==2.35.2-2 @@ -62,7 +62,7 @@ cpp-10-arm-linux-gnueabihf==10.2.1-6cross1 cpp-arm-linux-gnueabihf==4:10.2.1-1 cppcheck==2.3-1 cron==3.0pl1-137 -curl==7.74.0-1.3+deb11u11 +curl==7.74.0-1.3+deb11u12 cython3==0.29.21-3+b1 dblatex==0.3.12py3-1 dblatex-doc==0.3.12py3-1 @@ -70,7 +70,7 @@ dbus==1.12.28-0+deb11u1 dbus-user-session==1.12.28-0+deb11u1 dconf-gsettings-backend==0.38.0-2 dconf-service==0.38.0-2 -dctrl-tools==2.24-3+b1 +dctrl-tools==2.24-3 debhelper==13.3.4 debian-keyring==2021.07.26 debootstrap==1.0.123+deb11u2 @@ -92,11 +92,11 @@ dh-strip-nondeterminism==1.12.0-1 dictionaries-common==1.28.4 diffstat==1.64-1 dirmngr==2.2.27-2+deb11u2 -distro-info-data==0.51+deb11u5 +distro-info-data==0.51+deb11u6 dkms==2.8.4-3 dmeventd==2:1.02.175-2.1 dmsetup==2:1.02.175-2.1 -dnsutils==1:9.16.48-1 +dnsutils==1:9.16.50-1~deb11u1 docbook==4.5-6 docbook-dsssl==1.79-9.2 docbook-to-man==1:2.0.0-45 @@ -106,7 +106,7 @@ docbook-xsl==1.79.2+dfsg-1 docker-buildx-plugin==0.10.5-1~debian.11~bullseye docker-ce==5:24.0.2-1~debian.11~bullseye docker-ce-cli==5:24.0.2-1~debian.11~bullseye -docker-ce-rootless-extras==5:26.1.3-1~debian.11~bullseye +docker-ce-rootless-extras==5:27.2.0-1~debian.11~bullseye docker-compose-plugin==2.18.1-1~debian.11~bullseye docutils-common==0.16+dfsg-4 dosfstools==4.2-1 @@ -114,21 +114,21 @@ doxygen==1.9.1-1 dpatch==2.0.41 dpkg-dev==1.20.13 dput==1.1.0 -dvipng==1.15-1.1+b1 +dvipng==1.15-1.1 dvisvgm==2.11.1-1 dwarves==1.20-1 dwz==0.13+20210201-1 eatmydata==105-9 ed==1.17-1 -emacs-bin-common==1:27.1+1-3.1+deb11u2 -emacs-common==1:27.1+1-3.1+deb11u2 -emacs-el==1:27.1+1-3.1+deb11u2 -emacs-nox==1:27.1+1-3.1+deb11u2 +emacs-bin-common==1:27.1+1-3.1+deb11u5 +emacs-common==1:27.1+1-3.1+deb11u5 +emacs-el==1:27.1+1-3.1+deb11u5 +emacs-nox==1:27.1+1-3.1+deb11u5 emacsen-common==3.0.4 equivs==2.3.1 -exim4-base==4.94.2-7+deb11u2 -exim4-config==4.94.2-7+deb11u2 -exim4-daemon-light==4.94.2-7+deb11u2 +exim4-base==4.94.2-7+deb11u3 +exim4-config==4.94.2-7+deb11u3 +exim4-daemon-light==4.94.2-7+deb11u3 expat==2.2.10-2+deb11u5 fakeroot==1.25.3-1.1 file==1:5.39-3+deb11u1 @@ -170,7 +170,7 @@ ghostscript==9.53.3~dfsg-7+deb11u7 gir1.2-atk-1.0==2.36.0-2 gir1.2-atspi-2.0==2.38.0-4+deb11u1 gir1.2-freedesktop==1.66.1-1+b1 -gir1.2-gdkpixbuf-2.0==2.42.2+dfsg-1+deb11u1 +gir1.2-gdkpixbuf-2.0==2.42.2+dfsg-1+deb11u2 gir1.2-glib-2.0==1.66.1-1+b1 gir1.2-gtk-3.0==3.24.24-4+deb11u3 gir1.2-harfbuzz-0.0==2.7.4-1 @@ -235,7 +235,7 @@ jq==1.6-2.1 junit5==5.3.2-4 kernel-wedge==2.104 kmod==28-1 -krb5-multidev==1.18.3-6+deb11u4 +krb5-multidev==1.18.3-6+deb11u5 lcov==1.14-2 less==551-2+deb11u2 lib32asan6==10.2.1-6 @@ -307,10 +307,10 @@ libavahi-client3==0.8-5+deb11u2 libavahi-common-data==0.8-5+deb11u2 libavahi-common3==0.8-5+deb11u2 libavc1394-0==0.5.4-5 -libavcodec58==7:4.3.6-0+deb11u1 -libavfilter7==7:4.3.6-0+deb11u1 -libavformat58==7:4.3.6-0+deb11u1 -libavutil56==7:4.3.6-0+deb11u1 +libavcodec58==7:4.3.7-0+deb11u1 +libavfilter7==7:4.3.7-0+deb11u1 +libavformat58==7:4.3.7-0+deb11u1 +libavutil56==7:4.3.7-0+deb11u1 libb-hooks-endofscope-perl==0.24-1.1 libb-hooks-op-check-perl==0.22-1+b3 libbabeltrace-dev==1.5.8-1+b3 @@ -516,9 +516,9 @@ libctf0==2.35.2-2 libcunit1==2.1-3-dfsg-2.3 libcunit1-dev==2.1-3-dfsg-2.3 libcups2==2.3.3op2-3+deb11u6 -libcurl3-gnutls==7.74.0-1.3+deb11u11 -libcurl4==7.74.0-1.3+deb11u11 -libcurl4-openssl-dev==7.74.0-1.3+deb11u11 +libcurl3-gnutls==7.74.0-1.3+deb11u12 +libcurl4==7.74.0-1.3+deb11u12 +libcurl4-openssl-dev==7.74.0-1.3+deb11u12 libdaemon-dev==0.14-7.1 libdaemon0==0.14-7.1 libdata-dpath-perl==0.58-1 @@ -662,10 +662,10 @@ libgd-perl==2.73-1+b1 libgd3==2.3.0-2 libgdbm-compat4==1.19-2 libgdbm6==1.19-2 -libgdk-pixbuf-2.0-0==2.42.2+dfsg-1+deb11u1 -libgdk-pixbuf-2.0-dev==2.42.2+dfsg-1+deb11u1 -libgdk-pixbuf2.0-bin==2.42.2+dfsg-1+deb11u1 -libgdk-pixbuf2.0-common==2.42.2+dfsg-1+deb11u1 +libgdk-pixbuf-2.0-0==2.42.2+dfsg-1+deb11u2 +libgdk-pixbuf-2.0-dev==2.42.2+dfsg-1+deb11u2 +libgdk-pixbuf2.0-bin==2.42.2+dfsg-1+deb11u2 +libgdk-pixbuf2.0-common==2.42.2+dfsg-1+deb11u2 libgeronimo-annotation-1.3-spec-java==1.3-1 libgeronimo-interceptor-3.0-spec-java==1.0.1-4 libgetopt-long-descriptive-perl==0.105-1 @@ -685,11 +685,11 @@ libglapi-mesa==20.3.5-1 libgles-dev==1.3.2-1 libgles1==1.3.2-1 libgles2==1.3.2-1 -libglib2.0-0==2.66.8-1+deb11u3 -libglib2.0-bin==2.66.8-1+deb11u3 -libglib2.0-data==2.66.8-1+deb11u3 -libglib2.0-dev==2.66.8-1+deb11u3 -libglib2.0-dev-bin==2.66.8-1+deb11u3 +libglib2.0-0==2.66.8-1+deb11u4 +libglib2.0-bin==2.66.8-1+deb11u4 +libglib2.0-data==2.66.8-1+deb11u4 +libglib2.0-dev==2.66.8-1+deb11u4 +libglib2.0-dev-bin==2.66.8-1+deb11u4 libglu1-mesa==9.0.1-1 libglu1-mesa-dev==9.0.1-1 libglvnd-dev==1.3.2-1 @@ -701,7 +701,7 @@ libgme0==0.6.3-2 libgmock-dev==1.10.0.20201025-1.1 libgmp-dev==2:6.2.1+dfsg-1+deb11u1 libgmpxx4ldbl==2:6.2.1+dfsg-1+deb11u1 -libgnutls-dane0==3.7.1-5+deb11u4 +libgnutls-dane0==3.7.1-5+deb11u5 libgomp1==10.2.1-6 libgomp1-armhf-cross==10.2.1-6cross1 libgoogle-gson-java==2.8.6-1+deb11u1 @@ -717,7 +717,7 @@ libgs9==9.53.3~dfsg-7+deb11u7 libgs9-common==9.53.3~dfsg-7+deb11u7 libgsasl7==1.10.0-4+deb11u1 libgsm1==1.0.18-2 -libgssrpc4==1.18.3-6+deb11u4 +libgssrpc4==1.18.3-6+deb11u5 libgstreamer-plugins-base1.0-0==1.18.4-2+deb11u2 libgstreamer1.0-0==1.18.4-2.1 libgtest-dev==1.10.0.20201025-1.1 @@ -838,7 +838,6 @@ libjson-glib-1.0-common==1.6.2-1 libjson-maybexs-perl==1.004003-1 libjson-perl==4.03000-1 libjson-xs-perl==4.030-1+b1 -libjsoncpp-dev==1.9.4-4 libjsoncpp24==1.9.4-4 libjsp-api-java==2.3.4-3 libjsr305-java==0.1~+svn49-11 @@ -847,12 +846,12 @@ libjudy-dev==1.0.5-5+b2 libjudydebian1==1.0.5-5+b2 libjxr-tools==1.1-6+b1 libjxr0==1.1-6+b1 -libkadm5clnt-mit12==1.18.3-6+deb11u4 -libkadm5srv-mit12==1.18.3-6+deb11u4 -libkdb5-10==1.18.3-6+deb11u4 +libkadm5clnt-mit12==1.18.3-6+deb11u5 +libkadm5srv-mit12==1.18.3-6+deb11u5 +libkdb5-10==1.18.3-6+deb11u5 libkmod2==28-1 libkpathsea6==2020.20200327.54578-7+deb11u1 -libkrb5-dev==1.18.3-6+deb11u4 +libkrb5-dev==1.18.3-6+deb11u5 libksba8==1.5.0-3+deb11u2 liblab-gamut1==2.42.2-5 liblapack3==3.9.0-3+deb11u1 @@ -984,7 +983,7 @@ libnorm1==1.5.9+dfsg-2 libnpth0==1.6-3 libnsl-dev==1.3.0-2 libnspr4==2:4.29-1 -libnss-systemd==247.3-7+deb11u4 +libnss-systemd==247.3-7+deb11u5 libnss3==2:3.61-1+deb11u3 libntlm0==1.6-3 libnuma-dev==2.0.12-1+b1 @@ -1023,7 +1022,7 @@ libpackage-stash-xs-perl==0.29-1+b2 libpackagekit-glib2-18==1.2.2-2 libpadwalker-perl==2.5-1+b1 libpam-cap==1:2.44-1 -libpam-systemd==247.3-7+deb11u4 +libpam-systemd==247.3-7+deb11u5 libpam0g-dev==1.4.0-9+deb11u1 libpango-1.0-0==1.46.2-3 libpango1.0-dev==1.46.2-3 @@ -1097,7 +1096,7 @@ libpod-parser-perl==1.63-2 libpolkit-agent-1-0==0.105-31+deb11u1 libpolkit-gobject-1-0==0.105-31+deb11u1 libpopt0==1.18-2 -libpostproc55==7:4.3.6-0+deb11u1 +libpostproc55==7:4.3.7-0+deb11u1 libproc-processtable-perl==0.59-2+b1 libprocps8==2:3.3.17-5 libprotobuf-c1==1.3.3-1+b2 @@ -1127,20 +1126,20 @@ libpython3.9-minimal==3.9.2-1 libpython3.9-stdlib==3.9.2-1 libqdox-java==1.12.1-3 libqdox2-java==2.0.0-1 -libqt5concurrent5==5.15.2+dfsg-9 -libqt5core5a==5.15.2+dfsg-9 -libqt5dbus5==5.15.2+dfsg-9 -libqt5gui5==5.15.2+dfsg-9 -libqt5network5==5.15.2+dfsg-9 -libqt5opengl5==5.15.2+dfsg-9 -libqt5opengl5-dev==5.15.2+dfsg-9 -libqt5printsupport5==5.15.2+dfsg-9 -libqt5sql5==5.15.2+dfsg-9 -libqt5sql5-sqlite==5.15.2+dfsg-9 +libqt5concurrent5==5.15.2+dfsg-9+deb11u1 +libqt5core5a==5.15.2+dfsg-9+deb11u1 +libqt5dbus5==5.15.2+dfsg-9+deb11u1 +libqt5gui5==5.15.2+dfsg-9+deb11u1 +libqt5network5==5.15.2+dfsg-9+deb11u1 +libqt5opengl5==5.15.2+dfsg-9+deb11u1 +libqt5opengl5-dev==5.15.2+dfsg-9+deb11u1 +libqt5printsupport5==5.15.2+dfsg-9+deb11u1 +libqt5sql5==5.15.2+dfsg-9+deb11u1 +libqt5sql5-sqlite==5.15.2+dfsg-9+deb11u1 libqt5svg5==5.15.2-3 -libqt5test5==5.15.2+dfsg-9 -libqt5widgets5==5.15.2+dfsg-9 -libqt5xml5==5.15.2+dfsg-9 +libqt5test5==5.15.2+dfsg-9+deb11u1 +libqt5widgets5==5.15.2+dfsg-9+deb11u1 +libqt5xml5==5.15.2+dfsg-9+deb11u1 libquadmath0==10.2.1-6 librabbitmq4==0.10.0-1 libraw1394-11==2.1.2-2 @@ -1220,7 +1219,7 @@ libsqlite3-0==3.34.1-3 libsratom-0-0==0.6.8-1 libsrt1.4-gnutls==1.4.2-1.3 libssh-gcrypt-4==0.9.8-0+deb11u1 -libssh2-1==1.9.0-2 +libssh2-1==1.9.0-2+deb11u1 libssl-dev==1.1.1w-0+deb11u1 libstdc++-10-dev==10.2.1-6 libstdc++6-armhf-cross==10.2.1-6cross1 @@ -1240,12 +1239,12 @@ libsubunit-dev==1.4.0-3 libsubunit0==1.4.0-3 libsurefire-java==2.22.3-1 libswitch-perl==2.17-2.1 -libswresample3==7:4.3.6-0+deb11u1 -libswscale5==7:4.3.6-0+deb11u1 +libswresample3==7:4.3.7-0+deb11u1 +libswscale5==7:4.3.7-0+deb11u1 libsynctex2==2020.20200327.54578-7+deb11u1 libsys-cpuaffinity-perl==1.13~03-1 libsys-hostname-long-perl==1.5-2 -libsystemd-dev==247.3-7+deb11u4 +libsystemd-dev==247.3-7+deb11u5 libtag1v5==1.11.1+dfsg.1-3 libtag1v5-vanilla==1.11.1+dfsg.1-3 libtask-weaken-perl==1.06-1 @@ -1293,10 +1292,10 @@ libubsan1==10.2.1-6 libubsan1-armhf-cross==10.2.1-6cross1 libuchardet0==0.0.7-1 libucx0==1.10.1~rc1+really.1.10.0-1 -libudev-dev==247.3-7+deb11u4 +libudev-dev==247.3-7+deb11u5 libudfread0==1.1.1-1 libunbound8==1.13.1-1+deb11u2 -libunicode-linebreak-perl==0.0.20190101-1+b3 +libunicode-linebreak-perl==0.0.20190101-1+b2 libunicode-utf8-perl==0.62-1+b2 libunivocity-parsers-java==2.8.3-2 libunwind-dev==1.3.2-2 @@ -1328,7 +1327,7 @@ libvisual-0.4-0==0.4.0-17 libvorbis0a==1.3.7-1 libvorbisenc2==1.3.7-1 libvorbisfile3==1.3.7-1 -libvpx6==1.9.0-1+deb11u2 +libvpx6==1.9.0-1+deb11u3 libvte-2.91-0==0.62.3-1 libvte-2.91-common==0.62.3-1 libvulkan-dev==1.2.162.0-1 @@ -1454,7 +1453,7 @@ libxmlgraphics-commons-java==2.4-2~deb11u1 libxmlrpc-lite-perl==0.717-4 libxmu6==2:1.1.2-2+b3 libxmuu1==2:1.1.2-2+b3 -libxnvctrl0==470.141.03-1~deb11u1 +libxnvctrl0==470.239.06-1 libxpm4==1:3.5.12-1.1+deb11u1 libxrandr-dev==2:1.5.1-1 libxrandr2==2:1.5.1-1 @@ -1490,14 +1489,14 @@ libzvbi0==0.2.35-18 libzzip-0-13==0.13.62-3.3+deb11u1 licensecheck==3.1.1-2 lintian==2.104.0 -linux-compiler-gcc-10-x86==5.10.218-1 -linux-headers-5.10.0-30-amd64==5.10.218-1 -linux-headers-5.10.0-30-arm64==5.10.218-1 -linux-headers-5.10.0-30-common==5.10.218-1 -linux-headers-amd64==5.10.218-1 -linux-headers-arm64==5.10.218-1 -linux-kbuild-5.10==5.10.218-1 -linux-libc-dev==5.10.218-1 +linux-compiler-gcc-10-x86==5.10.221-1 +linux-headers-5.10.0-31-amd64==5.10.221-1 +linux-headers-5.10.0-31-arm64==5.10.221-1 +linux-headers-5.10.0-31-common==5.10.221-1 +linux-headers-amd64==5.10.221-1 +linux-headers-arm64==5.10.221-1 +linux-kbuild-5.10==5.10.221-1 +linux-libc-dev==5.10.221-1 linuxdoc-tools==0.9.82-1 llvm==1:11.0-51+nmu5 llvm-11==1:11.0.1-2 @@ -1685,7 +1684,7 @@ python3-gpg==1.14.0-1+b2 python3-hamcrest==1.9.0-3 python3-html5lib==1.1-3 python3-hyperlink==19.0.0-2 -python3-idna==2.10-1 +python3-idna==2.10-1+deb11u1 python3-imagesize==1.2.0-2 python3-importlib-metadata==1.6.0-2 python3-incremental==17.5.0-1 @@ -1716,7 +1715,7 @@ python3-parse==1.6.6-0.2 python3-parso==0.8.1-1 python3-pexpect==4.8.0-2 python3-pickleshare==0.7.5-3 -python3-pil==8.1.2+dfsg-0.3+deb11u1 +python3-pil==8.1.2+dfsg-0.3+deb11u2 python3-pkg-resources==52.0.0-4 python3-pluggy==0.13.0-6 python3-ply==3.11-4 @@ -1772,11 +1771,11 @@ qemu-system-data==1:5.2+dfsg-11+deb11u3 qemu-system-gui==1:5.2+dfsg-11+deb11u3 qemu-system-x86==1:5.2+dfsg-11+deb11u3 qemu-utils==1:5.2+dfsg-11+deb11u3 -qt5-gtk-platformtheme==5.15.2+dfsg-9 -qt5-qmake==5.15.2+dfsg-9 -qt5-qmake-bin==5.15.2+dfsg-9 -qtbase5-dev==5.15.2+dfsg-9 -qtbase5-dev-tools==5.15.2+dfsg-9 +qt5-gtk-platformtheme==5.15.2+dfsg-9+deb11u1 +qt5-qmake==5.15.2+dfsg-9+deb11u1 +qt5-qmake-bin==5.15.2+dfsg-9+deb11u1 +qtbase5-dev==5.15.2+dfsg-9+deb11u1 +qtbase5-dev-tools==5.15.2+dfsg-9+deb11u1 qtchooser==66-2 qttranslations5-l10n==5.15.2-2 quilt==0.66-2.1 @@ -1845,9 +1844,9 @@ strace==5.10-1 sudo==1.9.5p2-3+deb11u1 swig==4.0.2-1 swig4.0==4.0.2-1 -systemd==247.3-7+deb11u4 -systemd-sysv==247.3-7+deb11u4 -systemd-timesyncd==247.3-7+deb11u4 +systemd==247.3-7+deb11u5 +systemd-sysv==247.3-7+deb11u5 +systemd-timesyncd==247.3-7+deb11u5 t1utils==1.41-4 tcl==8.6.11+1 tcl8.6==8.6.11+dfsg-1 diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-arm64 b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-arm64 deleted file mode 100644 index 8c36820881e4..000000000000 --- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-arm64 +++ /dev/null @@ -1,3 +0,0 @@ -dctrl-tools==2.24-3 -dvipng==1.15-1.1 -libunicode-linebreak-perl==0.0.20190101-1+b2 diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf index bd29040d6542..f98b360d3695 100644 --- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf +++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf @@ -1,9 +1,6 @@ -dctrl-tools==2.24-3 -dvipng==1.15-1.1 libjpeg-dev==1:2.0.6-4 libjpeg62-turbo-dev==1:2.0.6-4 -libunicode-linebreak-perl==0.0.20190101-1+b2 -linux-compiler-gcc-10-arm==5.10.218-1 -linux-headers-5.10.0-30-armmp==5.10.218-1 -linux-headers-armmp==5.10.218-1 +linux-compiler-gcc-10-arm==5.10.221-1 +linux-headers-5.10.0-31-armmp==5.10.221-1 +linux-headers-armmp==5.10.221-1 nasm==2.15.05-1 diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 index 4bfb6d46bc44..3cc1b88b917d 100644 --- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 +++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 @@ -8,6 +8,7 @@ backcall==0.2.0 bcrypt==3.1.7 beautifulsoup4==4.9.3 bitarray==2.9.2 +blkinfo==0.2.0 certifi==2020.6.20 chardet==4.0.0 click==7.1.2 @@ -69,12 +70,12 @@ parso==0.8.1 pexpect==4.8.0 pickleshare==0.7.5 pillow==9.4.0 -pip==24.0 +pip==24.2 pluggy==0.13.0 ply==3.11 prompt-toolkit==3.0.14 -protobuf==4.25.3 -psutil==5.8.0 +protobuf==4.25.4 +psutil==6.0.0 ptyprocess==0.7.0 py==1.10.0 pyang==2.4.0 @@ -82,7 +83,7 @@ pyangbind==0.8.1 pyasn1==0.4.8 pyasn1-modules==0.2.1 pycurl==7.43.0.6 -pyfakefs==5.5.0 +pyfakefs==5.6.0 pygments==2.7.1 pygobject==3.38.0 pyhamcrest==1.9.0 @@ -101,8 +102,8 @@ python-magic==0.4.20 pytz==2021.1 pyxdg==0.27 pyyaml==5.4.1 -redis==5.0.4 -regex==2024.5.15 +redis==5.0.8 +regex==2024.7.24 requests==2.25.1 roman==2.0.0 scapy==2.4.4 diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster index c51600950891..f97105806fba 100644 --- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster +++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster @@ -95,7 +95,7 @@ docbook-xml==4.5-8 docker-buildx-plugin==0.10.5-1~debian.10~buster docker-ce==5:24.0.2-1~debian.10~buster docker-ce-cli==5:24.0.2-1~debian.10~buster -docker-ce-rootless-extras==5:26.1.3-1~debian.10~buster +docker-ce-rootless-extras==5:26.1.4-1~debian.10~buster docker-compose-plugin==2.18.1-1~debian.10~buster docutils-common==0.14+dfsg-4 docutils-doc==0.14+dfsg-4 @@ -156,9 +156,9 @@ gir1.2-gtk-3.0==3.24.5-1 gir1.2-harfbuzz-0.0==2.3.1-1 gir1.2-packagekitglib-1.0==1.1.12-5 gir1.2-pango-1.0==1.42.4-8~deb10u1 -git==1:2.20.1-2+deb10u8 +git==1:2.20.1-2+deb10u9 git-buildpackage==0.9.14 -git-man==1:2.20.1-2+deb10u8 +git-man==1:2.20.1-2+deb10u9 glib-networking==2.58.0-2+deb10u2 glib-networking-common==2.58.0-2+deb10u2 glib-networking-services==2.58.0-2+deb10u2 @@ -342,14 +342,15 @@ libbsh-java==2.0b4-19 libbz2-dev==1.0.6-9.2~deb10u2 libc-ares-dev==1.14.0-1+deb10u4 libc-ares2==1.14.0-1+deb10u4 -libc-dev-bin==2.28-10+deb10u3 -libc-l10n==2.28-10+deb10u3 -libc6-dbg==2.28-10+deb10u3 -libc6-dev==2.28-10+deb10u3 -libc6-dev-i386==2.28-10+deb10u3 -libc6-dev-x32==2.28-10+deb10u3 -libc6-i386==2.28-10+deb10u3 -libc6-x32==2.28-10+deb10u3 +libc-dev-bin==2.28-10+deb10u4 +libc-l10n==2.28-10+deb10u4 +libc6==2.28-10+deb10u4 +libc6-dbg==2.28-10+deb10u4 +libc6-dev==2.28-10+deb10u4 +libc6-dev-i386==2.28-10+deb10u4 +libc6-dev-x32==2.28-10+deb10u4 +libc6-i386==2.28-10+deb10u4 +libc6-x32==2.28-10+deb10u4 libcaca0==0.99.beta19-2.1+deb10u1 libcacard0==1:2.6.1-1 libcaf-openmpi-3==2.4.0-2 @@ -415,9 +416,9 @@ libcryptsetup12==2:2.1.0-5+deb10u2 libcrystalhd3==1:0.0~git20110715.fdd2f19-13 libcunit1==2.1-3-dfsg-2+b12 libcunit1-dev==2.1-3-dfsg-2+b12 -libcups2==2.2.10-6+deb10u9 +libcups2==2.2.10-6+deb10u10 libcupsfilters1==1.21.6-5+deb10u1 -libcupsimage2==2.2.10-6+deb10u9 +libcupsimage2==2.2.10-6+deb10u10 libcurl3-gnutls==7.64.0-4+deb10u9 libcurl4==7.64.0-4+deb10u9 libcurl4-openssl-dev==7.64.0-4+deb10u9 @@ -1139,7 +1140,7 @@ libtexlua53==2018.20181218.49446-1+deb10u2 libtexluajit2==2018.20181218.49446-1+deb10u2 libtext-charwidth-perl==0.04-7.1+b1 libtext-glob-perl==0.10-1 -libtext-iconv-perl==1.7-5+b7 +libtext-iconv-perl==1.7-5+b6 libtext-levenshtein-perl==0.13-1 libtext-unidecode-perl==1.30-1 libtext-wrapi18n-perl==0.06-7.1 @@ -1194,7 +1195,7 @@ libvisual-0.4-0==0.4.0-15 libvorbis0a==1.3.6-2 libvorbisenc2==1.3.6-2 libvorbisfile3==1.3.6-2 -libvpx5==1.7.0-3+deb10u2 +libvpx5==1.7.0-3+deb10u3 libvte-2.91-0==0.54.2-2 libvte-2.91-common==0.54.2-2 libvulkan-dev==1.1.97-2 @@ -1359,18 +1360,18 @@ libzvbi0==0.2.35-16 libzzip-0-13==0.13.62-3.2+deb10u1 licensecheck==3.0.31-3 lintian==2.15.0 -linux-compiler-gcc-8-x86==4.19.304-1 -linux-headers-4.19.0-26-amd64==4.19.304-1 -linux-headers-4.19.0-26-common==4.19.304-1 -linux-headers-amd64==4.19+105+deb10u21 -linux-kbuild-4.19==4.19.304-1 -linux-libc-dev==4.19.304-1 +linux-compiler-gcc-8-x86==4.19.316-1 +linux-headers-4.19.0-27-amd64==4.19.316-1 +linux-headers-4.19.0-27-common==4.19.316-1 +linux-headers-amd64==4.19+105+deb10u22 +linux-kbuild-4.19==4.19.316-1 +linux-libc-dev==4.19.316-1 linuxdoc-tools==0.9.73-2 llvm-7==1:7.0.1-8+deb10u2 llvm-7-dev==1:7.0.1-8+deb10u2 llvm-7-runtime==1:7.0.1-8+deb10u2 lmodern==2.004.5-6 -locales==2.28-10+deb10u3 +locales==2.28-10+deb10u4 logrotate==3.14.0-4 lsb-base==10.2019051400 lsb-release==10.2019051400 @@ -1418,7 +1419,7 @@ openssh-client==1:7.9p1-10+deb10u4 openssh-server==1:7.9p1-10+deb10u4 openssh-sftp-server==1:7.9p1-10+deb10u4 openssl==1.1.1n-0+deb10u6 -ovmf==0~20181115.85588389-3+deb10u3 +ovmf==0~20181115.85588389-3+deb10u4 packagekit==1.1.12-5 packagekit-tools==1.1.12-5 pango1.0-tools==1.42.4-8~deb10u1 @@ -1449,13 +1450,13 @@ php-token-stream==3.0.1-1 php-tokenizer==1.1.0-1 php-webmozart-assert==1.4.0-3 php-xml==2:7.3+69 -php7.3-cli==7.3.31-1~deb10u6 -php7.3-common==7.3.31-1~deb10u6 -php7.3-json==7.3.31-1~deb10u6 -php7.3-mbstring==7.3.31-1~deb10u6 -php7.3-opcache==7.3.31-1~deb10u6 -php7.3-readline==7.3.31-1~deb10u6 -php7.3-xml==7.3.31-1~deb10u6 +php7.3-cli==7.3.31-1~deb10u7 +php7.3-common==7.3.31-1~deb10u7 +php7.3-json==7.3.31-1~deb10u7 +php7.3-mbstring==7.3.31-1~deb10u7 +php7.3-opcache==7.3.31-1~deb10u7 +php7.3-readline==7.3.31-1~deb10u7 +php7.3-xml==7.3.31-1~deb10u7 phpunit==7.5.6-1 phpunit-code-unit-reverse-lookup==1.0.1-1 phpunit-comparator==3.0.2-1 diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-arm64 b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-arm64 deleted file mode 100644 index 8f68d6329237..000000000000 --- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-arm64 +++ /dev/null @@ -1 +0,0 @@ -libtext-iconv-perl==1.7-5+b6 diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf index fc8b535d026f..201942d33930 100644 --- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf +++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf @@ -17,7 +17,8 @@ libqt5sql5-sqlite==5.11.3+dfsg1-1+deb10u5 libqt5test5==5.11.3+dfsg1-1+deb10u5 libqt5widgets5==5.11.3+dfsg1-1+deb10u5 libqt5xml5==5.11.3+dfsg1-1+deb10u5 -linux-compiler-gcc-8-arm==4.19.304-1 +libtext-iconv-perl==1.7-5+b7 +linux-compiler-gcc-8-arm==4.19.316-1 nasm==2.14-1 qt5-default==5.11.3+dfsg1-1+deb10u5 qt5-gtk-platformtheme==5.11.3+dfsg1-1+deb10u5 diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-py2 b/files/build/versions/dockers/sonic-slave-buster/versions-py2 index b981e77dd5db..d043b8e5bed5 100644 --- a/files/build/versions/dockers/sonic-slave-buster/versions-py2 +++ b/files/build/versions/dockers/sonic-slave-buster/versions-py2 @@ -7,6 +7,7 @@ automat==0.6.0 babel==2.6.0 backports.functools-lru-cache==1.5 beautifulsoup4==4.7.1 +blkinfo==0.2.0 certifi==2018.8.24 chardet==3.0.4 click==7.0 @@ -57,6 +58,7 @@ pexpect==4.6.0 pillow==5.4.1 pip==20.3.4 pluggy==0.8.0 +psutil==6.0.0 ptyprocess==0.7.0 py==1.7.0 pyasn1==0.4.2 diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-py3 b/files/build/versions/dockers/sonic-slave-buster/versions-py3 index 169a0f62a0fe..8274e14ba665 100644 --- a/files/build/versions/dockers/sonic-slave-buster/versions-py3 +++ b/files/build/versions/dockers/sonic-slave-buster/versions-py3 @@ -5,6 +5,7 @@ atomicwrites==1.1.5 attrs==18.2.0 babel==2.6.0 bitarray==2.9.2 +blkinfo==0.2.0 certifi==2018.8.24 chardet==3.0.4 cov-core==1.15.0 @@ -25,7 +26,7 @@ jinja2==3.0.3 keyring==17.1.1 keyrings.alt==3.1.1 lxml==4.9.1 -m2crypto==0.41.0 +m2crypto==0.42.0 mako==1.0.7 markdown==3.0.1 markupsafe==2.0.1 @@ -43,13 +44,14 @@ pexpect==4.8.0 pillow==9.4.0 pip==24.0 pluggy==0.8.0 +psutil==6.0.0 ptyprocess==0.7.0 py==1.7.0 pyang==2.4.0 pyangbind==0.8.1 pycrypto==2.6.1 pycurl==7.43.0.2 -pyfakefs==5.5.0 +pyfakefs==5.6.0 pygments==2.3.1 pygobject==3.30.4 pympler==0.8 @@ -64,7 +66,7 @@ python-magic==0.4.16 pytz==2019.1 pyxdg==0.25 pyyaml==5.4.1 -redis==5.0.4 +redis==5.0.8 regex==2024.4.16 requests==2.21.0 roman==2.0.0 diff --git a/files/build/versions/host-base-image/versions-deb-bookworm b/files/build/versions/host-base-image/versions-deb-bookworm index 6d97d65c7f1b..d14312af2f5e 100644 --- a/files/build/versions/host-base-image/versions-deb-bookworm +++ b/files/build/versions/host-base-image/versions-deb-bookworm @@ -1,9 +1,9 @@ adduser==3.134 apt==2.6.1 -base-files==12.4+deb12u5 +base-files==12.4+deb12u6 base-passwd==3.6.1 -bash==5.2.15-2+b2 -bsdutils==1:2.38.1-5+b1 +bash==5.2.15-2+b7 +bsdutils==1:2.38.1-5+deb12u1 coreutils==9.1-1 dash==0.5.12-2 debconf==1.5.82 @@ -24,10 +24,10 @@ libapt-pkg6.0==2.6.1 libattr1==1:2.5.1-4 libaudit-common==1:3.0.9-1 libaudit1==1:3.0.9-1 -libblkid1==2.38.1-5+b1 +libblkid1==2.38.1-5+deb12u1 libbz2-1.0==1.0.8-5+b1 -libc-bin==2.36-9+deb12u4 -libc6==2.36-9+deb12u4 +libc-bin==2.36-9+deb12u7 +libc6==2.36-9+deb12u7 libcap-ng0==0.8.3-1+b3 libcap2==1:2.66-4 libcom-err2==1.47.0-2 @@ -39,14 +39,14 @@ libffi8==3.4.4-1 libgcc-s1==12.2.0-14 libgcrypt20==1.10.1-3 libgmp10==2:6.2.1+dfsg1-1.1 -libgnutls30==3.7.9-2+deb12u2 +libgnutls30==3.7.9-2+deb12u3 libgpg-error0==1.46-1 libhogweed6==3.8.1-2 libidn2-0==2.3.3-1+b1 liblz4-1==1.9.4-1 liblzma5==5.4.1-0.2 libmd0==1.0.4-2 -libmount1==2.38.1-5+b1 +libmount1==2.38.1-5+deb12u1 libnettle8==3.8.1-2 libp11-kit0==0.24.1-2 libpam-modules==1.5.2-6+deb12u1 @@ -54,26 +54,26 @@ libpam-modules-bin==1.5.2-6+deb12u1 libpam-runtime==1.5.2-6+deb12u1 libpam0g==1.5.2-6+deb12u1 libpcre2-8-0==10.42-1 -libseccomp2==2.5.4-1+b3 +libseccomp2==2.5.4-1+deb12u1 libselinux1==3.4-1+b6 libsemanage-common==3.4-1 libsemanage2==3.4-1+b5 libsepol2==3.4-2.1 -libsmartcols1==2.38.1-5+b1 +libsmartcols1==2.38.1-5+deb12u1 libss2==1.47.0-2 libstdc++6==12.2.0-14 -libsystemd0==252.22-1~deb12u1 +libsystemd0==252.26-1~deb12u2 libtasn1-6==4.19.0-2 libtinfo6==6.4-4 -libudev1==252.22-1~deb12u1 +libudev1==252.26-1~deb12u2 libunistring2==1.0-2 -libuuid1==2.38.1-5+b1 +libuuid1==2.38.1-5+deb12u1 libxxhash0==0.8.1-1 libzstd1==1.5.4+dfsg2-5 login==1:4.13+dfsg1-1+b1 logsave==1.47.0-2 mawk==1.3.4.20200120-3.1 -mount==2.38.1-5+b1 +mount==2.38.1-5+deb12u1 ncurses-base==6.4-4 ncurses-bin==6.4-4 passwd==1:4.13+dfsg1-1+b1 @@ -83,6 +83,6 @@ sysvinit-utils==3.06-4 tar==1.34+dfsg-1.2+deb12u1 tzdata==2024a-0+deb12u1 usr-is-merged==37~deb12u1 -util-linux==2.38.1-5+b1 -util-linux-extra==2.38.1-5+b1 +util-linux==2.38.1-5+deb12u1 +util-linux-extra==2.38.1-5+deb12u1 zlib1g==1:1.2.13.dfsg-1 diff --git a/files/build/versions/host-image/versions-deb-bookworm b/files/build/versions/host-image/versions-deb-bookworm index b3d1df0f77df..f48451bfa5da 100644 --- a/files/build/versions/host-image/versions-deb-bookworm +++ b/files/build/versions/host-image/versions-deb-bookworm @@ -7,7 +7,7 @@ auditd==1:3.0.9-1 bash==5.1-2 bash-completion==1:2.11-6 bash-tacplus==1.0.0 -bfscripts==4.6.0-13035 +bfscripts==4.7.0-13127 binutils==2.40-2 binutils-aarch64-linux-gnu==2.40-2 binutils-common==2.40-2 @@ -16,7 +16,6 @@ bluefield-platform-modules==1.0 bridge-utils==1.7.1-1 bsdextrautils==2.38.1-5+deb12u1 bsdmainutils==12.1.8 -bsdutils==1:2.38.1-5+deb12u1 busybox==1:1.35.0-4+b3 ca-certificates==20230311 cgroup-tools==2.0.2-2 @@ -27,14 +26,14 @@ cpp==4:12.2.0-3 cpp-12==12.2.0-14 cron==3.0pl1-162 cron-daemon-common==3.0pl1-162 -curl==7.88.1-10+deb12u5 +curl==7.88.1-10+deb12u6 dbus==1.14.10-1~deb12u1 dbus-bin==1.14.10-1~deb12u1 dbus-daemon==1.14.10-1~deb12u1 dbus-session-bus-common==1.14.10-1~deb12u1 dbus-system-bus-common==1.14.10-1~deb12u1 device-tree-compiler==1.6.1-4+b1 -distro-info-data==0.58+deb12u1 +distro-info-data==0.58+deb12u2 dmidecode==3.4-1 dmsetup==2:1.02.185-2 docker-ce==5:24.0.2-1~debian.12~bookworm @@ -65,7 +64,7 @@ grub2-common==2.06-13+deb12u1 haveged==1.9.14-1+b1 hdparm==9.65+ds-1 hping3==3.a2.ds2-10 -hw-management==1.mlnx.7.0030.3008 +hw-management==1.mlnx.7.0030.4003 i2c-tools==4.3-2+b3 icu-devtools==72.1-3 ifmetric==0.3-5 @@ -83,7 +82,7 @@ j2cli==0.3.12b-4 jq==1.6-2.1 kdump-tools==1:1.8.1 kernel-mft-dkms-modules-6.1.0-11-2-amd64==4.28.0 -kernel-mft-dkms-modules-6.1.0-11-2-arm64==4.26.1 +kernel-mft-dkms-modules-6.1.0-11-2-arm64==4.28.0 kexec-tools==1:2.0.25-3+b1 klibc-utils==2.0.12-1 kmod==30+20221128-1 @@ -94,21 +93,20 @@ libapparmor1==3.0.8-3 libargon2-1==0~20171227-0.3+deb12u1 libasan8==12.2.0-14 libassuan0==2.5.5-5 -libatm1==1:2.5.1-4+b2 libatomic1==12.2.0-14 libauparse0==1:3.0.9-1 +libavahi-client3==0.8-10 +libavahi-common-data==0.8-10 +libavahi-common3==0.8-10 libbabeltrace1==1.5.11-1+b2 libbinutils==2.40-2 -libblkid1==2.38.1-5+deb12u1 libboost-serialization1.74.0==1.74.0+ds1-21 libbpf1==1:1.1.0-1 libbrotli1==1.0.9-2+b6 libbsd0==0.11.7-2 libc-ares2==1.18.1-3 -libc-bin==2.36-9+deb12u7 libc-dev-bin==2.36-9+deb12u7 libc-l10n==2.36-9+deb12u7 -libc6==2.36-9+deb12u7 libc6-dev==2.36-9+deb12u7 libcap2-bin==1:2.66-4 libcbor0.8==0.8.0-2+b1 @@ -119,7 +117,7 @@ libcrypt-dev==1:4.4.33-2 libcryptsetup12==2:2.6.1-4~deb12u2 libctf-nobfd0==2.40-2 libctf0==2.40-2 -libcurl4==7.88.1-10+deb12u5 +libcurl4==7.88.1-10+deb12u6 libdbd-sqlite3-perl==1.72-1 libdbi-perl==1.643-4 libdbus-1-3==1.14.10-1~deb12u1 @@ -137,25 +135,27 @@ libfdisk1==2.38.1-5+deb12u1 libfdt1==1.6.1-4+b1 libffi-dev==3.4.4-1 libfido2-1==1.12.0-2+b1 -libfreetype6==2.12.1+dfsg-5 +libfreetype6==2.12.1+dfsg-5+deb12u3 libfuse2==2.9.9-6+b1 libgcc-12-dev==12.2.0-14 libgdbm-compat4==1.23-3 libgdbm6==1.23-3 libgirepository-1.0-1==1.74.0-3 -libglib2.0-0==2.74.6-2+deb12u2 +libglib2.0-0==2.74.6-2+deb12u3 libgomp1==12.2.0-14 libgpm2==1.20.7-10+b1 libgprofng0==2.40-2 libgrpc++1.51==1.51.1-3+b1 libgrpc29==1.51.1-3+b1 -libgssapi-krb5-2==1.20.1-2+deb12u1 +libgssapi-krb5-2==1.20.1-2+deb12u2 libhavege2==1.9.14-1+b1 libhiredis0.14==0.14.1-3 libhwasan0==12.2.0-14 libi2c0==4.3-2+b3 libicu-dev==72.1-3 libicu72==72.1-3 +libiio-utils==0.24-4 +libiio0==0.24-4 libiniparser1==4.1-6 libip4tc2==1.8.9-2 libip6tc2==1.8.9-2 @@ -165,12 +165,12 @@ libjansson4==2.14-2 libjq1==1.6-2.1 libjs-jquery==3.6.1+dfsg+~3.5.14-1 libjson-c5==0.16-2 -libk5crypto3==1.20.1-2+deb12u1+fips +libk5crypto3==1.20.1-2+deb12u2 libkeyutils1==1.6.3-2 libklibc==2.0.12-1 libkmod2==30+20221128-1 -libkrb5-3==1.20.1-2+deb12u1 -libkrb5support0==1.20.1-2+deb12u1 +libkrb5-3==1.20.1-2+deb12u2 +libkrb5support0==1.20.1-2+deb12u2 libldap-2.5-0==2.5.13+dfsg-5 liblognorm5==2.0.6-4 liblsan0==12.2.0-14 @@ -179,7 +179,6 @@ liblzo2-2==2.10-2 libmagic-mgc==1:5.44-3 libmagic1==1:5.44-3 libmnl0==1.0.4-3 -libmount1==2.38.1-5+deb12u1 libmpc3==1.3.1-1 libmpfr6==4.2.0-1 libncurses6==6.4-4 @@ -222,9 +221,9 @@ libpsl5==0.21.2-1 libpwquality-common==1.4.5-1 libpwquality1==1.4.5-1+b1 libpython3-stdlib==3.11.2-1+b1 -libpython3.11==3.11.2-6 -libpython3.11-minimal==3.11.2-6 -libpython3.11-stdlib==3.11.2-6 +libpython3.11==3.11.2-6+deb12u2 +libpython3.11-minimal==3.11.2-6+deb12u2 +libpython3.11-stdlib==3.11.2-6+deb12u2 libquadmath0==12.2.0-14 libre2-9==20220601+dfsg-1+b1 libreadline8==8.2-1.3 @@ -234,7 +233,6 @@ libsasl2-modules-db==2.1.28+dfsg-10 libsensors-config==1:3.6.0-7.1 libsensors5==1:3.6.0-7.1 libslang2==2.3.3-3 -libsmartcols1==2.38.1-5+deb12u1 libsodium23==1.0.18-1 libsqlite3-0==3.40.1-2 libssh2-1==1.10.0-3+b1 @@ -242,7 +240,7 @@ libssl-dev==3.0.11-1~deb12u2+fips libssl3==3.0.11-1~deb12u2+fips libswsscommon==1.0.0 libsysfs2==2.1.1-4 -libsystemd-shared==252.22-1~deb12u1 +libsystemd-shared==252.26-1~deb12u2 libtac2==1.4.1-1 libtcl8.6==8.6.13+dfsg-2 libtirpc-common==1.3.3+ds-1 @@ -255,7 +253,6 @@ libubsan1==12.2.0-14 libunwind8==1.6.2-3 libusb-1.0-0==2:1.0.26-1 libutempter0==1.2.1-3 -libuuid1==2.38.1-5+deb12u1 libwrap0==7.6.q-32 libxencall1==4.17.3+10-g091466ba55-1~deb12u1 libxendevicemodel1==4.17.3+10-g091466ba55-1~deb12u1 @@ -280,8 +277,8 @@ libzmq5==4.3.4-6 linux-base==4.9 linux-image-6.1.0-11-2-amd64-unsigned==6.1.38-4 linux-image-6.1.0-11-2-arm64-unsigned==6.1.38-4 -linux-libc-dev==6.1.90-1 -linux-perf==6.1.90-1 +linux-libc-dev==6.1.99-1 +linux-perf==6.1.99-1 locales==2.36-9+deb12u7 logrotate==3.21.0-1 lsof==4.95.0-1 @@ -292,15 +289,14 @@ mft==4.28.0-96 mft-fwtrace-cfg==1.0.0 mft-oem==4.28.0-96 minicom==2.8-2 -mlnx-iproute2==6.4.0-1.2310036 -mlnx-ofed-kernel-modules-6.1.0-11-2-arm64==23.10.OFED.23.10.0.3.6.1 -mlnx-ofed-kernel-utils==23.10.OFED.23.10.0.3.6.1-1 -mlnx-tools==23.10.0-1.2310036 +mlnx-iproute2==6.7.0-1.2404066 +mlnx-ofed-kernel-modules-6.1.0-11-2-arm64==24.04.OFED.24.04.0.6.6.1 +mlnx-ofed-kernel-utils==24.04.OFED.24.04.0.6.6.1-1 +mlnx-tools==24.04.0-1.2404066 mlxbf-bootctl==2.1 -mlxbf-bootimages==4.6.0-13035 +mlxbf-bootimages==4.7.0-13127 mokutil==0.6.0-2 monit==1:5.20.0-6 -mount==2.38.1-5+deb12u1 mtd-utils==1:2.1.5-1 mtr-tiny==0.95-1 ncal==12.1.8 @@ -314,12 +310,12 @@ ntpdate==1:4.2.8p15+dfsg-2~1.2.2+dfsg1-1+deb12u1 ntpsec==1.2.2+dfsg1-1+deb12u1 ntpsec-ntpdate==1.2.2+dfsg1-1+deb12u1 ntpsec-ntpdig==1.2.2+dfsg1-1+deb12u1 -ntpstat==0.0.0.1-2+b1 +ntpstat==0.0.0.1-2 nvme-cli==2.4+really2.3-3 opennsl-modules==7.1.0.0 -openssh-client==1:9.2p1-2+deb12u2+fips -openssh-server==1:9.2p1-2+deb12u2+fips -openssh-sftp-server==1:9.2p1-2+deb12u2+fips +openssh-client==1:9.2p1-2+deb12u3+fips +openssh-server==1:9.2p1-2+deb12u3+fips +openssh-sftp-server==1:9.2p1-2+deb12u3+fips openssl==3.0.11-1~deb12u2+fips pci.ids==0.0~2023.04.11-1 pciutils==1:3.9.0-4 @@ -331,7 +327,7 @@ pkgconf==1.8.1-1 procps==2:4.0.2-3 psmisc==23.6-1 python-apt-common==2.6.0 -python-is-python3==3.11.1-3 +python-is-python3==3.11.2-1+deb12u1 python3==3.11.2-1+b1 python3-apt==2.6.0 python3-cffi==1.15.1-5 @@ -355,13 +351,13 @@ python3-swsscommon==1.0.0 python3-wheel==0.38.4-2 python3-yaml==6.0-3+b2 python3-yang==1.0.73 -python3.11==3.11.2-6 -python3.11-minimal==3.11.2-6 +python3.11==3.11.2-6+deb12u2 +python3.11-minimal==3.11.2-6+deb12u2 rasdaemon==0.6.8-1 readline-common==8.2-1.3 resolvconf==1.91+nmu1 rpcsvc-proto==1.4.3-1 -rshim==2.0.19 +rshim==2.0.29 rsyslog==8.2302.0-1 runit-helper==2.15.2 sbsigntool==0.9.4-3.1 @@ -372,30 +368,29 @@ smartmontools==7.4-2~bpo12+1 sonic-db-cli==1.0.0 sonic-device-data==1.0-1 sonic-host-services-data==1.0-1 +sonic-nettools==0.0.1-0 sonic-platform-pddf==1.1 sonic-rsyslog-plugin==1.0.0-0 sonic-utilities-data==1.0-1 sqlite3==3.40.1-2 squashfs-tools==1:4.5.1-1 sudo==1.9.13p3-1+deb12u1 -sx-kernel==1.mlnx.4.6.3064 +sx-kernel==1.mlnx.4.6.4072 symcrypt-openssl==0.1 sysfsutils==2.1.1-4 sysstat==12.6.1-1 -systemd==252.22-1~deb12u1 +systemd==252.26-1~deb12u2 systemd-bootchart==234-2+b1 systemd-sonic-generator==1.0.0 -systemd-sysv==252.22-1~deb12u1 +systemd-sysv==252.26-1~deb12u2 tcpdump==4.99.3-1 tcptraceroute==1.5beta7+debian-4.1+b1 traceroute==1:2.1.2-1 -u-boot-tools==2023.01+dfsg-2 +u-boot-tools==2023.01+dfsg-2+deb12u1 ucf==3.0043+nmu1 -udev==252.22-1~deb12u1 +udev==252.26-1~deb12u2 unzip==6.0-28 usbutils==1:014-1+deb12u1 -util-linux==2.38.1-5+deb12u1 -util-linux-extra==2.38.1-5+deb12u1 uuid-runtime==2.38.1-5+deb12u1 vim==2:9.0.1378-2 vim-common==2:9.0.1378-2 diff --git a/files/build/versions/host-image/versions-deb-bookworm-arm64 b/files/build/versions/host-image/versions-deb-bookworm-arm64 index d82ad88387ea..8260d1e41f88 100644 --- a/files/build/versions/host-image/versions-deb-bookworm-arm64 +++ b/files/build/versions/host-image/versions-deb-bookworm-arm64 @@ -1,3 +1,2 @@ mrvlprestera==1.0 -ntpstat==0.0.0.1-2 tsingma-bsp==1.0 diff --git a/files/build/versions/host-image/versions-deb-bookworm-armhf b/files/build/versions/host-image/versions-deb-bookworm-armhf index 85aa015ee127..f5c751412ff6 100644 --- a/files/build/versions/host-image/versions-deb-bookworm-armhf +++ b/files/build/versions/host-image/versions-deb-bookworm-armhf @@ -1,5 +1,4 @@ binutils-arm-linux-gnueabihf==2.40-2 linux-image-6.1.0-11-2-armmp==6.1.38-4 mrvlprestera==1.0 -ntpstat==0.0.0.1-2 python3-gi==3.42.2-3+b1 diff --git a/files/build/versions/host-image/versions-py3 b/files/build/versions/host-image/versions-py3 index 34011efb42e6..aba2738717a6 100644 --- a/files/build/versions/host-image/versions-py3 +++ b/files/build/versions/host-image/versions-py3 @@ -4,7 +4,8 @@ azure-storage==0.36.0 bcrypt==3.2.2 bitarray==2.8.1 blessed==1.20.0 -certifi==2024.6.2 +blkinfo==0.2.0 +certifi==2024.8.30 cffi==1.15.1 charset-normalizer==3.3.2 click==7.0 @@ -13,20 +14,20 @@ colorful==0.5.6 cryptography==38.0.4 dbus-python==1.3.2 docker==7.1.0 -docker-image-py==0.1.12 +docker-image-py==0.1.13 enlighten==1.12.4 -filelock==3.14.0 +filelock==3.15.4 grpcio==1.51.1 grpcio-tools==1.51.1 -idna==3.7 +idna==3.8 ijson==3.2.3 ipaddr==2.2.0 ipaddress==1.0.23 j2cli==0.3.12b0 jinja2==3.1.2 -jsondiff==2.0.0 +jsondiff==2.2.1 jsonpatch==1.33 -jsonpointer==2.4 +jsonpointer==3.0.0 jsonschema==2.6.0 lazy-object-proxy==1.10.0 lxml==4.9.1 @@ -42,14 +43,14 @@ perf==0.1 pexpect==4.9.0 pip==23.0.1 ply==3.11 -prefixed==0.7.1 +prefixed==0.8.0 prettyprinter==0.18.0 -protobuf==4.25.3 -psutil==5.9.8 +protobuf==4.25.4 +psutil==6.0.0 ptyprocess==0.7.0 pyang==2.6.1 pyangbind==0.8.2 -pycairo==1.26.0 +pycairo==1.26.1 pycparser==2.21 pygments==2.18.0 pygobject==3.48.2 @@ -59,16 +60,17 @@ python-apt==2.6.0 python-dateutil==2.9.0.post0 pyyaml==6.0.1 redis==3.5.3 -regex==2024.5.15 -requests==2.32.3 +regex==2024.7.24 +requests==2.31.0 scapy==2.4.4 +scp==0.14.5 semantic-version==2.10.0 setuptools==66.1.1 six==1.16.0 systemd-python==235 tabulate==0.9.0 toposort==1.6 -urllib3==2.2.1 +urllib3==2.2.2 watchdog==0.10.3 wcwidth==0.2.13 wheel==0.38.4 diff --git a/files/build_templates/buffers_config.j2 b/files/build_templates/buffers_config.j2 index d6d89e33be0b..9787bec1bd68 100644 --- a/files/build_templates/buffers_config.j2 +++ b/files/build_templates/buffers_config.j2 @@ -113,6 +113,7 @@ def {%- set PORT_ALL = [] %} {%- set PORT_BP = [] %} +{%- set PORT_DPC = [] %} {%- set SYSTEM_PORT_ALL = [] %} {%- if voq_chassis %} @@ -135,6 +136,9 @@ def {%- for port in PORT %} {%- if not port.startswith('Ethernet-Rec') and not port.startswith('Ethernet-IB') %} {%- if PORT_ALL.append(port) %}{%- endif %} + {%- if 'role' in PORT[port] and PORT[port]['role'] == 'Dpc' %} + {%- if PORT_DPC.append(port) %}{%- endif %} + {%- endif %} {%- endif %} {%- endfor %} {%- if defs.generate_bp_port_list is defined %} @@ -153,8 +157,11 @@ def {%- for port in PORT_BP %} {%- if PORT_ACTIVE.append(port) %}{%- endif %} {%- endfor %} + {%- for port in PORT_DPC %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} {%- for port in PORT_ALL %} - {%- if port not in DEVICE_NEIGHBOR.keys() %} + {%- if port not in DEVICE_NEIGHBOR.keys() and port not in PORT_DPC %} {%- if PORT_INACTIVE.append(port) %}{%- endif %} {%- endif %} {%- endfor %} diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2 index f0208d32f1e5..7e64845c8097 100644 --- a/files/build_templates/docker_image_ctl.j2 +++ b/files/build_templates/docker_image_ctl.j2 @@ -243,6 +243,9 @@ function postStartAction() fi if [[ "$BOOT_TYPE" == "fast" ]]; then + # Flush ASIC DB. On fast-boot there should be nothing in there. + # In the older versions there has been an issue where a queued FDB event might get into ASIC_DB causing syncd crash at boot. + $SONIC_DB_CLI ASIC_DB FLUSHDB # this is the case when base OS version does not support fast-reboot with reconciliation logic (dump.rdb is absent) # In this case, we need to set the flag to indicate fast-reboot is in progress. Set the key to expire in 3 minutes $SONIC_DB_CLI STATE_DB SET "FAST_REBOOT|system" "1" "EX" "180" @@ -269,6 +272,18 @@ function postStartAction() $SONIC_DB_CLI CONFIG_DB SET "CONFIG_DB_INITIALIZED" "1" fi + # In SUP, enforce CHASSIS_APP_DB.tsa_enabled to be in sync with BGP_DEVICE_GLOBAL.STATE.tsa_enabled + if [[ -z "$DEV" ]] && [[ -f /etc/sonic/chassisdb.conf ]]; then + tsa_cfg="$($SONIC_DB_CLI CONFIG_DB HGET "BGP_DEVICE_GLOBAL|STATE" "tsa_enabled")" + if [[ -n "$tsa_cfg" ]]; then + docker exec -i ${DOCKERNAME} $SONIC_DB_CLI CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled ${tsa_cfg} + OP_CODE=$? + if [ $OP_CODE -ne 0 ]; then + echo "Err: Cmd failed (exit code $OP_CODE). CHASSIS_APP_DB and CONFIG_DB may be incosistent wrt tsa_enabled" + fi + fi + fi + # Add redis UDS to the redis group and give read/write access to the group REDIS_SOCK="/var/run/redis${DEV}/redis.sock" else @@ -331,7 +346,11 @@ start() { fi # Default rsyslog target IP for single ASIC platform +{%- if docker_container_name == "dhcp_server" %} + SYSLOG_TARGET_IP=$(docker network inspect bridge --format={{ "'{{(index .IPAM.Config 0).Gateway}}'" }}) +{%- else %} SYSLOG_TARGET_IP=127.0.0.1 +{%- endif %} if [[ ($NUM_ASIC -gt 1) ]]; then SYSLOG_TARGET_IP=$(docker network inspect bridge --format={{ "'{{(index .IPAM.Config 0).Gateway}}'" }}) fi diff --git a/files/build_templates/init_cfg.json.j2 b/files/build_templates/init_cfg.json.j2 index 7e2178184cbc..43e1710d992c 100644 --- a/files/build_templates/init_cfg.json.j2 +++ b/files/build_templates/init_cfg.json.j2 @@ -39,7 +39,7 @@ }, {%- set features = [("database", "always_enabled", false, "always_enabled"), ("lldp", "enabled", true, "enabled"), - ("pmon", "enabled", true, "enabled"), + ("pmon", "enabled", "{% if 'type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['type'] == 'SpineRouter' %}False{% else %}True{% endif %}", "enabled"), ("eventd", "enabled", false, "enabled")] %} {%- if sonic_asic_platform.startswith('ot-') %} {% do features.append(("otss", "enabled", false, "enabled")) %} @@ -76,7 +76,7 @@ {%- if include_macsec == "y" %}{% do features.append(("macsec", "{% if 'type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['type'] == 'SpineRouter' and DEVICE_RUNTIME_METADATA['MACSEC_SUPPORTED'] %}enabled{% else %}disabled{% endif %}", false, "enabled")) %}{% endif %} {%- if include_system_gnmi == "y" %}{% do features.append(("gnmi", "enabled", true, "enabled")) %}{% endif %} {%- if include_system_telemetry == "y" %}{% do features.append(("telemetry", "enabled", true, "enabled")) %}{% endif %} -{%- if include_system_eventd == "y" and BUILD_REDUCE_IMAGE_SIZE == "y" and sonic_asic_platform == "broadcom" %} +{%- if include_system_eventd == "y" and BUILD_REDUCE_IMAGE_SIZE == "y" %} {% do features.append(("eventd","disabled", false, "enabled")) %} {%- elif include_system_eventd == "y" %} {% do features.append(("eventd", "enabled", false, "enabled")) %} @@ -86,7 +86,7 @@ {%- for feature, state, delayed, autorestart in features %} "{{feature}}": { "state": "{{state}}", - "delayed" : {{delayed | lower()}}, + "delayed" : "{{delayed}}", {%- if feature in ["lldp"] %} {%- if sonic_asic_platform.startswith('ot-') %} "has_global_scope": true, diff --git a/files/build_templates/qos_config.j2 b/files/build_templates/qos_config.j2 index a85d4f1e4ee0..bf5007471a48 100644 --- a/files/build_templates/qos_config.j2 +++ b/files/build_templates/qos_config.j2 @@ -1,5 +1,6 @@ {%- set PORT_ALL = [] %} {%- set PORT_BP = [] %} +{%- set PORT_DPC = [] %} {%- set SYSTEM_PORT_ALL = [] %} {%- set voq_chassis = false %} @@ -22,6 +23,9 @@ {%- for port in PORT %} {%- if not port.startswith('Ethernet-Rec') and not port.startswith('Ethernet-IB') %} {%- if PORT_ALL.append(port) %}{% endif %} + {%- if 'role' in PORT[port] and PORT[port]['role'] == 'Dpc' %} + {%- if PORT_DPC.append(port) %}{%- endif %} + {%- endif %} {%- endif %} {%- endfor %} {%- if generate_bp_port_list is defined %} @@ -47,6 +51,9 @@ {%- for port in PORT_BP %} {%- if PORT_ACTIVE.append(port) %}{%- endif %} {%- endfor %} + {%- for port in PORT_DPC %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} {%- endif %} {%- if PORT_ACTIVE | sort_by_port_index %}{% endif %} @@ -321,8 +328,6 @@ {% else %} "tc_to_queue_map" : "AZURE", {% endif %} - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", {% if asic_type in pfc_to_pg_map_supported_asics %} {% if port in port_names_list_extra_queues %} "pfc_to_pg_map" : "AZURE_DUALTOR", @@ -330,12 +335,16 @@ "pfc_to_pg_map" : "AZURE", {% endif %} {% endif %} +{% if port not in PORT_DPC %} {% if port in port_names_list_extra_queues %} "pfc_enable" : "2,3,4,6", {% else %} "pfc_enable" : "3,4", {% endif %} - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", +{% endif %} + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }{% if not loop.last %},{% endif %} {% endfor %} @@ -426,8 +435,12 @@ {% else %} {% for port in PORT_ACTIVE %} "{{ port }}|3": { +{% if port not in PORT_DPC %} "scheduler" : "scheduler.1", "wred_profile": "AZURE_LOSSLESS" +{% else %} + "scheduler": "scheduler.0" +{% endif %} }, {% endfor %} {% if 'resource_type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['resource_type'] in apollo_resource_types %} @@ -440,8 +453,12 @@ {% else %} {% for port in PORT_ACTIVE %} "{{ port }}|4": { +{% if port not in PORT_DPC %} "scheduler" : "scheduler.1", "wred_profile": "AZURE_LOSSLESS" +{% else %} + "scheduler": "scheduler.0" +{% endif %} }, {% endfor %} {% endif %} @@ -457,7 +474,7 @@ {% endfor %} {% for port in PORT_ACTIVE %} "{{ port }}|2": { -{% if port in port_names_list_extra_queues %} +{% if port in port_names_list_extra_queues and port not in PORT_DPC %} "scheduler" : "scheduler.1", "wred_profile": "AZURE_LOSSLESS" {% else %} @@ -478,7 +495,7 @@ {% endfor %} {% for port in PORT_ACTIVE %} "{{ port }}|6": { -{% if port in port_names_list_extra_queues %} +{% if port in port_names_list_extra_queues and port not in PORT_DPC %} "scheduler" : "scheduler.1", "wred_profile": "AZURE_LOSSLESS" {% else %} diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2 index c0eff0fe3fb9..394d72af1a95 100644 --- a/files/build_templates/sonic_debian_extension.j2 +++ b/files/build_templates/sonic_debian_extension.j2 @@ -99,6 +99,11 @@ sudo mkdir -p $FILESYSTEM_ROOT_USR_SHARE_SONIC_FIRMWARE/ # Keeping it generic. It should not harm anyways. sudo mkdir -p $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM +# Install sonic-nettools +sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-nettools_*.deb || \ + sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f +sudo setcap 'cap_net_raw=+ep' $FILESYSTEM_ROOT/usr/bin/wol + # Install a patched version of ifupdown2 (and its dependencies via 'apt-get -y install -f') sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/ifupdown2_*.deb || \ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f @@ -132,6 +137,9 @@ sudo rm -rf $FILESYSTEM_ROOT/$REDIS_DUMP_LOAD_PY3_WHEEL_NAME # Install Python module for psutil sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install psutil +# Install Python module for blkinfo +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install blkinfo + # Install Python module for ipaddr sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install ipaddr @@ -354,8 +362,7 @@ sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-db-cli_*.deb || \ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f -{% if include_system_eventd == "y" %} -{% if build_reduce_image_size != "y" or sonic_asic_platform != "broadcom" %} +{% if include_system_eventd == "y" and build_reduce_image_size != "y" %} # Install sonic-rsyslog-plugin sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-rsyslog-plugin_*.deb || \ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f @@ -375,7 +382,6 @@ sudo cp $BUILD_TEMPLATES/bgpd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ j2 -f json $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $BUILD_TEMPLATES/syncd_events_info.json | sudo tee $FILESYSTEM_ROOT_ETC/rsyslog.d/syncd_events.conf sudo cp $BUILD_TEMPLATES/syncd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/ -{% endif %} {% endif %} # Install custom-built monit package and SONiC configuration files @@ -398,7 +404,7 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in sudo cp $IMAGE_CONFIGS/smartmontools/smartmontools $FILESYSTEM_ROOT/etc/default/smartmontools # Install custom-built openssh sshd -sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/openssh-server_${OPENSSH_VERSION}_*.deb $debs_path/openssh-client_${OPENSSH_VERSION}_*.deb $debs_path/openssh-sftp-server_${OPENSSH_VERSION}_*.deb +sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/openssh-server_${OPENSSH_VERSION_FULL}_*.deb $debs_path/openssh-client_${OPENSSH_VERSION_FULL}_*.deb $debs_path/openssh-sftp-server_${OPENSSH_VERSION_FULL}_*.deb {% if sonic_asic_platform == 'broadcom' %} # Install custom-built flashrom @@ -701,7 +707,7 @@ sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable midplane-network-dpu.servi # According to the issue: https://github.com/systemd/systemd/issues/19106, To disable ManageForeignRoutingPolicyRules to avoid the ip rules being deleted by systemd-networkd sudo sed -i 's/#ManageForeignRoutingPolicyRules=yes/ManageForeignRoutingPolicyRules=no/g' $FILESYSTEM_ROOT/etc/systemd/networkd.conf -sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable systemd-networkd +sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/system/systemd-networkd.service sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable systemd-networkd-wait-online.service # Copy backend-acl script and service file @@ -1007,6 +1013,7 @@ sudo LANG=C cp $SCRIPTS_DIR/asic_status.py $FILESYSTEM_ROOT/usr/local/bin/asic_s sudo LANG=C cp $SCRIPTS_DIR/startup_tsa_tsb.py $FILESYSTEM_ROOT/usr/local/bin/startup_tsa_tsb.py sudo LANG=C cp $SCRIPTS_DIR/otss.sh $FILESYSTEM_ROOT/usr/local/bin/otss.sh sudo LANG=C cp $SCRIPTS_DIR/syncd-ot.sh $FILESYSTEM_ROOT/usr/local/bin/syncd-ot.sh +sudo LANG=C cp $SCRIPTS_DIR/sonic-dpu-mgmt-traffic.sh $FILESYSTEM_ROOT/usr/local/bin/sonic-dpu-mgmt-traffic.sh # Copy sonic-netns-exec script sudo LANG=C cp $SCRIPTS_DIR/sonic-netns-exec $FILESYSTEM_ROOT/usr/bin/sonic-netns-exec @@ -1064,6 +1071,8 @@ for MLNX_CPLD_ARCHIVE in $MLNX_CPLD_ARCHIVES; do done sudo cp platform/mellanox/get_component_versions/get_component_versions.py $FILESYSTEM_ROOT/usr/bin/get_component_versions.py sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/get_component_versions.py +sudo cp platform/mellanox/cmis_host_mgmt/cmis_host_mgmt.py $FILESYSTEM_ROOT/usr/bin/cmis_host_mgmt.py +sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/cmis_host_mgmt.py j2 platform/mellanox/mlnx-fw-upgrade.j2 | sudo tee $FILESYSTEM_ROOT/usr/bin/mlnx-fw-upgrade.sh sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/mlnx-fw-upgrade.sh @@ -1079,8 +1088,15 @@ sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable nv-syncd-shared # Install required packages specific for mellanox platform sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install minicom xmlstarlet +sudo mkdir -p $FILESYSTEM_ROOT/etc/minicom/ +sudo cp platform/mellanox/minirc.dfl $FILESYSTEM_ROOT/etc/minicom/ + +# Install rshim script +sudo install -m 755 platform/mellanox/rshim/files/rshim.sh $FILESYSTEM_ROOT/usr/bin/rshim.sh -sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable rshim.service +# Install rshim services +sudo cp platform/mellanox/rshim/files/rshim@.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/ +sudo cp platform/mellanox/rshim/files/rshim-manager.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/ {% endif %} {% if sonic_asic_platform == "nvidia-bluefield" %} diff --git a/files/build_templates/systemd_regex.json b/files/build_templates/systemd_regex.json index 0ffa99156785..ccb063da6692 100644 --- a/files/build_templates/systemd_regex.json +++ b/files/build_templates/systemd_regex.json @@ -6,7 +6,7 @@ }, { "tag": "watchdog-timeout", - "regex": "(?:watchdog|Watchdog) timeout .limit.([0-9])min.", + "regex": ".*(?:watchdog|Watchdog) timeout .limit.([0-9])min.", "params": [ "limit" ] } ] diff --git a/files/dsc/install_debian.j2 b/files/dsc/install_debian.j2 index 4cb6d24631ec..def175249764 100755 --- a/files/dsc/install_debian.j2 +++ b/files/dsc/install_debian.j2 @@ -244,8 +244,8 @@ cat <> $root_mnt/$BL_CONF default main label main - kernel /$image_dir/boot/vmlinuz-6.1.0-11-2-arm64 - initrd /$image_dir/boot/initrd.img-6.1.0-11-2-arm64 + kernel /$image_dir/boot/vmlinuz-6.1.0-22-2-arm64 + initrd /$image_dir/boot/initrd.img-6.1.0-22-2-arm64 devicetree /$image_dir/boot/elba-asic-psci.dtb append softdog.soft_panic=1 FW_NAME=mainfwa root=/dev/mmcblk0p10 rw rootwait rootfstype=ext4 loopfstype=squashfs loop=/$image_dir/fs.squashfs } diff --git a/files/image_config/config-setup/config-setup b/files/image_config/config-setup/config-setup index 500d97a5ffac..85bf817f23e2 100755 --- a/files/image_config/config-setup/config-setup +++ b/files/image_config/config-setup/config-setup @@ -361,6 +361,19 @@ do_db_migration() /usr/local/bin/db_migrator.py -o migrate fi sonic-db-cli CONFIG_DB SET "CONFIG_DB_INITIALIZED" "1" + + #Enforce CHASSIS_APP_DB.tsa_enabled to be in sync with BGP_DEVICE_GLOBAL.STATE.tsa_enabled + if [[ -f /etc/sonic/chassisdb.conf ]]; then + tsa_cfg="$(sonic-db-cli CONFIG_DB HGET "BGP_DEVICE_GLOBAL|STATE" "tsa_enabled")" + sonic-db-cli CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled ${tsa_cfg} + OP_CODE=$? + + if [ $OP_CODE -ne 0 ]; then + err_msg="Cmd failed (exit code $OP_CODE). CHASSIS_APP_DB and CONFIG_DB may be incosistent wrt tsa_enabled." + echo "$err_msg" + logger -t CHASSIS_APP_DB -p user.info "$err_msg" + fi + fi } # Perform configuration migration from backup copy. diff --git a/files/image_config/interfaces/interfaces-config.sh b/files/image_config/interfaces/interfaces-config.sh index cb2faea91f31..669d12849f10 100755 --- a/files/image_config/interfaces/interfaces-config.sh +++ b/files/image_config/interfaces/interfaces-config.sh @@ -1,4 +1,5 @@ #!/bin/bash +resolvconf_updates=true function wait_networking_service_done() { local -i _WDOG_CNT="1" @@ -23,6 +24,24 @@ function wait_networking_service_done() { systemctl kill networking 2>&1 } +function resolvconf_updates_disable() { + resolvconf --updates-are-enabled + if [[ $? -ne 0 ]]; then + resolvconf_updates=false + fi + resolvconf --disable-updates +} + +function resolvconf_updates_restore() { + if [[ $resolvconf_updates == true ]]; then + resolvconf --enable-updates + fi +} + +# Do not run DNS configuration update during the shutdowning of the management interface. +# This operation is redundant as there will be an update after the start of the interface. +resolvconf_updates_disable + if [[ $(ifquery --running eth0) ]]; then wait_networking_service_done ifdown --force eth0 @@ -61,6 +80,8 @@ for intf_pid in $(ls -1 /var/run/dhclient*.Ethernet*.pid 2> /dev/null); do done /usr/bin/resolv-config.sh cleanup +# Restore DNS configuration update to the previous state. +resolvconf_updates_restore # Read sysctl conf files again sysctl -p /etc/sysctl.d/90-dhcp6-systcl.conf diff --git a/files/image_config/logrotate/rsyslog.j2 b/files/image_config/logrotate/rsyslog.j2 index 77d950eb4fd4..4c40da24d256 100644 --- a/files/image_config/logrotate/rsyslog.j2 +++ b/files/image_config/logrotate/rsyslog.j2 @@ -85,7 +85,7 @@ if [ $USED_KB -lt $THRESHOLD_KB ]; then break else - OLDEST_ARCHIVE_FILE=$(find /var/log -type f -printf '%T+ %p\n' | grep -E '.+\.[0-9]+(\.gz)?$' | sort | head -n 1 | awk '{ print $2; }') + OLDEST_ARCHIVE_FILE=$(find /var/log -type f -printf '%T+ %p\n' | grep -E '.+\.[0-9]+(\.gz)?$' | sort | awk 'NR == 1 {print $2}') if [ -z "$OLDEST_ARCHIVE_FILE" ]; then logger -p syslog.err -t "logrotate" "No archive file to delete -- potential for filling up /var/log partition!" diff --git a/files/image_config/monit/memory_checker b/files/image_config/monit/memory_checker index e5bfe4e3864e..74779ffb3abc 100755 --- a/files/image_config/monit/memory_checker +++ b/files/image_config/monit/memory_checker @@ -20,6 +20,7 @@ check program container_memory_ with path "/usr/bin/memory_check """ import argparse +import os import subprocess import sys import syslog @@ -33,6 +34,29 @@ from swsscommon import swsscommon EVENTS_PUBLISHER_SOURCE = "sonic-events-host" EVENTS_PUBLISHER_TAG = "mem-threshold-exceeded" +CGROUP_DOCKER_MEMORY_DIR = "/sys/fs/cgroup/memory/docker/" + +# Define common error codes +ERROR_CONTAINER_ID_NOT_FOUND = "[memory_checker] Failed to get container ID of '{}'! Exiting ..." +ERROR_CGROUP_MEMORY_USAGE_NOT_FOUND = "[memory_checker] cgroup memory usage file '{}' of container '{}' does not exist on device! Exiting ..." +ERROR_CONTAINER_MEMORY_USAGE_NOT_FOUND = "[memory_checker] Failed to get the memory usage of container '{}'! Exiting ..." +ERROR_CONTAINER_CACHE_USAGE_NOT_FOUND = "[memory_checker] Failed to get the cache usage of container '{}'! Exiting ..." +ERROR_CGROUP_MEMORY_STATS_NOT_FOUND = "[memory_checker] cgroup memory statistics file '{}' of container '{}' does not exist on device! Exiting ..." +ERROR_CGROUP_MEMORY_STATS_LINE_FORMAT = "[memory_checker] cgroup memory statistics file '{}' of container '{}' has invalid line format! Exiting ..." + +# Define common exit codes +CONTAINER_NOT_RUNNING = 0 +INTERNAL_ERROR = 1 +INVALID_VALUE = 2 +EXCEED_THRESHOLD = 3 + +def validate_container_id(container_id): + pattern = r'^[a-zA-Z0-9]+$' + + if not re.match(pattern, container_id): + syslog.syslog(syslog.LOG_ERR, "Invalid container_id: {}".format(container_id)) + sys.exit(INTERNAL_ERROR) + def get_command_result(command): """Executes the command and return the resulting output. @@ -50,15 +74,99 @@ def get_command_result(command): command_stdout, command_stderr = proc_instance.communicate() if proc_instance.returncode != 0: syslog.syslog(syslog.LOG_ERR, "[memory_checker] Failed to execute the command '{}'. Return code: '{}'" - .format(command, proc_instance.returncode)) - sys.exit(1) + .format(' '.join(command), proc_instance.returncode)) + sys.exit(INTERNAL_ERROR) except (OSError, ValueError) as err: syslog.syslog(syslog.LOG_ERR, "[memory_checker] Failed to execute the command '{}'. Error: '{}'" - .format(command, err)) - sys.exit(2) + .format(' '.join(command), err)) + sys.exit(INTERNAL_ERROR) return command_stdout.strip() +def get_container_id(container_name): + """Gets full container ID of the specified container + Args: + container_name: A string indicates the name of specified container. + Returns: + container_id: A string indicates the full ID of specified container. + """ + container_id = "" + + get_container_info_cmd = ["docker", "ps", "--no-trunc", "--filter", "name={}".format(container_name)] + + command_stdout = get_command_result(get_container_info_cmd) + + for line in command_stdout.splitlines(): + if container_name in line: + container_id = line.split()[0].strip() + break + + if not container_id: + syslog.syslog(syslog.LOG_ERR, ERROR_CONTAINER_ID_NOT_FOUND.format(container_name)) + + sys.exit(INTERNAL_ERROR) + + return container_id + +def get_memory_usage(container_id): + """Reads the container's memory usage from the control group subsystem's file + '/sys/fs/cgroup/memory/docker//memory.usage_in_bytes'. + Args: + container_id: A string indicates the full ID of a container. + Returns: + memory_usage_in_bytes: A string indicates memory usage (Bytes) of a container. + """ + memory_usage_in_bytes = "" + + validate_container_id(container_id) + + docker_memory_usage_file_path = CGROUP_DOCKER_MEMORY_DIR + container_id + "/memory.usage_in_bytes" + if not os.path.exists(docker_memory_usage_file_path): + syslog.syslog(syslog.LOG_ERR, ERROR_CGROUP_MEMORY_USAGE_NOT_FOUND.format(docker_memory_usage_file_path, container_id)) + sys.exit(INTERNAL_ERROR) + + try: + with open(docker_memory_usage_file_path, 'r') as file: + memory_usage_in_bytes = file.read().strip() + except IOError as err: + syslog.syslog(syslog.LOG_ERR, ERROR_CONTAINER_MEMORY_USAGE_NOT_FOUND.format(container_id)) + sys.exit(INTERNAL_ERROR) + + return memory_usage_in_bytes + +def get_inactive_cache_usage(container_id): + """Reads the container's cache usage from the field 'total_inactive_file' in control + group subsystem's file '/sys/fs/cgroup/memory/docker//memory.stat'. + Args: + container_id: A string indicates the full ID of a container. + Returns: + cache_usage_in_bytes: A string indicates the cache usage (Bytes) of a container. + """ + cache_usage_in_bytes = "" + + validate_container_id(container_id) + + docker_memory_stat_file_path = CGROUP_DOCKER_MEMORY_DIR + container_id + "/memory.stat" + if not os.path.exists(docker_memory_stat_file_path): + syslog.syslog(syslog.LOG_ERR, ERROR_CGROUP_MEMORY_STATS_NOT_FOUND.format(docker_memory_stat_file_path, container_id)) + sys.exit(INTERNAL_ERROR) + + try: + with open(docker_memory_stat_file_path, 'r') as file: + for line in file: + if "total_inactive_file" in line: + split_line = line.split() + if len(split_line) >= 2: + cache_usage_in_bytes = split_line[1].strip() + else: + syslog.syslog(syslog.LOG_ERR, ERROR_CGROUP_MEMORY_STATS_LINE_FORMAT.format(docker_memory_stat_file_path, container_id)) + sys.exit(INTERNAL_ERROR) + break + except IOError as err: + syslog.syslog(syslog.LOG_ERR, ERROR_CONTAINER_CACHE_USAGE_NOT_FOUND.format(container_id)) + sys.exit(INTERNAL_ERROR) + + return cache_usage_in_bytes def publish_events(container_name, mem_usage_bytes, threshold_value): events_handle = swsscommon.events_init_publisher(EVENTS_PUBLISHER_SOURCE) @@ -71,8 +179,8 @@ def publish_events(container_name, mem_usage_bytes, threshold_value): def check_memory_usage(container_name, threshold_value): - """Checks the memory usage of a container and writes an alerting messages into - the syslog if the memory usage is larger than the threshold value. + """Checks the memory usage of a container from its cgroup subsystem and writes an alerting + messages into the syslog if the memory usage is larger than the threshold value. Args: container_name: A string represtents name of a container @@ -81,37 +189,37 @@ def check_memory_usage(container_name, threshold_value): Returns: None. """ - command = ["docker", "stats", "--no-stream", "--format", "{{.MemUsage}}", container_name] - command_stdout = get_command_result(command) - mem_usage = command_stdout.split("/")[0].strip() - match_obj = re.match(r"\d+\.?\d*", mem_usage) - if match_obj: - mem_usage_value = float(mem_usage[match_obj.start():match_obj.end()]) - mem_usage_unit = mem_usage[match_obj.end():] - - mem_usage_bytes = 0.0 - if mem_usage_unit == "B": - mem_usage_bytes = mem_usage_value - elif mem_usage_unit == "KiB": - mem_usage_bytes = mem_usage_value * 1024 - elif mem_usage_unit == "MiB": - mem_usage_bytes = mem_usage_value * 1024 ** 2 - elif mem_usage_unit == "GiB": - mem_usage_bytes = mem_usage_value * 1024 ** 3 - - if mem_usage_bytes > threshold_value: - print("[{}]: Memory usage ({} Bytes) is larger than the threshold ({} Bytes)!" - .format(container_name, mem_usage_bytes, threshold_value)) - syslog.syslog(syslog.LOG_INFO, "[{}]: Memory usage ({} Bytes) is larger than the threshold ({} Bytes)!" - .format(container_name, mem_usage_bytes, threshold_value)) - # publish event - publish_events(container_name, "{:.2f}".format(mem_usage_bytes), str(threshold_value)) - sys.exit(3) - else: - syslog.syslog(syslog.LOG_ERR, "[memory_checker] Failed to retrieve memory value from '{}'" - .format(mem_usage)) - sys.exit(4) + if not isinstance(threshold_value, int) or threshold_value <= 0: + syslog.syslog(syslog.LOG_ERR, "[memory_checker] Invalid threshold value! Threshold value should be a positive integer.") + sys.exit(INVALID_VALUE) + + container_id = get_container_id(container_name) + syslog.syslog(syslog.LOG_INFO, "[memory_checker] Container ID of '{}' is: '{}'." + .format(container_name, container_id)) + + memory_usage_in_bytes = get_memory_usage(container_id) + syslog.syslog(syslog.LOG_INFO, "[memory_checker] The memory usage of container '{}' is '{}' Bytes!" + .format(container_name, memory_usage_in_bytes)) + + cache_usage_in_bytes = get_inactive_cache_usage(container_id) + syslog.syslog(syslog.LOG_INFO, "[memory_checker] The cache usage of container '{}' is '{}' Bytes!" + .format(container_name, cache_usage_in_bytes)) + + try: + memory_usage = int(memory_usage_in_bytes) + cache_usage = int(cache_usage_in_bytes) + except ValueError as err: + syslog.syslog(syslog.LOG_ERR, "[memory_checker] Failed to convert the memory or cache usage in string to integer! Exiting ...") + sys.exit(INVALID_VALUE) + + total_memory_usage = memory_usage - cache_usage + syslog.syslog(syslog.LOG_INFO, "[memory_checker] Total memory usage of container '{}' is '{}' Bytes!" + .format(container_name, total_memory_usage)) + if total_memory_usage > threshold_value: + print("[{}]: Memory usage ({} Bytes) is larger than the threshold ({} Bytes)!" + .format(container_name, total_memory_usage, threshold_value)) + sys.exit(EXCEED_THRESHOLD) def is_service_active(service_name): """Test if service is running. @@ -148,7 +256,7 @@ def get_running_container_names(): syslog.syslog(syslog.LOG_ERR, "Failed to retrieve the running container list from docker daemon! Error message is: '{}'" .format(err)) - sys.exit(5) + sys.exit(INTERNAL_ERROR) return running_container_names @@ -167,7 +275,7 @@ def main(): syslog.syslog(syslog.LOG_INFO, "[memory_checker] Exits without checking memory usage of container '{}' since docker daemon is not running!" .format(args.container_name)) - sys.exit(0) + sys.exit(CONTAINER_NOT_RUNNING) running_container_names = get_running_container_names() if args.container_name in running_container_names: diff --git a/files/image_config/monit/tests/__init__.py b/files/image_config/monit/tests/__init__.py new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/files/image_config/monit/tests/test_memory_checker.py b/files/image_config/monit/tests/test_memory_checker.py new file mode 100644 index 000000000000..d856fa33523d --- /dev/null +++ b/files/image_config/monit/tests/test_memory_checker.py @@ -0,0 +1,81 @@ +import unittest +from unittest.mock import patch, MagicMock +import sys +import subprocess + +import memory_checker + + +class TestMemoryChecker(unittest.TestCase): + + @patch('subprocess.Popen') + def test_get_command_result(self, mock_popen): + command = 'your command' + stdout = 'Command output' + returncode = 0 + mock_popen.return_value.communicate.return_value = (stdout, None) + mock_popen.return_value.returncode = returncode + + result = memory_checker.get_command_result(command) + + self.assertEqual(result, stdout.strip()) + mock_popen.assert_called_once_with(command, stdout=subprocess.PIPE, stderr=subprocess.PIPE, + universal_newlines=True) + mock_popen.return_value.communicate.assert_called_once() + mock_popen.return_value.communicate.assert_called_with() + self.assertEqual(mock_popen.return_value.returncode, returncode) + + @patch('memory_checker.get_command_result') + def test_get_container_id(self, mock_get_command_result): + container_name = 'your_container' + command = ['docker', 'ps', '--no-trunc', '--filter', 'name=your_container'] + mock_get_command_result.return_value = '' + + with self.assertRaises(SystemExit) as cm: + memory_checker.get_container_id(container_name) + self.assertEqual(cm.exception.code, 1) + mock_get_command_result.assert_called_once_with(command) + + @patch('memory_checker.open', side_effect=FileNotFoundError) + def test_get_memory_usage(self, mock_open): + container_id = 'your_container_id' + with self.assertRaises(SystemExit) as cm: + memory_checker.get_memory_usage(container_id) + self.assertEqual(cm.exception.code, 1) + + @patch('memory_checker.open', side_effect=FileNotFoundError) + def test_get_memory_usage_invalid(self, mock_open): + container_id = '../..' + with self.assertRaises(SystemExit) as cm: + memory_checker.get_memory_usage(container_id) + self.assertEqual(cm.exception.code, 1) + + @patch('builtins.open', side_effect=FileNotFoundError) + def test_get_inactive_cache_usage(self, mock_open): + container_id = 'your_container_id' + with self.assertRaises(SystemExit) as cm: + memory_checker.get_inactive_cache_usage(container_id) + self.assertEqual(cm.exception.code, 1) + + @patch('syslog.syslog') + @patch('memory_checker.get_container_id') + @patch('memory_checker.get_memory_usage') + @patch('memory_checker.get_inactive_cache_usage') + def test_check_memory_usage(self, mock_get_inactive_cache_usage, mock_get_memory_usage, mock_get_container_id, mock_syslog): + container_name = 'your_container' + threshold_value = 1024 + container_id = 'your_container' + memory_usage = 2048 + cache_usage = 512 + mock_get_container_id.return_value = container_id + mock_get_memory_usage.return_value = str(memory_usage) + mock_get_inactive_cache_usage.return_value = str(cache_usage) + + with self.assertRaises(SystemExit) as cm: + memory_checker.check_memory_usage(container_name, threshold_value) + + self.assertEqual(cm.exception.code, 3) + mock_get_memory_usage.assert_called_once_with(container_name) + +if __name__ == '__main__': + unittest.main() diff --git a/files/image_config/ntp/ntp.conf.j2 b/files/image_config/ntp/ntp.conf.j2 index e50822a67a9d..a3b0f0909728 100644 --- a/files/image_config/ntp/ntp.conf.j2 +++ b/files/image_config/ntp/ntp.conf.j2 @@ -18,6 +18,7 @@ leapfile /usr/share/zoneinfo/leap-seconds.list {# Adding NTP servers. We need to know if we have some pools, to set proper config -#} {% set ns = namespace(is_pools=false) %} +{% set ip_ver_ns = namespace(ipv4_server=false, ipv6_server=false) %} {% for server in NTP_SERVER if NTP_SERVER[server].admin_state != 'disabled' -%} {% set config = NTP_SERVER[server] -%} {# Server options -#} @@ -56,6 +57,13 @@ config -#} restrict {{ resolve_as }} kod limited nomodify noquery {% endif %} +{% if resolve_as | ipv4 -%} + {% set ip_ver_ns.ipv4_server = true %} +{% elif resolve_as | ipv6 %} + {% set ip_ver_ns.ipv6_server = true %} +{% endif -%} + + {% endfor -%} {% set trusted_keys_arr = [] -%} @@ -102,7 +110,7 @@ interface ignore wildcard {%- set ns.source_intf = global.src_intf %} {%- if ns.source_intf != "" %} {%- if ns.source_intf == "eth0" %} - {%- set ns.source_intf_ip = 'true' %} + {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, MGMT_INTERFACE) %} {%- elif ns.source_intf.startswith('Vlan') %} {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, VLAN_INTERFACE) %} {%- elif ns.source_intf.startswith('Ethernet') %} @@ -125,9 +133,11 @@ interface listen {{ mgmt_prefix | ip }} {% endfor %} {% elif LOOPBACK_INTERFACE %} {% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %} -{% if prefix | ipv4 and name == 'Loopback0' %} +{% if name == 'Loopback0' %} +{% if prefix | ipv4 and ip_ver_ns.ipv4_server or prefix | ipv6 and ip_ver_ns.ipv6_server %} interface listen {{ prefix | ip }} {% endif %} +{% endif %} {% endfor %} {% else %} interface listen eth0 diff --git a/files/image_config/resolv-config/update-containers b/files/image_config/resolv-config/update-containers index 47d8328a80fe..891fd2ea7462 100755 --- a/files/image_config/resolv-config/update-containers +++ b/files/image_config/resolv-config/update-containers @@ -1,6 +1,11 @@ #!/bin/bash -for container in $(docker ps -a --format=" {{ .ID }}"); do +networking_status=$(systemctl is-active networking.service 2>/dev/null) +if [[ $networking_status != "active" ]]; then + exit 0 +fi + +for container in $(docker ps -q); do docker cp -L /etc/resolv.conf ${container}:/_resolv.conf docker exec -t ${container} bash -c "cat /_resolv.conf > /etc/resolv.conf" docker exec -t ${container} bash -c "rm /_resolv.conf" diff --git a/files/image_config/rsyslog/rsyslog-config.sh b/files/image_config/rsyslog/rsyslog-config.sh index 576351711364..5f28708216ed 100755 --- a/files/image_config/rsyslog/rsyslog-config.sh +++ b/files/image_config/rsyslog/rsyslog-config.sh @@ -17,10 +17,16 @@ if [[ ($NUM_ASIC -gt 1) ]]; then else udp_server_ip=$(ip -j -4 addr list lo scope host | jq -r -M '.[0].addr_info[0].local') fi + +contain_dhcp_server=$(sonic-db-cli CONFIG_DB keys "FEATURE|dhcp_server") +if [ $contain_dhcp_server ]; then + docker0_ip=$(ip -o -4 addr list docker0 | awk '{print $4}' | cut -d/ -f1) +fi + hostname=$(hostname) sonic-cfggen -d -t /usr/share/sonic/templates/rsyslog.conf.j2 \ - -a "{\"udp_server_ip\": \"$udp_server_ip\", \"hostname\": \"$hostname\"}" \ + -a "{\"udp_server_ip\": \"$udp_server_ip\", \"hostname\": \"$hostname\", \"docker0_ip\": \"$docker0_ip\"}" \ > /etc/rsyslog.conf systemctl restart rsyslog diff --git a/files/image_config/rsyslog/rsyslog.conf.j2 b/files/image_config/rsyslog/rsyslog.conf.j2 index dc88fc8863a1..b68ba2e77e5b 100644 --- a/files/image_config/rsyslog/rsyslog.conf.j2 +++ b/files/image_config/rsyslog/rsyslog.conf.j2 @@ -33,6 +33,10 @@ $ModLoad imklog # provides kernel logging support $ModLoad imudp $UDPServerAddress {{udp_server_ip}} #bind to localhost before udp server run $UDPServerRun 514 +{% if docker0_ip and docker0_ip != "" %} +$UDPServerAddress {{docker0_ip}} +$UDPServerRun 514 +{% endif%} # provides TCP syslog reception #$ModLoad imtcp diff --git a/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2 b/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2 index 66eb1346362c..a5b4689741dc 100644 --- a/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2 +++ b/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2 @@ -5,31 +5,34 @@ template(name="prog_msg" type="list") { constant(value="\n") } -{% if include_system_eventd == "y" %} -{% if build_reduce_image_size != "y" or sonic_asic_platform != "broadcom" %} +{% if include_system_eventd == "y" and build_reduce_image_size != "y" %} $ModLoad omprog +{% endif %} + if re_match($programname, "bgp[0-9]*#(frr|zebra|staticd|watchfrr)") then { /var/log/frr/zebra.log + {% if include_system_eventd == "y" and build_reduce_image_size != "y" %} action(type="omprog" binary="/usr/bin/rsyslog_plugin -r /etc/rsyslog.d/zebra_regex.json -m sonic-events-bgp" output="/var/log/rsyslog_plugin.log" template="prog_msg") + {% endif %} stop } if re_match($programname, "bgp[0-9]*#bgpd") then { /var/log/frr/bgpd.log + {% if include_system_eventd == "y" and build_reduce_image_size != "y" %} action(type="omprog" binary="/usr/bin/rsyslog_plugin -r /etc/rsyslog.d/bgpd_regex.json -m sonic-events-bgp" output="/var/log/rsyslog_plugin.log" template="prog_msg") + {% endif %} stop } -{% endif %} -{% endif %} ## Teamd rules diff --git a/files/image_config/sudoers/sudoers b/files/image_config/sudoers/sudoers index ad50f0f0b0df..bc0755dd2ce9 100644 --- a/files/image_config/sudoers/sudoers +++ b/files/image_config/sudoers/sudoers @@ -43,8 +43,7 @@ Cmnd_Alias READ_ONLY_CMDS = /bin/cat /var/log/syslog, /bin/cat /var/log/sys /usr/local/bin/pcieutil *, \ /usr/local/bin/psuutil *, \ /usr/local/bin/sonic-installer list, \ - /usr/local/bin/sfputil show *, \ - /usr/local/bin/storyteller * + /usr/local/bin/sfputil show * Cmnd_Alias PASSWD_CMDS = /usr/local/bin/config tacacs passkey *, \ diff --git a/files/scripts/service_mgmt.sh b/files/scripts/service_mgmt.sh index 6a038c0a35ce..8229fd8ece26 100755 --- a/files/scripts/service_mgmt.sh +++ b/files/scripts/service_mgmt.sh @@ -87,7 +87,7 @@ DEV=$2 SCRIPT_NAME=$(basename -- "$0") SERVICE="${SCRIPT_NAME%.*}" NAMESPACE_PREFIX="asic" -if [ "$DEV" ]; then +if [[ "$DEV" && "$DEV" != *"dpu"* ]]; then NET_NS="$NAMESPACE_PREFIX$DEV" #name of the network namespace SONIC_DB_CLI="sonic-db-cli -n $NET_NS" else diff --git a/files/scripts/sonic-dpu-mgmt-traffic.sh b/files/scripts/sonic-dpu-mgmt-traffic.sh new file mode 100755 index 000000000000..71e6ed29b32b --- /dev/null +++ b/files/scripts/sonic-dpu-mgmt-traffic.sh @@ -0,0 +1,85 @@ +#!/bin/bash +#Script to control the DPU management traffic forwarding through the SmartSwitch + +command_name=$0 + +usage(){ + echo "Syntax: $command_name -e|--enable -d|--disable" + echo "Arguments:" + echo "-e Enable dpu management traffic forwarding" + echo "-d Disable dpu management traffic forwarding" +} + +add_rem_valid_iptable(){ + local op=$1 + local table=$2 + local chain=$3 + shift 3 + local rule="$@" + iptables -t $table -C $chain $rule &>/dev/null + local exit_status=$? + local exec_cond=0 + if [ "$op" = "enable" ]; then + exec_command="iptables -t $table -A $chain $rule" + [ "$exit_status" -eq 0 ] || exec_cond=1 # Execute if rule is currently not present + else + exec_command="iptables -t $table -D $chain $rule" + [ "$exit_status" -ne 0 ] || exec_cond=1 # Execute if rule is currently present + fi + if [ "$exec_cond" -eq 1 ]; then + eval "$exec_command" + else + echo "$exec_command not requried, will not be executed" + fi +} + +control_forwarding(){ + local op=$1 + local value=0 + if [ "$op" = "enable" ]; then + value=1 + fi + echo $value > /proc/sys/net/ipv4/ip_forward + echo $value > /proc/sys/net/ipv4/conf/eth0/forwarding +} + +ctrl_dpu_forwarding(){ + local op=$1 + control_forwarding $op + add_rem_valid_iptable $op nat POSTROUTING -o ${mgmt_iface} -j MASQUERADE + add_rem_valid_iptable $op filter FORWARD -i ${mgmt_iface} -o ${midplane_iface} -m conntrack --ctstate RELATED,ESTABLISHED -j ACCEPT + add_rem_valid_iptable $op filter FORWARD -i ${midplane_iface} -o ${mgmt_iface} -j ACCEPT + if [ "$op" = "enable" ]; then + echo "Enabled DPU management traffic Forwarding" + else + echo "Disabled DPU management traffic Forwarding" + fi +} + +mgmt_iface=eth0 +midplane_iface=bridge-midplane + +if [ "$EUID" -ne 0 ] + then + echo "Permission denied: Please run the script with elevated privileges using sudo" + exit 1 +fi + +if ! ifconfig "$midplane_iface" > /dev/null 2>&1; then + echo "$midplane_iface doesn't exist! Please run on smart switch system" + exit 1 +fi + +case $1 in + -e|--enable) + ctrl_dpu_forwarding enable + ;; + -d|--disable) + ctrl_dpu_forwarding disable + ;; + *) + echo "Incorrect Usage!" + usage + exit 1 + ;; +esac diff --git a/files/scripts/swss.sh b/files/scripts/swss.sh index cb51c0bb0021..e00cc752ea04 100755 --- a/files/scripts/swss.sh +++ b/files/scripts/swss.sh @@ -242,6 +242,17 @@ function clean_up_chassis_db_tables() } +is_feature_enabled() +{ + s=$1 + service=${s%@*} + state=$(sonic-db-cli CONFIG_DB hget "FEATURE|${service}" "state") + if [[ $state == "enabled" ]]; then + echo "true" + else + echo "false" + fi +} start_peer_and_dependent_services() { check_warm_boot @@ -254,7 +265,14 @@ start_peer_and_dependent_services() { fi done for dep in ${DEPENDENT}; do - /bin/systemctl start ${dep} + if [[ $dep == "dhcp_relay" ]]; then + state=$(is_feature_enabled $dep) + if [[ $state == "true" ]]; then + /bin/systemctl start ${dep} + fi + else + /bin/systemctl start ${dep} + fi done for dep in ${MULTI_INST_DEPENDENT}; do if [[ ! -z $DEV ]]; then diff --git a/installer/default_platform.conf b/installer/default_platform.conf index 85882f001c3a..85aeddb0e1d2 100755 --- a/installer/default_platform.conf +++ b/installer/default_platform.conf @@ -588,13 +588,13 @@ menuentry '$demo_grub_entry' { if [ x$grub_platform = xxen ]; then insmod xzio; insmod lzopio; fi insmod part_msdos insmod ext2 - $GRUB_CFG_LINUX_CMD /$image_dir/boot/vmlinuz-6.1.0-11-2-${arch} root=$grub_cfg_root rw $GRUB_CMDLINE_LINUX \ + $GRUB_CFG_LINUX_CMD /$image_dir/boot/vmlinuz-6.1.0-22-2-${arch} root=$grub_cfg_root rw $GRUB_CMDLINE_LINUX \ net.ifnames=0 biosdevname=0 \ loop=$image_dir/$FILESYSTEM_SQUASHFS loopfstype=squashfs \ systemd.unified_cgroup_hierarchy=0 \ apparmor=1 security=apparmor varlog_size=$VAR_LOG_SIZE usbcore.autosuspend=-1 $ONIE_PLATFORM_EXTRA_CMDLINE_LINUX echo 'Loading $demo_volume_label $demo_type initial ramdisk ...' - $GRUB_CFG_INITRD_CMD /$image_dir/boot/initrd.img-6.1.0-11-2-${arch} + $GRUB_CFG_INITRD_CMD /$image_dir/boot/initrd.img-6.1.0-22-2-${arch} } EOF diff --git a/onie-image-arm64.conf b/onie-image-arm64.conf index b8a199c70bea..28f83855d77c 100644 --- a/onie-image-arm64.conf +++ b/onie-image-arm64.conf @@ -53,3 +53,6 @@ ABOOT_BOOT_IMAGE=.sonic-boot.swi ## Output file name for dsc installer OUTPUT_DSC_IMAGE=target/sonic-$TARGET_MACHINE.tar + +## Output file name for bfb image +OUTPUT_BFB_IMAGE=target/sonic-$TARGET_MACHINE.bfb diff --git a/platform/barefoot/bfn-modules/debian/control b/platform/barefoot/bfn-modules/debian/control index c6fd3ef472a3..1d7a74bde597 100644 --- a/platform/barefoot/bfn-modules/debian/control +++ b/platform/barefoot/bfn-modules/debian/control @@ -7,6 +7,6 @@ Standards-Version: 3.9.3 Package: bfn-modules Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for bfn asic for mmap diff --git a/platform/barefoot/sonic-platform-modules-arista b/platform/barefoot/sonic-platform-modules-arista index af03fbd9f672..522eb5cca9de 160000 --- a/platform/barefoot/sonic-platform-modules-arista +++ b/platform/barefoot/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit af03fbd9f67260ba764c833aaaa65b2ff07762d7 +Subproject commit 522eb5cca9de7ddd6b96c5a361913855ad5d8e34 diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control index 9aaded6c69de..eff91a7fa334 100644 --- a/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control +++ b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control @@ -7,6 +7,6 @@ Standards-Version: 3.9.3 Package: sonic-platform-modules-bfn-montara Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control index 53866745049b..0bcc98273d6d 100644 --- a/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control +++ b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control @@ -7,11 +7,11 @@ Standards-Version: 3.9.3 Package: sonic-platform-modules-bfn-newport-as9516 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel module for bfn platform fpga and scripts for the devices such as fan, led, sfp Package: sonic-platform-modules-bfn-newport-as9516bf Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel module for bfn platform fpga and scripts for the devices such as fan, led, sfp diff --git a/platform/barefoot/sonic-platform-modules-bfn/debian/control b/platform/barefoot/sonic-platform-modules-bfn/debian/control index 923b096d4908..78a556eead0e 100644 --- a/platform/barefoot/sonic-platform-modules-bfn/debian/control +++ b/platform/barefoot/sonic-platform-modules-bfn/debian/control @@ -7,6 +7,6 @@ Standards-Version: 3.9.3 Package: sonic-platform-modules-bfn Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control index 415d82c5c811..7e60b796ce20 100644 --- a/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control +++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control @@ -7,6 +7,6 @@ Standards-Version: 3.9.3 Package: platform-modules-wnc-osw1800 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk index 4e86423bd7e8..0b93b3b2b165 100755 --- a/platform/broadcom/one-image.mk +++ b/platform/broadcom/one-image.mk @@ -85,11 +85,13 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(NOKIA_IXR7220H5_64D_PLATFORM_MODULE) \ $(TENCENT_TCS8400_PLATFORM_MODULE) \ $(TENCENT_TCS9400_PLATFORM_MODULE) \ - $(UFISPACE_S9300_32D_PLATFORM_MODULE) \ - $(UFISPACE_S9110_32X_PLATFORM_MODULE) \ - $(UFISPACE_S8901_54XC_PLATFORM_MODULE) \ - $(UFISPACE_S7801_54XS_PLATFORM_MODULE) \ $(UFISPACE_S6301_56ST_PLATFORM_MODULE) \ + $(UFISPACE_S7801_54XS_PLATFORM_MODULE) \ + $(UFISPACE_S8901_54XC_PLATFORM_MODULE) \ + $(UFISPACE_S9110_32X_PLATFORM_MODULE) \ + $(UFISPACE_S9300_32D_PLATFORM_MODULE) \ + $(UFISPACE_S9301_32D_PLATFORM_MODULE) \ + $(UFISPACE_S9301_32DB_PLATFORM_MODULE) \ $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL) diff --git a/platform/broadcom/platform-modules-ufispace.dep b/platform/broadcom/platform-modules-ufispace.dep new file mode 100644 index 000000000000..a6609b3c6f2b --- /dev/null +++ b/platform/broadcom/platform-modules-ufispace.dep @@ -0,0 +1,10 @@ + +MPATH := $($(UFISPACE_S9300_32D_PLATFORM_MODULE)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) platform/broadcom/platform-modules-ufispace.mk platform/broadcom/platform-modules-ufispace.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files $(MPATH)) + +$(UFISPACE_S9300_32D_PLATFORM_MODULE)_CACHE_MODE := GIT_CONTENT_SHA +$(UFISPACE_S9300_32D_PLATFORM_MODULE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(UFISPACE_S9300_32D_PLATFORM_MODULE)_DEP_FILES := $(DEP_FILES) + diff --git a/platform/broadcom/platform-modules-ufispace.mk b/platform/broadcom/platform-modules-ufispace.mk index 2c202cbbaa0c..18bba6f50883 100644 --- a/platform/broadcom/platform-modules-ufispace.mk +++ b/platform/broadcom/platform-modules-ufispace.mk @@ -1,12 +1,16 @@ # UfiSpace Platform modules UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION = 1.0.0 +UFISPACE_S9301_32D_PLATFORM_MODULE_VERSION = 1.0.0 +UFISPACE_S9301_32DB_PLATFORM_MODULE_VERSION = 1.0.0 UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION = 1.0.0 UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION = 1.0.0 UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION = 1.0.0 UFISPACE_S6301_56ST_PLATFORM_MODULE_VERSION = 1.0.0 export UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION +export UFISPACE_S9301_32D_PLATFORM_MODULE_VERSION +export UFISPACE_S9301_32DB_PLATFORM_MODULE_VERSION export UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION export UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION export UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION @@ -18,6 +22,14 @@ $(UFISPACE_S9300_32D_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADER $(UFISPACE_S9300_32D_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9300_32d-r0 SONIC_DPKG_DEBS += $(UFISPACE_S9300_32D_PLATFORM_MODULE) +UFISPACE_S9301_32D_PLATFORM_MODULE = sonic-platform-ufispace-s9301-32d_$(UFISPACE_S9301_32D_PLATFORM_MODULE_VERSION)_amd64.deb +$(UFISPACE_S9301_32D_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9301_32d-r0 +$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S9301_32D_PLATFORM_MODULE))) + +UFISPACE_S9301_32DB_PLATFORM_MODULE = sonic-platform-ufispace-s9301-32db_$(UFISPACE_S9301_32DB_PLATFORM_MODULE_VERSION)_amd64.deb +$(UFISPACE_S9301_32DB_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9301_32db-r0 +$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S9301_32DB_PLATFORM_MODULE))) + UFISPACE_S9110_32X_PLATFORM_MODULE = sonic-platform-ufispace-s9110-32x_$(UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION)_amd64.deb $(UFISPACE_S9110_32X_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9110_32x-r0 $(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S9110_32X_PLATFORM_MODULE))) diff --git a/platform/broadcom/rules.dep b/platform/broadcom/rules.dep index 51cca1baacce..fbdbb865e4d6 100644 --- a/platform/broadcom/rules.dep +++ b/platform/broadcom/rules.dep @@ -20,6 +20,7 @@ include $(PLATFORM_PATH)/platform-modules-quanta.dep #include $(PLATFORM_PATH)/platform-modules-ragile.dep include $(PLATFORM_PATH)/platform-modules-ruijie.dep include $(PLATFORM_PATH)/platform-modules-brcm-xlr-gts.dep +include $(PLATFORM_PATH)/platform-modules-ufispace.dep include $(PLATFORM_PATH)/platform-modules-micas.dep include $(PLATFORM_PATH)/docker-syncd-brcm.dep include $(PLATFORM_PATH)/docker-syncd-brcm-rpc.dep diff --git a/platform/broadcom/rules.mk b/platform/broadcom/rules.mk index 3349e6717074..4070f7be06ae 100755 --- a/platform/broadcom/rules.mk +++ b/platform/broadcom/rules.mk @@ -4,7 +4,6 @@ include $(PLATFORM_PATH)/sai.mk # * Nokia # * Juniper # * Ragile -# * Ufispace include $(PLATFORM_PATH)/platform-modules-nokia.mk include $(PLATFORM_PATH)/platform-modules-dell.mk include $(PLATFORM_PATH)/platform-modules-arista.mk @@ -21,7 +20,7 @@ include $(PLATFORM_PATH)/platform-modules-quanta.mk #include $(PLATFORM_PATH)/platform-modules-ruijie.mk #include $(PLATFORM_PATH)/platform-modules-ragile.mk #include $(PLATFORM_PATH)/platform-modules-tencent.mk -#include $(PLATFORM_PATH)/platform-modules-ufispace.mk +include $(PLATFORM_PATH)/platform-modules-ufispace.mk include $(PLATFORM_PATH)/platform-modules-micas.mk include $(PLATFORM_PATH)/docker-syncd-brcm.mk include $(PLATFORM_PATH)/docker-syncd-brcm-rpc.mk diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk index 6271942ccc44..ffcdacbac659 100644 --- a/platform/broadcom/sai-modules.mk +++ b/platform/broadcom/sai-modules.mk @@ -1,6 +1,6 @@ # Broadcom SAI modules -BRCM_OPENNSL_KERNEL_VERSION = 8.4.0.2 +BRCM_OPENNSL_KERNEL_VERSION = 10.1.0.0 BRCM_OPENNSL_KERNEL = opennsl-modules_$(BRCM_OPENNSL_KERNEL_VERSION)_amd64.deb $(BRCM_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules @@ -10,7 +10,7 @@ $(BRCM_OPENNSL_KERNEL)_MACHINE = broadcom SONIC_DPKG_DEBS += $(BRCM_OPENNSL_KERNEL) # SAI bcm modules for DNX family ASIC -BRCM_DNX_OPENNSL_KERNEL_VERSION = 10.1.13.0 +BRCM_DNX_OPENNSL_KERNEL_VERSION = 11.2.7.1 BRCM_DNX_OPENNSL_KERNEL = opennsl-modules-dnx_$(BRCM_DNX_OPENNSL_KERNEL_VERSION)_amd64.deb $(BRCM_DNX_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules-dnx diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk index 2512caad2901..ac5675bc50bb 100644 --- a/platform/broadcom/sai.mk +++ b/platform/broadcom/sai.mk @@ -1,7 +1,7 @@ -LIBSAIBCM_XGS_VERSION = 10.1.7.0 -LIBSAIBCM_DNX_VERSION = 10.1.13.0 +LIBSAIBCM_XGS_VERSION = 10.1.42.0 +LIBSAIBCM_DNX_VERSION = 11.2.7.1 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA -LIBSAIBCM_DNX_BRANCH_NAME = SAI_10.1.0_GA +LIBSAIBCM_DNX_BRANCH_NAME = SAI_11.2.0_GA LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs" LIBSAIBCM_DNX_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx" @@ -12,7 +12,7 @@ $(eval $(call add_derived_package,$(BRCM_XGS_SAI),$(BRCM_XGS_SAI_DEV))) $(BRCM_XGS_SAI_DEV)_URL = "$(LIBSAIBCM_XGS_URL_PREFIX)/$(BRCM_XGS_SAI_DEV)" # SAI module for DNX Asic family -BRCM_DNX_SAI = libsaibcm_$(LIBSAIBCM_DNX_VERSION)_amd64.deb +BRCM_DNX_SAI = libsaibcm_dnx_$(LIBSAIBCM_DNX_VERSION)_amd64.deb $(BRCM_DNX_SAI)_URL = "$(LIBSAIBCM_DNX_URL_PREFIX)/$(BRCM_DNX_SAI)" SONIC_ONLINE_DEBS += $(BRCM_XGS_SAI) diff --git a/platform/broadcom/saibcm-modules-dnx b/platform/broadcom/saibcm-modules-dnx index 231e9683199f..3a1e939bc2b7 160000 --- a/platform/broadcom/saibcm-modules-dnx +++ b/platform/broadcom/saibcm-modules-dnx @@ -1 +1 @@ -Subproject commit 231e9683199fec974cf71311b9ba47b3f48b6e7a +Subproject commit 3a1e939bc2b7169953ebd89f2494341a34ed78f7 diff --git a/platform/broadcom/saibcm-modules/GFILE b/platform/broadcom/saibcm-modules/GFILE new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/platform/broadcom/saibcm-modules/GFILES b/platform/broadcom/saibcm-modules/GFILES new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/platform/broadcom/saibcm-modules/GLOG b/platform/broadcom/saibcm-modules/GLOG new file mode 100644 index 000000000000..86ed8bca39ad --- /dev/null +++ b/platform/broadcom/saibcm-modules/GLOG @@ -0,0 +1,2 @@ +CMD = [/projects/csg_sonic2/sk411346/repos/SAI/6.5.29/ocp_sai/sdk-src/hsdk-6.5.29/xgs-sdk-6.5.29-gpl-modules/, gtags --single-update systems/linux/kernel/modules/bcm-knet/bcm-knet.c] +CMD = [/projects/csg_sonic2/sk411346/repos/SAI/6.5.29/ocp_sai/sdk-src/hsdk-6.5.29/xgs-sdk-6.5.29-gpl-modules/, gtags --single-update systems/linux/kernel/modules/knet-cb/knet-cb.c] diff --git a/platform/broadcom/saibcm-modules/GPATH b/platform/broadcom/saibcm-modules/GPATH new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/platform/broadcom/saibcm-modules/GRTAGS b/platform/broadcom/saibcm-modules/GRTAGS new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/platform/broadcom/saibcm-modules/GTAGS b/platform/broadcom/saibcm-modules/GTAGS new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/platform/broadcom/saibcm-modules/debian/changelog b/platform/broadcom/saibcm-modules/debian/changelog index 9233f775a806..e4bbafd321cb 100644 --- a/platform/broadcom/saibcm-modules/debian/changelog +++ b/platform/broadcom/saibcm-modules/debian/changelog @@ -1,3 +1,9 @@ +opennsl (10.1.0.0) unstable; urgency=medium + + * Update to Broadcom SAI 10.1.0.0 + + -- Ziting Guo Mon Jun 17 05:18:47 2024 +0000 + opennsl (8.4.0.2) unstable; urgency=medium * Update to Broadcom SAI 8.4.0.2 diff --git a/platform/broadcom/saibcm-modules/debian/control b/platform/broadcom/saibcm-modules/debian/control index ccef115a39ff..09648fd9ad87 100644 --- a/platform/broadcom/saibcm-modules/debian/control +++ b/platform/broadcom/saibcm-modules/debian/control @@ -10,5 +10,5 @@ Standards-Version: 3.9.3 Package: opennsl-modules Architecture: amd64 Section: main -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for broadcom SAI diff --git a/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs b/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs index 58fb6cdd4ba5..1fc81d870427 100644 --- a/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs +++ b/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs @@ -1 +1 @@ -lib/modules/6.1.0-11-2-amd64/extra +lib/modules/6.1.0-22-2-amd64/extra diff --git a/platform/broadcom/saibcm-modules/debian/opennsl-modules.install b/platform/broadcom/saibcm-modules/debian/opennsl-modules.install index b43f23360aa0..999195fda780 100644 --- a/platform/broadcom/saibcm-modules/debian/opennsl-modules.install +++ b/platform/broadcom/saibcm-modules/debian/opennsl-modules.install @@ -1,8 +1,8 @@ -systems/linux/user/x86-smp_generic_64-2_6/linux-bcm-knet.ko lib/modules/6.1.0-11-2-amd64/extra -systems/linux/user/x86-smp_generic_64-2_6/linux-kernel-bde.ko lib/modules/6.1.0-11-2-amd64/extra -systems/linux/user/x86-smp_generic_64-2_6/linux-user-bde.ko lib/modules/6.1.0-11-2-amd64/extra -systems/linux/user/x86-smp_generic_64-2_6/linux-knet-cb.ko lib/modules/6.1.0-11-2-amd64/extra +systems/linux/user/x86-smp_generic_64-2_6/linux-bcm-knet.ko lib/modules/6.1.0-22-2-amd64/extra +systems/linux/user/x86-smp_generic_64-2_6/linux-kernel-bde.ko lib/modules/6.1.0-22-2-amd64/extra +systems/linux/user/x86-smp_generic_64-2_6/linux-user-bde.ko lib/modules/6.1.0-22-2-amd64/extra +systems/linux/user/x86-smp_generic_64-2_6/linux-knet-cb.ko lib/modules/6.1.0-22-2-amd64/extra systemd/opennsl-modules.service lib/systemd/system -sdklt/build/bde/linux_ngbde.ko lib/modules/6.1.0-11-2-amd64/extra -sdklt/build/knet/linux_ngknet.ko lib/modules/6.1.0-11-2-amd64/extra -sdklt/build/knetcb/linux_ngknetcb.ko lib/modules/6.1.0-11-2-amd64/extra +sdklt/build/bde/linux_ngbde.ko lib/modules/6.1.0-22-2-amd64/extra +sdklt/build/knet/linux_ngknet.ko lib/modules/6.1.0-22-2-amd64/extra +sdklt/build/knetcb/linux_ngknetcb.ko lib/modules/6.1.0-22-2-amd64/extra diff --git a/platform/broadcom/saibcm-modules/debian/rules b/platform/broadcom/saibcm-modules/debian/rules index 052dcdca968b..2c81ab6d0616 100755 --- a/platform/broadcom/saibcm-modules/debian/rules +++ b/platform/broadcom/saibcm-modules/debian/rules @@ -34,8 +34,8 @@ sname:=opennsl PACKAGE=opennsl-modules # modifieable for experiments or debugging m-a MA_DIR ?= /usr/share/modass -KVERSION ?= 6.1.0-11-2-amd64 -KERNVERSION ?= 6.1.0-11-2 +KVERSION ?= 6.1.0-22-2-amd64 +KERNVERSION ?= 6.1.0-22-2 # load generic variable handling -include $(MA_DIR)/include/generic.make diff --git a/platform/broadcom/saibcm-modules/include/ibde.h b/platform/broadcom/saibcm-modules/include/ibde.h index 12f507ea6fd2..bb6e261e8d48 100644 --- a/platform/broadcom/saibcm-modules/include/ibde.h +++ b/platform/broadcom/saibcm-modules/include/ibde.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: ibde.h,v 1.27 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: ibde.h,v 1.27 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * */ #ifndef __IBDE_H__ diff --git a/platform/broadcom/saibcm-modules/include/kcom.h b/platform/broadcom/saibcm-modules/include/kcom.h index 341ddd0f70d2..c644828b94ff 100644 --- a/platform/broadcom/saibcm-modules/include/kcom.h +++ b/platform/broadcom/saibcm-modules/include/kcom.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: kcom.h,v 1.9 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: kcom.h,v 1.9 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * * * File: kcom.h * Purpose: User/Kernel message definitions @@ -147,8 +144,7 @@ typedef struct kcom_netif_s { uint8 type; uint8 flags; uint32 cb_user_data; - uint8 port; - uint8 reserved; + uint16 port; uint16 vlan; uint16 qnum; uint8 macaddr[6]; diff --git a/platform/broadcom/saibcm-modules/include/sal/core/sync.h b/platform/broadcom/saibcm-modules/include/sal/core/sync.h index 03fd2facc907..b45a15da7c8c 100644 --- a/platform/broadcom/saibcm-modules/include/sal/core/sync.h +++ b/platform/broadcom/saibcm-modules/include/sal/core/sync.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: sync.h,v 1.1 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: sync.h,v 1.1 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * */ #ifndef _SAL_SYNC_H diff --git a/platform/broadcom/saibcm-modules/include/sal/core/thread.h b/platform/broadcom/saibcm-modules/include/sal/core/thread.h index 86713d1e0742..06260906315c 100644 --- a/platform/broadcom/saibcm-modules/include/sal/core/thread.h +++ b/platform/broadcom/saibcm-modules/include/sal/core/thread.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: thread.h,v 1.1 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: thread.h,v 1.1 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * */ #ifndef _SAL_THREAD_H diff --git a/platform/broadcom/saibcm-modules/include/sal/types.h b/platform/broadcom/saibcm-modules/include/sal/types.h index 43d64dbcc6b9..a0ffb72c86a3 100644 --- a/platform/broadcom/saibcm-modules/include/sal/types.h +++ b/platform/broadcom/saibcm-modules/include/sal/types.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: types.h,v 1.3 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: types.h,v 1.3 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * * * File: types.h * Purpose: SAL type definitions diff --git a/platform/broadcom/saibcm-modules/include/sdk_config.h b/platform/broadcom/saibcm-modules/include/sdk_config.h index 6ce7d77d52d0..93063cd9667b 100644 --- a/platform/broadcom/saibcm-modules/include/sdk_config.h +++ b/platform/broadcom/saibcm-modules/include/sdk_config.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: sdk_config.h,v 1.5 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: sdk_config.h,v 1.5 Broadcom SDK $ - * $Copyright: (c) 2006 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * * * */ diff --git a/platform/broadcom/saibcm-modules/include/soc/devids.h b/platform/broadcom/saibcm-modules/include/soc/devids.h index edbdef32b285..de612137069b 100644 --- a/platform/broadcom/saibcm-modules/include/soc/devids.h +++ b/platform/broadcom/saibcm-modules/include/soc/devids.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: devids.h,v 1.309 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,84 +23,101 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * Copyright: (c) 2022 Broadcom. - * All Rights Reserved. + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * */ #ifndef _SOC_DEVIDS_H #define _SOC_DEVIDS_H +/* + * Defines PCI device and revision ID for every recognized device. + * All driver routines refer to this ID only. + */ #define BROADCOM_VENDOR_ID 0x14e4 +/* Draco */ #define BCM5690_DEVICE_ID 0x5690 #define BCM5690_A0_REV_ID 1 #define BCM5690_A1_REV_ID 2 #define BCM5690_A2_REV_ID 3 +/* Draco without HG (Medusa) */ #define BCM5691_DEVICE_ID 0x5691 #define BCM5691_A0_REV_ID 1 #define BCM5691_A1_REV_ID 2 #define BCM5691_A2_REV_ID 3 +/* Draco without L3 */ #define BCM5692_DEVICE_ID 0x5692 #define BCM5692_A0_REV_ID 1 #define BCM5692_A1_REV_ID 2 #define BCM5692_A2_REV_ID 3 +/* Draco without HG or L3 */ #define BCM5693_DEVICE_ID 0x5693 #define BCM5693_A0_REV_ID 1 #define BCM5693_A1_REV_ID 2 #define BCM5693_A2_REV_ID 3 +/* Draco 1.5 */ #define BCM5695_DEVICE_ID 0x5695 #define BCM5695_A0_REV_ID 1 #define BCM5695_A1_REV_ID 2 #define BCM5695_B0_REV_ID 0x11 +/* Draco 1.5 without HG */ #define BCM5696_DEVICE_ID 0x5696 #define BCM5696_A0_REV_ID 1 #define BCM5696_A1_REV_ID 2 #define BCM5696_B0_REV_ID 0x11 +/* Draco 1.5 without L3 */ #define BCM5697_DEVICE_ID 0x5697 #define BCM5697_A0_REV_ID 1 #define BCM5697_A1_REV_ID 2 #define BCM5697_B0_REV_ID 0x11 +/* Draco 1.5 without HG or L3 */ #define BCM5698_DEVICE_ID 0x5698 #define BCM5698_A0_REV_ID 1 #define BCM5698_A1_REV_ID 2 #define BCM5698_B0_REV_ID 0x11 +/* Hercules with 8 ports */ #define BCM5670_DEVICE_ID 0x5670 #define BCM5670_A0_REV_ID 1 #define BCM5670_A1_REV_ID 2 +/* Hercules with 4 ports */ #define BCM5671_DEVICE_ID 0x5671 #define BCM5671_A0_REV_ID 1 #define BCM5671_A1_REV_ID 2 -#define BCM5671_A2_REV_ID 3 +#define BCM5671_A2_REV_ID 3 /* Maxxus */ +/* Hercules 1.5 with 8 ports */ #define BCM5675_DEVICE_ID 0x5675 #define BCM5675_A0_REV_ID 1 #define BCM5675_A1_REV_ID 2 +/* Hercules 1.5 with 4 ports */ #define BCM5676_DEVICE_ID 0x5676 #define BCM5676_A0_REV_ID 1 #define BCM5676_A1_REV_ID 2 +/* Lynx */ #define BCM5673_DEVICE_ID 0x5673 #define BCM5673_A0_REV_ID 1 #define BCM5673_A1_REV_ID 2 #define BCM5673_A2_REV_ID 3 +/* Lynx 1.5 */ #define BCM5674_DEVICE_ID 0x5674 #define BCM5674_A0_REV_ID 1 +/* Felix */ #define BCM56100_DEVICE_ID 0xb100 #define BCM56100_A0_REV_ID 1 #define BCM56100_A1_REV_ID 2 @@ -119,6 +137,7 @@ #define BCM56107_A0_REV_ID 1 #define BCM56107_A1_REV_ID 2 +/* Felix 1.5 */ #define BCM56110_DEVICE_ID 0xb110 #define BCM56110_A0_REV_ID 1 #define BCM56111_DEVICE_ID 0xb111 @@ -132,6 +151,7 @@ #define BCM56117_DEVICE_ID 0xb117 #define BCM56117_A0_REV_ID 1 +/* Helix */ #define BCM56300_DEVICE_ID 0xb300 #define BCM56300_A0_REV_ID 1 #define BCM56300_A1_REV_ID 2 @@ -186,6 +206,7 @@ #define BCM56309_B0_REV_ID 0x11 #define BCM56309_B1_REV_ID 0x12 +/* Helix 1.5 */ #define BCM56310_DEVICE_ID 0xb310 #define BCM56310_A0_REV_ID 1 #define BCM56311_DEVICE_ID 0xb311 @@ -208,11 +229,12 @@ #define BCM56319_A0_REV_ID 1 #ifndef EXCLUDE_BCM56324 +/* Helix 2 */ #define BCM56322_DEVICE_ID 0xb322 #define BCM56322_A0_REV_ID 1 #define BCM56324_DEVICE_ID 0xb324 #define BCM56324_A0_REV_ID 1 -#endif +#endif /* EXCLUDE_BCM56324 */ #define BCM53300_DEVICE_ID 0xb006 #define BCM53300_A0_REV_ID 0x11 @@ -224,6 +246,7 @@ #define BCM53302_A0_REV_ID 0x11 #define BCM53302_A1_REV_ID 0x12 +/* Firebolt */ #define BCM56500_DEVICE_ID 0xb500 #define BCM56500_A0_REV_ID 1 #define BCM56500_A1_REV_ID 2 @@ -285,6 +308,7 @@ #define BCM56509_B1_REV_ID 0x12 #define BCM56509_B2_REV_ID 0x13 +/* Easyrider */ #define BCM56600_DEVICE_ID 0xb600 #define BCM56600_A0_REV_ID 1 #define BCM56600_B0_REV_ID 0x11 @@ -318,14 +342,17 @@ #define BCM56608_B0_REV_ID 0x11 #define BCM56608_C0_REV_ID 0x21 +/* Goldwing */ #define BCM56580_DEVICE_ID 0xb580 #define BCM56580_A0_REV_ID 1 +/* HUMV */ #define BCM56700_DEVICE_ID 0xb700 #define BCM56700_A0_REV_ID 1 #define BCM56701_DEVICE_ID 0xb701 #define BCM56701_A0_REV_ID 1 +/* Bradley */ #define BCM56800_DEVICE_ID 0xb800 #define BCM56800_A0_REV_ID 1 #define BCM56801_DEVICE_ID 0xb801 @@ -335,6 +362,7 @@ #define BCM56803_DEVICE_ID 0xb803 #define BCM56803_A0_REV_ID 1 +/* Raven */ #define BCM56224_DEVICE_ID 0xb224 #define BCM56224_A0_REV_ID 1 #define BCM56224_B0_REV_ID 0x11 @@ -366,6 +394,7 @@ #define BCM53726_A0_REV_ID 1 #define BCM53726_B0_REV_ID 0x11 +/* Hawkeye */ #define BCM53312_DEVICE_ID 0xc312 #define BCM53312_A0_REV_ID 1 #define BCM53312_B0_REV_ID 0x11 @@ -376,6 +405,7 @@ #define BCM53314_A0_REV_ID 1 #define BCM53314_B0_REV_ID 0x11 +/* Hawkeye EEE */ #define BCM53322_DEVICE_ID 0xc322 #define BCM53322_A0_REV_ID 1 #define BCM53323_DEVICE_ID 0xc323 @@ -384,6 +414,7 @@ #define BCM53324_A0_REV_ID 1 +/* Raptor */ #define BCM56218_DEVICE_ID 0xB218 #define BCM56218_A0_REV_ID 1 #define BCM56218_A1_REV_ID 2 @@ -457,6 +488,7 @@ #define BCM56014_A1_REV_ID 2 #define BCM56014_A2_REV_ID 3 +/* Firebolt2 */ #define BCM56510_DEVICE_ID 0xb510 #define BCM56510_A0_REV_ID 1 #define BCM56511_DEVICE_ID 0xb511 @@ -476,6 +508,7 @@ #define BCM56519_DEVICE_ID 0xb519 #define BCM56519_A0_REV_ID 1 +/* Triumph */ #define BCM56620_DEVICE_ID 0xb620 #define BCM56620_A0_REV_ID 1 #define BCM56620_A1_REV_ID 2 @@ -507,6 +540,7 @@ #define BCM56629_B1_REV_ID 0x12 #define BCM56629_B2_REV_ID 0x13 +/* Valkyrie */ #define BCM56680_DEVICE_ID 0xb680 #define BCM56680_A0_REV_ID 1 #define BCM56680_A1_REV_ID 2 @@ -524,6 +558,7 @@ #define BCM56686_B1_REV_ID 0x12 #define BCM56686_B2_REV_ID 0x13 +/* Scorpion */ #define BCM56820_DEVICE_ID 0xb820 #define BCM56820_A0_REV_ID 1 #define BCM56820_B0_REV_ID 0x11 @@ -539,6 +574,7 @@ #define BCM56825_DEVICE_ID 0xb825 #define BCM56825_B0_REV_ID 0x11 +/* HUMV Plus */ #define BCM56720_DEVICE_ID 0xb720 #define BCM56720_A0_REV_ID 1 #define BCM56720_B0_REV_ID 0x11 @@ -546,10 +582,12 @@ #define BCM56721_A0_REV_ID 1 #define BCM56721_B0_REV_ID 0x11 +/* Conqueror */ #define BCM56725_DEVICE_ID 0xb725 #define BCM56725_A0_REV_ID 1 #define BCM56725_B0_REV_ID 0x11 +/* Triumph2 */ #define BCM56630_DEVICE_ID 0xb630 #define BCM56630_A0_REV_ID 1 #define BCM56630_B0_REV_ID 0x11 @@ -566,6 +604,7 @@ #define BCM56639_A0_REV_ID 1 #define BCM56639_B0_REV_ID 0x11 +/* Valkyrie2 */ #define BCM56685_DEVICE_ID 0xb685 #define BCM56685_A0_REV_ID 1 #define BCM56685_B0_REV_ID 0x11 @@ -573,6 +612,7 @@ #define BCM56689_A0_REV_ID 1 #define BCM56689_B0_REV_ID 0x11 +/* Apollo */ #define BCM56520_DEVICE_ID 0xb520 #define BCM56520_A0_REV_ID 1 #define BCM56520_B0_REV_ID 0x11 @@ -589,11 +629,13 @@ #define BCM56526_A0_REV_ID 1 #define BCM56526_B0_REV_ID 0x11 +/* Firebolt 3 */ #define BCM56534_DEVICE_ID 0xb534 #define BCM56534_B0_REV_ID 0x11 #define BCM56538_DEVICE_ID 0xb538 #define BCM56538_B0_REV_ID 0x11 +/* Enduro */ #define BCM56331_DEVICE_ID 0xb331 #define BCM56331_A0_REV_ID 1 #define BCM56331_B0_REV_ID 0x11 @@ -611,6 +653,7 @@ #define BCM56338_B0_REV_ID 0x11 #define BCM56338_B1_REV_ID 0x12 +/* Helix 3 */ #define BCM56320_DEVICE_ID 0xb320 #define BCM56320_A0_REV_ID 1 #define BCM56320_B0_REV_ID 0x11 @@ -621,6 +664,7 @@ #define BCM56321_B1_REV_ID 0x12 +/* FireScout */ #define BCM56548H_DEVICE_ID 0xB54A #define BCM56548H_A0_REV_ID 1 #define BCM56548_DEVICE_ID 0xb548 @@ -628,6 +672,7 @@ #define BCM56547_DEVICE_ID 0xb547 #define BCM56547_A0_REV_ID 1 +/* Helix 4 */ #define BCM56346_DEVICE_ID 0xb346 #define BCM56346_A0_REV_ID 1 #define BCM56345_DEVICE_ID 0xb345 @@ -639,6 +684,7 @@ #define BCM56340_DEVICE_ID 0xb340 #define BCM56340_A0_REV_ID 1 +/* Spiral */ #define BCM56049_DEVICE_ID 0xb049 #define BCM56049_A0_REV_ID 1 #define BCM56048_DEVICE_ID 0xb048 @@ -646,6 +692,7 @@ #define BCM56047_DEVICE_ID 0xb047 #define BCM56047_A0_REV_ID 1 +/* Ranger */ #define BCM56042_DEVICE_ID 0xb042 #define BCM56042_A0_REV_ID 1 #define BCM56041_DEVICE_ID 0xb041 @@ -653,6 +700,7 @@ #define BCM56040_DEVICE_ID 0xb040 #define BCM56040_A0_REV_ID 1 +/* Stardust */ #define BCM56132_DEVICE_ID 0xb132 #define BCM56132_A0_REV_ID 1 #define BCM56132_B0_REV_ID 0x11 @@ -662,11 +710,13 @@ #define BCM56134_B0_REV_ID 0x11 #define BCM56134_B1_REV_ID 0x12 +/* Dagger */ #define BCM56230_DEVICE_ID 0xb230 #define BCM56230_B1_REV_ID 0x12 #define BCM56231_DEVICE_ID 0xb231 #define BCM56231_B1_REV_ID 0x12 +/* Hurricane */ #define BCM56140_DEVICE_ID 0xb140 #define BCM56140_A0_REV_ID 1 #define BCM56142_DEVICE_ID 0xb142 @@ -682,6 +732,7 @@ #define BCM56149_DEVICE_ID 0xb149 #define BCM56149_A0_REV_ID 1 +/* Trident */ #define BCM56840_DEVICE_ID 0xb840 #define BCM56840_A0_REV_ID 1 #define BCM56840_A1_REV_ID 2 @@ -715,6 +766,7 @@ #define BCM56845_B0_REV_ID 0x11 #define BCM56845_B1_REV_ID 0x12 +/* Titan */ #define BCM56743_DEVICE_ID 0xb743 #define BCM56743_A0_REV_ID 1 #define BCM56743_A1_REV_ID 2 @@ -732,6 +784,7 @@ #define BCM56745_B0_REV_ID 0x11 #define BCM56745_B1_REV_ID 0x12 +/* Saber 2 */ #define BCM56260_DEVICE_ID 0xb260 #define BCM56260_A0_REV_ID 1 #define BCM56260_B0_REV_ID 0x11 @@ -758,6 +811,7 @@ #define BCM56268_A0_REV_ID 1 #define BCM56268_B0_REV_ID 0x11 +/*Dagger 2*/ #define BCM56233_DEVICE_ID 0xb233 #define BCM56233_B0_REV_ID 0x11 @@ -787,6 +841,7 @@ #define BCM56468_A0_REV_ID 1 #define BCM56468_B0_REV_ID 0x11 +/* Metrolite */ #define BCM56270_DEVICE_ID 0xb270 #define BCM56270_A0_REV_ID 1 #define BCM56271_DEVICE_ID 0xb271 @@ -794,11 +849,13 @@ #define BCM56272_DEVICE_ID 0xb272 #define BCM56272_A0_REV_ID 1 +/* Beagle */ #define BCM53460_DEVICE_ID 0x8460 #define BCM53460_A0_REV_ID 1 #define BCM53461_DEVICE_ID 0x8461 #define BCM53461_A0_REV_ID 1 +/* Trident Plus */ #define BCM56842_DEVICE_ID 0xb842 #define BCM56842_A0_REV_ID 1 #define BCM56842_A1_REV_ID 2 @@ -835,6 +892,7 @@ #define BCM56849_A0_REV_ID 1 #define BCM56849_A1_REV_ID 2 +/* Titan Plus */ #define BCM56742_DEVICE_ID 0xb742 #define BCM56742_A0_REV_ID 1 #define BCM56742_A1_REV_ID 2 @@ -847,6 +905,7 @@ #define BCM56746_A1_REV_ID 2 +/* Triumph 3 */ #define BCM56640_DEVICE_ID 0xb640 #define BCM56640_A0_REV_ID 1 #define BCM56640_A1_REV_ID 2 @@ -868,6 +927,7 @@ #define BCM56649_A1_REV_ID 2 #define BCM56649_B0_REV_ID 0x11 +/* Apollo 2 */ #define BCM56540_DEVICE_ID 0xb540 #define BCM56540_A0_REV_ID 1 #define BCM56540_A1_REV_ID 2 @@ -889,6 +949,7 @@ #define BCM56544_A1_REV_ID 2 #define BCM56544_B0_REV_ID 0x11 +/* Firebolt 4 */ #define BCM56545_DEVICE_ID 0xb545 #define BCM56545_A0_REV_ID 1 #define BCM56545_A1_REV_ID 2 @@ -898,6 +959,7 @@ #define BCM56546_A1_REV_ID 2 #define BCM56546_B0_REV_ID 0x11 +/* Ranger plus */ #define BCM56044_DEVICE_ID 0xb044 #define BCM56044_B0_REV_ID 0x11 #define BCM56045_DEVICE_ID 0xb045 @@ -910,6 +972,7 @@ #define BCM56046_B0_REV_ID 0x11 +/* Katana */ #define BCM56440_DEVICE_ID 0xb440 #define BCM56440_A0_REV_ID 1 #define BCM56440_B0_REV_ID 0x11 @@ -962,6 +1025,7 @@ #define BCM55441_A0_REV_ID 1 #define BCM55441_B0_REV_ID 0x11 +/* Katana 2 */ #define BCM55450_DEVICE_ID 0xa450 #define BCM55450_A0_REV_ID 1 #define BCM55450_B0_REV_ID 0x11 @@ -1012,6 +1076,7 @@ #define BCM56458_B0_REV_ID 0x11 #define BCM56458_B1_REV_ID 0x12 +/* Trident 2 */ #define BCM56850_DEVICE_ID 0xb850 #define BCM56850_A0_REV_ID 1 #define BCM56850_A1_REV_ID 2 @@ -1041,6 +1106,7 @@ #define BCM56834_A1_REV_ID 2 #define BCM56834_A2_REV_ID 3 +/* Trident 2+ */ #define BCM56860_DEVICE_ID 0xb860 #define BCM56860_A0_REV_ID 1 #define BCM56860_A1_REV_ID 2 @@ -1076,16 +1142,19 @@ #define BCM56836_A1_REV_ID 2 +/* Titan 2 */ #define BCM56750_DEVICE_ID 0xb750 #define BCM56750_A0_REV_ID 1 #define BCM56750_A1_REV_ID 2 #define BCM56750_A2_REV_ID 3 +/* Scorpion 960 */ #define BCM56830_DEVICE_ID 0xb830 #define BCM56830_A0_REV_ID 1 #define BCM56830_A1_REV_ID 2 #define BCM56830_A2_REV_ID 3 +/* Hurricane 2*/ #define BCM56150_DEVICE_ID 0xb150 #define BCM56150_A0_REV_ID 1 #define BCM56151_DEVICE_ID 0xb151 @@ -1093,6 +1162,7 @@ #define BCM56152_DEVICE_ID 0xb152 #define BCM56152_A0_REV_ID 1 +/* Wolfhound*/ #define BCM53342_DEVICE_ID 0x8342 #define BCM53342_A0_REV_ID 1 #define BCM53343_DEVICE_ID 0x8343 @@ -1104,19 +1174,22 @@ #define BCM53347_DEVICE_ID 0x8347 #define BCM53347_A0_REV_ID 1 +/* Foxhound*/ #define BCM53333_DEVICE_ID 0x8333 #define BCM53333_A0_REV_ID 1 #define BCM53334_DEVICE_ID 0x8334 #define BCM53334_A0_REV_ID 1 +/* Deerhound*/ #define BCM53393_DEVICE_ID 0x8393 #define BCM53393_A0_REV_ID 1 #define BCM53394_DEVICE_ID 0x8394 #define BCM53394_A0_REV_ID 1 -#define BCM53400_DEVICE_ID 0x8400 +/* Greyhound , Ranger 2 */ +#define BCM53400_DEVICE_ID 0x8400 /* FIXME */ #define BCM53400_A0_REV_ID 1 -#define BCM56060_DEVICE_ID 0xb060 +#define BCM56060_DEVICE_ID 0xb060 #define BCM56060_A0_REV_ID 1 #define BCM56062_DEVICE_ID 0xb062 #define BCM56062_A0_REV_ID 1 @@ -1154,6 +1227,7 @@ #define BCM53369_DEVICE_ID 0x8369 #define BCM53369_A0_REV_ID 1 +/* Elkhound */ #define BCM53454_DEVICE_ID 0x8454 #define BCM53455_DEVICE_ID 0x8455 #define BCM53454_A0_REV_ID 1 @@ -1161,6 +1235,7 @@ #define BCM53457_DEVICE_ID 0x8457 #define BCM53456_A0_REV_ID 1 +/* Bloodhound */ #define BCM53422_DEVICE_ID 0x8422 #define BCM53422_A0_REV_ID 1 #define BCM53424_DEVICE_ID 0x8424 @@ -1168,6 +1243,7 @@ #define BCM53426_DEVICE_ID 0x8426 #define BCM53426_A0_REV_ID 1 +/* Tomahawk */ #define BCM56960_DEVICE_ID 0xb960 #define BCM56960_A0_REV_ID 1 #define BCM56960_B0_REV_ID 0x11 @@ -1206,6 +1282,7 @@ #define BCM56939_B0_REV_ID 0x11 #define BCM56939_C0_REV_ID 0x21 +/* Ranger3+ */ #define BCM56168_DEVICE_ID 0xb168 #define BCM56168_A0_REV_ID 1 #define BCM56168_B0_REV_ID 0x11 @@ -1215,6 +1292,7 @@ #define BCM56169_B0_REV_ID 0x11 #define BCM56169_B1_REV_ID 0x12 +/* Tomahawk 3 */ #define BCM56980_DEVICE_ID_MASK 0xFFF0 #define BCM56980_DEVICE_ID 0xb980 #define BCM56980_A0_REV_ID 1 @@ -1232,28 +1310,32 @@ #define BCM56984_A0_REV_ID 1 #define BCM56984_B0_REV_ID 0x11 +/* Titanhawk */ #define BCM56968_DEVICE_ID 0xb968 #define BCM56968_A0_REV_ID 1 #define BCM56968_B0_REV_ID 0x11 #define BCM56968_B1_REV_ID 0x12 -#define BCM56160_DEVICE_ID 0xb160 +/* Hurricane 3 */ +#define BCM56160_DEVICE_ID 0xb160 #define BCM56160_A0_REV_ID 1 #define BCM56160_B0_REV_ID 0x11 -#define BCM56162_DEVICE_ID 0xb162 +#define BCM56162_DEVICE_ID 0xb162 #define BCM56162_A0_REV_ID 1 #define BCM56162_B0_REV_ID 0x11 -#define BCM56163_DEVICE_ID 0xb163 +/* Hurricane3 Lite */ +#define BCM56163_DEVICE_ID 0xb163 #define BCM56163_A0_REV_ID 1 #define BCM56163_B0_REV_ID 0x11 -#define BCM56164_DEVICE_ID 0xb164 +#define BCM56164_DEVICE_ID 0xb164 #define BCM56164_A0_REV_ID 1 #define BCM56164_B0_REV_ID 0x11 -#define BCM56166_DEVICE_ID 0xb166 +#define BCM56166_DEVICE_ID 0xb166 #define BCM56166_A0_REV_ID 1 #define BCM56166_B0_REV_ID 0x11 +/* Hurricane4 */ #define BCM56273_DEVICE_ID 0xb273 #define BCM56273_A0_REV_ID 1 #define BCM56273_A1_REV_ID 2 @@ -1290,20 +1372,23 @@ #define BCM56176_DEVICE_ID 0xb176 #define BCM56176_A1_REV_ID 2 -#define BCM53440_DEVICE_ID 0x8440 +/* Buckhound */ +#define BCM53440_DEVICE_ID 0x8440 #define BCM53440_A0_REV_ID 1 #define BCM53440_B0_REV_ID 0x11 -#define BCM53442_DEVICE_ID 0x8442 +#define BCM53442_DEVICE_ID 0x8442 #define BCM53442_A0_REV_ID 1 #define BCM53442_B0_REV_ID 0x11 -#define BCM53443_DEVICE_ID 0x8443 +#define BCM53443_DEVICE_ID 0x8443 #define BCM53443_A0_REV_ID 1 #define BCM53443_B0_REV_ID 0x11 -#define BCM53434_DEVICE_ID 0x8434 +/* Foxhound2 */ +#define BCM53434_DEVICE_ID 0x8434 #define BCM53434_A0_REV_ID 1 #define BCM53434_B0_REV_ID 0x11 +/* Apache */ #define BCM56560_DEVICE_ID 0xb560 #define BCM56560_A0_REV_ID 1 #define BCM56560_B0_REV_ID 0x11 @@ -1316,6 +1401,7 @@ #define BCM56562_A0_REV_ID 1 #define BCM56562_B0_REV_ID 0x11 +/* MONTEREY */ #define BCM56670_DEVICE_ID 0xb670 #define BCM56670_A0_REV_ID 1 #define BCM56670_B0_REV_ID 0x11 @@ -1337,7 +1423,28 @@ #define BCM56675_B0_REV_ID 0x11 #define BCM56675_C0_REV_ID 0x21 +/* WOLFHOUND3 PLUS */ +#define BCM53650_DEVICE_ID 0x8650 +#define BCM53650_A0_REV_ID 1 +#define BCM53650_B0_REV_ID 0x11 +#define BCM53650_C0_REV_ID 0x21 + +#define BCM53651_DEVICE_ID 0x8651 +#define BCM53651_A0_REV_ID 1 +#define BCM53651_B0_REV_ID 0x11 +#define BCM53651_C0_REV_ID 0x21 + +#define BCM53652_DEVICE_ID 0x8652 +#define BCM53652_A0_REV_ID 1 +#define BCM53652_B0_REV_ID 0x11 +#define BCM53652_C0_REV_ID 0x21 +#define BCM53653_DEVICE_ID 0x8653 +#define BCM53653_A0_REV_ID 1 +#define BCM53653_B0_REV_ID 0x11 +#define BCM53653_C0_REV_ID 0x21 + +/* Firebolt-5 */ #define BCM56565_DEVICE_ID 0xb565 #define BCM56565_A0_REV_ID 1 #define BCM56565_B0_REV_ID 0x11 @@ -1354,6 +1461,7 @@ #define BCM56568_A0_REV_ID 1 #define BCM56568_B0_REV_ID 0x11 +/* Maverick */ #define BCM56760_DEVICE_ID 0xb760 #define BCM56760_A0_REV_ID 1 #define BCM56760_A1_REV_ID 2 @@ -1386,6 +1494,7 @@ #define BCM56768_A0_REV_ID 1 #define BCM56768_B0_REV_ID 0x11 +/* Ranger 2+ */ #define BCM56068_DEVICE_ID 0xb068 #define BCM56068_A0_REV_ID 1 #define BCM56068_B0_REV_ID 0x11 @@ -1395,6 +1504,7 @@ #define BCM56069_A0_REV_ID 1 #define BCM56069_B0_REV_ID 0x11 +/* Hurricane3-MG */ #define BCM56170_DEVICE_ID 0xb170 #define BCM56170_A0_REV_ID 1 #define BCM56170_B0_REV_ID 0x11 @@ -1405,6 +1515,7 @@ #define BCM56174_A0_REV_ID 1 #define BCM56174_B0_REV_ID 0x11 +/* Quartz, Greyhound 2 */ #define BCM53570_DEVICE_ID 0x8570 #define BCM53570_A0_REV_ID 1 #define BCM53570_B0_REV_ID 0x11 @@ -1412,6 +1523,7 @@ #define BCM53575_A0_REV_ID 1 #define BCM53575_B0_REV_ID 0x11 +/* FireLight */ #define BCM56070_DEVICE_ID 0xb070 #define BCM56070_A0_REV_ID 1 #define BCM56071_DEVICE_ID 0xb071 @@ -1420,16 +1532,18 @@ #define BCM56072_A0_REV_ID 1 +/* Tomahawk+ */ #define BCM56965_DEVICE_ID 0xb965 #define BCM56965_A0_REV_ID 1 #define BCM56965_A1_REV_ID 2 -#define BCM56969_DEVICE_ID 0xb969 +#define BCM56969_DEVICE_ID 0xb969 /* Corresponds to TH 56961 */ #define BCM56969_A0_REV_ID 1 -#define BCM56966_DEVICE_ID 0xb966 +#define BCM56966_DEVICE_ID 0xb966 /* Corresponds to TH 56962 */ #define BCM56966_A0_REV_ID 1 -#define BCM56967_DEVICE_ID 0xb967 +#define BCM56967_DEVICE_ID 0xb967 /* Corresponds to TH 56963 */ #define BCM56967_A0_REV_ID 1 +/* Tomahawk 2 */ #define BCM56970_DEVICE_ID 0xb970 #define BCM56970_A0_REV_ID 1 #define BCM56970_B0_REV_ID 0x11 @@ -1446,11 +1560,13 @@ #define BCM56975_A0_REV_ID 1 #define BCM56975_B0_REV_ID 0x11 +/* Trident3 */ #define BCM56870_DEVICE_ID 0xb870 #define BCM56870_A0_REV_ID 1 #define BCM56873_DEVICE_ID 0xb873 #define BCM56873_A0_REV_ID 1 +/* Helix5 */ #define BCM56370_DEVICE_ID 0xb370 #define BCM56370_A0_REV_ID 1 #define BCM56370_A1_REV_ID 0x02 @@ -1501,12 +1617,14 @@ #define BCM56579_A1_REV_ID 0x02 #define BCM56579_A2_REV_ID 0x03 +/* Maverick2 */ #define BCM56770_DEVICE_ID 0xb770 #define BCM56770_A0_REV_ID 1 #define BCM56771_DEVICE_ID 0xb771 #define BCM56771_A0_REV_ID 1 +/* Firebolt6 */ #define BCM56470_DEVICE_ID 0xb470 #define BCM56470_A0_REV_ID 1 #define BCM56471_DEVICE_ID 0xb471 @@ -1519,6 +1637,7 @@ #define BCM56474_A0_REV_ID 1 +/* Wolfhound2 (Hurricane3-CR)*/ #define BCM53540_DEVICE_ID 0x8540 #define BCM53540_A0_REV_ID 1 #define BCM53547_DEVICE_ID 0x8547 @@ -1528,19 +1647,43 @@ #define BCM53549_DEVICE_ID 0x8549 #define BCM53549_A0_REV_ID 1 +/* Wolfhound3 */ #define BCM53642_DEVICE_ID 0x8642 #define BCM53642_A0_REV_ID 1 +/* + * BCM5665: Tucana48 (48+4+1) + * BCM5665L: Tucana24 (24+4+1) + * BCM5666: Tucana48 (48+4+1) without L3 + * BCM5666L: Tucana24 (24+4+1) without L3 + * + * The device ID is 0x5665 for all of these parts. For BCM5665L and + * BCM5666L, the pbmp_valid property must be set to invalidate fe24-fe47 + * (see $SDK/rc/config.bcm). + */ #define BCM5665_DEVICE_ID 0x5665 #define BCM5665_A0_REV_ID 1 #define BCM5665_B0_REV_ID 0x11 +/* + * BCM5655: Titanium48 (48+4) + * BCM5656: Titanium48 (48+4) without L3 + * + * The device ID is 0x5655 for both parts. + */ #define BCM5655_DEVICE_ID 0x5655 #define BCM5655_A0_REV_ID 1 #define BCM5655_B0_REV_ID 0x11 +/* + * BCM5650: Titanium-II (24+4) + * BCM5651: Titanium-II (24+4) without L3 + * + * The device ID is 0x5650 for both parts. + * BCM5650C0 is the first spin of a real 24+4 cost-reduced chip. + */ #define BCM5650_DEVICE_ID 0x5650 #define BCM5650_A0_REV_ID 1 #define BCM5650_B0_REV_ID 0x11 @@ -1548,9 +1691,10 @@ #define BROADCOM_PHYID_HIGH 0x0040 -#define ARAD_DEVICE_ID 0x8650 +/* Define Dune device IDs */ +#define ARAD_DEVICE_ID 0x8650 #define ARAD_A0_REV_ID 0x0000 -#define ARAD_B0_REV_ID 0x0011 +#define ARAD_B0_REV_ID 0x0011 #define ARAD_B1_REV_ID 0x0012 #define BCM88770_DEVICE_ID 0x8770 #define BCM88770_A1_REV_ID 0x0002 @@ -1600,49 +1744,20 @@ #define BCM8879E_DEVICE_ID 0x879E #define BCM8879F_DEVICE_ID 0x879F #ifdef BCM_DNXF3_SUPPORT -#define BCM88910_DEVICE_ID 0x8910 -#define BCM88910_A0_REV_ID DNXC_A0_REV_ID -#define BCM88911_DEVICE_ID 0x8911 -#define BCM88912_DEVICE_ID 0x8912 -#define BCM88913_DEVICE_ID 0x8913 -#define BCM88914_DEVICE_ID 0x8914 -#define BCM88915_DEVICE_ID 0x8915 -#define BCM88916_DEVICE_ID 0x8916 -#define BCM88917_DEVICE_ID 0x8917 -#define BCM88918_DEVICE_ID 0x8918 -#define BCM88919_DEVICE_ID 0x8919 -#define BCM8891A_DEVICE_ID 0x891A -#define BCM8891B_DEVICE_ID 0x891B -#define BCM8891C_DEVICE_ID 0x891C -#define BCM8891D_DEVICE_ID 0x891D -#define BCM8891E_DEVICE_ID 0x891E +#define RAMON2_DEVICE_ID 0x8910 #define BCM8891F_DEVICE_ID 0x891F -#define BCM88920_DEVICE_ID 0x8920 -#define BCM88920_A0_REV_ID DNXC_A0_REV_ID -#define BCM88921_DEVICE_ID 0x8921 -#define BCM88922_DEVICE_ID 0x8922 -#define BCM88923_DEVICE_ID 0x8923 -#define BCM88924_DEVICE_ID 0x8924 -#define BCM88925_DEVICE_ID 0x8925 -#define BCM88926_DEVICE_ID 0x8926 -#define BCM88927_DEVICE_ID 0x8927 -#define BCM88928_DEVICE_ID 0x8928 -#define BCM88929_DEVICE_ID 0x8929 -#define BCM8892A_DEVICE_ID 0x892A -#define BCM8892B_DEVICE_ID 0x892B -#define BCM8892C_DEVICE_ID 0x892C -#define BCM8892D_DEVICE_ID 0x892D -#define BCM8892E_DEVICE_ID 0x892E -#define BCM8892F_DEVICE_ID 0x892F +#define RAMON3_DEVICE_ID 0x8920 #endif #define ARADPLUS_DEVICE_ID 0x8660 -#define ARADPLUS_A0_REV_ID 0x0001 +#define ARADPLUS_A0_REV_ID 0x0001 #define BCM88660_DEVICE_ID ARADPLUS_DEVICE_ID #define BCM88660_A0_REV_ID ARADPLUS_A0_REV_ID -#define JERICHO_DEVICE_ID 0x8675 +/* Jericho */ +#define JERICHO_DEVICE_ID 0x8675 #define JERICHO_A0_REV_ID 0x0001 #define JERICHO_B0_REV_ID 0x0011 #define JERICHO_A1_REV_ID 0x0002 +/* Jericho SKUs */ #define BCM88670_DEVICE_ID 0x8670 #define BCM88670_A0_REV_ID JERICHO_A0_REV_ID #define BCM88670_A1_REV_ID JERICHO_A1_REV_ID @@ -1700,10 +1815,12 @@ #define BCM88677_B0_REV_ID JERICHO_B0_REV_ID #define BCM88678_B0_REV_ID JERICHO_B0_REV_ID #define BCM88679_B0_REV_ID JERICHO_B0_REV_ID -#define QMX_DEVICE_ID 0x8375 +/* Qumran MX */ +#define QMX_DEVICE_ID 0x8375 #define QMX_A0_REV_ID 0x0001 #define QMX_B0_REV_ID 0x0011 #define QMX_A1_REV_ID 0x0002 +/* Qumran MX SKUs*/ #define BCM88370_DEVICE_ID 0x8370 #define BCM88370_A0_REV_ID QMX_A0_REV_ID #define BCM88370_A1_REV_ID QMX_A1_REV_ID @@ -1743,7 +1860,7 @@ #define BCM88379_B0_REV_ID QMX_B0_REV_ID -#define JERICHO_PLUS_DEVICE_ID 0x8680 +#define JERICHO_PLUS_DEVICE_ID 0x8680 #define JERICHO_PLUS_A0_REV_ID 0x0001 #define BCM88680_DEVICE_ID JERICHO_PLUS_DEVICE_ID #define BCM88680_A0_REV_ID JERICHO_PLUS_A0_REV_ID @@ -1773,7 +1890,7 @@ #define BCM88381_DEVICE_ID 0x8381 #define BCM88381_A0_REV_ID JERICHO_PLUS_A0_REV_ID -#define JERICHO2_DEVICE_ID 0x8690 +#define JERICHO2_DEVICE_ID 0x8690 #define JERICHO2_A0_REV_ID DNXC_A0_REV_ID #define JERICHO2_B0_REV_ID DNXC_B0_REV_ID #define JERICHO2_B1_REV_ID DNXC_B1_REV_ID @@ -1797,9 +1914,9 @@ #define BCM8869E_DEVICE_ID 0x869E #define BCM8869F_DEVICE_ID 0x869F -#define J2C_DEVICE_ID 0x8800 -#define J2C_2ND_DEVICE_ID 0x8820 -#define J2C_DEVID_FAMILY_MASK 0xffd0 +#define J2C_DEVICE_ID 0x8800 +#define J2C_2ND_DEVICE_ID 0x8820 +#define J2C_DEVID_FAMILY_MASK 0xffd0 #define J2C_A0_REV_ID DNXC_A0_REV_ID #define J2C_A1_REV_ID DNXC_A1_REV_ID #define BCM88800_DEVICE_ID J2C_DEVICE_ID @@ -1899,17 +2016,13 @@ #define BCM8883F_DEVICE_ID 0x883F #ifdef BCM_DNX3_SUPPORT -#define JERICHO3_DEVICE_ID 0x8860 -#define JERICHO3_A0_REV_ID DNXC_A0_REV_ID -#define BCM88860_DEVICE_ID JERICHO3_DEVICE_ID -#define BCM88860_A0_REV_ID JERICHO3_A0_REV_ID -#define Q4_DEVICE_ID 0x8870 -#define Q4_A0_REV_ID DNXC_A0_REV_ID -#define BCM88870_DEVICE_ID Q4_DEVICE_ID -#define BCM88870_A0_REV_ID Q4_A0_REV_ID +#define JERICHO3_DEVICE_ID 0x8860 +#define Q3_DEVICE_ID_START 0x886a +#define Q3_DEVICE_ID_END 0x886f +#define J3AI_DEVICE_ID 0x8890 +#define Q3D_DEVICE_ID 0x8870 #endif - -#define Q2A_DEVICE_ID 0x8480 +#define Q2A_DEVICE_ID 0x8480 #define Q2A_A0_REV_ID DNXC_A0_REV_ID #define Q2A_B0_REV_ID DNXC_B0_REV_ID #define Q2A_B1_REV_ID DNXC_B1_REV_ID @@ -1969,10 +2082,10 @@ #define BCM8829E_DEVICE_ID 0x829E #define BCM8829F_DEVICE_ID 0x829F -#define QAX_DEVICE_ID 0x8470 +#define QAX_DEVICE_ID 0x8470 #define QAX_A0_REV_ID 0x0001 #define QAX_B0_REV_ID 0x0011 -#define BCM88470_DEVICE_ID QAX_DEVICE_ID +#define BCM88470_DEVICE_ID QAX_DEVICE_ID #define BCM88470_B0_REV_ID QAX_B0_REV_ID #define BCM88470P_DEVICE_ID 0x847C #define BCM88471_DEVICE_ID 0x8471 @@ -1988,7 +2101,7 @@ #define BCM88470_A0_REV_ID QAX_A0_REV_ID -#define QUX_DEVICE_ID 0x8270 +#define QUX_DEVICE_ID 0x8270 #define QUX_A0_REV_ID 0x0001 #define QUX_A1_REV_ID 0x0002 #define QUX_B0_REV_ID 0x0011 @@ -2046,11 +2159,27 @@ #define BCM88952_A0_REV_ID 0x0001 #define BCM88952_A1_REV_ID 0x0002 -#define PLX9056_DEVICE_ID 0x9056 +#define PLX9056_DEVICE_ID 0x9056 /* needed for DNX_TEST_BOARD */ +/* Trident4 X11c*/ #define BCM56890_DEVICE_ID 0xb890 #define BCM56890_A0_REV_ID 0x0001 - +#define BCM56891_DEVICE_ID 0xb891 +#define BCM56891_A0_REV_ID 0x0001 +#define BCM56892_DEVICE_ID 0xb892 +#define BCM56892_A0_REV_ID 0x0001 +#define BCM56895_DEVICE_ID 0xb895 +#define BCM56895_A0_REV_ID 0x0001 +#define BCM56896_DEVICE_ID 0xb896 +#define BCM56896_A0_REV_ID 0x0001 + +/* Trident4 X7*/ +#define BCM56690_DEVICE_ID 0xb690 +#define BCM56690_A0_REV_ID 0x0001 +#define BCM56692_DEVICE_ID 0xb692 +#define BCM56692_A0_REV_ID 0x0001 + +/* Trident4 */ #define BCM56880_DEVICE_ID 0xb880 #define BCM56880_A0_REV_ID 0x0001 #define BCM56880_B0_REV_ID 0x0011 @@ -2061,26 +2190,33 @@ #define BCM56883_A0_REV_ID 0x0001 #define BCM56883_B0_REV_ID 0x0011 +/* Trident4 X9 */ #define BCM56780_DEVICE_ID 0xb780 #define BCM56780_A0_REV_ID 0x0001 #define BCM56782_DEVICE_ID 0xb782 #define BCM56782_A0_REV_ID 0x0001 +#define BCM56782_A1_REV_ID 0x0002 #define BCM56784_DEVICE_ID 0xb784 #define BCM56784_A0_REV_ID 0x0001 #define BCM56785_DEVICE_ID 0xb785 #define BCM56785_A0_REV_ID 0x0001 #define BCM56786_DEVICE_ID 0xb786 #define BCM56786_A0_REV_ID 0x0001 +#define BCM56786_A1_REV_ID 0x0002 #define BCM56787_DEVICE_ID 0xb787 #define BCM56787_A0_REV_ID 0x0001 +#define BCM56787_A1_REV_ID 0x0002 #define BCM56788_DEVICE_ID 0xb788 #define BCM56788_A0_REV_ID 0x0001 +#define BCM56788_A1_REV_ID 0x0002 #define BCM56789_DEVICE_ID 0xb789 #define BCM56789_A0_REV_ID 0x0001 +/* Tomahawk4 */ #define BCM56990_DEVICE_ID 0xb990 #define BCM56990_A0_REV_ID 0x0001 +/* Tomahawk4 */ #ifndef BCM56990_DEVICE_ID #define BCM56990_DEVICE_ID 0xb990 #define BCM56990_A0_REV_ID 0x0001 @@ -2093,11 +2229,13 @@ #define BCM56993_DEVICE_ID 0xb993 #define BCM56993_B0_REV_ID 0x0011 +/* Tomahawk4G */ #define BCM56996_DEVICE_ID 0xb996 #define BCM56996_A0_REV_ID 0x0001 #define BCM56997_DEVICE_ID 0xb997 #define BCM56997_A0_REV_ID 0x0001 +/* Tomahawk4G */ #ifndef BCM56996_DEVICE_ID #define BCM56996_DEVICE_ID 0xb996 #define BCM56996_A0_REV_ID 0x0001 @@ -2106,9 +2244,11 @@ #define BCM56996_B0_REV_ID 0x0011 #define BCM56997_B0_REV_ID 0x0011 +/* Tomahawk4GT */ #define BCM56998_DEVICE_ID 0xb998 #define BCM56998_A0_REV_ID 0x0001 +/* Tomahawk4D */ #define BCM56999_DEVICE_ID 0xb999 #define BCM56999_A0_REV_ID 0x0001 #define BCM56999_B0_REV_ID 0x0011 @@ -2116,18 +2256,38 @@ #define BCM56995_A0_REV_ID 0x0001 #define BCM56995_B0_REV_ID 0x0011 +/* Tomahawk5 */ #define BCM78900_DEVICE_ID 0xf900 #define BCM78900_B0_REV_ID 0x0011 +#define BCM78902_DEVICE_ID 0xf902 +#define BCM78902_B0_REV_ID 0x0011 + +#define BCM78903_DEVICE_ID 0xf903 +#define BCM78903_B0_REV_ID 0x0011 + +/* Tomahawk5+ */ +#define BCM78905_DEVICE_ID 0xf905 +#define BCM78905_A0_REV_ID 0x0001 + +/* Firelight2 */ #define BCM56080_DEVICE_ID 0xb080 #define BCM56080_A0_REV_ID 0x0001 +#define BCM56080_A1_REV_ID 0x0002 #define BCM56081_DEVICE_ID 0xb081 #define BCM56081_A0_REV_ID 0x0001 +#define BCM56081_A1_REV_ID 0x0002 #define BCM56082_DEVICE_ID 0xb082 #define BCM56082_A0_REV_ID 0x0001 +#define BCM56082_A1_REV_ID 0x0002 #define BCM56083_DEVICE_ID 0xb083 #define BCM56083_A0_REV_ID 0x0001 +#define BCM56083_A1_REV_ID 0x0002 #define BCM56084_DEVICE_ID 0xb084 #define BCM56084_A0_REV_ID 0x0001 +#define BCM56084_A1_REV_ID 0x0002 +#define BCM56085_DEVICE_ID 0xb085 +#define BCM56085_A0_REV_ID 0x0001 +#define BCM56085_A1_REV_ID 0x0002 -#endif +#endif /* !_SOC_DEVIDS_H */ diff --git a/platform/broadcom/saibcm-modules/make/Make.config b/platform/broadcom/saibcm-modules/make/Make.config index 9a881329e669..163b085514fe 100644 --- a/platform/broadcom/saibcm-modules/make/Make.config +++ b/platform/broadcom/saibcm-modules/make/Make.config @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Make.config,v 1.3 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # ifneq ($(strip $(override-target)),) @@ -119,12 +116,14 @@ else # ifeq "$(HOSTTYPE)" "Windows2000PC" ifndef SDKBUILD SDKBUILD :=build endif + ifdef SDK_OUTDIR BLDROOT = ${SDK_OUTDIR}/${SDKBUILD}/$(if ${BLDCONFIG},${BLDCONFIG}/)${target}${all_suffix}${bldroot_suffix} export DEST_DIR := ${SDK_OUTDIR}/${SDKBUILD}$(if ${BLDCONFIG},/${BLDCONFIG})$(DEST_DIR_SUFFIX) else BLDROOT = ${SDK}/${SDKBUILD}/$(if ${BLDCONFIG},${BLDCONFIG}/)${target}${all_suffix}${bldroot_suffix} endif + endif # ifeq "$(HOSTTYPE)" "Windows2000PC" # This is needed because we cannot include Make.vxworks before Make.config diff --git a/platform/broadcom/saibcm-modules/make/Make.depend b/platform/broadcom/saibcm-modules/make/Make.depend index 802f5f4483c2..061468fd6fb6 100644 --- a/platform/broadcom/saibcm-modules/make/Make.depend +++ b/platform/broadcom/saibcm-modules/make/Make.depend @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Make.depend,v 1.14 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # # Default rule to build dependencies. This builds a x.d file for each # x.c file that describes the dependencies. We then conditionally include diff --git a/platform/broadcom/saibcm-modules/make/Make.kernlib b/platform/broadcom/saibcm-modules/make/Make.kernlib index 56752beca3b6..52f2b7215f6d 100644 --- a/platform/broadcom/saibcm-modules/make/Make.kernlib +++ b/platform/broadcom/saibcm-modules/make/Make.kernlib @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Make.kernlib,v 1.7 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # # Make rules/targets for handling libraries diff --git a/platform/broadcom/saibcm-modules/make/Make.lib b/platform/broadcom/saibcm-modules/make/Make.lib index a4f19aad9321..c0877fb7a36a 100644 --- a/platform/broadcom/saibcm-modules/make/Make.lib +++ b/platform/broadcom/saibcm-modules/make/Make.lib @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Make.lib,v 1.14 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # # Make rules/targets for handling libraries @@ -79,4 +76,4 @@ distclean:: clean ifeq ($(DNX_FAST_MODE),1) -include $(SDK)/tools/dnx/make/lib.mk -endif +endif \ No newline at end of file diff --git a/platform/broadcom/saibcm-modules/make/Make.linux b/platform/broadcom/saibcm-modules/make/Make.linux index ad18872a34eb..ff7fc026f87f 100644 --- a/platform/broadcom/saibcm-modules/make/Make.linux +++ b/platform/broadcom/saibcm-modules/make/Make.linux @@ -1,33 +1,30 @@ # -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# -# # $Id: Make.linux,v 1.18 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # # Common make targets for Linux user and kernel builds included by top # level Linux makefiles @@ -68,6 +65,10 @@ LINUX_MAKE_DIR := $(SDK)/systems/linux/kernel/common endif endif +ifneq (,$(findstring iproc,$(platform))) + ADD_TO_CFLAGS += -DINCLUDE_MTD +endif + ifdef LINUX_MAKE_USER CMD = $(LINUX_MAKE_FLAGS) -C $(LINUX_MAKE_DIR) \ platform=$(platform) bldroot_suffix=/$(platform) kernel_version=$(kernel_version) \ diff --git a/platform/broadcom/saibcm-modules/make/Make.subdirs b/platform/broadcom/saibcm-modules/make/Make.subdirs index 4016cb83202d..637f0d376c86 100644 --- a/platform/broadcom/saibcm-modules/make/Make.subdirs +++ b/platform/broadcom/saibcm-modules/make/Make.subdirs @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Make.subdirs,v 1.8 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # # Make rules/targets for handling subdirectories diff --git a/platform/broadcom/saibcm-modules/make/Make.tools b/platform/broadcom/saibcm-modules/make/Make.tools index 0d55eb2e653a..7f3a6d83296a 100644 --- a/platform/broadcom/saibcm-modules/make/Make.tools +++ b/platform/broadcom/saibcm-modules/make/Make.tools @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Make.tools,v 1.2 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# SYSNAME := $(shell uname -s) HCC ?=/usr/bin/gcc diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-gts b/platform/broadcom/saibcm-modules/make/Makefile.linux-gts index 293feaf979d6..f206b4d9a87a 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-gts +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-gts @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-xlr-4_19,v 0.1 Broadcom SDK $ -# $Copyright: (c) 2015 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # # XLR system make file. @@ -45,9 +42,9 @@ #endif # some basic path variables for tools and kernel source, etc # -XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/xlr-510 +XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/gcc12.2 TOOLCHAIN_DIR = $(XLR_TOOLS_BASE)/buildroot/host/usr -KERNDIR = $(XLR_TOOLS_BASE)/kernel/linux +KERNDIR ?= /projects/ntsw-tools/linux/xlr-510/kernel/linux # Target machine for EDK-Host defconfig TARGET_MACHINE ?= x86_64 @@ -72,7 +69,7 @@ export PATH := $(TOOLCHAIN_DIR)/bin:$(KERNDIR):$(PATH) CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_DIR)/bin/$(CROSS_COMPILE)gcc -dumpversion) export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include -# Glibc 2.27 or later version doesn't support SVID libm error handling. +# Glibc 2.27 or later version doesn't support SVID libm error handling. # Building tcl 8.3.3 with the new toolchain will occur errors. export TCL840 := 1 @@ -93,6 +90,10 @@ CFLAGS += -L$(TOOLCHAIN_DIR)/lib64 ifeq (1,$(USE_CLANG)) # CLANG-specific CFLAGS CFLAGS += -Wno-strlcpy-strlcat-size CFLAGS += -Wno-strncat-size +ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 12)" "1" +export LIBNSL_DEPRECATED := 1 +endif + else # GCC-specific CFLAGS CFLAGS += -Wno-error=unused-but-set-variable CFLAGS += -Wno-error=maybe-uninitialized @@ -116,6 +117,11 @@ ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f2 -d.` \== 2)" "1" CFLAGS += -Wno-zero-length-bounds endif endif +ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 12)" "1" + CFGFLAGS += -flarge-source-files + CFGFLAGS += -Wno-error=address + export LIBNSL_DEPRECATED := 1 +endif endif # Compiler-specific CFLAGS #XLDK-568 fix inline references @@ -131,7 +137,12 @@ CFLAGS += -Wno-deprecated-declarations #SDK-233174 # set up KFLAGS appropriately. # ifeq (,$(KFLAGS)) -KFLAGS := -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -I$(KERNDIR) -lc -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -funit-at-a-time -maccumulate-outgoing-args -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm -fconserve-stack +KFLAGS := -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -I$(KERNDIR) -lc -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm +ifneq (1,$(USE_CLANG)) +KFLAGS += -funit-at-a-time -maccumulate-outgoing-args -fconserve-stack +else +KFLAGS += -fno-pie +endif endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc index 9b08d0b2a3d4..c3648ed85816 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-iproc Exp $ -# $Copyright: (c) 2007 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # Makefile for iproc-CMICd # User must select one platform from below.By default ARM_LINUX is selected. . @@ -46,8 +43,8 @@ KERN_BASE_DIR ?= $(TOOLCHAIN_BASE_DIR) TARGET_ARCHITECTURE:=armeb-broadcom-linux-uclibcgnueabi KERNDIR ?= $(TOOLCHAIN_BASE_DIR)/kernel/linux else -TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/XLDK_GCC10/XLDK32 -KERN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk61/XLDK32 +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk62/XLDK32 +KERN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk62/XLDK32 TARGET_ARCHITECTURE:= arm-broadcom-linux-uclibcgnueabi KERNDIR ?= $(KERN_BASE_DIR)/kernel/linux endif @@ -96,6 +93,10 @@ ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \== 10)" "1" CFLAGS += -Wno-error=format-overflow CFLAGS += -fcommon endif +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \== 12)" "1" + CFLAGS += -flarge-source-files + CFLAGS += -Wno-error=address +endif CFGFLAGS += -D$(ENDIAN) -DIPROC_CMICD CFGFLAGS += -DBCM_PLATFORM_STRING=\"IPROC_CMICD\" @@ -125,7 +126,7 @@ modname_flags = $(if $(filter 1,$(words $(modname))),\ KFLAG_INCLD ?= $(LD_LIBRARY_PATH)/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include ifeq (,$(KFLAGS)) -KFLAGS := -D__LINUX_ARM_ARCH__=7 -D__KERNEL__ -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm/include -I$(KERNDIR)/arch/arm/include/generated -I$(KERNDIR)/arch/arm/mach-iproc/include -Wall -Wstrict-prototypes -Wno-trigraphs -Os -fno-strict-aliasing -fno-common -marm -mabi=aapcs-linux -fno-pic -pipe -msoft-float -ffreestanding -march=armv7-a -mfpu=vfp -mfloat-abi=softfp -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mlong-calls +KFLAGS := -D__LINUX_ARM_ARCH__=7 -D__KERNEL__ -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm/include -I$(KERNDIR)/arch/arm/include/generated -I$(KERNDIR)/arch/arm/mach-iproc/include -Wall -Wstrict-prototypes -Wno-trigraphs -Os -fno-strict-aliasing -fno-common -marm -mabi=aapcs-linux -fno-pic -pipe -msoft-float -ffreestanding -march=armv7-a -mfloat-abi=softfp -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mlong-calls KFLAGS += -I$(LINUX_INCLUDE)/uapi -I$(LINUX_INCLUDE)/generated/uapi -I$(KERNDIR)/arch/arm/include/uapi -I$(KERNDIR)/arch/arm/include/generated/uapi ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \== 10)" "1" diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14 b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14 index 8d9f66aa50a0..a71c3728b71e 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14 @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-iproc-3_6,v 1.1 Broadcom SDK $ -# $Copyright: (c) 2007 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # Makefile for iproc-CMICd # User must select one platform from below.By default ARM_LINUX is selected. . diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4 b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4 index bcef1ff69dd4..87e18c1a0591 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4 @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-iproc Exp $ -# $Copyright: (c) 2007 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # Makefile for iproc-CMICd # User must select one platform from below.By default ARM_LINUX is selected. . diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 index ac7915be93ee..077d0c80355b 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-iproc Exp $ -# $Copyright: (c) 2007 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # Makefile for iproc-CMICd # User must select one platform from below.By default ARM_LINUX is selected. . @@ -34,6 +31,11 @@ ifeq (,$(BUILD_PLATFORM)) BUILD_PLATFORM=ARM_LINUX endif +# Upgrade TCL version from default 8.3 to 8.4 +ifneq ($(ESW_CHIPS)$(LTSW_CHIPS),) +export TCL840 := 1 +endif + # TOOLCHAIN_BASE_DIR Toolchain base directory for iPROC-CMICd devices # TARGET_ARCHITECTURE Compiler for target architecture # KERNDIR Kernel directory for iPROC-CMICd devices @@ -45,8 +47,8 @@ KERN_BASE_DIR ?= $(TOOLCHAIN_BASE_DIR) TARGET_ARCHITECTURE ?= aarch64_be-broadcom-linux-uclibc KERNDIR ?= $(KERN_BASE_DIR)/kernel/linux else -TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/XLDK_GCC10/XLDK64 -KERN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk61/XLDK64 +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk62/XLDK64 +KERN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk62/XLDK64 TARGET_ARCHITECTURE ?= aarch64-broadcom-linux-uclibc KERNDIR ?= $(KERN_BASE_DIR)/kernel/linux endif @@ -56,7 +58,8 @@ CROSS_COMPILE:= $(TARGET_ARCHITECTURE)- endif # A72 tools -TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/bin +# JIRA SONIC-69062 +TOOLCHAIN_BIN_DIR ?= $(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/bin override PATH:=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/$(TARGET_ARCHITECTURE)/bin:$(TOOLCHAIN_BIN_DIR):$(PATH) LD_LIBRARY_PATH=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/lib export TOOLCHAIN_BIN_DIR LD_LIBRARY_PATH @@ -97,6 +100,10 @@ ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 10)" "1" CFLAGS += -Wno-error=format-overflow CFLAGS += -fcommon endif +ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 12)" "1" + CFLAGS += -flarge-source-files + CFLAGS += -Wno-error=address +endif CFGFLAGS += -D$(ENDIAN) -DIPROC_CMICD CFGFLAGS += -DBCM_PLATFORM_STRING=\"IPROC_CMICD\" diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel index 34663445b8a3..39f7e53e32eb 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-kernel,v 1.27 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # Configuration Flags diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6 index c0e8f084e9f0..94f25cf35868 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6 @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-kernel-2_6,v 1.40 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # Configuration Flags @@ -39,11 +36,11 @@ FEATURE_EXCLUDE_LIST = $(sort $(_FEATURE_EXCLUDE_LIST)) # Conditionally Replaces DEFAULT var ifeq ($(origin CC),default) -CC = $(LSRUN) $(CROSS_COMPILE)gcc +CC = $(strip $(LSRUN) $(CROSS_COMPILE)gcc) else # If using CLANG then revert the CC to default gcc tool ifeq ($(USE_CLANG),1) -CC = $(LSRUN) $(CROSS_COMPILE)gcc +CC = $(strip $(LSRUN) $(CROSS_COMPILE)gcc) endif endif @@ -53,6 +50,11 @@ endif ifeq ($(origin LD),default) LD = $(CROSS_COMPILE)ld +else +# If using CLANG then revert the LD to default gcc tool +ifeq ($(USE_CLANG),1) +LD = $(CROSS_COMPILE)ld +endif endif ifeq ($(origin AR),default) diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6 index a454ea16bad8..028c90744f28 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6 @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-kernel-3_6,v 1.2 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # Configuration Flags diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4 index 6fcb9a9d1590..24c0e2cf4d6e 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4 @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-kernel-2_6,v 1.40 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # Configuration Flags diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule b/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule index d3a41f3824b0..394ec9ebb85c 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-kmodule-3_6,v 1.2 Broadcom SDK $ -# $Copyright: (c) 2006 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # Due to the extensive use of driver libraries, the SDK usually builds # kernel modules from a precompiled object. To avoid various warnings @@ -39,6 +36,10 @@ # module symbol versions. The symbol source file should be passed to # this Makefile via the MODULE_SYM variable. +# +# Do not remove this assignment of LOCALDIR. +# It is used as an input flag for Make.config +LOCALDIR = . MODULE := $(MOD_NAME).o KMODULE := $(MOD_NAME).ko obj-m := $(MODULE) diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-slk b/platform/broadcom/saibcm-modules/make/Makefile.linux-slk index de6322fceb74..8b063166975a 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-slk +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-slk @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-slk-3_14,v 1.2 Broadcom SDK $ -# $Copyright: (c) 2013 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # Makefile for SLK(BCM957812) # User must select one platform from below.By default ARM_LINUX is selected. . @@ -34,6 +31,11 @@ ifeq (,$(BUILD_PLATFORM)) BUILD_PLATFORM=ARM_LINUX endif +# Upgrade TCL version from default 8.3 to 8.4 +ifneq ($(ESW_CHIPS)$(LTSW_CHIPS),) +export TCL840 := 1 +endif + # Toolchain base directory for NS2 XMC card ifeq (BE,$(ENDIAN_MODE)) TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/toolchains/slk/linaro-be diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6 index dbd51ee1f627..bffc823413bb 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6 @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-x86-common-2_6,v 1.13 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 ENDIAN = LE_HOST=1 diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 index 4b02aa53cda8..baa5253d5e14 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-x86-generic-common-2_6,v 1.2 Broadcom SDK $ -# $Copyright: (c) 2008 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # Default kernel source directory ifeq (,$(KERNDIR)) diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 index 2f6b54f1b994..636b9b90acf2 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-x86-smp_generic_64-2_6,v 1.5 Broadcom SDK $ -# $Copyright: (c) 2008 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# CFGFLAGS += -DLONGS_ARE_64BITS CFGFLAGS += -DPTRS_ARE_64BITS @@ -36,9 +33,11 @@ CFGFLAGS += -DSAL_SPL_LOCK_ON_IRQ include ${SDK}/make/Makefile.linux-x86-generic-common-2_6 ifeq (,$(KFLAGS)) -KFLAGS := -nostdinc -isystem $(SYSINC) -I$(KERNDIR)/include -I$(KERNDIR)/arch/x86/include -include $(AUTOCONF) -D__KERNEL__ -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Werror-implicit-function-declaration -Wno-format-security -fno-delete-null-pointer-checks -Os -m64 -mtune=generic -mno-red-zone -fno-pie -mcmodel=kernel -funit-at-a-time -maccumulate-outgoing-args -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -fno-stack-protector -fomit-frame-pointer -g -Wdeclaration-after-statement -Wno-pointer-sign +KFLAGS := -nostdinc -isystem $(SYSINC) -I$(KERNDIR)/include -I$(KERNDIR)/arch/x86/include -include $(AUTOCONF) -D__KERNEL__ -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Werror-implicit-function-declaration -Wno-format-security -fno-delete-null-pointer-checks -Os -m64 -mtune=generic -mno-red-zone -fno-pie -mcmodel=kernel -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -fno-stack-protector -fomit-frame-pointer -g -Wdeclaration-after-statement -Wno-pointer-sign +ifneq (1,$(USE_CLANG)) +KFLAGS += -funit-at-a-time -maccumulate-outgoing-args +endif endif - LINUX_UAPI = $(LINUX_INCLUDE)/uapi ifneq (,$(shell ls $(LINUX_UAPI) 2>/dev/null)) @@ -58,8 +57,10 @@ SYSTEM_INTERFACE ?= ngbde # Turn on direct register access if running on real hardware. ifeq (ngbde,$(SYSTEM_INTERFACE)) +ifeq (,$(EXTRA_SYSTEM_INTERFACES)) LTSW_ADD_CPPFLAGS += -DBCMDRD_CONFIG_MEMMAP_DIRECT=1 endif +endif export SYSTEM_INTERFACE endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr b/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr index 293feaf979d6..f206b4d9a87a 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr +++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr @@ -1,32 +1,29 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # $Id: Makefile.linux-xlr-4_19,v 0.1 Broadcom SDK $ -# $Copyright: (c) 2015 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # # XLR system make file. @@ -45,9 +42,9 @@ #endif # some basic path variables for tools and kernel source, etc # -XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/xlr-510 +XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/gcc12.2 TOOLCHAIN_DIR = $(XLR_TOOLS_BASE)/buildroot/host/usr -KERNDIR = $(XLR_TOOLS_BASE)/kernel/linux +KERNDIR ?= /projects/ntsw-tools/linux/xlr-510/kernel/linux # Target machine for EDK-Host defconfig TARGET_MACHINE ?= x86_64 @@ -72,7 +69,7 @@ export PATH := $(TOOLCHAIN_DIR)/bin:$(KERNDIR):$(PATH) CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_DIR)/bin/$(CROSS_COMPILE)gcc -dumpversion) export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include -# Glibc 2.27 or later version doesn't support SVID libm error handling. +# Glibc 2.27 or later version doesn't support SVID libm error handling. # Building tcl 8.3.3 with the new toolchain will occur errors. export TCL840 := 1 @@ -93,6 +90,10 @@ CFLAGS += -L$(TOOLCHAIN_DIR)/lib64 ifeq (1,$(USE_CLANG)) # CLANG-specific CFLAGS CFLAGS += -Wno-strlcpy-strlcat-size CFLAGS += -Wno-strncat-size +ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 12)" "1" +export LIBNSL_DEPRECATED := 1 +endif + else # GCC-specific CFLAGS CFLAGS += -Wno-error=unused-but-set-variable CFLAGS += -Wno-error=maybe-uninitialized @@ -116,6 +117,11 @@ ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f2 -d.` \== 2)" "1" CFLAGS += -Wno-zero-length-bounds endif endif +ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 12)" "1" + CFGFLAGS += -flarge-source-files + CFGFLAGS += -Wno-error=address + export LIBNSL_DEPRECATED := 1 +endif endif # Compiler-specific CFLAGS #XLDK-568 fix inline references @@ -131,7 +137,12 @@ CFLAGS += -Wno-deprecated-declarations #SDK-233174 # set up KFLAGS appropriately. # ifeq (,$(KFLAGS)) -KFLAGS := -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -I$(KERNDIR) -lc -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -funit-at-a-time -maccumulate-outgoing-args -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm -fconserve-stack +KFLAGS := -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -I$(KERNDIR) -lc -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm +ifneq (1,$(USE_CLANG)) +KFLAGS += -funit-at-a-time -maccumulate-outgoing-args -fconserve-stack +else +KFLAGS += -fno-pie +endif endif diff --git a/platform/broadcom/saibcm-modules/sdklt/Makefile b/platform/broadcom/saibcm-modules/sdklt/Makefile index e0084d260925..5b25a349b18c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/Makefile +++ b/platform/broadcom/saibcm-modules/sdklt/Makefile @@ -1,5 +1,5 @@ # -# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. +# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or @@ -54,11 +54,13 @@ endif BDE_BLDDIR := $(OUTPUT_DIR)/bde KNET_BLDDIR := $(OUTPUT_DIR)/knet KNETCB_BLDDIR := $(OUTPUT_DIR)/knetcb +BCMGENL_BLDDIR := $(OUTPUT_DIR)/bcmgenl +GENL_PACKET_BLDDIR := $(OUTPUT_DIR)/genl-packet LKM_CFLAGS += -UNGKNET_NETIF_MAX -DNGKNET_NETIF_MAX=1056 -UNGKNET_FILTER_MAX -DNGKNET_FILTER_MAX=1025 export LKM_CFLAGS -kmod: bde knet knetcb +kmod: bde knet knetcb genl-packet bcmgenl bde: $(MAKE) -C $(SDK)/linux/bde SDK=$(SDK) \ @@ -74,15 +76,27 @@ knet: bde knetcb: knet $(MAKE) -C $(SDK)/linux/knetcb SDK=$(SDK) \ KBUILD_EXTRA_SYMBOLS=$(KNET_BLDDIR)/Module.symvers \ - KBUILD_EXTRA_SYMBOLS+=$(PSAMPLE_SYMVERS) \ LKM_BLDDIR=$(KNETCB_BLDDIR) $(TARGET) ln -sf $(KNETCB_BLDDIR)/*.ko $(OUTPUT_DIR) +bcmgenl: knet genl-packet + $(MAKE) -C $(SDK)/linux/bcmgenl SDK=$(SDK) \ + KBUILD_EXTRA_SYMBOLS=$(KNET_BLDDIR)/Module.symvers \ + KBUILD_EXTRA_SYMBOLS+=$(GENL_PACKET_BLDDIR)/Module.symvers \ + LKM_BLDDIR=$(BCMGENL_BLDDIR) $(TARGET) + ln -sf $(BCMGENL_BLDDIR)/*.ko $(OUTPUT_DIR) + +genl-packet: + $(MAKE) -C $(SDK)/linux/genl-packet SDK=$(SDK) \ + LKM_BLDDIR=$(GENL_PACKET_BLDDIR) $(TARGET) + ln -sf $(GENL_PACKET_BLDDIR)/*.ko $(OUTPUT_DIR) + clean: - $(MAKE) kmod TARGET=clean + $(MAKE) kmod TARGET=$@ rm -f $(OUTPUT_DIR)/*.ko distclean: + $(MAKE) kmod TARGET=$@ rm -rf $(OUTPUT_DIR) -.PHONY: help kmod bde knet knetcb clean distclean +.PHONY: help kmod bde knet knetcb genl-packet bcmgenl clean distclean diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c index 7b71dd745ca6..4f40652ae2a7 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c new file mode 100644 index 000000000000..d5d70130278f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c @@ -0,0 +1,38 @@ +/*! \file bcm56690_a0_pdma_attach.c + * + * Initialize PDMA driver resources. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include +#include +#include + +int +bcm56690_a0_cnet_pdma_attach(struct pdma_dev *dev) +{ + return bcmcnet_cmicx_pdma_driver_attach(dev); +} + +int +bcm56690_a0_cnet_pdma_detach(struct pdma_dev *dev) +{ + return bcmcnet_cmicx_pdma_driver_detach(dev); +} + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c index 4edd614c2a07..dffcfd1e435a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c index d803f27827a2..acfb129b1f6f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c index f5297b1bcfcc..1cb85aba6e79 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c index 4e7626a2b414..0910602e8ab2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c index 95b1b3adb601..257ccb91fd80 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c index 1ec4e3a9f414..710068c7adf2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c index c881a7a37266..2edfc9cb4e4b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c index 47b83a495538..048dc4390f79 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c index 2aee042564f3..1d2a9f1b3cfd 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c index e09f04d9b44f..19ebd22a7cad 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c new file mode 100644 index 000000000000..9d7712f46167 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c @@ -0,0 +1,38 @@ +/*! \file bcm78905_a0_pdma_attach.c + * + * Initialize PDMA driver resources. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include +#include +#include + +int +bcm78905_a0_cnet_pdma_attach(struct pdma_dev *dev) +{ + return bcmcnet_cmicr_pdma_driver_attach(dev); +} + +int +bcm78905_a0_cnet_pdma_detach(struct pdma_dev *dev) +{ + return bcmcnet_cmicr_pdma_driver_detach(dev); +} + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c index b887a2b829a7..6479583839f6 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -100,16 +100,7 @@ cmicd_pdma_hw_init(struct pdma_hw *hw) hw->dev->mode = DEV_MODE_UNET; } - /* - * FIXME: SDKLT-27954 SDKLT-27956 - * - * credit release is invoked by cmic_edb_credit_refresh() in - * bcmtm_internal_port_up(). - * - * But, bcmtm_internal_port_up() is missed in bcm56960_a0. - * - * Need to remove credit release once all CMICd chipsets are fixed. - */ + /* Release credits to EP. Only do this once when HW is initialized. */ hw->hdls.reg_rd32(hw, CMICD_EPINTF_RELEASE_CREDITS, &val); diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c index e78e3ae26668..099dbbbbd9cd 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c @@ -38,7 +38,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c new file mode 100644 index 000000000000..3c58900dd334 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c @@ -0,0 +1,369 @@ +/*! \file bcmcnet_cmicr2_pdma_rxtx.c + * + * Utility routines for BCMCNET hardware (CMICr2) specific Tx. + * All others leverage CMICr stuffs. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include +#include +#include +#include +#include + +#define TX_DCB_STAT_SET(r, f) TX_DCB_SET(r, 3, f) +#define TX_DCB_CTRL_HGf_SET(r) TX_DCB_HGf_SET(r, 1) +#define TX_DCB_CTRL_HGf_CLR(r) TX_DCB_HGf_SET(r, 0) +#define TX_DCB_CTRL_PURGEf_SET(r) (r).tx_dcb[2] |= 1 << 23 +#define TX_DCB_CTRL_PURGEf_CLR(r) (r).tx_dcb[2] &= ~(1 << 23) +#define TX_DCB_CTRL_PROFf_SET(r, f) (r).tx_dcb[2] = ((r).tx_dcb[2] & ~(0x7 << 20)) | (((f) & 0x7) << 20) + +/*! + * Configure Tx descriptor + */ +static inline void +cmicr2_tx_desc_config(volatile TX_DCB_t *td, uint64_t addr, uint32_t len, + uint32_t prof, uint16_t flags) +{ + TX_DCB_ADDR_LOf_SET(*td, addr); + TX_DCB_ADDR_HIf_SET(*td, DMA_TO_BUS_HI(addr >> 32)); + TX_DCB_STAT_SET(*td, 0); + + if (flags & PDMA_TX_HIGIG_PKT) { + TX_DCB_CTRL_HGf_SET(*td); + } else { + TX_DCB_CTRL_HGf_CLR(*td); + } + if (flags & PDMA_TX_PURGE_PKT) { + TX_DCB_CTRL_PURGEf_SET(*td); + } else { + TX_DCB_CTRL_PURGEf_CLR(*td); + } + TX_DCB_CTRL_PROFf_SET(*td, prof); + TX_DCB_BYTE_COUNTf_SET(*td, len); + + MEMORY_BARRIER; +} + +/*! + * Chain Tx descriptor + */ +static inline void +cmicr2_tx_desc_chain(volatile TX_DCB_t *td, int chain) +{ + if (chain) { + TX_DCB_CHAINf_SET(*td, 1); + } else { + TX_DCB_CHAINf_SET(*td, 0); + } + + MEMORY_BARRIER; +} + +/*! + * Get unused descriptors in a Tx ring + */ +static inline int +cmicr2_pdma_tx_ring_unused(struct pdma_tx_queue *txq) +{ + /* Leave one descriptor unused so as not to halt */ + return (txq->nb_desc + txq->dirt - txq->curr - 1) % txq->nb_desc; +} + +/*! + * Fetch Tx vring + */ +static int +cmicr2_pdma_tx_vring_fetch(struct pdma_hw *hw, struct pdma_tx_queue *txq, + struct pdma_tx_buf *pbuf) +{ + struct pdma_dev *dev = hw->dev; + volatile TX_DCB_t *ring = (volatile TX_DCB_t *)txq->ring; + struct pdma_tx_queue *vtxq = NULL; + volatile TX_DCB_t *vring = NULL; + uint32_t rm; + + vtxq = (struct pdma_tx_queue *)dev->ctrl.vnet_txq[txq->queue_id]; + vring = (volatile TX_DCB_t *)vtxq->ring; + if (!vring || !TX_DCB_BYTE_COUNTf_GET(vring[vtxq->curr])) { + return SHR_E_UNAVAIL; + } + + /* Fetch vring descriptor */ + rm = TX_DCB_DESC_REMAINf_GET(ring[txq->curr]); + TX_DCB_SET(ring[txq->curr], 0, TX_DCB_GET(vring[vtxq->curr], 0)); + TX_DCB_SET(ring[txq->curr], 1, TX_DCB_GET(vring[vtxq->curr], 1)); + TX_DCB_SET(ring[txq->curr], 2, TX_DCB_GET(vring[vtxq->curr], 2)); + TX_DCB_SET(ring[txq->curr], 3, TX_DCB_GET(vring[vtxq->curr], 3)); + TX_DCB_DESC_REMAINf_SET(ring[txq->curr], rm); + TX_DCB_BYTE_COUNTf_SET(vring[vtxq->curr], 0); + + MEMORY_BARRIER; + + pbuf->dma = TX_DCB_ADDR_LOf_GET(vring[vtxq->curr]); + pbuf->len = TX_DCB_BYTE_COUNTf_GET(ring[txq->curr]); + vtxq->curr = (vtxq->curr + 1) % vtxq->nb_desc; + + return SHR_E_NONE; +} + +/*! + * Check Tx ring + */ +static inline int +cmicr2_pdma_tx_ring_check(struct pdma_hw *hw, struct pdma_tx_queue *txq) +{ + struct pdma_dev *dev = hw->dev; + + if (dev->suspended) { + txq->stats.xoffs++; + if (dev->tx_suspend) { + dev->tx_suspend(dev, txq->queue_id); + return SHR_E_BUSY; + } + if (!(txq->state & PDMA_TX_QUEUE_POLL)) { + return SHR_E_BUSY; + } + } + + if (cmicr2_pdma_tx_ring_unused(txq)) { + return SHR_E_NONE; + } + + sal_spinlock_lock(txq->lock); + if (!cmicr2_pdma_tx_ring_unused(txq)) { + txq->status |= PDMA_TX_QUEUE_XOFF; + txq->stats.xoffs++; + if (dev->tx_suspend) { + dev->tx_suspend(dev, txq->queue_id); + } + sal_spinlock_unlock(txq->lock); + return SHR_E_BUSY; + } + sal_spinlock_unlock(txq->lock); + + return SHR_E_NONE; +} + +/*! + * \brief Start packet transmission + * + * \param [in] hw HW structure point. + * \param [in] txq Tx queue structure point. + * \param [in] buf Tx packet buffer. + * + * \retval SHR_E_NONE No errors. + * \retval SHR_E_XXXX Operation failed. + */ +static int +cmicr2_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf) +{ + struct pdma_dev *dev = hw->dev; + struct pdma_buf_mngr *bm = (struct pdma_buf_mngr *)dev->ctrl.buf_mngr; + volatile TX_DCB_t *ring = (volatile TX_DCB_t *)txq->ring; + struct pdma_tx_buf *pbuf = NULL; + struct pkt_hdr *pkh = NULL; + dma_addr_t addr; + uint32_t curr; + int retry = 5000000; + int rv; + + if (dev->tx_suspend) { + sal_spinlock_lock(txq->mutex); + } else { + rv = sal_sem_take(txq->sem, BCMCNET_TX_RSRC_WAIT_USEC); + if (rv == -1) { + CNET_ERROR(hw->unit, "Timeout waiting for Tx resources\n"); + return SHR_E_TIMEOUT; + } + } + + /* Check Tx resource */ + if (dev->tx_suspend) { + /* Suspend Tx if no resource */ + rv = cmicr2_pdma_tx_ring_check(hw, txq); + if (SHR_FAILURE(rv)) { + sal_spinlock_unlock(txq->mutex); + return rv; + } + } else { + /* Abort Tx if a fatal error happened */ + if (txq->status & PDMA_TX_QUEUE_XOFF) { + sal_sem_give(txq->sem); + return SHR_E_RESOURCE; + } + } + + /* Setup the new descriptor */ + curr = txq->curr; + pbuf = &txq->pbuf[curr]; + if (dev->mode == DEV_MODE_HNET && !buf) { + rv = cmicr2_pdma_tx_vring_fetch(hw, txq, pbuf); + if (SHR_FAILURE(rv)) { + sal_spinlock_unlock(txq->mutex); + return SHR_E_EMPTY; + } + txq->state |= PDMA_TX_QUEUE_BUSY; + } else { + pbuf->adj = 1; + pkh = bm->tx_buf_get(dev, txq, pbuf, buf); + if (!pkh) { + txq->stats.dropped++; + if (dev->tx_suspend) { + sal_spinlock_unlock(txq->mutex); + } else { + sal_sem_give(txq->sem); + } + return SHR_E_RESOURCE; + } + bm->tx_buf_dma(dev, txq, pbuf, &addr); + cmicr2_tx_desc_config(&ring[curr], addr, pbuf->len, pkh->hdr_prof, pkh->attrs); + } + + /* Notify HNET to process if needed */ + if (dev->mode == DEV_MODE_VNET) { + if (!TX_DCB_BYTE_COUNTf_GET(ring[(curr + txq->nb_desc - 1) % txq->nb_desc])) { + dev->xnet_wake(dev); + } + } + + /* Update the indicators */ + curr = (curr + 1) % txq->nb_desc; + txq->curr = curr; + + /* Start DMA if in chain mode */ + if (dev->flags & PDMA_CHAIN_MODE) { + if (txq->state & PDMA_TX_QUEUE_POLL) { + do { + rv = hw->dops.tx_ring_clean(hw, txq, txq->nb_desc - 1); + if (rv != (int)txq->nb_desc - 1) { + break; + } + sal_usleep(1); + } while (retry--); + if (retry < 0) { + CNET_ERROR(hw->unit, "Last Tx could not get done in given time\n"); + } + } + sal_spinlock_lock(txq->lock); + if (txq->dirt == txq->halt && txq->dirt != curr) { + hw->hdls.chan_stop(hw, txq->chan_id); + cmicr2_tx_desc_chain(&ring[(curr + txq->nb_desc - 1) % txq->nb_desc], 0); + hw->hdls.chan_setup(hw, txq->chan_id, + txq->ring_addr + sizeof(TX_DCB_t) * txq->halt); + hw->hdls.chan_start(hw, txq->chan_id); + txq->halt = curr; + } + sal_spinlock_unlock(txq->lock); + } + + /* Kick off DMA */ + txq->halt_addr = txq->ring_addr + sizeof(TX_DCB_t) * curr; + hw->hdls.chan_goto(hw, txq->chan_id, txq->halt_addr); + + /* Count the packets/bytes */ + txq->stats.packets++; + txq->stats.bytes += pbuf->len; + + /* Clean up ring if in polling mode */ + if (txq->state & PDMA_TX_QUEUE_POLL && + cmicr2_pdma_tx_ring_unused(txq) <= (int)txq->free_thresh) { + hw->dops.tx_ring_clean(hw, txq, dev->ctrl.budget); + } + + /* Suspend Tx if no resource */ + rv = cmicr2_pdma_tx_ring_check(hw, txq); + if (SHR_FAILURE(rv)) { + if (dev->mode == DEV_MODE_VNET) { + dev->xnet_wake(dev); + } + + if (txq->state & PDMA_TX_QUEUE_POLL) { + /* In polling mode, must wait till the ring is available */ + do { + hw->dops.tx_ring_clean(hw, txq, dev->ctrl.budget); + if (!(txq->status & PDMA_TX_QUEUE_XOFF) || + !(txq->state & PDMA_TX_QUEUE_ACTIVE)) { + break; + } + sal_usleep(1); + } while (retry--); + if (retry < 0) { + CNET_ERROR(hw->unit, "Fatal error: Tx ring is full, packets can not been transmitted\n"); + if (!dev->tx_suspend) { + sal_sem_give(txq->sem); + return SHR_E_RESOURCE; + } + } + } else { + /* In interrupt mode, the handle thread will wake up Tx */ + if (!dev->tx_suspend) { + return SHR_E_NONE; + } + } + } + + if (dev->tx_suspend) { + sal_spinlock_unlock(txq->mutex); + } else { + sal_sem_give(txq->sem); + } + + return SHR_E_NONE; +} + +/*! + * Attach device driver + */ +int +bcmcnet_cmicr2_pdma_driver_attach(struct pdma_dev *dev) +{ + struct pdma_hw *hw = NULL; + + /* Allocate memory for HW data */ + hw = sal_alloc(sizeof(*hw), "bcmcnetPdmaHw"); + if (!hw) { + return SHR_E_MEMORY; + } + sal_memset(hw, 0, sizeof(*hw)); + hw->unit = dev->unit; + hw->dev = dev; + dev->ctrl.hw = hw; + + bcmcnet_cmicr_pdma_hw_hdls_init(hw); + bcmcnet_cmicr_pdma_desc_ops_init(hw); + + hw->dops.pkt_xmit = cmicr2_pdma_pkt_xmit; + + return SHR_E_NONE; +} + +/*! + * Detach device driver + */ +int +bcmcnet_cmicr2_pdma_driver_detach(struct pdma_dev *dev) +{ + if (dev->ctrl.hw) { + sal_free(dev->ctrl.hw); + } + dev->ctrl.hw = NULL; + + return SHR_E_NONE; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c index 99f1d7276cfc..5fe7cfcb0d16 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -165,6 +165,7 @@ cmicr_pdma_hw_config(struct pdma_hw *hw) CMIC_CMC_PKTDMA_INTR_ENABLEr_t pktdma_intr_enable; CMIC_CMC_PKTDMA_INTR_CLRr_t pktdma_intr_clr; CMIC_TOP_CONFIGr_t cmic_config; + CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_t pktdma_rxbuf_thresh; CMIC_CMC_PKTDMA_INTR_ENABLEr_CLR(pktdma_intr_enable); CMIC_CMC_PKTDMA_INTR_ENABLEr_DESC_CONTROLLED_INTR_ENABLEf_SET(pktdma_intr_enable, 1); @@ -181,6 +182,11 @@ cmicr_pdma_hw_config(struct pdma_hw *hw) que = rxq->chan_id % CMICR_PDMA_CMC_CHAN; que_ctrl = ctrl->grp[grp].que_ctrl[que]; + hw->hdls.reg_rd32(hw, CMICR_PDMA_RBUF_THRE(grp, que), + &CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_GET(pktdma_rxbuf_thresh)); + CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_ENABLEf_SET(pktdma_rxbuf_thresh, 1); + hw->hdls.reg_wr32(hw, CMICR_PDMA_RBUF_THRE(grp, que), + CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_GET(pktdma_rxbuf_thresh)); hw->hdls.reg_wr32(hw, CMICR_PDMA_INTR_CLR(grp, que), CMIC_CMC_PKTDMA_INTR_CLRr_GET(pktdma_intr_clr)); CMIC_CMC_PKTDMA_CTRLr_CLR(pktdma_ctrl); diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c index 381b9e208446..024a258c78bb 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c @@ -38,7 +38,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -519,6 +519,7 @@ cmicr_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg /* Move forward */ if (!(rxq->state & PDMA_RX_BATCH_REFILL)) { + /* coverity[double_lock : FALSE] */ sal_spinlock_lock(rxq->lock); if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) { /* Descriptor cherry pick */ @@ -566,7 +567,8 @@ cmicr_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg rxq->stats.bytes += len; /* Count the errors if any */ - if (RX_DCB_ERRORf_GET(ring[curr])) { + if (RX_DCB_CELL_ERRORf_GET(ring[curr]) || + RX_DCB_ECC_ERRORf_GET(ring[curr])) { rxq->stats.errors++; } @@ -631,6 +633,7 @@ cmicr_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg /* Restart DMA if in chain mode */ if (dev->flags & PDMA_CHAIN_MODE) { + /* coverity[double_lock : FALSE] */ sal_spinlock_lock(rxq->lock); if (curr == 0 && !(rxq->status & PDMA_RX_QUEUE_XOFF)) { hw->hdls.chan_stop(hw, rxq->chan_id); @@ -754,6 +757,7 @@ cmicr_pdma_tx_ring_clean(struct pdma_hw *hw, struct pdma_tx_queue *txq, int budg /* One more poll for chain done in chain mode */ if (dev->flags & PDMA_CHAIN_MODE) { + /* coverity[double_lock : FALSE] */ sal_spinlock_lock(txq->lock); if (dirt != txq->halt) { done = budget; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c index f43dc9a3ed65..90ab735a23e8 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c index 0eaf26890e43..b7058b9f376a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c @@ -38,7 +38,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h index 1811ca44c33c..066ac59e3ce5 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h index 6f74d7fb1895..df547b3f140a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -150,7 +150,7 @@ #define CMICR_HW_RETRY_TIMES 100000 /*! Max remaining descriptors */ -#define CMICR_DESC_REMAIN_MAX 8 +#define CMICR_DESC_REMAIN_MAX 63 /*! * \brief Initialize HW handles. diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h new file mode 100644 index 000000000000..ddba32303371 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h @@ -0,0 +1,50 @@ +/*! \file bcmcnet_cmicr2.h + * + * BCMCNET CMICr2 specific definitions and declarations. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMCNET_CMICR2_H +#define BCMCNET_CMICR2_H + +#include + +/*! + * \brief Attach device driver. + * + * \param [in] dev Device structure point. + * + * \retval SHR_E_NONE No errors. + * \retval SHR_E_XXXX Operation failed. + */ +extern int +bcmcnet_cmicr2_pdma_driver_attach(struct pdma_dev *dev); + +/*! + * \brief Detach device driver. + * + * \param [in] dev Device structure point. + * + * \retval SHR_E_NONE No errors. + * \retval SHR_E_XXXX Operation failed. + */ +extern int +bcmcnet_cmicr2_pdma_driver_detach(struct pdma_dev *dev); + +#endif /* BCMCNET_CMICR2_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h index 9bd736d5694d..768956b07c49 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h @@ -6,7 +6,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -728,16 +728,18 @@ typedef union TX_DCB_s { #define TX_DCB_RELOADf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 18)) | ((((uint32_t)f) & 0x1) << 18)) #define TX_DCB_HGf_GET(r) ((((r).tx_dcb[2]) >> 19) & 0x1) #define TX_DCB_HGf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 19)) | ((((uint32_t)f) & 0x1) << 19)) +#define TX_DCB_ALIGN_BYTESf_GET(r) ((((r).tx_dcb[2]) >> 20) & 0x3) +#define TX_DCB_ALIGN_BYTESf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x3 << 20)) | ((((uint32_t)f) & 0x3) << 20)) #define TX_DCB_PURGEf_GET(r) ((((r).tx_dcb[2]) >> 22) & 0x1) #define TX_DCB_PURGEf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 22)) | ((((uint32_t)f) & 0x1) << 22)) #define TX_DCB_DESC_DONE_INTRf_GET(r) ((((r).tx_dcb[2]) >> 23) & 0x1) #define TX_DCB_DESC_DONE_INTRf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 23)) | ((((uint32_t)f) & 0x1) << 23)) #define TX_DCB_DESC_CTRL_INTRf_GET(r) ((((r).tx_dcb[2]) >> 24) & 0x1) #define TX_DCB_DESC_CTRL_INTRf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 24)) | ((((uint32_t)f) & 0x1) << 24)) -#define TX_DCB_DESC_REMAINf_GET(r) ((((r).tx_dcb[2]) >> 25) & 0xf) -#define TX_DCB_DESC_REMAINf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0xf << 25)) | ((((uint32_t)f) & 0xf) << 25)) -#define TX_DCB_DESC_STAT_WR_DISABLEf_GET(r) ((((r).tx_dcb[2]) >> 29) & 0x1) -#define TX_DCB_DESC_STAT_WR_DISABLEf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 29)) | ((((uint32_t)f) & 0x1) << 29)) +#define TX_DCB_DESC_REMAINf_GET(r) ((((r).tx_dcb[2]) >> 25) & 0x3f) +#define TX_DCB_DESC_REMAINf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x3f << 25)) | ((((uint32_t)f) & 0x3f) << 25)) +#define TX_DCB_DESC_STAT_WR_DISABLEf_GET(r) ((((r).tx_dcb[2]) >> 31) & 0x1) +#define TX_DCB_DESC_STAT_WR_DISABLEf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31)) #define TX_DCB_ADDR_HIf_GET(r) ((r).tx_dcb[1]) #define TX_DCB_ADDR_HIf_SET(r,f) (r).tx_dcb[1]=((uint32_t)f) #define TX_DCB_ADDR_LOf_GET(r) ((r).tx_dcb[0]) @@ -763,8 +765,10 @@ typedef union RX_DCB_s { #define RX_DCB_END_BITf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 16)) | ((((uint32_t)f) & 0x1) << 16)) #define RX_DCB_START_BITf_GET(r) ((((r).rx_dcb[3]) >> 17) & 0x1) #define RX_DCB_START_BITf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 17)) | ((((uint32_t)f) & 0x1) << 17)) -#define RX_DCB_ERRORf_GET(r) ((((r).rx_dcb[3]) >> 18) & 0x1) -#define RX_DCB_ERRORf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 18)) | ((((uint32_t)f) & 0x1) << 18)) +#define RX_DCB_CELL_ERRORf_GET(r) ((((r).rx_dcb[3]) >> 18) & 0x1) +#define RX_DCB_CELL_ERRORf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 18)) | ((((uint32_t)f) & 0x1) << 18)) +#define RX_DCB_ECC_ERRORf_GET(r) ((((r).rx_dcb[3]) >> 19) & 0x1) +#define RX_DCB_ECC_ERRORf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 19)) | ((((uint32_t)f) & 0x1) << 19)) #define RX_DCB_DONEf_GET(r) ((((r).rx_dcb[3]) >> 31) & 0x1) #define RX_DCB_DONEf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31)) #define RX_DCB_BYTE_COUNTf_GET(r) (((r).rx_dcb[2]) & 0xffff) @@ -775,14 +779,16 @@ typedef union RX_DCB_s { #define RX_DCB_SGf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 17)) | ((((uint32_t)f) & 0x1) << 17)) #define RX_DCB_RELOADf_GET(r) ((((r).rx_dcb[2]) >> 18) & 0x1) #define RX_DCB_RELOADf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 18)) | ((((uint32_t)f) & 0x1) << 18)) +#define RX_DCB_ALIGN_BYTESf_GET(r) ((((r).rx_dcb[2]) >> 20) & 0x3) +#define RX_DCB_ALIGN_BYTESf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x3 << 20)) | ((((uint32_t)f) & 0x3) << 20)) #define RX_DCB_DESC_DONE_INTRf_GET(r) ((((r).rx_dcb[2]) >> 23) & 0x1) #define RX_DCB_DESC_DONE_INTRf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 23)) | ((((uint32_t)f) & 0x1) << 23)) #define RX_DCB_DESC_CTRL_INTRf_GET(r) ((((r).rx_dcb[2]) >> 24) & 0x1) #define RX_DCB_DESC_CTRL_INTRf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 24)) | ((((uint32_t)f) & 0x1) << 24)) -#define RX_DCB_DESC_REMAINf_GET(r) ((((r).rx_dcb[2]) >> 25) & 0xf) -#define RX_DCB_DESC_REMAINf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0xf << 25)) | ((((uint32_t)f) & 0xf) << 25)) -#define RX_DCB_DESC_STAT_WR_DISABLEf_GET(r) ((((r).rx_dcb[2]) >> 29) & 0x1) -#define RX_DCB_DESC_STAT_WR_DISABLEf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 29)) | ((((uint32_t)f) & 0x1) << 29)) +#define RX_DCB_DESC_REMAINf_GET(r) ((((r).rx_dcb[2]) >> 25) & 0x3f) +#define RX_DCB_DESC_REMAINf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x3f << 25)) | ((((uint32_t)f) & 0x3f) << 25)) +#define RX_DCB_DESC_STAT_WR_DISABLEf_GET(r) ((((r).rx_dcb[2]) >> 31) & 0x1) +#define RX_DCB_DESC_STAT_WR_DISABLEf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31)) #define RX_DCB_ADDR_HIf_GET(r) ((r).rx_dcb[1]) #define RX_DCB_ADDR_HIf_SET(r,f) (r).rx_dcb[1]=((uint32_t)f) #define RX_DCB_ADDR_LOf_GET(r) ((r).rx_dcb[0]) diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h index 75d61c7a38bf..1fe344038def 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h index 82341cac7b7a..e255ec0d84eb 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -45,8 +45,8 @@ struct pkt_hdr { /*! Data length */ uint16_t data_len; - /*! Reserved */ - uint16_t rsvd2; + /*! Header profile */ + uint16_t hdr_prof; /*! Meta length */ uint8_t meta_len; @@ -129,6 +129,9 @@ struct intr_handle { /*! Interrupt flags */ uint32_t intr_flags; + + /*! Extra polling after queue is empty */ + bool extra_poll; }; /*! @@ -918,6 +921,9 @@ struct pdma_dev { /*! Abort PDMA mode for suspend and resume */ #define PDMA_ABORT (1 << 6) + /*! Extra poll time in microseconds */ + int extra_poll_time; + /*! Device mode */ dev_mode_t mode; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h index 2a316531f1e0..0eeedb8c5a5d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h index 6a4495a84bb8..9b877502da18 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h index cd3eb1afe933..cb41361a3296 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h index 67b0c3578d83..54001f9c31d1 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c index 4a1125548b03..ed5d99b92add 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c index ab91bdfd0760..1501c487e4f3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -67,11 +67,11 @@ bcn_rx_queues_alloc(struct pdma_dev *dev) if (!rxq) { goto error; } + ctrl->grp[gi].rx_queue[qi] = rxq; sal_memset(rxq, 0, sizeof(*rxq)); rxq->group_id = gi; rxq->chan_id = qi + gi * dev->grp_queues; rxq->ctrl = ctrl; - ctrl->grp[gi].rx_queue[qi] = rxq; if (dev->mode == DEV_MODE_HNET) { vrxq = sal_alloc(sizeof(*vrxq), "bcmcnetVnetRxQueue"); if (!vrxq) { @@ -139,6 +139,7 @@ bcn_tx_queues_alloc(struct pdma_dev *dev) if (!txq) { goto error; } + ctrl->grp[gi].tx_queue[qi] = txq; sal_memset(txq, 0, sizeof(*txq)); txq->group_id = gi; txq->chan_id = qi + gi * dev->grp_queues; @@ -147,7 +148,6 @@ bcn_tx_queues_alloc(struct pdma_dev *dev) if (!txq->sem) { goto error; } - ctrl->grp[gi].tx_queue[qi] = txq; if (dev->mode == DEV_MODE_HNET) { vtxq = sal_alloc(sizeof(*vtxq), "bcmcnetVnetTxQueue"); if (!vtxq) { diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c index 6f42236eb08f..ed1df8faf37b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c +++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h index 5ede02035a9c..35b3cf58e307 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h @@ -4,7 +4,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/drd/instpkgs.pl * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -41,26 +41,47 @@ #define BCM56080_VENDOR_ID 0x14e4 #define BCM56080_DEVICE_ID 0xb080 #define BCM56080_REV_A0 0x01 +#define BCM56080_REV_A1 0x02 /* BCM56081 */ #define BCM56081_VENDOR_ID 0x14e4 #define BCM56081_DEVICE_ID 0xb081 #define BCM56081_REV_A0 0x01 +#define BCM56081_REV_A1 0x02 /* BCM56082 */ #define BCM56082_VENDOR_ID 0x14e4 #define BCM56082_DEVICE_ID 0xb082 #define BCM56082_REV_A0 0x01 +#define BCM56082_REV_A1 0x02 /* BCM56083 */ #define BCM56083_VENDOR_ID 0x14e4 #define BCM56083_DEVICE_ID 0xb083 #define BCM56083_REV_A0 0x01 +#define BCM56083_REV_A1 0x02 /* BCM56084 */ #define BCM56084_VENDOR_ID 0x14e4 #define BCM56084_DEVICE_ID 0xb084 #define BCM56084_REV_A0 0x01 +#define BCM56084_REV_A1 0x02 + +/* BCM56085 */ +#define BCM56085_VENDOR_ID 0x14e4 +#define BCM56085_DEVICE_ID 0xb085 +#define BCM56085_REV_A0 0x01 +#define BCM56085_REV_A1 0x02 + +/* BCM56690 */ +#define BCM56690_VENDOR_ID 0x14e4 +#define BCM56690_DEVICE_ID 0xb690 +#define BCM56690_REV_A0 0x01 + +/* BCM56692 */ +#define BCM56692_VENDOR_ID 0x14e4 +#define BCM56692_DEVICE_ID 0xb692 +#define BCM56692_REV_A0 0x01 /* BCM56780 */ #define BCM56780_VENDOR_ID 0x14e4 @@ -71,6 +92,7 @@ #define BCM56782_VENDOR_ID 0x14e4 #define BCM56782_DEVICE_ID 0xb782 #define BCM56782_REV_A0 0x01 +#define BCM56782_REV_A1 0x02 /* BCM56784 */ #define BCM56784_VENDOR_ID 0x14e4 @@ -86,16 +108,19 @@ #define BCM56786_VENDOR_ID 0x14e4 #define BCM56786_DEVICE_ID 0xb786 #define BCM56786_REV_A0 0x01 +#define BCM56786_REV_A1 0x02 /* BCM56787 */ #define BCM56787_VENDOR_ID 0x14e4 #define BCM56787_DEVICE_ID 0xb787 #define BCM56787_REV_A0 0x01 +#define BCM56787_REV_A1 0x02 /* BCM56788 */ #define BCM56788_VENDOR_ID 0x14e4 #define BCM56788_DEVICE_ID 0xb788 #define BCM56788_REV_A0 0x01 +#define BCM56788_REV_A1 0x02 /* BCM56789 */ #define BCM56789_VENDOR_ID 0x14e4 @@ -200,10 +225,20 @@ #define BCM78900_DEVICE_ID 0xf900 #define BCM78900_REV_B0 0x11 +/* BCM78902 */ +#define BCM78902_VENDOR_ID 0x14e4 +#define BCM78902_DEVICE_ID 0xf902 +#define BCM78902_REV_B0 0x11 + +/* BCM78903 */ +#define BCM78903_VENDOR_ID 0x14e4 +#define BCM78903_DEVICE_ID 0xf903 +#define BCM78903_REV_B0 0x11 + /* BCM78905 */ #define BCM78905_VENDOR_ID 0x14e4 #define BCM78905_DEVICE_ID 0xf905 -#define BCM78905_REV_B0 0x11 +#define BCM78905_REV_A0 0x01 /* * End of Supported Devices and Revisions @@ -242,8 +277,18 @@ BCMDRD_DEVLIST_ENTRY(BCM56080, BCM56080_VENDOR_ID, BCM56080_DEVICE_ID, BCM56080_REV_A0, \ 0, 0, \ bcm56080_a0, bcm56080_a0, bcm56080_a0, \ - "Pex1", "BCM56080", \ - "1.6 Tbps Multilayer Switch", 0, 0) + "Firelight2", "BCM56080", \ + "1.6 Tbps Multilayer Switch w/ MACSec", 0, 0) +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56080, BCM56080_VENDOR_ID, BCM56080_DEVICE_ID, BCM56080_REV_A1, \ + 0, 0, \ + bcm56080_a0, bcm56080_a0, bcm56080_a1, \ + "Firelight2", "BCM56080", \ + "1.6 Tbps Multilayer Switch w/ MACSec", 0, 0) +#endif #endif #if BCMDRD_CONFIG_INCLUDE_BCM56081_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) @@ -251,8 +296,18 @@ BCMDRD_DEVLIST_ENTRY(BCM56080, BCM56080_VENDOR_ID, BCM56080_DEVICE_ID, BCM56080_ BCMDRD_DEVLIST_ENTRY(BCM56081, BCM56081_VENDOR_ID, BCM56081_DEVICE_ID, BCM56081_REV_A0, \ 0, 0, \ bcm56080_a0, bcm56081_a0, bcm56081_a0, \ - "Pex1", "BCM56080", \ - "1.2 Tbps Line Card w/MACsec", 0, 0) + "Firelight2", "BCM56080", \ + "1.2 Tbps Multilayer Switch w/ MACSec", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56081_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56081, BCM56081_VENDOR_ID, BCM56081_DEVICE_ID, BCM56081_REV_A1, \ + 0, 0, \ + bcm56080_a0, bcm56081_a0, bcm56081_a1, \ + "Firelight2", "BCM56080", \ + "1.2 Tbps Multilayer Switch w/ MACSec", 0, 0) #endif #endif @@ -261,8 +316,18 @@ BCMDRD_DEVLIST_ENTRY(BCM56081, BCM56081_VENDOR_ID, BCM56081_DEVICE_ID, BCM56081_ BCMDRD_DEVLIST_ENTRY(BCM56082, BCM56082_VENDOR_ID, BCM56082_DEVICE_ID, BCM56082_REV_A0, \ 0, 0, \ bcm56080_a0, bcm56082_a0, bcm56082_a0, \ - "Pex1", "BCM56080", \ - "1.08 Tbps Line Card w/MACsec", 0, 0) + "Firelight2", "BCM56080", \ + "0.96 Tbps Multilayer Switch w/ MACSec", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56082_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56082, BCM56082_VENDOR_ID, BCM56082_DEVICE_ID, BCM56082_REV_A1, \ + 0, 0, \ + bcm56080_a0, bcm56082_a0, bcm56082_a1, \ + "Firelight2", "BCM56080", \ + "0.96 Tbps Multilayer Switch w/ MACSec", 0, 0) #endif #endif @@ -271,8 +336,18 @@ BCMDRD_DEVLIST_ENTRY(BCM56082, BCM56082_VENDOR_ID, BCM56082_DEVICE_ID, BCM56082_ BCMDRD_DEVLIST_ENTRY(BCM56083, BCM56083_VENDOR_ID, BCM56083_DEVICE_ID, BCM56083_REV_A0, \ 0, 0, \ bcm56080_a0, bcm56083_a0, bcm56083_a0, \ - "Pex1", "BCM56080", \ - "1.2 Tbps Line Card", 0, 0) + "Firelight2", "BCM56080", \ + "1.2 Tbps Multilayer Switch", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56083_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56083, BCM56083_VENDOR_ID, BCM56083_DEVICE_ID, BCM56083_REV_A1, \ + 0, 0, \ + bcm56080_a0, bcm56083_a0, bcm56083_a1, \ + "Firelight2", "BCM56080", \ + "1.2 Tbps Multilayer Switch", 0, 0) #endif #endif @@ -281,8 +356,56 @@ BCMDRD_DEVLIST_ENTRY(BCM56083, BCM56083_VENDOR_ID, BCM56083_DEVICE_ID, BCM56083_ BCMDRD_DEVLIST_ENTRY(BCM56084, BCM56084_VENDOR_ID, BCM56084_DEVICE_ID, BCM56084_REV_A0, \ 0, 0, \ bcm56080_a0, bcm56084_a0, bcm56084_a0, \ - "Pex1", "BCM56080", \ - "1.08 Tbps Line Card", 0, 0) + "Firelight2", "BCM56080", \ + "0.96 Tbps Multilayer Switch", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56084_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56084, BCM56084_VENDOR_ID, BCM56084_DEVICE_ID, BCM56084_REV_A1, \ + 0, 0, \ + bcm56080_a0, bcm56084_a0, bcm56084_a1, \ + "Firelight2", "BCM56080", \ + "0.96 Tbps Multilayer Switch", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56085_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56085, BCM56085_VENDOR_ID, BCM56085_DEVICE_ID, BCM56085_REV_A0, \ + 0, 0, \ + bcm56080_a0, bcm56085_a0, bcm56085_a0, \ + "Firelight2", "BCM56080", \ + "0.8 Tbps Multilayer Switch w/ MACSec", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56085_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56085, BCM56085_VENDOR_ID, BCM56085_DEVICE_ID, BCM56085_REV_A1, \ + 0, 0, \ + bcm56080_a0, bcm56085_a0, bcm56085_a1, \ + "Firelight2", "BCM56080", \ + "0.8 Tbps Multilayer Switch w/ MACSec", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56690_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +BCMDRD_DEVLIST_ENTRY(BCM56690, BCM56690_VENDOR_ID, BCM56690_DEVICE_ID, BCM56690_REV_A0, \ + 0, 0, \ + bcm56690_a0, bcm56690_a0, bcm56690_a0, \ + "Trident4-X7", "BCM56690", \ + "4T cost-optimized 50G-DL ToR", 0, 0) +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM56692_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56692, BCM56692_VENDOR_ID, BCM56692_DEVICE_ID, BCM56692_REV_A0, \ + 0, 0, \ + bcm56690_a0, bcm56692_a0, bcm56692_a0, \ + "Trident4-X7", "BCM56690", \ + "2T cost-optimized 50G-DL ToR", 0, 0) #endif #endif @@ -304,6 +427,16 @@ BCMDRD_DEVLIST_ENTRY(BCM56782, BCM56782_VENDOR_ID, BCM56782_DEVICE_ID, BCM56782_ #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56782_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56782, BCM56782_VENDOR_ID, BCM56782_DEVICE_ID, BCM56782_REV_A1, \ + 0, 0, \ + bcm56780_a0, bcm56782_a0, bcm56782_a1, \ + "Trident4-X9", "BCM56780", \ + "8 Tb/s 160x50G-PAM4 Programmable Switch w/MACsec", 0, 0) +#endif +#endif + #if BCMDRD_CONFIG_INCLUDE_BCM56784_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) #ifdef BCMDRD_DEVLIST_INCLUDE_ALL BCMDRD_DEVLIST_ENTRY(BCM56784, BCM56784_VENDOR_ID, BCM56784_DEVICE_ID, BCM56784_REV_A0, \ @@ -334,6 +467,16 @@ BCMDRD_DEVLIST_ENTRY(BCM56786, BCM56786_VENDOR_ID, BCM56786_DEVICE_ID, BCM56786_ #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56786_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56786, BCM56786_VENDOR_ID, BCM56786_DEVICE_ID, BCM56786_REV_A1, \ + 0, 0, \ + bcm56780_a0, bcm56786_a0, bcm56786_a1, \ + "Trident4-X9", "BCM56780", \ + "5.6 Tb/s 96x50G-PAM4/32x35G-NRZ Programmable Switch w/MACsec", 0, 0) +#endif +#endif + #if BCMDRD_CONFIG_INCLUDE_BCM56787_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) #ifdef BCMDRD_DEVLIST_INCLUDE_ALL BCMDRD_DEVLIST_ENTRY(BCM56787, BCM56787_VENDOR_ID, BCM56787_DEVICE_ID, BCM56787_REV_A0, \ @@ -344,6 +487,16 @@ BCMDRD_DEVLIST_ENTRY(BCM56787, BCM56787_VENDOR_ID, BCM56787_DEVICE_ID, BCM56787_ #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56787_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56787, BCM56787_VENDOR_ID, BCM56787_DEVICE_ID, BCM56787_REV_A1, \ + 0, 0, \ + bcm56780_a0, bcm56787_a0, bcm56787_a1, \ + "Trident4-X9", "BCM56780", \ + "5.6 Tb/s 96x50G-PAM4/32x35G-NRZ Programmable Switch w/MACsec w/SmartToR", 0, 0) +#endif +#endif + #if BCMDRD_CONFIG_INCLUDE_BCM56788_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) #ifdef BCMDRD_DEVLIST_INCLUDE_ALL BCMDRD_DEVLIST_ENTRY(BCM56788, BCM56788_VENDOR_ID, BCM56788_DEVICE_ID, BCM56788_REV_A0, \ @@ -354,6 +507,16 @@ BCMDRD_DEVLIST_ENTRY(BCM56788, BCM56788_VENDOR_ID, BCM56788_DEVICE_ID, BCM56788_ #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56788_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM56788, BCM56788_VENDOR_ID, BCM56788_DEVICE_ID, BCM56788_REV_A1, \ + 0, 0, \ + bcm56780_a0, bcm56788_a0, bcm56788_a1, \ + "Trident4-X9", "BCM56780", \ + "8 Tb/s 160x50G-PAM4 Programmable Switch w/MACsec w/SmartToR", 0, 0) +#endif +#endif + #if BCMDRD_CONFIG_INCLUDE_BCM56789_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) #ifdef BCMDRD_DEVLIST_INCLUDE_ALL BCMDRD_DEVLIST_ENTRY(BCM56789, BCM56789_VENDOR_ID, BCM56789_DEVICE_ID, BCM56789_REV_A0, \ @@ -606,16 +769,34 @@ BCMDRD_DEVLIST_ENTRY(BCM78900, BCM78900_VENDOR_ID, BCM78900_DEVICE_ID, BCM78900_ "51.2 Tbps Multilayer Switch", 0, 0) #endif -#if BCMDRD_CONFIG_INCLUDE_BCM78905_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#if BCMDRD_CONFIG_INCLUDE_BCM78902_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) #ifdef BCMDRD_DEVLIST_INCLUDE_ALL -BCMDRD_DEVLIST_ENTRY(BCM78905, BCM78905_VENDOR_ID, BCM78905_DEVICE_ID, BCM78905_REV_B0, \ +BCMDRD_DEVLIST_ENTRY(BCM78902, BCM78902_VENDOR_ID, BCM78902_DEVICE_ID, BCM78902_REV_B0, \ 0, 0, \ - bcm78900_b0, bcm78905_b0, bcm78905_b0, \ + bcm78900_b0, bcm78902_b0, bcm78902_b0, \ "Tomahawk5", "BCM78900", \ "25.6 Tbps Multilayer Switch", 0, 0) #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM78903_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +#ifdef BCMDRD_DEVLIST_INCLUDE_ALL +BCMDRD_DEVLIST_ENTRY(BCM78903, BCM78903_VENDOR_ID, BCM78903_DEVICE_ID, BCM78903_REV_B0, \ + 0, 0, \ + bcm78900_b0, bcm78903_b0, bcm78903_b0, \ + "Tomahawk5", "BCM78900", \ + "25.6 Tbps Multilayer Switch", 0, 0) +#endif +#endif + +#if BCMDRD_CONFIG_INCLUDE_BCM78905_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) +BCMDRD_DEVLIST_ENTRY(BCM78905, BCM78905_VENDOR_ID, BCM78905_DEVICE_ID, BCM78905_REV_A0, \ + 0, 0, \ + bcm78905_a0, bcm78905_a0, bcm78905_a0, \ + "Tomahawk5+", "BCM78905", \ + "51.2 Tbps Multilayer Switch", 0, 0) +#endif + /* End BCMDRD_DEVLIST_ENTRY Macros */ #ifdef BCMDRD_DEVLIST_INCLUDE_ALL diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h new file mode 100644 index 000000000000..0308cce576b3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h @@ -0,0 +1,211 @@ +/*! \file bcmdrd_symbol_types.h + * + * + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMDRD_SYMBOL_TYPES_H +#define BCMDRD_SYMBOL_TYPES_H + +#include + +/*! + * \name Symbol flags. + * \anchor BCMDRD_SYMBOL_FLAG_xxx + */ + +/*! \{ */ + +/*! Symbol data will be cleared on read. */ +#define BCMDRD_SYMBOL_FLAG_CLEAR_ON_READ (1U << 8) + +/*! Symbol data can be updated by hardware. */ +#define BCMDRD_SYMBOL_FLAG_HW_UPDATED (1U << 9) + +/*! Symbol should not be accessed with traffic running. */ +#define BCMDRD_SYMBOL_FLAG_ACC_IDLE (1U << 10) + +/*! Symbol validity can be decided dynamically at system initialization. */ +#define BCMDRD_SYMBOL_FLAG_DYNAMIC (1U << 11) + +/*! Symbol represents a special access. */ +#define BCMDRD_SYMBOL_FLAG_SPECIAL (1U << 12) + +/*! Symbol access type represents a unique pipe. */ +#define BCMDRD_SYMBOL_FLAG_ACC_UNIQUE_PIPE (1U << 13) + +/*! Symbol is associated with a specific sub-pipe. */ +#define BCMDRD_SYMBOL_FLAG_SUB_PIPE (1U << 14) + +/*! Symbol is write-only. */ +#define BCMDRD_SYMBOL_FLAG_WRITEONLY (1U << 15) + +/*! Symbol is not suitable for read/write tests. */ +#define BCMDRD_SYMBOL_FLAG_NOTEST (1U << 16) + +/*! Symbol is a non-CMIC iProc register. */ +#define BCMDRD_SYMBOL_FLAG_IPROC (1U << 17) + +/*! Symbol is an overlay of other symbols. */ +#define BCMDRD_SYMBOL_FLAG_OVERLAY (1U << 18) + +/*! Symbol is read-only or any field within the symbol is read-only. */ +#define BCMDRD_SYMBOL_FLAG_READONLY (1U << 19) + +/*! Symbol with FIFO operations. */ +#define BCMDRD_SYMBOL_FLAG_FIFO (1U << 20) + +/*! Symbol is reasonable to cache in S/W. */ +#define BCMDRD_SYMBOL_FLAG_CACHEABLE (1U << 21) + +/*! Symbol is a hashed table. */ +#define BCMDRD_SYMBOL_FLAG_HASHED (1U << 22) + +/*! Symbol is an external CAM. */ +#define BCMDRD_SYMBOL_FLAG_EXT_CAM (1U << 23) + +/*! Symbol is a CAM. */ +#define BCMDRD_SYMBOL_FLAG_CAM (1U << 24) + +/*! Symbol is a register. */ +#define BCMDRD_SYMBOL_FLAG_REGISTER (1U << 25) + +/*! Symbol is a port-based register, i.e. one ionstance per port. */ +#define BCMDRD_SYMBOL_FLAG_PORT (1U << 26) + +/*! Symbol is a counter register. */ +#define BCMDRD_SYMBOL_FLAG_COUNTER (1U << 27) + +/*! Symbol is a memory. */ +#define BCMDRD_SYMBOL_FLAG_MEMORY (1U << 28) + +/*! Symbol uses big endian word ordering. */ +#define BCMDRD_SYMBOL_FLAG_BIG_ENDIAN (1U << 29) + +/*! Symbol is a memory-mapped register. */ +#define BCMDRD_SYMBOL_FLAG_MEMMAPPED (1U << 30) + +/*! Symbol is a port-block register, i.e. one instance per port-block. */ +#define BCMDRD_SYMBOL_FLAG_SOFT_PORT (1U << 31) + +/*! \} */ + +/*! + * \name Symbol attributes. + * \anchor BCMDRD_SYM_ATTR_xxx + */ + +/*! \{ */ + +/*! Symbol is a CAM. */ +#define BCMDRD_SYM_ATTR_CAM (1 << 0) + +/*! Symbol is a hashed memory. */ +#define BCMDRD_SYM_ATTR_HASHED (1 << 1) + +/*! Symbol is not visible in this configuration. */ +#define BCMDRD_SYM_ATTR_HIDDEN (1 << 2) + +/*! \} */ + +/*! + * \brief Symbol (register/memory) information + * + * The symbol information is dynamic information about a symbol in the + * current device configuraton. In many situations, this information + * will be identical to the static symbol information of the base + * device. + */ +typedef struct { + + /*! Symbol ID (unique per device). */ + bcmdrd_sid_t sid; + + /*! Symbol name, e.g. "VLANm" or "MISCCONFIGr". */ + const char *name; + + /*! Mask of block types this symbol is valid for. */ + uint32_t blktypes; + + /*! Special attributes of this symbol (\ref BCMDRD_SYMBOL_FLAG_xxx). */ + uint32_t flags; + + /*! Fixed part of symbol address (composition is device-dependent). */ + uint32_t offset; + + /*! Minimum valid index for array-type symbols. */ + uint32_t index_min; + + /*! Maximum valid index for array-type symbols. */ + uint32_t index_max; + + /*! Size of symbol data (or entry if array-type) in 32-bit words. */ + uint32_t entry_wsize; + + /*! Index address step value for array-type symbols. */ + uint32_t step_size; + +} bcmdrd_sym_info_t; + +/*! + * \name Symbol field flags. + * \anchor BCMDRD_SYMBOL_FIELD_FLAG_xxx + */ + +/*! \{ */ + +/*! Symbol field is a counter field. */ +#define BCMDRD_SYMBOL_FIELD_FLAG_COUNTER (1 << 0) + +/*! Symbol field is a key field. */ +#define BCMDRD_SYMBOL_FIELD_FLAG_KEY (1 << 1) + +/*! Symbol field is a mask field. */ +#define BCMDRD_SYMBOL_FIELD_FLAG_MASK (1 << 2) + +/*! \} */ + +/*! + * \brief Field information structure. + * + * This structure defines a single field within a symbol. + */ +typedef struct bcmdrd_sym_field_info_s { + + /*! Field name, e.g. "VLANf" or "VALIDf". */ + const char *name; + + /*! Field ID (unique per device). */ + int fid; + + /*! Special field ID, which defines how multi-view memories are decoded. */ + int view; + + /*! Special attributes of this field (\ref BCMDRD_SYMBOL_FIELD_FLAG_xxx). */ + uint32_t flags; + + /*! First bit of this field. */ + uint16_t minbit; + + /*! Last bit of this field. */ + uint16_t maxbit; + +} bcmdrd_sym_field_info_t; + +#endif /* BCMDRD_SYMBOL_TYPES_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h new file mode 100644 index 000000000000..82c2946262a3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h @@ -0,0 +1,1139 @@ +/*! \file bcmdrd_symbols.h + * + * Chip symbol table definitions. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMDRD_SYMBOLS_H +#define BCMDRD_SYMBOLS_H + +/******************************************************************************* + * BCMDRD symbol formats + ******************************************************************************/ + +#include + +/******************************************************************************* + * Resolve compile depedencies for optimized code size reduction. + ******************************************************************************/ + +#if BCMDRD_CONFIG_INCLUDE_CHIP_SYMBOLS == 0 +#undef BCMDRD_CONFIG_INCLUDE_FIELD_INFO +#define BCMDRD_CONFIG_INCLUDE_FIELD_INFO 0 +#endif + +/*! + * \name Symbol index information. + * \anchor BCMDRD_SYMBOL_INDEX_F_xxx + * + * In order to maintain a compact symbol table format the entry size + * and the minimum/maximum table indexes are encoded into a single + * 32-bit word. + * + * The following flags and macros are used to encode and extract the + * above information to/from the 32-bit index word. + */ + +/*! \{ */ + +/*! + * \brief Flag indicating exponential index calculation. + * + * Used if real maximum cannot be contained within max field. + * + * Real maximum is encoded as ((1 << min) * max) - 1). + * + * Real minimum is always zero. + * + * Example: + * (max,min)=(17,12) + * => real max = ((1 << 12) * 17) - 1) = 0x10fff + */ +#define BCMDRD_SYMBOL_INDEX_F_EXP 0x1 + +/*! + * \brief Flag indicating variable index maximum. + * + * Used e.g. if register array size is port-dependent. + * + * Real maximum and minimum depend on configuration. + * + * The min value is used as an encoding key which may be passed to a + * chip-specific function. + */ +#define BCMDRD_SYMBOL_INDEX_F_VAR 0x2 + +/*! + * \brief Flag indicating address step different from 1. + * + * Used e.g. if address step for a register array is non-standard. + * + * Real minimum is always zero. + * + * The min value is interpreted as (address step - 1). + * + * Example: + * (max,min)=(11,3) + * => 12 elements with addr(i+1) = addr(i)+4 + */ +#define BCMDRD_SYMBOL_INDEX_F_STEP 0x4 + +/*! Encode entry size into index word. */ +#define BCMDRD_SYMBOL_INDEX_SIZE_ENCODE(s) F32_ENCODE((uint32_t)s, 0, 8) + +/*! Extract entry size from index word. */ +#define BCMDRD_SYMBOL_INDEX_SIZE_GET(w) F32_GET(w, 0, 8) + +/*! Encode minimum table index into index word. */ +#define BCMDRD_SYMBOL_INDEX_MIN_ENCODE(s) F32_ENCODE((uint32_t)s, 8, 5) + +/*! Extract raw minimum table index from index word. */ +#define BCMDRD_SYMBOL_INDEX_MIN_GETRAW(w) F32_GET(w, 8, 5) + +/*! Encode maximum table index into index word. */ +#define BCMDRD_SYMBOL_INDEX_MAX_ENCODE(s) F32_ENCODE((uint32_t)s, 13, 16) + +/*! Extract raw maximum table index from index word. */ +#define BCMDRD_SYMBOL_INDEX_MAX_GETRAW(w) F32_GET(w, 13, 16) + +/*! Encode index flags into index word. */ +#define BCMDRD_SYMBOL_INDEX_FLAGS_ENCODE(s) F32_ENCODE((uint32_t)s, 29, 3) + +/*! Extract index flags from index word. */ +#define BCMDRD_SYMBOL_INDEX_FLAGS_GET(w) F32_GET(w, 29, 3) + +/*! Get real minimum table index based on raw values and flags. */ +#define BCMDRD_SYMBOL_INDEX_MIN_GET(w) \ + (BCMDRD_SYMBOL_INDEX_FLAGS_GET(w) ? \ + 0 : \ + BCMDRD_SYMBOL_INDEX_MIN_GETRAW(w)) + +/*! Get encoding type from index word. */ +#define BCMDRD_SYMBOL_INDEX_ENC_GET(w) BCMDRD_SYMBOL_INDEX_MIN_GETRAW(w) + +/*! Get real maximum table index based on raw values and flags. */ +#define BCMDRD_SYMBOL_INDEX_MAX_GET(w) \ + ((BCMDRD_SYMBOL_INDEX_FLAGS_GET(w) & BCMDRD_SYMBOL_INDEX_F_EXP) ? \ + (BCMDRD_SYMBOL_INDEX_MAX_GETRAW(w) * \ + (1U << BCMDRD_SYMBOL_INDEX_MIN_GETRAW(w))) - 1 : \ + BCMDRD_SYMBOL_INDEX_MAX_GETRAW(w)) + +/*! Get per-index address step value. */ +#define BCMDRD_SYMBOL_INDEX_STEP_GET(w) \ + ((BCMDRD_SYMBOL_INDEX_FLAGS_GET(w) & BCMDRD_SYMBOL_INDEX_F_STEP) ? \ + (BCMDRD_SYMBOL_INDEX_MIN_GETRAW(w) + 1) : \ + 1) + +/*! \} */ + +/*! + * \name Symbol field encode information. + * + * Symbol field information is encoded in variable size. The supported formats + * are depicted in the following tables: + * + * - Single Word Field Format + * | Bits | Name | Description | + * | :---: | --------- | ------------------------------------------- | + * | 31:31 | LastField | Indicates this is the last field descriptor word in a field array. | + * | 30:30 | Ext | Indicates that this is the first word in a Double Word Field, not a Single Word Field.
This word and the next form a Double Word Field. | + * | 29:29 | Ext2 | Indicates that this field is visible only in certain memory views.
This word and the next two form a Triple Word Field. | + * | 28:15 | FieldId | This is the unique field id for this field. | + * | 14:7 | Minbit | This is the field's minbit. | + * | 6:0 | Width | This is the field's width (in bits). | + *
+ * + * - Double Word Field Format + * | Word | Bits | Name | Description | + * | :--: | :---: | --------- | ------------------------------------------- | + * | 0 | 31:31 | LastField | Indicates this is the last field descriptor word in a field array. | + * | 0 | 30:30 | Ext | Indicates this is the start of a Double Word field. | + * | 0 | 29:29 | Ext2 | Must be zero for Double Word fields. | + * | 0 | 28:28 | Cnt | Indicates that field is a counter. | + * | 0 | 27:27 | Key | Indicates that field is a key. | + * | 0 | 26:26 | Mask | Indicates that field is a mask. | + * | 0 | 25:24 | Rsvd | Reserved for future field attributes. | + * | 0 | 23:0 | FieldId | This is the unique field id for this field. | + * | 1 | 31:16 | Minbit | This is the field's minbit. | + * | 1 | 15:0 | Width | This is the field's width (in bits). | + *
+ * + * - Triple Word Field Format + * | Word | Bits | Name | Description | + * | :--: | :---: | --------- | ------------------------------------------- | + * | 0 | 31:31 | LastField | Indicates this is the last field descriptor word in a field array. | + * | 0 | 30:30 | Ext | Must be zero for Triple Word fields. | + * | 0 | 29:29 | Ext2 | Indicates that this word and the next two form a Triple Word Field. | + * | 0 | 28:28 | Cnt | Indicates that field is a counter. | + * | 0 | 27:27 | Key | Indicates that field is a key. | + * | 0 | 26:26 | Mask | Indicates that field is a mask. | + * | 0 | 25:24 | Rsvd | Reserved for future field attributes. | + * | 0 | 23:0 | FieldId | This is the unique field id for this field. | + * | 1 | 31:16 | Minbit | This is the field's minbit. | + * | 1 | 15:0 | Width | This is the field's width (in bits). | + * | 2 | 23:0 | ViewId | This is the unique field view id for this field. | + *
+ */ + +/*! \{ */ + +/*! Indicates last field descriptor word in a field array. */ +#define BCMDRD_SYM_FIELD_FLAG_LAST (1U << 31) + +/*! Indicates double-word field descriptor. */ +#define BCMDRD_SYM_FIELD_FLAG_EXT (1U << 30) + +/*! Indicates triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_FLAG_EXT2 (1U << 29) + +/*! Indicates counter attribute in a field */ +#define BCMDRD_SYM_FIELD_ATTR_COUNTER (1U << 28) + +/*! Indicates key attribute in a field */ +#define BCMDRD_SYM_FIELD_ATTR_KEY (1U << 27) + +/*! Indicates mask attribute in a field */ +#define BCMDRD_SYM_FIELD_ATTR_MASK (1U << 26) + +/*! Test field descriptor word for \ref BCMDRD_SYM_FIELD_FLAG_LAST. */ +#define BCMDRD_SYM_FIELD_LAST(w) ((w) & BCMDRD_SYM_FIELD_FLAG_LAST) + +/*! Test field descriptor word for \ref BCMDRD_SYM_FIELD_FLAG_EXT. */ +#define BCMDRD_SYM_FIELD_EXT(w) ((w) & BCMDRD_SYM_FIELD_FLAG_EXT) + +/*! Test field descriptor word for \ref BCMDRD_SYM_FIELD_FLAG_EXT2. */ +#define BCMDRD_SYM_FIELD_EXT2(w) ((w) & BCMDRD_SYM_FIELD_FLAG_EXT2) + + +/*! Encode field ID into a single-word field descriptor. */ +#define BCMDRD_SYM_FIELD_ID_ENCODE(id) F32_ENCODE(id, 15, 14) + +/*! Encode field start-bit into a single-word field descriptor. */ +#define BCMDRD_SYM_FIELD_MIN_ENCODE(b) F32_ENCODE(b, 7, 8) + +/*! Encode field size into a single-word field descriptor. */ +#define BCMDRD_SYM_FIELD_WIDTH_ENCODE(b) F32_ENCODE(b, 0, 7) + +/*! Extract field ID from a single-word field descriptor. */ +#define BCMDRD_SYM_FIELD_ID_GET(w) F32_GET(w, 15, 14) + +/*! Extract field start-bit from a single-word field descriptor. */ +#define BCMDRD_SYM_FIELD_MIN_GET(w) F32_GET(w, 7, 8) + +/*! Extract field size from a single-word field descriptor. */ +#define BCMDRD_SYM_FIELD_WIDTH_GET(w) F32_GET(w, 0, 7) + +/*! Encode field information into a single-word field descriptor. */ +#define BCMDRD_SYM_FIELD_ENCODE(id, min, width) \ + (BCMDRD_SYM_FIELD_ID_ENCODE(id) | \ + BCMDRD_SYM_FIELD_MIN_ENCODE(min) | \ + BCMDRD_SYM_FIELD_WIDTH_ENCODE(width)) + +/*! Encode field ID into a double-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT_ID_ENCODE(id) F32_ENCODE(id, 0, 24) + +/*! Encode field start-bit into a double-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT_MIN_ENCODE(b) F32_ENCODE(b, 16, 16) + +/*! Encode field size into a double-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT_WIDTH_ENCODE(b) F32_ENCODE(b, 0, 16) + +/*! Extract field ID from a double-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT_ID_GET(w) F32_GET(w, 0, 24) + +/*! Extract field start-bit from a double-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT_MIN_GET(w) F32_GET((&(w))[1], 16, 16) + +/*! Extract field size from a double-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT_WIDTH_GET(w) F32_GET((&(w))[1], 0, 16) + +/*! Encode field information into a double-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT_ENCODE(id, min, width) \ + (BCMDRD_SYM_FIELD_FLAG_EXT | BCMDRD_SYM_FIELD_EXT_ID_ENCODE(id)), \ + (BCMDRD_SYM_FIELD_EXT_MIN_ENCODE(min) | \ + BCMDRD_SYM_FIELD_EXT_WIDTH_ENCODE(width)) + +/*! + * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_COUNTER + * in double-word field descriptor. + */ +#define BCMDRD_SYM_FIELD_EXT_ATTR_IS_COUNTER(w) \ + ((w) & BCMDRD_SYM_FIELD_ATTR_COUNTER) + +/*! + * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_KEY + * in double-word field descriptor. + */ +#define BCMDRD_SYM_FIELD_EXT_ATTR_IS_KEY(w) \ + ((w) & BCMDRD_SYM_FIELD_ATTR_KEY) + +/*! + * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_MASK + * in double-word field descriptor. + */ +#define BCMDRD_SYM_FIELD_EXT_ATTR_IS_MASK(w) \ + ((w) & BCMDRD_SYM_FIELD_ATTR_MASK) + + +/*! Encode field ID into a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_ID_ENCODE(id) F32_ENCODE(id, 0, 24) + +/*! Encode field start-bit into a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_MIN_ENCODE(b) F32_ENCODE(b, 16, 16) + +/*! Encode field size into a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_WIDTH_ENCODE(b) F32_ENCODE(b, 0, 16) + +/*! Encode field view ID into a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_VIEW_ENCODE(b) F32_ENCODE(b, 0, 24) + +/*! Extract field ID from a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_ID_GET(w) F32_GET(w, 0, 24) + +/*! Extract field start-bit from a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_MIN_GET(w) F32_GET((&(w))[1], 16, 16) + +/*! Extract field width from a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_WIDTH_GET(w) F32_GET((&(w))[1], 0, 16) + +/*! Extract field view ID from a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_VIEW_GET(w) F32_GET((&(w))[2], 0, 24) + +/*! Encode field information into a triple-word field descriptor. */ +#define BCMDRD_SYM_FIELD_EXT2_ENCODE(id, min, width, view) \ + (BCMDRD_SYM_FIELD_FLAG_EXT2 | BCMDRD_SYM_FIELD_EXT2_ID_ENCODE(id)), \ + (BCMDRD_SYM_FIELD_EXT2_MIN_ENCODE(min) | \ + BCMDRD_SYM_FIELD_EXT2_WIDTH_ENCODE(width)), \ + BCMDRD_SYM_FIELD_EXT2_VIEW_ENCODE(view) + +/*! + * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_COUNTER + * in triple-word field descriptor. + */ +#define BCMDRD_SYM_FIELD_EXT2_ATTR_IS_COUNTER(w) \ + ((w) & BCMDRD_SYM_FIELD_ATTR_COUNTER) + +/*! + * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_KEY + * in triple-word field descriptor. + */ +#define BCMDRD_SYM_FIELD_EXT2_ATTR_IS_KEY(w) \ + ((w) & BCMDRD_SYM_FIELD_ATTR_KEY) + +/*! + * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_MASK + * in triple-word field descriptor. + */ +#define BCMDRD_SYM_FIELD_EXT2_ATTR_IS_MASK(w) \ + ((w) & BCMDRD_SYM_FIELD_ATTR_MASK) + +/*! \} */ + + +/*! + * \brief Iterate over all fields for a symbol. + * + * Given a pointer to a field descriptor word array, this macro will + * fill out the \ref bcmdrd_sym_field_info_t structure for each field + * in the field descriptor word array. + * + * If a list of corresponding fieln names is given, the field + * information will include the symbolic field name. + * + * The macro must be terminated with \ref BCMDRD_SYM_FIELDS_ITER_END. + */ +#define BCMDRD_SYM_FIELDS_ITER_BEGIN(start, finfo, fnames) { \ + uint32_t *_fp = start; \ + for (;;) { \ + if (!_fp) { \ + break; \ + } else { \ + _fp = bcmdrd_sym_field_info_decode(_fp, (fnames), &(finfo)); + +/*! Refer to \ref BCMDRD_SYM_FIELDS_ITER_BEGIN. */ +#define BCMDRD_SYM_FIELDS_ITER_END() }}} + +/*! + * Symbol information structure (single symbol). + */ +typedef struct bcmdrd_symbol_s { + + /*! Base offset (fixed address information). */ + uint32_t addr; + + /*! Encoded information about valid indexes for arrays. */ + uint32_t index; + + /*! Symbol flags (\ref BCMDRD_SYMBOL_FLAG_xxx). */ + uint32_t flags; + + /*! + * Device-specific information. + * | Bits | Name | Description | + * | :---: | ----------------- | ---------------------------------------- | + * | 31:24 | HMI-specific data | This is 8-bit symbol HMI-specific data. | + * | 23:21 | Sub-pipe instance | Sub-pipe association (if any). | + * | 20:14 | Access type | This is the symbol access type. | + * | 13:7 | Block type 1 | The 2nd symbol block type (> 0 if any). | + * | 6:0 | Block type 0 | The 1st symbol block type (> 0 always). | + */ + uint32_t info; + + /*! Profile information for default value, SER information, etc. */ + uint32_t pfinfo; + +#if BCMDRD_CONFIG_INCLUDE_FIELD_INFO == 1 + /*! Pointer to field information data. */ + uint32_t *fields; +#endif + + /*! Symbol name. */ + const char *name; + +#if BCMDRD_CONFIG_INCLUDE_ALIAS_NAMES == 1 + /*! + * Alternative symbol name (typically used if hardware and + * software names differ). + */ + const char *alias; + + /*! + * User-fiendly symbol name (typically a shorter a more meaningful + * name). + */ + const char *ufname; +#endif + +} bcmdrd_symbol_t; + +/*! Maximum block types encoded in the symbol device-specific information. */ +#define BCMDRD_SYM_INFO_MAX_BLKTYPES 2 + +/*! Bit number of the encoded block type. */ +#define BCMDRD_SYM_INFO_BLKTYPE_BITS 7 + +/*! Bit mask of the encoded block type. */ +#define BCMDRD_SYM_INFO_BLKTYPE_MASK ((1U << BCMDRD_SYM_INFO_BLKTYPE_BITS) - 1) + +/*! Bit mask of all the encoded block types. */ +#define BCMDRD_SYM_INFO_BLKTYPES_MASK \ + ((1U << (BCMDRD_SYM_INFO_MAX_BLKTYPES * BCMDRD_SYM_INFO_BLKTYPE_BITS)) - 1) + +/*! Extract block types from symbol device-specific information. */ +#define BCMDRD_SYM_INFO_BLKTYPES(_w) ((_w) & BCMDRD_SYM_INFO_BLKTYPES_MASK) + +/*! Bit number of the encoded access type. */ +#define BCMDRD_SYM_INFO_ACCTYPE_SHIFT \ + (BCMDRD_SYM_INFO_MAX_BLKTYPES * BCMDRD_SYM_INFO_BLKTYPE_BITS) + +/*! Bit number of the encoded access type. */ +#define BCMDRD_SYM_INFO_ACCTYPE_BITS 7 + +/*! Bit mask of the encoded access type. */ +#define BCMDRD_SYM_INFO_ACCTYPE_MASK ((1U << BCMDRD_SYM_INFO_ACCTYPE_BITS) - 1) + +/*! Extract access type from symbol device-specific information. */ +#define BCMDRD_SYM_INFO_ACCTYPE(_w) \ + (((_w) >> BCMDRD_SYM_INFO_ACCTYPE_SHIFT) & BCMDRD_SYM_INFO_ACCTYPE_MASK) + +/*! Bit number of the encoded sub-pipe instance. */ +#define BCMDRD_SYM_INFO_SUBPIPE_INST_BITS 3 + +/*! Bit mask of the encoded sub-pipe instance. */ +#define BCMDRD_SYM_INFO_SUBPIPE_INST_MASK \ + ((1U << BCMDRD_SYM_INFO_SUBPIPE_INST_BITS) - 1) + +/*! Extract sub-pipe instance from symbol device-specific information. */ +#define BCMDRD_SYM_INFO_SUBPIPE_INST(_w) \ + (((_w) >> 21) & BCMDRD_SYM_INFO_SUBPIPE_INST_MASK) + +/*! Extract block type by index from symbol device-specific information. */ +#define BCMDRD_SYM_INFO_BLKTYPE(_w, _i) \ + ((BCMDRD_SYM_INFO_BLKTYPES(_w) >> \ + (BCMDRD_SYM_INFO_BLKTYPE_BITS * (_i))) & BCMDRD_SYM_INFO_BLKTYPE_MASK) + +/*! + * \name Symbol profile information. + */ + +/*! \{ */ + +/*! Set profile offset for memory symbol. */ +#define BCMDRD_SYM_MEMPF_OFFSET_SET(_p) F32_ENCODE((_p), 0, 12) + +/*! Get profile offset for memory. */ +#define BCMDRD_SYM_MEMPF_OFFSET_GET(_pi) F32_GET((_pi), 0, 12) + +/*! Set profile offset for register. */ +#define BCMDRD_SYM_REGPF_OFFSET_SET(_p) F32_ENCODE((_p), 0, 12) + +/*! Get profile offset for register. */ +#define BCMDRD_SYM_REGPF_OFFSET_GET(_pi) F32_GET((_pi), 0, 12) + +/*! Set profile offset for MOR of symbol. */ +#define BCMDRD_SYM_MORPF_OFFSET_SET(_p) F32_ENCODE((_p), 12, 8) + +/*! Get profile offset for MOR of symbol. */ +#define BCMDRD_SYM_MORPF_OFFSET_GET(_pi) F32_GET((_pi), 12, 8) + +/*! Set profile offset for error correction information of symbol. */ +#define BCMDRD_SYM_ECCPF_OFFSET_SET(_p) F32_ENCODE((_p), 20, 12) + +/*! Get profile offset for error correction information of symbol. */ +#define BCMDRD_SYM_ECCPF_OFFSET_GET(_pi) F32_GET((_pi), 20, 12) + +/*! \} */ + + +/*! + * \brief Memory comparison function. + * + * \param [in] ent_a Element a of memory to be compared. + * \param [in] ent_b Element b of memory to be compared. + * + * \return 0 if two memory elements equal, otherwise unequal. + */ +typedef int (*bcmdrd_sym_mem_cmp_f)(void *ent_a, void *ent_b); + +/*! + * Memory profile structure. + */ +typedef struct bcmdrd_sym_mem_profile_s { + + /*! Memory comparison function. */ + bcmdrd_sym_mem_cmp_f cmp_fn; + + /*! Null entry data array. */ + const void *null_ent; + +} bcmdrd_sym_mem_profile_t; + +/*! + * MOR profile structure. + */ +typedef struct bcmdrd_sym_mor_profile_s { + + /*! MOR read. */ + uint32_t mrd; + + /*! MOR write. */ + uint32_t mwr; + +} bcmdrd_sym_mor_profile_t; + +/*! + * Symbols table structure (all symbols). + */ +typedef struct bcmdrd_symbols_s { + + /*! List of all symbols used by this device. */ + const bcmdrd_symbol_t *symbols; + + /*! Number of entries in symbols array. */ + const uint32_t size; + + /*! Number of entries in each symbols array section. */ + const uint32_t sect_size[2]; + + /*! List of all field names used by this device. */ + const char **field_names; + + /*! List of all reset values/masks used by this device. */ + const uint32_t *reg_profiles; + + /*! List of all memory profiles used by this device. */ + const bcmdrd_sym_mem_profile_t *mem_profiles; + + /*! List of all MOR profiles used by this device. */ + const bcmdrd_sym_mor_profile_t *mor_profiles; + + /*! SER data used by this device. */ + const void *ser_data; + +#if BCMDRD_CONFIG_INCLUDE_ALIAS_NAMES == 1 + /*! List of all symbols alias names used in this device. */ + const bcmdrd_enum_map_t *alias_names; + + /*! Number of entries in symbols alias names array */ + const uint32_t alias_names_size; +#endif + + /*! Symbols are sorted and searchable by bsearch. */ + const bool sorted; + +} bcmdrd_symbols_t; + + +/*! + * \brief Search a symbol array. + * + * Search symbol array by comparing input name to each symbol name. + * + * This function is primarily intended for internal use, and should + * normally not be called directly. + * + * \param [in] name Symbol name to search for. + * \param [in] table Array of symbol structures. + * \param [in] size Size of symbol array. + * \param [out] sid Symbol ID if match is found. + * + * \retval Pointer to symbol structure, or NULL if not found. + */ +extern const bcmdrd_symbol_t * +bcmdrd_symbol_find(const char *name, + const bcmdrd_symbol_t *table, uint32_t size, + bcmdrd_sid_t *sid); + +/*! + * \brief Binary search a symbol table. + * + * Binary search a symbol table from symbol names or alternative names. + * The symbol table should be sorted properly for the binary search support. + * + * This function is primarily intended for internal use, and should + * normally not be called directly. + * + * \param [in] name Symbol name to look for. + * \param [in] symbols Symbol table structure. + * \param [out] sid Symbol ID if match is found. + * + * \retval Pointer to symbol structure, or NULL if not found. + */ +const bcmdrd_symbol_t * +bcmdrd_symbols_fast_find(const char *name, const bcmdrd_symbols_t *symbols, + bcmdrd_sid_t *sid); + +/*! + * \brief Search a symbol table. + * + * Primary symbol search function. Takes a pointer to the symbols + * structure, finds the name in either one, and returns a full symbol + * structure. + * + * \param [in] name Symbol name to look for. + * \param [in] symbols Symbol table structure. + * \param [out] sid Symbol ID if match is found. + * + * \retval Pointer to symbol structure, or NULL if not found. + */ +extern const bcmdrd_symbol_t * +bcmdrd_symbols_find(const char *name, const bcmdrd_symbols_t *symbols, + bcmdrd_sid_t *sid); + +/*! + * \brief Get a specific symbol by index. + * + * \param [in] symbols - Symbols information structure for device. + * \param [in] sindex - Symbol index (usually same as symbol ID). + * \param [out] rsym - Symbol information structure to fill. + * + * \retval 0 No errors, or -1 if not found + */ +extern int +bcmdrd_symbols_get(const bcmdrd_symbols_t *symbols, uint32_t sindex, + bcmdrd_symbol_t *rsym); + +/*! + * \brief Get index of a specific symbol. + * + * \param [in] symbols - Symbols information structure for device. + * \param [in] symbol - Specific symbol structure. + * + * \retval Symbol index, or -1 if not found + */ +extern int +bcmdrd_symbols_index(const bcmdrd_symbols_t *symbols, + const bcmdrd_symbol_t *symbol); + +/*! + * \brief Get symbol information. + * + * Retrieve dynamic symbol information for register/memory. + * + * \param [in] symbols - Symbols information structure for device. + * \param [in] sid Device-specific symbol ID + * \param [out] sinfo Symbol information structure to fill if not NULL + * + * \retval Raw symbol structure, or NULL if not found. + */ +extern const bcmdrd_symbol_t * +bcmdrd_sym_info_get(const bcmdrd_symbols_t *symbols, bcmdrd_sid_t sid, + bcmdrd_sym_info_t *sinfo); + +/*! + * \name Symbol matching modes. + * \anchor BCMDRD_SYMBOLS_ITER_MODE_xxx + */ + +/*! \{ */ + +/*! Symbol table iterator must match exact symbol name. */ +#define BCMDRD_SYMBOLS_ITER_MODE_EXACT 0 + +/*! Symbol table iterator must match beginning of symbol name. */ +#define BCMDRD_SYMBOLS_ITER_MODE_START 1 + +/*! Symbol table iterator must match any sub-string in symbol name. */ +#define BCMDRD_SYMBOLS_ITER_MODE_STRSTR 2 + +/*! \} */ + +/*! + * \brief Symbols iteration call-back function. + * + * \param [in] symbol Symbol structure (single symbol). + * \param [in] sid Symbol ID. + * \param [in] vptr Caller-provided context. + * + * \retval 0 on success, -1 on failure. + */ +typedef int (*bcmdrd_symbols_iter_cb_f)(const bcmdrd_symbol_t *symbol, + bcmdrd_sid_t sid, + void *vptr); + +/*! + * \brief Symbol table iterator control structure. + * + * This structure contains symbol matching information and call-back + * function information for the symbol table iterator function. + */ +typedef struct bcmdrd_symbols_iter_s { + + /*! String to match against each symbol. */ + const char *name; + + /*! Defines valid matches (\ref BCMDRD_SYMBOLS_ITER_MODE_xxx) */ + int matching_mode; + + /*! Symbol flags that must be present. */ + uint32_t pflags; + + /*! Symbol flags that must be absent. */ + uint32_t aflags; + + /*! + * Block types that must be present. + * List of block types terminated by -1 if not NULL. + */ + int *pblktypes; + + /*! + * Block types that must be absent. + * List of block types terminated by -1 if not NULL. + */ + int *ablktypes; + + /*! + * Access types that must be present. + * List of access types terminated by -1 if not NULL. + */ + int *pacctypes; + + /*! + * Access types that must be absent. + * List of access types terminated by -1 if not NULL. + */ + int *aacctypes; + + /*! Symbols information structure for device. */ + const bcmdrd_symbols_t *symbols; + + /*! Function to be called for each matching symbol. */ + bcmdrd_symbols_iter_cb_f function; + + /*! Context for call-back function. */ + void *vptr; + +} bcmdrd_symbols_iter_t; + +/*! + * \brief Field filtering call-back function. + * + * This function will indicate whether a particular field should be + * filtered out for the current memory view. + * + * The field-view encoding string has the following syntax: + * + * {[\]:\:\[|\ ... ]} + * + * Ideally the keysrc is the same data entry which is + * being decoded, and in this case it can left out, e.g.: + * + * {:KEY_TYPEf:1} + * + * This example encoding means that if KEY_TYPEf=1, then + * this field is valid for this view. + * + * Note that a field can be for multiple views, e.g.: + * + * {:KEY_TYPEf:1|3} + * + * This example encoding means that this field is valid + * if KEY_TYPEf=1 or KEY_TYPEf=3. + * + * The special \=-1 means that this field is valid + * even if there is no context (cookie=NULL). + * + * \param [in] symbol Symbol structure (single symbol). + * \param [in] fnames List of all field names for this unit. + * \param [in] encoding Field-view encoding string. + * \param [in] cookie Caller-provided context. + * + * \retval true if field should be filtered out, otherwise false. + */ +typedef int (*bcmdrd_symbol_filter_cb_f)(const bcmdrd_symbol_t *symbol, + const char **fnames, + const char *encoding, + void *cookie); + +/*! + * \brief Customized symbol filtering call-back function. + * + * This function will indicate whether a particular name with + * with extra flags information should be filtered out. + * + * \param [in] symbol Symbol structure (single symbol). + * \param [in] name Name of the identifier. + * \param [in] flags Flags carried with the identifier. + * \param [in] data Table entry data to process. + * \param [in] cookie Caller-provided context. + * + * \retval true if field should be filtered out, otherwise false. + */ +typedef int (*bcmdrd_symbol_custom_filter_cb_f)(const bcmdrd_symbol_t *symbol, + const char *name, + uint32_t flags, + uint32_t *data, + void *cookie); + +/*! + * \brief Iterate over all symbols in a symbol table. + * + * Search symbol table and call a user-defined function for each + * matched symbol. Useful if multiple partial matches may occur. + * + * Iteration will stop if the call-back function returns a non-zero + * value. + * + * \param [in] iter Iterator control structure (see \ref + * bcmdrd_symbols_iter_t). + * + * \retval 0 No errors, otherwise call-back function return value. + */ +extern int +bcmdrd_symbols_iter(bcmdrd_symbols_iter_t *iter); + +/*! + * \brief Default field-view filtering function. + * + * See \ref bcmdrd_symbol_filter_cb_f for a detailed description. + * + * \param [in] symbol Symbol structure (single symbol). + * \param [in] fnames List of all field names for this unit. + * \param [in] encoding Field-view encoding string. + * \param [in] cookie Caller-provided context. + * + * \retval true if field should be filtered out, otherwise false. + */ +extern int +bcmdrd_symbol_field_filter(const bcmdrd_symbol_t *symbol, + const char **fnames, + const char *encoding, + void *cookie); + +/*! + * \brief Get list of fields IDs for given symbol ID. + * + * The function will always return the total number of valid field IDs + * in num_fid, irrespective of the value of list_max, i.e. if num_fid + * is greater than list_max, then the returned fid_list was truncated. + * + * For example, if list_max is zero, then the number of valid field + * IDs is returned in num_fid, but the fid_list is not updated (can be + * specified as NULL). The returned num_fid can then be used to + * allocate a sufficiently large fid_list array. + * + * \param [in] symbols - Symbols information structure for device. + * \param [in] sid Device-specific symbol ID + * \param [in] list_max Maximum number of entries in field ID list + * \param [out] fid_list Field ID list + * \param [out] num_fid Total number of field IDs for this symbold ID + * + * \retval 0 No errors + */ +int +bcmdrd_sym_fid_list_get(const bcmdrd_symbols_t *symbols, + bcmdrd_sid_t sid, size_t list_max, + bcmdrd_fid_t *fid_list, size_t *num_fid); + +/*! + * \brief Get field information for register/memory field. + * + * Obtain field information (name, start bit, end bit, etc.) for + * specified symbol ID and field ID. + * + * \param [in] symbols - Symbols information structure for device. + * \param [in] sid Device-specific symbol ID + * \param [in] fid Device-specific field ID + * \param [out] finfo Field information structure to fill + * + * \retval Pointer to symbol entry, or NULL if not found + */ +extern const bcmdrd_symbol_t * +bcmdrd_sym_field_info_get(const bcmdrd_symbols_t *symbols, + bcmdrd_sid_t sid, bcmdrd_fid_t fid, + bcmdrd_sym_field_info_t *finfo); + +/*! + * \brief Get field information for register/memory field. + * + * Obtain field information (name, start bit, end bit, etc.) for + * specified symbol ID and field name. + * + * \param [in] symbols - Symbols information structure for device. + * \param [in] sid Device-specific symbol ID + * \param [in] fname Field name (ASCII string) + * \param [out] finfo Field information structure to fill + * + * \return Pointer to symbol entry, or NULL if not found. + */ +extern const bcmdrd_symbol_t * +bcmdrd_sym_field_info_get_by_name(const bcmdrd_symbols_t *symbols, + bcmdrd_sid_t sid, const char *fname, + bcmdrd_sym_field_info_t *finfo); + +/*! + * \brief Decode raw field information. + * + * This function decodes raw field information as encoded in the + * symbol table. + * + * FOR INTERNAL USE ONLY. + * + * \param [in] fp Pointer to raw field encoding + * \param [in] fnames Device-specfic list of all field names + * \param [out] finfo Field information structure + * + * \return Pointer to the next field encoding, or NULL if end of list. + */ +extern uint32_t * +bcmdrd_sym_field_info_decode(uint32_t *fp, const char **fnames, + bcmdrd_sym_field_info_t *finfo); + +/*! + * \brief Return the number of fields in a register/memory entry. + * + * FOR INTERNAL USE ONLY. + * + * \param [in] fp Pointer to raw field encoding + * + * \return Number of fields in this register/memory entry. + */ +extern uint32_t +bcmdrd_sym_field_info_count(uint32_t *fp); + +/*! + * \brief Common memory comparison function. + * + * \param [in] ent_a Element a of memory to be compared. + * \param [in] ent_b Element b of memory to be compared. + * + * \return 0 if two memory elements equal, otherwise unequal. + */ +extern int +bcmdrd_sym_mem_cmp_undef(void *ent_a, void *ent_b); + +/*! + * \brief Memory comparison function with inverted mask. + * + * This function will compare only the specified mask bits in + * memory \c ent_a and \c ent_b. The memory mask will be specified + * in an inverted bit mask by \c imask. For example, if bits 0~3 are + * intended to be compared in a 32-bit entry, the contents of \c imask + * would be 0xfffffff0. + * + * \param [in] ent_a Memory entry a to be compared. + * \param [in] ent_b Memory entry b to be compared. + * \param [in] imask Invert mask of Memory entry to be masked with memory entry. + * \param [in] size Compared memory entry size in byte. + * + * \return 0 if two values equal, -1 if ent_a < ent_b, and 1 if ent_a > ent_b. + */ +extern int +bcmdrd_sym_mem_cmp_imask(void *ent_a, void *ent_b, void *imask, int size); + +/*! + * \brief Memory comparison function with mask. + * + * This function will compare only the specified mask bits in + * memory \c ent_a and \c ent_b. The memory mask will be specified in an + * bit mask by \c mask. For example, if bits 0~3 are intended to be compared + * in a 32-bit entry, the contents of \c mask would be 0x0000000f. + * + * \param [in] ent_a Memory entry a to be compared. + * \param [in] ent_b Memory entry b to be compared. + * \param [in] mask Mask of Memory entry to be masked with memory entry. + * \param [in] size Compared memory entry size in byte. + * + * \return 0 if two values equal, -1 if ent_a < ent_b, and 1 if ent_a > ent_b. + */ +extern int +bcmdrd_sym_mem_cmp_mask(void *ent_a, void *ent_b, void *mask, int size); + +/*! + * Memory element value comparison macro. + * The macro will not return only if the comparing values a and b + * are equal. + */ +#define BCMDRD_SYM_MEM_VAL_CMP_RETURN(_a, _b) { \ + if ((_a) < (_b)) { \ + return -1; \ + } \ + if ((_a) > (_b)) { \ + return 1; \ + } \ +} + +/*! + * \brief Get comparison function of a specified memory symbol. + * + * The comparison function is stored in \c profile of \ref bcmdrd_symbol_t. + * And \ref bcmdrd_sym_mem_profile_t is used for profile structure of + * memory symbols. The function is mainly to retrieve the memory + * comparison function pre-defined for memory symbols. + * + * \param [in] symbols Symbol table structure. + * \param [in] symbol Symbol structure. + * + * \return Memory comparison function. NULL on failure or + * no comparison function is specified. + */ +extern bcmdrd_sym_mem_cmp_f +bcmdrd_sym_mem_cmp_fun_get(const bcmdrd_symbols_t *symbols, + const bcmdrd_symbol_t *symbol); + +/*! + * \brief Get null entry of a specified memory symbol. + * + * The memory null entry is stored in \c profile of \ref bcmdrd_symbol_t. + * And \ref bcmdrd_sym_mem_profile_t is used for profile structure of + * memory symbols. The function is mainly to retrieve the null-entry + * pre-defined for memory symbols. + * + * \param [in] symbols Symbol table structure. + * \param [in] symbol Symbol structure. + * + * \return Memory null entry pointer. NULL on failure or + * no null entry is specified. + */ +extern const void * +bcmdrd_sym_mem_null_ent_get(const bcmdrd_symbols_t *symbols, + const bcmdrd_symbol_t *symbol); + +/*! + * \brief Get reset value and mask of a specified register symbol. + * + * This function returns the reset value and reset mask in variable length + * according to the word-size of the specified register symbol. + * The first n-word(s) of the return value is the reset value of the specified + * register which size is n word(s). The following n-word(s) of the + * return value is the reset mask of the specified register. + * + * \param [in] symbols Symbol table structure. + * \param [in] symbol Symbol structure. + * + * \return Pointer to reset value and reset mask or Null on failure. + */ +extern const uint32_t * +bcmdrd_sym_reg_resetval_get(const bcmdrd_symbols_t *symbols, + const bcmdrd_symbol_t *symbol); + +/*! + * \brief Check if default value of a specified symbol is non-zero. + * + * \param [in] symbols Symbol table structure. + * \param [in] symbol Symbol structure. + * + * \retval true Default value is non-zero. + * \retval false Default value is zero. + */ +extern bool +bcmdrd_sym_default_value_is_nonzero(const bcmdrd_symbols_t *symbols, + const bcmdrd_symbol_t *symbol); + +/*! + * \brief Get MOR clocks value of a specified symbol for read operation. + * + * The MOR (Multiple Outstanding Requests) clocks value is supposed to be + * used to optimize the CMIC S-bus DMA read opreration performance + * for this symbol. + * The returned value from this function can be taken as a reference for the + * MOR clocks value setting. + * + * \param [in] symbols Symbol table structure. + * \param [in] symbol Symbol structure. + * + * \return MOR clocks value or 0 if not supported. + */ +extern uint32_t +bcmdrd_sym_mor_clks_read_get(const bcmdrd_symbols_t *symbols, + const bcmdrd_symbol_t *symbol); + +/*! + * \brief Get MOR clocks value of a specified symbol for write operation. + * + * The MOR (Multiple Outstanding Requests) clocks value is supposed to be + * used to optimize the CMIC S-bus DMA write opreration performance + * for this symbol. + * The returned value from this function can be taken as a reference for the + * MOR clocks value setting. + * + * \param [in] symbols Symbol table structure. + * \param [in] symbol Symbol structure. + * + * \return MOR clocks value or 0 if not supported. + */ +extern uint32_t +bcmdrd_sym_mor_clks_write_get(const bcmdrd_symbols_t *symbols, + const bcmdrd_symbol_t *symbol); + +/*! + * \brief Get device-specific SER data structure. + * + * \param [in] symbols Symbol table structure. + * + * \return Device-specific SER data structure or NULL if not support. + */ +extern const void * +bcmdrd_sym_ser_data_get(const bcmdrd_symbols_t *symbols); + +/*! + * \brief Get SER profile offset of a specified symbol. + * + * Note that the given symbol is indicated to have no SER support if + * the returned offset is 0. + * + * \param [in] symbol Symbol structure. + * + * \return Offset to SER profile for a given symbol. + */ +extern int +bcmdrd_sym_ser_profile_offset_get(const bcmdrd_symbol_t *symbol); + +#endif /* BCMDRD_SYMBOLS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h new file mode 100644 index 000000000000..c341d7d2a351 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h @@ -0,0 +1,634 @@ +/*! \file bcmdrd_types.h + * + * Basic DRD types, which may be used outside the DRD as well. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMDRD_TYPES_H +#define BCMDRD_TYPES_H + +#include + +#include +#include + +#include + +/*! 16-bit-safe left shift */ +#define LSHIFT32(_val, _cnt) ((uint32_t)(_val) << (_cnt)) + +/*! 32-bit-safe left shift */ +#define LSHIFT64(_val, _cnt) ((uint64_t)(_val) << (_cnt)) + + + +#ifndef F32_MASK +/*! Create a bit mask of w bits as a 32-bit word. */ +#define F32_MASK(w) \ + ((((w) > 31) ? 0 : ((uint32_t)1 << (w))) - 1) +#endif + +#ifndef F64_MASK +/*! Create a bit mask of w bits as a 64-bit dword. */ +#define F64_MASK(w) \ + ((((w) > 63) ? 0 : ((uint64_t)1 << (w))) - 1) +#endif + +#ifndef F32_GET +/*! Extract a field of w bits at offset o from a 32-bit word d. */ +#define F32_GET(d,o,w) \ + (((d) >> o) & F32_MASK(w)) +#endif + +#ifndef F64_GET +/*! Extract a field of w bits at offset o from a 64-bit word d. */ +#define F64_GET(d,o,w) \ + (((d) >> o) & F64_MASK(w)) +#endif + +#ifndef F32_SET +/*! Set a field of w bits at offset o in a 32-bit word d. */ +#define F32_SET(d,o,w,v) \ + (d = ((d & ~(F32_MASK(w) << o)) | (((v) & F32_MASK(w)) << o))) +#endif + +#ifndef F64_SET +/*! Set a field of w bits at offset o in a 64-bit word d. */ +#define F64_SET(d,o,w,v) \ + (d = ((d & ~(F64_MASK(w) << o)) | (((v) & F64_MASK(w)) << o))) +#endif + +/*! Optionally force an error in compiler pre-processor. */ +#if BCMDRD_CONFIG_INCLUDE_FIELD_CHECKS +#define BCMDRD_COMPILER_ERROR (1 << 99) +#else +#define BCMDRD_COMPILER_ERROR 0 +#endif + +#ifndef F32_ENCODE +/*! + * Encode a value of a given width at a given offset. Optionally + * performs compile-time error checking on the value to ensure it fits + * within the given width. + */ +#define F32_ENCODE(v,o,w) \ + ( ((v & F32_MASK(w)) == v) ? \ + /* Value fits in width */ ( (uint32_t)(v) << o ) : \ + /* Value does not fit */ BCMDRD_COMPILER_ERROR) + +#endif + +#ifndef F64_ENCODE +/*! + * Encode a value of a given width at a given offset. Performs + * compile-time error checking on the value to ensure it fits within + * the given width. + */ +#define F64_ENCODE(v,o,w) \ + ( ((v & F64_MASK(w)) == v) ? \ + /* Value fits in width */ ( (uint64_t)(v) << o ) : \ + /* Value does not fit */ BCMDRD_COMPILER_ERROR) + +#endif + +/*! Max size of register/memory in words */ +#define BCMDRD_MAX_PT_WSIZE 32 + +/*! Words in port bit maps */ +#define BCMDRD_PBMP_WORD_MAX (((BCMDRD_CONFIG_MAX_PORTS - 1) >> 5) + 1) + +/*! + * Bitmap of ports of a particular type or properties. + */ +typedef struct bcmdrd_pbmp_s { + /*! Word array. */ + uint32_t w[BCMDRD_PBMP_WORD_MAX]; +} bcmdrd_pbmp_t; + +/* Port bitmap helper functions */ + +/*! + * \brief Check if port bitmap is empty. + * + * Check that no bits are set in a port bitmap of type \ref + * bcmdrd_pbmp_t. + * + * \param [in] pbmp Port bitmap. + * + * \retval true Port bitmap is empty. + * \retval false Port bitmap is not empty. + */ +extern int +bcmdrd_pbmp_is_null(const bcmdrd_pbmp_t *pbmp); + +/*! + * \brief Parse a port list string into a port bitmap. + * + * The port list string may contain commas to separate port numbers + * and hyphens to indicate port ranges. + * + * Examples: "2" "2,5" "2,5,7-13,43" + * + * \param [in] str String to be parsed. + * \param [out] pbmp Port bitmap. + * + * \retval 0 No errors. + * \retval -1 Fail to parse the string to a port bitmap. + */ +extern int +bcmdrd_pbmp_parse(const char *str, bcmdrd_pbmp_t *pbmp); + +/*! + * \brief Get bitmap word index for a given port. + * + * A port bitmap is an array of data words, and this macro will return + * the index of the data word associated with a given port number. + * + * No range check is performed on the port number. + * + * \param [in] _pbmp Port bitmap. + * \param [in] _port Port number to check. + */ +#define BCMDRD_PBMP_WORD(_pbmp, _port) \ + (&(_pbmp))->w[(_port) >> 5] + +/*! + * \brief Check if a port is member of a port bitmap. + * + * Check if a port is member of a port bitmap of type \ref + * bcmdrd_pbmp_t. + * + * No range check is performed on the port number. + * + * \param [in] _pbmp Port bitmap. + * \param [in] _port Port number to check. + */ +#define BCMDRD_PBMP_MEMBER(_pbmp, _port) \ + (BCMDRD_PBMP_WORD(_pbmp, _port) & LSHIFT32(1, (_port) & 0x1f)) + +/*! + * \brief Iterate over a port bitmap. + * + * Iterate over a port bitmap of type \ref bcmdrd_pbmp_t and execute + * the subsequent statement for all bits set in the port bitmap. + * + * \param [in] _pbmp Port bitmap. + * \param [in] _port Port iterator variable. + */ +#define BCMDRD_PBMP_ITER(_pbmp, _port) \ + for (_port = 0; _port < BCMDRD_CONFIG_MAX_PORTS; _port++) \ + if (BCMDRD_PBMP_WORD(_pbmp, _port) == 0) \ + _port += 31; \ + else if (BCMDRD_PBMP_MEMBER(_pbmp, _port)) + +/*! + * \brief Add a port to a port bitmap. + * + * Add a port to a port bitmap of type \ref bcmdrd_pbmp_t. + * + * No range check is performed on the port number. + * + * \param [in] _pbmp Port bitmap. + * \param [in] _port Port number to add. + */ +#define BCMDRD_PBMP_PORT_ADD(_pbmp, _port) \ + (BCMDRD_PBMP_WORD(_pbmp, _port) |= LSHIFT32(1, (_port) & 0x1f)) + +/*! + * \brief Remove a port from a port bitmap. + * + * Remove a port from a port bitmap of type \ref bcmdrd_pbmp_t. + * + * No range check is performed on the port number. + * + * \param [in] _pbmp Port bitmap. + * \param [in] _port Port number to remove. + */ +#define BCMDRD_PBMP_PORT_REMOVE(_pbmp, _port) \ + (BCMDRD_PBMP_WORD(_pbmp, _port) &= ~(LSHIFT32(1, (_port) & 0x1f))) + +/*! + * \brief Clear a port bitmap. + * + * Clear a port bitmap of type \ref bcmdrd_pbmp_t. + * + * After clearing the port bitmap, it will have no members.. + * + * \param [in] _pbmp Port bitmap. + */ +#define BCMDRD_PBMP_CLEAR(_pbmp) sal_memset(&_pbmp, 0, sizeof(bcmdrd_pbmp_t)) + +/*! + * \brief Get a word from a port bitmap. + * + * Get a 32-bit word from a port bitmap of type \ref bcmdrd_pbmp_t. + * + * \param [in] _pbmp Port bitmap. + * \param [in] _w Word number to get (first word is word 0). + */ +#define BCMDRD_PBMP_WORD_GET(_pbmp, _w) ((&(_pbmp))->w[_w]) + +/*! + * \brief Set a word in a port bitmap. + * + * Set a 32-bit word in a port bitmap of type \ref bcmdrd_pbmp_t. + * + * \param [in] _pbmp Port bitmap. + * \param [in] _w Word number to set (first word is word 0). + * \param [in] _val Value of word to set. + */ +#define BCMDRD_PBMP_WORD_SET(_pbmp, _w, _val) ((&(_pbmp))->w[_w]) = (_val) + +/*! + * \brief Helper macro for port bimap operations. + * + * \param [in] _pbmp0 First port bitmap. + * \param [in] _pbmp1 Second port bitmap. + * \param [in] _op Port bitmap operator. + */ +#define BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, _op) \ + do { \ + int _w; \ + for (_w = 0; _w < BCMDRD_PBMP_WORD_MAX; _w++) { \ + BCMDRD_PBMP_WORD_GET(_pbmp0, _w) _op BCMDRD_PBMP_WORD_GET(_pbmp1, _w); \ + } \ + } while (0) + +/*! Return true if port bitmap _pbmp is empty. */ +#define BCMDRD_PBMP_IS_NULL(_pbmp) (bcmdrd_pbmp_is_null(&(_pbmp))) + +/*! Return true if port bitmap _pbmp is not empty. */ +#define BCMDRD_PBMP_NOT_NULL(_pbmp) (!(bcmdrd_pbmp_is_null(&(_pbmp)))) + +/*! Assign port bitmap src to port bitmap dst. */ +#define BCMDRD_PBMP_ASSIGN(dst, src) sal_memcpy(&(dst), &(src), sizeof(bcmdrd_pbmp_t)) + +/*! + * Perform a logical AND operation between all bits of port bitmaps _pbmp0 and + * pbmp1. + */ +#define BCMDRD_PBMP_AND(_pbmp0, _pbmp1) BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, &=) + +/*! + * Perform a logical OR operation between all bits of port bitmaps _pbmp0 and + * pbmp1. + */ +#define BCMDRD_PBMP_OR(_pbmp0, _pbmp1) BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, |=) + +/*! + * Perform a logical XOR operation between all bits of port bitmaps _pbmp0 and + * pbmp1. + */ +#define BCMDRD_PBMP_XOR(_pbmp0, _pbmp1) BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, ^=) + +/*! + * Remove all bits in port bitmap _pbmp1 from port bitmap _pbmp0. + */ +#define BCMDRD_PBMP_REMOVE(_pbmp0, _pbmp1) BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, &= ~) + +/*! + * Assign an inversed port bitmap _pbmp1 to port bitmap _pbmp0, + * i.e. any port which is a member of _pbmp1 will not be a member of + * _pbmp0 and vice versa. + */ +#define BCMDRD_PBMP_NEGATE(_pbmp0, _pbmp1) BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, = ~) + +/*! Convert a number of (8-bit) bytes to a number of bits. */ +#define BCMDRD_BYTES2BITS(_x) ((_x) * 8) + +/*! Convert a number of (8-bit) bytes to a number of 32-bit words. */ +#define BCMDRD_BYTES2WORDS(_x) (((_x) + 3) / 4) + +/*! Convert a number of 32-bit words to a number of bits. */ +#define BCMDRD_WORDS2BITS(_x) ((_x) * 32) + +/*! Convert a number of 32-bit words to a number of (8-bit) bytes. */ +#define BCMDRD_WORDS2BYTES(_x) ((_x) * 4) + +/*! Align a size to a specific number of bytes. */ +#define BCMDRD_ALIGN(_s, _a) (((_s) + ((_a) - 1)) & ~((_a) - 1)) + + +/*! Create enumeration values from list of supported devices. */ +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + BCMDRD_DEV_T_##_bd, +/*! Enumeration for all base device types. */ +typedef enum { + BCMDRD_DEV_T_NONE = 0, +/*! \cond */ +#include +/*! \endcond */ + BCMDRD_DEV_T_COUNT +} bcmdrd_dev_type_t; + +/*! Generic ID (enum). */ +typedef uint32_t bcmdrd_id_t; + +/*! Generic invalid ID value. */ +#define BCMDRD_INVALID_ID ((bcmdrd_id_t)-1) + +/*! Invalid register value. */ +#define INVALIDr BCMDRD_INVALID_ID + +/*! Invalid memory value. */ +#define INVALIDm BCMDRD_INVALID_ID + +/*! Invalid field value. */ +#define INVALIDf BCMDRD_INVALID_ID + +/*! Check if an ID is valid, i.e. different from BCMDRD_INVALID_ID. */ +#define BCMDRD_ID_VALID(_id) \ + ((_id) != BCMDRD_INVALID_ID) + +/*! Device-specific symbol ID (enum). */ +typedef bcmdrd_id_t bcmdrd_sid_t; + +/*! Device-specific field ID (enum). */ +typedef bcmdrd_id_t bcmdrd_fid_t; + +/*! Enum for string/value map. */ +typedef shr_enum_map_t bcmdrd_enum_map_t; + +/*! + * \brief Port number domain. + * + * Port-based registers and memories use different port number domains + * in their physical address. For example, some registers use the + * physical port number, some registers use the logical port number + * and some use a MMU port number. + * + * For most devices, each block type use the same port number domain, + * but there are a few exceptions, so this needs to be a per-reg/mem + * property. + */ +typedef enum bcmdrd_port_num_domain_e { + BCMDRD_PND_PHYS = 0, + BCMDRD_PND_LOGIC = 1, + BCMDRD_PND_MMU = 2, + BCMDRD_PND_COUNT +} bcmdrd_port_num_domain_t; + +/*! + * \name Port types. + * \anchor BCMDRD_PORT_TYPE_xxx + * + * Port types are defined as bit masks, such that it is possible to + * group multiple types into a single one, e.g. CPU and loopback ports + * could be greoup as internal ports. + */ + +/*! \{ */ + +/*! Port type undefined. */ +#define BCMDRD_PORT_TYPE_UNDEF 0 + +/*! Reserved port (e.g. spare port or other unused port). */ +#define BCMDRD_PORT_TYPE_RSVD (1U << 0) + +/*! CPU/HMI port (internal). */ +#define BCMDRD_PORT_TYPE_CPU (1U << 1) + +/*! Loopback port (internal). */ +#define BCMDRD_PORT_TYPE_LB (1U << 2) + +/*! Front-panel port. */ +#define BCMDRD_PORT_TYPE_FPAN (1U << 3) + +/*! Up-link port. */ +#define BCMDRD_PORT_TYPE_UPLINK (1U << 4) + +/*! Management port. */ +#define BCMDRD_PORT_TYPE_MGMT (1U << 5) + +/*! RDB port. */ +#define BCMDRD_PORT_TYPE_RDB (1U << 6) + +/*! FAE port. */ +#define BCMDRD_PORT_TYPE_FAE (1U << 7) + +/*! AUX port. */ +#define BCMDRD_PORT_TYPE_AUX (1U << 8) +/*! } */ + +/*! + * \brief Port category. + * + * Please refer to \ref BCMDRD_PORT_TYPE_xxx for a list possible + * values (categories). + * + * Values are bit-based such that a port can belong to multiple + * categories. + */ +typedef uint32_t bcmdrd_port_type_t; + +/*! Words in pipe maps */ +#define BCMDRD_PIPEMAP_WORD_MAX (((BCMDRD_CONFIG_MAX_PIPES - 1) >> 5) + 1) + +/*! + * Bitmap of pipes of a particular type. + */ +typedef struct bcmdrd_pipemap_s { + /*! Word array. */ + uint32_t w[BCMDRD_PIPEMAP_WORD_MAX]; +} bcmdrd_pipemap_t; + +/* pipe map helper functions */ + +/*! + * \brief Check if pipe map is empty. + * + * Check that no bits are set in a pipe map of type \ref + * bcmdrd_pipemap_t. + * + * \param [in] pm pipe map. + * + * \retval true Pipe map is empty. + * \retval false Pipe map is not empty. + */ +extern bool +bcmdrd_pipemap_is_null(const bcmdrd_pipemap_t *pm); + +/*! + * \brief Get bitmap word index for a given pipe. + * + * A pipe map is an array of data words, and this macro will return + * the index of the data word associated with a given pipe number. + * + * No range check is performed on the pipe number. + * + * \param [in] _pm Pipe map. + * \param [in] _pipe Pipe number to check. + */ +#define BCMDRD_PIPEMAP_WORD(_pm, _pipe) \ + (&(_pm))->w[(_pipe) >> 5] + +/*! + * \brief Check if a pipe is member of a pipe map. + * + * Check if a pipe is member of a pipe map of type \ref + * bcmdrd_pipemap_t. + * + * No range check is performed on the pipe number. + * + * \param [in] _pm Pipe map. + * \param [in] _pipe Pipe number to check. + */ +#define BCMDRD_PIPEMAP_MEMBER(_pm, _pipe) \ + (BCMDRD_PIPEMAP_WORD(_pm, _pipe) & LSHIFT32(1, (_pipe) & 0x1f)) + +/*! + * \brief Iterate over a pipe map. + * + * Iterate over a pipe map of type \ref bcmdrd_pipemap_t and + * execute the subsequent statement for all bits set in the pipe + * bitmap. + * + * \param [in] _pm Pipe map. + * \param [in] _pipe Pipe iterator variable. + */ +#define BCMDRD_PIPEMAP_ITER(_pm, _pipe) \ + for (_pipe = 0; _pipe < BCMDRD_CONFIG_MAX_PIPES; _pipe++) \ + if (BCMDRD_PIPEMAP_WORD(_pm, _pipe) == 0) \ + _pipe += 31; \ + else if (BCMDRD_PIPEMAP_MEMBER(_pm, _pipe)) + +/*! + * \brief Add a pipe to a pipe map. + * + * Add a pipe to a pipe map of type \ref bcmdrd_pipemap_t. + * + * No range check is performed on the pipe number. + * + * \param [in] _pm Pipe map. + * \param [in] _pipe Pipe number to add. + */ +#define BCMDRD_PIPEMAP_PIPE_ADD(_pm, _pipe) \ + (BCMDRD_PIPEMAP_WORD(_pm, _pipe) |= LSHIFT32(1, (_pipe) & 0x1f)) + +/*! + * \brief Remove a pipe from a pipe map. + * + * Remove a pipe from a pipe map of type \ref bcmdrd_pipemap_t. + * + * No range check is performed on the pipe number. + * + * \param [in] _pm Pipe map. + * \param [in] _pipe Pipe number to remove. + */ +#define BCMDRD_PIPEMAP_PIPE_REMOVE(_pm, _pipe) \ + (BCMDRD_PIPEMAP_WORD(_pm, _pipe) &= ~(LSHIFT32(1, (_pipe) & 0x1f))) + +/*! + * \brief Clear a pipe map. + * + * Clear a pipe map of type \ref bcmdrd_pipemap_t. + * + * After clearing the pipe map, it will have no members. + * + * \param [in] _pm Pipe map. + */ +#define BCMDRD_PIPEMAP_CLEAR(_pm) \ + sal_memset(&_pm, 0, sizeof(bcmdrd_pipemap_t)) + +/*! + * \brief Get a word from a pipe map. + * + * Get a 32-bit word from a pipe map of type \ref bcmdrd_pipemap_t. + * + * \param [in] _pm Pipe map. + * \param [in] _w Word number to get (first word is word 0). + */ +#define BCMDRD_PIPEMAP_WORD_GET(_pm, _w) \ + ((&(_pm))->w[_w]) + +/*! + * \brief Set a word in a pipe map. + * + * Set a 32-bit word in a pipe map of type \ref bcmdrd_pipemap_t. + * + * \param [in] _pm Pipe map. + * \param [in] _w Word number to set (first word is word 0). + * \param [in] _val Value of word to set. + */ +#define BCMDRD_PIPEMAP_WORD_SET(_pm, _w, _val) \ + ((&(_pm))->w[_w]) = (_val) + +/*! + * \brief Helper macro for pipe map operations. + * + * \param [in] _pm0 First pipe map. + * \param [in] _pm1 Second pipe map. + * \param [in] _op Pipe map operator. + */ +#define BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, _op) \ + do { \ + int _w; \ + for (_w = 0; _w < BCMDRD_PIPEMAP_WORD_MAX; _w++) { \ + BCMDRD_PIPEMAP_WORD_GET(_pm0, _w) _op BCMDRD_PIPEMAP_WORD_GET(_pm1, _w); \ + } \ + } while (0) + +/*! Return true if pipe map _pm is empty. */ +#define BCMDRD_PIPEMAP_IS_NULL(_pm) \ + (bcmdrd_pipemap_is_null(&(_pm))) + +/*! Return true if pipe map _pm is not empty. */ +#define BCMDRD_PIPEMAP_NOT_NULL(_pm) \ + (!(bcmdrd_pipemap_is_null(&(_pm)))) + +/*! Assign pipe map src to pipe map dst. */ +#define BCMDRD_PIPEMAP_ASSIGN(dst, src) \ + sal_memcpy(&(dst), &(src), sizeof(bcmdrd_pipemap_t)) + +/*! + * Perform a logical AND operation between all bits of pipe maps _pm0 + * and _pm1. + */ +#define BCMDRD_PIPEMAP_AND(_pm0, _pm1) \ + BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, &=) + +/*! + * Perform a logical OR operation between all bits of pipe maps _pm0 + * and _pm1. + */ +#define BCMDRD_PIPEMAP_OR(_pm0, _pm1) \ + BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, |=) + +/*! + * Perform a logical XOR operation between all bits of pipe maps _pm0 + * and _pm1. + */ +#define BCMDRD_PIPEMAP_XOR(_pm0, _pm1) \ + BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, ^=) + +/*! + * Remove all bits in pipe map _pm1 from pipe map _pm0. + */ +#define BCMDRD_PIPEMAP_REMOVE(_pm0, _pm1) \ + BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, &= ~) + +/*! + * Assign an inversed pipe map _pm1 to pipe map _pm0, i.e. any pipe + * which is a member of _pm1 will not be a member of _pm0 and vice + * versa. + */ +#define BCMDRD_PIPEMAP_NEGATE(_pm0, _pm1) \ + BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, = ~) + +#endif /* BCMDRD_TYPES_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h index 455f748e9077..3124811a4765 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h @@ -23,9 +23,10 @@ * compilation * d) Make sure the compilation include path includes * 'bcmdrd_custom_config.h' + * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -63,7 +64,12 @@ /*! Maximum number of ports per chip supported. */ #ifndef BCMDRD_CONFIG_MAX_PORTS -#define BCMDRD_CONFIG_MAX_PORTS 848 +#define BCMDRD_CONFIG_MAX_PORTS 1088 +#endif + +/*! Maximum number of pipes per chip supported. */ +#ifndef BCMDRD_CONFIG_MAX_PIPES +#define BCMDRD_CONFIG_MAX_PIPES 96 #endif /*! Direct access to memory-mapped registers. */ @@ -145,6 +151,9 @@ CONFIG_OPTION(BCMDRD_CONFIG_MAX_UNITS) #ifdef BCMDRD_CONFIG_MAX_PORTS CONFIG_OPTION(BCMDRD_CONFIG_MAX_PORTS) #endif +#ifdef BCMDRD_CONFIG_MAX_PIPES +CONFIG_OPTION(BCMDRD_CONFIG_MAX_PIPES) +#endif #ifdef BCMDRD_CONFIG_MEMMAP_DIRECT CONFIG_OPTION(BCMDRD_CONFIG_MEMMAP_DIRECT) #endif diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h index 1fa1afd92af0..29ff05fc0864 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h @@ -4,7 +4,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/drd/instpkgs.pl * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -38,7 +38,6 @@ * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 * #define BCMDRD_CONFIG_INCLUDE_BCM56080_A1 0 * - * * The value of BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT is used for any * chips which are left unspecified. Set this value to 1 or 0 to * include or exclude all chips by default. @@ -72,6 +71,20 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_BCM56080_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A1 BCMDRD_CONFIG_INCLUDE_BCM56080_Ax +#endif +/* Resolve all interchip dependencies */ +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A1 == 1 +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 +#endif +#endif /* @@ -89,6 +102,9 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56081_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56081_A0 BCMDRD_CONFIG_INCLUDE_BCM56081_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56081_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56081_A1 BCMDRD_CONFIG_INCLUDE_BCM56081_Ax +#endif /* Resolve all interchip dependencies */ #if BCMDRD_CONFIG_INCLUDE_BCM56081_A0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 @@ -100,6 +116,13 @@ #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56081_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 +#endif +#endif /* @@ -117,6 +140,9 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56082_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56082_A0 BCMDRD_CONFIG_INCLUDE_BCM56082_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56082_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56082_A1 BCMDRD_CONFIG_INCLUDE_BCM56082_Ax +#endif /* Resolve all interchip dependencies */ #if BCMDRD_CONFIG_INCLUDE_BCM56082_A0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 @@ -128,6 +154,13 @@ #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56082_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 +#endif +#endif /* @@ -145,6 +178,9 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56083_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56083_A0 BCMDRD_CONFIG_INCLUDE_BCM56083_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56083_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56083_A1 BCMDRD_CONFIG_INCLUDE_BCM56083_Ax +#endif /* Resolve all interchip dependencies */ #if BCMDRD_CONFIG_INCLUDE_BCM56083_A0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 @@ -156,6 +192,13 @@ #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56083_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 +#endif +#endif /* @@ -173,6 +216,9 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56084_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56084_A0 BCMDRD_CONFIG_INCLUDE_BCM56084_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56084_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56084_A1 BCMDRD_CONFIG_INCLUDE_BCM56084_Ax +#endif /* Resolve all interchip dependencies */ #if BCMDRD_CONFIG_INCLUDE_BCM56084_A0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 @@ -184,6 +230,96 @@ #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56084_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 +#endif +#endif + + +/* + * BCM56085 + */ + +/* Sets the default include state if it was not given */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56085 +#define BCMDRD_CONFIG_INCLUDE_BCM56085 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +/* Resolve revision dependencies */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56085_Ax +#define BCMDRD_CONFIG_INCLUDE_BCM56085_Ax BCMDRD_CONFIG_INCLUDE_BCM56085 +#endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56085_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56085_A0 BCMDRD_CONFIG_INCLUDE_BCM56085_Ax +#endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56085_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56085_A1 BCMDRD_CONFIG_INCLUDE_BCM56085_Ax +#endif +/* Resolve all interchip dependencies */ +#if BCMDRD_CONFIG_INCLUDE_BCM56085_A0 == 1 +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 +#endif +#endif +#if BCMDRD_CONFIG_INCLUDE_BCM56085_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1 +#endif +#endif + + +/* + * BCM56690 + */ + +/* Sets the default include state if it was not given */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56690 +#define BCMDRD_CONFIG_INCLUDE_BCM56690 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +/* Resolve revision dependencies */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56690_Ax +#define BCMDRD_CONFIG_INCLUDE_BCM56690_Ax BCMDRD_CONFIG_INCLUDE_BCM56690 +#endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56690_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56690_A0 BCMDRD_CONFIG_INCLUDE_BCM56690_Ax +#endif + + +/* + * BCM56692 + */ + +/* Sets the default include state if it was not given */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56692 +#define BCMDRD_CONFIG_INCLUDE_BCM56692 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +/* Resolve revision dependencies */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56692_Ax +#define BCMDRD_CONFIG_INCLUDE_BCM56692_Ax BCMDRD_CONFIG_INCLUDE_BCM56692 +#endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56692_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56692_A0 BCMDRD_CONFIG_INCLUDE_BCM56692_Ax +#endif +/* Resolve all interchip dependencies */ +#if BCMDRD_CONFIG_INCLUDE_BCM56692_A0 == 1 +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56690_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56690_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +#if BCMDRD_CONFIG_INCLUDE_BCM56690_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56690_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56690_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56690_A0_IMPLIED 1 +#endif +#endif /* @@ -218,6 +354,9 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56782_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56782_A0 BCMDRD_CONFIG_INCLUDE_BCM56782_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56782_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56782_A1 BCMDRD_CONFIG_INCLUDE_BCM56782_Ax +#endif /* Resolve all interchip dependencies */ #if BCMDRD_CONFIG_INCLUDE_BCM56782_A0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 @@ -229,6 +368,13 @@ #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56782_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 +#endif +#endif /* @@ -302,6 +448,9 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56786_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56786_A0 BCMDRD_CONFIG_INCLUDE_BCM56786_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56786_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56786_A1 BCMDRD_CONFIG_INCLUDE_BCM56786_Ax +#endif /* Resolve all interchip dependencies */ #if BCMDRD_CONFIG_INCLUDE_BCM56786_A0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 @@ -313,6 +462,13 @@ #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56786_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 +#endif +#endif /* @@ -330,6 +486,9 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56787_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56787_A0 BCMDRD_CONFIG_INCLUDE_BCM56787_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56787_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56787_A1 BCMDRD_CONFIG_INCLUDE_BCM56787_Ax +#endif /* Resolve all interchip dependencies */ #if BCMDRD_CONFIG_INCLUDE_BCM56787_A0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 @@ -341,6 +500,13 @@ #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56787_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 +#endif +#endif /* @@ -358,6 +524,9 @@ #ifndef BCMDRD_CONFIG_INCLUDE_BCM56788_A0 #define BCMDRD_CONFIG_INCLUDE_BCM56788_A0 BCMDRD_CONFIG_INCLUDE_BCM56788_Ax #endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM56788_A1 +#define BCMDRD_CONFIG_INCLUDE_BCM56788_A1 BCMDRD_CONFIG_INCLUDE_BCM56788_Ax +#endif /* Resolve all interchip dependencies */ #if BCMDRD_CONFIG_INCLUDE_BCM56788_A0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 @@ -369,6 +538,13 @@ #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 #endif #endif +#if BCMDRD_CONFIG_INCLUDE_BCM56788_A1 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1 +#endif +#endif /* @@ -928,22 +1104,22 @@ /* - * BCM78905 + * BCM78902 */ /* Sets the default include state if it was not given */ -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905 -#define BCMDRD_CONFIG_INCLUDE_BCM78905 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78902 +#define BCMDRD_CONFIG_INCLUDE_BCM78902 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT #endif /* Resolve revision dependencies */ -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905_Bx -#define BCMDRD_CONFIG_INCLUDE_BCM78905_Bx BCMDRD_CONFIG_INCLUDE_BCM78905 +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78902_Bx +#define BCMDRD_CONFIG_INCLUDE_BCM78902_Bx BCMDRD_CONFIG_INCLUDE_BCM78902 #endif -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905_B0 -#define BCMDRD_CONFIG_INCLUDE_BCM78905_B0 BCMDRD_CONFIG_INCLUDE_BCM78905_Bx +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78902_B0 +#define BCMDRD_CONFIG_INCLUDE_BCM78902_B0 BCMDRD_CONFIG_INCLUDE_BCM78902_Bx #endif /* Resolve all interchip dependencies */ -#if BCMDRD_CONFIG_INCLUDE_BCM78905_B0 == 1 +#if BCMDRD_CONFIG_INCLUDE_BCM78902_B0 == 1 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78900_B0 #define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT #endif @@ -955,6 +1131,51 @@ #endif +/* + * BCM78903 + */ + +/* Sets the default include state if it was not given */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78903 +#define BCMDRD_CONFIG_INCLUDE_BCM78903 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +/* Resolve revision dependencies */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78903_Bx +#define BCMDRD_CONFIG_INCLUDE_BCM78903_Bx BCMDRD_CONFIG_INCLUDE_BCM78903 +#endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78903_B0 +#define BCMDRD_CONFIG_INCLUDE_BCM78903_B0 BCMDRD_CONFIG_INCLUDE_BCM78903_Bx +#endif +/* Resolve all interchip dependencies */ +#if BCMDRD_CONFIG_INCLUDE_BCM78903_B0 == 1 +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78900_B0 +#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +#if BCMDRD_CONFIG_INCLUDE_BCM78900_B0 != 1 +#undef BCMDRD_CONFIG_INCLUDE_BCM78900_B0 +#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 1 +#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0_IMPLIED 1 +#endif +#endif + + +/* + * BCM78905 + */ + +/* Sets the default include state if it was not given */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905 +#define BCMDRD_CONFIG_INCLUDE_BCM78905 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT +#endif +/* Resolve revision dependencies */ +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905_Ax +#define BCMDRD_CONFIG_INCLUDE_BCM78905_Ax BCMDRD_CONFIG_INCLUDE_BCM78905 +#endif +#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905_A0 +#define BCMDRD_CONFIG_INCLUDE_BCM78905_A0 BCMDRD_CONFIG_INCLUDE_BCM78905_Ax +#endif + + #endif /* BCMDRD_CONFIG_CHIPS_H */ /* @@ -965,21 +1186,39 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080_A1) #ifdef BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED) #endif CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56081) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56081_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56081_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56081_A1) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56082) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56082_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56082_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56082_A1) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56083) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56083_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56083_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56083_A1) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56084) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56084_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56084_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56084_A1) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56085) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56085_Ax) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56085_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56085_A1) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56690) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56690_Ax) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56690_A0) +#ifdef BCMDRD_CONFIG_INCLUDE_BCM56690_A0_IMPLIED +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56690_A0_IMPLIED) +#endif +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56692) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56692_Ax) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56692_A0) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780_A0) @@ -989,6 +1228,7 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56782) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56782_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56782_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56782_A1) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56784) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56784_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56784_A0) @@ -998,12 +1238,15 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56785_A0) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56786) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56786_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56786_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56786_A1) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56787) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56787_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56787_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56787_A1) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56788) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56788_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56788_A0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56788_A1) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56789) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56789_Ax) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56789_A0) @@ -1104,8 +1347,17 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78900_B0) #ifdef BCMDRD_CONFIG_INCLUDE_BCM78900_B0_IMPLIED CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78900_B0_IMPLIED) #endif +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78902) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78902_Bx) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78902_B0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78903) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78903_Bx) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78903_B0) CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_Bx) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_B0) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_Ax) +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_A0) +#ifdef BCMDRD_CONFIG_INCLUDE_BCM78905_A0_IMPLIED +CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_A0_IMPLIED) +#endif #undef CONFIG_OPTION #endif /* #ifdef CONFIG_OPTION */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_local_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_local_types.h new file mode 100644 index 000000000000..16bd47565773 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_local_types.h @@ -0,0 +1,127 @@ +/*! \file bcmlrd_local_types.h + * + * \brief Local Logical Table Types + * + * This file should not depend on any other header files than the SAL + * types. It is used for building libraries that are only a small + * subset of the full SDK (e.g. the PMD library). + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMLRD_LOCAL_TYPES_H +#define BCMLRD_LOCAL_TYPES_H + +#include + +/*! Create enumeration values from list of supported variants. */ +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ + BCMLRD_VARIANT_T_##_bd##_##_ve, + +/*! Enumeration for all device variants. */ +typedef enum bcmlrd_variant_e { + BCMLRD_VARIANT_T_NONE = 0, +/*! \cond */ +#include +/*! \endcond */ + BCMLRD_VARIANT_T_COUNT +} bcmlrd_variant_t; + +/*! + * \brief Information on match ID fields. + * + * This structure is used to store information for each + * match id field. + * + */ +typedef struct bcmlrd_match_id_db_s { + /*! Match ID name. */ + const char *name; + + /*! Match. */ + uint32_t match; + + /*! Mask for match. */ + uint32_t match_mask; + + /*! Maxbit of the match id field in the physical container. */ + uint8_t match_maxbit; + + /*! Minbit of the match id field in the physical container. */ + uint8_t match_minbit; + + /*! Maxbit of the match id field. */ + uint8_t maxbit; + + /*! Minbit of the match id field. */ + uint8_t minbit; + + /*! Default value for the match id field. */ + uint32_t value; + + /*! Mask for the default value for the match id field. */ + uint32_t mask; + + /*! Maxbit of the field within match_id container. */ + uint8_t pmaxbit; + + /*! Minbit of the field within match_id container. */ + uint8_t pminbit; + + /*! ARC ID zone minbit. */ + uint8_t zone_minbit; + + /*! ARC ID mask. */ + uint64_t arc_id_mask; + + /*! Number of words used by zone bitmap. */ + uint8_t num_zone_bmp_words; + + /*! Zone bitmap. */ + uint32_t *zone_bmp; +} bcmlrd_match_id_db_t; + +/*! + * \brief Get device variant. + * + * Get device logical table variant, + * which is an enumeration of all supported logical table variants. + * + * \param [in] unit Unit number. + * + * \retval Variant type. + */ +extern bcmlrd_variant_t +bcmlrd_variant_get(int unit); + +/*! + * \brief Set device variant. + * + * Set device logical table variant, + * which is an enumeration of all supported logical table variants. + * + * \param [in] unit Unit number. + * \param [in] variant BCMLRD variant enumeration. + * + * \retval 0 OK + * \retval <0 ERROR + */ +extern int +bcmlrd_variant_set(int unit, bcmlrd_variant_t variant); + +#endif /* BCMLRD_LOCAL_TYPES_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h index 2949f6626425..057605be68da 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h @@ -13,7 +13,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h index 1d746a2e981b..89a7dc11cb71 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h new file mode 100644 index 000000000000..891c47c0c610 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h @@ -0,0 +1,39 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCMLRD_CHIP_VARIANT_DEFS_H +#define GEN_BCMLRD_CHIP_VARIANT_DEFS_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#include +#include +#include + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCMLRD_CHIP_VARIANT_DEFS_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h new file mode 100644 index 000000000000..93529349fcce --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h @@ -0,0 +1,56 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table definition files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ +#ifndef BCMLRD_VARIANT_DEFS_INTERNAL_H +#define BCMLRD_VARIANT_DEFS_INTERNAL_H +#ifndef DOXYGEN_IGNORE_AUTOGEN +/*+replace reverse */ +#include "../../defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h" +#include "../../defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h" +#include "../../defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h" +#include "../../defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_lrd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_lrd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_lrd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_lrd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_lrd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_lrd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h" +#include "../../defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h" +/*-replace*/ +#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#endif /* BCMLRD_VARIANT_DEFS_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h similarity index 77% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h index 154ab064843e..2e84a01c79c7 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -24,14 +24,14 @@ * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_UTCFG_LTD_VARIANT_DEF_H -#define GEN_BCM56880_A0_UTCFG_LTD_VARIANT_DEF_H +#ifndef GEN_BCMLRD_CHIP_VARIANT_LIMITS_H +#define GEN_BCMLRD_CHIP_VARIANT_LIMITS_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56880_A0_UTCFG 18 -#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTCFG 4 +#define BCMLRD_VARIANT_MAX BCMLTD_VARIANT_MAX + #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56880_A0_UTCFG_LTD_VARIANT_DEF_H */ +#endif /* GEN_BCMLRD_CHIP_VARIANT_LIMITS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h similarity index 77% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h index ce6a7109d385..fdd590bade2c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -24,14 +24,13 @@ * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_UTLTM_LTD_VARIANT_DEF_H -#define GEN_BCM56880_A0_UTLTM_LTD_VARIANT_DEF_H +#ifndef GEN_BCM56080_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56080_A0_LRD_VARIANT_DEF_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56880_A0_UTLTM 20 -#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTLTM 6 +#define BCMLRD_VARIANT_BCM56080_A0_BASE BCMLTD_VARIANT_BCM56080_A0_BASE #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56880_A0_UTLTM_LTD_VARIANT_DEF_H */ +#endif /* GEN_BCM56080_A0_LRD_VARIANT_DEF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h similarity index 77% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h index 6a7659d095bb..24ec0672a87c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -24,14 +24,13 @@ * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_UTLRD_LTD_VARIANT_DEF_H -#define GEN_BCM56880_A0_UTLRD_LTD_VARIANT_DEF_H +#ifndef GEN_BCM56690_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56690_A0_LRD_VARIANT_DEF_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56880_A0_UTLRD 19 -#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTLRD 5 +#define BCMLRD_VARIANT_BCM56690_A0_BASE BCMLTD_VARIANT_BCM56690_A0_BASE #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56880_A0_UTLRD_LTD_VARIANT_DEF_H */ +#endif /* GEN_BCM56690_A0_LRD_VARIANT_DEF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h new file mode 100644 index 000000000000..7ca42dd783f1 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56690_A0_DNA_6_5_29_0_1_LRD_VARIANT_DEF_H +#define GEN_BCM56690_A0_DNA_6_5_29_0_1_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1 BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56690_A0_DNA_6_5_29_0_1_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h similarity index 76% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h index e6efc2937edf..75b35152571a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -24,14 +24,13 @@ * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_DEF_H -#define GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_DEF_H +#ifndef GEN_BCM56780_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56780_A0_LRD_VARIANT_DEF_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56880_A0_CNA_1_2_13 15 -#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_CNA_1_2_13 1 +#define BCMLRD_VARIANT_BCM56780_A0_BASE BCMLTD_VARIANT_BCM56780_A0_BASE #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_DEF_H */ +#endif /* GEN_BCM56780_A0_LRD_VARIANT_DEF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_lrd_variant_def.h new file mode 100644 index 000000000000..2cff9e508c63 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_CNA_6_5_29_LRD_VARIANT_DEF_H +#define GEN_BCM56780_A0_CNA_6_5_29_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56780_A0_CNA_6_5_29 BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_29 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_CNA_6_5_29_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_lrd_variant_def.h new file mode 100644 index 000000000000..50ff08e32293 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_DNA_2_9_5_0_LRD_VARIANT_DEF_H +#define GEN_BCM56780_A0_DNA_2_9_5_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56780_A0_DNA_2_9_5_0 BCMLTD_VARIANT_BCM56780_A0_DNA_2_9_5_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_DNA_2_9_5_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_lrd_variant_def.h new file mode 100644 index 000000000000..08de29da3880 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_HNA_6_5_29_2_1_LRD_VARIANT_DEF_H +#define GEN_BCM56780_A0_HNA_6_5_29_2_1_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56780_A0_HNA_6_5_29_2_1 BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_29_2_1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_HNA_6_5_29_2_1_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_lrd_variant_def.h new file mode 100644 index 000000000000..408b41986d42 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_INA_2_6_11_0_LRD_VARIANT_DEF_H +#define GEN_BCM56780_A0_INA_2_6_11_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56780_A0_INA_2_6_11_0 BCMLTD_VARIANT_BCM56780_A0_INA_2_6_11_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_INA_2_6_11_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h new file mode 100644 index 000000000000..ee2fe45de3d0 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56880_A0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56880_A0_BASE BCMLTD_VARIANT_BCM56880_A0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_lrd_variant_def.h new file mode 100644 index 000000000000..09997a84fd37 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_CNA_6_5_29_LRD_VARIANT_DEF_H +#define GEN_BCM56880_A0_CNA_6_5_29_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56880_A0_CNA_6_5_29 BCMLTD_VARIANT_BCM56880_A0_CNA_6_5_29 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_CNA_6_5_29_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_lrd_variant_def.h new file mode 100644 index 000000000000..4949bfe0cc05 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_DNA_4_11_4_0_LRD_VARIANT_DEF_H +#define GEN_BCM56880_A0_DNA_4_11_4_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56880_A0_DNA_4_11_4_0 BCMLTD_VARIANT_BCM56880_A0_DNA_4_11_4_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_DNA_4_11_4_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_lrd_variant_def.h new file mode 100644 index 000000000000..e915df627b6d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_HNA_6_5_29_2_2_LRD_VARIANT_DEF_H +#define GEN_BCM56880_A0_HNA_6_5_29_2_2_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56880_A0_HNA_6_5_29_2_2 BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_29_2_2 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_HNA_6_5_29_2_2_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_lrd_variant_def.h new file mode 100644 index 000000000000..e1b3b4a6f3c9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_NFA_2_1_7_0_LRD_VARIANT_DEF_H +#define GEN_BCM56880_A0_NFA_2_1_7_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56880_A0_NFA_2_1_7_0 BCMLTD_VARIANT_BCM56880_A0_NFA_2_1_7_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_NFA_2_1_7_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h new file mode 100644 index 000000000000..632d17ad3d1a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56890_A0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56890_A0_BASE BCMLTD_VARIANT_BCM56890_A0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_lrd_variant_def.h new file mode 100644 index 000000000000..3bc2b93baffa --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_CNA_6_5_29_LRD_VARIANT_DEF_H +#define GEN_BCM56890_A0_CNA_6_5_29_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56890_A0_CNA_6_5_29 BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_29 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_CNA_6_5_29_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_lrd_variant_def.h new file mode 100644 index 000000000000..3aeffb76601f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_DNA_6_5_29_1_2_LRD_VARIANT_DEF_H +#define GEN_BCM56890_A0_DNA_6_5_29_1_2_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56890_A0_DNA_6_5_29_1_2 BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_29_1_2 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_DNA_6_5_29_1_2_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h new file mode 100644 index 000000000000..d2da0a890e71 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56990_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56990_A0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56990_A0_BASE BCMLTD_VARIANT_BCM56990_A0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56990_A0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h new file mode 100644 index 000000000000..cbca48393a6b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56990_B0_LRD_VARIANT_DEF_H +#define GEN_BCM56990_B0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56990_B0_BASE BCMLTD_VARIANT_BCM56990_B0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56990_B0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h new file mode 100644 index 000000000000..3e10c55d19a2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56996_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56996_A0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56996_A0_BASE BCMLTD_VARIANT_BCM56996_A0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56996_A0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h new file mode 100644 index 000000000000..aae5253afd4e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56996_B0_LRD_VARIANT_DEF_H +#define GEN_BCM56996_B0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56996_B0_BASE BCMLTD_VARIANT_BCM56996_B0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56996_B0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h new file mode 100644 index 000000000000..97faa4b4ff4b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56998_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56998_A0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56998_A0_BASE BCMLTD_VARIANT_BCM56998_A0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56998_A0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h new file mode 100644 index 000000000000..b47835d17bb0 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56999_A0_LRD_VARIANT_DEF_H +#define GEN_BCM56999_A0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56999_A0_BASE BCMLTD_VARIANT_BCM56999_A0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56999_A0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h new file mode 100644 index 000000000000..97cd19d0cb81 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM78900_B0_LRD_VARIANT_DEF_H +#define GEN_BCM78900_B0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM78900_B0_BASE BCMLTD_VARIANT_BCM78900_B0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78900_B0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h new file mode 100644 index 000000000000..f89062126e7a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM78905_A0_LRD_VARIANT_DEF_H +#define GEN_BCM78905_A0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM78905_A0_BASE BCMLTD_VARIANT_BCM78905_A0_BASE +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78905_A0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h index 18abbe88055d..0cc8db4a5721 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h @@ -36,7 +36,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h index c4a5131ef2d2..e485e8e48082 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h index 2dfe7fe81277..7e3bc1b1bdd8 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h similarity index 63% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h index 27d73773bdbc..f98c936175ff 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -24,17 +24,24 @@ * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H */ +#ifndef GEN_BCMLTD_CONFIG_VARIANT_H +#define GEN_BCMLTD_CONFIG_VARIANT_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_1_2_10_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,hna_1_2_10_0,HNA_1_2_10_0,_,BCMLTD_VARIANT_BCM56780_A0_HNA_1_2_10_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_1_2_10_0,NULL,0,0) +#include + +/* This determines whether a BASE variant is included or excluded by default */ +#ifndef BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#define BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT 1 #endif -#endif /* DOXYGEN_IGNORE_AUTOGEN */ +/* This determines whether a variant is included or excluded by default */ +#ifndef BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#define BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT 1 +#endif +#include +#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#endif /* GEN_BCMLTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h new file mode 100644 index 000000000000..6dc83335f9c6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h @@ -0,0 +1,56 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table definition files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ +#ifndef GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H +#define GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H +#ifndef DOXYGEN_IGNORE_AUTOGEN +/*+replace reverse */ +#include "../../conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h" +#include "../../conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h" +#include "../../conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h" +#include "../../conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_config_variant.h" +#include "../../conf/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_config_variant.h" +#include "../../conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_config_variant.h" +#include "../../conf/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_config_variant.h" +#include "../../conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_config_variant.h" +#include "../../conf/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_config_variant.h" +#include "../../conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h" +#include "../../conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h" +/*-replace*/ +#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#endif /* GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h new file mode 100644 index 000000000000..0bda0b4d3d28 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h @@ -0,0 +1,38 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCMLTD_VARIANT_DEFS_H +#define GEN_BCMLTD_VARIANT_DEFS_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#include +#include + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCMLTD_VARIANT_DEFS_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h new file mode 100644 index 000000000000..10022839540f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h @@ -0,0 +1,56 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table definition files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ +#ifndef GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H +#define GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H +#ifndef DOXYGEN_IGNORE_AUTOGEN +/*+replace reverse */ +#include "../../defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h" +#include "../../defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h" +#include "../../defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h" +#include "../../defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h" +#include "../../defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h" +/*-replace*/ +#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#endif /* GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h new file mode 100644 index 000000000000..74284a4580bd --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h @@ -0,0 +1,57 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table definition files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ +#ifndef GEN_BCMLTD_VARIANT_ENTRY_H +#define GEN_BCMLTD_VARIANT_ENTRY_H +/* guard deliberately empty */ +#endif /* GEN_BCMLTD_VARIANT_ENTRY_H */ +#ifndef DOXYGEN_IGNORE_AUTOGEN +/*+replace variant */ +#include "../../entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h" +#include "../../entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h" +#include "../../entry/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_entry.h" +#include "../../entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_entry.h" +#include "../../entry/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_entry.h" +#include "../../entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_entry.h" +#include "../../entry/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_entry.h" +#include "../../entry/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_entry.h" +/*-replace*/ +#endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h new file mode 100644 index 000000000000..906edf8145bb --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCMLTD_VARIANT_LIMITS_H +#define GEN_BCMLTD_VARIANT_LIMITS_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_MAX 24 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCMLTD_VARIANT_LIMITS_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h similarity index 66% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h index db4192647c2b..d629bff89b48 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -24,17 +24,22 @@ * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_UTCFG_LTD_VARIANT_ENTRY_H -#define GEN_BCM56880_A0_UTCFG_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56880_A0_UTCFG_LTD_VARIANT_ENTRY_H */ +#ifndef GEN_BCM56080_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56080_A0_LTD_CONFIG_VARIANT_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_UTCFG == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,utcfg,UTCFG,_,BCMLTD_VARIANT_BCM56880_A0_UTCFG,BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTCFG,NULL,0,0) +#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56080_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56080_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56080_A0_BASE 0 #endif -#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#define BCMLTD_VARIANT_BCM56080_A0_BASE 1 +#define BCMLTD_VARIANT_LOCAL_BCM56080_A0_BASE 0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#endif /* GEN_BCM56080_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h similarity index 66% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h index 6ba897bc6800..30106f76388f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -24,17 +24,22 @@ * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_UTLRD_LTD_VARIANT_ENTRY_H -#define GEN_BCM56880_A0_UTLRD_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56880_A0_UTLRD_LTD_VARIANT_ENTRY_H */ +#ifndef GEN_BCM56690_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56690_A0_LTD_CONFIG_VARIANT_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_UTLRD == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,utlrd,UTLRD,_,BCMLTD_VARIANT_BCM56880_A0_UTLRD,BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTLRD,NULL,0,0) +#if BCMDRD_CONFIG_INCLUDE_BCM56690_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE 0 #endif -#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#define BCMLTD_VARIANT_BCM56690_A0_BASE 2 +#define BCMLTD_VARIANT_LOCAL_BCM56690_A0_BASE 0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#endif /* GEN_BCM56690_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h new file mode 100644 index 000000000000..7227784ceb35 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_CONFIG_VARIANT_H +#define GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56690_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 +#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1=1, BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h similarity index 66% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h index 6adb5eda219f..90be2f0c90d4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -24,17 +24,22 @@ * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_UTLTM_LTD_VARIANT_ENTRY_H -#define GEN_BCM56880_A0_UTLTM_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56880_A0_UTLTM_LTD_VARIANT_ENTRY_H */ +#ifndef GEN_BCM56780_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56780_A0_LTD_CONFIG_VARIANT_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_UTLTM == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,utltm,UTLTM,_,BCMLTD_VARIANT_BCM56880_A0_UTLTM,BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTLTM,NULL,0,0) +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 0 #endif -#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#define BCMLTD_VARIANT_BCM56780_A0_BASE 3 +#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_BASE 0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#endif /* GEN_BCM56780_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_config_variant.h new file mode 100644 index 000000000000..6042fcf71fb2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H +#define GEN_BCM56780_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29 +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_config_variant.h new file mode 100644 index 000000000000..9180de74873d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_DNA_2_9_5_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56780_A0_DNA_2_9_5_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_DNA_2_9_5_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_config_variant.h new file mode 100644 index 000000000000..e8742350ab5a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_CONFIG_VARIANT_H +#define GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1 +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_config_variant.h new file mode 100644 index 000000000000..2e32d65b22d2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_INA_2_6_11_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56780_A0_INA_2_6_11_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_INA_2_6_11_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h new file mode 100644 index 000000000000..9e3c6596f63e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56880_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56880_A0_BASE 4 +#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_config_variant.h new file mode 100644 index 000000000000..8f1c699c68c8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H +#define GEN_BCM56880_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29 +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_config_variant.h new file mode 100644 index 000000000000..e8e0257edf42 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_DNA_4_11_4_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56880_A0_DNA_4_11_4_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_DNA_4_11_4_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_config_variant.h new file mode 100644 index 000000000000..980b45b9a3a1 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_CONFIG_VARIANT_H +#define GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2 +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_config_variant.h new file mode 100644 index 000000000000..29d6d5f893df --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_NFA_2_1_7_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56880_A0_NFA_2_1_7_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_NFA_2_1_7_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h new file mode 100644 index 000000000000..66c3e309cd8a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56890_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56890_A0_BASE 5 +#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_config_variant.h new file mode 100644 index 000000000000..1cef9cb84a3b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H +#define GEN_BCM56890_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29 +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_config_variant.h new file mode 100644 index 000000000000..9a01f8bb0e31 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_CONFIG_VARIANT_H +#define GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2 +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h new file mode 100644 index 000000000000..77423d685896 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56990_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56990_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56990_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56990_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56990_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56990_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56990_A0_BASE 6 +#define BCMLTD_VARIANT_LOCAL_BCM56990_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56990_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h new file mode 100644 index 000000000000..02b632bdacda --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56990_B0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56990_B0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56990_B0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56990_B0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56990_B0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56990_B0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56990_B0_BASE 7 +#define BCMLTD_VARIANT_LOCAL_BCM56990_B0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56990_B0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h new file mode 100644 index 000000000000..9d93800a560f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56996_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56996_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56996_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56996_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56996_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56996_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56996_A0_BASE 8 +#define BCMLTD_VARIANT_LOCAL_BCM56996_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56996_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h new file mode 100644 index 000000000000..ada476f139d2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56996_B0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56996_B0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56996_B0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56996_B0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56996_B0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56996_B0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56996_B0_BASE 9 +#define BCMLTD_VARIANT_LOCAL_BCM56996_B0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56996_B0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h new file mode 100644 index 000000000000..ae5b86fc81f7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56998_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56998_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56998_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56998_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56998_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56998_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56998_A0_BASE 10 +#define BCMLTD_VARIANT_LOCAL_BCM56998_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56998_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h new file mode 100644 index 000000000000..34d7adec06b0 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56999_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56999_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56999_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56999_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56999_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56999_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM56999_A0_BASE 11 +#define BCMLTD_VARIANT_LOCAL_BCM56999_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56999_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h new file mode 100644 index 000000000000..eb7d14aab0a3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM78900_B0_LTD_CONFIG_VARIANT_H +#define GEN_BCM78900_B0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM78900_B0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM78900_B0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM78900_B0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM78900_B0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM78900_B0_BASE 12 +#define BCMLTD_VARIANT_LOCAL_BCM78900_B0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78900_B0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h new file mode 100644 index 000000000000..980b50cfc729 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h @@ -0,0 +1,45 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM78905_A0_LTD_CONFIG_VARIANT_H +#define GEN_BCM78905_A0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM78905_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM78905_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM78905_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM78905_A0_BASE 0 +#endif + +#define BCMLTD_VARIANT_BCM78905_A0_BASE 13 +#define BCMLTD_VARIANT_LOCAL_BCM78905_A0_BASE 0 + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78905_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h index eb0297e5ac7c..cd374ca3ff61 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h new file mode 100644 index 000000000000..6a0c404b24ad --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56690_A0_LTD_VARIANT_DEF_H +#define GEN_BCM56690_A0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56690_A0_BASE 2 +#define BCMLTD_VARIANT_LOCAL_BCM56690_A0_BASE 0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56690_A0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h similarity index 75% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h index 607e1369508b..cef356943551 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -24,14 +24,14 @@ * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H -#define GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H +#ifndef GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_DEF_H +#define GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_DEF_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56780_A0_HNA_1_2_10_0 14 -#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_1_2_10_0 3 +#define BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1 14 +#define BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_29_0_1 1 #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H */ +#endif /* GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_DEF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h index a4a167739bca..fed9f85ab7bc 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56780_A0_BASE 2 +#define BCMLTD_VARIANT_BCM56780_A0_BASE 3 #define BCMLTD_VARIANT_LOCAL_BCM56780_A0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_def.h similarity index 76% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_def.h index aa4b1b7dcfcb..8020921322cd 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -24,14 +24,14 @@ * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_DEF_H -#define GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_DEF_H +#ifndef GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_DEF_H +#define GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_DEF_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56780_A0_CNA_1_2_13 12 -#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_1_2_13 1 +#define BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_29 15 +#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_29 1 #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_DEF_H */ +#endif /* GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_DEF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h index c6d9933996dc..08fcbc515413 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56780_A0_DNA_2_9_5_0 13 +#define BCMLTD_VARIANT_BCM56780_A0_DNA_2_9_5_0 16 #define BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_2_9_5_0 2 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_def.h new file mode 100644 index 000000000000..262e642c0f4e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_DEF_H +#define GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_29_2_1 17 +#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_29_2_1 3 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h similarity index 75% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h index 1694f3a1ab09..d0f4b434887a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -24,14 +24,14 @@ * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H -#define GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H +#ifndef GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_DEF_H +#define GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_DEF_H #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56880_A0_HNA_1_2_10_0 17 -#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_1_2_10_0 3 +#define BCMLTD_VARIANT_BCM56780_A0_INA_2_6_11_0 18 +#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_INA_2_6_11_0 4 #endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H */ +#endif /* GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_DEF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h index 7b3f82532223..55eb2c8d2c14 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56880_A0_BASE 3 +#define BCMLTD_VARIANT_BCM56880_A0_BASE 4 #define BCMLTD_VARIANT_LOCAL_BCM56880_A0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_def.h new file mode 100644 index 000000000000..3e770ef00e36 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_DEF_H +#define GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56880_A0_CNA_6_5_29 19 +#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_CNA_6_5_29 1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h index e7af41f9b460..f5b982438eee 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56880_A0_DNA_4_11_4_0 16 +#define BCMLTD_VARIANT_BCM56880_A0_DNA_4_11_4_0 20 #define BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_4_11_4_0 2 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_def.h new file mode 100644 index 000000000000..23fd31997c9d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_DEF_H +#define GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_29_2_2 21 +#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_29_2_2 3 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h new file mode 100644 index 000000000000..7adb2f316477 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_DEF_H +#define GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56880_A0_NFA_2_1_7_0 22 +#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_2_1_7_0 4 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h index 067cd3aa6fd8..8ddcc4ae266c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56890_A0_BASE 4 +#define BCMLTD_VARIANT_BCM56890_A0_BASE 5 #define BCMLTD_VARIANT_LOCAL_BCM56890_A0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_def.h new file mode 100644 index 000000000000..69febdfe9054 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_DEF_H +#define GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_29 23 +#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_29 1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_def.h deleted file mode 100644 index fcea5c979c8a..000000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder.$ - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_DEF_H -#define GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56890_A0_DNA_4_0_17_0 21 -#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_4_0_17_0 1 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_def.h new file mode 100644 index 000000000000..9d77a880569f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_DEF_H +#define GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_29_1_2 24 +#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_29_1_2 2 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h index 0b136b21dd3c..736ba9ae6652 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56990_A0_BASE 5 +#define BCMLTD_VARIANT_BCM56990_A0_BASE 6 #define BCMLTD_VARIANT_LOCAL_BCM56990_A0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h index 72f72fbd1e17..e0433c68e538 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56990_B0_BASE 6 +#define BCMLTD_VARIANT_BCM56990_B0_BASE 7 #define BCMLTD_VARIANT_LOCAL_BCM56990_B0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h index 80ef0b123700..a33c95324a5b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56996_A0_BASE 7 +#define BCMLTD_VARIANT_BCM56996_A0_BASE 8 #define BCMLTD_VARIANT_LOCAL_BCM56996_A0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h index 2a9e72e913d6..776f3a936bd6 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56996_B0_BASE 8 +#define BCMLTD_VARIANT_BCM56996_B0_BASE 9 #define BCMLTD_VARIANT_LOCAL_BCM56996_B0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h index a5ec341f379a..42c700c8a0ef 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56998_A0_BASE 9 +#define BCMLTD_VARIANT_BCM56998_A0_BASE 10 #define BCMLTD_VARIANT_LOCAL_BCM56998_A0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h index 22ef37f20095..ea1328bf7c34 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56999_A0_BASE 10 +#define BCMLTD_VARIANT_BCM56999_A0_BASE 11 #define BCMLTD_VARIANT_LOCAL_BCM56999_A0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h index ed6b18f0827d..e645660d2dee 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -29,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM78900_B0_BASE 11 +#define BCMLTD_VARIANT_BCM78900_B0_BASE 12 #define BCMLTD_VARIANT_LOCAL_BCM78900_B0_BASE 0 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h new file mode 100644 index 000000000000..8b43d0ab1256 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM78905_A0_LTD_VARIANT_DEF_H +#define GEN_BCM78905_A0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM78905_A0_BASE 13 +#define BCMLTD_VARIANT_LOCAL_BCM78905_A0_BASE 0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78905_A0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h index 50616d50963f..455f50de4a23 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h new file mode 100644 index 000000000000..ceb53c56ddc7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56690_A0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56690_A0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56690_A0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56690_a0,BCM56690_A0,,BASE,,BCMLTD_VARIANT_BCM56690_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM56690_A0_BASE,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h similarity index 63% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h index c0707c11439a..a738422242f0 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -24,15 +24,15 @@ * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H */ +#ifndef GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_ENTRY_H +#define GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_ENTRY_H */ #ifndef DOXYGEN_IGNORE_AUTOGEN -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_1_2_10_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,hna_1_2_10_0,HNA_1_2_10_0,_,BCMLTD_VARIANT_BCM56880_A0_HNA_1_2_10_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_1_2_10_0,NULL,0,0) +#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56690_a0,BCM56690_A0,dna_6_5_29_0_1,DNA_6_5_29_0_1,_,BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1,BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_29_0_1,NULL,0,0) #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h index 6f6b34efbdb7..98300f236c9f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_entry.h similarity index 66% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_entry.h index e80842ef117e..c36df37d192f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -24,15 +24,15 @@ * ******************************************************************************/ -#ifndef GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H -#define GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H */ +#ifndef GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H +#define GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H */ #ifndef DOXYGEN_IGNORE_AUTOGEN -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_1_2_13 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,cna_1_2_13,CNA_1_2_13,_,BCMLTD_VARIANT_BCM56780_A0_CNA_1_2_13,BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_1_2_13,NULL,0,0) +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,cna_6_5_29,CNA_6_5_29,_,BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_29,BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_29,NULL,0,0) #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h index 2e3cd8ef6419..ac15ceee07b8 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_entry.h new file mode 100644 index 000000000000..f0cd76d6234e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_ENTRY_H +#define GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,hna_6_5_29_2_1,HNA_6_5_29_2_1,_,BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_29_2_1,BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_29_2_1,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_entry.h similarity index 65% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_entry.h index a139a20a3959..32704dc7aa3e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -24,15 +24,15 @@ * ******************************************************************************/ -#ifndef GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_ENTRY_H */ +#ifndef GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_ENTRY_H */ #ifndef DOXYGEN_IGNORE_AUTOGEN -#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_4_0_17_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,dna_4_0_17_0,DNA_4_0_17_0,_,BCMLTD_VARIANT_BCM56890_A0_DNA_4_0_17_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_4_0_17_0,NULL,0,0) +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,ina_2_6_11_0,INA_2_6_11_0,_,BCMLTD_VARIANT_BCM56780_A0_INA_2_6_11_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_INA_2_6_11_0,NULL,0,0) #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h index 08775e092c8c..9e6173895885 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_entry.h similarity index 66% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_entry.h index 8fb2a10d8389..7826a6e08301 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -24,15 +24,15 @@ * ******************************************************************************/ -#ifndef GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H -#define GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H */ +#ifndef GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H +#define GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H */ #ifndef DOXYGEN_IGNORE_AUTOGEN -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_1_2_13 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,cna_1_2_13,CNA_1_2_13,_,BCMLTD_VARIANT_BCM56880_A0_CNA_1_2_13,BCMLTD_VARIANT_LOCAL_BCM56880_A0_CNA_1_2_13,NULL,0,0) +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,cna_6_5_29,CNA_6_5_29,_,BCMLTD_VARIANT_BCM56880_A0_CNA_6_5_29,BCMLTD_VARIANT_LOCAL_BCM56880_A0_CNA_6_5_29,NULL,0,0) #endif #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h index e677601d1dfe..5e27f7e39a6f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_entry.h new file mode 100644 index 000000000000..b15dc23906d8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_ENTRY_H +#define GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,hna_6_5_29_2_2,HNA_6_5_29_2_2,_,BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_29_2_2,BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_29_2_2,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_entry.h new file mode 100644 index 000000000000..fc3822c6a70e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,nfa_2_1_7_0,NFA_2_1_7_0,_,BCMLTD_VARIANT_BCM56880_A0_NFA_2_1_7_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_2_1_7_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h index 56deb27eb09f..f1473c14dd4b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_entry.h new file mode 100644 index 000000000000..fd5d5150f011 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H +#define GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,cna_6_5_29,CNA_6_5_29,_,BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_29,BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_29,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_entry.h new file mode 100644 index 000000000000..70b562ba5e28 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_ENTRY_H +#define GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,dna_6_5_29_1_2,DNA_6_5_29_1_2,_,BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_29_1_2,BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_29_1_2,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h index 7e58e4babd30..a1edac77d697 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h index a395052a5853..9ee7769a312f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h index 40abaeff0df0..be32f3d77469 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h index ad387ff5c24b..48dd0a6e21aa 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h index b5313fb0a589..80d9a20bd8b6 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h index a472cabc74c3..eef504417b4b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h index 339373fd1afe..fd74760b8e3a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h @@ -7,7 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h new file mode 100644 index 000000000000..84f75b9d488c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + ******************************************************************************/ + +#ifndef GEN_BCM78905_A0_LTD_VARIANT_ENTRY_H +#define GEN_BCM78905_A0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM78905_A0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM78905_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm78905_a0,BCM78905_A0,,BASE,,BCMLTD_VARIANT_BCM78905_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM78905_A0_BASE,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..8c52cfd59d33 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c @@ -0,0 +1,331 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides LBHDR access functions for BCM56080_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 8, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 8); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + if (val == BCMPKT_LBHDR_HEADER_T_GENERIC) { + val = 0; + } + WORD_FIELD_SET(data[0], 15, 1, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 1); + if (val == 0) { + val = BCMPKT_LBHDR_HEADER_T_GENERIC; + } + return val; +} + +static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 20, 4, val); +} + +static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 20, 4); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 26, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 26, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 29, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 29, 1); + return val; +} + +static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 30, 2, val & MASK(2)); + WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14)); +} + +static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ; + return val; +} + +static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_zero_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 5, 1, val); +} + +static uint32_t bcmpkt_lbhdr_zero_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 5, 1); + return val; +} + +static void bcmpkt_lbhdr_pp_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 7, val); +} + +static uint32_t bcmpkt_lbhdr_pp_port_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 7); + return val; +} + +static void bcmpkt_lbhdr_routed_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_lbhdr_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_lbhdr_vrf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 30, 2, val & MASK(2)); + WORD_FIELD_SET(data[1], 0, 4, (val >> 2) & MASK(4)); +} + +static uint32_t bcmpkt_lbhdr_vrf_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[2], 30, 2) | (WORD_FIELD_GET(data[1], 0, 4) << 2)) ; + return val; +} + +static void bcmpkt_lbhdr_vrf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 4, 1, val); +} + +static uint32_t bcmpkt_lbhdr_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 4, 1); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm56080_a0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + bcmpkt_lbhdr_input_priority_get, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + bcmpkt_lbhdr_source_get, + bcmpkt_lbhdr_source_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_lbhdr_zero_get, + bcmpkt_lbhdr_pp_port_get, + bcmpkt_lbhdr_routed_pkt_get, + bcmpkt_lbhdr_vrf_get, + bcmpkt_lbhdr_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56080_a0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + bcmpkt_lbhdr_input_priority_set, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + bcmpkt_lbhdr_source_set, + bcmpkt_lbhdr_source_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_lbhdr_zero_set, + bcmpkt_lbhdr_pp_port_set, + bcmpkt_lbhdr_routed_pkt_set, + bcmpkt_lbhdr_vrf_set, + bcmpkt_lbhdr_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56080_a0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm56080_a0_lbhdr_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56080_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, +}; + + +void bcm56080_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56080_a0_lbhdr_view_infos; + info->view_types = bcm56080_a0_lbhdr_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..0a42f3c42461 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c @@ -0,0 +1,1147 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides RXPMD access functions for BCM56080_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 0, 8, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 0, 8); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 20, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 20, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 11, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 11, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 12, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 12, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 4, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 4, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 4, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 4, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 10, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 10, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + data[4] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = data[4]; + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 8, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 8, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 28, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 28, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 26, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 26, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 14, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 14, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 13); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 0, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 0, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 26, 5, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 26, 5); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 14, 12, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 14, 12); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 27, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 27, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 16, 1); + return val; +} + +static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 14, 12, val); +} + +static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 14, 12); + return val; +} + +static void bcmpkt_rxpmd_ieu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 28, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ieu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 28, 1); + return val; +} + +static void bcmpkt_rxpmd_ieu_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ieu_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_vrf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 6, val); +} + +static uint32_t bcmpkt_rxpmd_vrf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 6); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 10; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 48 + ******************************************************************************/ +void bcm56080_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) { + WORD_FIELD_SET(data[1], 16, 2, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) { + WORD_FIELD_SET(data[1], 16, 2, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 23); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) { + WORD_FIELD_SET(data[1], 24, 3, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) { + WORD_FIELD_SET(data[1], 24, 3, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) { + WORD_FIELD_SET(data[1], 24, 3, 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) { + WORD_FIELD_SET(data[1], 24, 3, 4); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR)) { + WORD_FIELD_SET(data[1], 24, 3, 7); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN)) { + data[0] |= (0x1 << 10); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_OAM_PROCESSING_OAM_CCM)) { + WORD_FIELD_SET(data[0], 11, 3, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_OAM_PROCESSING_OAM_LM)) { + WORD_FIELD_SET(data[0], 11, 3, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_OAM_PROCESSING_OAM_DM)) { + WORD_FIELD_SET(data[0], 11, 3, 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_OAM_PROCESSING_OAM_OTHER_OPCODES)) { + WORD_FIELD_SET(data[0], 11, 3, 4); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_OAM_PROCESSING)) { + WORD_FIELD_SET(data[0], 11, 3, 7); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SUBPORT_ID_LOOKUP_MISS)) { + data[0] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SVTAG_CPU_BIT_SET)) { + data[0] |= (0x1 << 15); + } +} + +void bcm56080_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + + val = WORD_FIELD_GET(data[1], 16, 2); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val); + } + + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + + val = WORD_FIELD_GET(data[1], 24, 3); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val); + } + + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN); + } + + val = WORD_FIELD_GET(data[0], 11, 3); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_OAM_PROCESSING); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_OAM_PROCESSING + val); + } + + if (data[0] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SUBPORT_ID_LOOKUP_MISS); + } + if (data[0] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SVTAG_CPU_BIT_SET); + } +} + +void bcm56080_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56080_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56080_a0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + bcmpkt_rxpmd_timestamp_type_get, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + NULL, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_get, + bcmpkt_rxpmd_o_nhi_get, + bcmpkt_rxpmd_ieu_get, + bcmpkt_rxpmd_ieu_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_vrf_get, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56080_a0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + bcmpkt_rxpmd_timestamp_type_set, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + NULL, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_set, + bcmpkt_rxpmd_o_nhi_set, + bcmpkt_rxpmd_ieu_set, + bcmpkt_rxpmd_ieu_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_vrf_set, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56080_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm56080_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56080_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -1, -2, -2, +}; + + +void bcm56080_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56080_a0_rxpmd_view_infos; + info->view_types = bcm56080_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c new file mode 100644 index 000000000000..c40e958049dc --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c @@ -0,0 +1,1316 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides TXPMD access functions for BCM56080_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 17, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 29, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 29, 1); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 0, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 1); + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 23, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 23, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 3, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 3, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 9, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 9, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[1], 0, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[1], 0, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 13, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 13, 4); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 0, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 30, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 30, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 1, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 31, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 31, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 22, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 22, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 18, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 18, 2); + return val; +} + +static void bcmpkt_txpmd_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 1, 2, val); +} + +static uint32_t bcmpkt_txpmd_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 1, 2); + return val; +} + +static void bcmpkt_txpmd_destination_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 9, 16, val); +} + +static uint32_t bcmpkt_txpmd_destination_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 16); + return val; +} + +static void bcmpkt_txpmd_destination_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + if (val == BCMPKT_TXPMD_DESTINATION_T_INVALID) { + val = 9; + } + WORD_FIELD_SET(data[3], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_destination_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 25, 4); + if (val == 9) { + val = BCMPKT_TXPMD_DESTINATION_T_INVALID; + } + return val; +} + +static void bcmpkt_txpmd_wred_mark_eligible_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[1], 1, 1, val); +} + +static uint32_t bcmpkt_txpmd_wred_mark_eligible_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[1], 1, 1); + return val; +} + +static void bcmpkt_txpmd_wred_response_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[1], 2, 1, val); +} + +static uint32_t bcmpkt_txpmd_wred_response_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[1], 2, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 0, 7, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 7); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 0, 10, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 10); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_destination_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 10, 16, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_destination_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 10, 16); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_destination_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + if (val == BCMPKT_TXPMD_CPU_TX_DESTINATION_T_INVALID) { + val = 9; + } + WORD_FIELD_SET(data[3], 26, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_destination_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 26, 4); + if (val == 9) { + val = BCMPKT_TXPMD_CPU_TX_DESTINATION_T_INVALID; + } + return val; +} + +static void bcmpkt_txpmd_cpu_tx_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 30, 2); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_input_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 0, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_input_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 4); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 4, 2, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 4, 2); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 6, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 6, 4); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 10, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 10, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_pkt_profile_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 11, 3, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 11, 3); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_unicast_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_unicast_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 17, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_sop_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_sop_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 16, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 18, 6, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 18, 6); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_wcmp_sel_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 25, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_wcmp_sel_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 25, 1); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_cell_error_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[3], 0, 1, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_cell_error_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 1); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_cell_length_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[3], 1, 8, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_cell_length_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 1, 8); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_cos_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[3], 9, 6, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_cos_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 6); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_destination_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[3], 15, 16, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_destination_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 15, 16); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_destination_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val & MASK(1)); + WORD_FIELD_SET(data[2], 0, 3, (val >> 1) & MASK(3)); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_destination_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = (WORD_FIELD_GET(data[3], 31, 1) | (WORD_FIELD_GET(data[2], 0, 3) << 1)) ; + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_eop_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[2], 3, 1, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_eop_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 3, 1); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_input_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[2], 4, 4, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_input_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 4, 4); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_lm_counter_action_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[2], 8, 2, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_lm_counter_action_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 8, 2); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_lm_counter_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[2], 10, 9, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_lm_counter_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 10, 9); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_oam_replacement_offset_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[2], 19, 6, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_oam_replacement_offset_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 19, 6); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_pkt_length_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[2], 25, 7, val & MASK(7)); + WORD_FIELD_SET(data[1], 0, 7, (val >> 7) & MASK(7)); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_pkt_length_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 25, 7) | (WORD_FIELD_GET(data[1], 0, 7) << 7)) ; + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[1], 7, 4, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 7, 4); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_sop_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[1], 11, 1, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_sop_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 11, 1); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_spap_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[1], 12, 2, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_spap_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 12, 2); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_spid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[1], 14, 2, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_spid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 14, 2); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_spid_override_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_spid_override_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_src_modid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[1], 17, 8, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_src_modid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 17, 8); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_timestamp_action_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[1], 25, 1, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_timestamp_action_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 25, 1); + return val; +} + +static void bcmpkt_txpmd_oam_downmep_tx_unicast_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return; + } + WORD_FIELD_SET(data[1], 26, 1, val); +} + +static uint32_t bcmpkt_txpmd_oam_downmep_tx_unicast_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 26, 1); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56080_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + NULL, + NULL, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + NULL, + bcmpkt_txpmd_cell_error_get, + NULL, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + NULL, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cng_get, + bcmpkt_txpmd_destination_get, + bcmpkt_txpmd_destination_type_get, + bcmpkt_txpmd_wred_mark_eligible_get, + bcmpkt_txpmd_wred_response_get, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_get, + bcmpkt_txpmd_cpu_tx_ecmp_member_id_get, + bcmpkt_txpmd_cpu_tx_destination_get, + bcmpkt_txpmd_cpu_tx_destination_type_get, + bcmpkt_txpmd_cpu_tx_dp_get, + bcmpkt_txpmd_cpu_tx_input_pri_get, + bcmpkt_txpmd_cpu_tx_int_cn_get, + bcmpkt_txpmd_cpu_tx_int_pri_get, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get, + bcmpkt_txpmd_cpu_tx_pkt_profile_get, + bcmpkt_txpmd_cpu_tx_qos_fields_vld_get, + bcmpkt_txpmd_cpu_tx_routed_pkt_get, + bcmpkt_txpmd_cpu_tx_unicast_get, + bcmpkt_txpmd_cpu_tx_sop_get, + bcmpkt_txpmd_cpu_tx_vrf_get, + bcmpkt_txpmd_cpu_tx_vrf_valid_get, + bcmpkt_txpmd_cpu_tx_wcmp_sel_get, + bcmpkt_txpmd_oam_downmep_tx_cell_error_get, + bcmpkt_txpmd_oam_downmep_tx_cell_length_get, + bcmpkt_txpmd_oam_downmep_tx_cos_get, + bcmpkt_txpmd_oam_downmep_tx_destination_get, + bcmpkt_txpmd_oam_downmep_tx_destination_type_get, + bcmpkt_txpmd_oam_downmep_tx_eop_get, + bcmpkt_txpmd_oam_downmep_tx_input_pri_get, + bcmpkt_txpmd_oam_downmep_tx_lm_counter_action_get, + bcmpkt_txpmd_oam_downmep_tx_lm_counter_id_get, + bcmpkt_txpmd_oam_downmep_tx_oam_replacement_offset_get, + bcmpkt_txpmd_oam_downmep_tx_pkt_length_get, + bcmpkt_txpmd_oam_downmep_tx_rqe_q_num_get, + bcmpkt_txpmd_oam_downmep_tx_sop_get, + bcmpkt_txpmd_oam_downmep_tx_spap_get, + bcmpkt_txpmd_oam_downmep_tx_spid_get, + bcmpkt_txpmd_oam_downmep_tx_spid_override_get, + bcmpkt_txpmd_oam_downmep_tx_src_modid_get, + bcmpkt_txpmd_oam_downmep_tx_timestamp_action_get, + bcmpkt_txpmd_oam_downmep_tx_unicast_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56080_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + NULL, + NULL, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + NULL, + bcmpkt_txpmd_cell_error_set, + NULL, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + NULL, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cng_set, + bcmpkt_txpmd_destination_set, + bcmpkt_txpmd_destination_type_set, + bcmpkt_txpmd_wred_mark_eligible_set, + bcmpkt_txpmd_wred_response_set, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_set, + bcmpkt_txpmd_cpu_tx_ecmp_member_id_set, + bcmpkt_txpmd_cpu_tx_destination_set, + bcmpkt_txpmd_cpu_tx_destination_type_set, + bcmpkt_txpmd_cpu_tx_dp_set, + bcmpkt_txpmd_cpu_tx_input_pri_set, + bcmpkt_txpmd_cpu_tx_int_cn_set, + bcmpkt_txpmd_cpu_tx_int_pri_set, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set, + bcmpkt_txpmd_cpu_tx_pkt_profile_set, + bcmpkt_txpmd_cpu_tx_qos_fields_vld_set, + bcmpkt_txpmd_cpu_tx_routed_pkt_set, + bcmpkt_txpmd_cpu_tx_unicast_set, + bcmpkt_txpmd_cpu_tx_sop_set, + bcmpkt_txpmd_cpu_tx_vrf_set, + bcmpkt_txpmd_cpu_tx_vrf_valid_set, + bcmpkt_txpmd_cpu_tx_wcmp_sel_set, + bcmpkt_txpmd_oam_downmep_tx_cell_error_set, + bcmpkt_txpmd_oam_downmep_tx_cell_length_set, + bcmpkt_txpmd_oam_downmep_tx_cos_set, + bcmpkt_txpmd_oam_downmep_tx_destination_set, + bcmpkt_txpmd_oam_downmep_tx_destination_type_set, + bcmpkt_txpmd_oam_downmep_tx_eop_set, + bcmpkt_txpmd_oam_downmep_tx_input_pri_set, + bcmpkt_txpmd_oam_downmep_tx_lm_counter_action_set, + bcmpkt_txpmd_oam_downmep_tx_lm_counter_id_set, + bcmpkt_txpmd_oam_downmep_tx_oam_replacement_offset_set, + bcmpkt_txpmd_oam_downmep_tx_pkt_length_set, + bcmpkt_txpmd_oam_downmep_tx_rqe_q_num_set, + bcmpkt_txpmd_oam_downmep_tx_sop_set, + bcmpkt_txpmd_oam_downmep_tx_spap_set, + bcmpkt_txpmd_oam_downmep_tx_spid_set, + bcmpkt_txpmd_oam_downmep_tx_spid_override_set, + bcmpkt_txpmd_oam_downmep_tx_src_modid_set, + bcmpkt_txpmd_oam_downmep_tx_timestamp_action_set, + bcmpkt_txpmd_oam_downmep_tx_unicast_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56080_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56080_a0_txpmd_view_types[] = { + {"sobmh_from_cpu", 1}, + {"oam_downmep_tx", 12}, + {"cpu_tx", 2}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56080_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -2, -2, 1, 1, -2, 1, -2, 1, 1, 1, 1, 1, -2, 1, + 1, 1, 1, 1, 1, 1, 1, -2, -2, -2, -2, -2, -2, -2, 1, 1, + 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, + 2, 2, 2, 2, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, + 12, 12, 12, 12, 12, 12, 12, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56080_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56080_a0_txpmd_view_infos; + info->view_types = bcm56080_a0_txpmd_view_types; + info->view_type_get = bcmpkt_txpmd_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..167f845331ab --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c @@ -0,0 +1,169 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides LBHDR access functions for BCM56690_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +const bcmpkt_lbhdr_fget_t bcm56690_a0_lbhdr_fget = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56690_a0_lbhdr_fset = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56690_a0_lbhdr_figet = { + { + NULL + } +}; + +static shr_enum_map_t bcm56690_a0_lbhdr_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56690_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, +}; + + +void bcm56690_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56690_a0_lbhdr_view_infos; + info->view_types = bcm56690_a0_lbhdr_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..d3cea9012a05 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c @@ -0,0 +1,546 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides RXPMD access functions for BCM56690_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 576 + ******************************************************************************/ +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 2, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 2, 6); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 13, 1, val == 0); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[0], 13, 1) == 0); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_mpb_flex_data_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 1, 6, val); +} + +static uint32_t bcmpkt_rxpmd_mpb_flex_data_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 1, 6); + return val; +} + +static void bcmpkt_rxpmd_int_cn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_int_cn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_cng_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 18, 2, val); +} + +static uint32_t bcmpkt_rxpmd_cng_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 18, 2); + return val; +} + +static void bcmpkt_rxpmd_egr_zone_remap_ctrl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 9, 4, val); +} + +static uint32_t bcmpkt_rxpmd_egr_zone_remap_ctrl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 9, 4); + return val; +} + +static void bcmpkt_rxpmd_dma_header_version_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 0, 2, val); +} + +static uint32_t bcmpkt_rxpmd_dma_header_version_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 0, 2); + return val; +} + +static void bcmpkt_rxpmd_multicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 20, 1, val); +} + +static uint32_t bcmpkt_rxpmd_multicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 20, 1); + return val; +} + +static void bcmpkt_rxpmd_copy_to_cpu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 22, 1, val); +} + +static uint32_t bcmpkt_rxpmd_copy_to_cpu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 22, 1); + return val; +} + +static void bcmpkt_rxpmd_truncate_cpu_copy_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 8, 1, val); +} + +static uint32_t bcmpkt_rxpmd_truncate_cpu_copy_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 8, 1); + return val; +} + +static void bcmpkt_rxpmd_dop_trigger_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 7, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dop_trigger_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 7, 1); + return val; +} + +static void bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 4, val); +} + +static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 4); + return val; +} + +static void bcmpkt_rxpmd_eparse_extract_offsets_6_4_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 12, 3, val); +} + +static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_6_4_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 12, 3); + return val; +} + +static void bcmpkt_rxpmd_arc_id_lo_set(uint32_t *data, uint32_t val) +{ + data[2] = val; +} + +static uint32_t bcmpkt_rxpmd_arc_id_lo_get(uint32_t *data) +{ + uint32_t val; + val = data[2]; + return val; +} + +static void bcmpkt_rxpmd_arc_id_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_arc_id_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 0, 16); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 18; +} + +static uint32_t bcmpkt_rxpmd_i_flex_data_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 4; + return 14; +} + +void bcm56690_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56690_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +void bcm56690_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56690_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56690_a0_rxpmd_fget = { + { + NULL, + bcmpkt_rxpmd_queue_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + bcmpkt_rxpmd_mpb_flex_data_type_get, + bcmpkt_rxpmd_int_cn_get, + bcmpkt_rxpmd_cng_get, + bcmpkt_rxpmd_egr_zone_remap_ctrl_get, + bcmpkt_rxpmd_dma_header_version_get, + bcmpkt_rxpmd_multicast_get, + bcmpkt_rxpmd_copy_to_cpu_get, + bcmpkt_rxpmd_truncate_cpu_copy_get, + NULL, + bcmpkt_rxpmd_dop_trigger_get, + bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_eparse_extract_offsets_6_4_get, + NULL, + bcmpkt_rxpmd_arc_id_lo_get, + bcmpkt_rxpmd_arc_id_hi_get, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56690_a0_rxpmd_fset = { + { + NULL, + bcmpkt_rxpmd_queue_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + bcmpkt_rxpmd_mpb_flex_data_type_set, + bcmpkt_rxpmd_int_cn_set, + bcmpkt_rxpmd_cng_set, + bcmpkt_rxpmd_egr_zone_remap_ctrl_set, + bcmpkt_rxpmd_dma_header_version_set, + bcmpkt_rxpmd_multicast_set, + bcmpkt_rxpmd_copy_to_cpu_set, + bcmpkt_rxpmd_truncate_cpu_copy_set, + NULL, + bcmpkt_rxpmd_dop_trigger_set, + bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_eparse_extract_offsets_6_4_set, + NULL, + bcmpkt_rxpmd_arc_id_lo_set, + bcmpkt_rxpmd_arc_id_hi_set, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56690_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + NULL, + NULL, + bcmpkt_rxpmd_i_flex_data_get + } +}; + +static shr_enum_map_t bcm56690_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56690_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -2, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -1, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, + -2, -2, -2, -2, -2, -1, -2, -1, -1, -2, -2, -2, -2, +}; + + +void bcm56690_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56690_a0_rxpmd_view_infos; + info->view_types = bcm56690_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c new file mode 100644 index 000000000000..d22b891d30ce --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c @@ -0,0 +1,105 @@ +/*! \file bcm56690_a0_pkt_rxpmd_field.c + * + * This file provides RXPMD access functions for BCM56690_A0. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +int bcm56690_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t *val) +{ + uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + /* Skip fields with minbit >= 448.*/ + if (minbit >= 448) { + return SHR_E_PARAM; + } + + if (diff == 31) { + *val = data[index]; + } else if (diff < 31) { + *val = WORD_FIELD_GET(data[index], low_bit, diff+1); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} + +int bcm56690_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t val) +{ + uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + /* Skip fields with minbit >= 448.*/ + if (minbit >= 448) { + return SHR_E_PARAM; + } + + if (diff == 31) { + data[index] = val; + } else if (diff < 31) { + WORD_FIELD_SET(data[index], low_bit, diff+1, val); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c new file mode 100644 index 000000000000..eb0ebd8f9660 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c @@ -0,0 +1,598 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides TXPMD access functions for BCM56690_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 1, 7, val); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 1, 7); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 6, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 6, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 13, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 13, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 23, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 23, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 21, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 21, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 19, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 19, 2); + return val; +} + +static void bcmpkt_txpmd_unicast_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 12, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 12, 1); + return val; +} + +static void bcmpkt_txpmd_ts_action_lsb_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ts_action_lsb_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ts_action_msb_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 21, 1, val); +} + +static uint32_t bcmpkt_txpmd_ts_action_msb_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 21, 1); + return val; +} + +static void bcmpkt_txpmd_ts_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 22, 1, val); +} + +static uint32_t bcmpkt_txpmd_ts_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 22, 1); + return val; +} + +static void bcmpkt_txpmd_dst_subport_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[0], 0, 1, (val >> 9) & MASK(1)); +} + +static uint32_t bcmpkt_txpmd_dst_subport_num_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 23, 9) | (WORD_FIELD_GET(data[0], 0, 1) << 9)) ; + return val; +} + +static void bcmpkt_txpmd_udp_checksum_update_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 1, 1, val); +} + +static uint32_t bcmpkt_txpmd_udp_checksum_update_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 1, 1); + return val; +} + +static void bcmpkt_txpmd_udp_checksum_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 2, 6, val); +} + +static uint32_t bcmpkt_txpmd_udp_checksum_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 2, 6); + return val; +} + +static void bcmpkt_txpmd_copy_to_debug_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 5, 1, val); +} + +static uint32_t bcmpkt_txpmd_copy_to_debug_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 5, 1); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56690_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + NULL, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + NULL, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + bcmpkt_txpmd_unicast_pkt_get, + bcmpkt_txpmd_ts_action_lsb_get, + bcmpkt_txpmd_ts_action_msb_get, + bcmpkt_txpmd_ts_type_get, + bcmpkt_txpmd_dst_subport_num_get, + bcmpkt_txpmd_udp_checksum_update_enable_get, + bcmpkt_txpmd_udp_checksum_offset_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_copy_to_debug_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56690_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + NULL, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + NULL, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + bcmpkt_txpmd_unicast_pkt_set, + bcmpkt_txpmd_ts_action_lsb_set, + bcmpkt_txpmd_ts_action_msb_set, + bcmpkt_txpmd_ts_type_set, + bcmpkt_txpmd_dst_subport_num_set, + bcmpkt_txpmd_udp_checksum_update_enable_set, + bcmpkt_txpmd_udp_checksum_offset_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_copy_to_debug_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56690_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56690_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56690_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56690_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56690_a0_txpmd_view_infos; + info->view_types = bcm56690_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..e21b6ec6b6d8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c @@ -0,0 +1,169 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides LBHDR access functions for BCM56780_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +const bcmpkt_lbhdr_fget_t bcm56780_a0_lbhdr_fget = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56780_a0_lbhdr_fset = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56780_a0_lbhdr_figet = { + { + NULL + } +}; + +static shr_enum_map_t bcm56780_a0_lbhdr_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56780_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, +}; + + +void bcm56780_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56780_a0_lbhdr_view_infos; + info->view_types = bcm56780_a0_lbhdr_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..2c1c165103e4 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c @@ -0,0 +1,558 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides RXPMD access functions for BCM56780_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 576 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 2, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 2, 6); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 8, 8, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 8, 8); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 28, 1, val == 0); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[3], 28, 1) == 0); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_match_id_lo_set(uint32_t *data, uint32_t val) +{ + data[2] = val; +} + +static uint32_t bcmpkt_rxpmd_match_id_lo_get(uint32_t *data) +{ + uint32_t val; + val = data[2]; + return val; +} + +static void bcmpkt_rxpmd_match_id_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_match_id_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mpb_flex_data_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 7, val); +} + +static uint32_t bcmpkt_rxpmd_mpb_flex_data_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 7); + return val; +} + +static void bcmpkt_rxpmd_int_cn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_int_cn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_cng_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 18, 2, val); +} + +static uint32_t bcmpkt_rxpmd_cng_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 18, 2); + return val; +} + +static void bcmpkt_rxpmd_egr_zone_remap_ctrl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 24, 4, val); +} + +static uint32_t bcmpkt_rxpmd_egr_zone_remap_ctrl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 24, 4); + return val; +} + +static void bcmpkt_rxpmd_dma_header_version_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 0, 2, val); +} + +static uint32_t bcmpkt_rxpmd_dma_header_version_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 0, 2); + return val; +} + +static void bcmpkt_rxpmd_multicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 20, 1, val); +} + +static uint32_t bcmpkt_rxpmd_multicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 20, 1); + return val; +} + +static void bcmpkt_rxpmd_copy_to_cpu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 22, 1, val); +} + +static uint32_t bcmpkt_rxpmd_copy_to_cpu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 22, 1); + return val; +} + +static void bcmpkt_rxpmd_truncate_cpu_copy_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 23, 1, val); +} + +static uint32_t bcmpkt_rxpmd_truncate_cpu_copy_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 23, 1); + return val; +} + +static void bcmpkt_rxpmd_dop_trigger_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 7, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dop_trigger_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 7, 1); + return val; +} + +static void bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 4, val); +} + +static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 4); + return val; +} + +static void bcmpkt_rxpmd_eparse_extract_offsets_7_4_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 12, 4, val); +} + +static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_7_4_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 12, 4); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 18; +} + +static uint32_t bcmpkt_rxpmd_i_flex_data_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 4; + return 14; +} + +void bcm56780_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56780_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +void bcm56780_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56780_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56780_a0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + bcmpkt_rxpmd_match_id_lo_get, + bcmpkt_rxpmd_match_id_hi_get, + bcmpkt_rxpmd_mpb_flex_data_type_get, + bcmpkt_rxpmd_int_cn_get, + bcmpkt_rxpmd_cng_get, + bcmpkt_rxpmd_egr_zone_remap_ctrl_get, + bcmpkt_rxpmd_dma_header_version_get, + bcmpkt_rxpmd_multicast_get, + bcmpkt_rxpmd_copy_to_cpu_get, + bcmpkt_rxpmd_truncate_cpu_copy_get, + NULL, + bcmpkt_rxpmd_dop_trigger_get, + bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get, + bcmpkt_rxpmd_eparse_extract_offsets_7_4_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56780_a0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + bcmpkt_rxpmd_match_id_lo_set, + bcmpkt_rxpmd_match_id_hi_set, + bcmpkt_rxpmd_mpb_flex_data_type_set, + bcmpkt_rxpmd_int_cn_set, + bcmpkt_rxpmd_cng_set, + bcmpkt_rxpmd_egr_zone_remap_ctrl_set, + bcmpkt_rxpmd_dma_header_version_set, + bcmpkt_rxpmd_multicast_set, + bcmpkt_rxpmd_copy_to_cpu_set, + bcmpkt_rxpmd_truncate_cpu_copy_set, + NULL, + bcmpkt_rxpmd_dop_trigger_set, + bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set, + bcmpkt_rxpmd_eparse_extract_offsets_7_4_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56780_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + NULL, + NULL, + bcmpkt_rxpmd_i_flex_data_get + } +}; + +static shr_enum_map_t bcm56780_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56780_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56780_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56780_a0_rxpmd_view_infos; + info->view_types = bcm56780_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c new file mode 100644 index 000000000000..0b4c93276bee --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c @@ -0,0 +1,95 @@ +/*! \file bcm56780_a0_pkt_rxpmd_field.c + * + * This file provides RXPMD access functions for BCM56780_A0. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +int bcm56780_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t *val) +{ + uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + if (diff == 31) { + *val = data[index]; + } else if (diff < 31) { + *val = WORD_FIELD_GET(data[index], low_bit, diff+1); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} + +int bcm56780_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t val) +{ + uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + if (diff == 31) { + data[index] = val; + } else if (diff < 31) { + WORD_FIELD_SET(data[index], low_bit, diff+1, val); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c new file mode 100644 index 000000000000..601a81cababb --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c @@ -0,0 +1,513 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides TXPMD access functions for BCM56780_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 11, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 11, 14); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 9, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 9); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 7, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 7, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static void bcmpkt_txpmd_unicast_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 13, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 13, 1); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56780_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + NULL, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + NULL, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + bcmpkt_txpmd_unicast_pkt_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56780_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + NULL, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + NULL, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + bcmpkt_txpmd_unicast_pkt_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56780_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56780_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56780_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56780_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56780_a0_txpmd_view_infos; + info->view_types = bcm56780_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..85fdbdcdbdc5 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c @@ -0,0 +1,169 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides LBHDR access functions for BCM56880_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +const bcmpkt_lbhdr_fget_t bcm56880_a0_lbhdr_fget = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56880_a0_lbhdr_fset = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56880_a0_lbhdr_figet = { + { + NULL + } +}; + +static shr_enum_map_t bcm56880_a0_lbhdr_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56880_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, +}; + + +void bcm56880_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56880_a0_lbhdr_view_infos; + info->view_types = bcm56880_a0_lbhdr_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..a4a821ee8db3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c @@ -0,0 +1,522 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides RXPMD access functions for BCM56880_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 576 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 2, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 2, 6); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 8, 8, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 8, 8); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 17, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 17, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 28, 1, val == 0); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[3], 28, 1) == 0); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_match_id_lo_set(uint32_t *data, uint32_t val) +{ + data[2] = val; +} + +static uint32_t bcmpkt_rxpmd_match_id_lo_get(uint32_t *data) +{ + uint32_t val; + val = data[2]; + return val; +} + +static void bcmpkt_rxpmd_match_id_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_match_id_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mpb_flex_data_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 7, val); +} + +static uint32_t bcmpkt_rxpmd_mpb_flex_data_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 7); + return val; +} + +static void bcmpkt_rxpmd_int_cn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 2, val); +} + +static uint32_t bcmpkt_rxpmd_int_cn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 2); + return val; +} + +static void bcmpkt_rxpmd_cng_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 2, val); +} + +static uint32_t bcmpkt_rxpmd_cng_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 2); + return val; +} + +static void bcmpkt_rxpmd_egr_zone_remap_ctrl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 24, 4, val); +} + +static uint32_t bcmpkt_rxpmd_egr_zone_remap_ctrl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 24, 4); + return val; +} + +static void bcmpkt_rxpmd_dma_header_version_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 0, 2, val); +} + +static uint32_t bcmpkt_rxpmd_dma_header_version_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 0, 2); + return val; +} + +static void bcmpkt_rxpmd_multicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_multicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 16, 1); + return val; +} + +static void bcmpkt_rxpmd_copy_to_cpu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 20, 1, val); +} + +static uint32_t bcmpkt_rxpmd_copy_to_cpu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 20, 1); + return val; +} + +static void bcmpkt_rxpmd_truncate_cpu_copy_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_truncate_cpu_copy_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 21, 1); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 18; +} + +static uint32_t bcmpkt_rxpmd_i_flex_data_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 4; + return 13; +} + +void bcm56880_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56880_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +void bcm56880_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56880_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56880_a0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + bcmpkt_rxpmd_match_id_lo_get, + bcmpkt_rxpmd_match_id_hi_get, + bcmpkt_rxpmd_mpb_flex_data_type_get, + bcmpkt_rxpmd_int_cn_get, + bcmpkt_rxpmd_cng_get, + bcmpkt_rxpmd_egr_zone_remap_ctrl_get, + bcmpkt_rxpmd_dma_header_version_get, + bcmpkt_rxpmd_multicast_get, + bcmpkt_rxpmd_copy_to_cpu_get, + bcmpkt_rxpmd_truncate_cpu_copy_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56880_a0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + bcmpkt_rxpmd_match_id_lo_set, + bcmpkt_rxpmd_match_id_hi_set, + bcmpkt_rxpmd_mpb_flex_data_type_set, + bcmpkt_rxpmd_int_cn_set, + bcmpkt_rxpmd_cng_set, + bcmpkt_rxpmd_egr_zone_remap_ctrl_set, + bcmpkt_rxpmd_dma_header_version_set, + bcmpkt_rxpmd_multicast_set, + bcmpkt_rxpmd_copy_to_cpu_set, + bcmpkt_rxpmd_truncate_cpu_copy_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56880_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + NULL, + NULL, + bcmpkt_rxpmd_i_flex_data_get + } +}; + +static shr_enum_map_t bcm56880_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56880_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56880_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56880_a0_rxpmd_view_infos; + info->view_types = bcm56880_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c new file mode 100644 index 000000000000..89028bf98721 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c @@ -0,0 +1,95 @@ +/*! \file bcm56880_a0_pkt_rxpmd_field.c + * + * This file provides RXPMD access functions for BCM56880_A0. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +int bcm56880_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t *val) +{ + uint32_t hdr_words = 13; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + if (diff == 31) { + *val = data[index]; + } else if (diff < 31) { + *val = WORD_FIELD_GET(data[index], low_bit, diff+1); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} + +int bcm56880_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t val) +{ + uint32_t hdr_words = 13; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + if (diff == 31) { + data[index] = val; + } else if (diff < 31) { + WORD_FIELD_SET(data[index], low_bit, diff+1, val); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c new file mode 100644 index 000000000000..360d3e05e17b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c @@ -0,0 +1,513 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides TXPMD access functions for BCM56880_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 7, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 7, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static void bcmpkt_txpmd_unicast_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 13, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 13, 1); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56880_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + NULL, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + NULL, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + bcmpkt_txpmd_unicast_pkt_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56880_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + NULL, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + NULL, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + bcmpkt_txpmd_unicast_pkt_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56880_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56880_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56880_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56880_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56880_a0_txpmd_view_infos; + info->view_types = bcm56880_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..6d724cc1f63b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c @@ -0,0 +1,169 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides LBHDR access functions for BCM56890_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +const bcmpkt_lbhdr_fget_t bcm56890_a0_lbhdr_fget = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56890_a0_lbhdr_fset = { + { + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56890_a0_lbhdr_figet = { + { + NULL + } +}; + +static shr_enum_map_t bcm56890_a0_lbhdr_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56890_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, +}; + + +void bcm56890_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56890_a0_lbhdr_view_infos; + info->view_types = bcm56890_a0_lbhdr_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..9c6485107173 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c @@ -0,0 +1,546 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides RXPMD access functions for BCM56890_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 576 + ******************************************************************************/ +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 2, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 2, 6); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 23, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 23, 9); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 13, 1, val == 0); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[0], 13, 1) == 0); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 16, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 16); + return val; +} + +static void bcmpkt_rxpmd_mpb_flex_data_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 1, 6, val); +} + +static uint32_t bcmpkt_rxpmd_mpb_flex_data_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 1, 6); + return val; +} + +static void bcmpkt_rxpmd_int_cn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_int_cn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_cng_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 18, 2, val); +} + +static uint32_t bcmpkt_rxpmd_cng_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 18, 2); + return val; +} + +static void bcmpkt_rxpmd_egr_zone_remap_ctrl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 9, 4, val); +} + +static uint32_t bcmpkt_rxpmd_egr_zone_remap_ctrl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 9, 4); + return val; +} + +static void bcmpkt_rxpmd_dma_header_version_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 0, 2, val); +} + +static uint32_t bcmpkt_rxpmd_dma_header_version_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 0, 2); + return val; +} + +static void bcmpkt_rxpmd_multicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 20, 1, val); +} + +static uint32_t bcmpkt_rxpmd_multicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 20, 1); + return val; +} + +static void bcmpkt_rxpmd_copy_to_cpu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 22, 1, val); +} + +static uint32_t bcmpkt_rxpmd_copy_to_cpu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 22, 1); + return val; +} + +static void bcmpkt_rxpmd_truncate_cpu_copy_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 8, 1, val); +} + +static uint32_t bcmpkt_rxpmd_truncate_cpu_copy_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 8, 1); + return val; +} + +static void bcmpkt_rxpmd_dop_trigger_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 7, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dop_trigger_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 7, 1); + return val; +} + +static void bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 4, val); +} + +static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 4); + return val; +} + +static void bcmpkt_rxpmd_eparse_extract_offsets_6_4_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 12, 3, val); +} + +static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_6_4_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 12, 3); + return val; +} + +static void bcmpkt_rxpmd_arc_id_lo_set(uint32_t *data, uint32_t val) +{ + data[2] = val; +} + +static uint32_t bcmpkt_rxpmd_arc_id_lo_get(uint32_t *data) +{ + uint32_t val; + val = data[2]; + return val; +} + +static void bcmpkt_rxpmd_arc_id_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_arc_id_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 0, 16); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 18; +} + +static uint32_t bcmpkt_rxpmd_i_flex_data_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 4; + return 14; +} + +void bcm56890_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56890_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +void bcm56890_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56890_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56890_a0_rxpmd_fget = { + { + NULL, + bcmpkt_rxpmd_queue_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + bcmpkt_rxpmd_mpb_flex_data_type_get, + bcmpkt_rxpmd_int_cn_get, + bcmpkt_rxpmd_cng_get, + bcmpkt_rxpmd_egr_zone_remap_ctrl_get, + bcmpkt_rxpmd_dma_header_version_get, + bcmpkt_rxpmd_multicast_get, + bcmpkt_rxpmd_copy_to_cpu_get, + bcmpkt_rxpmd_truncate_cpu_copy_get, + NULL, + bcmpkt_rxpmd_dop_trigger_get, + bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_eparse_extract_offsets_6_4_get, + NULL, + bcmpkt_rxpmd_arc_id_lo_get, + bcmpkt_rxpmd_arc_id_hi_get, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56890_a0_rxpmd_fset = { + { + NULL, + bcmpkt_rxpmd_queue_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + bcmpkt_rxpmd_mpb_flex_data_type_set, + bcmpkt_rxpmd_int_cn_set, + bcmpkt_rxpmd_cng_set, + bcmpkt_rxpmd_egr_zone_remap_ctrl_set, + bcmpkt_rxpmd_dma_header_version_set, + bcmpkt_rxpmd_multicast_set, + bcmpkt_rxpmd_copy_to_cpu_set, + bcmpkt_rxpmd_truncate_cpu_copy_set, + NULL, + bcmpkt_rxpmd_dop_trigger_set, + bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_eparse_extract_offsets_6_4_set, + NULL, + bcmpkt_rxpmd_arc_id_lo_set, + bcmpkt_rxpmd_arc_id_hi_set, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56890_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + NULL, + NULL, + bcmpkt_rxpmd_i_flex_data_get + } +}; + +static shr_enum_map_t bcm56890_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56890_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -2, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -1, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, + -2, -2, -2, -2, -2, -1, -2, -1, -1, -2, -2, -2, -2, +}; + + +void bcm56890_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56890_a0_rxpmd_view_infos; + info->view_types = bcm56890_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c new file mode 100644 index 000000000000..7cd341fe6ced --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c @@ -0,0 +1,107 @@ +/*! \file bcm56890_a0_pkt_rxpmd_field.c + * + * This file provides RXPMD access functions for BCM56890_A0. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include +#include +#include +#include +#include +#include + +#define BSL_LOG_MODULE BSL_LS_BCMPKT_FLEX_HDR + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +int bcm56890_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t *val) +{ + uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + /* Skip fields with minbit >= 448.*/ + if (minbit >= 448) { + return SHR_E_PARAM; + } + + if (diff == 31) { + *val = data[index]; + } else if (diff < 31) { + *val = WORD_FIELD_GET(data[index], low_bit, diff+1); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} + +int bcm56890_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int prof, + uint32_t val) +{ + uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */ + uint32_t minbit = fld_info->profile[prof].minbit; + uint32_t maxbit = fld_info->profile[prof].maxbit; + uint32_t minword = minbit / 32; + uint32_t low_bit = minbit - (minword * 32); + uint32_t high_bit = maxbit - (minword * 32); + uint32_t diff = high_bit - low_bit; + uint32_t index = hdr_words - minword - 1; + + /* Profile not valid for this field. */ + if ((minbit == 0xFFFFFFFF) || + (prof >= fld_info->profile_cnt)) { + return SHR_E_PARAM; + } + + /* Skip fields with minbit >= 448.*/ + if (minbit >= 448) { + return SHR_E_PARAM; + } + + if (diff == 31) { + data[index] = val; + } else if (diff < 31) { + WORD_FIELD_SET(data[index], low_bit, diff+1, val); + } else { + return SHR_E_PARAM; + } + + return SHR_E_NONE; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c new file mode 100644 index 000000000000..5b30d71828fd --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c @@ -0,0 +1,599 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides TXPMD access functions for BCM56890_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 31, 1, val & MASK(1)); + WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8)); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ; + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 6, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 6, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 13, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 13, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 23, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 23, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 21, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 21, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 19, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 19, 2); + return val; +} + +static void bcmpkt_txpmd_unicast_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 12, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 12, 1); + return val; +} + +static void bcmpkt_txpmd_ts_action_lsb_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ts_action_lsb_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ts_action_msb_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 21, 1, val); +} + +static uint32_t bcmpkt_txpmd_ts_action_msb_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 21, 1); + return val; +} + +static void bcmpkt_txpmd_ts_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 22, 1, val); +} + +static uint32_t bcmpkt_txpmd_ts_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 22, 1); + return val; +} + +static void bcmpkt_txpmd_dst_subport_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[0], 0, 1, (val >> 9) & MASK(1)); +} + +static uint32_t bcmpkt_txpmd_dst_subport_num_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 23, 9) | (WORD_FIELD_GET(data[0], 0, 1) << 9)) ; + return val; +} + +static void bcmpkt_txpmd_udp_checksum_update_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 1, 1, val); +} + +static uint32_t bcmpkt_txpmd_udp_checksum_update_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 1, 1); + return val; +} + +static void bcmpkt_txpmd_udp_checksum_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 2, 6, val); +} + +static uint32_t bcmpkt_txpmd_udp_checksum_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 2, 6); + return val; +} + +static void bcmpkt_txpmd_copy_to_debug_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 5, 1, val); +} + +static uint32_t bcmpkt_txpmd_copy_to_debug_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 5, 1); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56890_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + NULL, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + NULL, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + bcmpkt_txpmd_unicast_pkt_get, + bcmpkt_txpmd_ts_action_lsb_get, + bcmpkt_txpmd_ts_action_msb_get, + bcmpkt_txpmd_ts_type_get, + bcmpkt_txpmd_dst_subport_num_get, + bcmpkt_txpmd_udp_checksum_update_enable_get, + bcmpkt_txpmd_udp_checksum_offset_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_copy_to_debug_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56890_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + NULL, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + NULL, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + bcmpkt_txpmd_unicast_pkt_set, + bcmpkt_txpmd_ts_action_lsb_set, + bcmpkt_txpmd_ts_action_msb_set, + bcmpkt_txpmd_ts_type_set, + bcmpkt_txpmd_dst_subport_num_set, + bcmpkt_txpmd_udp_checksum_update_enable_set, + bcmpkt_txpmd_udp_checksum_offset_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_copy_to_debug_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56890_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56890_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56890_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56890_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56890_a0_txpmd_view_infos; + info->view_types = bcm56890_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..1e38d02cfa9c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c @@ -0,0 +1,592 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides LBHDR access functions for BCM56990_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 8, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 8); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 5, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 5); + return val; +} + +static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 20, 4, val); +} + +static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 20, 4); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 26, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 26, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 29, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 29, 1); + return val; +} + +static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 30, 2, val & MASK(2)); + WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14)); +} + +static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ; + return val; +} + +static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 11, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 11, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 15, 16, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 15, 16); + return val; +} + +static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 7, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 7, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 9, 12, val); +} + +static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 9, 12); + return val; +} + +static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 1, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 3, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 3, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 6, 8, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 6, 8); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 0, 9, val); +} + +static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 9); + return val; +} + +static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 0, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 9, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 2); + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 21, 11, val & MASK(11)); + WORD_FIELD_SET(data[1], 0, 2, (val >> 11) & MASK(2)); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 21, 11) | (WORD_FIELD_GET(data[1], 0, 2) << 11)) ; + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 2, 1, val); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 2, 1); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm56990_a0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + bcmpkt_lbhdr_input_priority_get, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + bcmpkt_lbhdr_source_get, + bcmpkt_lbhdr_source_type_get, + bcmpkt_lbhdr_trill_ac_cng_get, + bcmpkt_lbhdr_trill_ac_tc_get, + NULL, + bcmpkt_lbhdr_trill_nw_cng_get, + bcmpkt_lbhdr_trill_nw_tc_get, + bcmpkt_lbhdr_eth_dest_type_get, + bcmpkt_lbhdr_eth_dest_get, + bcmpkt_lbhdr_eth_dp_get, + bcmpkt_lbhdr_eth_ecmp_member_id_get, + bcmpkt_lbhdr_eth_int_cn_get, + bcmpkt_lbhdr_eth_int_pri_get, + bcmpkt_lbhdr_eth_mcast_lb_index_get, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_get, + bcmpkt_lbhdr_eth_pp_port_get, + bcmpkt_lbhdr_eth_qos_fields_vld_get, + bcmpkt_lbhdr_eth_routed_pkt_get, + bcmpkt_lbhdr_eth_subflow_type_get, + bcmpkt_lbhdr_ethernet_vrf_get, + bcmpkt_lbhdr_ethernet_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56990_a0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + bcmpkt_lbhdr_input_priority_set, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + bcmpkt_lbhdr_source_set, + bcmpkt_lbhdr_source_type_set, + bcmpkt_lbhdr_trill_ac_cng_set, + bcmpkt_lbhdr_trill_ac_tc_set, + NULL, + bcmpkt_lbhdr_trill_nw_cng_set, + bcmpkt_lbhdr_trill_nw_tc_set, + bcmpkt_lbhdr_eth_dest_type_set, + bcmpkt_lbhdr_eth_dest_set, + bcmpkt_lbhdr_eth_dp_set, + bcmpkt_lbhdr_eth_ecmp_member_id_set, + bcmpkt_lbhdr_eth_int_cn_set, + bcmpkt_lbhdr_eth_int_pri_set, + bcmpkt_lbhdr_eth_mcast_lb_index_set, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_set, + bcmpkt_lbhdr_eth_pp_port_set, + bcmpkt_lbhdr_eth_qos_fields_vld_set, + bcmpkt_lbhdr_eth_routed_pkt_set, + bcmpkt_lbhdr_eth_subflow_type_set, + bcmpkt_lbhdr_ethernet_vrf_set, + bcmpkt_lbhdr_ethernet_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56990_a0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm56990_a0_lbhdr_view_types[] = { + {"trill_nw", 1}, + {"trill_ac", 2}, + {"ethernet", 3}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56990_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, +}; + + +void bcm56990_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56990_a0_lbhdr_view_infos; + info->view_types = bcm56990_a0_lbhdr_view_types; + info->view_type_get = bcmpkt_lbhdr_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..335c68ec71b9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c @@ -0,0 +1,1086 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides RXPMD access functions for BCM56990_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 24, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 24, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 3, 8, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 3, 8); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 22, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 22, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 18, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 18, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 11, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 11, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 11, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 11, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 28, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 28, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 23, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 23, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 28, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 28, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 13, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 13, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 14, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 14, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 4, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 4, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 15, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 15, 13); + return val; +} + +static void bcmpkt_rxpmd_loopback_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 0, 3, val); +} + +static uint32_t bcmpkt_rxpmd_loopback_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 0, 3); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 1, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 1, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 18, 5, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 18, 5); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 15, 17, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 15, 17); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 30, 2); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 10; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 43 + ******************************************************************************/ +void bcm56990_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) { + WORD_FIELD_SET(data[1], 16, 2, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) { + WORD_FIELD_SET(data[1], 16, 2, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 23); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) { + WORD_FIELD_SET(data[1], 24, 3, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) { + WORD_FIELD_SET(data[1], 24, 3, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) { + WORD_FIELD_SET(data[1], 24, 3, 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) { + WORD_FIELD_SET(data[1], 24, 3, 4); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR)) { + WORD_FIELD_SET(data[1], 24, 3, 7); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 10); + } +} + +void bcm56990_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + + val = WORD_FIELD_GET(data[1], 16, 2); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val); + } + + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + + val = WORD_FIELD_GET(data[1], 24, 3); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val); + } + + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } +} + +void bcm56990_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56990_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56990_a0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + bcmpkt_rxpmd_timestamp_type_get, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + bcmpkt_rxpmd_loopback_packet_type_get, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + bcmpkt_rxpmd_dlb_id_valid_get, + bcmpkt_rxpmd_dlb_id_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56990_a0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + bcmpkt_rxpmd_timestamp_type_set, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + bcmpkt_rxpmd_loopback_packet_type_set, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + bcmpkt_rxpmd_dlb_id_valid_set, + bcmpkt_rxpmd_dlb_id_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56990_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm56990_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56990_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56990_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56990_a0_rxpmd_view_infos; + info->view_types = bcm56990_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c new file mode 100644 index 000000000000..73cc2ec20b53 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c @@ -0,0 +1,526 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides TXPMD access functions for BCM56990_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 24, 8, val); +} + +static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 24, 8); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 31, 1, val & MASK(1)); + WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8)); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ; + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 8, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 8, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56990_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + bcmpkt_txpmd_ipcf_ptr_get, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56990_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + bcmpkt_txpmd_ipcf_ptr_set, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56990_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56990_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56990_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56990_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56990_a0_txpmd_view_infos; + info->view_types = bcm56990_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c new file mode 100644 index 000000000000..b8a4a5b0c848 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c @@ -0,0 +1,592 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides LBHDR access functions for BCM56990_B0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 8, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 8); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 5, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 5); + return val; +} + +static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 20, 4, val); +} + +static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 20, 4); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 26, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 26, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 29, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 29, 1); + return val; +} + +static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 30, 2, val & MASK(2)); + WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14)); +} + +static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ; + return val; +} + +static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 11, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 11, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 15, 16, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 15, 16); + return val; +} + +static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 7, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 7, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 9, 14, val); +} + +static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 9, 14); + return val; +} + +static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 1, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 3, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 3, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 6, 8, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 6, 8); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 0, 9, val); +} + +static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 9); + return val; +} + +static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 0, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 9, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 2); + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4)); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ; + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 4, 1, val); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 4, 1); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm56990_b0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + bcmpkt_lbhdr_input_priority_get, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + bcmpkt_lbhdr_source_get, + bcmpkt_lbhdr_source_type_get, + bcmpkt_lbhdr_trill_ac_cng_get, + bcmpkt_lbhdr_trill_ac_tc_get, + NULL, + bcmpkt_lbhdr_trill_nw_cng_get, + bcmpkt_lbhdr_trill_nw_tc_get, + bcmpkt_lbhdr_eth_dest_type_get, + bcmpkt_lbhdr_eth_dest_get, + bcmpkt_lbhdr_eth_dp_get, + bcmpkt_lbhdr_eth_ecmp_member_id_get, + bcmpkt_lbhdr_eth_int_cn_get, + bcmpkt_lbhdr_eth_int_pri_get, + bcmpkt_lbhdr_eth_mcast_lb_index_get, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_get, + bcmpkt_lbhdr_eth_pp_port_get, + bcmpkt_lbhdr_eth_qos_fields_vld_get, + bcmpkt_lbhdr_eth_routed_pkt_get, + bcmpkt_lbhdr_eth_subflow_type_get, + bcmpkt_lbhdr_ethernet_vrf_get, + bcmpkt_lbhdr_ethernet_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56990_b0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + bcmpkt_lbhdr_input_priority_set, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + bcmpkt_lbhdr_source_set, + bcmpkt_lbhdr_source_type_set, + bcmpkt_lbhdr_trill_ac_cng_set, + bcmpkt_lbhdr_trill_ac_tc_set, + NULL, + bcmpkt_lbhdr_trill_nw_cng_set, + bcmpkt_lbhdr_trill_nw_tc_set, + bcmpkt_lbhdr_eth_dest_type_set, + bcmpkt_lbhdr_eth_dest_set, + bcmpkt_lbhdr_eth_dp_set, + bcmpkt_lbhdr_eth_ecmp_member_id_set, + bcmpkt_lbhdr_eth_int_cn_set, + bcmpkt_lbhdr_eth_int_pri_set, + bcmpkt_lbhdr_eth_mcast_lb_index_set, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_set, + bcmpkt_lbhdr_eth_pp_port_set, + bcmpkt_lbhdr_eth_qos_fields_vld_set, + bcmpkt_lbhdr_eth_routed_pkt_set, + bcmpkt_lbhdr_eth_subflow_type_set, + bcmpkt_lbhdr_ethernet_vrf_set, + bcmpkt_lbhdr_ethernet_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56990_b0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm56990_b0_lbhdr_view_types[] = { + {"trill_nw", 1}, + {"trill_ac", 2}, + {"ethernet", 3}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56990_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, +}; + + +void bcm56990_b0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56990_b0_lbhdr_view_infos; + info->view_types = bcm56990_b0_lbhdr_view_types; + info->view_type_get = bcmpkt_lbhdr_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c new file mode 100644 index 000000000000..056516e254c2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c @@ -0,0 +1,1110 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides RXPMD access functions for BCM56990_B0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 24, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 24, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 3, 8, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 3, 8); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 22, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 22, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 18, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 18, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 11, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 11, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 11, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 11, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 28, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 28, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 2, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 2, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 1, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 1, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 23, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 23, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 13, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 13, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 14, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 14, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 4, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 4, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 13); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 1, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 1, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 18, 5, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 18, 5); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 15, 17, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 15, 17); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 16, 1); + return val; +} + +static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 15, 15, val); +} + +static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 15, 15); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 10; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 45 + ******************************************************************************/ +void bcm56990_b0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) { + WORD_FIELD_SET(data[1], 16, 2, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) { + WORD_FIELD_SET(data[1], 16, 2, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 23); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) { + WORD_FIELD_SET(data[1], 24, 3, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) { + WORD_FIELD_SET(data[1], 24, 3, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) { + WORD_FIELD_SET(data[1], 24, 3, 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) { + WORD_FIELD_SET(data[1], 24, 3, 4); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR)) { + WORD_FIELD_SET(data[1], 24, 3, 7); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { + data[0] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { + data[0] |= (0x1 << 12); + } +} + +void bcm56990_b0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + + val = WORD_FIELD_GET(data[1], 16, 2); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val); + } + + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + + val = WORD_FIELD_GET(data[1], 24, 3); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val); + } + + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } + if (data[0] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); + } + if (data[0] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); + } +} + +void bcm56990_b0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56990_b0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56990_b0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + bcmpkt_rxpmd_timestamp_type_get, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + NULL, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + bcmpkt_rxpmd_dlb_id_valid_get, + bcmpkt_rxpmd_dlb_id_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_get, + bcmpkt_rxpmd_o_nhi_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56990_b0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + bcmpkt_rxpmd_timestamp_type_set, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + NULL, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + bcmpkt_rxpmd_dlb_id_valid_set, + bcmpkt_rxpmd_dlb_id_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_set, + bcmpkt_rxpmd_o_nhi_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56990_b0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm56990_b0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56990_b0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56990_b0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56990_b0_rxpmd_view_infos; + info->view_types = bcm56990_b0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c new file mode 100644 index 000000000000..9546f63b3878 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c @@ -0,0 +1,526 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides TXPMD access functions for BCM56990_B0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 24, 8, val); +} + +static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 24, 8); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 31, 1, val & MASK(1)); + WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8)); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ; + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 8, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 8, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56990_b0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + bcmpkt_txpmd_ipcf_ptr_get, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56990_b0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + bcmpkt_txpmd_ipcf_ptr_set, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56990_b0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56990_b0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56990_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56990_b0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56990_b0_txpmd_view_infos; + info->view_types = bcm56990_b0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..45e0ec01d602 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c @@ -0,0 +1,592 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides LBHDR access functions for BCM56996_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 8, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 8); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 5, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 5); + return val; +} + +static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 20, 4, val); +} + +static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 20, 4); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 26, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 26, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 29, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 29, 1); + return val; +} + +static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 30, 2, val & MASK(2)); + WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14)); +} + +static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ; + return val; +} + +static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 11, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 11, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 15, 16, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 15, 16); + return val; +} + +static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 7, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 7, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 9, 14, val); +} + +static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 9, 14); + return val; +} + +static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 1, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 3, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 3, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 6, 8, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 6, 8); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 0, 9, val); +} + +static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 9); + return val; +} + +static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 0, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 9, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 2); + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4)); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ; + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 4, 1, val); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 4, 1); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm56996_a0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + bcmpkt_lbhdr_input_priority_get, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + bcmpkt_lbhdr_source_get, + bcmpkt_lbhdr_source_type_get, + bcmpkt_lbhdr_trill_ac_cng_get, + bcmpkt_lbhdr_trill_ac_tc_get, + NULL, + bcmpkt_lbhdr_trill_nw_cng_get, + bcmpkt_lbhdr_trill_nw_tc_get, + bcmpkt_lbhdr_eth_dest_type_get, + bcmpkt_lbhdr_eth_dest_get, + bcmpkt_lbhdr_eth_dp_get, + bcmpkt_lbhdr_eth_ecmp_member_id_get, + bcmpkt_lbhdr_eth_int_cn_get, + bcmpkt_lbhdr_eth_int_pri_get, + bcmpkt_lbhdr_eth_mcast_lb_index_get, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_get, + bcmpkt_lbhdr_eth_pp_port_get, + bcmpkt_lbhdr_eth_qos_fields_vld_get, + bcmpkt_lbhdr_eth_routed_pkt_get, + bcmpkt_lbhdr_eth_subflow_type_get, + bcmpkt_lbhdr_ethernet_vrf_get, + bcmpkt_lbhdr_ethernet_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56996_a0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + bcmpkt_lbhdr_input_priority_set, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + bcmpkt_lbhdr_source_set, + bcmpkt_lbhdr_source_type_set, + bcmpkt_lbhdr_trill_ac_cng_set, + bcmpkt_lbhdr_trill_ac_tc_set, + NULL, + bcmpkt_lbhdr_trill_nw_cng_set, + bcmpkt_lbhdr_trill_nw_tc_set, + bcmpkt_lbhdr_eth_dest_type_set, + bcmpkt_lbhdr_eth_dest_set, + bcmpkt_lbhdr_eth_dp_set, + bcmpkt_lbhdr_eth_ecmp_member_id_set, + bcmpkt_lbhdr_eth_int_cn_set, + bcmpkt_lbhdr_eth_int_pri_set, + bcmpkt_lbhdr_eth_mcast_lb_index_set, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_set, + bcmpkt_lbhdr_eth_pp_port_set, + bcmpkt_lbhdr_eth_qos_fields_vld_set, + bcmpkt_lbhdr_eth_routed_pkt_set, + bcmpkt_lbhdr_eth_subflow_type_set, + bcmpkt_lbhdr_ethernet_vrf_set, + bcmpkt_lbhdr_ethernet_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56996_a0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm56996_a0_lbhdr_view_types[] = { + {"trill_nw", 1}, + {"trill_ac", 2}, + {"ethernet", 3}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56996_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, +}; + + +void bcm56996_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56996_a0_lbhdr_view_infos; + info->view_types = bcm56996_a0_lbhdr_view_types; + info->view_type_get = bcmpkt_lbhdr_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..6eac53c8cb3a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c @@ -0,0 +1,1110 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides RXPMD access functions for BCM56996_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 24, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 24, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 3, 8, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 3, 8); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 22, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 22, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 18, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 18, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 11, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 11, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 11, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 11, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 28, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 28, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 2, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 2, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 1, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 1, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 23, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 23, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 13, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 13, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 14, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 14, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 4, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 4, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 13); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 1, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 1, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 18, 5, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 18, 5); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 15, 17, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 15, 17); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 16, 1); + return val; +} + +static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 15, 15, val); +} + +static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 15, 15); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 10; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 45 + ******************************************************************************/ +void bcm56996_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) { + WORD_FIELD_SET(data[1], 16, 2, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) { + WORD_FIELD_SET(data[1], 16, 2, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 23); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) { + WORD_FIELD_SET(data[1], 24, 3, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) { + WORD_FIELD_SET(data[1], 24, 3, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) { + WORD_FIELD_SET(data[1], 24, 3, 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) { + WORD_FIELD_SET(data[1], 24, 3, 4); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR)) { + WORD_FIELD_SET(data[1], 24, 3, 7); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { + data[0] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { + data[0] |= (0x1 << 12); + } +} + +void bcm56996_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + + val = WORD_FIELD_GET(data[1], 16, 2); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val); + } + + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + + val = WORD_FIELD_GET(data[1], 24, 3); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val); + } + + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } + if (data[0] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); + } + if (data[0] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); + } +} + +void bcm56996_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56996_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56996_a0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + bcmpkt_rxpmd_timestamp_type_get, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + NULL, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + bcmpkt_rxpmd_dlb_id_valid_get, + bcmpkt_rxpmd_dlb_id_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_get, + bcmpkt_rxpmd_o_nhi_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56996_a0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + bcmpkt_rxpmd_timestamp_type_set, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + NULL, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + bcmpkt_rxpmd_dlb_id_valid_set, + bcmpkt_rxpmd_dlb_id_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_set, + bcmpkt_rxpmd_o_nhi_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56996_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm56996_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56996_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56996_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56996_a0_rxpmd_view_infos; + info->view_types = bcm56996_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c new file mode 100644 index 000000000000..57a9aa16f86c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c @@ -0,0 +1,526 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides TXPMD access functions for BCM56996_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 24, 8, val); +} + +static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 24, 8); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 31, 1, val & MASK(1)); + WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8)); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ; + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 8, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 8, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56996_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + bcmpkt_txpmd_ipcf_ptr_get, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56996_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + bcmpkt_txpmd_ipcf_ptr_set, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56996_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56996_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56996_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56996_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56996_a0_txpmd_view_infos; + info->view_types = bcm56996_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c new file mode 100644 index 000000000000..90586e9db31f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c @@ -0,0 +1,592 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides LBHDR access functions for BCM56996_B0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 8, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 8); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 5, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 5); + return val; +} + +static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 20, 4, val); +} + +static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 20, 4); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 26, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 26, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 29, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 29, 1); + return val; +} + +static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 30, 2, val & MASK(2)); + WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14)); +} + +static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ; + return val; +} + +static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 11, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 11, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 15, 16, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 15, 16); + return val; +} + +static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 7, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 7, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 9, 14, val); +} + +static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 9, 14); + return val; +} + +static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 1, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 3, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 3, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 6, 8, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 6, 8); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 0, 9, val); +} + +static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 9); + return val; +} + +static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 0, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 9, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 2); + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4)); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ; + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 4, 1, val); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 4, 1); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm56996_b0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + bcmpkt_lbhdr_input_priority_get, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + bcmpkt_lbhdr_source_get, + bcmpkt_lbhdr_source_type_get, + bcmpkt_lbhdr_trill_ac_cng_get, + bcmpkt_lbhdr_trill_ac_tc_get, + NULL, + bcmpkt_lbhdr_trill_nw_cng_get, + bcmpkt_lbhdr_trill_nw_tc_get, + bcmpkt_lbhdr_eth_dest_type_get, + bcmpkt_lbhdr_eth_dest_get, + bcmpkt_lbhdr_eth_dp_get, + bcmpkt_lbhdr_eth_ecmp_member_id_get, + bcmpkt_lbhdr_eth_int_cn_get, + bcmpkt_lbhdr_eth_int_pri_get, + bcmpkt_lbhdr_eth_mcast_lb_index_get, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_get, + bcmpkt_lbhdr_eth_pp_port_get, + bcmpkt_lbhdr_eth_qos_fields_vld_get, + bcmpkt_lbhdr_eth_routed_pkt_get, + bcmpkt_lbhdr_eth_subflow_type_get, + bcmpkt_lbhdr_ethernet_vrf_get, + bcmpkt_lbhdr_ethernet_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56996_b0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + bcmpkt_lbhdr_input_priority_set, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + bcmpkt_lbhdr_source_set, + bcmpkt_lbhdr_source_type_set, + bcmpkt_lbhdr_trill_ac_cng_set, + bcmpkt_lbhdr_trill_ac_tc_set, + NULL, + bcmpkt_lbhdr_trill_nw_cng_set, + bcmpkt_lbhdr_trill_nw_tc_set, + bcmpkt_lbhdr_eth_dest_type_set, + bcmpkt_lbhdr_eth_dest_set, + bcmpkt_lbhdr_eth_dp_set, + bcmpkt_lbhdr_eth_ecmp_member_id_set, + bcmpkt_lbhdr_eth_int_cn_set, + bcmpkt_lbhdr_eth_int_pri_set, + bcmpkt_lbhdr_eth_mcast_lb_index_set, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_set, + bcmpkt_lbhdr_eth_pp_port_set, + bcmpkt_lbhdr_eth_qos_fields_vld_set, + bcmpkt_lbhdr_eth_routed_pkt_set, + bcmpkt_lbhdr_eth_subflow_type_set, + bcmpkt_lbhdr_ethernet_vrf_set, + bcmpkt_lbhdr_ethernet_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56996_b0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm56996_b0_lbhdr_view_types[] = { + {"trill_nw", 1}, + {"trill_ac", 2}, + {"ethernet", 3}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56996_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, +}; + + +void bcm56996_b0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56996_b0_lbhdr_view_infos; + info->view_types = bcm56996_b0_lbhdr_view_types; + info->view_type_get = bcmpkt_lbhdr_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c new file mode 100644 index 000000000000..71042ff2a89a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c @@ -0,0 +1,1110 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides RXPMD access functions for BCM56996_B0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 24, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 24, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 3, 8, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 3, 8); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 22, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 22, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 18, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 18, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 11, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 11, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 11, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 11, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 28, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 28, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 2, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 2, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 1, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 1, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 23, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 23, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 13, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 13, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 14, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 14, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 4, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 4, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 13); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 1, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 1, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 18, 5, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 18, 5); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 15, 17, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 15, 17); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 16, 1); + return val; +} + +static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 15, 15, val); +} + +static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 15, 15); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 10; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 45 + ******************************************************************************/ +void bcm56996_b0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) { + WORD_FIELD_SET(data[1], 16, 2, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) { + WORD_FIELD_SET(data[1], 16, 2, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 23); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) { + WORD_FIELD_SET(data[1], 24, 3, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) { + WORD_FIELD_SET(data[1], 24, 3, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) { + WORD_FIELD_SET(data[1], 24, 3, 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) { + WORD_FIELD_SET(data[1], 24, 3, 4); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR)) { + WORD_FIELD_SET(data[1], 24, 3, 7); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { + data[0] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { + data[0] |= (0x1 << 12); + } +} + +void bcm56996_b0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + + val = WORD_FIELD_GET(data[1], 16, 2); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val); + } + + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + + val = WORD_FIELD_GET(data[1], 24, 3); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val); + } + + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } + if (data[0] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); + } + if (data[0] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); + } +} + +void bcm56996_b0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56996_b0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56996_b0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + bcmpkt_rxpmd_timestamp_type_get, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + NULL, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + bcmpkt_rxpmd_dlb_id_valid_get, + bcmpkt_rxpmd_dlb_id_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_get, + bcmpkt_rxpmd_o_nhi_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56996_b0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + bcmpkt_rxpmd_timestamp_type_set, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + NULL, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + bcmpkt_rxpmd_dlb_id_valid_set, + bcmpkt_rxpmd_dlb_id_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_set, + bcmpkt_rxpmd_o_nhi_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56996_b0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm56996_b0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56996_b0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56996_b0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56996_b0_rxpmd_view_infos; + info->view_types = bcm56996_b0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c new file mode 100644 index 000000000000..6c3894f0ce75 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c @@ -0,0 +1,526 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides TXPMD access functions for BCM56996_B0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 24, 8, val); +} + +static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 24, 8); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 31, 1, val & MASK(1)); + WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8)); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ; + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 8, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 8, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56996_b0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + bcmpkt_txpmd_ipcf_ptr_get, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56996_b0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + bcmpkt_txpmd_ipcf_ptr_set, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56996_b0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56996_b0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56996_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56996_b0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56996_b0_txpmd_view_infos; + info->view_types = bcm56996_b0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..abf7e1b75cd0 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c @@ -0,0 +1,592 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides LBHDR access functions for BCM56998_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 8, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 8); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 5, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 5); + return val; +} + +static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 20, 4, val); +} + +static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 20, 4); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 26, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 26, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 29, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 29, 1); + return val; +} + +static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 30, 2, val & MASK(2)); + WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14)); +} + +static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ; + return val; +} + +static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 11, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 11, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 15, 16, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 15, 16); + return val; +} + +static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 7, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 7, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 9, 14, val); +} + +static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 9, 14); + return val; +} + +static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 1, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 3, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 3, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 6, 8, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 6, 8); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 0, 9, val); +} + +static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 9); + return val; +} + +static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 0, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 9, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 2); + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4)); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ; + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 4, 1, val); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 4, 1); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm56998_a0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + bcmpkt_lbhdr_input_priority_get, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + bcmpkt_lbhdr_source_get, + bcmpkt_lbhdr_source_type_get, + bcmpkt_lbhdr_trill_ac_cng_get, + bcmpkt_lbhdr_trill_ac_tc_get, + NULL, + bcmpkt_lbhdr_trill_nw_cng_get, + bcmpkt_lbhdr_trill_nw_tc_get, + bcmpkt_lbhdr_eth_dest_type_get, + bcmpkt_lbhdr_eth_dest_get, + bcmpkt_lbhdr_eth_dp_get, + bcmpkt_lbhdr_eth_ecmp_member_id_get, + bcmpkt_lbhdr_eth_int_cn_get, + bcmpkt_lbhdr_eth_int_pri_get, + bcmpkt_lbhdr_eth_mcast_lb_index_get, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_get, + bcmpkt_lbhdr_eth_pp_port_get, + bcmpkt_lbhdr_eth_qos_fields_vld_get, + bcmpkt_lbhdr_eth_routed_pkt_get, + bcmpkt_lbhdr_eth_subflow_type_get, + bcmpkt_lbhdr_ethernet_vrf_get, + bcmpkt_lbhdr_ethernet_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56998_a0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + bcmpkt_lbhdr_input_priority_set, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + bcmpkt_lbhdr_source_set, + bcmpkt_lbhdr_source_type_set, + bcmpkt_lbhdr_trill_ac_cng_set, + bcmpkt_lbhdr_trill_ac_tc_set, + NULL, + bcmpkt_lbhdr_trill_nw_cng_set, + bcmpkt_lbhdr_trill_nw_tc_set, + bcmpkt_lbhdr_eth_dest_type_set, + bcmpkt_lbhdr_eth_dest_set, + bcmpkt_lbhdr_eth_dp_set, + bcmpkt_lbhdr_eth_ecmp_member_id_set, + bcmpkt_lbhdr_eth_int_cn_set, + bcmpkt_lbhdr_eth_int_pri_set, + bcmpkt_lbhdr_eth_mcast_lb_index_set, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_set, + bcmpkt_lbhdr_eth_pp_port_set, + bcmpkt_lbhdr_eth_qos_fields_vld_set, + bcmpkt_lbhdr_eth_routed_pkt_set, + bcmpkt_lbhdr_eth_subflow_type_set, + bcmpkt_lbhdr_ethernet_vrf_set, + bcmpkt_lbhdr_ethernet_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56998_a0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm56998_a0_lbhdr_view_types[] = { + {"trill_nw", 1}, + {"trill_ac", 2}, + {"ethernet", 3}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56998_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, +}; + + +void bcm56998_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56998_a0_lbhdr_view_infos; + info->view_types = bcm56998_a0_lbhdr_view_types; + info->view_type_get = bcmpkt_lbhdr_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..9b92e402a588 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c @@ -0,0 +1,1140 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides RXPMD access functions for BCM56998_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 24, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 24, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 3, 8, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 3, 8); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 22, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 22, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 18, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 18, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 11, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 11, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 11, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 11, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 28, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 28, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 2, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 2, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 0, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 0, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 23, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 23, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 13, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 13, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 14, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 14, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 4, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 4, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 13); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 1, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 1, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 18, 5, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 18, 5); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 15, 17, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 15, 17); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 16, 1); + return val; +} + +static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 15, 15, val); +} + +static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 15, 15); + return val; +} + +static void bcmpkt_rxpmd_ieu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 0, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ieu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 0, 1); + return val; +} + +static void bcmpkt_rxpmd_ieu_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 1, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ieu_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 1, 1); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 10; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 46 + ******************************************************************************/ +void bcm56998_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) { + WORD_FIELD_SET(data[1], 16, 2, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) { + WORD_FIELD_SET(data[1], 16, 2, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 23); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) { + WORD_FIELD_SET(data[1], 24, 3, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) { + WORD_FIELD_SET(data[1], 24, 3, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) { + WORD_FIELD_SET(data[1], 24, 3, 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) { + WORD_FIELD_SET(data[1], 24, 3, 4); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR)) { + WORD_FIELD_SET(data[1], 24, 3, 7); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { + data[0] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { + data[0] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN)) { + data[0] |= (0x1 << 13); + } +} + +void bcm56998_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + + val = WORD_FIELD_GET(data[1], 16, 2); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val); + } + + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + + val = WORD_FIELD_GET(data[1], 24, 3); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val); + } + + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } + if (data[0] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); + } + if (data[0] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); + } + if (data[0] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN); + } +} + +void bcm56998_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56998_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56998_a0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + bcmpkt_rxpmd_timestamp_type_get, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + NULL, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + bcmpkt_rxpmd_dlb_id_valid_get, + bcmpkt_rxpmd_dlb_id_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_get, + bcmpkt_rxpmd_o_nhi_get, + bcmpkt_rxpmd_ieu_get, + bcmpkt_rxpmd_ieu_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56998_a0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + bcmpkt_rxpmd_timestamp_type_set, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + NULL, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + bcmpkt_rxpmd_dlb_id_valid_set, + bcmpkt_rxpmd_dlb_id_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_set, + bcmpkt_rxpmd_o_nhi_set, + bcmpkt_rxpmd_ieu_set, + bcmpkt_rxpmd_ieu_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56998_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm56998_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56998_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56998_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56998_a0_rxpmd_view_infos; + info->view_types = bcm56998_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c new file mode 100644 index 000000000000..a358b5d761b0 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c @@ -0,0 +1,526 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides TXPMD access functions for BCM56998_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 24, 8, val); +} + +static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 24, 8); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 31, 1, val & MASK(1)); + WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8)); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ; + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 8, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 8, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56998_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + bcmpkt_txpmd_ipcf_ptr_get, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56998_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + bcmpkt_txpmd_ipcf_ptr_set, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56998_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56998_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56998_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56998_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56998_a0_txpmd_view_infos; + info->view_types = bcm56998_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..fb32e5f4503a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c @@ -0,0 +1,592 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides LBHDR access functions for BCM56999_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 8, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 8); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 15, 5, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 15, 5); + return val; +} + +static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 20, 4, val); +} + +static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 20, 4); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 26, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 26, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 29, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 29, 1); + return val; +} + +static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 30, 2, val & MASK(2)); + WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14)); +} + +static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ; + return val; +} + +static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 4, 2, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 4, 2); + return val; +} + +static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return; + } + WORD_FIELD_SET(data[3], 0, 4, val); +} + +static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 11, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 11, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 15, 16, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 15, 16); + return val; +} + +static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 7, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 7, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 9, 14, val); +} + +static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 9, 14); + return val; +} + +static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 1, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 2); + return val; +} + +static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 3, 4, val); +} + +static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 3, 4); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 6, 8, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 6, 8); + return val; +} + +static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 0, 9, val); +} + +static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 9); + return val; +} + +static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 0, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[3], 9, 2, val); +} + +static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 2); + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[2], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4)); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ; + return val; +} + +static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return; + } + WORD_FIELD_SET(data[1], 4, 1, val); +} + +static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) { + return 0; + } + val = WORD_FIELD_GET(data[1], 4, 1); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm56999_a0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + bcmpkt_lbhdr_input_priority_get, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + bcmpkt_lbhdr_source_get, + bcmpkt_lbhdr_source_type_get, + bcmpkt_lbhdr_trill_ac_cng_get, + bcmpkt_lbhdr_trill_ac_tc_get, + NULL, + bcmpkt_lbhdr_trill_nw_cng_get, + bcmpkt_lbhdr_trill_nw_tc_get, + bcmpkt_lbhdr_eth_dest_type_get, + bcmpkt_lbhdr_eth_dest_get, + bcmpkt_lbhdr_eth_dp_get, + bcmpkt_lbhdr_eth_ecmp_member_id_get, + bcmpkt_lbhdr_eth_int_cn_get, + bcmpkt_lbhdr_eth_int_pri_get, + bcmpkt_lbhdr_eth_mcast_lb_index_get, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_get, + bcmpkt_lbhdr_eth_pp_port_get, + bcmpkt_lbhdr_eth_qos_fields_vld_get, + bcmpkt_lbhdr_eth_routed_pkt_get, + bcmpkt_lbhdr_eth_subflow_type_get, + bcmpkt_lbhdr_ethernet_vrf_get, + bcmpkt_lbhdr_ethernet_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm56999_a0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + bcmpkt_lbhdr_input_priority_set, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + bcmpkt_lbhdr_source_set, + bcmpkt_lbhdr_source_type_set, + bcmpkt_lbhdr_trill_ac_cng_set, + bcmpkt_lbhdr_trill_ac_tc_set, + NULL, + bcmpkt_lbhdr_trill_nw_cng_set, + bcmpkt_lbhdr_trill_nw_tc_set, + bcmpkt_lbhdr_eth_dest_type_set, + bcmpkt_lbhdr_eth_dest_set, + bcmpkt_lbhdr_eth_dp_set, + bcmpkt_lbhdr_eth_ecmp_member_id_set, + bcmpkt_lbhdr_eth_int_cn_set, + bcmpkt_lbhdr_eth_int_pri_set, + bcmpkt_lbhdr_eth_mcast_lb_index_set, + bcmpkt_lbhdr_eth_mcast_lb_index_vld_set, + bcmpkt_lbhdr_eth_pp_port_set, + bcmpkt_lbhdr_eth_qos_fields_vld_set, + bcmpkt_lbhdr_eth_routed_pkt_set, + bcmpkt_lbhdr_eth_subflow_type_set, + bcmpkt_lbhdr_ethernet_vrf_set, + bcmpkt_lbhdr_ethernet_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm56999_a0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm56999_a0_lbhdr_view_types[] = { + {"trill_nw", 1}, + {"trill_ac", 2}, + {"ethernet", 3}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56999_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, 2, 2, -2, 1, 1, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, +}; + + +void bcm56999_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56999_a0_lbhdr_view_infos; + info->view_types = bcm56999_a0_lbhdr_view_types; + info->view_type_get = bcmpkt_lbhdr_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..aa132a65ec12 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c @@ -0,0 +1,1110 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides RXPMD access functions for BCM56999_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 24, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 24, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 22, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 22, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 3, 8, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 3, 8); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 22, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 22, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 18, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 18, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 29, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 29, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 5, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 5, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 30, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 30, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 11, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 11, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 11, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 11, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 28, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 28, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 2, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 2, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 1, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 1, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 23, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 23, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 13, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 13, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 14, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 14, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 4, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 4, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 12, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 12, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 0, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 0, 13); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 1, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 1, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 18, 5, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 18, 5); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 15, 17, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 15, 17); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 30, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 30, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[12], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[12], 16, 1); + return val; +} + +static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 15, 15, val); +} + +static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 15, 15); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 10; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 45 + ******************************************************************************/ +void bcm56999_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) { + WORD_FIELD_SET(data[1], 16, 2, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) { + WORD_FIELD_SET(data[1], 16, 2, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW)) { + WORD_FIELD_SET(data[1], 16, 2, 3); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 23); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) { + WORD_FIELD_SET(data[1], 24, 3, 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) { + WORD_FIELD_SET(data[1], 24, 3, 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) { + WORD_FIELD_SET(data[1], 24, 3, 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) { + WORD_FIELD_SET(data[1], 24, 3, 4); + } + /*! For mask set ONLY. */ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR)) { + WORD_FIELD_SET(data[1], 24, 3, 7); + } + + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { + data[0] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { + data[0] |= (0x1 << 12); + } +} + +void bcm56999_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + + val = WORD_FIELD_GET(data[1], 16, 2); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val); + } + + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + + val = WORD_FIELD_GET(data[1], 24, 3); + if (val) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR); + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val); + } + + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } + if (data[0] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); + } + if (data[0] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); + } +} + +void bcm56999_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ +} + +void bcm56999_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ +} + +const bcmpkt_rxpmd_fget_t bcm56999_a0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + bcmpkt_rxpmd_timestamp_type_get, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + NULL, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + bcmpkt_rxpmd_dlb_id_valid_get, + bcmpkt_rxpmd_dlb_id_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_get, + bcmpkt_rxpmd_o_nhi_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm56999_a0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + bcmpkt_rxpmd_timestamp_type_set, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + NULL, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + bcmpkt_rxpmd_dlb_id_valid_set, + bcmpkt_rxpmd_dlb_id_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_set, + bcmpkt_rxpmd_o_nhi_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm56999_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm56999_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56999_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, +}; + + +void bcm56999_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56999_a0_rxpmd_view_infos; + info->view_types = bcm56999_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c new file mode 100644 index 000000000000..132ef8557328 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c @@ -0,0 +1,526 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides TXPMD access functions for BCM56999_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 10, 14, val); +} + +static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 10, 14); + return val; +} + +static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 24, 8, val); +} + +static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 24, 8); + return val; +} + +static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 9, 1, val); +} + +static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 9, 1); + return val; +} + +static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 8, 1, val); +} + +static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 8, 1); + return val; +} + +static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 20, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 20, 1); + return val; +} + +static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 31, 1, val & MASK(1)); + WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8)); +} + +static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data) +{ + uint32_t val; + val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ; + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 8, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 8, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 25, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 16, 4, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 16, 4); + return val; +} + +static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 18, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 18, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 17, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 8, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 8, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 24, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 24, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 22, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 22, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 20, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 20, 2); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm56999_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + bcmpkt_txpmd_pkt_length_get, + bcmpkt_txpmd_ipcf_ptr_get, + bcmpkt_txpmd_sop_get, + bcmpkt_txpmd_eop_get, + bcmpkt_txpmd_cell_length_get, + bcmpkt_txpmd_cell_error_get, + bcmpkt_txpmd_local_dest_port_get, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + bcmpkt_txpmd_set_l2bm_get, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm56999_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + bcmpkt_txpmd_pkt_length_set, + bcmpkt_txpmd_ipcf_ptr_set, + bcmpkt_txpmd_sop_set, + bcmpkt_txpmd_eop_set, + bcmpkt_txpmd_cell_length_set, + bcmpkt_txpmd_cell_error_set, + bcmpkt_txpmd_local_dest_port_set, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + bcmpkt_txpmd_set_l2bm_set, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm56999_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm56999_a0_txpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm56999_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm56999_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm56999_a0_txpmd_view_infos; + info->view_types = bcm56999_a0_txpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c new file mode 100644 index 000000000000..bddf990d22a0 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c @@ -0,0 +1,347 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides LBHDR access functions for BCM78900_B0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 13, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 13, 1); + return val; +} + +static void bcmpkt_lbhdr_pp_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 21, 9, val); +} + +static uint32_t bcmpkt_lbhdr_pp_port_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 21, 9); + return val; +} + +static void bcmpkt_lbhdr_routed_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_lbhdr_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_lbhdr_vrf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 2, 13, val); +} + +static uint32_t bcmpkt_lbhdr_vrf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 2, 13); + return val; +} + +static void bcmpkt_lbhdr_vrf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_qos_field_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_lbhdr_qos_field_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_lbhdr_opaque_object_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 8, 4, val); +} + +static uint32_t bcmpkt_lbhdr_opaque_object_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 8, 4); + return val; +} + +static void bcmpkt_lbhdr_qos_field_eth_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 12, 8, val); +} + +static uint32_t bcmpkt_lbhdr_qos_field_eth_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 12, 8); + return val; +} + +static void bcmpkt_lbhdr_int_pri_eth_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 12, 4, val); +} + +static uint32_t bcmpkt_lbhdr_int_pri_eth_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 12, 4); + return val; +} + +static void bcmpkt_lbhdr_int_cn_eth_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 16, 2, val); +} + +static uint32_t bcmpkt_lbhdr_int_cn_eth_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 16, 2); + return val; +} + +static void bcmpkt_lbhdr_cng_eth_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 18, 2, val); +} + +static uint32_t bcmpkt_lbhdr_cng_eth_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 18, 2); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm78900_b0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + NULL, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_lbhdr_pp_port_get, + bcmpkt_lbhdr_routed_pkt_get, + bcmpkt_lbhdr_vrf_get, + bcmpkt_lbhdr_vrf_valid_get, + bcmpkt_lbhdr_qos_field_valid_get, + bcmpkt_lbhdr_opaque_object_get, + bcmpkt_lbhdr_qos_field_eth_get, + bcmpkt_lbhdr_int_pri_eth_get, + bcmpkt_lbhdr_int_cn_eth_get, + bcmpkt_lbhdr_cng_eth_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm78900_b0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + NULL, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_lbhdr_pp_port_set, + bcmpkt_lbhdr_routed_pkt_set, + bcmpkt_lbhdr_vrf_set, + bcmpkt_lbhdr_vrf_valid_set, + bcmpkt_lbhdr_qos_field_valid_set, + bcmpkt_lbhdr_opaque_object_set, + bcmpkt_lbhdr_qos_field_eth_set, + bcmpkt_lbhdr_int_pri_eth_set, + bcmpkt_lbhdr_int_cn_eth_set, + bcmpkt_lbhdr_cng_eth_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm78900_b0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm78900_b0_lbhdr_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm78900_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, +}; + + +void bcm78900_b0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm78900_b0_lbhdr_view_infos; + info->view_types = bcm78900_b0_lbhdr_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c new file mode 100644 index 000000000000..d14258476196 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c @@ -0,0 +1,1124 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides RXPMD access functions for BCM78900_B0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 22, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 22, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 26, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 26, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 26, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 26, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 16, 12, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 16, 12); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 3, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 3, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 22, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 22, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 3, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 3, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 6, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 6, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 2, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 2, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 6, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 6, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 3, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 3, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 28, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 28, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 1, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 1, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 1, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 1, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 1); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 18, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 18, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 4, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 4, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 5, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 5, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 16, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 16, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 4, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 4, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 4, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 4, 13); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 0, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 0, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 1, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 1, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 17, 4, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 17, 4); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 4, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 4, 1); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 15, 17, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 15, 17); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 23, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 23, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 20, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 20, 1); + return val; +} + +static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 17, 15, val); +} + +static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 17, 15); + return val; +} + +static void bcmpkt_rxpmd_incoming_opaque_tag_status_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 0, 1, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_opaque_tag_status_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 0, 1); + return val; +} + +static void bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 16, 1); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 11; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 46 + ******************************************************************************/ +void bcm78900_b0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC)) { + data[1] |= (0x1 << 16); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST)) { + data[1] |= (0x1 << 17); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS)) { + data[1] |= (0x1 << 23); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION)) { + data[1] |= (0x1 << 24); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD)) { + data[1] |= (0x1 << 25); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 26); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { + data[0] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { + data[0] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH)) { + data[0] |= (0x1 << 13); + } +} + +void bcm78900_b0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + if (data[1] & (0x1 << 16)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC); + } + if (data[1] & (0x1 << 17)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST); + } + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS); + } + if (data[1] & (0x1 << 24)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION); + } + if (data[1] & (0x1 << 25)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD); + } + if (data[1] & (0x1 << 26)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } + if (data[0] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); + } + if (data[0] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); + } + if (data[0] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH); + } +} + +/******************************************************************************* + * SWFORMAT: EP_RX_REASON + * BLOCKS: + * SIZE: 64 + ******************************************************************************/ +void bcm78900_b0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_EP_CTC)) { + data[1] |= (0x1 << 0); + } +} + +void bcm78900_b0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_EP_CTC); + } +} + +const bcmpkt_rxpmd_fget_t bcm78900_b0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + NULL, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + NULL, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + bcmpkt_rxpmd_dlb_id_valid_get, + bcmpkt_rxpmd_dlb_id_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_get, + bcmpkt_rxpmd_o_nhi_get, + NULL, + NULL, + bcmpkt_rxpmd_incoming_opaque_tag_status_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm78900_b0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + NULL, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + NULL, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + bcmpkt_rxpmd_dlb_id_valid_set, + bcmpkt_rxpmd_dlb_id_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_set, + bcmpkt_rxpmd_o_nhi_set, + NULL, + NULL, + bcmpkt_rxpmd_incoming_opaque_tag_status_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm78900_b0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm78900_b0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm78900_b0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -2, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -1, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2, +}; + + +void bcm78900_b0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm78900_b0_rxpmd_view_infos; + info->view_types = bcm78900_b0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c new file mode 100644 index 000000000000..8b3278d1eecc --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c @@ -0,0 +1,871 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides TXPMD access functions for BCM78900_B0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 0, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 1); + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 20, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 20, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 3, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 3, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 8, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 8, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 29, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 29, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 12, 3, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 12, 3); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 30, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 30, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 29, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 29, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 28, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 28, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 19, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 17, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 17, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 15, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 15, 2); + return val; +} + +static void bcmpkt_txpmd_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 1, 2, val); +} + +static uint32_t bcmpkt_txpmd_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 1, 2); + return val; +} + +static void bcmpkt_txpmd_destination_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 9, 16, val); +} + +static uint32_t bcmpkt_txpmd_destination_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 16); + return val; +} + +static void bcmpkt_txpmd_destination_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_destination_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 25, 4); + return val; +} + +static void bcmpkt_txpmd_wred_mark_eligible_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 30, 1, val); +} + +static uint32_t bcmpkt_txpmd_wred_mark_eligible_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 30, 1); + return val; +} + +static void bcmpkt_txpmd_wred_response_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 31, 1, val); +} + +static uint32_t bcmpkt_txpmd_wred_response_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 31, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 0, 17, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 17); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_destination_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 17, 15, val & MASK(15)); + WORD_FIELD_SET(data[2], 0, 1, (val >> 15) & MASK(1)); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_destination_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = (WORD_FIELD_GET(data[3], 17, 15) | (WORD_FIELD_GET(data[2], 0, 1) << 15)) ; + return val; +} + +static void bcmpkt_txpmd_cpu_tx_destination_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 1, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_destination_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 4); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 5, 2, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 5, 2); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_input_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 7, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_input_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 7, 4); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 11, 2, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 11, 2); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 13, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 13, 4); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 17, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_pkt_profile_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 18, 3, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 18, 3); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 21, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 21, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 22, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 22, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4)); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ; + return val; +} + +static void bcmpkt_txpmd_cpu_tx_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[1], 4, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 4, 1); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm78900_b0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cell_error_get, + NULL, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + NULL, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cng_get, + bcmpkt_txpmd_destination_get, + bcmpkt_txpmd_destination_type_get, + bcmpkt_txpmd_wred_mark_eligible_get, + bcmpkt_txpmd_wred_response_get, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_get, + bcmpkt_txpmd_cpu_tx_ecmp_member_id_get, + bcmpkt_txpmd_cpu_tx_destination_get, + bcmpkt_txpmd_cpu_tx_destination_type_get, + bcmpkt_txpmd_cpu_tx_dp_get, + bcmpkt_txpmd_cpu_tx_input_pri_get, + bcmpkt_txpmd_cpu_tx_int_cn_get, + bcmpkt_txpmd_cpu_tx_int_pri_get, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get, + bcmpkt_txpmd_cpu_tx_pkt_profile_get, + bcmpkt_txpmd_cpu_tx_qos_fields_vld_get, + bcmpkt_txpmd_cpu_tx_routed_pkt_get, + NULL, + NULL, + bcmpkt_txpmd_cpu_tx_vrf_get, + bcmpkt_txpmd_cpu_tx_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm78900_b0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cell_error_set, + NULL, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + NULL, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cng_set, + bcmpkt_txpmd_destination_set, + bcmpkt_txpmd_destination_type_set, + bcmpkt_txpmd_wred_mark_eligible_set, + bcmpkt_txpmd_wred_response_set, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_set, + bcmpkt_txpmd_cpu_tx_ecmp_member_id_set, + bcmpkt_txpmd_cpu_tx_destination_set, + bcmpkt_txpmd_cpu_tx_destination_type_set, + bcmpkt_txpmd_cpu_tx_dp_set, + bcmpkt_txpmd_cpu_tx_input_pri_set, + bcmpkt_txpmd_cpu_tx_int_cn_set, + bcmpkt_txpmd_cpu_tx_int_pri_set, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set, + bcmpkt_txpmd_cpu_tx_pkt_profile_set, + bcmpkt_txpmd_cpu_tx_qos_fields_vld_set, + bcmpkt_txpmd_cpu_tx_routed_pkt_set, + NULL, + NULL, + bcmpkt_txpmd_cpu_tx_vrf_set, + bcmpkt_txpmd_cpu_tx_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm78900_b0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm78900_b0_txpmd_view_types[] = { + {"sobmh_from_cpu", 1}, + {"cpu_tx", 2}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm78900_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -2, -2, -2, -2, -2, 1, -2, 1, 1, 1, 1, 1, -2, 1, + 1, 1, 1, 1, 1, 1, 1, -2, -2, -2, -2, -2, -2, -2, 1, 1, + 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, -2, + -2, 2, 2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm78900_b0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm78900_b0_txpmd_view_infos; + info->view_types = bcm78900_b0_txpmd_view_types; + info->view_type_get = bcmpkt_txpmd_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c new file mode 100644 index 000000000000..fe93b2a63e3f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c @@ -0,0 +1,347 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides LBHDR access functions for BCM78905_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: LBHDR + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 16, 3, val); +} + +static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 16, 3); + return val; +} + +static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 13, 1, val); +} + +static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 13, 1); + return val; +} + +static void bcmpkt_lbhdr_pp_port_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 21, 9, val); +} + +static uint32_t bcmpkt_lbhdr_pp_port_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 21, 9); + return val; +} + +static void bcmpkt_lbhdr_routed_pkt_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 15, 1, val); +} + +static uint32_t bcmpkt_lbhdr_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 15, 1); + return val; +} + +static void bcmpkt_lbhdr_vrf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 2, 13, val); +} + +static uint32_t bcmpkt_lbhdr_vrf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 2, 13); + return val; +} + +static void bcmpkt_lbhdr_vrf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[2], 14, 1, val); +} + +static uint32_t bcmpkt_lbhdr_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[2], 14, 1); + return val; +} + +static void bcmpkt_lbhdr_qos_field_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[1], 19, 1, val); +} + +static uint32_t bcmpkt_lbhdr_qos_field_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[1], 19, 1); + return val; +} + +static void bcmpkt_lbhdr_opaque_object_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 8, 4, val); +} + +static uint32_t bcmpkt_lbhdr_opaque_object_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 8, 4); + return val; +} + +static void bcmpkt_lbhdr_qos_field_eth_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 12, 8, val); +} + +static uint32_t bcmpkt_lbhdr_qos_field_eth_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 12, 8); + return val; +} + +static void bcmpkt_lbhdr_int_pri_eth_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 12, 4, val); +} + +static uint32_t bcmpkt_lbhdr_int_pri_eth_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 12, 4); + return val; +} + +static void bcmpkt_lbhdr_int_cn_eth_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 16, 2, val); +} + +static uint32_t bcmpkt_lbhdr_int_cn_eth_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 16, 2); + return val; +} + +static void bcmpkt_lbhdr_cng_eth_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 18, 2, val); +} + +static uint32_t bcmpkt_lbhdr_cng_eth_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 18, 2); + return val; +} + +static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_lbhdr_fget_t bcm78905_a0_lbhdr_fget = { + { + bcmpkt_lbhdr_start_get, + bcmpkt_lbhdr_header_type_get, + NULL, + bcmpkt_lbhdr_pkt_profile_get, + bcmpkt_lbhdr_visibility_pkt_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_lbhdr_pp_port_get, + bcmpkt_lbhdr_routed_pkt_get, + bcmpkt_lbhdr_vrf_get, + bcmpkt_lbhdr_vrf_valid_get, + bcmpkt_lbhdr_qos_field_valid_get, + bcmpkt_lbhdr_opaque_object_get, + bcmpkt_lbhdr_qos_field_eth_get, + bcmpkt_lbhdr_int_pri_eth_get, + bcmpkt_lbhdr_int_cn_eth_get, + bcmpkt_lbhdr_cng_eth_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_fset_t bcm78905_a0_lbhdr_fset = { + { + bcmpkt_lbhdr_start_set, + bcmpkt_lbhdr_header_type_set, + NULL, + bcmpkt_lbhdr_pkt_profile_set, + bcmpkt_lbhdr_visibility_pkt_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_lbhdr_pp_port_set, + bcmpkt_lbhdr_routed_pkt_set, + bcmpkt_lbhdr_vrf_set, + bcmpkt_lbhdr_vrf_valid_set, + bcmpkt_lbhdr_qos_field_valid_set, + bcmpkt_lbhdr_opaque_object_set, + bcmpkt_lbhdr_qos_field_eth_set, + bcmpkt_lbhdr_int_pri_eth_set, + bcmpkt_lbhdr_int_cn_eth_set, + bcmpkt_lbhdr_cng_eth_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_lbhdr_figet_t bcm78905_a0_lbhdr_figet = { + { + bcmpkt_lbhdr_i_size_get + } +}; + +static shr_enum_map_t bcm78905_a0_lbhdr_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm78905_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { + -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, +}; + + +void bcm78905_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm78905_a0_lbhdr_view_infos; + info->view_types = bcm78905_a0_lbhdr_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c new file mode 100644 index 000000000000..142b28438c95 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c @@ -0,0 +1,1124 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides RXPMD access functions for BCM78905_A0. + * + ******************************************************************************/ + +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: RXPMD + * BLOCKS: + * SIZE: 416 + ******************************************************************************/ +static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 22, 1, val); +} + +static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 22, 1); + return val; +} + +static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 26, 6, val); +} + +static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 26, 6); + return val; +} + +static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 26, 6, val); +} + +static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 26, 6); + return val; +} + +static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 16, 12, val); +} + +static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 16, 12); + return val; +} + +static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 3, 14, val); +} + +static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 3, 14); + return val; +} + +static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 22, 9, val); +} + +static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 22, 9); + return val; +} + +static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 3, 12, val); +} + +static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 3, 12); + return val; +} + +static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 0, 3, val); +} + +static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 0, 3); + return val; +} + +static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 6, 3, val); +} + +static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 6, 3); + return val; +} + +static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 2, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 2, 1); + return val; +} + +static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 6, 6, val); +} + +static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 6, 6); + return val; +} + +static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 3, 1, val); +} + +static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 3, 1); + return val; +} + +static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 12, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 12, 2); + return val; +} + +static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) +{ + data[5] = val; +} + +static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) +{ + uint32_t val; + val = data[5]; + return val; +} + +static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 0, 16, val); +} + +static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 0, 16); + return val; +} + +static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 28, 3, val); +} + +static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 28, 3); + return val; +} + +static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 1, 1, val); +} + +static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 1, 1); + return val; +} + +static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 15, 1, val); +} + +static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 15, 1); + return val; +} + +static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 14, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 14, 1); + return val; +} + +static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 21, 1, val); +} + +static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 21, 1); + return val; +} + +static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 31, 1, val); +} + +static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 31, 1); + return val; +} + +static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 1, 2, val); +} + +static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 1, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 0, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 0, 1); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 18, 8, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 18, 8); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 16, 2, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 16, 2); + return val; +} + +static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 4, 12, val); +} + +static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 4, 12); + return val; +} + +static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 0, 4, val); +} + +static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 0, 4); + return val; +} + +static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 5, 1, val); +} + +static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 5, 1); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 16, 4, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 16, 4); + return val; +} + +static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 4, 12, val); +} + +static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 4, 12); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 4, 13, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 4, 13); + return val; +} + +static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 0, 1, val); +} + +static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 0, 1); + return val; +} + +static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[6], 1, 20, val); +} + +static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[6], 1, 20); + return val; +} + +static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 17, 4, val); +} + +static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 17, 4); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 4, 1, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 4, 1); + return val; +} + +static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 25, 7, val); +} + +static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 25, 7); + return val; +} + +static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[7], 15, 17, val); +} + +static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[7], 15, 17); + return val; +} + +static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 23, 2, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 23, 2); + return val; +} + +static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[10], 20, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[10], 20, 1); + return val; +} + +static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[9], 17, 15, val); +} + +static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[9], 17, 15); + return val; +} + +static void bcmpkt_rxpmd_incoming_opaque_tag_status_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[8], 0, 1, val); +} + +static uint32_t bcmpkt_rxpmd_incoming_opaque_tag_status_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[8], 0, 1); + return val; +} + +static void bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[4], 16, 1, val); +} + +static uint32_t bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[4], 16, 1); + return val; +} + +static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 13; +} + +static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 11; + return 2; +} + +static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) +{ + *addr = data + 0; + return 4; +} + +/******************************************************************************* + * SWFORMAT: RX_REASON + * BLOCKS: + * SIZE: 46 + ******************************************************************************/ +void bcm78905_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON)) { + data[1] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { + data[1] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { + data[1] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { + data[1] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { + data[1] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { + data[1] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { + data[1] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { + data[1] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { + data[1] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { + data[1] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { + data[1] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { + data[1] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { + data[1] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { + data[1] |= (0x1 << 13); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { + data[1] |= (0x1 << 14); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { + data[1] |= (0x1 << 15); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC)) { + data[1] |= (0x1 << 16); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST)) { + data[1] |= (0x1 << 17); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { + data[1] |= (0x1 << 18); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { + data[1] |= (0x1 << 19); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { + data[1] |= (0x1 << 20); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { + data[1] |= (0x1 << 21); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK)) { + data[1] |= (0x1 << 22); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS)) { + data[1] |= (0x1 << 23); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION)) { + data[1] |= (0x1 << 24); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD)) { + data[1] |= (0x1 << 25); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { + data[1] |= (0x1 << 26); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { + data[1] |= (0x1 << 27); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { + data[1] |= (0x1 << 28); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { + data[1] |= (0x1 << 29); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { + data[1] |= (0x1 << 30); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { + data[1] |= (0x1 << 31); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { + data[0] |= (0x1 << 0); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { + data[0] |= (0x1 << 1); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { + data[0] |= (0x1 << 2); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { + data[0] |= (0x1 << 3); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { + data[0] |= (0x1 << 4); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { + data[0] |= (0x1 << 5); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { + data[0] |= (0x1 << 6); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX)) { + data[0] |= (0x1 << 7); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { + data[0] |= (0x1 << 8); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { + data[0] |= (0x1 << 9); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { + data[0] |= (0x1 << 10); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { + data[0] |= (0x1 << 11); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { + data[0] |= (0x1 << 12); + } + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH)) { + data[0] |= (0x1 << 13); + } +} + +void bcm78905_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON); + } + if (data[1] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); + } + if (data[1] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); + } + if (data[1] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); + } + if (data[1] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); + } + if (data[1] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); + } + if (data[1] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); + } + if (data[1] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); + } + if (data[1] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); + } + if (data[1] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); + } + if (data[1] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); + } + if (data[1] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); + } + if (data[1] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); + } + if (data[1] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); + } + if (data[1] & (0x1 << 14)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); + } + if (data[1] & (0x1 << 15)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); + } + if (data[1] & (0x1 << 16)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC); + } + if (data[1] & (0x1 << 17)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST); + } + if (data[1] & (0x1 << 18)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); + } + if (data[1] & (0x1 << 19)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); + } + if (data[1] & (0x1 << 20)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); + } + if (data[1] & (0x1 << 21)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); + } + if (data[1] & (0x1 << 22)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK); + } + if (data[1] & (0x1 << 23)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS); + } + if (data[1] & (0x1 << 24)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION); + } + if (data[1] & (0x1 << 25)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD); + } + if (data[1] & (0x1 << 26)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); + } + if (data[1] & (0x1 << 27)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); + } + if (data[1] & (0x1 << 28)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); + } + if (data[1] & (0x1 << 29)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); + } + if (data[1] & (0x1 << 30)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); + } + if (data[1] & (0x1 << 31)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); + } + if (data[0] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); + } + if (data[0] & (0x1 << 1)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); + } + if (data[0] & (0x1 << 2)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); + } + if (data[0] & (0x1 << 3)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); + } + if (data[0] & (0x1 << 4)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); + } + if (data[0] & (0x1 << 5)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); + } + if (data[0] & (0x1 << 6)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); + } + if (data[0] & (0x1 << 7)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX); + } + if (data[0] & (0x1 << 8)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); + } + if (data[0] & (0x1 << 9)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); + } + if (data[0] & (0x1 << 10)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); + } + if (data[0] & (0x1 << 11)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); + } + if (data[0] & (0x1 << 12)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); + } + if (data[0] & (0x1 << 13)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH); + } +} + +/******************************************************************************* + * SWFORMAT: EP_RX_REASON + * BLOCKS: + * SIZE: 64 + ******************************************************************************/ +void bcm78905_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) +{ + if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_EP_CTC)) { + data[1] |= (0x1 << 0); + } +} + +void bcm78905_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) +{ + uint32_t val; + COMPILER_REFERENCE(val); + if (data[1] & (0x1 << 0)) { + BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_EP_CTC); + } +} + +const bcmpkt_rxpmd_fget_t bcm78905_a0_rxpmd_fget = { + { + bcmpkt_rxpmd_unicast_queue_get, + bcmpkt_rxpmd_queue_num_get, + bcmpkt_rxpmd_cpu_cos_get, + NULL, + bcmpkt_rxpmd_matched_rule_get, + bcmpkt_rxpmd_pkt_length_get, + bcmpkt_rxpmd_src_port_num_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_get, + bcmpkt_rxpmd_outer_cfi_get, + bcmpkt_rxpmd_outer_pri_get, + bcmpkt_rxpmd_special_packet_indicator_get, + bcmpkt_rxpmd_special_packet_type_get, + bcmpkt_rxpmd_change_dscp_get, + bcmpkt_rxpmd_dscp_get, + bcmpkt_rxpmd_change_ecn_get, + bcmpkt_rxpmd_ecn_get, + NULL, + bcmpkt_rxpmd_timestamp_get, + bcmpkt_rxpmd_timestamp_hi_get, + bcmpkt_rxpmd_mtp_index_get, + bcmpkt_rxpmd_bpdu_get, + NULL, + bcmpkt_rxpmd_l3only_get, + bcmpkt_rxpmd_ip_routed_get, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_get, + bcmpkt_rxpmd_switch_get, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_get, + bcmpkt_rxpmd_ing_tag_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_get, + bcmpkt_rxpmd_rx_bfd_start_offset_type_get, + bcmpkt_rxpmd_rx_bfd_session_index_get, + bcmpkt_rxpmd_reason_type_get, + bcmpkt_rxpmd_do_not_change_ttl_get, + bcmpkt_rxpmd_i2e_classid_type_get, + bcmpkt_rxpmd_i2e_classid_get, + bcmpkt_rxpmd_ing_l3_intf_get, + NULL, + bcmpkt_rxpmd_regen_crc_get, + bcmpkt_rxpmd_entropy_label_get, + bcmpkt_rxpmd_tunnel_decap_type_get, + bcmpkt_rxpmd_dlb_id_valid_get, + bcmpkt_rxpmd_dlb_id_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_get, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_get, + bcmpkt_rxpmd_o_nhi_get, + NULL, + NULL, + bcmpkt_rxpmd_incoming_opaque_tag_status_get, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_fset_t bcm78905_a0_rxpmd_fset = { + { + bcmpkt_rxpmd_unicast_queue_set, + bcmpkt_rxpmd_queue_num_set, + bcmpkt_rxpmd_cpu_cos_set, + NULL, + bcmpkt_rxpmd_matched_rule_set, + bcmpkt_rxpmd_pkt_length_set, + bcmpkt_rxpmd_src_port_num_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_outer_vid_set, + bcmpkt_rxpmd_outer_cfi_set, + bcmpkt_rxpmd_outer_pri_set, + bcmpkt_rxpmd_special_packet_indicator_set, + bcmpkt_rxpmd_special_packet_type_set, + bcmpkt_rxpmd_change_dscp_set, + bcmpkt_rxpmd_dscp_set, + bcmpkt_rxpmd_change_ecn_set, + bcmpkt_rxpmd_ecn_set, + NULL, + bcmpkt_rxpmd_timestamp_set, + bcmpkt_rxpmd_timestamp_hi_set, + bcmpkt_rxpmd_mtp_index_set, + bcmpkt_rxpmd_bpdu_set, + NULL, + bcmpkt_rxpmd_l3only_set, + bcmpkt_rxpmd_ip_routed_set, + NULL, + NULL, + bcmpkt_rxpmd_uc_sw_copy_dropped_set, + bcmpkt_rxpmd_switch_set, + NULL, + NULL, + bcmpkt_rxpmd_ing_otag_action_set, + bcmpkt_rxpmd_ing_tag_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_rx_bfd_start_offset_set, + bcmpkt_rxpmd_rx_bfd_start_offset_type_set, + bcmpkt_rxpmd_rx_bfd_session_index_set, + bcmpkt_rxpmd_reason_type_set, + bcmpkt_rxpmd_do_not_change_ttl_set, + bcmpkt_rxpmd_i2e_classid_type_set, + bcmpkt_rxpmd_i2e_classid_set, + bcmpkt_rxpmd_ing_l3_intf_set, + NULL, + bcmpkt_rxpmd_regen_crc_set, + bcmpkt_rxpmd_entropy_label_set, + bcmpkt_rxpmd_tunnel_decap_type_set, + bcmpkt_rxpmd_dlb_id_valid_set, + bcmpkt_rxpmd_dlb_id_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_replication_or_nhop_index_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_incoming_int_hdr_type_set, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ing_l3_intf_valid_set, + bcmpkt_rxpmd_o_nhi_set, + NULL, + NULL, + bcmpkt_rxpmd_incoming_opaque_tag_status_set, + NULL, + NULL, + NULL, + NULL, + bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_rxpmd_figet_t bcm78905_a0_rxpmd_figet = { + { + bcmpkt_rxpmd_i_size_get, + bcmpkt_rxpmd_i_reason_get, + bcmpkt_rxpmd_i_module_hdr_get, + NULL + } +}; + +static shr_enum_map_t bcm78905_a0_rxpmd_view_types[] = { + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm78905_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { + -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -2, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, + -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, + -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, + -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, + -1, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2, +}; + + +void bcm78905_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm78905_a0_rxpmd_view_infos; + info->view_types = bcm78905_a0_rxpmd_view_types; + info->view_type_get = NULL; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c new file mode 100644 index 000000000000..464dcfde1975 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c @@ -0,0 +1,871 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides TXPMD access functions for BCM78905_A0. + * + ******************************************************************************/ + +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) +/******************************************************************************* + * SWFORMAT: TXPMD + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 30, 2, val); +} + +static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 30, 2); + return val; +} + +static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) +{ + WORD_FIELD_SET(data[0], 24, 6, val); +} + +static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) +{ + uint32_t val; + val = WORD_FIELD_GET(data[0], 24, 6); + return val; +} + +static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 0, 1, val); +} + +static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 1); + return val; +} + +static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 20, 8, val); +} + +static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 20, 8); + return val; +} + +static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 3, 6, val); +} + +static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 3, 6); + return val; +} + +static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 8, 4, val); +} + +static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 8, 4); + return val; +} + +static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 29, 1, val); +} + +static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 29, 1); + return val; +} + +static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 12, 3, val); +} + +static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 12, 3); + return val; +} + +static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 30, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 30, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 31, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 31, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 29, 1, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 29, 1); + return val; +} + +static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 0, 8); + return val; +} + +static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 28, 1, val); +} + +static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 28, 1); + return val; +} + +static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 19, 1, val); +} + +static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 19, 1); + return val; +} + +static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 17, 2, val); +} + +static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 17, 2); + return val; +} + +static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 15, 2, val); +} + +static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 15, 2); + return val; +} + +static void bcmpkt_txpmd_cng_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 1, 2, val); +} + +static uint32_t bcmpkt_txpmd_cng_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 1, 2); + return val; +} + +static void bcmpkt_txpmd_destination_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 9, 16, val); +} + +static uint32_t bcmpkt_txpmd_destination_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 9, 16); + return val; +} + +static void bcmpkt_txpmd_destination_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[3], 25, 4, val); +} + +static uint32_t bcmpkt_txpmd_destination_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[3], 25, 4); + return val; +} + +static void bcmpkt_txpmd_wred_mark_eligible_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 30, 1, val); +} + +static uint32_t bcmpkt_txpmd_wred_mark_eligible_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 30, 1); + return val; +} + +static void bcmpkt_txpmd_wred_response_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return; + } + WORD_FIELD_SET(data[2], 31, 1, val); +} + +static uint32_t bcmpkt_txpmd_wred_response_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { + return 0; + } + val = WORD_FIELD_GET(data[2], 31, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 0, 8, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 8); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_ecmp_member_id_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 0, 17, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_ecmp_member_id_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[3], 0, 17); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_destination_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[3], 17, 15, val & MASK(15)); + WORD_FIELD_SET(data[2], 0, 1, (val >> 15) & MASK(1)); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_destination_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = (WORD_FIELD_GET(data[3], 17, 15) | (WORD_FIELD_GET(data[2], 0, 1) << 15)) ; + return val; +} + +static void bcmpkt_txpmd_cpu_tx_destination_type_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 1, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_destination_type_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 1, 4); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_dp_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 5, 2, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_dp_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 5, 2); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_input_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 7, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_input_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 7, 4); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_int_cn_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 11, 2, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_int_cn_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 11, 2); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_int_pri_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 13, 4, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_int_pri_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 13, 4); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 17, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 17, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_pkt_profile_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 18, 3, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_pkt_profile_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 18, 3); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_qos_fields_vld_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 21, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_qos_fields_vld_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 21, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_routed_pkt_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 22, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_routed_pkt_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[2], 22, 1); + return val; +} + +static void bcmpkt_txpmd_cpu_tx_vrf_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[2], 23, 9, val & MASK(9)); + WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4)); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_vrf_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ; + return val; +} + +static void bcmpkt_txpmd_cpu_tx_vrf_valid_set(uint32_t *data, uint32_t val) +{ + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return; + } + WORD_FIELD_SET(data[1], 4, 1, val); +} + +static uint32_t bcmpkt_txpmd_cpu_tx_vrf_valid_get(uint32_t *data) +{ + uint32_t val; + if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { + return 0; + } + val = WORD_FIELD_GET(data[1], 4, 1); + return val; +} + +static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) +{ + return 4; +} + + +const bcmpkt_txpmd_fget_t bcm78905_a0_txpmd_fget = { + { + bcmpkt_txpmd_start_get, + bcmpkt_txpmd_header_type_get, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cell_error_get, + NULL, + bcmpkt_txpmd_src_modid_get, + bcmpkt_txpmd_cos_get, + bcmpkt_txpmd_input_pri_get, + bcmpkt_txpmd_unicast_get, + bcmpkt_txpmd_rqe_q_num_get, + NULL, + bcmpkt_txpmd_ieee1588_one_step_enable_get, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, + bcmpkt_txpmd_tx_ts_get, + bcmpkt_txpmd_spid_override_get, + bcmpkt_txpmd_spid_get, + bcmpkt_txpmd_spap_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cng_get, + bcmpkt_txpmd_destination_get, + bcmpkt_txpmd_destination_type_get, + bcmpkt_txpmd_wred_mark_eligible_get, + bcmpkt_txpmd_wred_response_get, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_get, + bcmpkt_txpmd_cpu_tx_ecmp_member_id_get, + bcmpkt_txpmd_cpu_tx_destination_get, + bcmpkt_txpmd_cpu_tx_destination_type_get, + bcmpkt_txpmd_cpu_tx_dp_get, + bcmpkt_txpmd_cpu_tx_input_pri_get, + bcmpkt_txpmd_cpu_tx_int_cn_get, + bcmpkt_txpmd_cpu_tx_int_pri_get, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get, + bcmpkt_txpmd_cpu_tx_pkt_profile_get, + bcmpkt_txpmd_cpu_tx_qos_fields_vld_get, + bcmpkt_txpmd_cpu_tx_routed_pkt_get, + NULL, + NULL, + bcmpkt_txpmd_cpu_tx_vrf_get, + bcmpkt_txpmd_cpu_tx_vrf_valid_get, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_fset_t bcm78905_a0_txpmd_fset = { + { + bcmpkt_txpmd_start_set, + bcmpkt_txpmd_header_type_set, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cell_error_set, + NULL, + bcmpkt_txpmd_src_modid_set, + bcmpkt_txpmd_cos_set, + bcmpkt_txpmd_input_pri_set, + bcmpkt_txpmd_unicast_set, + bcmpkt_txpmd_rqe_q_num_set, + NULL, + bcmpkt_txpmd_ieee1588_one_step_enable_set, + bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, + bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, + bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, + bcmpkt_txpmd_tx_ts_set, + bcmpkt_txpmd_spid_override_set, + bcmpkt_txpmd_spid_set, + bcmpkt_txpmd_spap_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + bcmpkt_txpmd_cng_set, + bcmpkt_txpmd_destination_set, + bcmpkt_txpmd_destination_type_set, + bcmpkt_txpmd_wred_mark_eligible_set, + bcmpkt_txpmd_wred_response_set, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_set, + bcmpkt_txpmd_cpu_tx_ecmp_member_id_set, + bcmpkt_txpmd_cpu_tx_destination_set, + bcmpkt_txpmd_cpu_tx_destination_type_set, + bcmpkt_txpmd_cpu_tx_dp_set, + bcmpkt_txpmd_cpu_tx_input_pri_set, + bcmpkt_txpmd_cpu_tx_int_cn_set, + bcmpkt_txpmd_cpu_tx_int_pri_set, + bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set, + bcmpkt_txpmd_cpu_tx_pkt_profile_set, + bcmpkt_txpmd_cpu_tx_qos_fields_vld_set, + bcmpkt_txpmd_cpu_tx_routed_pkt_set, + NULL, + NULL, + bcmpkt_txpmd_cpu_tx_vrf_set, + bcmpkt_txpmd_cpu_tx_vrf_valid_set, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL + } +}; + + +const bcmpkt_txpmd_figet_t bcm78905_a0_txpmd_figet = { + { + bcmpkt_txpmd_i_size_get + } +}; + +static shr_enum_map_t bcm78905_a0_txpmd_view_types[] = { + {"sobmh_from_cpu", 1}, + {"cpu_tx", 2}, + {NULL, -1}, +}; + +/* -2: unsupported, -1: global, others: view's value */ +static int bcm78905_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { + -1, -1, -2, -2, -2, -2, -2, 1, -2, 1, 1, 1, 1, 1, -2, 1, + 1, 1, 1, 1, 1, 1, 1, -2, -2, -2, -2, -2, -2, -2, 1, 1, + 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, -2, + -2, 2, 2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, + -2, -2, -2, +}; + + +void bcm78905_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) +{ + info->view_infos = bcm78905_a0_txpmd_view_infos; + info->view_types = bcm78905_a0_txpmd_view_types; + info->view_type_get = bcmpkt_txpmd_header_type_get; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c new file mode 100644 index 000000000000..8275ed5433b7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c @@ -0,0 +1,516 @@ +/*! \file bcmpkt_flexhdr.c + * + * Flexhdr access interface. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include +#include +#include +#include + + +/* Define stub functions for base variant. */ +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ +bcmpkt_flex_pmd_info_t * _bc##_flex_pmd_info_get(uint32_t hid) {return NULL;} +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ +shr_enum_map_t * _bc##_flexhdr_map_get(void) {return NULL;} +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + int _bc##_flexhdr_variant_support_map[] = {-1, -1, -1, -1}; +#define BCMDRD_DEVLIST_OVERRIDE +#include + +/* Array of device variant specific data */ +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \ + &_bd##_vu##_va##_flex_pmd_info_get, +static bcmpkt_flex_pmd_info_t * (*flex_pmd_info_get[])(uint32_t hid) = { + NULL, +#include + NULL +}; + +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \ + &_bd##_vu##_va##_flexhdr_map_get, +static shr_enum_map_t * (*flexhdr_map_get[])(void) = { + NULL, +#include + NULL +}; + +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \ + &_bd##_vu##_va##_flexhdr_variant_support_map[0], + +int *bcmpkt_flexhdr_variant_support_map[] = { + NULL, +#include + NULL +}; + + +int +bcmpkt_flexhdr_header_id_get(bcmlrd_variant_t variant, + char *name, uint32_t *hid) +{ + shr_enum_map_t *id_map = NULL; + + if ((name == NULL) || (hid == NULL)) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + id_map = flexhdr_map_get[variant](); + if (id_map == NULL) { + return SHR_E_UNAVAIL; + } + while (sal_strcasecmp(id_map->name, "flexhdr count") != 0 ) { + if (sal_strcasecmp(id_map->name, name) == 0) { + *hid = id_map->val; + return SHR_E_NONE; + } + id_map++; + } + + return SHR_E_UNAVAIL; +} + +int +bcmpkt_flexhdr_is_supported(bcmlrd_variant_t variant, uint32_t hid, + bool *is_supported) +{ + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + + if (is_supported == NULL) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + *is_supported = pmd_info->is_supported; + + return SHR_E_NONE; +} + +int +bcmpkt_flexhdr_field_get(bcmlrd_variant_t variant, uint32_t hid, + uint32_t *flexhdr, int profile, int fid, uint32_t *val) +{ + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + bcmpkt_flex_field_metadata_t *fld_info = NULL; + + if ((flexhdr == NULL) || (val == NULL)) { + return SHR_E_PARAM; + } + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->field_info == NULL) { + return SHR_E_UNAVAIL; + } + if (fid <= BCMPKT_FID_INVALID || fid >= pmd_info->field_info->num_fields) { + return SHR_E_PARAM; + } + + if (pmd_info->flex_fget != NULL) { + if (pmd_info->flex_fget[fid] == NULL) { + return SHR_E_UNAVAIL; + } + return (pmd_info->flex_fget[fid])(flexhdr, profile, val); + } else if (pmd_info->flex_common_fget != NULL) { + fld_info = &pmd_info->field_info->info[fid]; + return (pmd_info->flex_common_fget)(flexhdr, fld_info, profile, val); + } else { + return SHR_E_UNAVAIL; + } + + return SHR_E_NONE; +} + +int +bcmpkt_flexhdr_field_set(bcmlrd_variant_t variant, uint32_t hid, + uint32_t *flexhdr, int profile, int fid, uint32_t val) +{ + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + bcmpkt_flex_field_metadata_t *fld_info = NULL; + + if (flexhdr == NULL) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->field_info == NULL) { + return SHR_E_UNAVAIL; + } + if (fid <= BCMPKT_FID_INVALID || fid >= pmd_info->field_info->num_fields) { + return SHR_E_PARAM; + } + + if (pmd_info->flex_fset != NULL) { + if (pmd_info->flex_fset[fid] == NULL) { + return SHR_E_UNAVAIL; + } + return (pmd_info->flex_fset[fid])(flexhdr, profile, val); + } else if (pmd_info->flex_common_fset != NULL) { + fld_info = &pmd_info->field_info->info[fid]; + return (pmd_info->flex_common_fset)(flexhdr, fld_info, profile, val); + } else { + return SHR_E_UNAVAIL; + } + + return SHR_E_NONE; +} + +int +bcmpkt_flexhdr_field_name_get(bcmlrd_variant_t variant, uint32_t hid, + int fid, char **name) +{ + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + + if (name == NULL) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->field_info == NULL) { + return SHR_E_UNAVAIL; + } + if (fid <= BCMPKT_FID_INVALID || fid >= pmd_info->field_info->num_fields) { + return SHR_E_PARAM; + } + + if (pmd_info->field_info->info == NULL) { + return SHR_E_UNAVAIL; + } + *name = pmd_info->field_info->info[fid].name; + + return SHR_E_NONE; +} + +int +bcmpkt_flexhdr_field_id_get(bcmlrd_variant_t variant, uint32_t hid, + char *name, int *fid) +{ + int i; + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + + if ((name == NULL) || (fid == NULL)) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->field_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->field_info->info == NULL) { + return SHR_E_UNAVAIL; + } + + for (i = BCMPKT_FID_INVALID + 1; i < pmd_info->field_info->num_fields; i++) { + if (sal_strcasecmp(pmd_info->field_info->info[i].name, name) == 0) { + *fid = pmd_info->field_info->info[i].fid; + return SHR_E_NONE; + } + } + + return SHR_E_NOT_FOUND; +} + +int +bcmpkt_flexhdr_field_info_get(bcmlrd_variant_t variant, uint32_t hid, + bcmpkt_flex_field_info_t *info) +{ + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + + if (info == NULL) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->field_info == NULL) { + return SHR_E_UNAVAIL; + } + + *info = *(pmd_info->field_info); + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_flex_reasons_get(bcmlrd_variant_t variant, + uint32_t *rxpmd_flex, bcmpkt_bitmap_t *reasons) +{ + int32_t ret = SHR_E_NONE; + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + uint32_t hid; + + if ((rxpmd_flex == NULL) || (reasons == NULL)) { + return SHR_E_PARAM; + } + + ret = bcmpkt_flexhdr_header_id_get(variant, "RXPMD_FLEX_T", &hid); + if (ret < 0) { + return ret; + } + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->reasons_info == NULL) { + return SHR_E_UNAVAIL; + } + + SHR_BITCLR_RANGE + (((*reasons).pbits), 0, pmd_info->reasons_info->num_reasons); + pmd_info->reasons_info->reason_decode (rxpmd_flex, reasons); + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_flex_reasons_set(bcmlrd_variant_t variant, + bcmpkt_bitmap_t *reasons, uint32_t *rxpmd_flex) +{ + int32_t ret = SHR_E_NONE; + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + uint32_t hid; + + if ((rxpmd_flex == NULL) || (reasons == NULL)) { + return SHR_E_PARAM; + } + + ret = bcmpkt_flexhdr_header_id_get(variant, "RXPMD_FLEX_T", &hid); + if (ret < 0) { + return ret; + } + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->reasons_info == NULL) { + return SHR_E_UNAVAIL; + } + + + pmd_info->reasons_info->reason_encode(reasons, rxpmd_flex); + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_flex_reason_name_get(bcmlrd_variant_t variant, + int reason, char **name) +{ + int32_t ret = SHR_E_NONE; + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + uint32_t hid; + + if (name == NULL) { + return SHR_E_PARAM; + } + + ret = bcmpkt_flexhdr_header_id_get(variant, "RXPMD_FLEX_T", &hid); + if (ret < 0) { + return ret; + } + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->reasons_info == NULL) { + return SHR_E_UNAVAIL; + } + + + if (reason <= 0 || + reason > pmd_info->reasons_info->num_reasons) { + return SHR_E_PARAM; + } + + if (pmd_info->reasons_info->reason_names == NULL) { + return SHR_E_UNAVAIL; + } + *name = pmd_info->reasons_info->reason_names[reason].name; + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_flex_reason_max_get(bcmlrd_variant_t variant, uint32_t *num) +{ + int32_t ret = SHR_E_NONE; + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + uint32_t hid; + + if (num == NULL) { + return SHR_E_PARAM ; + } + + ret = bcmpkt_flexhdr_header_id_get(variant, "RXPMD_FLEX_T", &hid); + if (ret < 0) { + return ret; + } + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->reasons_info == NULL) { + return SHR_E_UNAVAIL; + } + + *num = pmd_info->reasons_info->num_reasons; + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_flex_reason_id_get(bcmlrd_variant_t variant, + char *name, int *rid) +{ + int32_t ret = SHR_E_NONE; + bcmpkt_flex_pmd_info_t *pmd_info = NULL; + int i; + uint32_t hid; + + if ((name == NULL) || (rid == NULL)) { + return SHR_E_PARAM; + } + + ret = bcmpkt_flexhdr_header_id_get(variant, "RXPMD_FLEX_T", &hid); + if (ret < 0) { + return ret; + } + if (flex_pmd_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + pmd_info = flex_pmd_info_get[variant](hid); + if (pmd_info == NULL) { + return SHR_E_UNAVAIL; + } + if (pmd_info->reasons_info == NULL) { + return SHR_E_UNAVAIL; + } + + if (pmd_info->reasons_info->reason_names == NULL) { + return SHR_E_UNAVAIL; + } + for (i = 0; i < pmd_info->reasons_info->num_reasons; i++) { + if (sal_strcasecmp(pmd_info->reasons_info->reason_names[i].name, + name) == 0) { + *rid = pmd_info->reasons_info->reason_names[i].val; + return SHR_E_NONE; + } + } + + return SHR_E_NOT_FOUND; +} + +int * +bcmpkt_flexhdr_support_map_get(bcmlrd_variant_t variant) +{ + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return NULL; + } + + return bcmpkt_flexhdr_variant_support_map[variant]; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h new file mode 100644 index 000000000000..515f87566f28 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h @@ -0,0 +1,351 @@ +/*! \file bcmpkt_flexhdr.h + * + * Flexhdr access interface. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_FLEXHDR_H +#define BCMPKT_FLEXHDR_H + +#include +#include +#include +#include +#include +#include +#include + +/*! Invalid profile ID. */ +#define BCMPKT_FLEXHDR_PROFILE_NONE -1 + +/*! Max profile count. */ +#define BCMPKT_FLEXHDR_PROFILE_MAX 64 + +/*! CELL Error status bitmap. */ +#define BCMPKT_RXFLEXMETA_ST_CELL_ERROR (0x1 << 18) + +/*! + * \name Packet FLEX reason utility macros. + * \anchor BCMPKT_RXPMD_FLEX_REASON_OPS + */ +/*! \{ */ +/*! + * Macro to check if a reason is included in a + * set of reasons (\ref bcmpkt_bitmap_t). Returns: + * zero => reason is not included in the set + * non-zero => reason is included in the set + */ +#define BCMPKT_RXPMD_FLEX_REASON_GET(_reasons, _reason) \ + SHR_BITGET(((_reasons).pbits), (_reason)) + +/*! + * Macro to add a reason to a set of + * reasons (\ref bcmpkt_bitmap_t) + */ +#define BCMPKT_RXPMD_FLEX_REASON_SET(_reasons, _reason) \ + SHR_BITSET(((_reasons).pbits), (_reason)) + +/*! + * Macro to clear a reason from a set of + * reasons (\ref bcmpkt_bitmap_t) + */ +#define BCMPKT_RXPMD_FLEX_REASON_CLEAR(_reasons, _reason) \ + SHR_BITCLR(((_reasons).pbits), (_reason)) + +/*! + * Macro to add all reasons to a set of reasons. + */ +#define BCMPKT_RXPMD_FLEX_REASON_SET_ALL(_reasons, _count) \ + SHR_BITSET_RANGE(((_reasons).pbits), 0, _count) + +/*! + * Macro to check for no reason. + */ +#define BCMPKT_RXPMD_FLEX_REASON_IS_NULL(_reasons, _count) \ + SHR_BITNULL_RANGE(((_reasons).pbits), 0, _count) + +/*! + * Macro to get reasons number. + */ +#define BCMPKT_RXPMD_FLEX_REASONS_COUNT(_reasons, _count, _reason_count) \ + SHR_BITCOUNT_RANGE(((_reasons).pbits), _count, 0, _reason_count) + +/*! + * Macro to compare 2 reasons, return 1 for exact match. + */ +#define BCMPKT_RXPMD_FLEX_REASON_EQ(_reasons1, _reasons2, _count) \ + SHR_BITEQ_RANGE(((_reasons1).pbits), ((_reasons2).pbits), \ + 0, _count) +/*! \} */ + +/*! + * Flex header field profile info. + */ +typedef struct bcmpkt_flex_field_profile_s { + /*! Minbit in NPL header. */ + uint32_t minbit; + + /*! Maxbit in NPL header. */ + uint32_t maxbit; +} bcmpkt_flex_field_profile_t; + +/*! + * Flex header field data. + */ +typedef struct bcmpkt_flex_field_metadata_s { + /*! Field name. */ + char *name; + + /*! Field ID. */ + int fid; + + /*! Number of profiles defined in NPL. */ + int profile_cnt; + + /*! Field boundary for each profile defined in NPL. */ + bcmpkt_flex_field_profile_t profile[BCMPKT_FLEXHDR_PROFILE_MAX]; +} bcmpkt_flex_field_metadata_t; + +/*! + * Flex header field info structure. + */ +typedef struct bcmpkt_flex_field_info_s { + + /*! Number of header fields. */ + int num_fields; + + /*! Header field names. */ + bcmpkt_flex_field_metadata_t *info; + +} bcmpkt_flex_field_info_t; + +/*! RXPMD data update function pointer. */ +typedef int (*bcmpkt_rxpmd_data_set_f)( + int unit, + bcmpkt_flex_field_metadata_t *pmd_fld_info); + +/*! Process RXPMD entry. */ +typedef int (*bcmpkt_rxpmd_data_process_f)(int unit, uint64_t prof_id); + +/*! Update RXMPMD data from HW during warmboot. */ +typedef int (*bcmpkt_rxpmd_data_update_f)(int unit); + +/*! Array of RXPMD LT subscribe function pointers. */ +typedef struct bcmpkt_rxpmd_func_s { + /*! Set RXMPMD data. */ + bcmpkt_rxpmd_data_set_f rxpmd_data_set; + + /*! Process RXMPMD data flow entry. */ + bcmpkt_rxpmd_data_process_f rxpmd_data_flow; + + /*! Process RXMPMD data remap entry. */ + bcmpkt_rxpmd_data_process_f rxpmd_data_remap; + + /*! Update RXMPMD data from HW during warmboot. */ + bcmpkt_rxpmd_data_update_f rxpmd_data_update; +} bcmpkt_rxpmd_func_t; + +/*! Externs for the rxpmd functions. */ +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_rxpmd_func_t _bd##_rxpmd_func; +#include + +/*! + * \brief Get Header ID for a given flexhdr name. + * + * \param [in] variant Variant type. + * \param [in] name flexhdr name string. + * \param [out] hid flexhdr ID. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_NOT_FOUND Not found the name. + */ +extern int +bcmpkt_flexhdr_header_id_get(bcmlrd_variant_t variant, + char* name, uint32_t *hid); + + +/*! + * \brief Check if flexhdr is supported. + * + * \param [in] variant Variant type. + * \param [in] hid flexhdr ID. + * \param [out] is_supported Supported for flexhdr. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not supported. + */ +extern int +bcmpkt_flexhdr_is_supported(bcmlrd_variant_t variant, uint32_t hid, + bool *is_supported); + +/*! + * \brief Get field name for a given flexhdr field ID. + * + * \param [in] variant Variant type. + * \param [in] hid flexhdr ID. + * \param [in] fid flexhdr field ID. + * \param [out] name flexhdr field name string. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + */ +extern int +bcmpkt_flexhdr_field_name_get(bcmlrd_variant_t variant, uint32_t hid, + int fid, char **name); + +/*! + * \brief Get field ID for a given flexhdr field name. + * + * \param [in] variant Variant type. + * \param [in] hid flexhdr ID. + * \param [in] name flexhdr field name string. + * \param [out] fid flexhdr Field ID. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_NOT_FOUND Not found the name. + */ +extern int +bcmpkt_flexhdr_field_id_get(bcmlrd_variant_t variant, uint32_t hid, + char* name, int *fid); + +/*! + * \brief Get field info for a given flexhdr type. + * + * \param [in] variant Variant type. + * \param [in] hid flexhdr ID. + * \param [out] info field information. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_NOT_FOUND Not found the name. + */ +extern int +bcmpkt_flexhdr_field_info_get(bcmlrd_variant_t variant, uint32_t hid, + bcmpkt_flex_field_info_t *info); + +/*! + * \brief Get RX reasons from RXPMD_FLEX. + * + * Decode packet's RX reasons into "reasons". A received packet may have one RX + * reason, multiple RX reasons, or none reason. RX reasons are in the format of + * bitmap. Each bit means one reason type (refer to \ref BCMPKT_RX_REASON_XXX). + * + * User may use \ref BCMPKT_RXPMD_FLEX_REASON_OPS to parse each individual reason based + * on this function's return value "reasons". + * + * \param [in] variant Variant type. + * \param [in] rxpmd_flex RXPMD_FLEX handle. + * \param [out] reasons RX reasons in bit array. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support Reason. + * \retval SHR_E_INTERNAL Internal issue. + */ +extern int +bcmpkt_rxpmd_flex_reasons_get(bcmlrd_variant_t variant, uint32_t *rxpmd_flex, + bcmpkt_bitmap_t *reasons); + +/*! + * \brief Set RX reasons into the RXPMD_FLEX. (Internally used for filter configuration.) + * + * Set RX reasons into RXPMD_FLEX data for packet filter purpose. + * + * \param [in] variant Variant type. + * \param [in] reasons Reasons bit array. + * \param [in,out] rxpmd_flex RXPMD_FLEX handle. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support Reason. + * \retval SHR_E_INTERNAL Internal issue. + */ +extern int +bcmpkt_rxpmd_flex_reasons_set(bcmlrd_variant_t variant, + bcmpkt_bitmap_t *reasons, uint32_t *rxpmd_flex); + +/*! + * \brief Get an RX reason's name. + * + * \param [in] variant Variant type. + * \param [in] reason Reason ID. + * \param [out] name Reason name string handle. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + */ +extern int +bcmpkt_rxpmd_flex_reason_name_get(bcmlrd_variant_t variant, + int reason, char **name); + +/*! + * \brief Get max number of RX reason types. + * + * \param [in] variant Variant type. + * \param [out] num Maximum RX reason types. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + */ +extern int +bcmpkt_rxpmd_flex_reason_max_get(bcmlrd_variant_t variant, uint32_t *num); + +/*! + * \brief Get reason ID for a given RX reason name. + * + * \param [in] variant Variant type. + * \param [in] name Reason name string handle. + * \param [out] rid Reason ID. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_NOT_FOUND Not found the name. + */ +extern int +bcmpkt_rxpmd_flex_reason_id_get(bcmlrd_variant_t variant, + char* name, int *rid); + +/*! + * \brief Intialize RXPMD module + * + * \param [in] unit Device ID. + * \param [in] warm Warmboot flag. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNIT Incorrect unit. + */ +extern int +bcmpkt_flexhdr_init(int unit, bool warm); + +/*! + * \brief Cleanup RXPMD module + * + * \param [in] unit Device ID. + * + * \retval SHR_E_NONE success. + */ +extern int +bcmpkt_flexhdr_cleanup(int unit); + +#endif /* BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h new file mode 100644 index 000000000000..ebb60c4d14d6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h @@ -0,0 +1,100 @@ +/*! \file bcmpkt_flexhdr_field.h + * + * Flexhdr field access interface. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_FLEXHDR_FIELD_H +#define BCMPKT_FLEXHDR_FIELD_H + +/*! + * \brief Get value from a flexhdr field. + * + * \param [in] variant Variant type. + * \param [in] hid flexhdr ID. + * \param [in] flexhdr flexhdr handle. + * \param [in] profile Flexible data profile. + * \param [in] fid flexhdr field ID. + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_flexhdr_field_get(bcmlrd_variant_t variant, uint32_t hid, + uint32_t *flexhdr, int profile, int fid, uint32_t *val); + +/*! + * \brief Set value into a flexhdr field. + * + * \param [in] variant Variant type. + * \param [in] hid flexhdr ID. + * \param [in,out] flexhdr flexhdr handle. + * \param [in] profile Flexible data profile. + * \param [in] fid flexhdr field ID. + * \param [in] val Set value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_flexhdr_field_set(bcmlrd_variant_t variant, uint32_t hid, + uint32_t *flexhdr, int profile, int fid, uint32_t val); + +/*! + * \brief Get value from a flexhdr field. + * + * \param [in] unit Device unit number. + * \param [in] hid flexhdr ID. + * \param [in] flexhdr flexhdr handle. + * \param [in] profile Flexible data profile. + * \param [in] fid flexhdr field ID. + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_flexhdr_device_field_get(int unit, uint32_t hid, + uint32_t *flexhdr, int profile, int fid, + uint32_t *val); + +/*! + * \brief Set value into a flexhdr field. + * + * \param [in] unit Device unit number. + * \param [in] hid flexhdr ID. + * \param [in,out] flexhdr flexhdr handle. + * \param [in] profile Flexible data profile. + * \param [in] fid flexhdr field ID. + * \param [in] val Set value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_flexhdr_device_field_set(int unit, uint32_t hid, + uint32_t *flexhdr, int profile, int fid, + uint32_t val); + +#endif /* BCMPKT_FLEXHDR_FIELD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h new file mode 100644 index 000000000000..9948ab507842 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h @@ -0,0 +1,160 @@ +/*! \file bcmpkt_flexhdr_internal.h + * + * \brief Flex Packet MetaData internal library. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_FLEXHDR_INTERNAL_H +#define BCMPKT_FLEXHDR_INTERNAL_H + +#include +#include +#include + +/*! PMD types. + * This has to match the header IDs present in + * xfc_map_parser/hdr/header_map.yml file. + */ +/*! Generic loopback header type */ +#define BCMPKT_GENERIC_LOOPBACK_T 0 +/*! Higig 3 header type */ +#define BCMPKT_HG3_BASE_T 1 +/*! Higig3 extension 0 header type */ +#define BCMPKT_HG3_EXTENSION_0_T 2 +/*! RXPMD flex header type */ +#define BCMPKT_RXPMD_FLEX_T 3 +/*! Count of PMD types */ +#define BCMPKT_PMD_COUNT 4 + +/*! Get a flex field from a PMD buffer. */ +typedef int32_t (*bcmpkt_flex_field_get_f)(uint32_t *data, int profile, uint32_t *val); + +/*! Set a flex field within a PMD buffer. */ +typedef int32_t (*bcmpkt_flex_field_set_f)(uint32_t *data, int profile, uint32_t val); + +/*! Decode flex packet's RX reasons. */ +typedef void (*bcmpkt_flex_reason_decode_f) (uint32_t *data, bcmpkt_bitmap_t *reasons); + +/*! Encode flex packet's RX reasons */ +typedef void (*bcmpkt_flex_reason_encode_f) (bcmpkt_bitmap_t *reasons, uint32_t *data); + +/*! Get a flex field from a PMD buffer. */ +typedef int (*bcmpkt_flex_field_common_get_f)( + uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t *val); + +/*! Set a flex field from a PMD buffer. */ +typedef int (*bcmpkt_flex_field_common_set_f)( + uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t val); + +/*! + * \brief Flex Packet reasons information structure. + */ +typedef struct bcmpkt_flex_reasons_info_s { + /*! Number of reasons supported. */ + int num_reasons; + + /*! Reason names. */ + shr_enum_map_t *reason_names; + + /*! Encode RX reasons */ + bcmpkt_flex_reason_encode_f reason_encode; + + /*! Decode RX reasons */ + bcmpkt_flex_reason_decode_f reason_decode; + +} bcmpkt_flex_reasons_info_t; + +/*! + * \brief Flex Packet metadata information structure. + */ +typedef struct bcmpkt_flex_pmd_info_s { + + /*! Header field info. */ + bcmpkt_flex_field_info_t *field_info; + + /*! Header support */ + bool is_supported; + + /*! Flex reasons info */ + bcmpkt_flex_reasons_info_t *reasons_info; + + /*! Flex field get functions. */ + bcmpkt_flex_field_get_f *flex_fget; + + /*! Flex field set functions. */ + bcmpkt_flex_field_set_f *flex_fset; + + /*! Flex field common get functions. */ + bcmpkt_flex_field_common_get_f flex_common_fget; + + /*! Flex field common set functions. */ + bcmpkt_flex_field_common_set_f flex_common_fset; +} bcmpkt_flex_pmd_info_t; + +/*! \cond Externs for the required functions. */ +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \ + extern bcmpkt_flex_pmd_info_t * _bd##_vu##_va##_flex_pmd_info_get(uint32_t hid); +#define BCMLRD_VARIANT_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern bcmpkt_flex_pmd_info_t * _bc##_flex_pmd_info_get(uint32_t hid); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \ + extern shr_enum_map_t * _bd##_vu##_va##_flexhdr_map_get(void); +#define BCMLRD_VARIANT_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern shr_enum_map_t * _bc##_flexhdr_map_get(void); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \ + extern int _bd##_vu##_va##_flexhdr_variant_support_map[BCMPKT_PMD_COUNT]; +#define BCMLRD_VARIANT_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern int _bc##_flexhdr_variant_support_map[BCMPKT_PMD_COUNT]; +#define BCMDRD_DEVLIST_OVERRIDE +#include +/*! \endcond */ + +/*! + * \brief Get flex header support mapping for a given variant. + * + * \param [in] variant Variant type. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_NOT_FOUND Not found the name. + */ +extern int * +bcmpkt_flexhdr_support_map_get(bcmlrd_variant_t variant); + +#endif /* BCMPKT_FLEXHDR_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h new file mode 100644 index 000000000000..fd30ea26570d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h @@ -0,0 +1,49 @@ +/*! \file bcmpkt_hg3.h + * + * Common macros and definitions for Higig3 protocol + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_HG3_H +#define BCMPKT_HG3_H + +/* Note, ether type set to same value as reset value of R_GSH_ETHERTYPEr(700) */ +/*! Ethernet type used for Higig3 header */ +#define BCMPKT_HG3_ETHER_TYPE 0x2BC + +/*! Higig3 base header size (bytes). */ +#define BCMPKT_HG3_BASE_HEADER_SIZE_BYTES 8 +/*! Higig3 base header size (words). */ +#define BCMPKT_HG3_BASE_HEADER_SIZE_WORDS 2 + +/*! Higig3 extension 0 header size (bytes). */ +#define BCMPKT_HG3_EXT0_HEADER_SIZE_BYTES 8 +/*! Higig3 extension 0 header size (words). */ +#define BCMPKT_HG3_EXT0_HEADER_SIZE_WORDS 2 + +/*! Higig3 header size (bytes). Includes base and ext0 header */ +#define BCMPKT_HG3_SIZE_BYTES (BCMPKT_HG3_BASE_HEADER_SIZE_BYTES + \ + BCMPKT_HG3_EXT0_HEADER_SIZE_BYTES) +/*! Higig3 header size (words). Includes base and ext0 header */ +#define BCMPKT_HG3_SIZE_WORDS (BCMPKT_HG3_BASE_HEADER_SIZE_WORDS + \ + BCMPKT_HG3_EXT0_HEADER_SIZE_WORDS) + +/*! Higig3 extension 0 field max. */ +#define BCMPKT_HG3_EXT0_FID_MAX 32 +#endif /* BCMPKT_HG3_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h new file mode 100644 index 000000000000..4c6b90bb3eb4 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h @@ -0,0 +1,346 @@ +#ifndef BCMPKT_HIGIG_DEFS_H +#define BCMPKT_HIGIG_DEFS_H +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-chip.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides access macros for the HiGig module header. + * + ******************************************************************************/ + +#include + +/******************************************************************************* + * + * HIGIG DEFINITIONS BEGIN HERE + * + ******************************************************************************/ + + +/* Start of HiGig packet indicators */ +#define BCMPKT_HIGIG_SOF 0xfb +#define BCMPKT_HIGIG2_SOF 0xfc + + +/* HiGig module header size (in bytes) */ +#define BCMPKT_HIGIG_SIZE 12 +#define BCMPKT_HIGIG2_SIZE 16 + + +/* HiGig module header size (in words) */ +#define BCMPKT_HIGIG_WSIZE 3 +#define BCMPKT_HIGIG2_WSIZE 4 + + +/******************************************************************************* + * SWFORMAT: HIGIG + * BLOCKS: + * SIZE: 96 + ******************************************************************************/ +#define HIGIG_OFFSET 0x00000000 + +#define HIGIG_BLKACC () + +#define HIGIG_SIZE 12 + +/* + * This structure should be used to declare and program HIGIG. + * + */ +typedef union HIGIG_s { + uint32_t v[3]; + uint32_t higig[3]; + uint32_t _higig; +} HIGIG_t; + +#define HIGIG_CLR(r) sal_memset(&((r).higig[0]), 0, sizeof(HIGIG_t)) +#define HIGIG_SET(r,i,d) (r).higig[i] = d +#define HIGIG_GET(r,i) (r).higig[i] + +/* + * These macros can be used to access individual fields. + * + */ +#define HIGIG_VC_LABELf_GET(r) (((r).higig[2]) & 0xfffff) +#define HIGIG_VC_LABELf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0xfffff)) | (((uint32_t)f) & 0xfffff)) +#define HIGIG_CLASSIFICATION_TAGf_GET(r) ((((r).higig[2]) >> 16) & 0xffff) +#define HIGIG_CLASSIFICATION_TAGf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0xffff << 16)) | ((((uint32_t)f) & 0xffff) << 16)) +#define HIGIG_LABEL_PRESENTf_GET(r) ((((r).higig[2]) >> 20) & 0x1) +#define HIGIG_LABEL_PRESENTf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 20)) | ((((uint32_t)f) & 0x1) << 20)) +#define HIGIG_L3f_GET(r) ((((r).higig[2]) >> 21) & 0x1) +#define HIGIG_L3f_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 21)) | ((((uint32_t)f) & 0x1) << 21)) +#define HIGIG_DST_MODID_5f_GET(r) ((((r).higig[2]) >> 22) & 0x1) +#define HIGIG_DST_MODID_5f_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 22)) | ((((uint32_t)f) & 0x1) << 22)) +#define HIGIG_SRC_MODID_5f_GET(r) ((((r).higig[2]) >> 23) & 0x1) +#define HIGIG_SRC_MODID_5f_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 23)) | ((((uint32_t)f) & 0x1) << 23)) +#define HIGIG_MIRRORf_GET(r) ((((r).higig[2]) >> 24) & 0x1) +#define HIGIG_MIRRORf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 24)) | ((((uint32_t)f) & 0x1) << 24)) +#define HIGIG_MIRROR_DONEf_GET(r) ((((r).higig[2]) >> 25) & 0x1) +#define HIGIG_MIRROR_DONEf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 25)) | ((((uint32_t)f) & 0x1) << 25)) +#define HIGIG_MIRROR_ONLYf_GET(r) ((((r).higig[2]) >> 26) & 0x1) +#define HIGIG_MIRROR_ONLYf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 26)) | ((((uint32_t)f) & 0x1) << 26)) +#define HIGIG_INGRESS_TAGGEDf_GET(r) ((((r).higig[2]) >> 27) & 0x1) +#define HIGIG_INGRESS_TAGGEDf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 27)) | ((((uint32_t)f) & 0x1) << 27)) +#define HIGIG_DST_TGIDf_GET(r) ((((r).higig[2]) >> 28) & 0x7) +#define HIGIG_DST_TGIDf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x7 << 28)) | ((((uint32_t)f) & 0x7) << 28)) +#define HIGIG_DST_Tf_GET(r) ((((r).higig[2]) >> 31) & 0x1) +#define HIGIG_DST_Tf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31)) +#define HIGIG_DST_MODID_LSf_GET(r) (((r).higig[1]) & 0x1f) +#define HIGIG_DST_MODID_LSf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x1f)) | (((uint32_t)f) & 0x1f)) +#define HIGIG_CNGf_GET(r) ((((r).higig[1]) >> 5) & 0x1) +#define HIGIG_CNGf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x1 << 5)) | ((((uint32_t)f) & 0x1) << 5)) +#define HIGIG_HEADER_TYPEf_GET(r) ((((r).higig[1]) >> 6) & 0x3) +#define HIGIG_HEADER_TYPEf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x3 << 6)) | ((((uint32_t)f) & 0x3) << 6)) +#define HIGIG_PRIORITYf_GET(r) ((((r).higig[1]) >> 8) & 0x7) +#define HIGIG_PRIORITYf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x7 << 8)) | ((((uint32_t)f) & 0x7) << 8)) +#define HIGIG_DST_PORTf_GET(r) ((((r).higig[1]) >> 11) & 0x1f) +#define HIGIG_DST_PORTf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x1f << 11)) | ((((uint32_t)f) & 0x1f) << 11)) +#define HIGIG_SRC_PORT_TGIDf_GET(r) ((((r).higig[1]) >> 16) & 0x3f) +#define HIGIG_SRC_PORT_TGIDf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x3f << 16)) | ((((uint32_t)f) & 0x3f) << 16)) +#define HIGIG_PFMf_GET(r) ((((r).higig[1]) >> 22) & 0x3) +#define HIGIG_PFMf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x3 << 22)) | ((((uint32_t)f) & 0x3) << 22)) +#define HIGIG_OPCODEf_GET(r) ((((r).higig[1]) >> 24) & 0x7) +#define HIGIG_OPCODEf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x7 << 24)) | ((((uint32_t)f) & 0x7) << 24)) +#define HIGIG_SRC_MODID_LSf_GET(r) ((((r).higig[1]) >> 27) & 0x1f) +#define HIGIG_SRC_MODID_LSf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x1f << 27)) | ((((uint32_t)f) & 0x1f) << 27)) +#define HIGIG_VTAGf_GET(r) (((r).higig[0]) & 0xffff) +#define HIGIG_VTAGf_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff)) +#define HIGIG_DST_MODID_6f_GET(r) ((((r).higig[0]) >> 16) & 0x1) +#define HIGIG_DST_MODID_6f_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0x1 << 16)) | ((((uint32_t)f) & 0x1) << 16)) +#define HIGIG_SRC_MODID_6f_GET(r) ((((r).higig[0]) >> 17) & 0x1) +#define HIGIG_SRC_MODID_6f_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0x1 << 17)) | ((((uint32_t)f) & 0x1) << 17)) +#define HIGIG_HDR_EXT_LENf_GET(r) ((((r).higig[0]) >> 18) & 0x7) +#define HIGIG_HDR_EXT_LENf_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0x7 << 18)) | ((((uint32_t)f) & 0x7) << 18)) +#define HIGIG_CNG1f_GET(r) ((((r).higig[0]) >> 21) & 0x1) +#define HIGIG_CNG1f_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0x1 << 21)) | ((((uint32_t)f) & 0x1) << 21)) +#define HIGIG_HGIf_GET(r) ((((r).higig[0]) >> 22) & 0x3) +#define HIGIG_HGIf_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0x3 << 22)) | ((((uint32_t)f) & 0x3) << 22)) +#define HIGIG_STARTf_GET(r) ((((r).higig[0]) >> 24) & 0xff) +#define HIGIG_STARTf_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0xff << 24)) | ((((uint32_t)f) & 0xff) << 24)) + +/******************************************************************************* + * End of 'HIGIG' + ******************************************************************************/ + + + + +/******************************************************************************* + * SWFORMAT: HIGIG2 + * BLOCKS: + * SIZE: 128 + ******************************************************************************/ +#define HIGIG2_OFFSET 0x00000000 + +#define HIGIG2_BLKACC () + +#define HIGIG2_SIZE 16 + +/* + * This structure should be used to declare and program HIGIG2. + * + */ +typedef union HIGIG2_s { + uint32_t v[4]; + uint32_t higig2[4]; + uint32_t _higig2; +} HIGIG2_t; + +#define HIGIG2_CLR(r) sal_memset(&((r).higig2[0]), 0, sizeof(HIGIG2_t)) +#define HIGIG2_SET(r,i,d) (r).higig2[i] = d +#define HIGIG2_GET(r,i) (r).higig2[i] + +/* + * These macros can be used to access individual fields. + * + */ +#define HIGIG2_PPD_DATAf_GET(r,a) bcmdrd_field_be_get((r).higig2,4,0,63,a) +#define HIGIG2_PPD_DATAf_SET(r,a) bcmdrd_field_be_set((r).higig2,4,0,63,a) +#define HIGIG2_PPD0_RSVD_4_0f_GET(r) (((r).higig2[3]) & 0x1f) +#define HIGIG2_PPD0_RSVD_4_0f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1f)) | (((uint32_t)f) & 0x1f)) +#define HIGIG2_PPD0_HDR_EXT_LENf_GET(r) ((((r).higig2[3]) >> 5) & 0x7) +#define HIGIG2_PPD0_HDR_EXT_LENf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 5)) | ((((uint32_t)f) & 0x7) << 5)) +#define HIGIG2_PPD0_OPCODEf_GET(r) ((((r).higig2[3]) >> 8) & 0x7) +#define HIGIG2_PPD0_OPCODEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 8)) | ((((uint32_t)f) & 0x7) << 8)) +#define HIGIG2_PPD0_PRESERVE_DOT1Pf_GET(r) ((((r).higig2[3]) >> 11) & 0x1) +#define HIGIG2_PPD0_PRESERVE_DOT1Pf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 11)) | ((((uint32_t)f) & 0x1) << 11)) +#define HIGIG2_PPD0_PRESERVE_DSCPf_GET(r) ((((r).higig2[3]) >> 12) & 0x1) +#define HIGIG2_PPD0_PRESERVE_DSCPf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 12)) | ((((uint32_t)f) & 0x1) << 12)) +#define HIGIG2_PPD0_SRC_Tf_GET(r) ((((r).higig2[3]) >> 13) & 0x1) +#define HIGIG2_PPD0_SRC_Tf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 13)) | ((((uint32_t)f) & 0x1) << 13)) +#define HIGIG2_PPD0_PFMf_GET(r) ((((r).higig2[3]) >> 14) & 0x3) +#define HIGIG2_PPD0_PFMf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 14)) | ((((uint32_t)f) & 0x3) << 14)) +#define HIGIG2_PPD0_VID_LOWf_GET(r) ((((r).higig2[3]) >> 16) & 0xff) +#define HIGIG2_PPD0_VID_LOWf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xff << 16)) | ((((uint32_t)f) & 0xff) << 16)) +#define HIGIG2_PPD0_VID_HIGHf_GET(r) ((((r).higig2[3]) >> 24) & 0xff) +#define HIGIG2_PPD0_VID_HIGHf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xff << 24)) | ((((uint32_t)f) & 0xff) << 24)) +#define HIGIG2_PPD0_REP_IDf_GET(r) (((r).higig2[2]) & 0x7ffff) +#define HIGIG2_PPD0_REP_IDf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x7ffff)) | (((uint32_t)f) & 0x7ffff)) +#define HIGIG2_PPD0_VC_LABELf_GET(r) (((r).higig2[2]) & 0xffff) +#define HIGIG2_PPD0_VC_LABELf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff)) +#define HIGIG2_PPD0_MIRROR_CLASSIFICATION_TAGf_GET(r) ((((r).higig2[2]) >> 4) & 0xffff) +#define HIGIG2_PPD0_MIRROR_CLASSIFICATION_TAGf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff << 4)) | ((((uint32_t)f) & 0xffff) << 4)) +#define HIGIG2_PPD0_ORIG_SRC_PORTf_GET(r) ((((r).higig2[2]) >> 4) & 0xff) +#define HIGIG2_PPD0_ORIG_SRC_PORTf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xff << 4)) | ((((uint32_t)f) & 0xff) << 4)) +#define HIGIG2_PPD0_ORIG_SRC_MODIDf_GET(r) ((((r).higig2[2]) >> 12) & 0xff) +#define HIGIG2_PPD0_ORIG_SRC_MODIDf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xff << 12)) | ((((uint32_t)f) & 0xff) << 12)) +#define HIGIG2_PPD0_VC_LABEL_19_16f_GET(r) ((((r).higig2[2]) >> 16) & 0xf) +#define HIGIG2_PPD0_VC_LABEL_19_16f_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xf << 16)) | ((((uint32_t)f) & 0xf) << 16)) +#define HIGIG2_PPD0_LABEL_PRESENTf_GET(r) ((((r).higig2[2]) >> 20) & 0x1) +#define HIGIG2_PPD0_LABEL_PRESENTf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 20)) | ((((uint32_t)f) & 0x1) << 20)) +#define HIGIG2_PPD0_L3f_GET(r) ((((r).higig2[2]) >> 21) & 0x1) +#define HIGIG2_PPD0_L3f_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 21)) | ((((uint32_t)f) & 0x1) << 21)) +#define HIGIG2_PPD0_LABEL_OVERLAY_TYPEf_GET(r) ((((r).higig2[2]) >> 22) & 0x3) +#define HIGIG2_PPD0_LABEL_OVERLAY_TYPEf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x3 << 22)) | ((((uint32_t)f) & 0x3) << 22)) +#define HIGIG2_PPD0_MIRRORf_GET(r) ((((r).higig2[2]) >> 24) & 0x1) +#define HIGIG2_PPD0_MIRRORf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 24)) | ((((uint32_t)f) & 0x1) << 24)) +#define HIGIG2_PPD0_MIRROR_DONEf_GET(r) ((((r).higig2[2]) >> 25) & 0x1) +#define HIGIG2_PPD0_MIRROR_DONEf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 25)) | ((((uint32_t)f) & 0x1) << 25)) +#define HIGIG2_PPD0_MIRROR_ONLYf_GET(r) ((((r).higig2[2]) >> 26) & 0x1) +#define HIGIG2_PPD0_MIRROR_ONLYf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 26)) | ((((uint32_t)f) & 0x1) << 26)) +#define HIGIG2_PPD0_INGRESS_TAGGEDf_GET(r) ((((r).higig2[2]) >> 27) & 0x1) +#define HIGIG2_PPD0_INGRESS_TAGGEDf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 27)) | ((((uint32_t)f) & 0x1) << 27)) +#define HIGIG2_PPD0_DST_TGIDf_GET(r) ((((r).higig2[2]) >> 28) & 0x7) +#define HIGIG2_PPD0_DST_TGIDf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x7 << 28)) | ((((uint32_t)f) & 0x7) << 28)) +#define HIGIG2_PPD0_DST_Tf_GET(r) ((((r).higig2[2]) >> 31) & 0x1) +#define HIGIG2_PPD0_DST_Tf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31)) +#define HIGIG2_PPD1_RSVD_4_0f_GET(r) (((r).higig2[3]) & 0x1f) +#define HIGIG2_PPD1_RSVD_4_0f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1f)) | (((uint32_t)f) & 0x1f)) +#define HIGIG2_PPD1_HDR_EXT_LENf_GET(r) ((((r).higig2[3]) >> 5) & 0x7) +#define HIGIG2_PPD1_HDR_EXT_LENf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 5)) | ((((uint32_t)f) & 0x7) << 5)) +#define HIGIG2_PPD1_OPCODEf_GET(r) ((((r).higig2[3]) >> 8) & 0x7) +#define HIGIG2_PPD1_OPCODEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 8)) | ((((uint32_t)f) & 0x7) << 8)) +#define HIGIG2_PPD1_RSVD_12_11f_GET(r) ((((r).higig2[3]) >> 11) & 0x3) +#define HIGIG2_PPD1_RSVD_12_11f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 11)) | ((((uint32_t)f) & 0x3) << 11)) +#define HIGIG2_PPD1_SRC_Tf_GET(r) ((((r).higig2[3]) >> 13) & 0x1) +#define HIGIG2_PPD1_SRC_Tf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 13)) | ((((uint32_t)f) & 0x1) << 13)) +#define HIGIG2_PPD1_PFMf_GET(r) ((((r).higig2[3]) >> 14) & 0x3) +#define HIGIG2_PPD1_PFMf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 14)) | ((((uint32_t)f) & 0x3) << 14)) +#define HIGIG2_PPD1_VID_LOWf_GET(r) ((((r).higig2[3]) >> 16) & 0xff) +#define HIGIG2_PPD1_VID_LOWf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xff << 16)) | ((((uint32_t)f) & 0xff) << 16)) +#define HIGIG2_PPD1_VID_HIGHf_GET(r) ((((r).higig2[3]) >> 24) & 0xff) +#define HIGIG2_PPD1_VID_HIGHf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xff << 24)) | ((((uint32_t)f) & 0xff) << 24)) +#define HIGIG2_PPD1_RSVD_48_32f_GET(r) (((r).higig2[2]) & 0xffff) +#define HIGIG2_PPD1_RSVD_48_32f_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff)) +#define HIGIG2_PPD1_CLASSIFICATION_TAGf_GET(r) ((((r).higig2[2]) >> 16) & 0xffff) +#define HIGIG2_PPD1_CLASSIFICATION_TAGf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff << 16)) | ((((uint32_t)f) & 0xffff) << 16)) +#define HIGIG2_PPD2_SOURCE_TYPEf_GET(r) (((r).higig2[3]) & 0x1) +#define HIGIG2_PPD2_SOURCE_TYPEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1)) | (((uint32_t)f) & 0x1)) +#define HIGIG2_PPD2_DEST_TYPEf_GET(r) ((((r).higig2[3]) >> 1) & 0x1) +#define HIGIG2_PPD2_DEST_TYPEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 1)) | ((((uint32_t)f) & 0x1) << 1)) +#define HIGIG2_PPD2_PRESERVE_DOT1Pf_GET(r) ((((r).higig2[3]) >> 2) & 0x1) +#define HIGIG2_PPD2_PRESERVE_DOT1Pf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 2)) | ((((uint32_t)f) & 0x1) << 2)) +#define HIGIG2_PPD2_PRESERVE_DSCPf_GET(r) ((((r).higig2[3]) >> 3) & 0x1) +#define HIGIG2_PPD2_PRESERVE_DSCPf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 3)) | ((((uint32_t)f) & 0x1) << 3)) +#define HIGIG2_PPD2_VNI_HIGHf_GET(r) ((((r).higig2[3]) >> 4) & 0x3) +#define HIGIG2_PPD2_VNI_HIGHf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 4)) | ((((uint32_t)f) & 0x3) << 4)) +#define HIGIG2_PPD2_RSVD_7_6f_GET(r) ((((r).higig2[3]) >> 6) & 0x3) +#define HIGIG2_PPD2_RSVD_7_6f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 6)) | ((((uint32_t)f) & 0x3) << 6)) +#define HIGIG2_PPD2_OPCODEf_GET(r) ((((r).higig2[3]) >> 8) & 0x7) +#define HIGIG2_PPD2_OPCODEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 8)) | ((((uint32_t)f) & 0x7) << 8)) +#define HIGIG2_PPD2_REP_ID_17_16f_GET(r) ((((r).higig2[3]) >> 8) & 0x3) +#define HIGIG2_PPD2_REP_ID_17_16f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 8)) | ((((uint32_t)f) & 0x3) << 8)) +#define HIGIG2_PPD2_RSVD_11f_GET(r) ((((r).higig2[3]) >> 11) & 0x1) +#define HIGIG2_PPD2_RSVD_11f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 11)) | ((((uint32_t)f) & 0x1) << 11)) +#define HIGIG2_PPD2_LAG_FAILOVERf_GET(r) ((((r).higig2[3]) >> 12) & 0x1) +#define HIGIG2_PPD2_LAG_FAILOVERf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 12)) | ((((uint32_t)f) & 0x1) << 12)) +#define HIGIG2_PPD2_DO_NOT_LEARNf_GET(r) ((((r).higig2[3]) >> 13) & 0x1) +#define HIGIG2_PPD2_DO_NOT_LEARNf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 13)) | ((((uint32_t)f) & 0x1) << 13)) +#define HIGIG2_PPD2_DO_NOT_MODIFYf_GET(r) ((((r).higig2[3]) >> 14) & 0x1) +#define HIGIG2_PPD2_DO_NOT_MODIFYf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 14)) | ((((uint32_t)f) & 0x1) << 14)) +#define HIGIG2_PPD2_MIRRORf_GET(r) ((((r).higig2[3]) >> 15) & 0x1) +#define HIGIG2_PPD2_MIRRORf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 15)) | ((((uint32_t)f) & 0x1) << 15)) +#define HIGIG2_PPD2_SOURCE_VPf_GET(r) ((((r).higig2[3]) >> 16) & 0xffff) +#define HIGIG2_PPD2_SOURCE_VPf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xffff << 16)) | ((((uint32_t)f) & 0xffff) << 16)) +#define HIGIG2_PPD2_DEST_VPf_GET(r) (((r).higig2[2]) & 0xffff) +#define HIGIG2_PPD2_DEST_VPf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff)) +#define HIGIG2_PPD2_REP_ID_15_0f_GET(r) (((r).higig2[2]) & 0xffff) +#define HIGIG2_PPD2_REP_ID_15_0f_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff)) +#define HIGIG2_PPD2_VNI_LOWf_GET(r) ((((r).higig2[2]) >> 16) & 0xff) +#define HIGIG2_PPD2_VNI_LOWf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xff << 16)) | ((((uint32_t)f) & 0xff) << 16)) +#define HIGIG2_PPD2_VNI_MIDf_GET(r) ((((r).higig2[2]) >> 24) & 0x3) +#define HIGIG2_PPD2_VNI_MIDf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x3 << 24)) | ((((uint32_t)f) & 0x3) << 24)) +#define HIGIG2_PPD2_FWD_TYPEf_GET(r) ((((r).higig2[2]) >> 26) & 0x1f) +#define HIGIG2_PPD2_FWD_TYPEf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1f << 26)) | ((((uint32_t)f) & 0x1f) << 26)) +#define HIGIG2_PPD2_MULTIPOINTf_GET(r) ((((r).higig2[2]) >> 31) & 0x1) +#define HIGIG2_PPD2_MULTIPOINTf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31)) +#define HIGIG2_PPD3_PPD3_CONTAINER_TYPEf_GET(r) (((r).higig2[3]) & 0xf) +#define HIGIG2_PPD3_PPD3_CONTAINER_TYPEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xf)) | (((uint32_t)f) & 0xf)) +#define HIGIG2_PPD3_RSVD_7_4f_GET(r) ((((r).higig2[3]) >> 4) & 0xf) +#define HIGIG2_PPD3_RSVD_7_4f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xf << 4)) | ((((uint32_t)f) & 0xf) << 4)) +#define HIGIG2_PPD3_OPCODEf_GET(r) ((((r).higig2[3]) >> 8) & 0x7) +#define HIGIG2_PPD3_OPCODEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 8)) | ((((uint32_t)f) & 0x7) << 8)) +#define HIGIG2_PPD3_SOURCE_TYPEf_GET(r) ((((r).higig2[3]) >> 11) & 0x1) +#define HIGIG2_PPD3_SOURCE_TYPEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 11)) | ((((uint32_t)f) & 0x1) << 11)) +#define HIGIG2_PPD3_RSVD_28f_GET(r) ((((r).higig2[3]) >> 12) & 0x1) +#define HIGIG2_PPD3_RSVD_28f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 12)) | ((((uint32_t)f) & 0x1) << 12)) +#define HIGIG2_PPD3_DO_NOT_LEARNf_GET(r) ((((r).higig2[3]) >> 13) & 0x1) +#define HIGIG2_PPD3_DO_NOT_LEARNf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 13)) | ((((uint32_t)f) & 0x1) << 13)) +#define HIGIG2_PPD3_PRESERVE_DOT1Pf_GET(r) ((((r).higig2[3]) >> 14) & 0x1) +#define HIGIG2_PPD3_PRESERVE_DOT1Pf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 14)) | ((((uint32_t)f) & 0x1) << 14)) +#define HIGIG2_PPD3_PRESERVE_DSCPf_GET(r) ((((r).higig2[3]) >> 15) & 0x1) +#define HIGIG2_PPD3_PRESERVE_DSCPf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 15)) | ((((uint32_t)f) & 0x1) << 15)) +#define HIGIG2_PPD3_SOURCE_INFOf_GET(r) ((((r).higig2[3]) >> 16) & 0xffff) +#define HIGIG2_PPD3_SOURCE_INFOf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xffff << 16)) | ((((uint32_t)f) & 0xffff) << 16)) +#define HIGIG2_PPD3_PPD3_DATA_CONTAINERf_GET(r) ((r).higig2[2]) +#define HIGIG2_PPD3_PPD3_DATA_CONTAINERf_SET(r,f) (r).higig2[2]=((uint32_t)f) +#define HIGIG2_PPD_TYPEf_GET(r) (((r).higig2[1]) & 0x7) +#define HIGIG2_PPD_TYPEf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0x7)) | (((uint32_t)f) & 0x7)) +#define HIGIG2_CCf_GET(r) ((((r).higig2[1]) >> 3) & 0x3) +#define HIGIG2_CCf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0x3 << 3)) | ((((uint32_t)f) & 0x3) << 3)) +#define HIGIG2_EHVf_GET(r) ((((r).higig2[1]) >> 5) & 0x1) +#define HIGIG2_EHVf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0x1 << 5)) | ((((uint32_t)f) & 0x1) << 5)) +#define HIGIG2_DPf_GET(r) ((((r).higig2[1]) >> 6) & 0x3) +#define HIGIG2_DPf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0x3 << 6)) | ((((uint32_t)f) & 0x3) << 6)) +#define HIGIG2_LBIDf_GET(r) ((((r).higig2[1]) >> 8) & 0xff) +#define HIGIG2_LBIDf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0xff << 8)) | ((((uint32_t)f) & 0xff) << 8)) +#define HIGIG2_SRC_PIDf_GET(r) ((((r).higig2[1]) >> 16) & 0xff) +#define HIGIG2_SRC_PIDf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0xff << 16)) | ((((uint32_t)f) & 0xff) << 16)) +#define HIGIG2_SRC_MODIDf_GET(r) ((((r).higig2[1]) >> 24) & 0xff) +#define HIGIG2_SRC_MODIDf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0xff << 24)) | ((((uint32_t)f) & 0xff) << 24)) +#define HIGIG2_DST_PORT_MGIDLf_GET(r) (((r).higig2[0]) & 0xff) +#define HIGIG2_DST_PORT_MGIDLf_SET(r,f) (r).higig2[0]=(((r).higig2[0] & ~((uint32_t)0xff)) | (((uint32_t)f) & 0xff)) +#define HIGIG2_DST_MODID_MGIDHf_GET(r) ((((r).higig2[0]) >> 8) & 0xff) +#define HIGIG2_DST_MODID_MGIDHf_SET(r,f) (r).higig2[0]=(((r).higig2[0] & ~((uint32_t)0xff << 8)) | ((((uint32_t)f) & 0xff) << 8)) +#define HIGIG2_TCf_GET(r) ((((r).higig2[0]) >> 16) & 0xf) +#define HIGIG2_TCf_SET(r,f) (r).higig2[0]=(((r).higig2[0] & ~((uint32_t)0xf << 16)) | ((((uint32_t)f) & 0xf) << 16)) +#define HIGIG2_MCSTf_GET(r) ((((r).higig2[0]) >> 20) & 0x1) +#define HIGIG2_MCSTf_SET(r,f) (r).higig2[0]=(((r).higig2[0] & ~((uint32_t)0x1 << 20)) | ((((uint32_t)f) & 0x1) << 20)) +#define HIGIG2_STARTf_GET(r) ((((r).higig2[0]) >> 24) & 0xff) +#define HIGIG2_STARTf_SET(r,f) (r).higig2[0]=(((r).higig2[0] & ~((uint32_t)0xff << 24)) | ((((uint32_t)f) & 0xff) << 24)) + +/******************************************************************************* + * End of 'HIGIG2' + ******************************************************************************/ + + + + +/******************************************************************************* + * + * HIGIG SYMBOL TABLE + * + ******************************************************************************/ + +extern bcmdrd_symbols_t higig_symbols; + + +#endif /* BCMPKT_HIGIG_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h new file mode 100644 index 000000000000..f08895649074 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h @@ -0,0 +1,139 @@ +/*! \file bcmpkt_lbhdr.h + * + * Loopback header (LBHDR, called LOOPBACK_MH in hardware) access interface. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_LBHDR_H +#define BCMPKT_LBHDR_H + +#include +#include +#include +#include +#include + +/*! TX Packet MetaData size (bytes). */ +#define BCMPKT_LBHDR_SIZE_BYTES 16 +/*! TX Packet MetaData size (words). */ +#define BCMPKT_LBHDR_SIZE_WORDS 4 + +/*! + * \name LBHDR Dumping flags. + * \anchor BCMPKT_LBHDR_DUMP_F_XXX + */ +/*! \{ */ +/*! + * Dump all fields contents. + */ +#define BCMPKT_LBHDR_DUMP_F_ALL 0 +/*! + * Dump none zero field content only. + */ +#define BCMPKT_LBHDR_DUMP_F_NONE_ZERO 1 +/*! \} */ + +/*! + * \name BCMPKT_LBHDR_START encodings. + * \anchor BCMPKT_LBHDR_START_XXX + */ +/*! \{ */ +/*! + * Loopback header start of frame indicator's value. + */ +#define BCMPKT_LBHDR_START_IND 251 +/*! \} */ + +/*! \brief LBHDR field ID supported bit array. + * Array of bits indicating whether a LBHDR field ID is supported by a given + * device type. + */ +typedef struct bcmpkt_lbhdr_fid_support_s { + /*! Field ID bitmap container */ + SHR_BITDCLNAME(fbits, BCMPKT_LBHDR_FID_COUNT); +} bcmpkt_lbhdr_fid_support_t; + +/*! + * \name Utility macros for \ref bcmpkt_lbhdr_fid_support_t. + * \anchor BCMPKT_LBHDR_SUPPORT_OPS + */ +/*! \{ */ +/*! + * Macro to get a field ID's supported status. + * + * \retval zero Not supported + * \retval non-zero Supported + */ +#define BCMPKT_LBHDR_FID_SUPPORT_GET(_support, _fid) \ + SHR_BITGET(((_support).fbits), (_fid)) + +/*! + * Iterate over all supported LBHDR field IDs in the \c _support. + */ +#define BCMPKT_LBHDR_FID_SUPPORT_ITER(_support, _fid) \ + for(_fid = 0; _fid < BCMPKT_LBHDR_FID_COUNT; _fid++) \ + if(BCMPKT_LBHDR_FID_SUPPORT_GET(_support, _fid)) +/*! \} */ + +/*! + * \brief Get field name for a given LBHDR field ID. + * + * \param [in] fid LBHDR field ID, refer to \ref BCMPKT_LBHDR_XXX. + * \param [out] name LBHDR field name string. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + */ +extern int +bcmpkt_lbhdr_field_name_get(int fid, char **name); + +/*! + * \brief Get field ID for a given LBHDR field name. + * + * \param [in] name LBHDR field name string. + * \param [out] fid LBHDR Field ID. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_NOT_FOUND Not found the name. + */ +extern int +bcmpkt_lbhdr_field_id_get(char* name, int *fid); + +/*! + * \brief Get supported LBHDR field IDs for a given device type. + * + * This function returns a structure with information about the LBHDR field IDs + * a given device type supports. + * + * Use \ref BCMPKT_LBHDR_FID_SUPPORT_GET on the returned structure to get the + * supported status of a specific field ID. + * + * \param [in] dev_type Device type. + * \param [out] support Field ID supported status bitmap. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_INTERNAL API internal error. + */ +extern int +bcmpkt_lbhdr_fid_support_get(bcmdrd_dev_type_t dev_type, + bcmpkt_lbhdr_fid_support_t *support); + +#endif /* BCMPKT_LBHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h new file mode 100644 index 000000000000..cd68ac50c13d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h @@ -0,0 +1,344 @@ +#ifndef BCMPKT_LBHDR_DEFS_H +#define BCMPKT_LBHDR_DEFS_H +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides field macros for the Packet Loopback HeaDeR (LBHDR, called + * LOOPBACK_MH in hardware.) access. + * + ******************************************************************************/ + +/*! + * \name Loopback module header field IDs. + * \anchor BCMPKT_LBHDR_XXX + */ +/*! \{ */ +/*! Invalid BCMPKT_LBHDR FID indicator */ +#define BCMPKT_LBHDR_FID_INVALID -1 +/*! Start of frame indicator. */ +#define BCMPKT_LBHDR_START 0 +/*! + * 64 Header Types Supported. 1 means Packets from CPU with SOBMH header format + * to Passthru NLF + */ +#define BCMPKT_LBHDR_HEADER_TYPE 1 +/*! + * Indicates the loopback COS queue and is used by the MMU for per + * application group accounting for packets received from the internal + * loopback port. This must be put the PBI.INPUT_PRIORITY whenever the + * source port is the loopback port. + */ +#define BCMPKT_LBHDR_INPUT_PRIORITY 2 +/*! Pointer to CPU_PACKET_PROFILE_1/2 registers. */ +#define BCMPKT_LBHDR_PKT_PROFILE 3 +/*! Triggers capture of intermediate packet processing result of this packet. */ +#define BCMPKT_LBHDR_VISIBILITY_PKT 4 +/*! + * Source field for the packet. + * Contents of this field are determined by value of SOURCE_TYPE. + * SOURCE_TYPE=0x0: + * [15:0] SOURCE_VP + * SOURCE_TYPE=0x1: + * [15:8] SRC_MODID + * [7:0] SRC_PORT + */ +#define BCMPKT_LBHDR_SOURCE 5 +/*! Indicates contents of SOURCE field. 0x1: SGPP 0x0: SVP. */ +#define BCMPKT_LBHDR_SOURCE_TYPE 6 +/*! CNG Bits */ +#define BCMPKT_LBHDR_TRILL_AC_CNG 7 +/*! Traffic class */ +#define BCMPKT_LBHDR_TRILL_AC_TC 8 +/*! Do Not Learn Bit */ +#define BCMPKT_LBHDR_TRILL_AC_DO_NOT_LEARN 9 +/*! CNG Bits */ +#define BCMPKT_LBHDR_TRILL_NW_CNG 10 +/*! Traffic class */ +#define BCMPKT_LBHDR_TRILL_NW_TC 11 +/*! Destination type (see encodings). Valid only if SUBFLOW_TYPE=CPU_TX_PROC. */ +#define BCMPKT_LBHDR_ETH_DEST_TYPE 12 +/*! + * Destination based on DESTINATION_TYPE. (For ECMP/ECMP_MEMBER cases, this field + * contains ECMP_GROUP_PTR). Valid only if SUBFLOW_TYPE=CPU_TX_PROC. + */ +#define BCMPKT_LBHDR_ETH_DEST 13 +/*! Drop precedence for the apcket. Valid only if SUBFLOW_TYPE=CPU_TX_PROC. */ +#define BCMPKT_LBHDR_ETH_DP 14 +/*! + * ECMP member ID for case where DESTINATION_TYPE=ECMP_MEMBER. Only valid for single + * level ECMP. Valid only if SUBFLOW_TYPE=CPU_TX_PROC. + */ +#define BCMPKT_LBHDR_ETH_ECMP_MEMBER_ID 15 +/*! + * Internal Congestion to be used for the packet. Valid only if + * SUBFLOW_TYPE=CPU_TX_PROC. + */ +#define BCMPKT_LBHDR_ETH_INT_CN 16 +/*! + * Internal priority to be used for the packet. Valid only if + * SUBFLOW_TYPE=CPU_TX_PROC. + */ +#define BCMPKT_LBHDR_ETH_INT_PRI 17 +/*! + * Allows software to select load balancing bitmap for non-unicast packets. + * valid only if MCAST_LB_INDEX_VLD=1. + */ +#define BCMPKT_LBHDR_ETH_MCAST_LB_INDEX 18 +/*! If set, MCAST_LB_INDEX field is valid. */ +#define BCMPKT_LBHDR_ETH_MCAST_LB_INDEX_VLD 19 +/*! + * Device Port Number which is to be used for processing packet in Ingress + * Pipeline. + */ +#define BCMPKT_LBHDR_ETH_PP_PORT 20 +/*! + * If set, the qos fields (INT, PRI, etc) are specified in the header and + * override the pre-IFP assignment. Else, derived based on packet lookups. + * Valid only if SUBFLOW_TYPE=CPU_TX_PROC. + */ +#define BCMPKT_LBHDR_ETH_QOS_FIELDS_VLD 21 +/*! + * Indicates whether packets should be treated as routed or bridged. Valid + * only if SUBFLOW_TYPE=CPU_TX_PROC. + */ +#define BCMPKT_LBHDR_ETH_ROUTED_PKT 22 +/*! Identifies sub-flow (see encodings). */ +#define BCMPKT_LBHDR_ETH_SUBFLOW_TYPE 23 +/*! VRF */ +#define BCMPKT_LBHDR_ETHERNET_VRF 24 +/*! VRF valid */ +#define BCMPKT_LBHDR_ETHERNET_VRF_VALID 25 +/*! MUST Always be 0 */ +#define BCMPKT_LBHDR_ZERO 26 +/*! + * Device Port Number which is to be used for processing packet in Ingress + * Pipeline. + */ +#define BCMPKT_LBHDR_PP_PORT 27 +/*! + * Indicates whether packets should be treated as routed or bridged. Valid + * only if SUBFLOW_TYPE=CPU_TX_PROC. + */ +#define BCMPKT_LBHDR_ROUTED_PKT 28 +/*! VRF */ +#define BCMPKT_LBHDR_VRF 29 +/*! VRF valid */ +#define BCMPKT_LBHDR_VRF_VALID 30 +/*! Qos field valid */ +#define BCMPKT_LBHDR_QOS_FIELD_VALID 31 +/*! Opaque object */ +#define BCMPKT_LBHDR_OPAQUE_OBJECT 32 +/*! Qos field ethernet */ +#define BCMPKT_LBHDR_QOS_FIELD_ETH 33 +/*! Internal priority ethernet */ +#define BCMPKT_LBHDR_INT_PRI_ETH 34 +/*! Internal CN ethernet */ +#define BCMPKT_LBHDR_INT_CN_ETH 35 +/*! CNG ethernet */ +#define BCMPKT_LBHDR_CNG_ETH 36 +/*! */ +#define BCMPKT_LBHDR_PKT_PROFILE_MD_ETH 37 +/*! */ +#define BCMPKT_LBHDR_QOS_FIELD_VALID_MD_ETH 38 +/*! */ +#define BCMPKT_LBHDR_PP_PORT_MD_ETH 39 +/*! */ +#define BCMPKT_LBHDR_DESTINATION_MD_ETH 40 +/*! */ +#define BCMPKT_LBHDR_SVTAG_TX_PRESENT_MD_ETH 41 +/*! */ +#define BCMPKT_LBHDR_EXTENDED_DELETE_ENABLE_MD_ETH 42 +/*! */ +#define BCMPKT_LBHDR_EXTENDED_DELETE_BYTE_COUNT_MD_ETH 43 +/*! */ +#define BCMPKT_LBHDR_IFA_AT_OUTER_LAYER_MD_ETH 44 +/*! */ +#define BCMPKT_LBHDR_OPAQUE_OBJECT_MD_ETH 45 +/*! */ +#define BCMPKT_LBHDR_QOS_FIELD_ETH_MD_ETH 46 +/*! */ +#define BCMPKT_LBHDR_INPUT_PRIORITY_MD_ETH 47 +/*! */ +#define BCMPKT_LBHDR_CNP 48 +/*! LBHDR FIELD ID NUMBER */ +#define BCMPKT_LBHDR_FID_COUNT 49 +/*! \} */ + +/*! LBHDR field name strings for debugging. */ +#define BCMPKT_LBHDR_FIELD_NAME_MAP_INIT \ + {"START", BCMPKT_LBHDR_START},\ + {"HEADER_TYPE", BCMPKT_LBHDR_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCMPKT_LBHDR_INPUT_PRIORITY},\ + {"PKT_PROFILE", BCMPKT_LBHDR_PKT_PROFILE},\ + {"VISIBILITY_PKT", BCMPKT_LBHDR_VISIBILITY_PKT},\ + {"SOURCE", BCMPKT_LBHDR_SOURCE},\ + {"SOURCE_TYPE", BCMPKT_LBHDR_SOURCE_TYPE},\ + {"TRILL_AC::CNG", BCMPKT_LBHDR_TRILL_AC_CNG},\ + {"TRILL_AC::TC", BCMPKT_LBHDR_TRILL_AC_TC},\ + {"TRILL_AC::DO_NOT_LEARN", BCMPKT_LBHDR_TRILL_AC_DO_NOT_LEARN},\ + {"TRILL_NW::CNG", BCMPKT_LBHDR_TRILL_NW_CNG},\ + {"TRILL_NW::TC", BCMPKT_LBHDR_TRILL_NW_TC},\ + {"ETH::DEST_TYPE", BCMPKT_LBHDR_ETH_DEST_TYPE},\ + {"ETH::DEST", BCMPKT_LBHDR_ETH_DEST},\ + {"ETH::DP", BCMPKT_LBHDR_ETH_DP},\ + {"ETH::ECMP_MEMBER_ID", BCMPKT_LBHDR_ETH_ECMP_MEMBER_ID},\ + {"ETH::INT_CN", BCMPKT_LBHDR_ETH_INT_CN},\ + {"ETH::INT_PRI", BCMPKT_LBHDR_ETH_INT_PRI},\ + {"ETH::MCAST_LB_INDEX", BCMPKT_LBHDR_ETH_MCAST_LB_INDEX},\ + {"ETH::MCAST_LB_INDEX_VLD", BCMPKT_LBHDR_ETH_MCAST_LB_INDEX_VLD},\ + {"ETH::PP_PORT", BCMPKT_LBHDR_ETH_PP_PORT},\ + {"ETH::QOS_FIELDS_VLD", BCMPKT_LBHDR_ETH_QOS_FIELDS_VLD},\ + {"ETH::ROUTED_PKT", BCMPKT_LBHDR_ETH_ROUTED_PKT},\ + {"ETH::SUBFLOW_TYPE", BCMPKT_LBHDR_ETH_SUBFLOW_TYPE},\ + {"ETHERNET::VRF", BCMPKT_LBHDR_ETHERNET_VRF},\ + {"ETHERNET::VRF_VALID", BCMPKT_LBHDR_ETHERNET_VRF_VALID},\ + {"ZERO", BCMPKT_LBHDR_ZERO},\ + {"PP_PORT", BCMPKT_LBHDR_PP_PORT},\ + {"ROUTED_PKT", BCMPKT_LBHDR_ROUTED_PKT},\ + {"VRF", BCMPKT_LBHDR_VRF},\ + {"VRF_VALID", BCMPKT_LBHDR_VRF_VALID},\ + {"QOS_FIELD_VALID", BCMPKT_LBHDR_QOS_FIELD_VALID},\ + {"OPAQUE_OBJECT", BCMPKT_LBHDR_OPAQUE_OBJECT},\ + {"QOS_FIELD_ETH", BCMPKT_LBHDR_QOS_FIELD_ETH},\ + {"INT_PRI_ETH", BCMPKT_LBHDR_INT_PRI_ETH},\ + {"INT_CN_ETH", BCMPKT_LBHDR_INT_CN_ETH},\ + {"CNG_ETH", BCMPKT_LBHDR_CNG_ETH},\ + {"PKT_PROFILE_MD_ETH", BCMPKT_LBHDR_PKT_PROFILE_MD_ETH},\ + {"QOS_FIELD_VALID_MD_ETH", BCMPKT_LBHDR_QOS_FIELD_VALID_MD_ETH},\ + {"PP_PORT_MD_ETH", BCMPKT_LBHDR_PP_PORT_MD_ETH},\ + {"DESTINATION_MD_ETH", BCMPKT_LBHDR_DESTINATION_MD_ETH},\ + {"SVTAG_TX_PRESENT_MD_ETH", BCMPKT_LBHDR_SVTAG_TX_PRESENT_MD_ETH},\ + {"EXTENDED_DELETE_ENABLE_MD_ETH", BCMPKT_LBHDR_EXTENDED_DELETE_ENABLE_MD_ETH},\ + {"EXTENDED_DELETE_BYTE_COUNT_MD_ETH", BCMPKT_LBHDR_EXTENDED_DELETE_BYTE_COUNT_MD_ETH},\ + {"IFA_AT_OUTER_LAYER_MD_ETH", BCMPKT_LBHDR_IFA_AT_OUTER_LAYER_MD_ETH},\ + {"OPAQUE_OBJECT_MD_ETH", BCMPKT_LBHDR_OPAQUE_OBJECT_MD_ETH},\ + {"QOS_FIELD_ETH_MD_ETH", BCMPKT_LBHDR_QOS_FIELD_ETH_MD_ETH},\ + {"INPUT_PRIORITY_MD_ETH", BCMPKT_LBHDR_INPUT_PRIORITY_MD_ETH},\ + {"CNP", BCMPKT_LBHDR_CNP},\ + {"fid count", BCMPKT_LBHDR_FID_COUNT} + +/*! + * \name BCMPKT_LBHDR_HEADER_TYPE encodings. + * \anchor BCMPKT_LBHDR_HEADER_TYPE_XXX + */ +/*! \{ */ +/*! MinM, L2GRE and VXLAN tunnel terminated packet */ +#define BCMPKT_LBHDR_HEADER_T_TUNNEL_TERM 0 +/*! Trill Network Packets to Passthru NLF */ +#define BCMPKT_LBHDR_HEADER_T_TRILL_NW 1 +/*! Trill Access Layer Packets to Passthru NLF */ +#define BCMPKT_LBHDR_HEADER_T_TRILL_AC 2 +/*! Process as if it was received on front panel port. */ +#define BCMPKT_LBHDR_HEADER_T_ETHERNET 3 +/*! MAC in MAC packets to Passthru NLF */ +#define BCMPKT_LBHDR_HEADER_T_MIM 4 +/*! QCN Packets to Passthru NLF */ +#define BCMPKT_LBHDR_HEADER_T_QCN 5 +/*! Generic loopback */ +#define BCMPKT_LBHDR_HEADER_T_GENERIC 6 +/*! LB Hdr type ETH */ +#define BCMPKT_LBHDR_HEADER_T_LOOPBACK_MH 7 +/*! Transport header */ +#define BCMPKT_LBHDR_HEADER_T_TRANSPORT 7 +/*! \} */ + +/*! BCMPKT_LBHDR_HEADER_TYPE encoding name strings for debugging. */ +#define BCMPKT_LBHDR_HEADER_TYPE_NAME_MAP_INIT \ + {"TUNNEL_TERM", BCMPKT_LBHDR_HEADER_T_TUNNEL_TERM},\ + {"TRILL_NW", BCMPKT_LBHDR_HEADER_T_TRILL_NW},\ + {"TRILL_AC", BCMPKT_LBHDR_HEADER_T_TRILL_AC},\ + {"ETHERNET", BCMPKT_LBHDR_HEADER_T_ETHERNET},\ + {"MIM", BCMPKT_LBHDR_HEADER_T_MIM},\ + {"QCN", BCMPKT_LBHDR_HEADER_T_QCN},\ + {"GENERIC", BCMPKT_LBHDR_HEADER_T_GENERIC},\ + {"LOOPBACK_MH", BCMPKT_LBHDR_HEADER_T_LOOPBACK_MH},\ + {"TRANSPORT", BCMPKT_LBHDR_HEADER_T_TRANSPORT},\ + +/*! + * \name BCMPKT_LBHDR_ETH_DEST_TYPE encodings. + * \anchor BCMPKT_LBHDR_ETH_DEST_TYPE_XXX + */ +/*! \{ */ +/*! + * Destination GLP. Note that despite the name, only physical ports (DGPP) + * are supported. Trunking is not supported. + */ +#define BCMPKT_LBHDR_ETH_DEST_T_DGLP 0 +/*! Next hop */ +#define BCMPKT_LBHDR_ETH_DEST_T_NHI 1 +/*! ECMP group */ +#define BCMPKT_LBHDR_ETH_DEST_T_ECMP 2 +/*! ECMP member */ +#define BCMPKT_LBHDR_ETH_DEST_T_ECMP_MEMBER 3 +/*! IPMC */ +#define BCMPKT_LBHDR_ETH_DEST_T_IPMC 4 +/*! L2MC */ +#define BCMPKT_LBHDR_ETH_DEST_T_L2MC 5 +/*! Vlan flooding */ +#define BCMPKT_LBHDR_ETH_DEST_T_VLAN_FLOOD 6 +/*! \} */ + +/*! BCMPKT_LBHDR_ETH_DEST_TYPE encoding name strings for debugging. */ +#define BCMPKT_LBHDR_ETH_DEST_TYPE_NAME_MAP_INIT \ + {"DGLP", BCMPKT_LBHDR_ETH_DEST_T_DGLP},\ + {"NHI", BCMPKT_LBHDR_ETH_DEST_T_NHI},\ + {"ECMP", BCMPKT_LBHDR_ETH_DEST_T_ECMP},\ + {"ECMP_MEMBER", BCMPKT_LBHDR_ETH_DEST_T_ECMP_MEMBER},\ + {"IPMC", BCMPKT_LBHDR_ETH_DEST_T_IPMC},\ + {"L2MC", BCMPKT_LBHDR_ETH_DEST_T_L2MC},\ + {"VLAN_FLOOD", BCMPKT_LBHDR_ETH_DEST_T_VLAN_FLOOD},\ + +/*! + * \name BCMPKT_LBHDR_ETH_SUBFLOW_TYPE encodings. + * \anchor BCMPKT_LBHDR_ETH_SUBFLOW_TYPE_XXX + */ +/*! \{ */ +/*! CPU masquerade flow */ +#define BCMPKT_LBHDR_ETH_SUBFLOW_T_CPU_MASQUERADE 0 +/*! CPU_TX_PROC */ +#define BCMPKT_LBHDR_ETH_SUBFLOW_T_CPU_TX_PROC 1 +/*! \} */ + +/*! BCMPKT_LBHDR_ETH_SUBFLOW_TYPE encoding name strings for debugging. */ +#define BCMPKT_LBHDR_ETH_SUBFLOW_TYPE_NAME_MAP_INIT \ + {"CPU_MASQUERADE", BCMPKT_LBHDR_ETH_SUBFLOW_T_CPU_MASQUERADE},\ + {"CPU_TX_PROC", BCMPKT_LBHDR_ETH_SUBFLOW_T_CPU_TX_PROC},\ + +/*! + * \name Loopback module header internal usage field IDs. + * \anchor BCMPKT_LBHDR_I_XXX + */ +/*! \{ */ +/*! Invalid BCMPKT_LBHDR_I FID indicator */ +#define BCMPKT_LBHDR_I_FID_INVALID -1 +/*! LBHDR RX raw data size. */ +#define BCMPKT_LBHDR_I_SIZE 0 +/*! LBHDR_I FIELD ID NUMBER */ +#define BCMPKT_LBHDR_I_FID_COUNT 1 +/*! \} */ + +/*! LBHDR_I field name strings for debugging. */ +#define BCMPKT_LBHDR_I_FIELD_NAME_MAP_INIT \ + {"SIZE", BCMPKT_LBHDR_I_SIZE},\ + {"fid count", BCMPKT_LBHDR_I_FID_COUNT} + +#endif /*! BCMPKT_LBHDR_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h new file mode 100644 index 000000000000..e001ec598e4d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h @@ -0,0 +1,59 @@ +/*! \file bcmpkt_lbhdr_field.h + * + * Loopback header (LBHDR, LOOPBACK_MH in hardware) field access interface. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_LBHDR_FIELD_H +#define BCMPKT_LBHDR_FIELD_H + +/*! + * \brief Get value from a LBHDR field. + * + * \param [in] dev_type Device type. + * \param [in] lbhdr LBHDR handle. + * \param [in] fid LBHDR field ID, refer to \ref BCMPKT_LBHDR_XXX. + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_lbhdr_field_get(bcmdrd_dev_type_t dev_type, uint32_t *lbhdr, + int fid, uint32_t *val); + +/*! + * \brief Set value into a LBHDR field. + * + * \param [in] dev_type Device type. + * \param [in,out] lbhdr LBHDR handle. + * \param [in] fid LBHDR field ID, refer to \ref BCMPKT_LBHDR_XXX. + * \param [in] val Set value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_lbhdr_field_set(bcmdrd_dev_type_t dev_type, uint32_t *lbhdr, + int fid, uint32_t val); + +#endif /* BCMPKT_LBHDR_FIELD_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h new file mode 100644 index 000000000000..048c9ae0931b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h @@ -0,0 +1,63 @@ +/*! \file bcmpkt_lbhdr_internal.h + * + * Loopback header (LBHDR, called LOOPBACK_MH in hardware) access interface + * (Internal use only). + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_LBHDR_INTERNAL_H +#define BCMPKT_LBHDR_INTERNAL_H + +#include +#include +#include +#include + +/*! + * Array of LBHDR field getter functions for a particular device + * type. + */ +typedef struct bcmpkt_lbhdr_fget_s { + bcmpkt_field_get_f fget[BCMPKT_LBHDR_FID_COUNT]; +} bcmpkt_lbhdr_fget_t; + +/*! + * Array of LBHDR field setter functions for a particular device + * type. These functions are used for internally configuring packet + * filter. + */ +typedef struct bcmpkt_lbhdr_fset_s { + bcmpkt_field_set_f fset[BCMPKT_LBHDR_FID_COUNT]; +} bcmpkt_lbhdr_fset_t; + +/*! + * Array of LBHDR field address and length getter functions for a multiple + * words field of a particular device type. *addr is output address and return + * length. + */ +typedef struct bcmpkt_lbhdr_figet_s { + bcmpkt_ifield_get_f fget[BCMPKT_LBHDR_I_FID_COUNT]; +} bcmpkt_lbhdr_figet_t; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern void _bd##_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#endif /* BCMPKT_LBHDR_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h new file mode 100644 index 000000000000..3cb424d1f15c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h @@ -0,0 +1,58 @@ +/*! \file bcmpkt_pmd.h + * + * Common macros and definitions for PMD. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_PMD_H +#define BCMPKT_PMD_H + +#include + +/* For application convenience */ +#include +#include +#include +#include +#include +#include +#include + +/*! Invalid PMD header field ID. */ +#define BCMPKT_FID_INVALID -1 + +/*! Bitmap array size. */ +#define BCMPKT_BITMAP_WORD_SIZE 16 + +/*! + * \name BCMPKT Dumping flags. + * \anchor BCMPKT_DUMP_F_XXX + */ +/*! Dump all fields contents. */ +#define BCMPKT_DUMP_F_ALL 0 +/*! Dump none zero field content only. */ +#define BCMPKT_DUMP_F_NONE_ZERO 1 + +/*! PMD header field ID bit array. */ +typedef struct bcmpkt_bitmap_s { + /*! Bit array */ + uint32_t pbits[BCMPKT_BITMAP_WORD_SIZE]; +} bcmpkt_bitmap_t; + +#endif /* BCMPKT_PMD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h new file mode 100644 index 000000000000..67051fadd8ba --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h @@ -0,0 +1,61 @@ +/*! \file bcmpkt_pmd_internal.h + * + * \brief Basic PMD definitions. + * + * The defintions are kept separate to minimize the header file + * dependencies for the stand-alone PMD library. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_PMD_INTERNAL_H +#define BCMPKT_PMD_INTERNAL_H + +#include + +/*! Get a field from a PMD buffer. */ +typedef uint32_t (*bcmpkt_field_get_f)(uint32_t *data); + +/*! Set a field within a PMD buffer. */ +typedef void (*bcmpkt_field_set_f)(uint32_t *data, uint32_t val); + +/*! Get a complex field pointer or other attributions. */ +typedef uint32_t (*bcmpkt_ifield_get_f)(uint32_t *data, uint32_t **addr); + +/*! + * \brief Packet metadata information structure. + */ +typedef struct bcmpkt_pmd_view_info_s { + + /*! View type list. */ + shr_enum_map_t *view_types; + + /*! + * Each field's view code. + * -2 means unavailable field. + * -1 means common field. + * others are correspondent view codes defined in view types. + */ + int *view_infos; + + /*! View type get function. */ + bcmpkt_field_get_f view_type_get; + +} bcmpkt_pmd_view_info_t; + +#endif /* BCMPKT_PMD_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h new file mode 100644 index 000000000000..188fb593364e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h @@ -0,0 +1,125 @@ +/*! \file bcmpkt_rcpu_hdr.h + * + * RCPU header format definition. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_RCPU_HDR_H +#define BCMPKT_RCPU_HDR_H + +#include + +/*! RCPU Header length. */ +#define BCMPKT_RCPU_HDR_LEN 32 +/*! RX PMD maximum size. */ +#define BCMPKT_RCPU_RXPMD_SIZE 96 +/*! RX Encapsulation size. */ +#define BCMPKT_RCPU_RX_ENCAP_SIZE (BCMPKT_RCPU_HDR_LEN + BCMPKT_RCPU_RXPMD_SIZE) +/*! TX Module Header size. */ +#define BCMPKT_RCPU_TX_MH_SIZE 32 +/*! TX Encapsulation size. */ +#define BCMPKT_RCPU_TX_ENCAP_SIZE (BCMPKT_RCPU_HDR_LEN + BCMPKT_RCPU_TX_MH_SIZE) +/*! Maximum Encapsulation size. */ +#define BCMPKT_RCPU_MAX_ENCAP_SIZE BCMPKT_RCPU_RX_ENCAP_SIZE + +/*! + * \name Packet RCPU operation types. + * \anchor BCMPKT_RCPU_OP_XXX + */ +/*! \{ */ +/*! No operation code. */ +#define BCMPKT_RCPU_OP_NONE 0x0 +/*! To CPU packet. */ +#define BCMPKT_RCPU_OP_RX 0x10 +/*! From CPU packet. */ +#define BCMPKT_RCPU_OP_TX 0x20 +/*! \} */ + +/*! + * \name Packet RCPU flags. + * \anchor BCMPKT_RCPU_F_XXX + */ +/*! \{ */ +/*! No operation code. */ +#define BCMPKT_RCPU_F_NONE 0 +/*! To CPU packet. */ +#define BCMPKT_RCPU_F_MODHDR (1 << 2) +/*! Do not pad runt TX packet. */ +#define BCMPKT_RCPU_F_TX_NO_PAD (1 << 4) +/*! \} */ + +/*! RCPU default VLAN ID with pri and cfi. */ +#define BCMPKT_RCPU_VLAN 0x01 + +/*! RCPU TPID. */ +#define BCMPKT_RCPU_TPID 0x8100 + +/*! RCPU Ethertype. */ +#define BCMPKT_RCPU_ETYPE 0xde08 + +/*! + * \brief The RCPU header format structure. + */ +typedef struct bcmpkt_rcpu_hdr_s { + + /*! RCPU header DMAC. */ + shr_mac_t dmac; + + /*! RCPU header SMAC. */ + shr_mac_t smac; + + /*! VLAN TPID. */ + uint16_t tpid; + + /*! VLAN TAG with cfi + pri. */ + uint16_t vlan; + + /*! Ether-type. */ + uint16_t ethertype; + + /*! RCPU signature. */ + uint16_t signature; + + /*! RCPU operation code. */ + uint8_t opcode; + + /*! RCPU operation code. */ + uint8_t flags; + + /*! RCPU operation code. */ + uint16_t transid; + + /*! Length of packet data. */ + uint16_t pkt_len; + + /*! Expect reply message length. */ + uint16_t reply_len; + + /*! packet meta data length. (Internal usage) */ + uint8_t meta_len; + + /*! Transmission queue number. (Internal usage) */ + uint8_t queue_id; + + /*! Reserved must be 0 */ + uint16_t reserved; + +} bcmpkt_rcpu_hdr_t; + +#endif /* BCMPKT_RCPU_HDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h new file mode 100644 index 000000000000..f423f39ceede --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h @@ -0,0 +1,266 @@ +/*! \file bcmpkt_rxpmd.h + * + * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_RXPMD_H +#define BCMPKT_RXPMD_H + +#include +#include +#include +#include +#include +#include +#include +#include + +/*! RX raw packet metadata maximum size (words). */ +#define BCMPKT_RXPMD_SIZE_WORDS 18 + +/*! RX raw packet metadata maximum size (bytes). */ +#define BCMPKT_RXPMD_SIZE_BYTES (BCMPKT_RXPMD_SIZE_WORDS * 4) + +/*! CELL Error status bitmap. */ +#define BCMPKT_RXMETA_ST_CELL_ERROR (0x1 << 18) + +/*! \brief Packet reasons bitmap. + * Set of "reasons" (\ref BCMPKT_RX_REASON_XXX) why a packet came to the CPU. + */ +typedef struct bcmpkt_rx_reasons_s { + /*! Bitmap container */ + SHR_BITDCLNAME(pbits, BCMPKT_RX_REASON_COUNT); +} bcmpkt_rx_reasons_t; + +/*! + * \name RXPMD Dumping flags. + * \anchor BCMPKT_RXPMD_DUMP_F_XXX + */ +/*! \{ */ +/*! + * Dump all fields contents. + */ +#define BCMPKT_RXPMD_DUMP_F_ALL 0 +/*! + * Dump none zero field content only. + */ +#define BCMPKT_RXPMD_DUMP_F_NONE_ZERO 1 +/*! \} */ + +/*! + * \name Packet RX reason utility macros. + * \anchor BCMPKT_RX_REASON_OPS + */ +/*! \{ */ +/*! + * Macro to check if a reason (\ref BCMPKT_RX_REASON_XXX) is included in a + * set of reasons (\ref bcmpkt_rx_reasons_t). Returns: + * zero => reason is not included in the set + * non-zero => reason is included in the set + */ +#define BCMPKT_RX_REASON_GET(_reasons, _reason) \ + SHR_BITGET(((_reasons).pbits), (_reason)) + +/*! + * Macro to add a reason (\ref BCMPKT_RX_REASON_XXX) to a set of + * reasons (\ref bcmpkt_rx_reasons_t) + */ +#define BCMPKT_RX_REASON_SET(_reasons, _reason) \ + SHR_BITSET(((_reasons).pbits), (_reason)) + +/*! + * Macro to add all reasons (\ref BCMPKT_RX_REASON_XXX) to a set of + * reasons (\ref bcmpkt_rx_reasons_t) + */ +#define BCMPKT_RX_REASON_SET_ALL(_reasons) \ + SHR_BITSET_RANGE(((_reasons).pbits), 0, BCMPKT_RX_REASON_COUNT) + +/*! + * Macro to clear a reason (\ref BCMPKT_RX_REASON_XXX) from a set of + * reasons (\ref bcmpkt_rx_reasons_t) + */ +#define BCMPKT_RX_REASON_CLEAR(_reasons, _reason) \ + SHR_BITCLR(((_reasons).pbits), (_reason)) + +/*! + * Macro to clear a set of reasons (\ref bcmpkt_rx_reasons_t). + */ +#define BCMPKT_RX_REASON_CLEAR_ALL(_reasons) \ + SHR_BITCLR_RANGE(((_reasons).pbits), 0, BCMPKT_RX_REASON_COUNT) +/*! + * Macro to check for no reason (\ref bcmpkt_rx_reasons_t). + */ +#define BCMPKT_RX_REASON_IS_NULL(_reasons) \ + SHR_BITNULL_RANGE(((_reasons).pbits), \ + 0, BCMPKT_RX_REASON_COUNT) + +/*! + * Macro to iterate every reason (\ref bcmpkt_rx_reasons_t). + */ +#define BCMPKT_RX_REASON_ITER(_reasons, reason) \ + for(reason = BCMPKT_RX_REASON_NONE; reason < (int)BCMPKT_RX_REASON_COUNT; reason++) \ + if(BCMPKT_RX_REASON_GET(_reasons, reason)) + +/*! + * Macro to get reasons number (\ref bcmpkt_rx_reasons_t). + */ +#define BCMPKT_RX_REASONS_COUNT(_reasons, _count) \ + SHR_BITCOUNT_RANGE(((_reasons).pbits), _count, \ + 0, BCMPKT_RX_REASON_COUNT) + +/*! + * Macro to compare 2 reasons (\ref bcmpkt_rx_reasons_t), return 1 for exact match. + */ +#define BCMPKT_RX_REASON_EQ(_reasons1, _reasons2) \ + SHR_BITEQ_RANGE(((_reasons1).pbits), ((_reasons2).pbits), \ + 0, BCMPKT_RX_REASON_COUNT) +/*! \} */ + + +/*! + * \brief Get RXPMD's size for a given device type. + * + * \param [in] dev_type Device type. + * \param [out] len Bytes of RXPMD length. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Unsupported device type or bad \c len pointer. + * \retval SHR_E_UNAVAIL Not support RXPMD get function. + */ +extern int +bcmpkt_rxpmd_len_get(bcmdrd_dev_type_t dev_type, uint32_t *len); + + +/*! + * \brief Get module header's pointer of the RXPMD. + * + * This function is used for geting Module header's pointer in RXPMD. + * + * \param [in] dev_type Device type. + * \param [in] rxpmd RXPMD handle. + * \param [out] hg_hdr HiGig header handle. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support HiGig header. + * \retval SHR_E_INTERNAL Internal issue. + */ +extern int +bcmpkt_rxpmd_mh_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + uint32_t **hg_hdr); + +/*! + * \brief Get RX reasons from RXPMD. + * + * Decode packet's RX reasons into "reasons". A received packet may have one RX + * reason, multiple RX reasons, or none reason. RX reasons are in the format of + * bitmap. Each bit means one reason type (refer to \ref BCMPKT_RX_REASON_XXX). + * + * User may use \ref BCMPKT_RX_REASON_OPS to parse each individual reason based + * on this function's return value "reasons". + * + * \param [in] dev_type Device type. + * \param [in] rxpmd RXPMD handle. + * \param [out] reasons RX reasons in bit array. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support Reason. + * \retval SHR_E_INTERNAL Internal issue. + */ +extern int +bcmpkt_rxpmd_reasons_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + bcmpkt_rx_reasons_t *reasons); + +/*! + * \brief Set RX reasons into the RXPMD. (Internally used for filter configuration.) + * + * Set RX reasons into RXPMD data for packet filter purpose. + * + * \param [in] dev_type Device type. + * \param [in] reasons Reasons bit array. + * \param [in,out] rxpmd RXPMD handle. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support Reason. + * \retval SHR_E_INTERNAL Internal issue. + */ +extern int +bcmpkt_rxpmd_reasons_set(bcmdrd_dev_type_t dev_type, + bcmpkt_rx_reasons_t *reasons, uint32_t *rxpmd); + +/*! + * \brief Get field name for a given RXPMD field ID. + * + * \param [in] fid RXPMD field ID, refer to \ref BCMPKT_RXPMD_XXX. + * \param [out] name RXPMD field name string. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + */ +extern int +bcmpkt_rxpmd_field_name_get(int fid, char **name); + +/*! + * \brief Get field ID for a given RXPMD field name. + * + * \param [in] name RXPMD field name string. + * \param [out] fid RXPMD Field ID. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_NOT_FOUND Not found the name. + */ +extern int +bcmpkt_rxpmd_field_id_get(char* name, int *fid); + +/*! + * \brief Get an RX reason's name. + * + * \param [in] reason Reason ID. + * \param [out] name Reason name string handle. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + */ +extern int +bcmpkt_rx_reason_name_get(int reason, char **name); + +/*! + * \brief Return the RXPMD match id information. + * + * This routine returns the RXPMD match id information + * for the given match id name. + * + * \param [in] variant Variant type. + * \param [in] spec Match ID name. + * \param [out] info Match ID data. + * + * \retval SHR_E_NONE Success. + * \retval SHR_E_PARAM Invalid variant, spec or info. + * \retval SHR_E_UNAVAIL Match ID data is not available. + * + */ +extern int +bcmpkt_rxpmd_match_id_data_get(bcmlrd_variant_t variant, const char *spec, + const bcmlrd_match_id_db_t **info); + +#endif /* BCMPKT_RXPMD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h new file mode 100644 index 000000000000..9d908a3597b2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h @@ -0,0 +1,928 @@ +#ifndef BCMPKT_RXPMD_DEFS_H +#define BCMPKT_RXPMD_DEFS_H +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides field macros for RX Packet Metadata (RXPMD, called + * EP_TO_CPU in hardware) access. + * + ******************************************************************************/ + +/*! + * \name RX packet metadata field IDs. + * \anchor BCMPKT_RXPMD_XXX + */ +/*! \{ */ +/*! Invalid BCMPKT_RXPMD FID indicator */ +#define BCMPKT_RXPMD_FID_INVALID -1 +/*! Cell was stored in Unicast Queue in MMU. */ +#define BCMPKT_RXPMD_UNICAST_QUEUE 0 +/*! Queue number used in MMU, PBE field */ +#define BCMPKT_RXPMD_QUEUE_NUM 1 +/*! OVERLAY ON QUEUE_NUM Queue number used in MMU for cpu port, PBE field */ +#define BCMPKT_RXPMD_CPU_COS 2 +/*! + * Valid only for packets which came in on Higig+ source port. Higig+ module + * header field, PBE field. + */ +#define BCMPKT_RXPMD_HGI 3 +/*! Matched Rule, PBE field. */ +#define BCMPKT_RXPMD_MATCHED_RULE 4 +/*! DO NOT CHANGE, USED BY CMIC HW: Packet length after all modification. */ +#define BCMPKT_RXPMD_PKT_LENGTH 5 +/*! Source Port Number, PBE field. */ +#define BCMPKT_RXPMD_SRC_PORT_NUM 6 +/*! Inner VID. */ +#define BCMPKT_RXPMD_INNER_VID 7 +/*! Inner CFI */ +#define BCMPKT_RXPMD_INNER_CFI 8 +/*! Inner priority. */ +#define BCMPKT_RXPMD_INNER_PRI 9 +/*! Outer VID. */ +#define BCMPKT_RXPMD_OUTER_VID 10 +/*! Outer Canoncial Format Indicator. */ +#define BCMPKT_RXPMD_OUTER_CFI 11 +/*! Outer Priority. */ +#define BCMPKT_RXPMD_OUTER_PRI 12 +/*! Special packet. */ +#define BCMPKT_RXPMD_SPECIAL_PACKET_INDICATOR 13 +/*! Special packet type. */ +#define BCMPKT_RXPMD_SPECIAL_PACKET_TYPE 14 +/*! Set to 1 if the DSCP value has been changed by the EP */ +#define BCMPKT_RXPMD_CHANGE_DSCP 15 +/*! New DSCP value computed by the chip (EP) for the packet */ +#define BCMPKT_RXPMD_DSCP 16 +/*! Change the ECN as indicated by the IFP. */ +#define BCMPKT_RXPMD_CHANGE_ECN 17 +/*! New ECN value provided by the IFP. */ +#define BCMPKT_RXPMD_ECN 18 +/*! + * NEW This pretty much maps from EP_TO_CPU_HEADER_OVERLAY_TYPE from the MPB + * 0: Invalid + * 1: TIMESTAMP field carries the LM packet-count for an OAM loss measurement + * packet + * 2: TIMESTAMP_UPPER,TIMESTAMP fields carry the 64-bit DM Time-stamp for an + * OAMdelay measurement packet + * 3: 802.1AS timestamp in the TIMESTAMP field + */ +#define BCMPKT_RXPMD_TIMESTAMP_TYPE 19 +/*! Low 32 bits of timestamp. */ +#define BCMPKT_RXPMD_TIMESTAMP 20 +/*! High 32/16bits of timestamp. */ +#define BCMPKT_RXPMD_TIMESTAMP_HI 21 +/*! Mirror-to-Port Index, PBE field */ +#define BCMPKT_RXPMD_MTP_INDEX 22 +/*! BPDU Packet, PBE field */ +#define BCMPKT_RXPMD_BPDU 23 +/*! Indicates the packet is generated as a result of packet replication */ +#define BCMPKT_RXPMD_REPLICATION 24 +/*! L3 IP Multicast Packet Flag, PBE field */ +#define BCMPKT_RXPMD_L3ONLY 25 +/*! Indicates packet was routed - UC OR MC */ +#define BCMPKT_RXPMD_IP_ROUTED 26 +/*! Source port is Higig. */ +#define BCMPKT_RXPMD_SRC_HIGIG 27 +/*! Source port is Higig2. */ +#define BCMPKT_RXPMD_SRC_HIGIG2 28 +/*! Indicates all switch copies were dropped in MMU (for copies to CPU port). */ +#define BCMPKT_RXPMD_UC_SW_COPY_DROPPED 29 +/*! + * Flag to indicate this is a switched packet as opposed to a mirrored packet, + * PBE field + */ +#define BCMPKT_RXPMD_SWITCH 30 +/*! Indicates there is an SD tag in the packet */ +#define BCMPKT_RXPMD_SD_TAG_PRESENT 31 +/*! + * Indicates ingress inner VLAN tag action, PBE field: + * 0: do not modify, 1: add I-VID, 2: replace I-VID, 3: remove I-VID + */ +#define BCMPKT_RXPMD_ING_ITAG_ACTION 32 +/*! + * Indicates ingress outer VLAN tag action, PBE field: + * 0: do not modify, 1: add O-VID, 2: replace O-VID, 3: reserved + */ +#define BCMPKT_RXPMD_ING_OTAG_ACTION 33 +/*! + * Indicates the incoming tag status (INCOMING_TAG_STATUS): + * For single tag device: + * 0: untagged, 1: tagged + * For double tag device: + * 0: untagged, 1: single inner-tag, 2: single outer-tag, 3: double tagged + */ +#define BCMPKT_RXPMD_ING_TAG_TYPE 34 +/*! + * This field is set by the ingress chip to indicate to the egress chip that 1588 + * 1-step ingress correction update has been applied to this packet. Egress chip + * uses this bit when egress port CF_UPDATE_MODE is set to ING_UPDATE_BASED_ENABLE. + * Encodings are: + * 0: Ingress correction update has NOT been applied to the packet. When configured + * in coupled mode, egress chip must NOT apply the egress correction update for + * this packet. + * 1: Ingress correction update has been applied to the packet. When configured in + * coupled mode, egress chip must apply the egress correction update. + */ +#define BCMPKT_RXPMD_ONE_STEP_1588_ING_UPDATE_DONE 35 +/*! The full 32-bit EH tag */ +#define BCMPKT_RXPMD_EH_TAG 36 +/*! + * Defines the header type enabling flexibility for future applications. + * 0x0: Queue selections for Sirius/Arad. + * 0x1: ClassID + * 0x2: ClassID + QTag + * 0x3-0x15: Reserved for future use. + */ +#define BCMPKT_RXPMD_EH_TYPE 37 +/*! See EH_SEG_SEL_ENCODING format */ +#define BCMPKT_RXPMD_EH_TYPE_0_EH_SEG_SEL 38 +/*! + * EH queue tag assignment + * 00: No EH queue tag assignment, + * 01-11: EH queue tag assignment modes + */ +#define BCMPKT_RXPMD_EH_TYPE_0_EH_TAG_TYPE 39 +/*! EH queue tag */ +#define BCMPKT_RXPMD_EH_TYPE_0_EH_QUEUE_TAG 40 +/*! Type of CLASSID */ +#define BCMPKT_RXPMD_EH_TYPE_1_CLASSID_TYPE 41 +/*! L3_IIF */ +#define BCMPKT_RXPMD_EH_TYPE_1_L3_IIF 42 +/*! CLASSID */ +#define BCMPKT_RXPMD_EH_TYPE_1_CLASSID 43 +/*! Type of CLASSID */ +#define BCMPKT_RXPMD_EH_TYPE_2_CLASSID_TYPE 44 +/*! CLASSID */ +#define BCMPKT_RXPMD_EH_TYPE_2_CLASSID 45 +/*! L3_IIF */ +#define BCMPKT_RXPMD_EH_TYPE_2_EH_QUEUE_TAG 46 +/*! Indicates the Session ID for the Rx BFD packet.Valid when OAM_PKT_TYPE=2 */ +#define BCMPKT_RXPMD_RX_BFD_START_OFFSET 47 +/*! Indicates the Session ID for the Rx BFD packet.Valid when OAM_PKT_TYPE=2 */ +#define BCMPKT_RXPMD_RX_BFD_START_OFFSET_TYPE 48 +/*! Indicates the Session ID for the Rx BFD packet.Valid when OAM_PKT_TYPE=2 */ +#define BCMPKT_RXPMD_RX_BFD_SESSION_INDEX 49 +/*! The reason code TYPE. */ +#define BCMPKT_RXPMD_REASON_TYPE 50 +/*! + * This should be the final control in the EP indicating to not change the TTL, + * from any source. + */ +#define BCMPKT_RXPMD_DO_NOT_CHANGE_TTL 51 +/*! Valid for non-BFD packet */ +#define BCMPKT_RXPMD_I2E_CLASSID_TYPE 52 +/*! Valid for non-BFD packet */ +#define BCMPKT_RXPMD_I2E_CLASSID 53 +/*! Ingress L3 Intf number. */ +#define BCMPKT_RXPMD_ING_L3_INTF 54 +/*! Indication to next pass about the type of loopback. */ +#define BCMPKT_RXPMD_LOOPBACK_PACKET_TYPE 55 +/*! If set, then packet has been modified by the EP and CRC needs to be regenerated */ +#define BCMPKT_RXPMD_REGEN_CRC 56 +/*! Entropy label. */ +#define BCMPKT_RXPMD_ENTROPY_LABEL 57 +/*! Used to indicate if and how a tunnel has been decapsulated from the packet. */ +#define BCMPKT_RXPMD_TUNNEL_DECAP_TYPE 58 +/*! DLB_ID valid. */ +#define BCMPKT_RXPMD_DLB_ID_VALID 59 +/*! DLB_ID. */ +#define BCMPKT_RXPMD_DLB_ID 60 +/*! HG2 Extended Header Valid. (was in FRC_reserved) */ +#define BCMPKT_RXPMD_HG2_EXT_HDR_VALID 61 +/*! + * New field for VNTAG/ETAGs: 00: Do not Modify + * 01: Add/Replace incoming VNTAG/ETAG with Ingress Port Based VNTAG + * 10: Add/Replace incoming VNTAG/ETAG with Ingress Port Based ETAG. + * 11: Delete Packets VNTAG/ETAG + */ +#define BCMPKT_RXPMD_VNTAG_ACTION 62 +/*! If set, the DVP/NHOP_INDEX overlay has the DVP. Else, it has the Next Hop Index. */ +#define BCMPKT_RXPMD_DVP_NHI_SEL 63 +/*! Validates VFI field */ +#define BCMPKT_RXPMD_VFI_VALID 64 +/*! + * This field's msb is the replication type from the EGR_IPMC table. + * It is a flag that determines the contents of the lower 15-bits. + * 0 => Lower 16-bits contain the IPMC_INTF_NUM from the MMU + * 1 => Lower 16-bits contain the NEXT_HOP_INDEX from the Ingress Pipeline + */ +#define BCMPKT_RXPMD_REPLICATION_OR_NHOP_INDEX 65 +/*! Low 32 bits of the packet MATCH_ID. */ +#define BCMPKT_RXPMD_MATCH_ID_LO 66 +/*! High 18 bits of the packet MATCH_ID. */ +#define BCMPKT_RXPMD_MATCH_ID_HI 67 +/*! MPB flex data_type from MPB_FIXED.flex_data_type */ +#define BCMPKT_RXPMD_MPB_FLEX_DATA_TYPE 68 +/*! From EPRE/EDEV_CONFIG table EGR_INT_CN_UPDPATE.int_cn */ +#define BCMPKT_RXPMD_INT_CN 69 +/*! From MPB_FIXED */ +#define BCMPKT_RXPMD_CNG 70 +/*! From MPB_FIXED */ +#define BCMPKT_RXPMD_EGR_ZONE_REMAP_CTRL 71 +/*! Constant specified in NPL */ +#define BCMPKT_RXPMD_DMA_HEADER_VERSION 72 +/*! Multicast packet from MPB_FIXED */ +#define BCMPKT_RXPMD_MULTICAST 73 +/*! Copy to CPU from MPB_FIXED */ +#define BCMPKT_RXPMD_COPY_TO_CPU 74 +/*! Trucate CPU copy from MPB_FIXED */ +#define BCMPKT_RXPMD_TRUNCATE_CPU_COPY 75 +/*! Incoming INT header type. */ +#define BCMPKT_RXPMD_INCOMING_INT_HDR_TYPE 76 +/*! MPB_FIXED.dop_trigger. */ +#define BCMPKT_RXPMD_DOP_TRIGGER 77 +/*! From EPRE. If mirror pkt then == MIRROR_ENCAP_INDEx else == eparse_extract_offsets[3:0]. */ +#define BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX 78 +/*! Eparse_extract_offsets[7:4]. */ +#define BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_7_4 79 +/*! Valid for non-BFD packet */ +#define BCMPKT_RXPMD_ING_L3_INTF_VALID 80 +/*! Overlay next hop. */ +#define BCMPKT_RXPMD_O_NHI 81 +/*! Inner Entropy Used indication */ +#define BCMPKT_RXPMD_IEU 82 +/*! IEU indication is valid */ +#define BCMPKT_RXPMD_IEU_VALID 83 +/*! incoming opaque tag status indication */ +#define BCMPKT_RXPMD_INCOMING_OPAQUE_TAG_STATUS 84 +/*! Eparse_extract_offsets[6:4]. */ +#define BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_6_4 85 +/*! From EDEV_CONFIG.SRC_SUBPORT_TABLE. */ +#define BCMPKT_RXPMD_ING_PP_PORT 86 +/*! Low 32 bits of the packet ARC_ID. */ +#define BCMPKT_RXPMD_ARC_ID_LO 87 +/*! High 18 bits of the packet ARC_ID. */ +#define BCMPKT_RXPMD_ARC_ID_HI 88 +/*! IEEE 802_1AS timestamp status. */ +#define BCMPKT_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED 89 +/*! VRF */ +#define BCMPKT_RXPMD_VRF 90 +/*! RX chip port. */ +#define BCMPKT_RXPMD_RX_CHIP_PORT 91 +/*! VPP copy. */ +#define BCMPKT_RXPMD_VPP_COPY_TYPE 92 +/*! RXPMD FIELD ID NUMBER */ +#define BCMPKT_RXPMD_FID_COUNT 93 +/*! \} */ + +/*! RXPMD field name strings for debugging. */ +#define BCMPKT_RXPMD_FIELD_NAME_MAP_INIT \ + {"UNICAST_QUEUE", BCMPKT_RXPMD_UNICAST_QUEUE},\ + {"QUEUE_NUM", BCMPKT_RXPMD_QUEUE_NUM},\ + {"CPU_COS", BCMPKT_RXPMD_CPU_COS},\ + {"HGI", BCMPKT_RXPMD_HGI},\ + {"MATCHED_RULE", BCMPKT_RXPMD_MATCHED_RULE},\ + {"PKT_LENGTH", BCMPKT_RXPMD_PKT_LENGTH},\ + {"SRC_PORT_NUM", BCMPKT_RXPMD_SRC_PORT_NUM},\ + {"INNER_VID", BCMPKT_RXPMD_INNER_VID},\ + {"INNER_CFI", BCMPKT_RXPMD_INNER_CFI},\ + {"INNER_PRI", BCMPKT_RXPMD_INNER_PRI},\ + {"OUTER_VID", BCMPKT_RXPMD_OUTER_VID},\ + {"OUTER_CFI", BCMPKT_RXPMD_OUTER_CFI},\ + {"OUTER_PRI", BCMPKT_RXPMD_OUTER_PRI},\ + {"SPECIAL_PACKET_INDICATOR", BCMPKT_RXPMD_SPECIAL_PACKET_INDICATOR},\ + {"SPECIAL_PACKET_TYPE", BCMPKT_RXPMD_SPECIAL_PACKET_TYPE},\ + {"CHANGE_DSCP", BCMPKT_RXPMD_CHANGE_DSCP},\ + {"DSCP", BCMPKT_RXPMD_DSCP},\ + {"CHANGE_ECN", BCMPKT_RXPMD_CHANGE_ECN},\ + {"ECN", BCMPKT_RXPMD_ECN},\ + {"TIMESTAMP_TYPE", BCMPKT_RXPMD_TIMESTAMP_TYPE},\ + {"TIMESTAMP", BCMPKT_RXPMD_TIMESTAMP},\ + {"TIMESTAMP_HI", BCMPKT_RXPMD_TIMESTAMP_HI},\ + {"MTP_INDEX", BCMPKT_RXPMD_MTP_INDEX},\ + {"BPDU", BCMPKT_RXPMD_BPDU},\ + {"REPLICATION", BCMPKT_RXPMD_REPLICATION},\ + {"L3ONLY", BCMPKT_RXPMD_L3ONLY},\ + {"IP_ROUTED", BCMPKT_RXPMD_IP_ROUTED},\ + {"SRC_HIGIG", BCMPKT_RXPMD_SRC_HIGIG},\ + {"SRC_HIGIG2", BCMPKT_RXPMD_SRC_HIGIG2},\ + {"UC_SW_COPY_DROPPED", BCMPKT_RXPMD_UC_SW_COPY_DROPPED},\ + {"SWITCH", BCMPKT_RXPMD_SWITCH},\ + {"SD_TAG_PRESENT", BCMPKT_RXPMD_SD_TAG_PRESENT},\ + {"ING_ITAG_ACTION", BCMPKT_RXPMD_ING_ITAG_ACTION},\ + {"ING_OTAG_ACTION", BCMPKT_RXPMD_ING_OTAG_ACTION},\ + {"ING_TAG_TYPE", BCMPKT_RXPMD_ING_TAG_TYPE},\ + {"ONE_STEP_1588_ING_UPDATE_DONE", BCMPKT_RXPMD_ONE_STEP_1588_ING_UPDATE_DONE},\ + {"EH_TAG", BCMPKT_RXPMD_EH_TAG},\ + {"EH_TYPE", BCMPKT_RXPMD_EH_TYPE},\ + {"EH_TYPE_0::EH_SEG_SEL", BCMPKT_RXPMD_EH_TYPE_0_EH_SEG_SEL},\ + {"EH_TYPE_0::EH_TAG_TYPE", BCMPKT_RXPMD_EH_TYPE_0_EH_TAG_TYPE},\ + {"EH_TYPE_0::EH_QUEUE_TAG", BCMPKT_RXPMD_EH_TYPE_0_EH_QUEUE_TAG},\ + {"EH_TYPE_1::CLASSID_TYPE", BCMPKT_RXPMD_EH_TYPE_1_CLASSID_TYPE},\ + {"EH_TYPE_1::L3_IIF", BCMPKT_RXPMD_EH_TYPE_1_L3_IIF},\ + {"EH_TYPE_1::CLASSID", BCMPKT_RXPMD_EH_TYPE_1_CLASSID},\ + {"EH_TYPE_2::CLASSID_TYPE", BCMPKT_RXPMD_EH_TYPE_2_CLASSID_TYPE},\ + {"EH_TYPE_2::CLASSID", BCMPKT_RXPMD_EH_TYPE_2_CLASSID},\ + {"EH_TYPE_2::EH_QUEUE_TAG", BCMPKT_RXPMD_EH_TYPE_2_EH_QUEUE_TAG},\ + {"RX_BFD_START_OFFSET", BCMPKT_RXPMD_RX_BFD_START_OFFSET},\ + {"RX_BFD_START_OFFSET_TYPE", BCMPKT_RXPMD_RX_BFD_START_OFFSET_TYPE},\ + {"RX_BFD_SESSION_INDEX", BCMPKT_RXPMD_RX_BFD_SESSION_INDEX},\ + {"REASON_TYPE", BCMPKT_RXPMD_REASON_TYPE},\ + {"DO_NOT_CHANGE_TTL", BCMPKT_RXPMD_DO_NOT_CHANGE_TTL},\ + {"I2E_CLASSID_TYPE", BCMPKT_RXPMD_I2E_CLASSID_TYPE},\ + {"I2E_CLASSID", BCMPKT_RXPMD_I2E_CLASSID},\ + {"ING_L3_INTF", BCMPKT_RXPMD_ING_L3_INTF},\ + {"LOOPBACK_PACKET_TYPE", BCMPKT_RXPMD_LOOPBACK_PACKET_TYPE},\ + {"REGEN_CRC", BCMPKT_RXPMD_REGEN_CRC},\ + {"ENTROPY_LABEL", BCMPKT_RXPMD_ENTROPY_LABEL},\ + {"TUNNEL_DECAP_TYPE", BCMPKT_RXPMD_TUNNEL_DECAP_TYPE},\ + {"DLB_ID_VALID", BCMPKT_RXPMD_DLB_ID_VALID},\ + {"DLB_ID", BCMPKT_RXPMD_DLB_ID},\ + {"HG2_EXT_HDR_VALID", BCMPKT_RXPMD_HG2_EXT_HDR_VALID},\ + {"VNTAG_ACTION", BCMPKT_RXPMD_VNTAG_ACTION},\ + {"DVP_NHI_SEL", BCMPKT_RXPMD_DVP_NHI_SEL},\ + {"VFI_VALID", BCMPKT_RXPMD_VFI_VALID},\ + {"REPLICATION_OR_NHOP_INDEX", BCMPKT_RXPMD_REPLICATION_OR_NHOP_INDEX},\ + {"MATCH_ID_LO", BCMPKT_RXPMD_MATCH_ID_LO},\ + {"MATCH_ID_HI", BCMPKT_RXPMD_MATCH_ID_HI},\ + {"MPB_FLEX_DATA_TYPE", BCMPKT_RXPMD_MPB_FLEX_DATA_TYPE},\ + {"INT_CN", BCMPKT_RXPMD_INT_CN},\ + {"CNG", BCMPKT_RXPMD_CNG},\ + {"EGR_ZONE_REMAP_CTRL", BCMPKT_RXPMD_EGR_ZONE_REMAP_CTRL},\ + {"DMA_HEADER_VERSION", BCMPKT_RXPMD_DMA_HEADER_VERSION},\ + {"MULTICAST", BCMPKT_RXPMD_MULTICAST},\ + {"COPY_TO_CPU", BCMPKT_RXPMD_COPY_TO_CPU},\ + {"TRUNCATE_CPU_COPY", BCMPKT_RXPMD_TRUNCATE_CPU_COPY},\ + {"INCOMING_INT_HDR_TYPE", BCMPKT_RXPMD_INCOMING_INT_HDR_TYPE},\ + {"DOP_TRIGGER", BCMPKT_RXPMD_DOP_TRIGGER},\ + {"EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX", BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX},\ + {"EPARSE_EXTRACT_OFFSETS_7_4", BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_7_4},\ + {"ING_L3_INTF_VALID", BCMPKT_RXPMD_ING_L3_INTF_VALID},\ + {"O_NHI", BCMPKT_RXPMD_O_NHI},\ + {"IEU", BCMPKT_RXPMD_IEU},\ + {"IEU_VALID", BCMPKT_RXPMD_IEU_VALID},\ + {"INCOMING_OPAQUE_TAG_STATUS", BCMPKT_RXPMD_INCOMING_OPAQUE_TAG_STATUS},\ + {"EPARSE_EXTRACT_OFFSETS_6_4", BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_6_4},\ + {"ING_PP_PORT", BCMPKT_RXPMD_ING_PP_PORT},\ + {"ARC_ID_LO", BCMPKT_RXPMD_ARC_ID_LO},\ + {"ARC_ID_HI", BCMPKT_RXPMD_ARC_ID_HI},\ + {"IEEE_802_1AS_TIMESTAMP_ENABLED", BCMPKT_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED},\ + {"VRF", BCMPKT_RXPMD_VRF},\ + {"RX_CHIP_PORT", BCMPKT_RXPMD_RX_CHIP_PORT},\ + {"VPP_COPY_TYPE", BCMPKT_RXPMD_VPP_COPY_TYPE},\ + {"fid count", BCMPKT_RXPMD_FID_COUNT} + +/*! + * \name BCMPKT_RXPMD_TIMESTAMP_TYPE encodings. + * \anchor BCMPKT_RXPMD_TIMESTAMP_TYPE_XXX + */ +/*! \{ */ +/*! */ +#define BCMPKT_RXPMD_TIMESTAMP_T_INVALID 0 +/*! */ +#define BCMPKT_RXPMD_TIMESTAMP_T_MMU_32NS 1 +/*! */ +#define BCMPKT_RXPMD_TIMESTAMP_T_OAM_LM 1 +/*! */ +#define BCMPKT_RXPMD_TIMESTAMP_T_OAM_DM 2 +/*! */ +#define BCMPKT_RXPMD_TIMESTAMP_T_PM_8NS 2 +/*! */ +#define BCMPKT_RXPMD_TIMESTAMP_T_IEEE_802_1AS 3 +/*! */ +#define BCMPKT_RXPMD_TIMESTAMP_T_PM_1NS 3 +/*! \} */ + +/*! BCMPKT_RXPMD_TIMESTAMP_TYPE encoding name strings for debugging. */ +#define BCMPKT_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT \ + {"INVALID", BCMPKT_RXPMD_TIMESTAMP_T_INVALID},\ + {"MMU_32NS", BCMPKT_RXPMD_TIMESTAMP_T_MMU_32NS},\ + {"OAM_LM", BCMPKT_RXPMD_TIMESTAMP_T_OAM_LM},\ + {"OAM_DM", BCMPKT_RXPMD_TIMESTAMP_T_OAM_DM},\ + {"PM_8NS", BCMPKT_RXPMD_TIMESTAMP_T_PM_8NS},\ + {"IEEE_802_1AS", BCMPKT_RXPMD_TIMESTAMP_T_IEEE_802_1AS},\ + {"PM_1NS", BCMPKT_RXPMD_TIMESTAMP_T_PM_1NS},\ + +/*! + * \name BCMPKT_RXPMD_ING_TAG_TYPE encodings. + * \anchor BCMPKT_RXPMD_ING_TAG_TYPE_XXX + */ +/*! \{ */ +/*! No tag */ +#define BCMPKT_RXPMD_ING_TAG_T_NONE 0 +/*! Singgle inner tag */ +#define BCMPKT_RXPMD_ING_TAG_T_SINGLE_INNER 1 +/*! Tagged */ +#define BCMPKT_RXPMD_ING_TAG_T_TAGGED 1 +/*! Singgle outer tag */ +#define BCMPKT_RXPMD_ING_TAG_T_SINGLE_OUTER 2 +/*! Double tags */ +#define BCMPKT_RXPMD_ING_TAG_T_DOUBLE 3 +/*! \} */ + +/*! BCMPKT_RXPMD_ING_TAG_TYPE encoding name strings for debugging. */ +#define BCMPKT_RXPMD_ING_TAG_TYPE_NAME_MAP_INIT \ + {"NONE", BCMPKT_RXPMD_ING_TAG_T_NONE},\ + {"SINGLE_INNER", BCMPKT_RXPMD_ING_TAG_T_SINGLE_INNER},\ + {"TAGGED", BCMPKT_RXPMD_ING_TAG_T_TAGGED},\ + {"SINGLE_OUTER", BCMPKT_RXPMD_ING_TAG_T_SINGLE_OUTER},\ + {"DOUBLE", BCMPKT_RXPMD_ING_TAG_T_DOUBLE},\ + +/*! + * \name BCMPKT_RXPMD_EH_TYPE encodings. + * \anchor BCMPKT_RXPMD_EH_TYPE_XXX + */ +/*! \{ */ +/*! */ +#define BCMPKT_RXPMD_EH_T_0 0 +/*! */ +#define BCMPKT_RXPMD_EH_T_1 1 +/*! */ +#define BCMPKT_RXPMD_EH_T_2 2 +/*! \} */ + +/*! BCMPKT_RXPMD_EH_TYPE encoding name strings for debugging. */ +#define BCMPKT_RXPMD_EH_TYPE_NAME_MAP_INIT \ + {"EH_TYPE_0", BCMPKT_RXPMD_EH_T_0},\ + {"EH_TYPE_1", BCMPKT_RXPMD_EH_T_1},\ + {"EH_TYPE_2", BCMPKT_RXPMD_EH_T_2},\ + +/*! + * \name BCMPKT_RXPMD_REASON_TYPE encodings. + * \anchor BCMPKT_RXPMD_REASON_TYPE_XXX + */ +/*! \{ */ +/*! */ +#define BCMPKT_RXPMD_REASON_T_FROM_IP 0 +/*! */ +#define BCMPKT_RXPMD_REASON_T_FROM_EP 1 +/*! \} */ + +/*! BCMPKT_RXPMD_REASON_TYPE encoding name strings for debugging. */ +#define BCMPKT_RXPMD_REASON_TYPE_NAME_MAP_INIT \ + {"CTC_INITIATED_FROM_IP", BCMPKT_RXPMD_REASON_T_FROM_IP},\ + {"CTC_INITIATED_FROM_EP", BCMPKT_RXPMD_REASON_T_FROM_EP},\ + +/*! + * \name RX packet metadata internal usage field IDs. + * \anchor BCMPKT_RXPMD_I_XXX + */ +/*! \{ */ +/*! Invalid BCMPKT_RXPMD_I FID indicator */ +#define BCMPKT_RXPMD_I_FID_INVALID -1 +/*! RXPMD raw data size. */ +#define BCMPKT_RXPMD_I_SIZE 0 +/*! Contains RX reasons. Refer to bcmpkt_rxpmd_reasons_get to decode reasons. */ +#define BCMPKT_RXPMD_I_REASON 1 +/*! Module Header information. Refer to Higig macros to encode/decode this erea. */ +#define BCMPKT_RXPMD_I_MODULE_HDR 2 +/*! MPB flex_data */ +#define BCMPKT_RXPMD_I_FLEX_DATA 3 +/*! RXPMD_I FIELD ID NUMBER */ +#define BCMPKT_RXPMD_I_FID_COUNT 4 +/*! \} */ + +/*! RXPMD_I field name strings for debugging. */ +#define BCMPKT_RXPMD_I_FIELD_NAME_MAP_INIT \ + {"SIZE", BCMPKT_RXPMD_I_SIZE},\ + {"REASON", BCMPKT_RXPMD_I_REASON},\ + {"MODULE_HDR", BCMPKT_RXPMD_I_MODULE_HDR},\ + {"FLEX_DATA", BCMPKT_RXPMD_I_FLEX_DATA},\ + {"fid count", BCMPKT_RXPMD_I_FID_COUNT} + +/*! + * \name Packet RX Reason Types. + * \anchor BCMPKT_RX_REASON_XXX + */ +/*! \{ */ +/*! No reason */ +#define BCMPKT_RX_REASON_NONE 0 +/*! Adapt miss. */ +#define BCMPKT_RX_REASON_ADAPT_MISS 1 +/*! IPMC interface mismatch */ +#define BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH 2 +/*! Get: Indicate NAT REASON happened; Set: Configure NAT REASON mask. */ +#define BCMPKT_RX_REASON_NAT 3 +/*! TCP/UDP packet NAT lookup miss. */ +#define BCMPKT_RX_REASON_NAT_TCP_UDP_MISS 4 +/*! ICMP packet NAT lookup miss. */ +#define BCMPKT_RX_REASON_NAT_ICMP_MISS 5 +/*! NAT lookup on fragmented packet. */ +#define BCMPKT_RX_REASON_NAT_FRAGMENT 6 +/*! Non TCP/UDP/ICMP packet NAT lookup miss. */ +#define BCMPKT_RX_REASON_NAT_OTHER_MISS 7 +/*! FCOE zone check fail */ +#define BCMPKT_RX_REASON_FCOE_ZONE_CHECK_FAIL 11 +/*! VXLAN VNID miss */ +#define BCMPKT_RX_REASON_VXLAN_VN_ID_MISS 12 +/*! VXLAN SIP miss */ +#define BCMPKT_RX_REASON_VXLAN_SIP_MISS 13 +/*! QCN_CNM_PRP_DLF */ +#define BCMPKT_RX_REASON_QCN_CNM_PRP_DLF 14 +/*! QCN_CNM_PRP */ +#define BCMPKT_RX_REASON_QCN_CNM_PRP 15 +/*! MPLS_ALERT_LABEL */ +#define BCMPKT_RX_REASON_MPLS_ALERT_LABEL 16 +/*! MPLS_ILLEGAL_RESERVED_LABEL */ +#define BCMPKT_RX_REASON_MPLS_ILLEGAL_RESERVED_LABEL 17 +/*! ICNM */ +#define BCMPKT_RX_REASON_ICNM 18 +/*! Copy to CPU for visibility packet */ +#define BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU 19 +/*! BFD Error */ +#define BCMPKT_RX_REASON_BFD_ERROR 20 +/*! BFD Slowpath to CPU */ +#define BCMPKT_RX_REASON_BFD_SLOWPATH 21 +/*! L2GRE_VPNID_MISS */ +#define BCMPKT_RX_REASON_L2GRE_VPNID_MISS 22 +/*! L2GRE_SIP_MISS */ +#define BCMPKT_RX_REASON_L2GRE_SIP_MISS 23 +/*! Get: Indicate TRILL REASON happened; Set: Configure TRILL REASON mask. */ +#define BCMPKT_RX_REASON_TRILL 24 +/*! Trill Header Error */ +#define BCMPKT_RX_REASON_TRILL_HDR_ERROR 25 +/*! Trill Lookup Miss */ +#define BCMPKT_RX_REASON_TRILL_LOOKUP_MISS 26 +/*! Trill RPF Check Fail */ +#define BCMPKT_RX_REASON_TRILL_RPF_CHECK_FAIL 27 +/*! Trill Slow Path */ +#define BCMPKT_RX_REASON_TRILL_SLOWPATH 28 +/*! Trill Core IS-IS */ +#define BCMPKT_RX_REASON_TRILL_CORE_IS_IS_PKT 29 +/*! Trill Hop Count Check Failure */ +#define BCMPKT_RX_REASON_TRILL_HOP_COUNT_CHECK_FAIL 30 +/*! Rbridge nickname lookup copy to cpu */ +#define BCMPKT_RX_REASON_TRILL_NICKNAME_TABLE 31 +/*! Tunnel decap ECN error */ +#define BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR 32 +/*! OAM packets copied to the CPU for slowpath processing */ +#define BCMPKT_RX_REASON_OAM_SLOWPATH 33 +/*! + * Indicates packet was copied to CPU due to a network time sync packet. This is + * set either by dedicated IEEE 802.1AS controls or the FP. + */ +#define BCMPKT_RX_REASON_TIME_SYNC 34 +/*! Indicates packet was copied to the CPU due to VLAN Translation miss. */ +#define BCMPKT_RX_REASON_VXLT_MISS 35 +/*! Get: Indicate NIV REASON happened; Set: Configure NIV REASON mask. */ +#define BCMPKT_RX_REASON_NIV 36 +/*! Dot1p Admittance Discard */ +#define BCMPKT_RX_REASON_NIV_DOT1P_DROP 37 +/*! VIF Lookup Miss */ +#define BCMPKT_RX_REASON_NIV_VIF_MISS 38 +/*! RPF Lookup Miss */ +#define BCMPKT_RX_REASON_NIV_RPF_MISS 39 +/*! VNTAG Format Error */ +#define BCMPKT_RX_REASON_NIV_VNTAG_ERROR 40 +/*! VNTAG Present Drop */ +#define BCMPKT_RX_REASON_NIV_VNTAG_PRESENT 41 +/*! VNTAG Not Present Drop */ +#define BCMPKT_RX_REASON_NIV_VNTAG_NOT_PRESENT 42 +/*! Copy to CPU for MY_STATION match reason */ +#define BCMPKT_RX_REASON_MY_STATION 44 +/*! MPLS unknown ACH */ +#define BCMPKT_RX_REASON_MPLS_UNKNOWN_ACH_ERROR 45 +/*! ING_L3_NEXT_HOP table copy to CPU */ +#define BCMPKT_RX_REASON_L3_NEXT_HOP 46 +/*! Provider Backbone Transport pkt is not unicast */ +#define BCMPKT_RX_REASON_PBT_NONUC_PKT 47 +/*! Bit32 - MPLS sequence number check fail */ +#define BCMPKT_RX_REASON_MPLS_SEQ_NUM_FAIL 48 +/*! Bit31 - MPLS TTL check fail */ +#define BCMPKT_RX_REASON_MPLS_TTL_CHECK_FAIL 49 +/*! Bit30 - MPLS invalid payload */ +#define BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD 50 +/*! Bit29 - MPLS invalid label action */ +#define BCMPKT_RX_REASON_MPLS_INVALID_ACTION 51 +/*! Bit28 - MPLS label lookup miss */ +#define BCMPKT_RX_REASON_MPLS_LABEL_MISS 52 +/*! Copy to CPU for MAC to IP bind check failures */ +#define BCMPKT_RX_REASON_MAC_BIND_FAIL 53 +/*! Bit26 - CBSM_PREVENTED - copy to CPU */ +#define BCMPKT_RX_REASON_CBSM_PREVENTED 54 +/*! Bit25 - VFP Action - copy to CPU */ +#define BCMPKT_RX_REASON_CPU_VFP 55 +/*! Bit24 - Multicast index error */ +#define BCMPKT_RX_REASON_MCIDX_ERROR 56 +/*! Bit23 - HiGig Header error */ +#define BCMPKT_RX_REASON_HGHDR_ERROR 57 +/*! Bit22 - L3 MTU check fail to CPU */ +#define BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL 58 +/*! Bit21 - Parity error on IP tables */ +#define BCMPKT_RX_REASON_PARITY_ERROR 59 +/*! Bit20 - L3 slow path CPU processed packets */ +#define BCMPKT_RX_REASON_L3_SLOWPATH 60 +/*! Bit19 - ICMP Redirect copy to CPU */ +#define BCMPKT_RX_REASON_ICMP_REDIRECT 61 +/*! Bit18 - Flex Sflow */ +#define BCMPKT_RX_REASON_CPU_SFLOW_FLEX 62 +/*! Bit17 - Tunnel error trap to CPU */ +#define BCMPKT_RX_REASON_CPU_TUNNEL_ERR 63 +/*! Bit16 - Martian address trap to CPU */ +#define BCMPKT_RX_REASON_CPU_MARTIAN_ADDR 64 +/*! Bit15 - DOS attack trap to CPU */ +#define BCMPKT_RX_REASON_CPU_DOS_ATTACK 65 +/*! Bit14 - Protocol Packet */ +#define BCMPKT_RX_REASON_CPU_PROTOCOL_PKT 66 +/*! Bit13 - L3 header - IP options, TTL=0, !IPv4 etc. */ +#define BCMPKT_RX_REASON_CPU_L3HDR_ERR 67 +/*! Bit12 - FFP Action - copy to CPU */ +#define BCMPKT_RX_REASON_CPU_FFP 68 +/*! Bit11 - IPMC miss - {SIP, DIP} miss or DIP miss */ +#define BCMPKT_RX_REASON_CPU_IPMC_MISS 69 +/*! Bit10 - MC miss */ +#define BCMPKT_RX_REASON_CPU_MC_MISS 70 +/*! Bit9 - Station Movement - L3 */ +#define BCMPKT_RX_REASON_CPU_L3SRC_MOVE 71 +/*! Bit8 - L3 DIP Miss */ +#define BCMPKT_RX_REASON_CPU_L3DST_MISS 72 +/*! Bit7 - L3 SIP Miss */ +#define BCMPKT_RX_REASON_CPU_L3SRC_MISS 73 +/*! Bit6 - sFlow - Dst */ +#define BCMPKT_RX_REASON_CPU_SFLOW_DST 74 +/*! Bit5 - sFlow - Src */ +#define BCMPKT_RX_REASON_CPU_SFLOW_SRC 75 +/*! Bit4 - L2_TABLE - copy to CPU */ +#define BCMPKT_RX_REASON_CPU_L2CPU 76 +/*! Bit3- Station Movement - L2 */ +#define BCMPKT_RX_REASON_CPU_L2MOVE 77 +/*! Bit2 - DLF, */ +#define BCMPKT_RX_REASON_CPU_DLF 78 +/*! Bit1 - SLF */ +#define BCMPKT_RX_REASON_CPU_SLF 79 +/*! Bit0- CPU Learn bit is set in PTABLE and SA is learnt; unknown VLAN; VID = 0xfff */ +#define BCMPKT_RX_REASON_CPU_UVLAN 80 +/*! Bit18 - protection data dropped packet copied to CPU */ +#define BCMPKT_RX_REASON_PROTECTION_DATA_DROP 81 +/*! OAM packets copied to the CPU for error cases */ +#define BCMPKT_RX_REASON_OAM_ERROR 82 +/*! Copy to CPU for OAM LMDM */ +#define BCMPKT_RX_REASON_OAM_LMDM 83 +/*! Get: Indicate SFLOW REASON happened; Set: Configure SFLOW REASON mask. */ +#define BCMPKT_RX_REASON_CPU_SFLOW 84 +/*! FP based Sflow */ +#define BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX 85 +/*! Egress port-based Sflow */ +#define BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST 86 +/*! Ingress port-based Sflow */ +#define BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC 87 +/*! Get: Indicate SFLOW REASON happened; Set: Configure SFLOW REASON mask. */ +#define BCMPKT_RX_REASON_MPLS_PROC_ERROR 88 +/*! Invalid payload. */ +#define BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD 89 +/*! Invalid action. */ +#define BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION 90 +/*! Lookup label miss. */ +#define BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS 91 +/*! TTL check fail. */ +#define BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL 92 +/*! TBD. */ +#define BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT 96 +/*! Copied to CPU by ETRAP monitor. */ +#define BCMPKT_RX_REASON_ETRAP_MONITOR 97 +/*! Copied to CPU by Inband Telemetry turnaround. */ +#define BCMPKT_RX_REASON_INT_TURN_AROUND 98 +/*! Copied to CPU by DLB monitor. */ +#define BCMPKT_RX_REASON_DLB_MONITOR 99 +/*! Bit13 - L3 header - IP options, TTL=0, !IPv4 etc. */ +#define BCMPKT_RX_REASON_CPU_L3_HDR_MISMATCH 100 +/*! Bit31 - tunnel with object validation check fail */ +#define BCMPKT_RX_REASON_TUNNEL_OBJECT_VALIDATION_FAIL 101 +/*! L3 copy to CPU. */ +#define BCMPKT_RX_REASON_CPU_L3CPU 102 +/*! VNTAG unknown SUBTENDING port */ +#define BCMPKT_RX_REASON_VNTAG_UNKNOWN_SUBTENDING_PORT_ERROR 103 +/*! RPF Lookup Miss */ +#define BCMPKT_RX_REASON_RPF_MISS 104 +/*! Dot1p Admittance Discard */ +#define BCMPKT_RX_REASON_DOT1P_ADMITTANCE_DISCARD 105 +/*! + * It should be renamed to TUNNEL_ADAPT_LOOKUP_CPU. Indicates packet was copied + * to the CPU due to TUNNEL_ADAPT_LOOKUP's miss policy or hit policy copy to cpu. + */ +#define BCMPKT_RX_REASON_TUNNEL_ADAPT_LOOKUP_MISS_DROP 106 +/*! PKT_FLOW_SELECT_MISS_TO_CPU */ +#define BCMPKT_RX_REASON_PKT_FLOW_SELECT_MISS 107 +/*! Indicates packet was copied to the CPU due to PKT_FLOW_SELECT policy. */ +#define BCMPKT_RX_REASON_PKT_FLOW_SELECT 108 +/*! + * It should be renamed to TUNNEL_ADAPT_LOOKUP_MISS_TO_CPU_FROM_LOGICAL_TABLE_SEL. + * Indicates packet was copied to the CPU due to FORWARDING_LOOKUP miss. + */ +#define BCMPKT_RX_REASON_CPU_FORWARDING_OTHER 109 +/*! */ +#define BCMPKT_RX_REASON_INVALID_TPID 110 +/*! */ +#define BCMPKT_RX_REASON_MPLS_CONTROL_PKT 111 +/*! TUNNEL_ERR_TO_CPU */ +#define BCMPKT_RX_REASON_TUNNEL_ERR 112 +/*! TUNNEL_TTL_ERR_TO_CPU Error */ +#define BCMPKT_RX_REASON_TUNNEL_TTL_ERR 113 +/*! */ +#define BCMPKT_RX_REASON_L3_HDR_ERROR 114 +/*! */ +#define BCMPKT_RX_REASON_L2_HDR_ERROR 115 +/*! */ +#define BCMPKT_RX_REASON_TTL1_ERR 116 +/*! */ +#define BCMPKT_RX_REASON_TTL_ERR 117 +/*! Nat error packet. */ +#define BCMPKT_RX_REASON_NAT_ERROR 118 +/*! L2 MTU check fail to CPU */ +#define BCMPKT_RX_REASON_L2_MTU_CHECK_FAIL 119 +/*! Over system MAC limit threshold to CPU */ +#define BCMPKT_RX_REASON_L2_MAC_LIMIT 120 +/*! L2 STU check fail to CPU */ +#define BCMPKT_RX_REASON_L2_STU_CHECK_FAIL 121 +/*! SR counter threshold exceeded to CPU. */ +#define BCMPKT_RX_REASON_SR_COUNTER_LIMIT 122 +/*! SRV6_PROC_ERROR */ +#define BCMPKT_RX_REASON_SRV6_ERROR 123 +/*! Protection status = down. */ +#define BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN 124 +/*! Invalid opcode. */ +#define BCMPKT_RX_REASON_CPU_INVALID_REASON 125 +/*! MPLS TTL Check. */ +#define BCMPKT_RX_REASON_MPLS_TTL_CHECK 126 +/*! Bit Definitions of the CPU Opcodes. */ +#define BCMPKT_RX_REASON_SVTAG_CPU_BIT_SET 127 +/*! Subport ID lookup miss in Channelization. */ +#define BCMPKT_RX_REASON_SUBPORT_ID_LOOKUP_MISS 128 +/*! OAM operation. */ +#define BCMPKT_RX_REASON_OAM_PROCESSING 129 +/*! Invalid. */ +#define BCMPKT_RX_REASON_OAM_PROCESSING_INVALID 130 +/*! OAM CCM. */ +#define BCMPKT_RX_REASON_OAM_PROCESSING_OAM_CCM 131 +/*! OAM LM. */ +#define BCMPKT_RX_REASON_OAM_PROCESSING_OAM_LM 132 +/*! OAM DM. */ +#define BCMPKT_RX_REASON_OAM_PROCESSING_OAM_DM 133 +/*! OAM Other opcodes. */ +#define BCMPKT_RX_REASON_OAM_PROCESSING_OAM_OTHER_OPCODES 134 +/*! Invalid GSH or NON_GSH packet based on port configuration. */ +#define BCMPKT_RX_REASON_INVALID_GSH_NON_GSH 137 +/*! Copy to CPU triggered at egress pipeline. */ +#define BCMPKT_RX_REASON_EP_CTC 138 +/*! Indicates SVTAG.ERROR !=0 or SVTAG.CPU = 1. */ +#define BCMPKT_RX_REASON_MACSEC 139 +/*! APU Policy CTC. */ +#define BCMPKT_RX_REASON_APU_POLICY_CTC 140 +/*! BCMPKT_RX_REASON TYPE NUMBER */ +#define BCMPKT_RX_REASON_COUNT 141 +/*! \} */ + +/*! RXPMD reason name strings for debugging. */ +#define BCMPKT_REASON_NAME_MAP_INIT \ + {"NONE", BCMPKT_RX_REASON_NONE},\ + {"ADAPT_MISS", BCMPKT_RX_REASON_ADAPT_MISS},\ + {"CPU_IPMC_INTERFACE_MISMATCH", BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH},\ + {"NAT", BCMPKT_RX_REASON_NAT},\ + {"NAT_TCP_UDP_MISS", BCMPKT_RX_REASON_NAT_TCP_UDP_MISS},\ + {"NAT_ICMP_MISS", BCMPKT_RX_REASON_NAT_ICMP_MISS},\ + {"NAT_FRAGMENT", BCMPKT_RX_REASON_NAT_FRAGMENT},\ + {"NAT_OTHER_MISS", BCMPKT_RX_REASON_NAT_OTHER_MISS},\ + {"RESERVED_REASON", 8},\ + {"RESERVED_REASON", 9},\ + {"RESERVED_REASON", 10},\ + {"FCOE_ZONE_CHECK_FAIL", BCMPKT_RX_REASON_FCOE_ZONE_CHECK_FAIL},\ + {"VXLAN_VN_ID_MISS", BCMPKT_RX_REASON_VXLAN_VN_ID_MISS},\ + {"VXLAN_SIP_MISS", BCMPKT_RX_REASON_VXLAN_SIP_MISS},\ + {"QCN_CNM_PRP_DLF", BCMPKT_RX_REASON_QCN_CNM_PRP_DLF},\ + {"QCN_CNM_PRP", BCMPKT_RX_REASON_QCN_CNM_PRP},\ + {"MPLS_ALERT_LABEL", BCMPKT_RX_REASON_MPLS_ALERT_LABEL},\ + {"MPLS_ILLEGAL_RESERVED_LABEL", BCMPKT_RX_REASON_MPLS_ILLEGAL_RESERVED_LABEL},\ + {"ICNM", BCMPKT_RX_REASON_ICNM},\ + {"PACKET_TRACE_TO_CPU", BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU},\ + {"BFD_ERROR", BCMPKT_RX_REASON_BFD_ERROR},\ + {"BFD_SLOWPATH", BCMPKT_RX_REASON_BFD_SLOWPATH},\ + {"L2GRE_VPNID_MISS", BCMPKT_RX_REASON_L2GRE_VPNID_MISS},\ + {"L2GRE_SIP_MISS", BCMPKT_RX_REASON_L2GRE_SIP_MISS},\ + {"TRILL", BCMPKT_RX_REASON_TRILL},\ + {"TRILL_HDR_ERROR", BCMPKT_RX_REASON_TRILL_HDR_ERROR},\ + {"TRILL_LOOKUP_MISS", BCMPKT_RX_REASON_TRILL_LOOKUP_MISS},\ + {"TRILL_RPF_CHECK_FAIL", BCMPKT_RX_REASON_TRILL_RPF_CHECK_FAIL},\ + {"TRILL_SLOWPATH", BCMPKT_RX_REASON_TRILL_SLOWPATH},\ + {"TRILL_CORE_IS_IS_PKT", BCMPKT_RX_REASON_TRILL_CORE_IS_IS_PKT},\ + {"TRILL_HOP_COUNT_CHECK_FAIL", BCMPKT_RX_REASON_TRILL_HOP_COUNT_CHECK_FAIL},\ + {"TRILL_NICKNAME_TABLE", BCMPKT_RX_REASON_TRILL_NICKNAME_TABLE},\ + {"TUNNEL_DECAP_ECN_ERROR", BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR},\ + {"OAM_SLOWPATH", BCMPKT_RX_REASON_OAM_SLOWPATH},\ + {"TIME_SYNC", BCMPKT_RX_REASON_TIME_SYNC},\ + {"VXLT_MISS", BCMPKT_RX_REASON_VXLT_MISS},\ + {"NIV", BCMPKT_RX_REASON_NIV},\ + {"NIV_DOT1P_DROP", BCMPKT_RX_REASON_NIV_DOT1P_DROP},\ + {"NIV_VIF_MISS", BCMPKT_RX_REASON_NIV_VIF_MISS},\ + {"NIV_RPF_MISS", BCMPKT_RX_REASON_NIV_RPF_MISS},\ + {"NIV_VNTAG_ERROR", BCMPKT_RX_REASON_NIV_VNTAG_ERROR},\ + {"NIV_VNTAG_PRESENT", BCMPKT_RX_REASON_NIV_VNTAG_PRESENT},\ + {"NIV_VNTAG_NOT_PRESENT", BCMPKT_RX_REASON_NIV_VNTAG_NOT_PRESENT},\ + {"RESERVED_REASON", 43},\ + {"MY_STATION", BCMPKT_RX_REASON_MY_STATION},\ + {"MPLS_UNKNOWN_ACH_ERROR", BCMPKT_RX_REASON_MPLS_UNKNOWN_ACH_ERROR},\ + {"L3_NEXT_HOP", BCMPKT_RX_REASON_L3_NEXT_HOP},\ + {"PBT_NONUC_PKT", BCMPKT_RX_REASON_PBT_NONUC_PKT},\ + {"MPLS_SEQ_NUM_FAIL", BCMPKT_RX_REASON_MPLS_SEQ_NUM_FAIL},\ + {"MPLS_TTL_CHECK_FAIL", BCMPKT_RX_REASON_MPLS_TTL_CHECK_FAIL},\ + {"MPLS_INVALID_PAYLOAD", BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD},\ + {"MPLS_INVALID_ACTION", BCMPKT_RX_REASON_MPLS_INVALID_ACTION},\ + {"MPLS_LABEL_MISS", BCMPKT_RX_REASON_MPLS_LABEL_MISS},\ + {"MAC_BIND_FAIL", BCMPKT_RX_REASON_MAC_BIND_FAIL},\ + {"CBSM_PREVENTED", BCMPKT_RX_REASON_CBSM_PREVENTED},\ + {"CPU_VFP", BCMPKT_RX_REASON_CPU_VFP},\ + {"MCIDX_ERROR", BCMPKT_RX_REASON_MCIDX_ERROR},\ + {"HGHDR_ERROR", BCMPKT_RX_REASON_HGHDR_ERROR},\ + {"L3_MTU_CHECK_FAIL", BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL},\ + {"PARITY_ERROR", BCMPKT_RX_REASON_PARITY_ERROR},\ + {"L3_SLOWPATH", BCMPKT_RX_REASON_L3_SLOWPATH},\ + {"ICMP_REDIRECT", BCMPKT_RX_REASON_ICMP_REDIRECT},\ + {"CPU_SFLOW_FLEX", BCMPKT_RX_REASON_CPU_SFLOW_FLEX},\ + {"CPU_TUNNEL_ERR", BCMPKT_RX_REASON_CPU_TUNNEL_ERR},\ + {"CPU_MARTIAN_ADDR", BCMPKT_RX_REASON_CPU_MARTIAN_ADDR},\ + {"CPU_DOS_ATTACK", BCMPKT_RX_REASON_CPU_DOS_ATTACK},\ + {"CPU_PROTOCOL_PKT", BCMPKT_RX_REASON_CPU_PROTOCOL_PKT},\ + {"CPU_L3HDR_ERR", BCMPKT_RX_REASON_CPU_L3HDR_ERR},\ + {"CPU_FFP", BCMPKT_RX_REASON_CPU_FFP},\ + {"CPU_IPMC_MISS", BCMPKT_RX_REASON_CPU_IPMC_MISS},\ + {"CPU_MC_MISS", BCMPKT_RX_REASON_CPU_MC_MISS},\ + {"CPU_L3SRC_MOVE", BCMPKT_RX_REASON_CPU_L3SRC_MOVE},\ + {"CPU_L3DST_MISS", BCMPKT_RX_REASON_CPU_L3DST_MISS},\ + {"CPU_L3SRC_MISS", BCMPKT_RX_REASON_CPU_L3SRC_MISS},\ + {"CPU_SFLOW_DST", BCMPKT_RX_REASON_CPU_SFLOW_DST},\ + {"CPU_SFLOW_SRC", BCMPKT_RX_REASON_CPU_SFLOW_SRC},\ + {"CPU_L2CPU", BCMPKT_RX_REASON_CPU_L2CPU},\ + {"CPU_L2MOVE", BCMPKT_RX_REASON_CPU_L2MOVE},\ + {"CPU_DLF", BCMPKT_RX_REASON_CPU_DLF},\ + {"CPU_SLF", BCMPKT_RX_REASON_CPU_SLF},\ + {"CPU_UVLAN", BCMPKT_RX_REASON_CPU_UVLAN},\ + {"PROTECTION_DATA_DROP", BCMPKT_RX_REASON_PROTECTION_DATA_DROP},\ + {"OAM_ERROR", BCMPKT_RX_REASON_OAM_ERROR},\ + {"OAM_LMDM", BCMPKT_RX_REASON_OAM_LMDM},\ + {"CPU_SFLOW", BCMPKT_RX_REASON_CPU_SFLOW},\ + {"CPU_SFLOW_CPU_SFLOW_FLEX", BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX},\ + {"CPU_SFLOW_CPU_SFLOW_DST", BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST},\ + {"CPU_SFLOW_CPU_SFLOW_SRC", BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC},\ + {"MPLS_PROC_ERROR", BCMPKT_RX_REASON_MPLS_PROC_ERROR},\ + {"MPLS_PROC_ERROR_INVALID_PAYLOAD", BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD},\ + {"MPLS_PROC_ERROR_INVALID_ACTION", BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION},\ + {"MPLS_PROC_ERROR_LABEL_MISS", BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS},\ + {"MPLS_PROC_ERROR_TTL_CHECK_FAIL", BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL},\ + {"RESERVED_REASON", 93},\ + {"RESERVED_REASON", 94},\ + {"RESERVED_REASON", 95},\ + {"MPLS_UNKNOWN_CONTROL_PKT", BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT},\ + {"ETRAP_MONITOR", BCMPKT_RX_REASON_ETRAP_MONITOR},\ + {"INT_TURN_AROUND", BCMPKT_RX_REASON_INT_TURN_AROUND},\ + {"DLB_MONITOR", BCMPKT_RX_REASON_DLB_MONITOR},\ + {"CPU_L3_HDR_MISMATCH", BCMPKT_RX_REASON_CPU_L3_HDR_MISMATCH},\ + {"TUNNEL_OBJECT_VALIDATION_FAIL", BCMPKT_RX_REASON_TUNNEL_OBJECT_VALIDATION_FAIL},\ + {"CPU_L3CPU", BCMPKT_RX_REASON_CPU_L3CPU},\ + {"VNTAG_UNKNOWN_SUBTENDING_PORT_ERROR", BCMPKT_RX_REASON_VNTAG_UNKNOWN_SUBTENDING_PORT_ERROR},\ + {"RPF_MISS", BCMPKT_RX_REASON_RPF_MISS},\ + {"DOT1P_ADMITTANCE_DISCARD", BCMPKT_RX_REASON_DOT1P_ADMITTANCE_DISCARD},\ + {"TUNNEL_ADAPT_LOOKUP_MISS_DROP", BCMPKT_RX_REASON_TUNNEL_ADAPT_LOOKUP_MISS_DROP},\ + {"PKT_FLOW_SELECT_MISS", BCMPKT_RX_REASON_PKT_FLOW_SELECT_MISS},\ + {"PKT_FLOW_SELECT", BCMPKT_RX_REASON_PKT_FLOW_SELECT},\ + {"CPU_FORWARDING_OTHER", BCMPKT_RX_REASON_CPU_FORWARDING_OTHER},\ + {"INVALID_TPID", BCMPKT_RX_REASON_INVALID_TPID},\ + {"MPLS_CONTROL_PKT", BCMPKT_RX_REASON_MPLS_CONTROL_PKT},\ + {"TUNNEL_ERR", BCMPKT_RX_REASON_TUNNEL_ERR},\ + {"TUNNEL_TTL_ERR", BCMPKT_RX_REASON_TUNNEL_TTL_ERR},\ + {"L3_HDR_ERROR", BCMPKT_RX_REASON_L3_HDR_ERROR},\ + {"L2_HDR_ERROR", BCMPKT_RX_REASON_L2_HDR_ERROR},\ + {"TTL1_ERR", BCMPKT_RX_REASON_TTL1_ERR},\ + {"TTL_ERR", BCMPKT_RX_REASON_TTL_ERR},\ + {"NAT_ERROR", BCMPKT_RX_REASON_NAT_ERROR},\ + {"L2_MTU_CHECK_FAIL", BCMPKT_RX_REASON_L2_MTU_CHECK_FAIL},\ + {"L2_MAC_LIMIT", BCMPKT_RX_REASON_L2_MAC_LIMIT},\ + {"L2_STU_CHECK_FAIL", BCMPKT_RX_REASON_L2_STU_CHECK_FAIL},\ + {"SR_COUNTER_LIMIT", BCMPKT_RX_REASON_SR_COUNTER_LIMIT},\ + {"SRV6_ERROR", BCMPKT_RX_REASON_SRV6_ERROR},\ + {"NH_PROTO_STATUS_DOWN", BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN},\ + {"CPU_INVALID_REASON", BCMPKT_RX_REASON_CPU_INVALID_REASON},\ + {"MPLS_TTL_CHECK", BCMPKT_RX_REASON_MPLS_TTL_CHECK},\ + {"SVTAG_CPU_BIT_SET", BCMPKT_RX_REASON_SVTAG_CPU_BIT_SET},\ + {"SUBPORT_ID_LOOKUP_MISS", BCMPKT_RX_REASON_SUBPORT_ID_LOOKUP_MISS},\ + {"OAM_PROCESSING", BCMPKT_RX_REASON_OAM_PROCESSING},\ + {"OAM_PROCESSING_INVALID", BCMPKT_RX_REASON_OAM_PROCESSING_INVALID},\ + {"OAM_PROCESSING_OAM_CCM", BCMPKT_RX_REASON_OAM_PROCESSING_OAM_CCM},\ + {"OAM_PROCESSING_OAM_LM", BCMPKT_RX_REASON_OAM_PROCESSING_OAM_LM},\ + {"OAM_PROCESSING_OAM_DM", BCMPKT_RX_REASON_OAM_PROCESSING_OAM_DM},\ + {"OAM_PROCESSING_OAM_OTHER_OPCODES", BCMPKT_RX_REASON_OAM_PROCESSING_OAM_OTHER_OPCODES},\ + {"RESERVED_REASON", 135},\ + {"RESERVED_REASON", 136},\ + {"INVALID_GSH_NON_GSH", BCMPKT_RX_REASON_INVALID_GSH_NON_GSH},\ + {"EP_CTC", BCMPKT_RX_REASON_EP_CTC},\ + {"MACSEC", BCMPKT_RX_REASON_MACSEC},\ + {"APU_POLICY_CTC", BCMPKT_RX_REASON_APU_POLICY_CTC},\ + {"reason count", BCMPKT_RX_REASON_COUNT} + +#endif /*! BCMPKT_RXPMD_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h new file mode 100644 index 000000000000..7c12f3b58394 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h @@ -0,0 +1,83 @@ +/*! \file bcmpkt_rxpmd_fid.h + * + * RX Packet Meta Data (RXPMD) field id header file. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_RXPMD_FID_H +#define BCMPKT_RXPMD_FID_H + +#include +#include + +/*! \brief RXPMD field ID supported bit array. + * Array of bits indicating whether a RXPMD field ID is supported by a given + * device type. + */ +typedef struct bcmpkt_rxpmd_fid_support_s { + /*! Field ID bitmap container */ + SHR_BITDCLNAME(fbits, BCMPKT_RXPMD_FID_COUNT); +} bcmpkt_rxpmd_fid_support_t; + +/*! + * \name Utility macros for \ref bcmpkt_rxpmd_fid_support_t. + * \anchor BCMPKT_RXPMD_SUPPORT_OPS + */ +/*! \{ */ +/*! + * Macro to get a field ID's supported status. + * + * \retval zero Not supported + * \retval non-zero Supported + */ +#define BCMPKT_RXPMD_FID_SUPPORT_GET(_support, _fid) \ + SHR_BITGET(((_support).fbits), (_fid)) + +/*! + * Iterate over all supported RXPMD field IDs in the \c _support. + */ +#define BCMPKT_RXPMD_FID_SUPPORT_ITER(_support, _fid) \ + for(_fid = 0; _fid < BCMPKT_RXPMD_FID_COUNT; _fid++) \ + if(BCMPKT_RXPMD_FID_SUPPORT_GET(_support, _fid)) +/*! \} */ + + +/*! + * \brief Get supported RXPMD field IDs for a given device type. + * + * This function returns a structure with information about the RXPMD field IDs + * a given device type supports. + * + * Use \ref BCMPKT_RXPMD_FID_SUPPORT_GET on the returned structure to get the + * supported status of a specific field ID. + * + * \param [in] dev_type Device type. + * \param [out] support Field ID supported status bitmap. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_INTERNAL API internal error. + */ +extern int +bcmpkt_rxpmd_fid_support_get(bcmdrd_dev_type_t dev_type, + bcmpkt_rxpmd_fid_support_t *support); + + + +#endif /* BCMPKT_RXPMD_FID_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h new file mode 100644 index 000000000000..5c80a3eabe14 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h @@ -0,0 +1,80 @@ +/*! \file bcmpkt_rxpmd_field.h + * + * RX Packet MetaData (RXPMD, called EP_TO_CPU in hardware) field api's. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_RXPMD_FIELD_H +#define BCMPKT_RXPMD_FIELD_H + + +/*! + * \brief Get value from an RXPMD field. + * + * \param [in] dev_type Device type. + * \param [in] rxpmd RXPMD handle. + * \param [in] fid RXPMD field ID, refer to \ref BCMPKT_RXPMD_XXX. + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_rxpmd_field_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + int fid, uint32_t *val); + +/*! + * \brief Set value into an RXPMD field. (Internally used for filter config.) + * + * \param [in] dev_type Device type. + * \param [in,out] rxpmd RXPMD handle. + * \param [in] fid RXPMD field ID, refer to \ref BCMPKT_RXPMD_XXX. + * \param [in] val Set value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_rxpmd_field_set(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + int fid, uint32_t val); + +/*! + * \brief Get flex data handle from the RXPMD. + * + * This function is used for geting flex data handle from the \c rxpmd. + * + * \param [in] dev_type Device type. + * \param [in] rxpmd RXPMD handle. + * \param [out] flexdata Flex data handle. + * \param [out] len Flex data size in 4-bytes. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support flex data. + * \retval SHR_E_INTERNAL Internal issue. + */ +extern int +bcmpkt_rxpmd_flexdata_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + uint32_t **flexdata, uint32_t *len); + + +#endif /* BCMPKT_RXPMD_FIELD_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h new file mode 100644 index 000000000000..6c2fb52ddec4 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h @@ -0,0 +1,82 @@ +/*! \file bcmpkt_rxpmd_internal.h + * + * RX Packet MetaData internal library. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_RXPMD_INTERNAL_H +#define BCMPKT_RXPMD_INTERNAL_H + +#include +#include +#include +#include + +/*! + * Array of RXPMD field getter functions for a particular device + * type. + */ +typedef struct bcmpkt_rxpmd_fget_s { + bcmpkt_field_get_f fget[BCMPKT_RXPMD_FID_COUNT]; +} bcmpkt_rxpmd_fget_t; + +/*! + * Array of RXPMD field setter functions for a particular device + * type. These functions are used for internally configuring packet + * filter. + */ +typedef struct bcmpkt_rxpmd_fset_s { + bcmpkt_field_set_f fset[BCMPKT_RXPMD_FID_COUNT]; +} bcmpkt_rxpmd_fset_t; + +/*! + * Array of RXPMD field address and length getter functions for a multiple + * words field of a particular device type. *addr is output address and return + * length. + */ +typedef struct bcmpkt_rxpmd_figet_s { + bcmpkt_ifield_get_f fget[BCMPKT_RXPMD_I_FID_COUNT]; +} bcmpkt_rxpmd_figet_t; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern void _bd##_rx_reason_decode(const uint32_t* data, bcmpkt_rx_reasons_t* reasons); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern void _bd##_rx_reason_encode(const bcmpkt_rx_reasons_t* reasons, uint32_t* data); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern void _bd##_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern void _bd##_ep_rx_reason_decode(const uint32_t* data, bcmpkt_rx_reasons_t* reasons); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern void _bd##_ep_rx_reason_encode(const bcmpkt_rx_reasons_t* reasons, uint32_t* data); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#endif /* BCMPKT_RXPMD_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h new file mode 100644 index 000000000000..1ffbca4ed511 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h @@ -0,0 +1,175 @@ +/*! \file bcmpkt_rxpmd_match_id.h + * + * RX Packet Meta Data Match ID api's. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_RXPMD_MATCH_ID_H +#define BCMPKT_RXPMD_MATCH_ID_H + +#include +#include +#include + +/*! + * \brief Does the match id data contain the specified type + * + * This routine returns the true for false for a given match id using the + * provided match id data. + * + * \param [in] variant Variant type. + * \param [in] match_id_array Match ID data. + * \param [in] array_len Match ID data length in words. + * \param [in] match_id Match ID. + * + * \retval SHR_E_NONE The match id data contains the specified type + * \retval SHR_E_* The match id data does not contain the specified + * type or there was an error. + * + */ +extern int +bcmpkt_rxpmd_match_id_present(bcmlrd_variant_t variant, + uint32_t *match_id_array, + uint32_t array_len, + uint32_t match_id); + +/*! + * \brief Does the arc id data contain the specified type + * + * This routine returns the true for false for a given match id using the + * provided arc id data. + * + * \param [in] variant Variant type. + * \param [in] arc_id_array ARC ID data. + * \param [in] array_len Match ID data length in words. + * \param [in] match_id Match ID. + * + * \retval SHR_E_NONE The arc id data contains the specified type + * \retval SHR_E_* The arc id data does not contain the specified + * type or there was an error. + * + */ +extern int +bcmpkt_rxpmd_match_id_from_arc_id_present(bcmlrd_variant_t variant, + uint32_t *arc_id_array, + uint32_t array_len, + uint32_t match_id); + +/*! + * \brief Does the match id data contain the specified type + * + * This routine returns the match id value for the specified variant given the + * match id name (string value). + * + * \param [in] variant Variant type. + * \param [in] name Match ID string name. + * \param [out] match_id Match ID value. + * + * \retval SHR_E_NONE The match id value was found for the given name + * \retval SHR_E_* There was an error + * + */ +extern int +bcmpkt_rxpmd_match_id_get(bcmlrd_variant_t variant, + char *name, + uint32_t *match_id); + +/*! + * \brief Information on match ID fields. + * + * This structure is used to store information for each + * match id field. + * + */ +typedef struct bcmpkt_rxpmd_match_id_db_s { + /*! Match ID name. */ + const char *name; + + /*! Match. */ + uint32_t match; + + /*! Mask for match. */ + uint32_t match_mask; + + /*! Maxbit of the match id field in the physical container. */ + uint8_t match_maxbit; + + /*! Minbit of the match id field in the physical container. */ + uint8_t match_minbit; + + /*! Maxbit of the match id field. */ + uint8_t maxbit; + + /*! Minbit of the match id field. */ + uint8_t minbit; + + /*! Default value for the match id field. */ + uint32_t value; + + /*! Mask for the default value for the match id field. */ + uint32_t mask; + + /*! Maxbit of the field within match_id container. */ + uint8_t pmaxbit; + + /*! Minbit of the field within match_id container. */ + uint8_t pminbit; + + /*! ARC id zone minbit. */ + uint8_t zone_minbit; + + /*! ARC id mask. */ + uint64_t arc_id_mask; + + /*! Number of words used by zone bitmap. */ + uint8_t num_zone_bmp_words; + + /*! Zone bitmap. */ + uint32_t *zone_bmp; +} bcmpkt_rxpmd_match_id_db_t; + +/*! + * \brief Information on match ID fields. + * + * This structure is used to store information for the match id data. + * + */ +typedef struct bcmpkt_rxpmd_match_id_db_info_s { + /*! Number of entries in the match ID DB. */ + uint32_t num_entries; + + /*! Pointer to match ID DB. */ + const bcmpkt_rxpmd_match_id_db_t *db; +} bcmpkt_rxpmd_match_id_db_info_t; + +/*! + * \brief Information for the match ID map. + * + * This structure is used to store information for the match id map. + * + */ +typedef struct bcmpkt_rxpmd_match_id_map_info_s { + /*! Number of entries in the match ID Map. */ + uint32_t num_entries; + + /*! Pointer to match ID Map. */ + const shr_enum_map_t *map; +} bcmpkt_rxpmd_match_id_map_info_t; + +#endif /* BCMPKT_RXPMD_MATCH_ID_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..622a5bf4a09e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,38 @@ +/*! \file bcmpkt_rxpmd_match_id_defs.h + * + * RX Packet Meta Data Match ID Variant defs. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCMPKT_RXPMD_MATCH_ID_DEFS_H + +/*! \cond Declare externs. */ +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ +extern bcmpkt_rxpmd_match_id_db_info_t * \ +_bd##_vu##_va##_rxpmd_match_id_db_info_get(void); +#include + +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ +extern bcmpkt_rxpmd_match_id_map_info_t * \ +_bd##_vu##_va##_rxpmd_match_id_map_info_get(void); +#include +/*! \endcond */ + +#endif /* BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h new file mode 100644 index 000000000000..eb42ebc1b455 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h @@ -0,0 +1,157 @@ +/*! \file bcmpkt_txpmd.h + * + * TX Packet MetaData (TXPMD, called SOBMH in hardware) access interface. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_TXPMD_H +#define BCMPKT_TXPMD_H + +#include +#include +#include +#include +#include + +/*! TX Packet MetaData size (bytes). */ +#define BCMPKT_TXPMD_SIZE_BYTES 16 +/*! TX Packet MetaData size (words). */ +#define BCMPKT_TXPMD_SIZE_WORDS 4 + +/*! + * \name TXPMD Dumping flags. + * \anchor BCMPKT_TXPMD_DUMP_F_XXX + */ +/*! \{ */ +/*! + * Dump all fields contents. + */ +#define BCMPKT_TXPMD_DUMP_F_ALL 0 +/*! + * Dump none zero field content only. + */ +#define BCMPKT_TXPMD_DUMP_F_NONE_ZERO 1 +/*! \} */ + +/*! \brief TXPMD field ID supported bit array. + * Array of bits indicating whether a TXPMD field ID is supported by a given + * device type. + */ +typedef struct bcmpkt_txpmd_fid_support_s { + /*! Field ID bitmap container */ + SHR_BITDCLNAME(fbits, BCMPKT_TXPMD_FID_COUNT); +} bcmpkt_txpmd_fid_support_t; + +/*! + * \name Utility macros for \ref bcmpkt_txpmd_fid_support_t. + * \anchor BCMPKT_TXPMD_SUPPORT_OPS + */ +/*! \{ */ +/*! + * Macro to get a field ID's supported status. + * + * \retval zero Not supported + * \retval non-zero Supported + */ +#define BCMPKT_TXPMD_FID_SUPPORT_GET(_support, _fid) \ + SHR_BITGET(((_support).fbits), (_fid)) + +/*! + * Iterate over all supported TXPMD field IDs in the \c _support. + */ +#define BCMPKT_TXPMD_FID_SUPPORT_ITER(_support, _fid) \ + for(_fid = 0; _fid < BCMPKT_TXPMD_FID_COUNT; _fid++) \ + if(BCMPKT_TXPMD_FID_SUPPORT_GET(_support, _fid)) +/*! \} */ + +/*! + * \brief Get TXPMD's size for a given device type. + * + * \param [in] dev_type Device type. + * \param [out] len Bytes of TXPMD length. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Unsupported device type or bad \c len pointer. + * \retval SHR_E_UNAVAIL Not support TXPMD get function. + */ +extern int +bcmpkt_txpmd_len_get(bcmdrd_dev_type_t dev_type, uint32_t *len); + +/*! + * \brief Get field name for a given TXPMD field ID. + * + * \param [in] fid TXPMD field ID, refer to \ref BCMPKT_TXPMD_XXX. + * \param [out] name TXPMD field name string. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + */ +extern int +bcmpkt_txpmd_field_name_get(int fid, char **name); + +/*! + * \brief Get field ID for a given TXPMD field name. + * + * \param [in] name TXPMD name string. + * \param [out] fid TXPMD Field ID. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_NOT_FOUND Not found the name. + */ +extern int +bcmpkt_txpmd_field_id_get(char* name, int *fid); + +/*! + * \brief Get supported TXPMD field IDs for a given device type. + * + * This function returns a structure with information about the TXPMD field IDs + * a given device type supports. + * + * Use \ref BCMPKT_TXPMD_FID_SUPPORT_GET on the returned structure to get the + * supported status of a specific field ID. + * + * \param [in] dev_type Device type. + * \param [out] support Field ID supported status bitmap. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_INTERNAL API internal error. + */ +extern int +bcmpkt_txpmd_fid_support_get(bcmdrd_dev_type_t dev_type, + bcmpkt_txpmd_fid_support_t *support); + +/*! + * \brief Get view info for a given TXPMD field ID for a given device type. + * + * \param [in] dev_type Device type. + * \param [in] fid TXPMD field ID, refer to \ref BCMPKT_TXPMD_XXX. + * \param [out] view TXPMD view info. -2 for unsupported, -1 for global, + * others for view's value of \ref BCMPKT_TXPMD_HEADER_TYPE_XXX. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_INTERNAL API internal error. + */ +extern int +bcmpkt_txpmd_fid_view_get(bcmdrd_dev_type_t dev_type, + int fid, int *view); + +#endif /* BCMPKT_TXPMD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h new file mode 100644 index 000000000000..6805e23edc50 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h @@ -0,0 +1,546 @@ +#ifndef BCMPKT_TXPMD_DEFS_H +#define BCMPKT_TXPMD_DEFS_H +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated from the registers file. + * Edits to this file will be lost when it is regenerated. + * Tool: INTERNAL/regs/xgs/generate-pmd.pl + * + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * + * This file provides field macros for the TX Packet MetaData (TXPMD, called + * SOBMH in hardware.) access. + * + ******************************************************************************/ + +/*! + * \name TX packet metadata field IDs. + * \anchor BCMPKT_TXPMD_XXX + */ +/*! \{ */ +/*! Invalid BCMPKT_TXPMD FID indicator */ +#define BCMPKT_TXPMD_FID_INVALID -1 +/*! Start of frame indicator. */ +#define BCMPKT_TXPMD_START 0 +/*! + * 64 Header Types Supported. 1 means Packets from CPU with SOBMH header format + * to Passthru NLF + */ +#define BCMPKT_TXPMD_HEADER_TYPE 1 +/*! PKT_LENGTH (set by hardware - in Iarb). */ +#define BCMPKT_TXPMD_PKT_LENGTH 2 +/*! Pointer to cell buffer of this SOBMH cell. (Set by hardware) */ +#define BCMPKT_TXPMD_IPCF_PTR 3 +/*! SOP indicator (set by hardware - in Iarb). */ +#define BCMPKT_TXPMD_SOP 4 +/*! EOP indicator (set by hardware - in Iarb). */ +#define BCMPKT_TXPMD_EOP 5 +/*! CELL_LENGTH (set by hardware - in Iarb). */ +#define BCMPKT_TXPMD_CELL_LENGTH 6 +/*! CELL_ERROR or PURGE */ +#define BCMPKT_TXPMD_CELL_ERROR 7 +/*! Indicates the local port to send a SOBMH packet out. */ +#define BCMPKT_TXPMD_LOCAL_DEST_PORT 8 +/*! Source module ID, must be programmed to MY_MODID. */ +#define BCMPKT_TXPMD_SRC_MODID 9 +/*! + * Class of service for MMU queueing for this packet - sets COS values, + * PBI.UC_COS, PBI.MC_COS1, and PBI.MC_COS2. + */ +#define BCMPKT_TXPMD_COS 10 +/*! Traffic priority to be applied to MMU via PBI.INPUT_PRIORITY. */ +#define BCMPKT_TXPMD_INPUT_PRI 11 +/*! Indicates that PBI.UNICAST should be set to queue as unicast packet. */ +#define BCMPKT_TXPMD_UNICAST 12 +/*! Value for CCBI.RSQ_Q_NUM. */ +#define BCMPKT_TXPMD_RQE_Q_NUM 13 +/*! Indicates that PBI.L2_BITMAP should be set (to queue as L2MC packet). */ +#define BCMPKT_TXPMD_SET_L2BM 14 +/*! ONE STEP TIME STAMPING ENABLE */ +#define BCMPKT_TXPMD_IEEE1588_ONE_STEP_ENABLE 15 +/*! Regenerate UDP Checksum */ +#define BCMPKT_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM 16 +/*! ITS_SIGN bit */ +#define BCMPKT_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN 17 +/*! HDR_OFFSET */ +#define BCMPKT_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET 18 +/*! + * Indicates for TS packet transmitted from CPU into IP that the outgoing packet + * needs to have its transmit timestamp captured by the port. + */ +#define BCMPKT_TXPMD_TX_TS 19 +/*! For PBI.SPID_Override */ +#define BCMPKT_TXPMD_SPID_OVERRIDE 20 +/*! For PBI.SPID - Service Pool ID */ +#define BCMPKT_TXPMD_SPID 21 +/*! For PBI.SPAP - Service Pool Priority (color) */ +#define BCMPKT_TXPMD_SPAP 22 +/*! Will set CCBI_B.UNICAST_PKT */ +#define BCMPKT_TXPMD_UNICAST_PKT 23 +/*! Timestamp action LSB. */ +#define BCMPKT_TXPMD_TS_ACTION_LSB 24 +/*! Timestamp action MSB. */ +#define BCMPKT_TXPMD_TS_ACTION_MSB 25 +/*! Time statmp type. Encodings are 0-NTP TOD(64 bit), 1-PTP TOD(64bit) */ +#define BCMPKT_TXPMD_TS_TYPE 26 +/*! Destination subport number */ +#define BCMPKT_TXPMD_DST_SUBPORT_NUM 27 +/*! Enable UDP incremental checksum */ +#define BCMPKT_TXPMD_UDP_CHECKSUM_UPDATE_ENABLE 28 +/*! Offset to UDP checksum field from start of MACS-SA. */ +#define BCMPKT_TXPMD_UDP_CHECKSUM_OFFSET 29 +/*! CNG Field. */ +#define BCMPKT_TXPMD_CNG 30 +/*! DESTINATION Field. */ +#define BCMPKT_TXPMD_DESTINATION 31 +/*! Destination Field Type. */ +#define BCMPKT_TXPMD_DESTINATION_TYPE 32 +/*! WRED Mark Eligible field. */ +#define BCMPKT_TXPMD_WRED_MARK_ELIGIBLE 33 +/*! WRED Response Field. */ +#define BCMPKT_TXPMD_WRED_RESPONSE 34 +/*! Allows software to select load balancing bitmap for non-unicast packets. */ +#define BCMPKT_TXPMD_CPU_TX_MCAST_LB_INDEX 35 +/*! ECMP member ID for case where DESTINATION_TYPE=ECMP_MEMBER. Only valid for single level ECMP */ +#define BCMPKT_TXPMD_CPU_TX_ECMP_MEMBER_ID 36 +/*! Destination Field. */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION 37 +/*! Destination Field Type. */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE 38 +/*! Drop Precedence. */ +#define BCMPKT_TXPMD_CPU_TX_DP 39 +/*! Traffic priority to be applied to MMU via PBI.INPUT_PRIORITY. */ +#define BCMPKT_TXPMD_CPU_TX_INPUT_PRI 40 +/*! Internal congestion. */ +#define BCMPKT_TXPMD_CPU_TX_INT_CN 41 +/*! Internal priority */ +#define BCMPKT_TXPMD_CPU_TX_INT_PRI 42 +/*! Load balancing bitmap is valid indication. */ +#define BCMPKT_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD 43 +/*! Pointer to CPU_PACKET_PROFILE_1/2 registers. */ +#define BCMPKT_TXPMD_CPU_TX_PKT_PROFILE 44 +/*! QoS fields (INT_PRI, DP, INT_CN) valid indication. */ +#define BCMPKT_TXPMD_CPU_TX_QOS_FIELDS_VLD 45 +/*! If set packet marked as Layer 3 routed. */ +#define BCMPKT_TXPMD_CPU_TX_ROUTED_PKT 46 +/*! Indicates that PBI.UNICAST should be set to queue as unicast packet. */ +#define BCMPKT_TXPMD_CPU_TX_UNICAST 47 +/*! SOP indication. */ +#define BCMPKT_TXPMD_CPU_TX_SOP 48 +/*! VRF ID. */ +#define BCMPKT_TXPMD_CPU_TX_VRF 49 +/*! VRF ID is valid. */ +#define BCMPKT_TXPMD_CPU_TX_VRF_VALID 50 +/*! WCMP Selection. */ +#define BCMPKT_TXPMD_CPU_TX_WCMP_SEL 51 +/*! Cell error. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_CELL_ERROR 52 +/*! Cell length. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_CELL_LENGTH 53 +/*! Class of service. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_COS 54 +/*! Destination. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION 55 +/*! Destination type. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE 56 +/*! EOP indicator. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_EOP 57 +/*! Input priority. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_INPUT_PRI 58 +/*! LM counter action. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION 59 +/*! LM counter ID. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ID 60 +/*! OAM replacement offset. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_OAM_REPLACEMENT_OFFSET 61 +/*! Packet length. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_PKT_LENGTH 62 +/*! RQE Queue Number. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_RQE_Q_NUM 63 +/*! SOP indicator. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_SOP 64 +/*! Service Pool Allocation Precedence. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPAP 65 +/*! Service Pool ID. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPID 66 +/*! For Service Pool ID override. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPID_OVERRIDE 67 +/*! Source module ID. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_SRC_MODID 68 +/*! Timestamp action. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION 69 +/*! Unicast packet. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_UNICAST 70 +/*! Indicates a copy should be sent to the the CPU port mapped to R5. */ +#define BCMPKT_TXPMD_COPY_TO_DEBUG 71 +/*! FIXME */ +#define BCMPKT_TXPMD_COPY_TO_CPU 72 +/*! Used to set PBI.WRED_RESPONSIVE */ +#define BCMPKT_TXPMD_WRED_RESPONSIVE 73 +/*! Cookie correspoding to 1588 2-step */ +#define BCMPKT_TXPMD_CPU_TX_COOKIE 74 +/*! Validates Cookie field */ +#define BCMPKT_TXPMD_CPU_TX_COOKIE_VALID 75 +/*! The 8 LSB bits of Cookie corresponding to 1588 2-Step */ +#define BCMPKT_TXPMD_COOKIE_7_0 76 +/*! The MSB of Cookie corresponding to 1588 2-Step */ +#define BCMPKT_TXPMD_COOKIE_8 77 +/*! Unicast Valid. */ +#define BCMPKT_TXPMD_UNICAST_VALID 78 +/*! Indicates the vpp port to send a SOBMH packet out. */ +#define BCMPKT_TXPMD_DST_VPP_PORT_NUM 79 +/*! Indicates for TS packet transmitted from CPU into IP that the outgoing packet needs to have its transmit timestamp captured by the port. */ +#define BCMPKT_TXPMD_IEEE1588_TX_TS 80 +/*! Destination chip port number. */ +#define BCMPKT_TXPMD_DST_CHIP_PORT_NUM 81 +/*! Source chip port number. */ +#define BCMPKT_TXPMD_SRC_CHIP_PORT_NUM 82 +/*! TXPMD FIELD ID NUMBER */ +#define BCMPKT_TXPMD_FID_COUNT 83 +/*! \} */ + +/*! TXPMD field name strings for debugging. */ +#define BCMPKT_TXPMD_FIELD_NAME_MAP_INIT \ + {"START", BCMPKT_TXPMD_START},\ + {"HEADER_TYPE", BCMPKT_TXPMD_HEADER_TYPE},\ + {"PKT_LENGTH", BCMPKT_TXPMD_PKT_LENGTH},\ + {"IPCF_PTR", BCMPKT_TXPMD_IPCF_PTR},\ + {"SOP", BCMPKT_TXPMD_SOP},\ + {"EOP", BCMPKT_TXPMD_EOP},\ + {"CELL_LENGTH", BCMPKT_TXPMD_CELL_LENGTH},\ + {"CELL_ERROR", BCMPKT_TXPMD_CELL_ERROR},\ + {"LOCAL_DEST_PORT", BCMPKT_TXPMD_LOCAL_DEST_PORT},\ + {"SRC_MODID", BCMPKT_TXPMD_SRC_MODID},\ + {"COS", BCMPKT_TXPMD_COS},\ + {"INPUT_PRI", BCMPKT_TXPMD_INPUT_PRI},\ + {"UNICAST", BCMPKT_TXPMD_UNICAST},\ + {"RQE_Q_NUM", BCMPKT_TXPMD_RQE_Q_NUM},\ + {"SET_L2BM", BCMPKT_TXPMD_SET_L2BM},\ + {"IEEE1588_ONE_STEP_ENABLE", BCMPKT_TXPMD_IEEE1588_ONE_STEP_ENABLE},\ + {"IEEE1588_REGEN_UDP_CHECKSUM", BCMPKT_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM},\ + {"IEEE1588_INGRESS_TIMESTAMP_SIGN", BCMPKT_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN},\ + {"IEEE1588_TIMESTAMP_HDR_OFFSET", BCMPKT_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET},\ + {"TX_TS", BCMPKT_TXPMD_TX_TS},\ + {"SPID_OVERRIDE", BCMPKT_TXPMD_SPID_OVERRIDE},\ + {"SPID", BCMPKT_TXPMD_SPID},\ + {"SPAP", BCMPKT_TXPMD_SPAP},\ + {"UNICAST_PKT", BCMPKT_TXPMD_UNICAST_PKT},\ + {"TS_ACTION_LSB", BCMPKT_TXPMD_TS_ACTION_LSB},\ + {"TS_ACTION_MSB", BCMPKT_TXPMD_TS_ACTION_MSB},\ + {"TS_TYPE", BCMPKT_TXPMD_TS_TYPE},\ + {"DST_SUBPORT_NUM", BCMPKT_TXPMD_DST_SUBPORT_NUM},\ + {"UDP_CHECKSUM_UPDATE_ENABLE", BCMPKT_TXPMD_UDP_CHECKSUM_UPDATE_ENABLE},\ + {"UDP_CHECKSUM_OFFSET", BCMPKT_TXPMD_UDP_CHECKSUM_OFFSET},\ + {"CNG", BCMPKT_TXPMD_CNG},\ + {"DESTINATION", BCMPKT_TXPMD_DESTINATION},\ + {"DESTINATION_TYPE", BCMPKT_TXPMD_DESTINATION_TYPE},\ + {"WRED_MARK_ELIGIBLE", BCMPKT_TXPMD_WRED_MARK_ELIGIBLE},\ + {"WRED_RESPONSE", BCMPKT_TXPMD_WRED_RESPONSE},\ + {"CPU_TX::MCAST_LB_INDEX", BCMPKT_TXPMD_CPU_TX_MCAST_LB_INDEX},\ + {"CPU_TX::ECMP_MEMBER_ID", BCMPKT_TXPMD_CPU_TX_ECMP_MEMBER_ID},\ + {"CPU_TX::DESTINATION", BCMPKT_TXPMD_CPU_TX_DESTINATION},\ + {"CPU_TX::DESTINATION_TYPE", BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE},\ + {"CPU_TX::DP", BCMPKT_TXPMD_CPU_TX_DP},\ + {"CPU_TX::INPUT_PRI", BCMPKT_TXPMD_CPU_TX_INPUT_PRI},\ + {"CPU_TX::INT_CN", BCMPKT_TXPMD_CPU_TX_INT_CN},\ + {"CPU_TX::INT_PRI", BCMPKT_TXPMD_CPU_TX_INT_PRI},\ + {"CPU_TX::MCAST_LB_INDEX_VLD", BCMPKT_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD},\ + {"CPU_TX::PKT_PROFILE", BCMPKT_TXPMD_CPU_TX_PKT_PROFILE},\ + {"CPU_TX::QOS_FIELDS_VLD", BCMPKT_TXPMD_CPU_TX_QOS_FIELDS_VLD},\ + {"CPU_TX::ROUTED_PKT", BCMPKT_TXPMD_CPU_TX_ROUTED_PKT},\ + {"CPU_TX::UNICAST", BCMPKT_TXPMD_CPU_TX_UNICAST},\ + {"CPU_TX::SOP", BCMPKT_TXPMD_CPU_TX_SOP},\ + {"CPU_TX::VRF", BCMPKT_TXPMD_CPU_TX_VRF},\ + {"CPU_TX::VRF_VALID", BCMPKT_TXPMD_CPU_TX_VRF_VALID},\ + {"CPU_TX::WCMP_SEL", BCMPKT_TXPMD_CPU_TX_WCMP_SEL},\ + {"OAM_DOWNMEP_TX::CELL_ERROR", BCMPKT_TXPMD_OAM_DOWNMEP_TX_CELL_ERROR},\ + {"OAM_DOWNMEP_TX::CELL_LENGTH", BCMPKT_TXPMD_OAM_DOWNMEP_TX_CELL_LENGTH},\ + {"OAM_DOWNMEP_TX::COS", BCMPKT_TXPMD_OAM_DOWNMEP_TX_COS},\ + {"OAM_DOWNMEP_TX::DESTINATION", BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION},\ + {"OAM_DOWNMEP_TX::DESTINATION_TYPE", BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE},\ + {"OAM_DOWNMEP_TX::EOP", BCMPKT_TXPMD_OAM_DOWNMEP_TX_EOP},\ + {"OAM_DOWNMEP_TX::INPUT_PRI", BCMPKT_TXPMD_OAM_DOWNMEP_TX_INPUT_PRI},\ + {"OAM_DOWNMEP_TX::LM_COUNTER_ACTION", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION},\ + {"OAM_DOWNMEP_TX::LM_COUNTER_ID", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ID},\ + {"OAM_DOWNMEP_TX::OAM_REPLACEMENT_OFFSET", BCMPKT_TXPMD_OAM_DOWNMEP_TX_OAM_REPLACEMENT_OFFSET},\ + {"OAM_DOWNMEP_TX::PKT_LENGTH", BCMPKT_TXPMD_OAM_DOWNMEP_TX_PKT_LENGTH},\ + {"OAM_DOWNMEP_TX::RQE_Q_NUM", BCMPKT_TXPMD_OAM_DOWNMEP_TX_RQE_Q_NUM},\ + {"OAM_DOWNMEP_TX::SOP", BCMPKT_TXPMD_OAM_DOWNMEP_TX_SOP},\ + {"OAM_DOWNMEP_TX::SPAP", BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPAP},\ + {"OAM_DOWNMEP_TX::SPID", BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPID},\ + {"OAM_DOWNMEP_TX::SPID_OVERRIDE", BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPID_OVERRIDE},\ + {"OAM_DOWNMEP_TX::SRC_MODID", BCMPKT_TXPMD_OAM_DOWNMEP_TX_SRC_MODID},\ + {"OAM_DOWNMEP_TX::TIMESTAMP_ACTION", BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION},\ + {"OAM_DOWNMEP_TX::UNICAST", BCMPKT_TXPMD_OAM_DOWNMEP_TX_UNICAST},\ + {"COPY_TO_DEBUG", BCMPKT_TXPMD_COPY_TO_DEBUG},\ + {"COPY_TO_CPU", BCMPKT_TXPMD_COPY_TO_CPU},\ + {"WRED_RESPONSIVE", BCMPKT_TXPMD_WRED_RESPONSIVE},\ + {"CPU_TX::COOKIE", BCMPKT_TXPMD_CPU_TX_COOKIE},\ + {"CPU_TX::COOKIE_VALID", BCMPKT_TXPMD_CPU_TX_COOKIE_VALID},\ + {"COOKIE_7_0", BCMPKT_TXPMD_COOKIE_7_0},\ + {"COOKIE_8", BCMPKT_TXPMD_COOKIE_8},\ + {"UNICAST_VALID", BCMPKT_TXPMD_UNICAST_VALID},\ + {"DST_VPP_PORT_NUM", BCMPKT_TXPMD_DST_VPP_PORT_NUM},\ + {"IEEE1588_TX_TS", BCMPKT_TXPMD_IEEE1588_TX_TS},\ + {"DST_CHIP_PORT_NUM", BCMPKT_TXPMD_DST_CHIP_PORT_NUM},\ + {"SRC_CHIP_PORT_NUM", BCMPKT_TXPMD_SRC_CHIP_PORT_NUM},\ + {"fid count", BCMPKT_TXPMD_FID_COUNT} + +/*! + * \name BCMPKT_TXPMD_START encodings. + * \anchor BCMPKT_TXPMD_START_XXX + */ +/*! \{ */ +/*! The header used internally only */ +#define BCMPKT_TXPMD_START_INTERNAL_HEADER 2 +/*! Frame type is Higig */ +#define BCMPKT_TXPMD_START_HIGIG 3 +/*! \} */ + +/*! BCMPKT_TXPMD_START encoding name strings for debugging. */ +#define BCMPKT_TXPMD_START_NAME_MAP_INIT \ + {"RESERVED_COUNTER", 0},\ + {"RESERVED_COUNTER", 1},\ + {"INTERNAL_HEADER", BCMPKT_TXPMD_START_INTERNAL_HEADER},\ + {"HIGIG", BCMPKT_TXPMD_START_HIGIG},\ + +/*! + * \name BCMPKT_TXPMD_HEADER_TYPE encodings. + * \anchor BCMPKT_TXPMD_HEADER_TYPE_XXX + */ +/*! \{ */ +/*! EP Copy to CPU format, SOBMH header in EP to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_TO_CPU 0 +/*! Packets from CPU with SOBMH header format to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_FROM_CPU 1 +/*! Header type CPU_TX */ +#define BCMPKT_TXPMD_HEADER_T_CPU_TX 2 +/*! MAC in MAC packets to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_MIM 2 +/*! MPLS packets to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_MPLS_PMP 3 +/*! Trill Network Packets to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_TRILL_NW 4 +/*! Trill Access Layer Packets to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_TRILL_AC 5 +/*! WLAN Decap packets sent to WRX NLF */ +#define BCMPKT_TXPMD_HEADER_T_WLAN_DECAP 6 +/*! WLAN Encap packets sent to WTX NLF */ +#define BCMPKT_TXPMD_HEADER_T_WLAN_ENCAP 7 +/*! QCN Packets to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_QCN 8 +/*! DPI/Signature Matcher packets sent to SM NLF */ +#define BCMPKT_TXPMD_HEADER_T_SM_DPI 9 +/*! EP Redirection packets to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_EP_REDIR 10 +/*! Other generic passthrough to Passthru NLF */ +#define BCMPKT_TXPMD_HEADER_T_GENERIC 11 +/*! DOWN MEP Transmit OAM Packets from CPU or CCM from HW Engine or OLP */ +#define BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX 12 +/*! UP MEP Transmit OAM Packets from CPU or CCM from HW Engine or OLP */ +#define BCMPKT_TXPMD_HEADER_T_OAM_UPMEP_TX 13 +/*! \} */ + +/*! BCMPKT_TXPMD_HEADER_TYPE encoding name strings for debugging. */ +#define BCMPKT_TXPMD_HEADER_TYPE_NAME_MAP_INIT \ + {"SOBMH_EP_COPY_TO_CPU", BCMPKT_TXPMD_HEADER_T_TO_CPU},\ + {"SOBMH_FROM_CPU", BCMPKT_TXPMD_HEADER_T_FROM_CPU},\ + {"CPU_TX", BCMPKT_TXPMD_HEADER_T_CPU_TX},\ + {"MIM", BCMPKT_TXPMD_HEADER_T_MIM},\ + {"MPLS_PMP", BCMPKT_TXPMD_HEADER_T_MPLS_PMP},\ + {"TRILL_NW", BCMPKT_TXPMD_HEADER_T_TRILL_NW},\ + {"TRILL_AC", BCMPKT_TXPMD_HEADER_T_TRILL_AC},\ + {"WLAN_DECAP", BCMPKT_TXPMD_HEADER_T_WLAN_DECAP},\ + {"WLAN_ENCAP", BCMPKT_TXPMD_HEADER_T_WLAN_ENCAP},\ + {"QCN", BCMPKT_TXPMD_HEADER_T_QCN},\ + {"SM_DPI", BCMPKT_TXPMD_HEADER_T_SM_DPI},\ + {"EP_REDIR", BCMPKT_TXPMD_HEADER_T_EP_REDIR},\ + {"GENERIC", BCMPKT_TXPMD_HEADER_T_GENERIC},\ + {"OAM_DOWNMEP_TX", BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX},\ + {"OAM_UPMEP_TX", BCMPKT_TXPMD_HEADER_T_OAM_UPMEP_TX},\ + +/*! + * \name BCMPKT_TXPMD_DESTINATION_TYPE encodings. + * \anchor BCMPKT_TXPMD_DESTINATION_TYPE_XXX + */ +/*! \{ */ +/*! Egress Port */ +#define BCMPKT_TXPMD_DESTINATION_T_EGRESS_PORT 0 +/*! Asserts bit selected by destination field in L2_PBM */ +#define BCMPKT_TXPMD_DESTINATION_T_L2_PBM 7 +/*! Destination is Invalid */ +#define BCMPKT_TXPMD_DESTINATION_T_INVALID 15 +/*! \} */ + +/*! BCMPKT_TXPMD_DESTINATION_TYPE encoding name strings for debugging. */ +#define BCMPKT_TXPMD_DESTINATION_TYPE_NAME_MAP_INIT \ + {"EGRESS_PORT", BCMPKT_TXPMD_DESTINATION_T_EGRESS_PORT},\ + {"RESERVED_COUNTER", 1},\ + {"RESERVED_COUNTER", 2},\ + {"RESERVED_COUNTER", 3},\ + {"RESERVED_COUNTER", 4},\ + {"RESERVED_COUNTER", 5},\ + {"RESERVED_COUNTER", 6},\ + {"L2_PBM", BCMPKT_TXPMD_DESTINATION_T_L2_PBM},\ + {"RESERVED_COUNTER", 8},\ + {"RESERVED_COUNTER", 9},\ + {"RESERVED_COUNTER", 10},\ + {"RESERVED_COUNTER", 11},\ + {"RESERVED_COUNTER", 12},\ + {"RESERVED_COUNTER", 13},\ + {"RESERVED_COUNTER", 14},\ + {"INVALID", BCMPKT_TXPMD_DESTINATION_T_INVALID},\ + +/*! + * \name BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE encodings. + * \anchor BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE_XXX + */ +/*! \{ */ +/*! Egress Port */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_EGRESS_PORT 0 +/*! Next Hop Index */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NHI 1 +/*! ECMP Group */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP 2 +/*! ECMP member id */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP_MEMBER 3 +/*! IP Multicast Group */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_IPMC 4 +/*! L2MC group */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2MC 5 +/*! Vlan Flooding */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_VLAN_FLOOD 6 +/*! Asserts bit selected by destination field in L2_PBM */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2_PBM 7 +/*! LAG ID */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_LAG_ID 8 +/*! Forward and derive destination normally */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_FORWARD 15 +/*! Destination is Invalid */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_INVALID 15 +/*! \} */ + +/*! BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE encoding name strings for debugging. */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT \ + {"EGRESS_PORT", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_EGRESS_PORT},\ + {"NHI", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NHI},\ + {"ECMP", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP},\ + {"ECMP_MEMBER", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP_MEMBER},\ + {"IPMC", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_IPMC},\ + {"L2MC", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2MC},\ + {"VLAN_FLOOD", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_VLAN_FLOOD},\ + {"L2_PBM", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2_PBM},\ + {"LAG_ID", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_LAG_ID},\ + {"RESERVED_COUNTER", 9},\ + {"RESERVED_COUNTER", 10},\ + {"RESERVED_COUNTER", 11},\ + {"RESERVED_COUNTER", 12},\ + {"RESERVED_COUNTER", 13},\ + {"RESERVED_COUNTER", 14},\ + {"FORWARD", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_FORWARD},\ + {"INVALID", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_INVALID},\ + +/*! + * \name BCMPKT_TXPMD_CPU_TX_DP encodings. + * \anchor BCMPKT_TXPMD_CPU_TX_DP_XXX + */ +/*! \{ */ +/*! Green */ +#define BCMPKT_TXPMD_CPU_TX_DP_GREEN 0 +/*! Red */ +#define BCMPKT_TXPMD_CPU_TX_DP_RED 1 +/*! Yellow */ +#define BCMPKT_TXPMD_CPU_TX_DP_YELLOW 3 +/*! \} */ + +/*! BCMPKT_TXPMD_CPU_TX_DP encoding name strings for debugging. */ +#define BCMPKT_TXPMD_CPU_TX_DP_NAME_MAP_INIT \ + {"GREEN", BCMPKT_TXPMD_CPU_TX_DP_GREEN},\ + {"RED", BCMPKT_TXPMD_CPU_TX_DP_RED},\ + {"RESERVED_COUNTER", 2},\ + {"YELLOW", BCMPKT_TXPMD_CPU_TX_DP_YELLOW},\ + +/*! + * \name BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE encodings. + * \anchor BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE_XXX + */ +/*! \{ */ +/*! Egress Port */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_T_EGRESS_PORT 0 +/*! \} */ + +/*! BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE encoding name strings for debugging. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE_NAME_MAP_INIT \ + {"EGRESS_PORT", BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_T_EGRESS_PORT},\ + +/*! + * \name BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION encodings. + * \anchor BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_XXX + */ +/*! \{ */ +/*! No operation. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_NO_OP 0 +/*! Increment. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_INCREMENT 1 +/*! Increment and sample. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_INCREMENT_SAMPLE 2 +/*! Sample. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_SAMPLE 3 +/*! \} */ + +/*! BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION encoding name strings for debugging. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_NAME_MAP_INIT \ + {"NO_OP", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_NO_OP},\ + {"INCREMENT", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_INCREMENT},\ + {"INCREMENT_SAMPLE", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_INCREMENT_SAMPLE},\ + {"SAMPLE", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_SAMPLE},\ + +/*! + * \name BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION encodings. + * \anchor BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_XXX + */ +/*! \{ */ +/*! No operation. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_NO_OP 0 +/*! Sample timestamp. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_SAMPLE 1 +/*! \} */ + +/*! BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION encoding name strings for debugging. */ +#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_NAME_MAP_INIT \ + {"NO_OP", BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_NO_OP},\ + {"SAMPLE", BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_SAMPLE},\ + +/*! + * \name TX packet metadata internal usage field IDs. + * \anchor BCMPKT_TXPMD_I_XXX + */ +/*! \{ */ +/*! Invalid BCMPKT_TXPMD_I FID indicator */ +#define BCMPKT_TXPMD_I_FID_INVALID -1 +/*! TXPMD RX raw data size. */ +#define BCMPKT_TXPMD_I_SIZE 0 +/*! TXPMD_I FIELD ID NUMBER */ +#define BCMPKT_TXPMD_I_FID_COUNT 1 +/*! \} */ + +/*! TXPMD_I field name strings for debugging. */ +#define BCMPKT_TXPMD_I_FIELD_NAME_MAP_INIT \ + {"SIZE", BCMPKT_TXPMD_I_SIZE},\ + {"fid count", BCMPKT_TXPMD_I_FID_COUNT} + +#endif /*! BCMPKT_TXPMD_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h new file mode 100644 index 000000000000..fd97efbed4bb --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h @@ -0,0 +1,59 @@ +/*! \file bcmpkt_txpmd_field.h + * + * TX Packet MetaData (TXPMD, called SOBMH in hardware) field api's. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_TXPMD_FIELD_H +#define BCMPKT_TXPMD_FIELD_H + +/*! + * \brief Get value from a TXPMD field. + * + * \param [in] dev_type Device type. + * \param [in] txpmd TXPMD handle. + * \param [in] fid TXPMD field ID, refer to \ref BCMPKT_TXPMD_XXX. + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_txpmd_field_get(bcmdrd_dev_type_t dev_type, uint32_t *txpmd, + int fid, uint32_t *val); + +/*! + * \brief Set value into a TXPMD field. + * + * \param [in] dev_type Device type. + * \param [in,out] txpmd TXPMD handle. + * \param [in] fid TXPMD field ID, refer to \ref BCMPKT_TXPMD_XXX. + * \param [in] val Set value. + * + * \retval SHR_E_NONE success. + * \retval SHR_E_PARAM Check parameters failed. + * \retval SHR_E_UNAVAIL Not support the field. + */ +extern int +bcmpkt_txpmd_field_set(bcmdrd_dev_type_t dev_type, uint32_t *txpmd, + int fid, uint32_t val); + +#endif /* BCMPKT_TXPMD_FIELD_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h new file mode 100644 index 000000000000..a4fc1eb0f564 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h @@ -0,0 +1,62 @@ +/*! \file bcmpkt_txpmd_internal.h + * + * TX Packet MetaData (TXPMD, called SOBMH in hardware) access interface + * (Internal use only). + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_TXPMD_INTERNAL_H +#define BCMPKT_TXPMD_INTERNAL_H + +#include +#include +#include + +/*! + * Array of TXPMD field getter functions for a particular device + * type. + */ +typedef struct bcmpkt_txpmd_fget_s { + bcmpkt_field_get_f fget[BCMPKT_TXPMD_FID_COUNT]; +} bcmpkt_txpmd_fget_t; + +/*! + * Array of TXPMD field setter functions for a particular device + * type. These functions are used for internally configuring packet + * filter. + */ +typedef struct bcmpkt_txpmd_fset_s { + bcmpkt_field_set_f fset[BCMPKT_TXPMD_FID_COUNT]; +} bcmpkt_txpmd_fset_t; + +/*! + * Array of TXPMD field address and length getter functions for a multiple + * words field of a particular device type. *addr is output address and return + * length. + */ +typedef struct bcmpkt_txpmd_figet_s { + bcmpkt_ifield_get_f fget[BCMPKT_TXPMD_I_FID_COUNT]; +} bcmpkt_txpmd_figet_t; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern void _bd##_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info); +#define BCMDRD_DEVLIST_OVERRIDE +#include + +#endif /* BCMPKT_TXPMD_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h new file mode 100644 index 000000000000..0398392e600f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h @@ -0,0 +1,54 @@ +/*! \file bcmpkt_util.h + * + * BCMPKT utility functions. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_UTIL_H +#define BCMPKT_UTIL_H + +#include +#include + +/*! + * \brief Get device dispatch type based on device name. + * + * Device name is case-insensitive. + * + * \param [in] dev_name Device name, e.g. "bcm56000_a0". + * + * \return Device dispatch type or BCMDRD_DEV_T_NONE if not found. + */ +extern bcmdrd_dev_type_t +bcmpkt_util_dev_type_get(const char *dev_name); + +/*! + * \brief Get variant dispatch type based on device and variant names. + * + * Device and variant names are case-insensitive. + * + * \param [in] dev_name Device name, e.g. "bcm56000_a0". + * \param [in] var_name Variant name, e.g. "utltm". + * + * \return Variant dispatch type or BCMLRD_VARIANT_T_NONE if not found. + */ +extern bcmlrd_variant_t +bcmpkt_util_variant_type_get(const char *dev_name, const char *var_name); + +#endif /* BCMPKT_UTIL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h new file mode 100644 index 000000000000..1d772c94dabe --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h @@ -0,0 +1,60 @@ +/*! \file bcmpkt_bcm56690_a0_rxpmd.h + * + * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_BCM56690_A0_RXPMD_H +#define BCMPKT_BCM56690_A0_RXPMD_H + +#include + +/*! + * \brief Get flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm56690_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t *val); + +/*! + * \brief Set flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [in] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm56690_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t val); + +#endif /* BCMPKT_BCM56690_A0_RXPMD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h new file mode 100644 index 000000000000..56f782c4ee1b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h @@ -0,0 +1,60 @@ +/*! \file bcmpkt_bcm56780_a0_rxpmd.h + * + * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_BCM56780_A0_RXPMD_H +#define BCMPKT_BCM56780_A0_RXPMD_H + +#include + +/*! + * \brief Get flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm56780_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t *val); + +/*! + * \brief Set flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [in] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm56780_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t val); + +#endif /* BCMPKT_BCM56780_A0_RXPMD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h new file mode 100644 index 000000000000..81e440b12e27 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h @@ -0,0 +1,60 @@ +/*! \file bcmpkt_bcm56880_a0_rxpmd.h + * + * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_BCM56880_A0_RXPMD_H +#define BCMPKT_BCM56880_A0_RXPMD_H + +#include + +/*! + * \brief Get flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm56880_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t *val); + +/*! + * \brief Set flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [in] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm56880_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t val); + +#endif /* BCMPKT_BCM56880_A0_RXPMD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h new file mode 100644 index 000000000000..699c745d755e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h @@ -0,0 +1,60 @@ +/*! \file bcmpkt_bcm56890_a0_rxpmd.h + * + * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMPKT_BCM56890_A0_RXPMD_H +#define BCMPKT_BCM56890_A0_RXPMD_H + +#include + +/*! + * \brief Get flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [out] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm56890_a0_rxpmd_flex_fget(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t *val); + +/*! + * \brief Set flex field value from packet header data stream. + * + * \param [in] data Packet header data stream. + * \param [in] fld_info Information of field within data stream. + * \param [in] profile Profile + * \param [in] val Field value. + * + * \retval SHR_E_NONE success. + */ +extern int +bcm56890_a0_rxpmd_flex_fset(uint32_t *data, + bcmpkt_flex_field_metadata_t *fld_info, + int profile, + uint32_t val); + +#endif /* BCMPKT_BCM56890_A0_RXPMD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..ed834322299c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h @@ -0,0 +1,182 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_H +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_H + +#include + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T 11 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T 12 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T 13 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T 15 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T 17 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T 18 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T 19 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T 20 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T 21 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T 22 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T 23 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T 24 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T 25 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T 26 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T 27 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T 28 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T 29 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T 30 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T 31 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T 32 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T 33 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T 34 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T 35 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T 36 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T 37 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T 38 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T 39 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T 40 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T 41 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T 42 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T 43 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T 44 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T 45 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T 46 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T 47 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T 48 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 49 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 50 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T 51 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T 52 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T 53 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T 54 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T 55 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T 56 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T 57 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T 58 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T 59 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T 60 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T 61 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T 62 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T 63 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T 64 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T 65 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T 66 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T 67 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T 68 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T 69 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_T 70 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_COUNT 71 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T},\ + {"authen_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T},\ + {"cntag_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T},\ + {"ethertype_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T},\ + {"gbp_ethernet_shim_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T},\ + {"generic_loopback_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T},\ + {"hg3_base_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T},\ + {"hg3_extension_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T},\ + {"hop_by_hop_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T},\ + {"ioam_e2e_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T},\ + {"ipfix_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T},\ + {"l2_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T},\ + {"routing_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T},\ + {"segment_routing_srh_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T},\ + {"segment_routing_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T},\ + {"sflow_shim_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T},\ + {"std_segment_id_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T},\ + {"tcp_first_4bytes_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..10cb781f4af9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h @@ -0,0 +1,1392 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_DATA_H +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_OPERATION 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_AP 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_CPI 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DEM 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DIAG 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FIN 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MPT 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_POLL 11 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_STA 13 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_VERSION 15 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_RPID 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_PAD 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_SPI 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_ID 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GBP_ETHERNET_SHIM_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_SID 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_VER 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \ + {"ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\ + {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\ + {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\ + {"SID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\ + {"SUBTYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\ + {"VER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\ + {"gbp_ethernet_shim_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM 13 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"SRC_SUBPORT_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\ + {"START_BYTE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FLAGS 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_VNI 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_RESERVED 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_VERSION 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HG3_BASE_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_CN 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_CNG 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_ENTROPY 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_L3_ROUTED 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_TC 11 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_VERSION 12 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT 13 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_CN},\ + {"CNG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_CNG},\ + {"ENTROPY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_ENTROPY},\ + {"EXT_HDR_PRESENT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ + {"HG3_RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ + {"L3_ROUTED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_L3_ROUTED},\ + {"MIRROR_COPY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ + {"RESERVED_ETYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ + {"SYSTEM_DESTINATION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ + {"SYSTEM_DESTINATION_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ + {"SYSTEM_SOURCE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ + {"TC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_TC},\ + {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_VERSION},\ + {"hg3_base_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT} + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +/*! + * \name HG3_EXTENSION_0_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_SVP 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ + {"CLASS_ID_LSB", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ + {"CLASS_ID_MSB", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ + {"DVP_OR_L3_IIF", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ + {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ + {"FORWARDING_DOMAIN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ + {"SVP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_SVP},\ + {"hg3_extension_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_CODE 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IOAM_E2E_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_NAMESPACE_ID 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_RESERVED 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_TYPE 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \ + {"IOAM_E2E_DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\ + {"IOAM_E2E_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\ + {"IOAM_HDR_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\ + {"NAMESPACE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\ + {"NEXT_PROTOCOL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\ + {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_RESERVED},\ + {"TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_TYPE},\ + {"ioam_e2e_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_DA 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_ID 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_OPTION 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_SA 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TOS 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TTL 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_DA 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_SA 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_MACDA 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_MACSA 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_BOS 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_EXP 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_LABEL 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_TTL 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_OPERATION 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_DATA 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_TAG 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SEGMENT_ROUTING_SRH_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS},\ + {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN},\ + {"LAST_ENTRY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT},\ + {"TAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG},\ + {"segment_routing_srh_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT} + +/*! + * \name SEGMENT_ROUTING_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_TAG 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN},\ + {"LAST_ENTRY_FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE},\ + {"SEG_LIST", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST},\ + {"SEGMENTS_LEFT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT},\ + {"TAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_TAG},\ + {"segment_routing_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name STD_SEGMENT_ID_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_DATA 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_DATA},\ + {"std_segment_id_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"L5_BYTES_8_9", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\ + {"unknown_l5_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_CFI 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_PCP 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_TPID 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_VID 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FLAGS 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_SPI 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..1162d03c967c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,191 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DVP_15_0 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 11 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 12 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 13 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 14 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 15 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 16 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 17 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 18 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 19 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_6_0 20 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 22 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 23 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L2_IIF_11_0 24 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L2_OIF_11_0 25 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0 26 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 27 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 28 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0 29 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 30 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 31 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 32 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 33 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 34 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0 35 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0 36 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0 37 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_TUNNEL_NEXT_SID_SELECT_3_0 38 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVP_15_0 39 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 40 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0 41 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 42 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 43 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 44 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 45 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 46 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_VFI_15_0 47 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 48 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_FID_COUNT 49 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_COUNT 48 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DEFAULT 2 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 4 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 5 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 6 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP 7 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT 8 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS 9 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP 10 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 11 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 12 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT 13 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 14 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 15 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 16 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 17 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 18 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 19 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 20 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 21 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 22 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 23 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 24 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 25 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 26 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 27 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 28 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 29 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 30 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 31 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 32 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 33 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 34 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 35 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 36 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 37 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 38 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 39 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 40 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SRV6 41 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SVP 42 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 44 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 45 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 46 +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_VFP 47 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DEFAULT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"EM_FT_HPAE_MISS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\ + {"IFP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SER_DROP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SRV6", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SRV6},\ + {"SVP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..fd0a9d887550 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,505 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56690_a0_dna_6_5_29_0_1_sf_match_id_info.yml + * for device bcm56690_a0 and variant dna_6_5_29_0_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG 0 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM 1 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 2 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 3 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 4 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 5 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 6 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 7 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 8 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 13 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 14 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 15 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 16 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 17 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 18 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 19 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 20 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 21 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 22 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 23 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 24 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 25 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 26 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 27 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 28 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 29 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 30 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E 31 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 32 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 33 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 34 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 35 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 36 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 37 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 38 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 39 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 40 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 41 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 42 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 43 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 44 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 45 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 46 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 47 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 48 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 49 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 50 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 51 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 52 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 53 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 54 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 55 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 56 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 57 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 58 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 59 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 60 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 61 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 62 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG 63 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM 64 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 65 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 66 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 67 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 68 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 69 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 70 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 71 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 72 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 73 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 74 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 75 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 76 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 77 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 78 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 79 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 80 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 81 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 82 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 83 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 84 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 85 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 86 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 87 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 88 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 89 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 90 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 91 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 92 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 93 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E 94 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 95 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 96 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 97 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 98 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 99 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 100 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 101 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 102 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 103 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 104 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 105 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 106 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 107 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 108 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 109 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 110 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 111 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 112 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 113 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 114 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 115 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 116 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 117 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 118 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 119 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 120 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 121 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 122 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG 123 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 124 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 125 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 126 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 127 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 128 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 129 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 130 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 131 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 132 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 133 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 134 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 135 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 136 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 137 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 138 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 139 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 140 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 141 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 142 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 143 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 144 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 145 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 146 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 147 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 148 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 149 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 150 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 151 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 152 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 153 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 154 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 155 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 156 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 157 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 158 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 159 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG 160 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM 161 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 162 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 163 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 164 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 165 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 166 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 167 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 168 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 169 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 170 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 171 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 172 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 173 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 174 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 175 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 176 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 177 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 178 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 179 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 180 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 181 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 182 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 183 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 184 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 185 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 186 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 187 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 188 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 189 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 190 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E 191 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 192 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 193 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 194 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 195 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 196 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 197 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 198 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 199 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 200 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 201 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 202 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 203 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 204 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 205 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 206 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 207 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 208 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 209 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 210 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 211 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 212 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 213 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 214 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 215 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 216 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 217 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 218 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 219 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 220 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 221 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 222 +#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_COUNT 223 + +#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..4c4699647c3e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr.h @@ -0,0 +1,96 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H +#define BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H + +#include + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T 5 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T 6 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T 7 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T 8 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T 9 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T 10 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T 11 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T 12 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T 13 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T 14 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 15 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 16 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T 17 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T 18 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T 19 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T 20 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T 21 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T 22 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T 23 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T 24 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T 25 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T 26 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T 27 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT 28 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T},\ + {"cpu_composites_0_t", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T},\ + {"ep_nih_header_t", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"ethertype_t", BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T},\ + {"generic_loopback_t", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T},\ + {"icmp_t", BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T},\ + {"ipfix_t", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T},\ + {"l2_t", BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T},\ + {"psamp_mirror_on_drop_0_t", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_1_t", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ + {"psamp_mirror_on_drop_2_t", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\ + {"rarp_t", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T},\ + {"tcp_first_4bytes_t", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T},\ + {"RXPMD_FLEX_T", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..451241422a7b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr_data.h @@ -0,0 +1,592 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H +#define BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA 6 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS 7 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL 9 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA 5 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA 1 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ + {"ING_DROP_REASON", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ + {"MIRROR_ON_DROP_OBJ", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ + {"MMU_DROP_CTRL", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ + {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_1_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_2_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR 5 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT 6 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \ + {"EGR_DROP_REASON", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\ + {"EP_COPY_SESSION_INDEX", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\ + {"RESERVED_0", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_2_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID 3 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT} + + +#endif /* BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..abae240cc105 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,124 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0 5 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 6 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 7 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 8 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0 9 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 10 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 11 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 12 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 13 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 14 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 15 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 16 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 17 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 18 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 19 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 20 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 21 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0 22 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 23 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 24 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0 25 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0 26 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 27 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 28 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 29 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 30 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 31 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 32 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0 33 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 34 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0 35 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT 36 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT 21 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP 1 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 2 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT 3 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 4 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 5 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 6 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 7 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 8 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 9 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 10 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 11 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 12 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 13 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 14 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 15 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 17 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 19 +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP 20 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"IFP", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IVXLT", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_DISCARD", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ + {"L2_SRC_STATIC_MOVE", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_TTL_ERROR", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ + {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"NO_COPY_TO_CPU", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ + {"TRACE_DOP", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"VFP", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..a090e79e769d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,213 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_cna_6_5_29_sf_match_id_info.yml + * for device bcm56780_a0 and variant cna_6_5_29. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56780_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56780_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 2 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 3 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 4 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 5 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 6 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 7 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 8 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 9 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 10 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 11 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 12 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 13 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 14 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 15 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 16 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 17 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 18 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 19 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 20 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 21 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 22 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 23 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 24 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 25 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 26 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 27 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 28 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 29 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 30 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 31 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 32 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 33 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 34 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 35 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 36 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 37 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 38 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 39 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 40 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 41 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 42 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 43 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 44 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 45 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 46 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 47 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 48 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 49 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 50 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 51 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 52 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 53 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 54 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 55 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 56 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 57 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 58 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 59 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 60 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 61 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 62 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 63 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 64 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 65 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 66 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 67 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 68 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 69 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 70 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 71 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 72 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 73 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 74 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 75 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 76 +#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT 77 + +#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..0271370d2443 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr.h @@ -0,0 +1,180 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_H +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T 7 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T 10 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T 11 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T 12 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T 13 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T 15 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T 17 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T 18 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T 19 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T 20 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T 21 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T 22 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T 23 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T 24 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T 25 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T 26 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T 27 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T 28 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T 29 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T 30 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T 31 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T 32 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T 33 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T 34 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T 35 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T 36 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T 37 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T 38 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T 39 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T 40 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T 41 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T 42 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T 43 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T 44 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T 45 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T 46 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T 47 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 48 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 49 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T 50 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T 51 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T 52 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T 53 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T 54 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T 55 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T 56 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T 57 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T 58 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T 59 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T 60 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T 61 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T 62 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T 63 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T 64 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T 65 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T 66 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T 67 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T 68 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_T 69 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_COUNT 70 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T},\ + {"etag_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T},\ + {"hg3_base_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T},\ + {"hg3_extension_0_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T},\ + {"hop_by_hop_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_1_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ + {"psamp_mirror_on_drop_2_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\ + {"rarp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T},\ + {"svtag_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T},\ + {"tcp_first_4bytes_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..11489d58c5a9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1343 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_AP 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_CPI 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DEM 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FIN 7 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MPT 9 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_POLL 11 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_STA 13 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_PAD 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_TAG 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_TPID 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_TAG},\ + {"TPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_TPID},\ + {"etag_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_ID 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HG3_BASE_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_CN 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_CNG 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_ENTROPY 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_L3_ROUTED 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_TC 11 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_VERSION 12 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FID_COUNT 13 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_CN},\ + {"CNG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_CNG},\ + {"ENTROPY", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_ENTROPY},\ + {"EXT_HDR_PRESENT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ + {"HG3_RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ + {"L3_ROUTED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\ + {"MIRROR_COPY", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ + {"RESERVED_ETYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ + {"SYSTEM_DESTINATION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ + {"SYSTEM_DESTINATION_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ + {"SYSTEM_SOURCE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ + {"TC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_TC},\ + {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_VERSION},\ + {"hg3_base_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FID_COUNT} + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 + +/*! + * \name HG3_EXTENSION_0_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_SVP 4 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 5 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ + {"CLASS_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID},\ + {"DVP_OR_L3_IIF", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ + {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ + {"FORWARDING_DOMAIN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ + {"SVP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\ + {"hg3_extension_0_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_DA 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_ID 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_SA 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_DA 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_SA 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_MACDA 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ + {"ING_DROP_REASON", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ + {"MIRROR_ON_DROP_OBJ", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ + {"MMU_DROP_CTRL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ + {"SAMPLED_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_1_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_2_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR 5 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT 6 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \ + {"EGR_DROP_REASON", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\ + {"EP_COPY_SESSION_INDEX", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\ + {"RESERVED_0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_2_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name SVTAG_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_DATA_LWR 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_DATA_UPR 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ + {"DATA_LWR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_DATA_LWR},\ + {"DATA_UPR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_DATA_UPR},\ + {"svtag_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_TAG 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_SPI 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..7b484da3d47a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,180 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 7 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 8 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 9 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 10 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 11 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 12 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 13 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 14 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 15 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0 16 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 17 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 18 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 19 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 20 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 22 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 23 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 24 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 25 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 26 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 27 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 28 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 29 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 30 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 31 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 32 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SVP_15_0 33 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 34 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 35 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 36 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 37 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 38 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 39 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_VFI_15_0 40 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0 41 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_FID_COUNT 42 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 46 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 2 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 3 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 4 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 5 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 6 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP 7 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 8 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 9 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 10 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 11 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 12 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 13 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 14 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 15 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 16 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 17 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 18 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 19 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 20 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 21 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 22 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 23 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 24 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 25 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 26 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 27 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 28 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 29 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 30 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 31 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 32 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY 33 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 34 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 35 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 36 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 37 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 38 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 39 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP 40 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 41 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 42 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 43 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 44 +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP 45 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ + {"MATCHED_RULE_BIT_0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"MTOP_IPV4_GATEWAY", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\ + {"NO_COPY_TO_CPU", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"RESERVED_TRACE_BIT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ + {"SER_DROP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ + {"SVP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..da90d56430f7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,415 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_dna_2_9_5_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant dna_2_9_5_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 1 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 2 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 3 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 4 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 5 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 6 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 7 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 8 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 9 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 10 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 11 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 12 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 13 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 14 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 15 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 16 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 17 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 18 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 19 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 20 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 21 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 22 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 23 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 24 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 25 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 26 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 27 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 28 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 29 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 30 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 31 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 32 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 33 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 34 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 35 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 36 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 37 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 38 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 39 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 40 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 41 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 42 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 43 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 44 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 45 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 46 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 47 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 48 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 49 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 50 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 51 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 52 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 53 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 54 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 55 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 56 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 57 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 58 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 59 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 60 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 61 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 62 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 63 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 64 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 65 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 66 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 67 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 68 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 69 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 70 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 71 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 72 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 73 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 74 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 75 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 76 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 77 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 78 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 79 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 80 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 81 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 82 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 83 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 84 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 85 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 86 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 87 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 88 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 89 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 90 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 91 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 92 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 93 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 94 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 95 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 96 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 97 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 98 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 99 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 100 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 101 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 102 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 103 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 104 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 105 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 106 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 107 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 108 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 109 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 110 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 111 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 112 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 113 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 114 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 115 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 116 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 117 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 118 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 119 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 120 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 121 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 122 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 123 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 124 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 125 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 126 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 127 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 128 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 129 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 130 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 131 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 132 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 133 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 134 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 135 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 136 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 137 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 138 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 139 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 140 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 141 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 142 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 143 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 144 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 145 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 146 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 147 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 148 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 149 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 150 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 151 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 152 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 153 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 154 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 155 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 156 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 157 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 158 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 159 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 160 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 161 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 162 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 163 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 164 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 165 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 166 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 167 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 168 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 169 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 170 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 171 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 172 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 173 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 174 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 175 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 176 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 177 +#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_COUNT 178 + +#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..cc9acc025dcb --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr.h @@ -0,0 +1,174 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_H +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_H + +#include + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T 6 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T 7 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T 10 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T 11 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T 12 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T 13 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T 15 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T 17 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T 18 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T 19 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T 20 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T 21 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T 22 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T 23 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T 24 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T 25 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T 26 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T 27 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T 28 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T 29 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T 30 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T 31 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T 32 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T 33 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T 34 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T 35 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T 36 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T 37 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T 38 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T 39 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T 40 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T 41 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T 42 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T 43 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T 44 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T 45 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 46 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 47 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T 48 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T 49 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T 50 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T 51 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T 52 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T 53 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T 54 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T 55 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T 56 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T 57 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T 58 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T 59 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T 60 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T 61 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T 62 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T 63 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T 64 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T 65 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_T 66 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_COUNT 67 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T},\ + {"authen_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T},\ + {"cntag_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T},\ + {"etag_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T},\ + {"hop_by_hop_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T},\ + {"l2_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T},\ + {"routing_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T},\ + {"svtag_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T},\ + {"tcp_first_4bytes_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..2d60738e3841 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr_data.h @@ -0,0 +1,1258 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_DATA_H +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_OPERATION 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_AP 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_CPI 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DEM 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DIAG 6 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FIN 7 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MPT 9 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_POLL 11 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_STA 13 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_VERSION 15 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_RPID 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_PAD 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_SPI 4 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_TAG 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_TPID 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_TAG},\ + {"TPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_TPID},\ + {"etag_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_ID 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FLAGS 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_VNI 4 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_RESERVED 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_VERSION 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_CODE 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_DA 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_ID 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_OPTION 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_SA 6 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TOS 7 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TTL 9 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_DA 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_SA 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_MACDA 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_MACSA 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_BOS 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_EXP 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_LABEL 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_TTL 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_OPERATION 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_DATA 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_TAG 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name SVTAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_DATA_LWR 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_DATA_UPR 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ + {"DATA_LWR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_DATA_LWR},\ + {"DATA_UPR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_DATA_UPR},\ + {"svtag_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_CFI 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_PCP 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_TPID 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_VID 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_TAG 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FLAGS 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_SPI 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..b68fdc1beea7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,181 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 6 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 7 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 8 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 9 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 10 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 11 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 12 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 13 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 14 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 15 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0 16 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 17 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 18 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 19 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 20 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 22 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 23 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 24 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 25 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 26 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 27 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 28 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 29 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 30 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 31 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SVP_15_0 32 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 33 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 34 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 35 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 36 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 37 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 38 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_VFI_15_0 39 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 40 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_FID_COUNT 41 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_COUNT 47 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 3 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 4 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 5 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP 6 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT 7 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP 8 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 9 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 10 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT 11 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 12 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 13 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 14 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 15 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 16 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 17 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 18 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 19 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 20 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 21 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 22 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 23 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 24 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 25 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 26 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 27 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 28 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 29 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 30 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 31 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 32 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 33 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY 34 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 35 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 36 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 37 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 38 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 39 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 40 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SVP 41 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 42 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 43 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 44 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 45 +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_VFP 46 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"MTOP_IPV4_GATEWAY", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\ + {"NO_COPY_TO_CPU", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"RESERVED_TRACE_BIT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ + {"SER_DROP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SVP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..80393cd917c7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,405 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_hna_6_5_29_2_1_sf_match_id_info.yml + * for device bcm56780_a0 and variant hna_6_5_29_2_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 4 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 5 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 6 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 7 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 8 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 9 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 10 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 11 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 12 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 13 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 14 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 15 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 16 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 17 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 18 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 19 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 20 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 21 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 22 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 23 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 24 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 25 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 26 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 27 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 28 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 29 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 30 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 31 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 32 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 33 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 34 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 35 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 36 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 37 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 38 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 39 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 40 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 41 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 42 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 43 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 44 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 45 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 46 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 47 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 48 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 49 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 50 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 51 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 52 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 53 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 54 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 55 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 56 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 57 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 58 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 59 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 60 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 61 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 62 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 63 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 64 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 65 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 66 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 67 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 68 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 69 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 70 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 71 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 72 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 73 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 74 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 75 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 76 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 77 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 78 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 79 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 80 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 81 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 82 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 83 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 84 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 85 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 86 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 87 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 88 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 89 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 90 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 91 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 92 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 93 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 94 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 95 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 96 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 97 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 98 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 99 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 100 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 101 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 102 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 103 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 104 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 105 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 106 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 107 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 108 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 109 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 110 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 111 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 112 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 113 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 114 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 115 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 116 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 117 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 118 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 119 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 120 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 121 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 122 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 123 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 124 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 125 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 126 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 127 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 128 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 129 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 130 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 131 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 132 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 133 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 134 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 135 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 136 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 137 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 138 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 139 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 140 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 141 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 142 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 143 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 144 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 145 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 146 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 147 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 148 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 149 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 150 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 151 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 152 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 153 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 154 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 155 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 156 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 157 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 158 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 159 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 160 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 161 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 162 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 163 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 164 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 165 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 166 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 167 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 168 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 169 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 170 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 171 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 172 +#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_COUNT 173 + +#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..531e025d0233 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr.h @@ -0,0 +1,166 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_H +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T 7 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T 10 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T 11 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T 12 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T 13 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T 15 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T 17 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T 18 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T 19 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T 20 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T 21 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T 22 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T 23 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T 24 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T 25 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T 26 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T 27 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T 28 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T 29 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T 30 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T 31 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T 32 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T 33 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T 34 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T 35 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T 36 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T 37 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T 38 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T 39 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T 40 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T 41 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 42 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 43 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T 44 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T 45 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T 46 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T 47 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T 48 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T 49 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T 50 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T 51 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T 52 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T 53 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T 54 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T 55 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T 56 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T 57 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T 58 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T 59 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T 60 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T 61 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_T 62 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_COUNT 63 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T},\ + {"etag_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T},\ + {"hg3_base_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T},\ + {"hg3_extension_0_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T},\ + {"hop_by_hop_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T},\ + {"ifa_1_raw_hdr_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T},\ + {"ifa_header_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T},\ + {"igmp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_1_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ + {"psamp_mirror_on_drop_2_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\ + {"rarp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T},\ + {"tcp_first_4bytes_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..f4adeae2ce51 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1258 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_AP 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_CPI 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DEM 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FIN 7 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MPT 9 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_POLL 11 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_STA 13 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_PAD 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_TAG 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_TPID 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FID_COUNT 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_TAG},\ + {"TPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_TPID},\ + {"etag_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_ID 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HG3_BASE_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_CN 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_CNG 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_ENTROPY 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_L3_ROUTED 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_TC 11 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_VERSION 12 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FID_COUNT 13 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_CN},\ + {"CNG", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_CNG},\ + {"ENTROPY", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_ENTROPY},\ + {"EXT_HDR_PRESENT", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ + {"HG3_RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ + {"L3_ROUTED", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\ + {"MIRROR_COPY", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ + {"RESERVED_ETYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ + {"SYSTEM_DESTINATION", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ + {"SYSTEM_DESTINATION_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ + {"SYSTEM_SOURCE", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ + {"TC", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_TC},\ + {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_VERSION},\ + {"hg3_base_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FID_COUNT} + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 + +/*! + * \name HG3_EXTENSION_0_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_SVP 4 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 5 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ + {"CLASS_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID},\ + {"DVP_OR_L3_IIF", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ + {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ + {"FORWARDING_DOMAIN", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ + {"SVP", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\ + {"hg3_extension_0_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_1_RAW_HDR_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_DATA 0 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FID_COUNT 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_DATA},\ + {"ifa_1_raw_hdr_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_ACTION_VECTOR 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_CUR_LENGTH 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FLAGS 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FLAGS_RSVD 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_HOP_LIMIT_HOP_COUNT 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_METADATA 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_MSG_TYPE 7 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_PROBE_MARKER_0 8 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_PROBE_MARKER_1 9 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_REQUEST_VECTOR 10 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_RSVD_0 11 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_SENDER_HANDLE 12 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_SEQUENCE_NUMBER 13 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_VERSION 14 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FID_COUNT 15 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_ACTION_VECTOR},\ + {"CUR_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_CUR_LENGTH},\ + {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"FLAGS_RSVD", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FLAGS_RSVD},\ + {"HOP_LIMIT_HOP_COUNT", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_HOP_LIMIT_HOP_COUNT},\ + {"MAX_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"METADATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_METADATA},\ + {"MSG_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_MSG_TYPE},\ + {"PROBE_MARKER_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_PROBE_MARKER_0},\ + {"PROBE_MARKER_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_PROBE_MARKER_1},\ + {"REQUEST_VECTOR", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_REQUEST_VECTOR},\ + {"RSVD_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_RSVD_0},\ + {"SENDER_HANDLE", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_SENDER_HANDLE},\ + {"SEQUENCE_NUMBER", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_SEQUENCE_NUMBER},\ + {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_VERSION},\ + {"ifa_header_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_DA 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_ID 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_SA 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_DA 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_SA 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_MACDA 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ + {"ING_DROP_REASON", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ + {"MIRROR_ON_DROP_OBJ", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ + {"MMU_DROP_CTRL", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ + {"SAMPLED_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_1_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_2_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR 5 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT 6 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \ + {"EGR_DROP_REASON", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\ + {"EP_COPY_SESSION_INDEX", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\ + {"RESERVED_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_2_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_TAG 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_SPI 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..dc271d029f8c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,178 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 7 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 8 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 9 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 10 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 11 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 12 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 13 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 14 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 15 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 16 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 17 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 18 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 19 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 20 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 21 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 22 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 23 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 24 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 25 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 26 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 27 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 28 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 29 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 30 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SVP_15_0 31 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 32 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 33 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 34 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 35 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 36 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 37 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_VFI_15_0 38 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0 39 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_FID_COUNT 40 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 46 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 2 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 3 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 4 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 5 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 6 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP 7 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 8 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 9 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 10 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 11 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 12 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 13 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 14 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 15 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 16 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 17 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 18 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 19 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 20 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 21 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 22 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 23 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 24 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 25 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 26 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 27 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 28 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 29 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 30 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 31 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 32 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 33 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY 34 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 35 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 36 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 37 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 38 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 39 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SVP 40 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 41 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 42 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 43 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 44 +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_VFP 45 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_DISCARD", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ + {"L2_SRC_STATIC_MOVE", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ + {"MATCHED_RULE_BIT_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"MTOP_IPV4_GATEWAY", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\ + {"NO_COPY_TO_CPU", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SER_DROP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ + {"SVP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..5a8aebe2bb65 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,409 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_ina_2_6_11_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant ina_2_6_11_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 1 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 2 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 3 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 4 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 5 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 6 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 7 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 8 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 13 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 14 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 15 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 16 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 17 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 18 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 19 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 20 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 21 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 22 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 23 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 24 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 25 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 26 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 27 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 28 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 29 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 30 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 31 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 32 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 33 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 34 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 35 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 36 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 37 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 38 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 39 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 40 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 41 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 42 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 43 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 44 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 45 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 46 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 47 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 48 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 49 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 50 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 51 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 52 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 53 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 54 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 55 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 56 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 57 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 58 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 59 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 60 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 61 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 62 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 63 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 64 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 65 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 66 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 67 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 68 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 69 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 70 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 71 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 72 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 73 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 74 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 75 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 76 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 77 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 78 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 79 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 80 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 81 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 82 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 83 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 84 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 85 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 86 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 87 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 88 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 89 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 90 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 91 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 92 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 93 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 94 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 95 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 96 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 97 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 98 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 99 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 100 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 101 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 102 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 103 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 104 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 105 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 106 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 107 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 108 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 109 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 110 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 111 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 112 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 113 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 114 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 115 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 116 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 117 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 118 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 119 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 120 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 121 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 122 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 123 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 124 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 125 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 126 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 127 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 128 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 129 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 130 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 131 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 132 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 133 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 134 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 135 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 136 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 137 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 138 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 139 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 140 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 141 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 142 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 143 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 144 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 145 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 146 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 147 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 148 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 149 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 150 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 151 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 152 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 153 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 154 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 155 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 156 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 157 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 158 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 159 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 160 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 161 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 162 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 163 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 164 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 165 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 166 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 167 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 168 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 169 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 170 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 171 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 172 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 173 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 174 +#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_COUNT 175 + +#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..3be7b6731e9e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr.h @@ -0,0 +1,92 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H +#define BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H + +#include + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T 3 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T 4 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T 5 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T 6 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T 7 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T 8 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T 9 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T 10 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T 11 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T 12 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T 13 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 14 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 15 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T 16 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T 17 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T 18 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T 19 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T 20 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T 21 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T 22 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T 23 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T 24 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T 25 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT 26 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T},\ + {"cpu_composites_0_t", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T},\ + {"erspan3_fixed_hdr_t", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"ethertype_t", BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T},\ + {"generic_loopback_t", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T},\ + {"icmp_t", BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T},\ + {"ipfix_t", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T},\ + {"l2_t", BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T},\ + {"psamp_mirror_on_drop_0_t", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_1_t", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ + {"rarp_t", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T},\ + {"tcp_first_4bytes_t", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T},\ + {"RXPMD_FLEX_T", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..34e44e61f17d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr_data.h @@ -0,0 +1,539 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H +#define BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP_GROUP 8 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 9 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 10 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 11 + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID 3 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION 4 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA 6 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS 7 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL 9 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA 5 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA 1 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ + {"ING_DROP_REASON", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ + {"MIRROR_ON_DROP_OBJ", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ + {"MMU_DROP_CTRL", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ + {"SAMPLED_LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID 3 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT} + + +#endif /* BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..9881893f689e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,117 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 3 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0 5 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 6 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 7 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 8 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 9 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 10 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 11 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 12 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 13 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 14 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0 15 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 16 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 17 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0 18 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0 19 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 20 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 21 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 22 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 23 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 24 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 25 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0 26 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 27 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0 28 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT 29 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT 21 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP 1 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 2 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT 3 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 4 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 5 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 6 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 7 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 8 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 9 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 10 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 11 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 12 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 13 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 14 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 15 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 17 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 19 +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP 20 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"IFP", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IVXLT", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_DISCARD", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ + {"L2_SRC_STATIC_MOVE", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_TTL_ERROR", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ + {"MEMBERSHIP_CHECK_FAILED", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"NO_COPY_TO_CPU", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SPANNING_TREE_CHECK_FAILED", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ + {"TRACE_DOP", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"VFP", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..3f4452eb44a4 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,209 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_cna_6_5_29_sf_match_id_info.yml + * for device bcm56880_a0 and variant cna_6_5_29. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56880_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56880_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 2 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 3 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 4 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 5 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 6 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 7 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 8 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 9 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 10 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 11 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 12 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 13 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 14 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 15 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 16 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 17 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 18 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 19 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 20 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 21 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 22 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 23 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 24 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 25 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 26 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 27 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 28 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 29 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 30 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 31 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 32 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 33 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 34 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 35 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 36 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 37 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 38 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 39 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 40 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 41 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 42 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 43 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 44 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 45 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 46 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 47 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 48 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 49 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 50 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 51 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 52 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 53 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 54 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 55 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 56 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 57 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 58 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 59 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 60 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 61 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 62 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 63 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 64 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 65 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 66 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 67 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 68 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 69 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 70 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 71 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 72 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 73 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 74 +#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT 75 + +#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..bc96c1b3e1a8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr.h @@ -0,0 +1,174 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_H +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T 6 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T 7 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T 8 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T 9 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T 10 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T 11 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T 12 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T 13 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T 14 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T 15 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T 16 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T 17 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T 18 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T 19 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T 20 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T 21 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T 22 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T 23 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T 24 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T 25 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T 26 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T 27 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T 28 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T 29 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T 30 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T 31 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T 32 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T 33 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T 34 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T 35 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T 36 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T 37 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T 38 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T 39 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T 40 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T 41 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T 42 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T 43 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T 44 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T 45 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T 46 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 47 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 48 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T 49 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T 50 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T 51 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T 52 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T 53 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T 54 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T 55 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T 56 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T 57 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T 58 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T 59 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T 60 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T 61 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T 62 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T 63 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T 64 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T 65 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_T 66 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_COUNT 67 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T},\ + {"erspan3_fixed_hdr_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T},\ + {"etag_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T},\ + {"hg3_base_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T},\ + {"hg3_extension_0_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T},\ + {"hop_by_hop_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_1_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ + {"rarp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T},\ + {"tcp_first_4bytes_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..aedf312bd7a9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1276 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_AP 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_CPI 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DEM 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FIN 7 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MPT 9 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_POLL 11 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_STA 13 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_PAD 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_TAG 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_TPID 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_TAG},\ + {"TPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_TPID},\ + {"etag_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_ID 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HG3_BASE_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_CN 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_CNG 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_ENTROPY 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_L3_ROUTED 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_TC 11 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_VERSION 12 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FID_COUNT 13 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_CN},\ + {"CNG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_CNG},\ + {"ENTROPY", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_ENTROPY},\ + {"EXT_HDR_PRESENT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ + {"HG3_RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ + {"L3_ROUTED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\ + {"MIRROR_COPY", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ + {"RESERVED_ETYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ + {"SYSTEM_DESTINATION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ + {"SYSTEM_DESTINATION_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ + {"SYSTEM_SOURCE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ + {"TC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_TC},\ + {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_VERSION},\ + {"hg3_base_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FID_COUNT} + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 + +/*! + * \name HG3_EXTENSION_0_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_SVP 4 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 5 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ + {"CLASS_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID},\ + {"DVP_OR_L3_IIF", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ + {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ + {"FORWARDING_DOMAIN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ + {"SVP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\ + {"hg3_extension_0_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_DA 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_ID 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_SA 6 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_DA 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_SA 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_MACDA 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ + {"ING_DROP_REASON", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ + {"MIRROR_ON_DROP_OBJ", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ + {"MMU_DROP_CTRL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ + {"SAMPLED_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_TAG 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_SPI 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..249c95130a4f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,163 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 6 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 7 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 8 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 9 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 10 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 11 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0 12 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 13 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 15 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 16 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 17 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 18 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 19 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 20 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 21 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 22 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 23 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 24 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 25 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SVP_15_0 26 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 27 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 28 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 29 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 30 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 31 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 32 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_VFI_15_0 33 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0 34 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_FID_COUNT 35 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 41 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 3 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 4 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP 5 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 6 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 7 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 8 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 9 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 10 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 11 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 12 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 13 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 14 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 15 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 16 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 17 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 18 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 19 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 20 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 21 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 22 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 23 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 24 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 25 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 26 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 27 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 28 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 29 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 30 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 31 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 32 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 33 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 34 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 35 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 36 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP 37 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 38 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 39 +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP 40 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DST_FP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ + {"MATCHED_RULE_BIT_0", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"RESERVED_TRACE_BIT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ + {"SER_DROP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ + {"SVP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"URPF_CHECK_FAILED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..8ac35a34969a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,405 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_dna_4_11_4_0_sf_match_id_info.yml + * for device bcm56880_a0 and variant dna_4_11_4_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 1 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 2 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 3 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 4 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 5 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 6 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 7 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 8 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 13 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 14 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 15 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 16 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 17 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 18 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 19 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 20 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 21 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 22 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 23 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 24 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 25 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 26 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 27 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 28 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 29 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 30 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 31 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 32 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 33 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 34 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 35 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 36 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 37 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 38 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 39 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 40 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 41 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 42 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 43 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 44 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 45 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 46 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 47 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 48 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 49 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 50 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 51 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 52 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 53 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 54 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 55 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 56 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 57 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 58 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 59 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 60 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 61 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 62 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 63 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 64 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 65 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 66 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 67 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 68 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 69 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 70 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 71 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 72 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 73 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 74 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 75 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 76 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 77 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 78 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 79 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 80 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 81 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 82 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 83 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 84 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 85 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 86 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 87 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 88 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 89 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 90 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 91 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 92 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 93 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 94 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 95 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 96 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 97 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 98 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 99 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 100 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 101 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 102 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 103 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 104 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 105 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 106 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 107 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 108 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 109 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 110 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 111 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 112 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 113 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 114 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 115 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 116 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 117 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 118 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 119 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 120 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 121 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 122 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 123 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 124 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 125 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 126 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 127 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 128 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 129 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 130 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 131 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 132 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 133 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 134 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 135 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 136 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 137 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 138 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 139 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 140 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 141 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 142 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 143 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 144 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 145 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 146 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 147 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 148 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 149 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 150 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 151 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 152 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 153 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 154 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 155 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 156 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 157 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 158 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 159 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 160 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 161 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 162 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 163 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 164 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 165 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 166 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 167 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 168 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 169 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 170 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 171 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 172 +#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_COUNT 173 + +#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..1dac0a9d3359 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr.h @@ -0,0 +1,170 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_H +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_H + +#include + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T 6 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T 7 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T 8 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T 9 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T 10 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T 11 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T 12 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T 13 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T 14 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T 15 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T 16 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T 17 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T 18 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T 19 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T 20 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T 21 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T 22 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T 23 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T 24 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T 25 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T 26 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T 27 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T 28 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T 29 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T 30 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T 31 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T 32 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T 33 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T 34 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T 35 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T 36 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T 37 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T 38 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T 39 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T 40 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T 41 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T 42 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T 43 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T 44 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 45 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 46 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T 47 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T 48 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T 49 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T 50 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T 51 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T 52 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T 53 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T 54 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T 55 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T 56 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T 57 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T 58 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T 59 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T 60 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T 61 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T 62 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T 63 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_T 64 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_COUNT 65 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T},\ + {"authen_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T},\ + {"cntag_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T},\ + {"erspan3_fixed_hdr_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T},\ + {"etag_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T},\ + {"hop_by_hop_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T},\ + {"l2_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T},\ + {"routing_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T},\ + {"tcp_first_4bytes_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..3299293d7d47 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr_data.h @@ -0,0 +1,1212 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_DATA_H +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_OPERATION 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_AP 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_CPI 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DEM 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DIAG 6 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FIN 7 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MPT 9 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_POLL 11 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_STA 13 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_VERSION 15 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_RPID 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_PAD 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_SPI 4 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_TAG 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_TPID 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_TAG},\ + {"TPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_TPID},\ + {"etag_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_ID 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FLAGS 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_VNI 4 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_RESERVED 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_VERSION 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_CODE 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_DA 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_ID 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_OPTION 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_SA 6 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TOS 7 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TTL 9 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_DA 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_SA 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_MACDA 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_MACSA 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_BOS 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_EXP 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_LABEL 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_TTL 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"MOD_STATE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE},\ + {"RESERVED_0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"UC_COS__COLOR__PROB_IDX", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_OPERATION 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_DATA 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_TAG 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_CFI 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_PCP 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_TPID 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_VID 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_TAG 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FLAGS 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_SPI 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..01bd4cf9a374 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,165 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 6 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 7 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 8 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 9 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 10 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 11 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0 12 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0 13 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0 14 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0 15 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 16 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 17 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 18 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 19 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 20 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 21 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 22 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 23 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 24 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 25 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 26 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SVP_15_0 27 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 28 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 29 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 30 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 31 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 32 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 33 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_VFI_15_0 34 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_FID_COUNT 35 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_COUNT 42 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 3 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP 4 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT 5 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP 6 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 7 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 8 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT 9 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 10 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 11 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 12 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 13 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 14 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 15 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 16 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 17 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 18 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 19 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 20 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 21 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 22 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 23 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 24 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 25 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 26 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 27 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 28 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 29 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 30 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 31 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 32 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 33 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 34 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 35 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 36 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 37 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SVP 38 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 39 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 40 +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_VFP 41 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DST_FP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"RESERVED_TRACE_BIT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ + {"SER_DROP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SVP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"URPF_CHECK_FAILED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..3d9c0aa09afe --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,395 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_hna_6_5_29_2_2_sf_match_id_info.yml + * for device bcm56880_a0 and variant hna_6_5_29_2_2. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 4 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 5 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 6 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 7 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 8 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 9 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 10 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 11 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 12 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 13 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 14 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 15 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 16 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 17 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 18 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 19 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 20 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 21 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 22 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 23 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 24 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 25 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 26 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 27 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 28 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 29 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 30 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 31 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 32 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 33 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 34 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 35 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 36 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 37 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 38 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 39 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 40 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 41 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 42 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 43 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 44 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 45 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 46 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 47 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 48 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 49 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 50 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 51 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 52 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 53 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 54 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 55 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 56 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 57 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 58 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 59 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 60 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 61 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 62 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 63 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 64 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 65 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 66 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 67 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 68 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 69 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 70 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 71 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 72 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 73 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 74 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 75 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 76 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 77 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 78 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 79 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 80 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 81 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 82 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 83 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 84 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 85 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 86 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 87 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 88 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 89 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 90 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 91 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 92 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 93 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 94 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 95 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 96 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 97 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 98 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 99 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 100 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 101 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 102 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 103 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 104 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 105 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 106 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 107 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 108 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 109 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 110 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 111 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 112 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 113 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 114 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 115 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 116 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 117 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 118 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 119 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 120 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 121 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 122 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 123 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 124 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 125 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 126 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 127 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 128 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 129 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 130 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 131 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 132 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 133 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 134 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 135 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 136 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 137 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 138 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 139 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 140 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 141 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 142 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 143 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 144 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 145 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 146 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 147 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 148 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 149 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 150 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 151 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 152 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 153 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 154 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 155 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 156 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 157 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 158 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 159 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 160 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 161 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 162 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 163 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 164 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 165 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 166 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 167 +#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_COUNT 168 + +#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..c202e1e757e8 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr.h @@ -0,0 +1,158 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_H +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T 6 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T 7 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T 8 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T 9 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T 10 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T 11 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T 12 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T 13 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T 14 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T 15 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T 16 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T 17 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T 18 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T 19 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T 20 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T 21 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T 22 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T 23 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T 24 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T 25 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T 26 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T 27 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T 28 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T 29 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T 30 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T 31 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T 32 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T 33 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T 34 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T 35 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T 36 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T 37 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T 38 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 39 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 40 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T 41 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T 42 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T 43 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T 44 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T 45 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T 46 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T 47 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T 48 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T 49 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T 50 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T 51 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T 52 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T 53 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T 54 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T 55 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T 56 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T 57 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_T 58 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_COUNT 59 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T},\ + {"cpu_composites_0_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T},\ + {"erspan3_fixed_hdr_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T},\ + {"etag_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T},\ + {"gtp_12byte_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T},\ + {"gtp_8byte_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T},\ + {"hop_by_hop_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T},\ + {"igmp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T},\ + {"opaquetag_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T},\ + {"p_1588_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_1_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ + {"rarp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T},\ + {"tcp_first_4bytes_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..f69e4f64c26d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1126 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_AP 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_CPI 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DEM 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FIN 7 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MPT 9 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_POLL 11 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_STA 13 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_PAD 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_PCP_DEI 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_RSRVD0 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_RSRVD1 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_SVID 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_TPID 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_VID 5 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"PCP_DEI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_PCP_DEI},\ + {"RSRVD0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_RSRVD0},\ + {"RSRVD1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_RSRVD1},\ + {"SVID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_SVID},\ + {"TPID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_TPID},\ + {"VID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_VID},\ + {"etag_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_ID 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_VN_ID_UPPER 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"VN_ID_LOWER_ENTROPY", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY},\ + {"VN_ID_UPPER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_VN_ID_UPPER},\ + {"gre_key_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name GTP_12BYTE_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_11_8 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_3_0 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_7_4 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT \ + {"BYTES_11_8", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_11_8},\ + {"BYTES_3_0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_3_0},\ + {"BYTES_7_4", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_7_4},\ + {"gtp_12byte_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FID_COUNT} + +/*! + * \name GTP_8BYTE_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_BYTES_3_0 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_BYTES_7_4 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT \ + {"BYTES_3_0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_BYTES_3_0},\ + {"BYTES_7_4", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_BYTES_7_4},\ + {"gtp_8byte_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_DA 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_ID 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_SA 6 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_DA 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_SA 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_MACDA 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name OPAQUETAG_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_TPID 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_VLAN_TAG 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT \ + {"TPID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_TPID},\ + {"VLAN_TAG", BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_VLAN_TAG},\ + {"opaquetag_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ + {"ING_DROP_REASON", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ + {"MIRROR_ON_DROP_OBJ", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ + {"MMU_DROP_CTRL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ + {"SAMPLED_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_TAG 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_VN_ID_UPPER 2 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"VN_ID_LOWER_RESERVED2", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2},\ + {"VN_ID_UPPER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_VN_ID_UPPER},\ + {"vxlan_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_SPI 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..078278c2eea9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,173 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 6 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 7 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 8 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0 9 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0 10 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0 11 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0 12 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 13 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 15 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 16 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 17 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 18 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 19 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 20 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 21 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 22 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 23 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 24 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 25 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SVP_15_0 26 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 27 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 28 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 29 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0 30 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 31 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 32 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_VFI_15_0 33 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 34 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_FID_COUNT 35 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 46 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 3 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 4 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP 5 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 6 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 7 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 8 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 9 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 10 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 11 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 12 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 13 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 14 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 15 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 16 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 17 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 18 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 19 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 20 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 21 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 22 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 23 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 24 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 25 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 26 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 27 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 28 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 29 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 30 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 31 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 32 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF 33 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS 34 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS 35 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED 36 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED 37 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 38 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 39 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 40 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 41 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP 42 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 44 +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP 45 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DST_FP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_DISCARD", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ + {"L2_SRC_STATIC_MOVE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ + {"MATCHED_RULE_BIT_0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PE_RPF", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF},\ + {"PE_VID_FWD_MISS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS},\ + {"PE_VID_RPF_MISS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS},\ + {"PKT_ETAG_EXPECTED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED},\ + {"PKT_ETAG_UNEXPECTED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SER_DROP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ + {"SVP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"URPF_CHECK_FAILED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..577d595f4331 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,415 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_nfa_2_1_7_0_sf_match_id_info.yml + * for device bcm56880_a0 and variant nfa_2_1_7_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG 4 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 5 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN 6 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 7 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 8 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 13 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 14 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 15 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 16 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 17 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 18 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 19 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 20 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 21 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 22 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE 23 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE 24 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 25 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 26 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 27 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 28 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 29 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 30 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 31 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 32 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 33 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 34 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 35 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 36 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 37 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 38 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 39 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 40 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 41 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 42 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 43 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 44 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 45 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 46 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 47 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 48 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 49 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 50 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 51 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 52 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 53 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG 54 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 55 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN 56 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 57 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 58 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 59 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 60 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 61 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 62 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 63 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 64 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 65 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 66 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 67 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 68 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 69 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 70 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 71 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 72 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE 73 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE 74 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 75 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 76 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 77 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 78 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 79 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 80 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 81 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 82 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 83 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 84 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 85 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 86 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 87 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 88 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 89 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 90 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 91 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 92 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 93 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 94 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 95 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 96 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 97 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 98 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 99 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 100 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 101 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG 102 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 103 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN 104 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 105 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 106 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 107 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 108 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 109 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 110 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 111 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 112 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 113 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 114 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 115 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 116 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 117 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 118 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 119 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 120 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 121 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 122 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 123 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 124 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 125 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 126 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 127 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 128 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 129 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 130 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 131 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG 132 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 133 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN 134 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 135 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 136 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 137 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 138 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 139 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 140 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 141 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 142 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 143 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 144 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 145 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 146 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 147 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 148 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 149 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 150 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE 151 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE 152 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 153 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 154 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 155 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 156 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 157 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 158 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 159 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 160 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 161 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 162 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 163 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 164 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 165 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 166 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 167 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 168 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 169 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 170 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 171 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 172 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 173 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 174 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 175 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 176 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 177 +#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_COUNT 178 + +#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_RSPAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_RSPAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_RSPAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_RSPAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..5a071cdc342c --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr.h @@ -0,0 +1,96 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H +#define BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H + +#include + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T 5 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T 6 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T 7 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T 8 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T 9 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T 10 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T 11 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T 12 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T 13 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T 14 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 15 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 16 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T 17 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T 18 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T 19 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T 20 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T 21 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T 22 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T 23 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T 24 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T 25 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T 26 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T 27 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT 28 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T},\ + {"cpu_composites_0_t", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T},\ + {"ep_nih_header_t", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"ethertype_t", BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T},\ + {"generic_loopback_t", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T},\ + {"icmp_t", BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T},\ + {"ipfix_t", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T},\ + {"l2_t", BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T},\ + {"psamp_mirror_on_drop_0_t", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_1_t", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ + {"psamp_mirror_on_drop_2_t", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\ + {"rarp_t", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T},\ + {"tcp_first_4bytes_t", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T},\ + {"RXPMD_FLEX_T", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..c5c91aa5ac94 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr_data.h @@ -0,0 +1,592 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H +#define BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA 6 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS 7 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL 9 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA 5 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA 1 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ + {"ING_DROP_REASON", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ + {"MIRROR_ON_DROP_OBJ", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ + {"MMU_DROP_CTRL", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ + {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_1_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_2_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR 5 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT 6 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \ + {"EGR_DROP_REASON", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\ + {"EP_COPY_SESSION_INDEX", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\ + {"RESERVED_0", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_2_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID 3 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT} + + +#endif /* BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..0f8d5395a611 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,124 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0 5 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 6 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 7 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 8 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0 9 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 10 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 11 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 12 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 13 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 14 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 15 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0 16 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 17 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 18 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 19 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 20 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 21 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0 22 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 23 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 24 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0 25 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0 26 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 27 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 28 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 29 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 30 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 31 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 32 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0 33 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 34 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0 35 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT 36 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT 21 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP 1 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 2 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT 3 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 4 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 5 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 6 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 7 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 8 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 9 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 10 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 11 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 12 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 13 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 14 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 15 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 17 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 19 +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP 20 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"IFP", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IVXLT", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_DISCARD", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ + {"L2_SRC_STATIC_MOVE", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_TTL_ERROR", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ + {"MEMBERSHIP_CHECK_FAILED", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"NO_COPY_TO_CPU", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SPANNING_TREE_CHECK_FAILED", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ + {"TRACE_DOP", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"VFP", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..09d3cb27aa41 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,213 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56890_a0_cna_6_5_29_sf_match_id_info.yml + * for device bcm56890_a0 and variant cna_6_5_29. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56890_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56890_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 2 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 3 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 4 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 5 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 6 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 7 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 8 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 9 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 10 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 11 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 12 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 13 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 14 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 15 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 16 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 17 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 18 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 19 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 20 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 21 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 22 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 23 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 24 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 25 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 26 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 27 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 28 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 29 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 30 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 31 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 32 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 33 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 34 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 35 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 36 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 37 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 38 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 39 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 40 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 41 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 42 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 43 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 44 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 45 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 46 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 47 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 48 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 49 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 50 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 51 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 52 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 53 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 54 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 55 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 56 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 57 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 58 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 59 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 60 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 61 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 62 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 63 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 64 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 65 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 66 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 67 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 68 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 69 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 70 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 71 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 72 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 73 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 74 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 75 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 76 +#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT 77 + +#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr.h new file mode 100644 index 000000000000..76e4d02bf43d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr.h @@ -0,0 +1,184 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_H +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_H + +#include + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T 7 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T 10 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T 11 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T 12 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T 13 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T 15 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T 17 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T 18 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T 19 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T 20 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T 21 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T 22 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T 23 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T 24 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T 25 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T 26 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T 27 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T 28 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T 29 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T 30 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T 31 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T 32 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T 33 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T 34 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T 35 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T 36 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T 37 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T 38 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T 39 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T 40 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T 41 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T 42 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T 43 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T 44 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T 45 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T 46 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T 47 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T 48 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 49 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 50 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T 51 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T 52 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T 53 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T 54 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T 55 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T 56 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T 57 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T 58 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T 59 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T 60 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T 61 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T 62 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T 63 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T 64 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T 65 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T 66 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T 67 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T 68 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T 69 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T 70 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_T 71 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_COUNT 72 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T},\ + {"authen_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T},\ + {"cntag_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T},\ + {"ethertype_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T},\ + {"gbp_ethernet_shim_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T},\ + {"generic_loopback_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T},\ + {"hg3_base_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T},\ + {"hg3_extension_0_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T},\ + {"hop_by_hop_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T},\ + {"ioam_e2e_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T},\ + {"ipfix_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T},\ + {"l2_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T},\ + {"routing_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T},\ + {"segment_routing_srh_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T},\ + {"segment_routing_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T},\ + {"sflow_shim_0_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T},\ + {"std_segment_id_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T},\ + {"svtag_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T},\ + {"tcp_first_4bytes_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr_data.h new file mode 100644 index 000000000000..d264e5895eac --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr_data.h @@ -0,0 +1,1405 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_DATA_H +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_OPERATION 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_AP 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_CPI 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DEM 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DIAG 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FIN 7 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MPT 9 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_POLL 11 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_STA 13 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_VERSION 15 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_RPID 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_PAD 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_SPI 4 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_ID 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GBP_ETHERNET_SHIM_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_SID 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_VER 5 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \ + {"ETHERTYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\ + {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\ + {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\ + {"SID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\ + {"SUBTYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\ + {"VER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\ + {"gbp_ethernet_shim_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM 13 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"SRC_SUBPORT_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\ + {"START_BYTE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FLAGS 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_VNI 4 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_RESERVED 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_VERSION 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HG3_BASE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_CN 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_CNG 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_ENTROPY 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_L3_ROUTED 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_TC 11 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_VERSION 12 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FID_COUNT 13 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_CN},\ + {"CNG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_CNG},\ + {"ENTROPY", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_ENTROPY},\ + {"EXT_HDR_PRESENT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ + {"HG3_RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ + {"L3_ROUTED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_L3_ROUTED},\ + {"MIRROR_COPY", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ + {"RESERVED_ETYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ + {"SYSTEM_DESTINATION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ + {"SYSTEM_DESTINATION_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ + {"SYSTEM_SOURCE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ + {"TC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_TC},\ + {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_VERSION},\ + {"hg3_base_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FID_COUNT} + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +/*! + * \name HG3_EXTENSION_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_SVP 5 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ + {"CLASS_ID_LSB", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ + {"CLASS_ID_MSB", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ + {"DVP_OR_L3_IIF", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ + {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ + {"FORWARDING_DOMAIN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ + {"SVP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_SVP},\ + {"hg3_extension_0_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_CODE 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IOAM_E2E_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_NAMESPACE_ID 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_RESERVED 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_TYPE 6 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \ + {"IOAM_E2E_DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\ + {"IOAM_E2E_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\ + {"IOAM_HDR_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\ + {"NAMESPACE_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\ + {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\ + {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_RESERVED},\ + {"TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_TYPE},\ + {"ioam_e2e_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_DA 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_ID 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_OPTION 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_SA 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TOS 7 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TTL 9 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_DA 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_SA 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_MACDA 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_MACSA 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_BOS 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_EXP 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_LABEL 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_TTL 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_OPERATION 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_DATA 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_TAG 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SEGMENT_ROUTING_SRH_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG 6 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS},\ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN},\ + {"LAST_ENTRY", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT},\ + {"TAG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG},\ + {"segment_routing_srh_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT} + +/*! + * \name SEGMENT_ROUTING_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_TAG 6 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN},\ + {"LAST_ENTRY_FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE},\ + {"SEG_LIST", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST},\ + {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT},\ + {"TAG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_TAG},\ + {"segment_routing_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name STD_SEGMENT_ID_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_DATA 0 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_DATA},\ + {"std_segment_id_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT} + +/*! + * \name SVTAG_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_DATA_LWR 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_DATA_UPR 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ + {"DATA_LWR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_DATA_LWR},\ + {"DATA_UPR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_DATA_UPR},\ + {"svtag_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"L5_BYTES_8_9", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\ + {"unknown_l5_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_CFI 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_PCP 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_TPID 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_VID 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FLAGS 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_SPI 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 000000000000..3913e6c5a434 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,198 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DVP_15_0 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 7 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 8 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 9 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 10 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 11 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 12 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 13 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 14 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 15 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 16 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0 17 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0 18 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 19 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 20 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 21 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 22 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 23 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_8_0 24 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 25 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 26 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 27 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L2_IIF_12_0 28 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L2_OIF_12_0 29 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0 30 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 31 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 32 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0 33 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0 34 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 35 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 36 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 37 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 38 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 39 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0 40 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0 41 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0 42 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0 43 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVP_15_0 44 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 45 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0 46 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0 47 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0 48 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 49 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 50 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 51 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 52 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 53 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_VFI_15_0 54 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 55 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_FID_COUNT 56 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_COUNT 48 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DEFAULT 2 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 4 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 5 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 6 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP 7 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT 8 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS 9 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP 10 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 11 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 12 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT 13 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 14 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 15 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 16 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 17 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 18 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 19 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 20 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 21 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 22 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 23 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 24 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 25 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 26 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 27 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 28 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 29 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 30 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 31 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 32 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 33 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 34 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 35 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 36 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 37 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 38 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 39 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 40 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SRV6 41 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SVP 42 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 44 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 45 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 46 +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_VFP 47 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DEFAULT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"EM_FT_HPAE_MISS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\ + {"IFP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SER_DROP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SRV6", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SRV6},\ + {"SVP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 000000000000..ad98e5d86424 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,515 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56890_a0_dna_6_5_29_1_2_sf_match_id_info.yml + * for device bcm56890_a0 and variant dna_6_5_29_1_2. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG 0 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM 1 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 2 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 3 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 4 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 5 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 6 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 7 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 8 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 9 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 10 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 11 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 12 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 13 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 14 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 15 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 16 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 17 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 18 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 19 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 20 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 21 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 22 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 23 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 24 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 25 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 26 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 27 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 28 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 29 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 30 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 31 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E 32 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 33 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 34 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 35 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 36 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 37 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 38 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 39 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 40 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 41 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 42 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 43 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 44 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 45 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 46 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 47 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 48 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 49 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 50 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 51 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 52 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 53 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 54 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 55 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 56 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 57 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 58 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 59 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 60 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 61 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 62 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 63 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG 64 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM 65 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 66 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 67 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 68 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 69 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 70 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 71 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 72 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 73 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 74 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 75 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 76 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 77 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 78 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 79 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 80 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 81 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 82 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 83 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 84 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 85 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 86 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 87 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 88 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 89 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 90 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 91 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 92 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 93 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 94 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 95 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E 96 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 97 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 98 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 99 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 100 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 101 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 102 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 103 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 104 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 105 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 106 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 107 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 108 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 109 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 110 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 111 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 112 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 113 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 114 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 115 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 116 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 117 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 118 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 119 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 120 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 121 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 122 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 123 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 124 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG 125 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 126 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 127 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 128 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 129 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 130 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 131 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 132 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 133 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 134 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 135 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 136 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 137 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 138 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 139 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 140 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 141 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 142 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 143 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER 144 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 145 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 146 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 147 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 148 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 149 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 150 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 151 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 152 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 153 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 154 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 155 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 156 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 157 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 158 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 159 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 160 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 161 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 162 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 163 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG 164 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM 165 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 166 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 167 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 168 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 169 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 170 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 171 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 172 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 173 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 174 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 175 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 176 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 177 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 178 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 179 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 180 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 181 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 182 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 183 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 184 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 185 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 186 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 187 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 188 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 189 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 190 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 191 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 192 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 193 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 194 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 195 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E 196 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 197 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 198 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 199 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 200 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 201 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 202 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 203 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 204 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 205 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 206 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 207 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 208 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 209 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 210 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 211 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 212 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 213 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 214 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 215 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 216 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 217 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 218 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 219 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 220 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 221 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 222 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 223 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 224 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 225 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 226 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 227 +#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_COUNT 228 + +#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c new file mode 100644 index 000000000000..d723dfb66b40 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c @@ -0,0 +1,203 @@ +/*! \file bcmpkt_lbhdr.c + * + * Loopback header (LBHDR, called LOOPBACK_MH in hardware) access interface. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include +#include +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_lbhdr_fget_t _bd##_lbhdr_fget; +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_lbhdr_fget, +static const bcmpkt_lbhdr_fget_t *lbhdr_fget[] = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_lbhdr_fset_t _bd##_lbhdr_fset; +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_lbhdr_fset, +static const bcmpkt_lbhdr_fset_t *lbhdr_fset[] = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_lbhdr_figet_t _bd##_lbhdr_figet; +#include + +#if 0 +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_lbhdr_figet, +static const bcmpkt_lbhdr_figet_t *lbhdr_figet[] = { + NULL, +#include + NULL +}; +#endif + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_lbhdr_view_info_get, +static void (*view_info_get[])(bcmpkt_pmd_view_info_t *info) = { + NULL, +#include + NULL +}; + +static const shr_enum_map_t field_names[] = +{ + BCMPKT_LBHDR_FIELD_NAME_MAP_INIT +}; + +int +bcmpkt_lbhdr_field_get(bcmdrd_dev_type_t dev_type, uint32_t *lbhdr, + int fid, uint32_t *val) +{ + + if ((lbhdr == NULL) || (val == NULL)) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (fid < 0 || fid >= BCMPKT_LBHDR_FID_COUNT) { + return SHR_E_PARAM; + } + + if (lbhdr_fget[dev_type] == NULL || + lbhdr_fget[dev_type]->fget[fid] == NULL) { + return SHR_E_UNAVAIL; + } + + *val = lbhdr_fget[dev_type]->fget[fid](lbhdr); + + return SHR_E_NONE; +} + +int +bcmpkt_lbhdr_field_set(bcmdrd_dev_type_t dev_type, uint32_t *lbhdr, + int fid, uint32_t val) +{ + + if (lbhdr == NULL) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (fid < 0 || fid >= BCMPKT_LBHDR_FID_COUNT) { + return SHR_E_PARAM; + } + + if (lbhdr_fset[dev_type] == NULL || + lbhdr_fset[dev_type]->fset[fid] == NULL) { + return SHR_E_UNAVAIL; + } + + lbhdr_fset[dev_type]->fset[fid](lbhdr, val); + + return SHR_E_NONE; +} + +int +bcmpkt_lbhdr_field_name_get(int fid, char **name) +{ + + if (name == NULL) { + return SHR_E_PARAM; + } + + if (fid <= BCMPKT_LBHDR_FID_INVALID || + fid >= BCMPKT_LBHDR_FID_COUNT) { + return SHR_E_PARAM; + } + + *name = field_names[fid].name; + + return SHR_E_NONE; +} + +int +bcmpkt_lbhdr_field_id_get(char* name, int *fid) +{ + int i; + + if ((name == NULL) || (fid == NULL)) { + return SHR_E_PARAM; + } + + for (i = BCMPKT_LBHDR_FID_INVALID + 1; i < BCMPKT_LBHDR_FID_COUNT; i++) { + if (sal_strcasecmp(field_names[i].name, name) == 0) { + *fid = field_names[i].val; + return SHR_E_NONE; + } + } + + return SHR_E_NOT_FOUND; +} + +int +bcmpkt_lbhdr_fid_support_get(bcmdrd_dev_type_t dev_type, + bcmpkt_lbhdr_fid_support_t *support) +{ + int i; + bcmpkt_pmd_view_info_t view_info; + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + if (view_info_get[dev_type] == NULL) { + return SHR_E_INTERNAL; + } + if (support == NULL) { + return SHR_E_PARAM; + } + sal_memset(support, 0, sizeof(*support)); + + view_info_get[dev_type](&view_info); + if ((view_info.view_types == NULL) || (view_info.view_infos == NULL)) { + return SHR_E_UNAVAIL; + } + + for (i = BCMPKT_LBHDR_FID_INVALID + 1; i < BCMPKT_LBHDR_FID_COUNT; i++) { + if (view_info.view_infos[i] >= -1) { + SHR_BITSET(support->fbits, i); + } + } + + return SHR_E_NONE; +} + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c new file mode 100644 index 000000000000..ded07cbdb02a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c @@ -0,0 +1,412 @@ +/*! \file bcmpkt_rxpmd.c + * + * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include +#include +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_rxpmd_fget_t _bd##_rxpmd_fget; +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_rxpmd_fget, +/*! This sequence should be same as bcmdrd_cm_dev_type_t */ +static const bcmpkt_rxpmd_fget_t *rxpmd_fget[] = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_rxpmd_fset_t _bd##_rxpmd_fset; +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_rxpmd_fset, +/*! This sequence should be same as bcmdrd_cm_dev_type_t */ +static const bcmpkt_rxpmd_fset_t *rxpmd_fset[] = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_rxpmd_figet_t _bd##_rxpmd_figet; +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_rxpmd_figet, +/*! This sequence should be same as bcmdrd_cm_dev_type_t */ +static const bcmpkt_rxpmd_figet_t *rxpmd_figet[] = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_rx_reason_decode, +/*! This sequence should be same as bcmdrd_cm_dev_type_t */ +static void (*reason_fdecode[])(const uint32_t*, bcmpkt_rx_reasons_t*) = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_rx_reason_encode, +static void (*reason_fencode[])(const bcmpkt_rx_reasons_t*, uint32_t*) = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_ep_rx_reason_decode, +/*! This sequence should be same as bcmdrd_cm_dev_type_t */ +static void (*ep_reason_fdecode[])(const uint32_t*, bcmpkt_rx_reasons_t*) = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_ep_rx_reason_encode, +static void (*ep_reason_fencode[])(const bcmpkt_rx_reasons_t*, uint32_t*) = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_rxpmd_view_info_get, +static void (*view_info_get[])(bcmpkt_pmd_view_info_t *) = { + NULL, +#include + NULL +}; + + +static const shr_enum_map_t field_names[] = +{ + BCMPKT_RXPMD_FIELD_NAME_MAP_INIT +}; + +static const shr_enum_map_t reason_names[] = +{ + BCMPKT_REASON_NAME_MAP_INIT +}; + +int +bcmpkt_rxpmd_len_get(bcmdrd_dev_type_t dev_type, uint32_t *len) +{ + + if (len == NULL) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_figet[dev_type] == NULL || + rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_SIZE] == NULL) { + return SHR_E_UNAVAIL; + } + + *len = rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_SIZE](NULL, NULL) * 4; + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_field_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + int fid, uint32_t *val) +{ + + if ((rxpmd == NULL) || (val == NULL)) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (fid < 0 || fid >= BCMPKT_RXPMD_FID_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_fget[dev_type] == NULL || + rxpmd_fget[dev_type]->fget[fid] == NULL) { + return SHR_E_UNAVAIL; + } + + *val = rxpmd_fget[dev_type]->fget[fid](rxpmd); + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_field_set(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + int fid, uint32_t val) +{ + + if (rxpmd == NULL) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (fid < 0 || fid >= BCMPKT_RXPMD_FID_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_fset[dev_type] == NULL || + rxpmd_fset[dev_type]->fset[fid] == NULL) { + return SHR_E_UNAVAIL; + } + + rxpmd_fset[dev_type]->fset[fid](rxpmd, val); + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_mh_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + uint32_t **hg_hdr) +{ + int len; + + if ((rxpmd == NULL) || (hg_hdr == NULL)) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_figet[dev_type] == NULL || + rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_MODULE_HDR] == NULL) { + return SHR_E_UNAVAIL; + } + + len = rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_MODULE_HDR](rxpmd, hg_hdr); + if (len <= 0) { + return SHR_E_INTERNAL; + } + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_flexdata_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + uint32_t **flexdata, uint32_t *len) +{ + + if ((rxpmd == NULL) || (flexdata == NULL) || (len == NULL)) { + return SHR_E_PARAM; + } + + *len = 0; + if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_figet[dev_type] == NULL || + rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_FLEX_DATA] == NULL) { + return SHR_E_UNAVAIL; + } + + *len = rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_FLEX_DATA](rxpmd, flexdata); + if (*len == 0) { + return SHR_E_INTERNAL; + } + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_reasons_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd, + bcmpkt_rx_reasons_t *reasons) +{ + uint32_t *reason = NULL; + int len; + shr_error_t rv = SHR_E_NONE; + uint32_t reason_type = BCMPKT_RXPMD_REASON_T_FROM_IP; + + if ((rxpmd == NULL) || (reasons == NULL)) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_figet[dev_type] == NULL || + rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_REASON] == NULL) { + return SHR_E_UNAVAIL; + } + + BCMPKT_RX_REASON_CLEAR_ALL(*reasons); + len = rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_REASON](rxpmd, &reason); + if (len <= 0) { + return SHR_E_INTERNAL; + } + + rv = bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_REASON_TYPE, + &reason_type); + if ((rv == SHR_E_NONE) && (reason_type == BCMPKT_RXPMD_REASON_T_FROM_EP)) { + ep_reason_fdecode[dev_type](reason, reasons); + } else { + reason_fdecode[dev_type](reason, reasons); + } + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_reasons_set(bcmdrd_dev_type_t dev_type, + bcmpkt_rx_reasons_t *reasons, uint32_t *rxpmd) +{ + uint32_t *reason = NULL; + int len; + shr_error_t rv = SHR_E_NONE; + uint32_t reason_type = BCMPKT_RXPMD_REASON_T_FROM_IP; + + if ((rxpmd == NULL) || (reasons == NULL)) { + return SHR_E_PARAM; + } + + + if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_figet[dev_type] == NULL || + rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_REASON] == NULL) { + return SHR_E_UNAVAIL; + } + len = rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_REASON](rxpmd, &reason); + if (len <= 0) { + return SHR_E_UNAVAIL; + } + + sal_memset(reason, 0, len * 4); + rv = bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_REASON_TYPE, + (uint32_t *)&reason_type); + if ((rv == SHR_E_NONE) && (reason_type == BCMPKT_RXPMD_REASON_T_FROM_EP)) { + ep_reason_fencode[dev_type](reasons, reason); + } else { + reason_fencode[dev_type](reasons, reason); + } + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_field_name_get(int fid, char **name) +{ + if (name == NULL) { + return SHR_E_PARAM; + } + if (fid <= BCMPKT_RXPMD_FID_INVALID || + fid >= BCMPKT_RXPMD_FID_COUNT) { + return SHR_E_PARAM; + } + + *name = field_names[fid].name; + + return SHR_E_NONE; +} + +int +bcmpkt_rxpmd_field_id_get(char* name, int *fid) +{ + int i; + + if ((name == NULL) || (fid == NULL)) { + return SHR_E_PARAM; + } + + for (i = BCMPKT_RXPMD_FID_INVALID + 1; i < BCMPKT_RXPMD_FID_COUNT; i++) { + if (sal_strcasecmp(field_names[i].name, name) == 0) { + *fid = field_names[i].val; + return SHR_E_NONE; + } + } + + return SHR_E_NOT_FOUND; +} + +int +bcmpkt_rxpmd_fid_support_get(bcmdrd_dev_type_t dev_type, + bcmpkt_rxpmd_fid_support_t *support) +{ + int i; + bcmpkt_pmd_view_info_t view_info; + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + if (view_info_get[dev_type] == NULL) { + return SHR_E_INTERNAL; + } + if (support == NULL) { + return SHR_E_PARAM; + } + sal_memset(support, 0, sizeof(*support)); + + view_info_get[dev_type](&view_info); + if ((view_info.view_types == NULL) || (view_info.view_infos == NULL)) { + return SHR_E_UNAVAIL; + } + + for (i = BCMPKT_RXPMD_FID_INVALID + 1; i < BCMPKT_RXPMD_FID_COUNT; i++) { + if (view_info.view_infos[i] >= -1) { + SHR_BITSET(support->fbits, i); + } + } + + return SHR_E_NONE; +} + +int +bcmpkt_rx_reason_name_get(int reason, char **name) +{ + + if (name == NULL) { + return SHR_E_PARAM; + } + + if (reason <= BCMPKT_RX_REASON_NONE || + reason > BCMPKT_RX_REASON_COUNT) { + return SHR_E_PARAM; + } + + *name = reason_names[reason].name; + + return SHR_E_NONE; +} + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..69bbb495c964 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c @@ -0,0 +1,228 @@ +/*! \file bcmpkt_rxpmd_match_id.c + * + * RX Packet Metadata API to return the RXPMD match id information. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include +#include +#include +#include +#include +#include + +/* Define stub functions for base variant. */ +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ +bcmpkt_rxpmd_match_id_db_info_t * \ +_bc##_rxpmd_match_id_db_info_get(void) {return NULL;} +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ +bcmpkt_rxpmd_match_id_map_info_t * \ +_bc##_rxpmd_match_id_map_info_get(void) {return NULL;} +#include + +/* Array of device variant specific api's */ +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \ + &_bd##_vu##_va##_rxpmd_match_id_db_info_get, +static bcmpkt_rxpmd_match_id_db_info_t * (*rxpmd_match_id_db_info_get[])(void) = { + NULL, +#include + NULL +}; + +/* Array of device variant specific api's */ +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \ + &_bd##_vu##_va##_rxpmd_match_id_map_info_get, +static bcmpkt_rxpmd_match_id_map_info_t * (*rxpmd_match_id_map_info_get[])(void) = { + NULL, +#include + NULL +}; + + +int +bcmpkt_rxpmd_match_id_get(bcmlrd_variant_t variant, + char *name, + uint32_t *match_id) +{ + const bcmpkt_rxpmd_match_id_map_info_t *map_info; + const shr_enum_map_t *id_map = NULL; + uint32_t idx; + + if ((name == NULL) || (match_id == NULL)) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_match_id_map_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + map_info = rxpmd_match_id_map_info_get[variant](); + if (map_info == NULL) { + return SHR_E_UNAVAIL; + } + + id_map = map_info->map; + if (id_map == NULL) { + return SHR_E_UNAVAIL; + } + + idx = 0; + while (idx < map_info->num_entries) { + if (sal_strcasecmp(id_map->name, name) == 0) { + *match_id = id_map->val; + return SHR_E_NONE; + } + idx++; + id_map++; + } + + return SHR_E_UNAVAIL; +} + + +int +bcmpkt_rxpmd_match_id_present(bcmlrd_variant_t variant, + uint32_t *match_id_array, + uint32_t array_len, + uint32_t match_id) +{ + const bcmpkt_rxpmd_match_id_db_t *db; + const bcmpkt_rxpmd_match_id_db_t *db_entry; + const bcmpkt_rxpmd_match_id_db_info_t *db_info; + uint32_t lsb, msb, match_data; + uint32_t start, right_shift; + + if (match_id_array == NULL) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_match_id_db_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + db_info = rxpmd_match_id_db_info_get[variant](); + if (db_info == NULL) { + return SHR_E_UNAVAIL; + } + + db = db_info->db; + if (db == NULL) { + return SHR_E_UNAVAIL; + } + + /* Check to see if db_entry is in the valid range */ + if (match_id >= db_info->num_entries) { + return SHR_E_PARAM; + } + + db_entry = &db[match_id]; + + start = db_entry->match_minbit / 32; + if (start >= array_len) { + return SHR_E_PARAM; + } + + /* Extract the bits for the match_id from the match_id data */ + right_shift = db_entry->match_minbit % 32; + lsb = match_id_array[start] >> right_shift; + + if (start == 1) { + msb = 0; + } else { + msb = match_id_array[start + 1] & ((1 << right_shift) - 1); + msb <<= (32 - right_shift); + } + + /* Mask off the data and see if it matched for the match_id */ + match_data = msb | lsb; + match_data &= db_entry->match_mask; + if (match_data == db_entry->match) { + return SHR_E_NONE; + } + + return SHR_E_NOT_FOUND; +} + +int +bcmpkt_rxpmd_match_id_from_arc_id_present(bcmlrd_variant_t variant, + uint32_t *arc_id_array, + uint32_t array_len, + uint32_t match_id) +{ + uint64_t arc_id; + const bcmpkt_rxpmd_match_id_db_t *db; + const bcmpkt_rxpmd_match_id_db_t *db_entry; + const bcmpkt_rxpmd_match_id_db_info_t *db_info; + + if ((arc_id_array == NULL) || (array_len != 2)) { + return SHR_E_PARAM; + } + + if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) { + return SHR_E_PARAM; + } + + if (rxpmd_match_id_db_info_get[variant] == NULL) { + return SHR_E_UNAVAIL; + } + + db_info = rxpmd_match_id_db_info_get[variant](); + if (db_info == NULL) { + return SHR_E_UNAVAIL; + } + + db = db_info->db; + if (db == NULL) { + return SHR_E_UNAVAIL; + } + + /* Check to see if db_entry is in the valid range */ + if (match_id >= db_info->num_entries) { + return SHR_E_PARAM; + } + + db_entry = &db[match_id]; + + if (db_entry->zone_bmp != NULL) { + + arc_id = (((uint64_t)arc_id_array[1] << 32) | arc_id_array[0]); + arc_id = (arc_id & db_entry->arc_id_mask) >> db_entry->zone_minbit; + + /* Check to see if arc id is in the valid range */ + if (arc_id >= db_entry->num_zone_bmp_words * 32) { + return SHR_E_NOT_FOUND; + } + + if (SHR_BITGET(db_entry->zone_bmp, arc_id)) { + return SHR_E_NONE; + } + } + + return SHR_E_NOT_FOUND; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c new file mode 100644 index 000000000000..b5556cccd0a7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c @@ -0,0 +1,256 @@ +/*! \file bcmpkt_txpmd.c + * + * TX Packet MetaData (TXPMD, called SOBMH in hardware) access interface. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include +#include +#include +#include + + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_txpmd_fget_t _bd##_txpmd_fget; +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_txpmd_fget, +static const bcmpkt_txpmd_fget_t *txpmd_fget[] = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_txpmd_fset_t _bd##_txpmd_fset; +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_txpmd_fset, +static const bcmpkt_txpmd_fset_t *txpmd_fset[] = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + extern const bcmpkt_txpmd_figet_t _bd##_txpmd_figet; +#include + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_txpmd_figet, +static const bcmpkt_txpmd_figet_t *txpmd_figet[] = { + NULL, +#include + NULL +}; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + &_bd##_txpmd_view_info_get, +static void (*view_info_get[])(bcmpkt_pmd_view_info_t *info) = { + NULL, +#include + NULL +}; + +static const shr_enum_map_t field_names[] = +{ + BCMPKT_TXPMD_FIELD_NAME_MAP_INIT +}; + +int +bcmpkt_txpmd_len_get(bcmdrd_dev_type_t dev_type, uint32_t *len) +{ + if (len == NULL) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (txpmd_figet[dev_type] == NULL || + txpmd_figet[dev_type]->fget[BCMPKT_TXPMD_I_SIZE] == NULL) { + return SHR_E_UNAVAIL; + } + + *len = txpmd_figet[dev_type]->fget[BCMPKT_TXPMD_I_SIZE](NULL, NULL) * 4; + + return SHR_E_NONE; +} + +int +bcmpkt_txpmd_field_get(bcmdrd_dev_type_t dev_type, uint32_t *txpmd, + int fid, uint32_t *val) +{ + + if ((txpmd == NULL) || (val == NULL)) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (fid < 0 || fid >= BCMPKT_TXPMD_FID_COUNT) { + return SHR_E_PARAM; + } + + if (txpmd_fget[dev_type] == NULL || + txpmd_fget[dev_type]->fget[fid] == NULL) { + return SHR_E_UNAVAIL; + } + + *val = txpmd_fget[dev_type]->fget[fid](txpmd); + + return SHR_E_NONE; +} + +int +bcmpkt_txpmd_field_set(bcmdrd_dev_type_t dev_type, uint32_t *txpmd, + int fid, uint32_t val) +{ + if (txpmd == NULL) { + return SHR_E_PARAM; + } + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (fid < 0 || fid >= BCMPKT_TXPMD_FID_COUNT) { + return SHR_E_PARAM; + } + + if (txpmd_fset[dev_type] == NULL || + txpmd_fset[dev_type]->fset[fid] == NULL) { + return SHR_E_UNAVAIL; + } + + txpmd_fset[dev_type]->fset[fid](txpmd, val); + + return SHR_E_NONE; +} + +int +bcmpkt_txpmd_field_name_get(int fid, char **name) +{ + if (name == NULL) { + return SHR_E_PARAM; + } + + if (fid <= BCMPKT_TXPMD_FID_INVALID || + fid >= BCMPKT_TXPMD_FID_COUNT) { + return SHR_E_PARAM; + } + + *name = field_names[fid].name; + + return SHR_E_NONE; +} + +int +bcmpkt_txpmd_field_id_get(char* name, int *fid) +{ + int i; + + if ((name == NULL) || (fid == NULL)) { + return SHR_E_PARAM; + } + + for (i = BCMPKT_TXPMD_FID_INVALID + 1; i < BCMPKT_TXPMD_FID_COUNT; i++) { + if (sal_strcasecmp(field_names[i].name, name) == 0) { + *fid = field_names[i].val; + return SHR_E_NONE; + } + } + + return SHR_E_NOT_FOUND; +} + +int +bcmpkt_txpmd_fid_support_get(bcmdrd_dev_type_t dev_type, + bcmpkt_txpmd_fid_support_t *support) +{ + int i; + bcmpkt_pmd_view_info_t view_info; + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + if (view_info_get[dev_type] == NULL) { + return SHR_E_INTERNAL; + } + if (support == NULL) { + return SHR_E_PARAM; + } + sal_memset(support, 0, sizeof(*support)); + + view_info_get[dev_type](&view_info); + if ((view_info.view_types == NULL) || (view_info.view_infos == NULL)) { + return SHR_E_UNAVAIL; + } + + for (i = BCMPKT_TXPMD_FID_INVALID + 1; i < BCMPKT_TXPMD_FID_COUNT; i++) { + if (view_info.view_infos[i] >= -1) { + SHR_BITSET(support->fbits, i); + } + } + + return SHR_E_NONE; +} + +int +bcmpkt_txpmd_fid_view_get(bcmdrd_dev_type_t dev_type, + int fid, int *view) + +{ + bcmpkt_pmd_view_info_t view_info; + + if (dev_type <= BCMDRD_DEV_T_NONE || + dev_type >= BCMDRD_DEV_T_COUNT) { + return SHR_E_PARAM; + } + + if (view == NULL) { + return SHR_E_PARAM; + } + + if (fid <= BCMPKT_TXPMD_FID_INVALID || + fid >= BCMPKT_TXPMD_FID_COUNT) { + return SHR_E_PARAM; + } + + if (view_info_get[dev_type] == NULL) { + return SHR_E_INTERNAL; + } + + view_info_get[dev_type](&view_info); + if ((view_info.view_types == NULL) || (view_info.view_infos == NULL)) { + return SHR_E_UNAVAIL; + } + *view = view_info.view_infos[fid]; + + return SHR_E_NONE; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c new file mode 100644 index 000000000000..162127bdfb59 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c @@ -0,0 +1,78 @@ +/*! \file bcmpkt_util.c + * + * BCMPKT utility functions. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include +#include +#include +#include +#include + +/*! This sequence should be same as bcmdrd_cm_dev_type_t */ +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + {#_bd, BCMDRD_DEV_T_##_bd}, +static const struct { + char *dev_name; + bcmdrd_dev_type_t dev_type; +} device_types[] = { + {"none", BCMDRD_DEV_T_NONE}, +#include + {"invalid", BCMDRD_DEV_T_COUNT} +}; + +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ + {#_bd, #_ve, BCMLRD_VARIANT_T_##_bd##_##_ve}, +static const struct { + char *dev_name; + char *var_name; + bcmlrd_variant_t var_type; +} variant_types[] = { + {"none", "none", BCMLRD_VARIANT_T_NONE}, +#include + {"invalid", "invalid", BCMLRD_VARIANT_T_COUNT} +}; + +bcmdrd_dev_type_t +bcmpkt_util_dev_type_get(const char *dev_name) +{ + int idx; + + for (idx = 0; idx < COUNTOF(device_types); idx++) { + if (sal_strcasecmp(dev_name, device_types[idx].dev_name) == 0) { + return device_types[idx].dev_type; + } + } + return BCMDRD_DEV_T_NONE; +} + +bcmlrd_variant_t +bcmpkt_util_variant_type_get(const char *dev_name, const char *var_name) +{ + int idx; + + for (idx = 0; idx < COUNTOF(variant_types); idx++) { + if (sal_strcasecmp(dev_name, variant_types[idx].dev_name) == 0 && + sal_strcasecmp(var_name, variant_types[idx].var_name) == 0) { + return variant_types[idx].var_type; + } + } + return BCMLRD_VARIANT_T_NONE; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..04d384f9e1f3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,6760 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56690_a0_dna_6_5_29_0_1_sf_match_id_info.yml + * for device bcm56690_a0 and variant dna_6_5_29_0_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] = +{ + 0x366c, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = +{ + 0x78f0, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = +{ + 0x1fffe, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = +{ + 0xff00, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] = +{ + 0x1e4c8, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[32] = +{ + 0x10, + 0x4000, + 0x2007f8, + 0x0, + 0x0, + 0xfff00000, + 0xffffffff, + 0xffffffff, + 0x1f, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x10000, + 0x4000000, + 0x7f8000, + 0x2, + 0x0, + 0x0, + 0xffffffff, + 0xffffffff, + 0x1ffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[45] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7fe00000, + 0x0, + 0x0, + 0x1ff80, + 0x0, + 0xfe000000, + 0x7, + 0x0, + 0x3ff, + 0x0, + 0xffc0000, + 0x0, + 0x0, + 0x1ff8, + 0x0, + 0xf0000000, + 0x3f, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7fe, + 0x0, + 0x1ff80000, + 0x0, + 0x0, + 0x7fe0, + 0x0, + 0x3ff000, + 0x0, + 0xc0000000, + 0xff, + 0x0, + 0x1ff8000, + 0x0, + 0x0, + 0x3ff00, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[47] = +{ + 0x0, + 0x0, + 0x20000080, + 0x0, + 0x0, + 0x8000010, + 0x4010020, + 0x808020, + 0x802002, + 0x801004, + 0x80080202, + 0x80100200, + 0x8020200, + 0x8010040, + 0x4010020, + 0x1001004, + 0x802004, + 0x40101004, + 0x40080200, + 0x20080100, + 0x808020, + 0x801004, + 0x40401002, + 0x100, + 0x0, + 0x80000, + 0x200, + 0x0, + 0x10000, + 0x10020080, + 0x8020040, + 0x2002008, + 0x1004008, + 0x80202008, + 0x200800, + 0x20200801, + 0x10040080, + 0x10020080, + 0x1004040, + 0x2004010, + 0x1004008, + 0x80200401, + 0x80100400, + 0x8020200, + 0x1004008, + 0x1002008, + 0x100404, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[35] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffffffc0, + 0xffffffff, + 0x7fffff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfffc0000, + 0xffffffff, + 0xffffffff, + 0x7, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[45] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x1ff, + 0x0, + 0x7fe0000, + 0x0, + 0x0, + 0x1ff8, + 0x0, + 0xffc00, + 0x0, + 0xf0000000, + 0x3f, + 0x0, + 0x7fe000, + 0x0, + 0x0, + 0xffc0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1ff800, + 0x0, + 0xe0000000, + 0x7f, + 0x0, + 0x1ff8000, + 0x0, + 0xffc00000, + 0x0, + 0x0, + 0x3ff00, + 0x0, + 0xfe000000, + 0x7, + 0x0, + 0xffc0000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[45] = +{ + 0x0, + 0x0, + 0x400000, + 0x0, + 0x0, + 0x0, + 0x200, + 0x0, + 0x8000000, + 0x0, + 0x800000, + 0x2000, + 0x0, + 0x100000, + 0x0, + 0x0, + 0x40, + 0x0, + 0x800000, + 0x0, + 0x0, + 0x10000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x4, + 0x0, + 0x0, + 0x200000, + 0x0, + 0x0, + 0x80, + 0x0, + 0x2000008, + 0x0, + 0x0, + 0x1, + 0x0, + 0x40000, + 0x0, + 0x0, + 0x8, + 0x0, + 0x10000000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[24] = +{ + 0x1e, + 0x4000, + 0xffe007f8, + 0x3, + 0x800, + 0xfffc00ff, + 0xffffffff, + 0xffffffff, + 0xffffffdf, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0x6fff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[37] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xff000000, + 0xffffffff, + 0x7fffffff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfffffff0, + 0xffffffff, + 0x7ff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[46] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffc00, + 0x0, + 0xf0000000, + 0x3f, + 0x0, + 0x0, + 0x0, + 0x7fe00000, + 0x0, + 0x0, + 0x1ff80, + 0x0, + 0xff000000, + 0x3, + 0x0, + 0x7fe0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffc00000, + 0x0, + 0x0, + 0x3ff00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7fe, + 0x0, + 0x1ff80000, + 0x0, + 0x0, + 0x3ff0, + 0x0, + 0xe0000000, + 0x7f, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0xffffffff, + 0xffffffff, + 0xffff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfffff800, + 0xffffffff, + 0xfffffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[46] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3ff00000, + 0x0, + 0x0, + 0xffc0, + 0x0, + 0xffc000, + 0x0, + 0x80000000, + 0x1ff, + 0x0, + 0x7fe0000, + 0x0, + 0x0, + 0xffc, + 0x0, + 0xf8000000, + 0x1f, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3ff, + 0x0, + 0xffc0000, + 0x0, + 0xfc000000, + 0xf, + 0x0, + 0x1ff800, + 0x0, + 0xe0000000, + 0x7f, + 0x0, + 0xffc000, + 0x0, + 0x0, + 0x1ff80, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[47] = +{ + 0x0, + 0x4000, + 0x800000, + 0x0, + 0x800, + 0x400000, + 0x40200801, + 0x10000401, + 0x20040100, + 0x10050080, + 0x4004000, + 0x5008010, + 0x400010, + 0x400802, + 0x200a01, + 0x20090080, + 0x28040100, + 0x2000080, + 0x2004010, + 0x1005008, + 0x20000400, + 0x10040080, + 0x200a0, + 0x8, + 0x4000000, + 0x0, + 0x8, + 0x800000, + 0x0, + 0x801004, + 0x401402, + 0x40100100, + 0x50080200, + 0x4000100, + 0x8010040, + 0x10050, + 0x802004, + 0xa01004, + 0x90080002, + 0x40100200, + 0x80280, + 0x4010020, + 0x5008020, + 0x400010, + 0x40080200, + 0x200a0100, + 0x8000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[29] = +{ + 0x0, + 0x0, + 0x1200000, + 0x0, + 0x0, + 0x40000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x12, + 0x0, + 0x40000000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[29] = +{ + 0x18, + 0x4000, + 0xffe007f8, + 0x3, + 0x800, + 0x400ff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x18000, + 0x4000000, + 0x7f8000, + 0x3ffe, + 0x800000, + 0x400ff000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[47] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfff80000, + 0xffffffff, + 0xffffffff, + 0xffffffdf, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xfff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0xffffffff, + 0xffffffff, + 0xfffdffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffffff, + 0xffffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[47] = +{ + 0x0, + 0x0, + 0x40000100, + 0x0, + 0x0, + 0x10000020, + 0x8020040, + 0x1010040, + 0x1004004, + 0x1002008, + 0x100404, + 0x200401, + 0x10040401, + 0x10020080, + 0x8020040, + 0x2002008, + 0x1004008, + 0x80202008, + 0x80100400, + 0x40100200, + 0x1010040, + 0x1002008, + 0x80802004, + 0x200, + 0x0, + 0x100000, + 0x400, + 0x0, + 0x20000, + 0x20040100, + 0x10040080, + 0x4004010, + 0x2008010, + 0x404010, + 0x401001, + 0x40401002, + 0x20080100, + 0x20040100, + 0x2008080, + 0x4008020, + 0x2008010, + 0x400802, + 0x200801, + 0x10040401, + 0x2008010, + 0x2004010, + 0x200808, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[42] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfffe0000, + 0xffffffff, + 0xffffffff, + 0x3, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xe0000000, + 0xffffffff, + 0xffffffff, + 0x3fff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[46] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x1ff, + 0x0, + 0x7fe0000, + 0x0, + 0xfe000000, + 0x7, + 0x0, + 0xffc00, + 0x0, + 0xf0000000, + 0x3f, + 0x0, + 0x7fe000, + 0x0, + 0x0, + 0xffc0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1ff800, + 0x0, + 0xe0000000, + 0x7f, + 0x0, + 0x7fe0, + 0x0, + 0xffc00000, + 0x0, + 0x0, + 0x3ff00, + 0x0, + 0xfe000000, + 0x7, + 0x0, + 0xffc0000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[24] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x2000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[44] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfffffffc, + 0xffffffff, + 0x7ffff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffffc000, + 0xffffffff, + 0x7fffffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[47] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7fe00, + 0x0, + 0xf8000000, + 0x1f, + 0x0, + 0x1ff8, + 0x0, + 0x3ff00000, + 0x0, + 0x0, + 0xffc0, + 0x0, + 0xff800000, + 0x1, + 0x0, + 0x3ff0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7fe00000, + 0x0, + 0x0, + 0x1ff80, + 0x0, + 0x1ff8000, + 0x0, + 0x0, + 0x3ff, + 0x0, + 0xffc0000, + 0x0, + 0x0, + 0x1ff8, + 0x0, + 0xf0000000, + 0x3f, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[47] = +{ + 0x0, + 0x0, + 0xe000038, + 0x0, + 0x0, + 0x3800007, + 0x1c0700e, + 0xe038380e, + 0xc0380e00, + 0xe0380701, + 0x380380e0, + 0x380700e0, + 0x380e0e0, + 0x380701c, + 0xc1c0700e, + 0xc0700701, + 0xc0380e01, + 0x1c070701, + 0x1c0380e0, + 0xe038070, + 0xc038380e, + 0xe0380701, + 0x1c1c0700, + 0x70, + 0x0, + 0x38000, + 0xe0, + 0x0, + 0x7000, + 0x700e038, + 0x8380e01c, + 0x80e00e03, + 0x80701c03, + 0x380e0e03, + 0x700e0380, + 0xe0e0380, + 0x701c038, + 0x700e038, + 0x701c1c, + 0x80e01c07, + 0x70701c03, + 0x380e01c0, + 0x380701c0, + 0x8380e0e0, + 0x80701c03, + 0xc0700e03, + 0x701c1, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[47] = +{ + 0x0, + 0x0, + 0xc000030, + 0x0, + 0x0, + 0x3000006, + 0x180600c, + 0xc030300c, + 0x80300c00, + 0xc0300601, + 0x300300c0, + 0x300600c0, + 0x300c0c0, + 0x3006018, + 0x8180600c, + 0x80600601, + 0x80300c01, + 0x18060601, + 0x180300c0, + 0xc030060, + 0x8030300c, + 0xc0300601, + 0x18180600, + 0x60, + 0x0, + 0x30000, + 0xc0, + 0x0, + 0x6000, + 0x600c030, + 0x300c018, + 0xc00c03, + 0x601803, + 0x300c0c03, + 0x600c0300, + 0xc0c0300, + 0x6018030, + 0x600c030, + 0x601818, + 0xc01806, + 0x60601803, + 0x300c0180, + 0x30060180, + 0x300c0c0, + 0x601803, + 0x80600c03, + 0x60181, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[47] = +{ + 0x0, + 0x0, + 0xf00003c0, + 0x0, + 0x0, + 0x3c000078, + 0x1e0780f0, + 0x3c3c0f0, + 0x3c0f00f, + 0x3c0781e, + 0xc03c0f0f, + 0xc0780f03, + 0x3c0f0f03, + 0x3c0781e0, + 0x1e0780f0, + 0x780781e, + 0x3c0f01e, + 0xe078781e, + 0xe03c0f01, + 0xf03c0781, + 0x3c3c0f0, + 0x3c0781e, + 0xe1e0780f, + 0x781, + 0x0, + 0x3c0000, + 0xf00, + 0x0, + 0x78000, + 0x780f03c0, + 0x3c0f01e0, + 0xf00f03c, + 0x781e03c, + 0xc0f0f03c, + 0x80f03c03, + 0xf0f03c07, + 0x781e03c0, + 0x780f03c0, + 0x781e1e0, + 0xf01e078, + 0x8781e03c, + 0xc0f01e07, + 0xc0781e03, + 0x3c0f0f03, + 0x781e03c, + 0x780f03c, + 0x781e1e, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[24] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x4000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[47] = +{ + 0x0, + 0x0, + 0x400, + 0x1, + 0x0, + 0x40000080, + 0x20080100, + 0x4040100, + 0x4010010, + 0x4008020, + 0x401010, + 0x801004, + 0x40101004, + 0x40080200, + 0x20080100, + 0x8008020, + 0x4010020, + 0x808020, + 0x401002, + 0x400802, + 0x4040101, + 0x4008020, + 0x2008010, + 0x802, + 0x0, + 0x400000, + 0x1000, + 0x0, + 0x80000, + 0x80100400, + 0x40100200, + 0x10010040, + 0x8020040, + 0x1010040, + 0x1004004, + 0x1004008, + 0x80200401, + 0x80100400, + 0x8020200, + 0x10020080, + 0x8020040, + 0x1002008, + 0x802004, + 0x40101004, + 0x8020040, + 0x8010040, + 0x802020, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[47] = +{ + 0x0, + 0x0, + 0x88000220, + 0x0, + 0x0, + 0x22000044, + 0x11044088, + 0x82222088, + 0x2208808, + 0x82204411, + 0x20220888, + 0x20440882, + 0x22088882, + 0x22044110, + 0x11044088, + 0x4404411, + 0x2208811, + 0x10444411, + 0x10220881, + 0x88220441, + 0x2222088, + 0x82204411, + 0x11104408, + 0x441, + 0x0, + 0x220000, + 0x880, + 0x0, + 0x44000, + 0x44088220, + 0x22088110, + 0x8808822, + 0x4411022, + 0x20888822, + 0x40882202, + 0x88882204, + 0x44110220, + 0x44088220, + 0x4411110, + 0x8811044, + 0x44411022, + 0x20881104, + 0x20441102, + 0x22088882, + 0x4411022, + 0x4408822, + 0x441111, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[47] = +{ + 0x0, + 0x0, + 0x0, + 0x2, + 0x800, + 0x400ff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf8000000, + 0xffffffff, + 0xffffffff, + 0xfff, + 0x0, + 0x0, + 0x2000, + 0x800000, + 0x400ff000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffffff80, + 0xffffffff, + 0xffffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[47] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf8000000, + 0x1f, + 0x0, + 0x7fe000, + 0x0, + 0x7fe00000, + 0x0, + 0x0, + 0xffc0, + 0x0, + 0xff000000, + 0x3, + 0x0, + 0x7fe00, + 0x0, + 0x0, + 0xffc, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1ff80, + 0x0, + 0xfe000000, + 0x7, + 0x0, + 0x7fe, + 0x0, + 0xffc0000, + 0x0, + 0x0, + 0x3ff0, + 0x0, + 0x7fe00000, + 0x0, + 0x0, + 0xffc000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[2] = +{ + 0x33033198, + 0xcc66066, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[2] = +{ + 0x44044220, + 0x11088088, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[2] = +{ + 0xffc00000, + 0xffffffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[2] = +{ + 0x0, + 0xfffff800, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[2] = +{ + 0xf80f87c0, + 0x3e1f01f0, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[2] = +{ + 0xfffffffe, + 0xffffffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[2] = +{ + 0x1ff800, + 0x7fe003ff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[2] = +{ + 0xa23a2510, + 0xe8944744, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[13] = +{ + 0x10, + 0x0, + 0x4, + 0x20003df6, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbfdf7c0, + 0x7dfefbfe, + 0xbeff7dff, + 0x7beff7df, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[34] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3df780, + 0x0, + 0x0, + 0x0, + 0xf7de, + 0x0, + 0x0, + 0x78000000, + 0x3df, + 0x0, + 0x0, + 0x7de00000, + 0xf, + 0x0, + 0x0, + 0xf0000000, + 0x7be, + 0x0, + 0x0, + 0xfbc00000, + 0x1e, + 0x0, + 0x0, + 0x0, + 0x1efbc00, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[39] = +{ + 0x0, + 0x0, + 0x0, + 0x40, + 0x0, + 0x8, + 0x0, + 0x0, + 0x2000, + 0x20004000, + 0x10002000, + 0x8001000, + 0x800100, + 0x800100, + 0x400080, + 0x200040, + 0x20004, + 0x20004, + 0x20002, + 0x10002001, + 0x10000000, + 0x8000800, + 0x4000400, + 0x400200, + 0x20, + 0x40008, + 0x20004, + 0x20010002, + 0x20001000, + 0x10001000, + 0x8000800, + 0x800400, + 0x100040, + 0x20002, + 0x80010001, + 0x40008000, + 0x4000800, + 0x41000200, + 0x4444, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[17] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbeff7df, + 0xfdf7fbef, + 0x7efbfdf7, + 0x1efbfdf, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[35] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbc00000, + 0x1e, + 0x0, + 0x0, + 0x7bef0000, + 0x0, + 0x0, + 0x0, + 0x1efbc00, + 0x0, + 0x0, + 0x0, + 0x7bef0, + 0x0, + 0x0, + 0x0, + 0x3df7800, + 0x0, + 0x0, + 0x0, + 0xf7de0, + 0x0, + 0x0, + 0x0, + 0xde000000, + 0xf7, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[35] = +{ + 0x0, + 0x0, + 0x0, + 0x40000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x20, + 0x0, + 0x0, + 0x80000000, + 0x0, + 0x0, + 0x2000000, + 0x2000000, + 0x0, + 0x0, + 0x0, + 0x80000, + 0x0, + 0x0, + 0x0, + 0x4000000, + 0x0, + 0x0, + 0x0, + 0x100000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x100, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[39] = +{ + 0x1e, + 0x0, + 0x4, + 0xe0003df6, + 0xe22fffff, + 0xfbe, + 0x0, + 0x200, + 0x1efb00, + 0xfbfdf7f0, + 0x7dfefbfe, + 0xbeff7dff, + 0x7beff7df, + 0xfbeff7df, + 0xfdf7fbef, + 0x7efbfdf7, + 0x7fefbfdf, + 0xbfefbfdf, + 0xdfefbfef, + 0x7dfefbf7, + 0x7dffffff, + 0xbeffbeff, + 0xdf7fdf7f, + 0xfdf7efbf, + 0xf88bfefb, + 0x7fdf7fbe, + 0xbfefbfdf, + 0xfbf7dfef, + 0xfbff7dfe, + 0x7dff7dfe, + 0xbeffbeff, + 0xfbefdf7f, + 0xbf7dfdf7, + 0xdfefbfef, + 0xeff7dff7, + 0xf7fbeffb, + 0xdf7fbefd, + 0xffe007fb, + 0x7ffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7c000000, + 0xbfefbfdf, + 0xdfefbfef, + 0x7dfefbf7, + 0xf, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[35] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1efbc0, + 0x0, + 0x0, + 0x0, + 0x7bef, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbef00000, + 0x7, + 0x0, + 0x0, + 0x78000000, + 0x3df, + 0x0, + 0x0, + 0x7de00000, + 0xf, + 0x0, + 0x0, + 0x0, + 0xf7de00, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[37] = +{ + 0x0, + 0x0, + 0x0, + 0x180, + 0x0, + 0x30, + 0x0, + 0x0, + 0xc000, + 0xc0018000, + 0x6000c000, + 0x30006000, + 0x3000600, + 0x3000600, + 0x1800300, + 0xc00180, + 0xc0018, + 0xc0018, + 0xc000c, + 0x6000c006, + 0x60000000, + 0x30003000, + 0x18001800, + 0x1800c00, + 0xc0, + 0x180030, + 0xc0018, + 0xc006000c, + 0xc0006000, + 0x60006000, + 0x30003000, + 0x3001800, + 0x600180, + 0xc000c, + 0x60006, + 0x80030003, + 0x18003001, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[21] = +{ + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x7fff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffff0, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x1fe, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3fc0, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x1e3c, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3c780, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x5568, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xaad00, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x79b0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf3600, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[25] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7df00000, + 0xbeffbeff, + 0xdf7fdf7f, + 0xfdf7efbf, + 0x1efb, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[36] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7de00000, + 0xf, + 0x0, + 0x0, + 0x3df78000, + 0x0, + 0x0, + 0xbc000000, + 0x1ef, + 0x0, + 0x0, + 0x0, + 0x3df78, + 0x0, + 0x0, + 0x0, + 0x1efbc00, + 0x0, + 0x0, + 0x0, + 0x7bef0, + 0x0, + 0x0, + 0x0, + 0xef000000, + 0x7b, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[37] = +{ + 0x0, + 0x0, + 0x4, + 0x0, + 0x8000, + 0x0, + 0x0, + 0x200, + 0x0, + 0x800100, + 0x400080, + 0x200050, + 0x20000, + 0x20004, + 0x40010002, + 0x8001, + 0x10000800, + 0x8000800, + 0x4000a00, + 0x400000, + 0x400000, + 0x200020, + 0x140010, + 0x80000008, + 0x20002000, + 0x10001000, + 0xa000800, + 0x400, + 0x800040, + 0x400040, + 0x280020, + 0x10, + 0x1, + 0x4000800, + 0x2000400, + 0x1000280, + 0x100000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[25] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x22f0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x8bc000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata[25] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x2080000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x820000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[10] = +{ + 0x0, + 0x0, + 0x0, + 0x20000000, + 0x20000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x10, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[37] = +{ + 0x0, + 0x0, + 0x0, + 0x100, + 0x0, + 0x20, + 0x0, + 0x0, + 0x8000, + 0x80010000, + 0x40008000, + 0x20004000, + 0x2000400, + 0x2000400, + 0x1000200, + 0x800100, + 0x80010, + 0x80010, + 0x80008, + 0x40008004, + 0x40000000, + 0x20002000, + 0x10001000, + 0x1000800, + 0x80, + 0x100020, + 0x80010, + 0x80040008, + 0x80004000, + 0x40004000, + 0x20002000, + 0x2001000, + 0x400100, + 0x80008, + 0x40004, + 0x20002, + 0x10002001, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[10] = +{ + 0x18, + 0x0, + 0x4, + 0xe0003df6, + 0xe22fffff, + 0xfbe, + 0x0, + 0x200, + 0x1efb00, + 0x10, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbfdf7e0, + 0x7dfefbfe, + 0xbeff7dff, + 0x7beff7df, + 0xfbeff7df, + 0xfdf7fbef, + 0x7efbfdf7, + 0x7fefbfdf, + 0xbfefbfdf, + 0xdfefbfef, + 0x7dfefbf7, + 0x7dffffff, + 0xbeffbeff, + 0xdf7fdf7f, + 0xfdf7efbf, + 0xf88bfefb, + 0x7fdf7fbe, + 0xbfefbfdf, + 0xfbf7dfef, + 0xfbff7dfe, + 0x7dff7dfe, + 0xbeffbeff, + 0xfbefdf7f, + 0xbf7dfdf7, + 0xdfefbfef, + 0xeff7dff7, + 0xf7fbeffb, + 0xdf7fbefd, + 0x3, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffe007f8, + 0xffff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffe007f0, + 0xfff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffe007e0, + 0xff, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffe007c0, + 0xf, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffe00000, + 0xf, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfc000000, + 0xf, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf8000000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x61800300, + 0x6666, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x82000400, + 0x8888, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[39] = +{ + 0x0, + 0x0, + 0x0, + 0x400, + 0x0, + 0x80, + 0x0, + 0x0, + 0x20000, + 0x40000, + 0x20002, + 0x80010001, + 0x8001000, + 0x8001000, + 0x4000800, + 0x2000400, + 0x200040, + 0x200040, + 0x200020, + 0x20010, + 0x1, + 0x80008001, + 0x40004000, + 0x4002000, + 0x200, + 0x400080, + 0x200040, + 0x100020, + 0x10002, + 0x10002, + 0x80008001, + 0x8004000, + 0x1000400, + 0x200020, + 0x100010, + 0x80008, + 0x40008004, + 0x0, + 0x10000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[29] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf8000000, + 0x7fdf7fbe, + 0xbfefbfdf, + 0xfbf7dfef, + 0xf7dfe, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[36] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7de0, + 0x0, + 0x0, + 0x80000000, + 0x3df7, + 0x0, + 0x0, + 0x1efbc00, + 0x0, + 0x0, + 0x0, + 0xdf780000, + 0x3, + 0x0, + 0x0, + 0xbc000000, + 0x1ef, + 0x0, + 0x0, + 0xbef00000, + 0x7, + 0x0, + 0x0, + 0x0, + 0x7bef00, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x20000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[33] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbe00000, + 0x7dff7dfe, + 0xbeffbeff, + 0xfbefdf7f, + 0x3df7, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[37] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbef00000, + 0x7, + 0x0, + 0x0, + 0x1efbc000, + 0x0, + 0x0, + 0xde000000, + 0xf7, + 0x0, + 0x0, + 0x0, + 0x1efbc, + 0x0, + 0x0, + 0x0, + 0xf7de00, + 0x0, + 0x0, + 0x0, + 0x3df78, + 0x0, + 0x0, + 0x0, + 0xf7800000, + 0x3d, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1[33] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7dc000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[37] = +{ + 0x0, + 0x0, + 0x0, + 0x16, + 0xc00e0000, + 0x2, + 0x0, + 0x0, + 0xb00, + 0xb001600, + 0x5800b00, + 0x2c00580, + 0x2c0058, + 0x2c0058, + 0x16002c, + 0x600b0016, + 0x6000b001, + 0xb000b001, + 0x5800b000, + 0x5800b00, + 0x5800000, + 0x2c002c0, + 0x1600160, + 0x1600b0, + 0xc003800b, + 0x60016002, + 0xb000b001, + 0xb005800, + 0xb000580, + 0x5800580, + 0x2c002c0, + 0x2c0160, + 0xb0058016, + 0x5800b000, + 0x2c005800, + 0x16002c00, + 0x16002c0, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[37] = +{ + 0x0, + 0x0, + 0x0, + 0x14, + 0x800c0000, + 0x2, + 0x0, + 0x0, + 0xa00, + 0xa001400, + 0x5000a00, + 0x2800500, + 0x280050, + 0x280050, + 0x140028, + 0x400a0014, + 0x4000a001, + 0xa000a001, + 0x5000a000, + 0x5000a00, + 0x5000000, + 0x2800280, + 0x1400140, + 0x1400a0, + 0x8003000a, + 0x40014002, + 0xa000a001, + 0xa005000, + 0xa000500, + 0x5000500, + 0x2800280, + 0x280140, + 0xa0050014, + 0x5000a000, + 0x28005000, + 0x14002800, + 0x1400280, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[38] = +{ + 0x0, + 0x0, + 0x0, + 0x1de0, + 0x2200000, + 0x3bc, + 0x0, + 0x0, + 0xef000, + 0xf01de000, + 0x780ef00e, + 0xbc077807, + 0x3bc07783, + 0x3bc07780, + 0x1de03bc0, + 0xef01de0, + 0xef01de, + 0xef01de, + 0x80ef00ef, + 0x780ef077, + 0x78000007, + 0xbc03bc07, + 0xde01de03, + 0x1de0ef01, + 0x880ef0, + 0x1de03bc, + 0xef01de, + 0xf07780ef, + 0xf007780e, + 0x7807780e, + 0xbc03bc07, + 0x3bc1de03, + 0x7781de0, + 0x80ef00ef, + 0xc0778077, + 0xe03bc03b, + 0xde03bc1d, + 0x1, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x40000, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[38] = +{ + 0x0, + 0x0, + 0x0, + 0x2000, + 0x0, + 0x400, + 0x0, + 0x0, + 0x100000, + 0x200000, + 0x100010, + 0x80008, + 0x40008004, + 0x40008000, + 0x20004000, + 0x10002000, + 0x1000200, + 0x1000200, + 0x1000100, + 0x100080, + 0x8, + 0x40008, + 0x20004, + 0x20010002, + 0x1000, + 0x2000400, + 0x1000200, + 0x800100, + 0x80010, + 0x80010, + 0x40008, + 0x40020004, + 0x8002000, + 0x1000100, + 0x800080, + 0x400040, + 0x40020, + 0x2, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[37] = +{ + 0x0, + 0x0, + 0x0, + 0x810, + 0x0, + 0x102, + 0x0, + 0x0, + 0x40800, + 0x8081000, + 0x4040804, + 0x2020402, + 0x10202041, + 0x10202040, + 0x8101020, + 0x4080810, + 0x408081, + 0x80408081, + 0x40408040, + 0x4040820, + 0x4000002, + 0x2010202, + 0x81008101, + 0x8104080, + 0x408, + 0x810102, + 0x80408081, + 0x8204040, + 0x8020404, + 0x4020404, + 0x2010202, + 0x10208101, + 0x82040810, + 0x40408040, + 0x20204020, + 0x10102010, + 0x81010208, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[38] = +{ + 0x0, + 0x0, + 0x0, + 0x1000, + 0x0, + 0x200, + 0x0, + 0x0, + 0x80000, + 0x100000, + 0x80008, + 0x40004, + 0x20004002, + 0x20004000, + 0x10002000, + 0x8001000, + 0x800100, + 0x800100, + 0x800080, + 0x80040, + 0x4, + 0x20004, + 0x10002, + 0x10008001, + 0x800, + 0x1000200, + 0x800100, + 0x400080, + 0x40008, + 0x40008, + 0x20004, + 0x20010002, + 0x4001000, + 0x800080, + 0x400040, + 0x200020, + 0x20010, + 0x1, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x800, + 0x0, + 0x200, + 0x1efb00, + 0x10, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xdfefbe00, + 0xeff7dff7, + 0xf7fbeffb, + 0xdf7fbefd, + 0x3, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7bef0000, + 0x0, + 0x0, + 0x0, + 0x1efbc00, + 0x0, + 0x0, + 0x7de00000, + 0xf, + 0x0, + 0x0, + 0xc0000000, + 0x1efb, + 0x0, + 0x0, + 0x0, + 0xf7de0, + 0x0, + 0x0, + 0x80000000, + 0x3df7, + 0x0, + 0x0, + 0x0, + 0xdf780000, + 0x3, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = +{ + 0x4, +}; + +static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = +{ + 0x8, +}; + + +static bcmpkt_rxpmd_match_id_db_t +bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_CNTAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x18, + .match_mask = 0x418, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x10000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x4, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x38, + .match_mask = 0x438, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", + .match = 0x18000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x6, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x810, + .match_mask = 0x3c18, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 53, + .pminbit = 36, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x18, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x10000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x38, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", + .match = 0x18000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x810, + .match_mask = 0x3c18, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_CNTAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 19, + .arc_id_mask = 0xf80000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 19, + .arc_id_mask = 0xf80000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 19, + .arc_id_mask = 0xf80000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 19, + .arc_id_mask = 0xf80000, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 19, + .arc_id_mask = 0xf80000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 35, + .match_minbit = 28, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 35, + .pminbit = 28, + .zone_minbit = 19, + .arc_id_mask = 0xf80000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 32, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 45, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 35, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 45, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 45, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 24, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 46, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 46, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 42, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 46, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 24, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 44, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 24, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 53, + .match_minbit = 36, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 53, + .pminbit = 36, + .zone_minbit = 24, + .arc_id_mask = 0x7ff000000, + .num_zone_bmp_words = 47, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_CNTAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0xfc, + .num_zone_bmp_words = 2, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 13, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 34, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 17, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 35, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 35, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 35, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x18, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x10000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x38, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 25, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 25, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 25, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 10, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 10, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 33, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", + .match = 0x18000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 33, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x810, + .match_mask = 0x3c18, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 27, + .match_minbit = 10, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 27, + .pminbit = 10, + .zone_minbit = 8, + .arc_id_mask = 0x7ff00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_sys_hdr_loopback, + + }, + { + /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db_info = { + .num_entries = 223, + .db = bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db_info_get(void) { + return &bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map_info = { + .num_entries = 223, + .map = bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map_info_get(void) { + return &bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c new file mode 100644 index 000000000000..dc2fda7d027e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c @@ -0,0 +1,10552 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56690_a0 and variant dna_6_5_29_0_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[13] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[13] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[13] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[13] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[13] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[13] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[13] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[13] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DEFAULT); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SRV6); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[13] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[13] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[13] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[13] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[13] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[13] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[13] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[13] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[13] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[13] |= (0x1 << 31); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SRV6)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { + reason[12] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_data[] = { + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 288, 303 }, /* Profile 13. */ + { 320, 335 }, /* Profile 14. */ + { 320, 335 }, /* Profile 15. */ + { 320, 335 }, /* Profile 16. */ + { 288, 303 }, /* Profile 17. */ + { 320, 335 }, /* Profile 18. */ + { 320, 335 }, /* Profile 19. */ + { 320, 335 }, /* Profile 20. */ + { 288, 303 }, /* Profile 21. */ + { 320, 335 }, /* Profile 22. */ + { 320, 335 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { 288, 303 }, /* Profile 35. */ + { 320, 335 }, /* Profile 36. */ + { 320, 335 }, /* Profile 37. */ + { 320, 335 }, /* Profile 38. */ + { 288, 303 }, /* Profile 39. */ + { 320, 335 }, /* Profile 40. */ + { 320, 335 }, /* Profile 41. */ + { 320, 335 }, /* Profile 42. */ + { 288, 303 }, /* Profile 43. */ + { 320, 335 }, /* Profile 44. */ + { 320, 335 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "DNAT_CTRL_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 368, 371 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 368, 371 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { 368, 371 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 368, 371 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 368, 371 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { 368, 371 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { 368, 371 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { 368, 371 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { 368, 371 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { 368, 371 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { 368, 371 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { 368, 371 }, /* Profile 44. */ + }, + .profile_cnt = 45, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 48, 63 }, /* Profile 10. */ + { 48, 63 }, /* Profile 11. */ + { 48, 63 }, /* Profile 12. */ + { 48, 63 }, /* Profile 13. */ + { 48, 63 }, /* Profile 14. */ + { 48, 63 }, /* Profile 15. */ + { 48, 63 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { 48, 63 }, /* Profile 21. */ + { 48, 63 }, /* Profile 22. */ + { 48, 63 }, /* Profile 23. */ + { 48, 63 }, /* Profile 24. */ + { 48, 63 }, /* Profile 25. */ + { 48, 63 }, /* Profile 26. */ + { 48, 63 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { 48, 63 }, /* Profile 32. */ + { 48, 63 }, /* Profile 33. */ + { 48, 63 }, /* Profile 34. */ + { 48, 63 }, /* Profile 35. */ + { 48, 63 }, /* Profile 36. */ + { 48, 63 }, /* Profile 37. */ + { 48, 63 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { 48, 63 }, /* Profile 43. */ + { 48, 63 }, /* Profile 44. */ + { 48, 63 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "DVP_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 191 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 208, 223 }, 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*/ + { 192, 207 }, /* Profile 42. */ + { 160, 175 }, /* Profile 43. */ + { 160, 175 }, /* Profile 44. */ + { 192, 207 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + { 288, 303 }, /* Profile 6. */ + { 320, 335 }, /* Profile 7. */ + { 320, 335 }, /* Profile 8. */ + { 320, 335 }, /* Profile 9. */ + { 288, 303 }, /* Profile 10. */ + { 320, 335 }, /* Profile 11. */ + { 320, 335 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 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BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + { 48, 63 }, /* Profile 8. */ + { 48, 63 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { 48, 63 }, /* Profile 17. */ + { 48, 63 }, /* Profile 18. */ + { 48, 63 }, /* Profile 19. */ + { 48, 63 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { 48, 63 }, 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+ { 384, 387 }, /* Profile 41. */ + { 384, 387 }, /* Profile 42. */ + }, + .profile_cnt = 43, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 144, 159 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { 144, 159 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 144, 159 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. 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Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { 176, 191 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "EVENT_TRACE_VECTOR_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + { 0, 15 }, /* Profile 5. */ + { 0, 15 }, /* Profile 6. */ + { 0, 15 }, /* Profile 7. */ + { 0, 15 }, /* Profile 8. */ + { 0, 15 }, /* Profile 9. */ + { 0, 15 }, /* Profile 10. */ + { 0, 15 }, /* Profile 11. */ + { 0, 15 }, /* Profile 12. */ + { 0, 15 }, /* Profile 13. */ + { 0, 15 }, /* Profile 14. */ + { 0, 15 }, /* Profile 15. */ + { 0, 15 }, /* Profile 16. */ + { 0, 15 }, /* Profile 17. */ + { 0, 15 }, /* Profile 18. */ + { 0, 15 }, /* Profile 19. */ + { 0, 15 }, /* Profile 20. */ + { 0, 15 }, /* Profile 21. */ + { 0, 15 }, /* Profile 22. */ + { 0, 15 }, /* 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"I2E_CLASS_ID_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 224, 239 }, /* Profile 4. */ + { 224, 239 }, /* Profile 5. */ + { 192, 207 }, /* Profile 6. */ + { 192, 207 }, /* Profile 7. */ + { 224, 239 }, /* Profile 8. */ + { 224, 239 }, /* Profile 9. */ + { 192, 207 }, /* Profile 10. */ + { 192, 207 }, /* Profile 11. */ + { 224, 239 }, /* Profile 12. */ + { 192, 207 }, /* Profile 13. */ + { 192, 207 }, /* Profile 14. */ + { 224, 239 }, /* Profile 15. */ + { 224, 239 }, /* Profile 16. */ + { 192, 207 }, /* Profile 17. */ + { 192, 207 }, /* Profile 18. */ + { 224, 239 }, /* Profile 19. */ + { 224, 239 }, /* Profile 20. */ + { 192, 207 }, /* Profile 21. */ + { 192, 207 }, /* Profile 22. */ + { 224, 239 }, /* Profile 23. */ + { 208, 223 }, /* Profile 24. */ + { 208, 223 }, /* Profile 25. */ + { 240, 255 }, /* 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}, /* Profile 5. */ + { 368, 371 }, /* Profile 6. */ + { 380, 383 }, /* Profile 7. */ + { 376, 379 }, /* Profile 8. */ + { 376, 379 }, /* Profile 9. */ + { 368, 371 }, /* Profile 10. */ + { 380, 383 }, /* Profile 11. */ + { 376, 379 }, /* Profile 12. */ + { 368, 371 }, /* Profile 13. */ + { 380, 383 }, /* Profile 14. */ + { 376, 379 }, /* Profile 15. */ + { 376, 379 }, /* Profile 16. */ + { 368, 371 }, /* Profile 17. */ + { 380, 383 }, /* Profile 18. */ + { 376, 379 }, /* Profile 19. */ + { 376, 379 }, /* Profile 20. */ + { 368, 371 }, /* Profile 21. */ + { 380, 383 }, /* Profile 22. */ + { 376, 379 }, /* Profile 23. */ + { 368, 371 }, /* Profile 24. */ + { 380, 383 }, /* Profile 25. */ + { 376, 379 }, /* Profile 26. */ + { 376, 379 }, /* Profile 27. */ + { 368, 371 }, /* Profile 28. */ + { 380, 383 }, /* Profile 29. */ + { 376, 379 }, /* Profile 30. */ + { 376, 379 }, /* Profile 31. */ + { 368, 371 }, /* Profile 32. */ + { 380, 383 }, /* Profile 33. */ + { 376, 379 }, /* Profile 34. */ + { 368, 371 }, /* Profile 35. */ + { 380, 383 }, /* Profile 36. */ + { 376, 379 }, /* Profile 37. */ + { 376, 379 }, /* Profile 38. */ + { 368, 371 }, /* Profile 39. */ + { 380, 383 }, /* Profile 40. */ + { 376, 379 }, /* Profile 41. */ + { 376, 379 }, /* Profile 42. */ + { 368, 371 }, /* Profile 43. */ + { 380, 383 }, /* Profile 44. */ + { 376, 379 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + { 392, 395 }, /* Profile 6. */ + { 404, 407 }, /* Profile 7. */ + { 400, 403 }, /* Profile 8. */ + { 400, 403 }, /* Profile 9. */ + { 388, 391 }, /* Profile 10. */ + { 400, 403 }, /* Profile 11. */ + { 396, 399 }, /* Profile 12. */ + { 392, 395 }, /* Profile 13. */ + { 404, 407 }, /* Profile 14. */ + { 400, 403 }, /* Profile 15. */ + { 400, 403 }, /* Profile 16. */ + { 392, 395 }, /* Profile 17. */ + { 404, 407 }, /* Profile 18. */ + { 400, 403 }, /* Profile 19. */ + { 400, 403 }, /* Profile 20. */ + { 388, 391 }, /* Profile 21. */ + { 400, 403 }, /* Profile 22. */ + { 396, 399 }, /* Profile 23. */ + { 392, 395 }, /* Profile 24. */ + { 404, 407 }, /* Profile 25. */ + { 400, 403 }, /* Profile 26. */ + { 400, 403 }, /* Profile 27. */ + { 392, 395 }, /* Profile 28. */ + { 404, 407 }, /* Profile 29. */ + { 400, 403 }, /* Profile 30. */ + { 400, 403 }, /* Profile 31. */ + { 388, 391 }, /* Profile 32. */ + { 400, 403 }, /* Profile 33. */ + { 396, 399 }, /* Profile 34. */ + { 392, 395 }, /* Profile 35. */ + { 404, 407 }, /* Profile 36. */ + { 400, 403 }, /* Profile 37. */ + { 400, 403 }, /* Profile 38. */ + { 392, 395 }, /* Profile 39. */ + { 404, 407 }, /* Profile 40. */ + { 400, 403 }, /* Profile 41. */ + { 400, 403 }, /* Profile 42. */ + { 388, 391 }, /* Profile 43. */ + { 400, 403 }, /* Profile 44. */ + { 396, 399 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "ING_TIMESTAMP_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 144, 159 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 144, 159 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 144, 159 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { 144, 159 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { 144, 159 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { 160, 175 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { 160, 175 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { 160, 175 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { 160, 175 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { 160, 175 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { 160, 175 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "ING_TIMESTAMP_31_16", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 160, 175 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 160, 175 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 160, 175 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 160, 175 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { 160, 175 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { 160, 175 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { 176, 191 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { 176, 191 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { 176, 191 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { 176, 191 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { 176, 191 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { 176, 191 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "INGRESS_DEVICE_PORT_6_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_6_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 278 }, /* Profile 2. */ + { 304, 310 }, /* Profile 3. */ + { 304, 310 }, /* Profile 4. */ + { 304, 310 }, /* Profile 5. */ + { 272, 278 }, /* Profile 6. */ + { 304, 310 }, /* Profile 7. */ + { 304, 310 }, /* Profile 8. */ + { 304, 310 }, /* Profile 9. */ + { 272, 278 }, /* Profile 10. */ + { 304, 310 }, /* Profile 11. */ + { 304, 310 }, /* Profile 12. */ + { 272, 278 }, /* Profile 13. */ + { 304, 310 }, /* Profile 14. */ + { 304, 310 }, /* Profile 15. */ + { 304, 310 }, /* Profile 16. */ + { 272, 278 }, /* Profile 17. */ + { 304, 310 }, /* Profile 18. */ + { 304, 310 }, /* Profile 19. */ + { 304, 310 }, /* Profile 20. */ + { 272, 278 }, /* Profile 21. */ + { 304, 310 }, /* Profile 22. */ + { 304, 310 }, /* Profile 23. */ + { 272, 278 }, /* Profile 24. */ + { 304, 310 }, /* Profile 25. */ + { 304, 310 }, /* Profile 26. */ + { 304, 310 }, /* Profile 27. */ + { 272, 278 }, /* Profile 28. */ + { 304, 310 }, /* Profile 29. */ + { 304, 310 }, /* Profile 30. */ + { 304, 310 }, /* Profile 31. */ + { 272, 278 }, /* Profile 32. */ + { 304, 310 }, /* Profile 33. */ + { 304, 310 }, /* Profile 34. */ + { 272, 278 }, /* Profile 35. */ + { 304, 310 }, /* Profile 36. */ + { 304, 310 }, /* Profile 37. */ + { 304, 310 }, /* Profile 38. */ + { 272, 278 }, /* Profile 39. */ + { 304, 310 }, /* Profile 40. */ + { 304, 310 }, /* Profile 41. */ + { 304, 310 }, /* Profile 42. */ + { 272, 278 }, /* Profile 43. */ + { 304, 310 }, /* Profile 44. */ + { 304, 310 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 239 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 256, 271 }, /* Profile 4. */ + { 256, 271 }, /* Profile 5. */ + { 224, 239 }, /* Profile 6. */ + { 224, 239 }, /* Profile 7. */ + { 256, 271 }, /* Profile 8. */ + { 256, 271 }, /* Profile 9. */ + { 224, 239 }, /* Profile 10. */ + { 224, 239 }, /* Profile 11. */ + { 256, 271 }, /* Profile 12. */ + { 224, 239 }, /* Profile 13. */ + { 224, 239 }, /* Profile 14. */ + { 256, 271 }, /* Profile 15. */ + { 256, 271 }, /* Profile 16. */ + { 224, 239 }, /* Profile 17. */ + { 224, 239 }, /* Profile 18. */ + { 256, 271 }, /* Profile 19. */ + { 256, 271 }, /* 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BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 416, 419 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + { 404, 407 }, /* Profile 6. */ + { 416, 419 }, /* Profile 7. */ + { 412, 415 }, /* Profile 8. */ + { 412, 415 }, /* Profile 9. */ + { 400, 403 }, /* Profile 10. */ + { 412, 415 }, /* Profile 11. */ + { 408, 411 }, /* Profile 12. */ + { 404, 407 }, /* Profile 13. */ + { 416, 419 }, /* Profile 14. */ + { 412, 415 }, /* Profile 15. */ + { 412, 415 }, /* Profile 16. */ + { 404, 407 }, /* Profile 17. */ + { 416, 419 }, /* Profile 18. */ + { 412, 415 }, /* Profile 19. */ + { 412, 415 }, /* Profile 20. */ + { 400, 403 }, /* Profile 21. */ + { 412, 415 }, /* Profile 22. */ + { 408, 411 }, /* Profile 23. */ + { 404, 407 }, /* Profile 24. */ + { 416, 419 }, /* Profile 25. */ + { 412, 415 }, /* Profile 26. */ + { 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372, 375 }, /* Profile 36. */ + { 368, 371 }, /* Profile 37. */ + { 368, 371 }, /* Profile 38. */ + { 352, 355 }, /* Profile 39. */ + { 372, 375 }, /* Profile 40. */ + { 368, 371 }, /* Profile 41. */ + { 368, 371 }, /* Profile 42. */ + { 352, 355 }, /* Profile 43. */ + { 372, 375 }, /* Profile 44. */ + { 368, 371 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "L2_IIF_11_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L2_IIF_11_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 251 }, /* Profile 2. */ + { 240, 251 }, /* Profile 3. */ + { 272, 283 }, /* Profile 4. */ + { 272, 283 }, /* Profile 5. */ + { 240, 251 }, /* Profile 6. */ + { 240, 251 }, /* Profile 7. */ + { 272, 283 }, /* Profile 8. */ + { 272, 283 }, /* Profile 9. */ + { 240, 251 }, /* Profile 10. */ + { 240, 251 }, /* Profile 11. */ + { 272, 283 }, /* Profile 12. */ + { 240, 251 }, /* Profile 13. */ + { 240, 251 }, /* Profile 14. */ + { 272, 283 }, /* Profile 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= BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 272, 287 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { 272, 287 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 272, 287 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 272, 287 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { 272, 287 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { 272, 287 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* 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+ }, + .profile_cnt = 46, + }, + { + .name = "NHOP_INDEX_1_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 319 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + { 336, 351 }, /* Profile 5. */ + { 304, 319 }, /* Profile 6. */ + { 336, 351 }, /* Profile 7. */ + { 336, 351 }, /* Profile 8. */ + { 336, 351 }, /* Profile 9. */ + { 304, 319 }, /* Profile 10. */ + { 336, 351 }, /* Profile 11. */ + { 336, 351 }, /* Profile 12. */ + { 304, 319 }, /* Profile 13. */ + { 336, 351 }, /* Profile 14. */ + { 336, 351 }, /* Profile 15. */ + { 336, 351 }, /* Profile 16. */ + { 304, 319 }, /* Profile 17. */ + { 336, 351 }, /* Profile 18. */ + { 336, 351 }, /* Profile 19. */ + { 336, 351 }, /* Profile 20. */ + { 304, 319 }, /* Profile 21. */ + { 336, 351 }, /* Profile 22. */ + { 336, 351 }, /* Profile 23. */ + { 304, 319 }, /* Profile 24. */ + { 336, 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+ { 404, 407 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 356, 359 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 356, 359 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 356, 359 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 356, 359 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { 356, 359 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { 356, 359 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 356, 359 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Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { 364, 367 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 364, 367 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { 364, 367 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { 364, 367 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { 364, 367 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { 364, 367 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { 364, 367 }, /* Profile 43. */ + }, + .profile_cnt = 44, + }, + { + .name = "SRV6_TUNNEL_NEXT_SID_SELECT_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_TUNNEL_NEXT_SID_SELECT_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 416, 419 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 416, 419 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 412, 415 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 416, 419 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { 416, 419 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { 412, 415 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 416, 419 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { 416, 419 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { 412, 415 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { 416, 419 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { 416, 419 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { 412, 415 }, /* Profile 43. */ + }, + .profile_cnt = 44, + }, + { + .name = "SVP_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 352, 367 }, /* Profile 3. */ + { 352, 367 }, /* Profile 4. */ + { 352, 367 }, /* Profile 5. */ + { 320, 335 }, /* Profile 6. */ + { 352, 367 }, /* Profile 7. */ + { 352, 367 }, /* Profile 8. */ + { 352, 367 }, /* Profile 9. */ + { 320, 335 }, /* Profile 10. */ + { 352, 367 }, /* Profile 11. */ + { 352, 367 }, /* Profile 12. */ + { 320, 335 }, /* Profile 13. */ + { 352, 367 }, /* Profile 14. */ + { 352, 367 }, /* Profile 15. */ + { 352, 367 }, /* Profile 16. */ + { 320, 335 }, /* Profile 17. */ + { 352, 367 }, /* Profile 18. */ + { 352, 367 }, /* Profile 19. */ + { 352, 367 }, /* Profile 20. */ + { 320, 335 }, /* Profile 21. */ + { 352, 367 }, /* Profile 22. */ + { 352, 367 }, /* Profile 23. */ + { 320, 335 }, /* Profile 24. */ + { 352, 367 }, /* Profile 25. */ + { 352, 367 }, /* Profile 26. */ + { 352, 367 }, /* Profile 27. */ + { 320, 335 }, /* Profile 28. */ + { 352, 367 }, /* Profile 29. */ + { 352, 367 }, /* Profile 30. */ + { 352, 367 }, /* Profile 31. */ + { 320, 335 }, /* Profile 32. */ + { 352, 367 }, /* Profile 33. */ + { 352, 367 }, /* Profile 34. */ + { 320, 335 }, /* Profile 35. */ + { 352, 367 }, /* Profile 36. */ + { 352, 367 }, /* Profile 37. */ + { 352, 367 }, /* Profile 38. */ + { 320, 335 }, /* Profile 39. */ + { 352, 367 }, /* Profile 40. */ + { 352, 367 }, /* Profile 41. */ + { 352, 367 }, /* Profile 42. */ + { 320, 335 }, /* Profile 43. */ + { 352, 367 }, /* Profile 44. */ + { 352, 367 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 380, 383 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + { 380, 383 }, /* Profile 6. */ + { 392, 395 }, /* Profile 7. */ + { 388, 391 }, /* Profile 8. */ + { 388, 391 }, /* Profile 9. */ + { 376, 379 }, /* Profile 10. */ + { 388, 391 }, /* Profile 11. */ + { 384, 387 }, /* Profile 12. */ + { 380, 383 }, /* Profile 13. */ + { 392, 395 }, /* Profile 14. */ + { 388, 391 }, /* Profile 15. */ + { 388, 391 }, /* Profile 16. */ + { 380, 383 }, /* Profile 17. */ + { 392, 395 }, /* Profile 18. */ + { 388, 391 }, /* Profile 19. */ + { 388, 391 }, /* Profile 20. */ + { 376, 379 }, /* Profile 21. */ + { 388, 391 }, /* Profile 22. */ + { 384, 387 }, /* Profile 23. */ + { 380, 383 }, /* Profile 24. */ + { 392, 395 }, /* Profile 25. */ + { 388, 391 }, /* Profile 26. */ + { 388, 391 }, /* Profile 27. */ + { 380, 383 }, /* Profile 28. */ + { 392, 395 }, /* Profile 29. */ + { 388, 391 }, /* Profile 30. */ + { 388, 391 }, /* Profile 31. */ + { 376, 379 }, /* Profile 32. */ + { 388, 391 }, /* Profile 33. */ + { 384, 387 }, /* Profile 34. */ + { 380, 383 }, /* Profile 35. */ + { 392, 395 }, /* Profile 36. */ + { 388, 391 }, /* Profile 37. */ + { 388, 391 }, /* Profile 38. */ + { 380, 383 }, /* Profile 39. */ + { 392, 395 }, /* Profile 40. */ + { 388, 391 }, /* Profile 41. */ + { 388, 391 }, /* Profile 42. */ + { 376, 379 }, /* Profile 43. */ + { 388, 391 }, /* Profile 44. */ + { 384, 387 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + { 384, 387 }, /* Profile 6. */ + { 396, 399 }, /* Profile 7. */ + { 392, 395 }, /* Profile 8. */ + { 392, 395 }, /* Profile 9. */ + { 380, 383 }, /* Profile 10. */ + { 392, 395 }, /* Profile 11. */ + { 388, 391 }, /* Profile 12. */ + { 384, 387 }, /* Profile 13. */ + { 396, 399 }, /* Profile 14. */ + { 392, 395 }, /* Profile 15. */ + { 392, 395 }, /* Profile 16. */ + { 384, 387 }, /* Profile 17. */ + { 396, 399 }, /* Profile 18. */ + { 392, 395 }, /* Profile 19. */ + { 392, 395 }, /* Profile 20. */ + { 380, 383 }, /* Profile 21. */ + { 392, 395 }, /* Profile 22. */ + { 388, 391 }, /* Profile 23. */ + { 384, 387 }, /* Profile 24. */ + { 396, 399 }, /* Profile 25. */ + { 392, 395 }, /* Profile 26. */ + { 392, 395 }, /* Profile 27. */ + { 384, 387 }, /* Profile 28. */ + { 396, 399 }, /* Profile 29. */ + { 392, 395 }, /* Profile 30. */ + { 392, 395 }, /* Profile 31. */ + { 380, 383 }, /* Profile 32. */ + { 392, 395 }, /* Profile 33. */ + { 388, 391 }, /* Profile 34. */ + { 384, 387 }, /* Profile 35. */ + { 396, 399 }, /* Profile 36. */ + { 392, 395 }, /* Profile 37. */ + { 392, 395 }, /* Profile 38. */ + { 384, 387 }, /* Profile 39. */ + { 396, 399 }, /* Profile 40. */ + { 392, 395 }, /* Profile 41. */ + { 392, 395 }, /* Profile 42. */ + { 380, 383 }, /* Profile 43. */ + { 392, 395 }, /* Profile 44. */ + { 388, 391 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + { 112, 127 }, /* Profile 6. */ + { 112, 127 }, /* Profile 7. */ + { 112, 127 }, /* Profile 8. */ + { 112, 127 }, /* Profile 9. */ + { 112, 127 }, /* Profile 10. */ + { 112, 127 }, /* Profile 11. */ + { 112, 127 }, /* Profile 12. */ + { 112, 127 }, /* Profile 13. */ + { 112, 127 }, /* Profile 14. */ + { 112, 127 }, /* Profile 15. */ + { 112, 127 }, /* Profile 16. */ + { 112, 127 }, /* Profile 17. */ + { 112, 127 }, /* Profile 18. */ + { 112, 127 }, /* Profile 19. */ + { 112, 127 }, /* Profile 20. */ + { 112, 127 }, /* Profile 21. */ + { 112, 127 }, /* Profile 22. */ + { 112, 127 }, /* Profile 23. */ + { 112, 127 }, /* Profile 24. */ + { 112, 127 }, /* Profile 25. */ + { 112, 127 }, /* Profile 26. */ + { 112, 127 }, /* Profile 27. */ + { 112, 127 }, /* Profile 28. */ + { 112, 127 }, /* Profile 29. */ + { 112, 127 }, /* Profile 30. */ + { 112, 127 }, /* Profile 31. */ + { 112, 127 }, /* Profile 32. */ + { 112, 127 }, /* Profile 33. */ + { 112, 127 }, /* Profile 34. */ + { 112, 127 }, /* Profile 35. */ + { 112, 127 }, /* Profile 36. */ + { 112, 127 }, /* Profile 37. */ + { 112, 127 }, /* Profile 38. */ + { 112, 127 }, /* Profile 39. */ + { 112, 127 }, /* Profile 40. */ + { 112, 127 }, /* Profile 41. */ + { 112, 127 }, /* Profile 42. */ + { 112, 127 }, /* Profile 43. */ + { 112, 127 }, /* Profile 44. */ + { 112, 127 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + { 396, 399 }, /* Profile 6. */ + { 408, 411 }, /* Profile 7. */ + { 404, 407 }, /* Profile 8. */ + { 404, 407 }, /* Profile 9. */ + { 392, 395 }, /* Profile 10. */ + { 404, 407 }, /* Profile 11. */ + { 400, 403 }, /* Profile 12. */ + { 396, 399 }, /* Profile 13. */ + { 408, 411 }, /* Profile 14. */ + { 404, 407 }, /* Profile 15. */ + { 404, 407 }, /* Profile 16. */ + { 396, 399 }, /* Profile 17. */ + { 408, 411 }, /* Profile 18. */ + { 404, 407 }, /* Profile 19. */ + { 404, 407 }, /* Profile 20. */ + { 392, 395 }, /* Profile 21. */ + { 404, 407 }, /* Profile 22. */ + { 400, 403 }, /* Profile 23. */ + { 396, 399 }, /* Profile 24. */ + { 408, 411 }, /* Profile 25. */ + { 404, 407 }, /* Profile 26. */ + { 404, 407 }, /* Profile 27. */ + { 396, 399 }, /* Profile 28. */ + { 408, 411 }, /* Profile 29. */ + { 404, 407 }, /* Profile 30. */ + { 404, 407 }, /* Profile 31. */ + { 392, 395 }, /* Profile 32. */ + { 404, 407 }, /* Profile 33. */ + { 400, 403 }, /* Profile 34. */ + { 396, 399 }, /* Profile 35. */ + { 408, 411 }, /* Profile 36. */ + { 404, 407 }, /* Profile 37. */ + { 404, 407 }, /* Profile 38. */ + { 396, 399 }, /* Profile 39. */ + { 408, 411 }, /* Profile 40. */ + { 404, 407 }, /* Profile 41. */ + { 404, 407 }, /* Profile 42. */ + { 392, 395 }, /* Profile 43. */ + { 404, 407 }, /* Profile 44. */ + { 400, 403 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 96, 111 }, /* Profile 7. */ + { 96, 111 }, /* Profile 8. */ + { 96, 111 }, /* Profile 9. */ + { 96, 111 }, /* Profile 10. */ + { 96, 111 }, /* Profile 11. */ + { 96, 111 }, /* Profile 12. */ + { 96, 111 }, /* Profile 13. */ + { 96, 111 }, /* Profile 14. */ + { 96, 111 }, /* Profile 15. */ + { 96, 111 }, /* Profile 16. */ + { 96, 111 }, /* Profile 17. */ + { 96, 111 }, /* Profile 18. */ + { 96, 111 }, /* Profile 19. */ + { 96, 111 }, /* Profile 20. */ + { 96, 111 }, /* Profile 21. */ + { 96, 111 }, /* Profile 22. */ + { 96, 111 }, /* Profile 23. */ + { 96, 111 }, /* Profile 24. */ + { 96, 111 }, /* Profile 25. */ + { 96, 111 }, /* Profile 26. */ + { 96, 111 }, /* Profile 27. */ + { 96, 111 }, /* Profile 28. */ + { 96, 111 }, /* Profile 29. */ + { 96, 111 }, /* Profile 30. */ + { 96, 111 }, /* Profile 31. */ + { 96, 111 }, /* Profile 32. */ + { 96, 111 }, /* Profile 33. */ + { 96, 111 }, /* Profile 34. */ + { 96, 111 }, /* Profile 35. */ + { 96, 111 }, /* Profile 36. */ + { 96, 111 }, /* Profile 37. */ + { 96, 111 }, /* Profile 38. */ + { 96, 111 }, /* Profile 39. */ + { 96, 111 }, /* Profile 40. */ + { 96, 111 }, /* Profile 41. */ + { 96, 111 }, /* Profile 42. */ + { 96, 111 }, /* Profile 43. */ + { 96, 111 }, /* Profile 44. */ + { 96, 111 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 420, 423 }, /* Profile 4. */ + { 420, 423 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 420, 423 }, /* Profile 8. */ + { 420, 423 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 416, 419 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { 420, 423 }, /* Profile 15. */ + { 420, 423 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 420, 423 }, /* Profile 19. */ + { 420, 423 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { 416, 419 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { 420, 423 }, /* Profile 26. */ + { 420, 423 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { 420, 423 }, /* Profile 30. */ + { 420, 423 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { 416, 419 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { 420, 423 }, /* Profile 37. */ + { 420, 423 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { 420, 423 }, /* Profile 41. */ + { 420, 423 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { 416, 419 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 396, 399 }, /* Profile 5. */ + { 388, 391 }, /* Profile 6. */ + { 400, 403 }, /* Profile 7. */ + { 396, 399 }, /* Profile 8. */ + { 396, 399 }, /* Profile 9. */ + { 384, 387 }, /* Profile 10. */ + { 396, 399 }, /* Profile 11. */ + { 392, 395 }, /* Profile 12. */ + { 388, 391 }, /* Profile 13. */ + { 400, 403 }, /* Profile 14. */ + { 396, 399 }, /* Profile 15. */ + { 396, 399 }, /* Profile 16. */ + { 388, 391 }, /* Profile 17. */ + { 400, 403 }, /* Profile 18. */ + { 396, 399 }, /* Profile 19. */ + { 396, 399 }, /* Profile 20. */ + { 384, 387 }, /* Profile 21. */ + { 396, 399 }, /* Profile 22. */ + { 392, 395 }, /* Profile 23. */ + { 388, 391 }, /* Profile 24. */ + { 400, 403 }, /* Profile 25. */ + { 396, 399 }, /* Profile 26. */ + { 396, 399 }, /* Profile 27. */ + { 388, 391 }, /* Profile 28. */ + { 400, 403 }, /* Profile 29. */ + { 396, 399 }, /* Profile 30. */ + { 396, 399 }, /* Profile 31. */ + { 384, 387 }, /* Profile 32. */ + { 396, 399 }, /* Profile 33. */ + { 392, 395 }, /* Profile 34. */ + { 388, 391 }, /* Profile 35. */ + { 400, 403 }, /* Profile 36. */ + { 396, 399 }, /* Profile 37. */ + { 396, 399 }, /* Profile 38. */ + { 388, 391 }, /* Profile 39. */ + { 400, 403 }, /* Profile 40. */ + { 396, 399 }, /* Profile 41. */ + { 396, 399 }, /* Profile 42. */ + { 384, 387 }, /* Profile 43. */ + { 396, 399 }, /* Profile 44. */ + { 392, 395 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "VFI_15_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { 128, 143 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ + { 128, 143 }, /* Profile 8. */ + { 128, 143 }, /* Profile 9. */ + { 128, 143 }, /* Profile 10. */ + { 128, 143 }, /* Profile 11. */ + { 128, 143 }, /* Profile 12. */ + { 128, 143 }, /* Profile 13. */ + { 128, 143 }, /* Profile 14. */ + { 128, 143 }, /* Profile 15. */ + { 128, 143 }, /* Profile 16. */ + { 128, 143 }, /* Profile 17. */ + { 128, 143 }, /* Profile 18. */ + { 128, 143 }, /* Profile 19. */ + { 128, 143 }, /* Profile 20. */ + { 128, 143 }, /* Profile 21. */ + { 128, 143 }, /* Profile 22. */ + { 128, 143 }, /* Profile 23. */ + { 128, 143 }, /* Profile 24. */ + { 128, 143 }, /* Profile 25. */ + { 128, 143 }, /* Profile 26. */ + { 128, 143 }, /* Profile 27. */ + { 128, 143 }, /* Profile 28. */ + { 128, 143 }, /* Profile 29. */ + { 128, 143 }, /* Profile 30. */ + { 128, 143 }, /* Profile 31. */ + { 128, 143 }, /* Profile 32. */ + { 128, 143 }, /* Profile 33. */ + { 128, 143 }, /* Profile 34. */ + { 128, 143 }, /* Profile 35. */ + { 128, 143 }, /* Profile 36. */ + { 128, 143 }, /* Profile 37. */ + { 128, 143 }, /* Profile 38. */ + { 128, 143 }, /* Profile 39. */ + { 128, 143 }, /* Profile 40. */ + { 128, 143 }, /* Profile 41. */ + { 128, 143 }, /* Profile 42. */ + { 128, 143 }, /* Profile 43. */ + { 128, 143 }, /* Profile 44. */ + { 128, 143 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", + .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 360, 363 }, /* Profile 2. */ + { 376, 379 }, /* Profile 3. */ + { 372, 375 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + { 360, 363 }, /* Profile 6. */ + { 376, 379 }, /* Profile 7. */ + { 372, 375 }, /* Profile 8. */ + { 372, 375 }, /* Profile 9. */ + { 360, 363 }, /* Profile 10. */ + { 376, 379 }, /* Profile 11. */ + { 372, 375 }, /* Profile 12. */ + { 360, 363 }, /* Profile 13. */ + { 376, 379 }, /* Profile 14. */ + { 372, 375 }, /* Profile 15. */ + { 372, 375 }, /* Profile 16. */ + { 360, 363 }, /* Profile 17. */ + { 376, 379 }, /* Profile 18. */ + { 372, 375 }, /* Profile 19. */ + { 372, 375 }, /* Profile 20. */ + { 360, 363 }, /* Profile 21. */ + { 376, 379 }, /* Profile 22. */ + { 372, 375 }, /* Profile 23. */ + { 360, 363 }, /* Profile 24. */ + { 376, 379 }, /* Profile 25. */ + { 372, 375 }, /* Profile 26. */ + { 372, 375 }, /* Profile 27. */ + { 360, 363 }, /* Profile 28. */ + { 376, 379 }, /* Profile 29. */ + { 372, 375 }, /* Profile 30. */ + { 372, 375 }, /* Profile 31. */ + { 360, 363 }, /* Profile 32. */ + { 376, 379 }, /* Profile 33. */ + { 372, 375 }, /* Profile 34. */ + { 360, 363 }, /* Profile 35. */ + { 376, 379 }, /* Profile 36. */ + { 372, 375 }, /* Profile 37. */ + { 372, 375 }, /* Profile 38. */ + { 360, 363 }, /* Profile 39. */ + { 376, 379 }, /* Profile 40. */ + { 372, 375 }, /* Profile 41. */ + { 372, 375 }, /* Profile 42. */ + { 360, 363 }, /* Profile 43. */ + { 376, 379 }, /* Profile 44. */ + { 372, 375 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, +};static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_names[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reasons_info = { + .num_reasons = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_names, + .reason_encode = bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_encode, + .reason_decode = bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_arp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_arp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_arp_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_arp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_authen_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_authen_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_authen_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_authen_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_bfd_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_bfd_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_bfd_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_bfd_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_cntag_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_cntag_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_cntag_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_cntag_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_dest_option_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_dest_option_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_dest_option_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_dest_option_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_esp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_esp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_esp_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_esp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_esp_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ethertype_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ethertype_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ethertype_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ethertype_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_frag_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_frag_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_frag_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_frag_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_frag_t_field_data, +}; + + +static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { + bcmpkt_gbp_ethernet_shim_t_ethertype_get, + bcmpkt_gbp_ethernet_shim_t_flags_get, + bcmpkt_gbp_ethernet_shim_t_reserved_get, + bcmpkt_gbp_ethernet_shim_t_sid_get, + bcmpkt_gbp_ethernet_shim_t_subtype_get, + bcmpkt_gbp_ethernet_shim_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { + bcmpkt_gbp_ethernet_shim_t_ethertype_set, + bcmpkt_gbp_ethernet_shim_t_flags_set, + bcmpkt_gbp_ethernet_shim_t_reserved_set, + bcmpkt_gbp_ethernet_shim_t_sid_set, + bcmpkt_gbp_ethernet_shim_t_subtype_set, + bcmpkt_gbp_ethernet_shim_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_src_subport_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_src_subport_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_src_subport_num_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_src_subport_num_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gpe_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gpe_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gpe_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gpe_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_key_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_key_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_key_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_key_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_gre_t_field_data, +}; + + +static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 4, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 4, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 6, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 6, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 31, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 10); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 10, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 15, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 15, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 4); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 2, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_get, + bcmpkt_hg3_base_t_cng_get, + bcmpkt_hg3_base_t_entropy_get, + bcmpkt_hg3_base_t_ext_hdr_present_get, + bcmpkt_hg3_base_t_hg3_reserved_get, + bcmpkt_hg3_base_t_l3_routed_get, + bcmpkt_hg3_base_t_mirror_copy_get, + bcmpkt_hg3_base_t_reserved_etype_get, + bcmpkt_hg3_base_t_system_destination_get, + bcmpkt_hg3_base_t_system_destination_type_get, + bcmpkt_hg3_base_t_system_source_get, + bcmpkt_hg3_base_t_tc_get, + bcmpkt_hg3_base_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_set, + bcmpkt_hg3_base_t_cng_set, + bcmpkt_hg3_base_t_entropy_set, + bcmpkt_hg3_base_t_ext_hdr_present_set, + bcmpkt_hg3_base_t_hg3_reserved_set, + bcmpkt_hg3_base_t_l3_routed_set, + bcmpkt_hg3_base_t_mirror_copy_set, + bcmpkt_hg3_base_t_reserved_etype_set, + bcmpkt_hg3_base_t_system_destination_set, + bcmpkt_hg3_base_t_system_destination_type_set, + bcmpkt_hg3_base_t_system_source_set, + bcmpkt_hg3_base_t_tc_set, + bcmpkt_hg3_base_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_field_data, +}; + + +static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_lsb_get, + bcmpkt_hg3_extension_0_t_class_id_msb_get, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, + bcmpkt_hg3_extension_0_t_flags_get, + bcmpkt_hg3_extension_0_t_forwarding_domain_get, + bcmpkt_hg3_extension_0_t_svp_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_lsb_set, + bcmpkt_hg3_extension_0_t_class_id_msb_set, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, + bcmpkt_hg3_extension_0_t_flags_set, + bcmpkt_hg3_extension_0_t_forwarding_domain_set, + bcmpkt_hg3_extension_0_t_svp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_icmp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_icmp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_icmp_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_icmp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 24); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 2); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 2, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 6); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 6, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_get, + bcmpkt_ifa_flex_md_0_b_t_port_speed_get, + bcmpkt_ifa_flex_md_0_b_t_queue_id_get, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_set, + bcmpkt_ifa_flex_md_0_b_t_port_speed_set, + bcmpkt_ifa_flex_md_0_b_t_queue_id_set, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_get, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_set, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_get, + bcmpkt_ifa_md_base_t_hop_limit_current_length_get, + bcmpkt_ifa_md_base_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_set, + bcmpkt_ifa_md_base_t_hop_limit_current_length_set, + bcmpkt_ifa_md_base_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_get, + bcmpkt_ifa_metadata_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_t_metadata_get, + bcmpkt_ifa_metadata_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_set, + bcmpkt_ifa_metadata_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_t_metadata_set, + bcmpkt_ifa_metadata_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_igmp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_igmp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_igmp_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_igmp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_namespace_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_namespace_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT] = { + bcmpkt_ioam_e2e_t_ioam_e2e_data_get, + bcmpkt_ioam_e2e_t_ioam_e2e_type_get, + bcmpkt_ioam_e2e_t_ioam_hdr_len_get, + bcmpkt_ioam_e2e_t_namespace_id_get, + bcmpkt_ioam_e2e_t_next_protocol_get, + bcmpkt_ioam_e2e_t_reserved_get, + bcmpkt_ioam_e2e_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT] = { + bcmpkt_ioam_e2e_t_ioam_e2e_data_set, + bcmpkt_ioam_e2e_t_ioam_e2e_type_set, + bcmpkt_ioam_e2e_t_ioam_hdr_len_set, + bcmpkt_ioam_e2e_t_namespace_id_set, + bcmpkt_ioam_e2e_t_next_protocol_set, + bcmpkt_ioam_e2e_t_reserved_set, + bcmpkt_ioam_e2e_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ipfix_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ipfix_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ipv4_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ipv4_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ipv6_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ipv6_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_l2_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_l2_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_l2_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_l2_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mpls_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mpls_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mpls_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mpls_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_p_1588_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_p_1588_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_rarp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_rarp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rarp_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_rarp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_routing_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_routing_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_routing_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_routing_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_rspan_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_rspan_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rspan_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_rspan_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_rspan_t_field_data, +}; + + +static int32_t bcmpkt_segment_routing_srh_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_last_entry_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_last_entry_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { + bcmpkt_segment_routing_srh_t_flags_get, + bcmpkt_segment_routing_srh_t_hdr_ext_len_get, + bcmpkt_segment_routing_srh_t_last_entry_get, + bcmpkt_segment_routing_srh_t_next_header_get, + bcmpkt_segment_routing_srh_t_routing_type_get, + bcmpkt_segment_routing_srh_t_segments_left_get, + bcmpkt_segment_routing_srh_t_tag_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { + bcmpkt_segment_routing_srh_t_flags_set, + bcmpkt_segment_routing_srh_t_hdr_ext_len_set, + bcmpkt_segment_routing_srh_t_last_entry_set, + bcmpkt_segment_routing_srh_t_next_header_set, + bcmpkt_segment_routing_srh_t_routing_type_set, + bcmpkt_segment_routing_srh_t_segments_left_set, + bcmpkt_segment_routing_srh_t_tag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_field_data, +}; + + +static int32_t bcmpkt_segment_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_last_entry_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_last_entry_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_seg_list_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_seg_list_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { + bcmpkt_segment_routing_t_hdr_ext_len_get, + bcmpkt_segment_routing_t_last_entry_flags_get, + bcmpkt_segment_routing_t_next_header_get, + bcmpkt_segment_routing_t_routing_type_get, + bcmpkt_segment_routing_t_seg_list_get, + bcmpkt_segment_routing_t_segments_left_get, + bcmpkt_segment_routing_t_tag_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { + bcmpkt_segment_routing_t_hdr_ext_len_set, + bcmpkt_segment_routing_t_last_entry_flags_set, + bcmpkt_segment_routing_t_next_header_set, + bcmpkt_segment_routing_t_routing_type_set, + bcmpkt_segment_routing_t_seg_list_set, + bcmpkt_segment_routing_t_segments_left_set, + bcmpkt_segment_routing_t_tag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_std_segment_id_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_std_segment_id_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { + bcmpkt_std_segment_id_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { + bcmpkt_std_segment_id_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_udp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_udp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_udp_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_udp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, + bcmpkt_unknown_l5_t_l5_bytes_8_9_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, + bcmpkt_unknown_l5_t_l5_bytes_8_9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_vlan_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_vlan_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_vlan_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_vlan_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_vxlan_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_vxlan_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_vxlan_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_vxlan_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_wesp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_wesp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_wesp_t_field_data[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_wesp_t_field_info = { + .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56690_a0_dna_6_5_29_0_1_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56690_a0_dna_6_5_29_0_1_flexhdr_info_list[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_arp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_authen_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_bfd_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_cntag_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_dest_option_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_esp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ethertype_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_frag_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gpe_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_key_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_icmp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_igmp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_l2_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mpls_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_rarp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_routing_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_rspan_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_udp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_vlan_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_vxlan_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56690_a0_dna_6_5_29_0_1_wesp_t_fget, + .flex_fset = bcm56690_a0_dna_6_5_29_0_1_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_info, + .reasons_info = &bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56690_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56690_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56690_a0_dna_6_5_29_0_1_flexhdr_id_map[] = { + BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56690_a0_dna_6_5_29_0_1_flexhdr_map_get(void) +{ + return bcm56690_a0_dna_6_5_29_0_1_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56690_a0_dna_6_5_29_0_1_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56690_a0_dna_6_5_29_0_1_flexhdr_info_list[hid]; +} + +int bcm56690_a0_dna_6_5_29_0_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 14, + 21, + 22, + 70, +}; \ No newline at end of file diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..aa6df21e30d9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,1136 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_cna_6_5_29_sf_match_id_info.yml + * for device bcm56780_a0 and variant cna_6_5_29. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 35, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 35, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 37, + .pminbit = 35, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 35, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 7, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 7, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 9, + .pminbit = 7, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 7, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_cna_6_5_29_rxpmd_match_id_db_info = { + .num_entries = 77, + .db = bcm56780_a0_cna_6_5_29_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void) { + return &bcm56780_a0_cna_6_5_29_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56780_a0_cna_6_5_29_rxpmd_match_id_map[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_cna_6_5_29_rxpmd_match_id_map_info = { + .num_entries = 77, + .map = bcm56780_a0_cna_6_5_29_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void) { + return &bcm56780_a0_cna_6_5_29_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_pkt_flexhdr.c new file mode 100644 index 000000000000..55f9aad0306f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_pkt_flexhdr.c @@ -0,0 +1,4021 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56780_a0 and variant cna_6_5_29. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data[] = { + { + .name = "DROP_CODE_15_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "DVP_15_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + { 320, 335 }, /* Profile 6. */ + { 320, 335 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 135 }, /* Profile 2. */ + { 128, 135 }, /* Profile 3. */ + { 128, 135 }, /* Profile 4. */ + { 128, 135 }, /* Profile 5. */ + { 128, 135 }, /* Profile 6. */ + { 128, 135 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 416, 419 }, /* Profile 2. */ + { 416, 419 }, /* Profile 3. */ + { 416, 419 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + { 384, 387 }, /* Profile 6. */ + { 384, 387 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 175 }, /* Profile 2. */ + { 160, 175 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { 160, 175 }, /* Profile 5. */ + { 160, 175 }, /* Profile 6. */ + { 160, 175 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EP_NIH_HDR_DROP_CODE_15_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + }, + .profile_cnt = 7, + }, + { + .name = "EP_NIH_HDR_RECIRC_CODE_3_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 352, 355 }, /* Profile 5. */ + { 352, 355 }, /* Profile 6. */ + { 352, 355 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 271 }, /* Profile 2. */ + { 256, 271 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 240, 255 }, /* Profile 5. */ + { 240, 255 }, /* Profile 6. */ + }, + .profile_cnt = 7, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 287 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 256, 271 }, /* Profile 5. */ + { 256, 271 }, /* Profile 6. */ + }, + .profile_cnt = 7, + }, + { + .name = "ERSPAN3_GBP_SID_15_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + { 144, 159 }, /* Profile 6. */ + { 144, 159 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EVENT_TRACE_VECTOR_15_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + { 0, 15 }, /* Profile 5. */ + { 0, 15 }, /* Profile 6. */ + { 0, 15 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EVENT_TRACE_VECTOR_31_16", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 16, 31 }, /* Profile 2. */ + { 16, 31 }, /* Profile 3. */ + { 16, 31 }, /* Profile 4. */ + { 16, 31 }, /* Profile 5. */ + { 16, 31 }, /* Profile 6. */ + { 16, 31 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + { 32, 47 }, /* Profile 6. */ + { 32, 47 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 304, 319 }, /* Profile 5. */ + { 304, 319 }, /* Profile 6. */ + { 304, 319 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ING_TIMESTAMP_15_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 256, 271 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 240, 255 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ING_TIMESTAMP_31_16", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 272, 287 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 256, 271 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "INGRESS_PP_PORT_7_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 247 }, /* Profile 2. */ + { 240, 247 }, /* Profile 3. */ + { 240, 247 }, /* Profile 4. */ + { 224, 231 }, /* Profile 5. */ + { 224, 231 }, /* Profile 6. */ + { 224, 231 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 191 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + { 176, 191 }, /* Profile 6. */ + { 176, 191 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + { 372, 375 }, /* Profile 6. */ + { 372, 375 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 364, 367 }, /* Profile 5. */ + { 364, 367 }, /* Profile 6. */ + { 364, 367 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 314 }, /* Profile 2. */ + { 304, 314 }, /* Profile 3. */ + { 304, 314 }, /* Profile 4. */ + { 288, 298 }, /* Profile 5. */ + { 288, 298 }, /* Profile 6. */ + { 288, 298 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 218 }, /* Profile 2. */ + { 208, 218 }, /* Profile 3. */ + { 208, 218 }, /* Profile 4. */ + { 208, 218 }, /* Profile 5. */ + { 208, 218 }, /* Profile 6. */ + { 208, 218 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L2_TUNNEL_SVP_15_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 272, 287 }, /* Profile 5. */ + { 272, 287 }, /* Profile 6. */ + { 272, 287 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 365 }, /* Profile 2. */ + { 352, 365 }, /* Profile 3. */ + { 352, 365 }, /* Profile 4. */ + { 336, 349 }, /* Profile 5. */ + { 336, 349 }, /* Profile 6. */ + { 336, 349 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 237 }, /* Profile 2. */ + { 224, 237 }, /* Profile 3. */ + { 224, 237 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 80, 94 }, /* Profile 2. */ + { 80, 94 }, /* Profile 3. */ + { 80, 94 }, /* Profile 4. */ + { 80, 94 }, /* Profile 5. */ + { 80, 94 }, /* Profile 6. */ + { 80, 94 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "NHOP_INDEX_1_14_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 382 }, /* Profile 2. */ + { 368, 382 }, /* Profile 3. */ + { 368, 382 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 79 }, /* Profile 2. */ + { 64, 79 }, /* Profile 3. */ + { 64, 79 }, /* Profile 4. */ + { 64, 79 }, /* Profile 5. */ + { 64, 79 }, /* Profile 6. */ + { 64, 79 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 368, 371 }, /* Profile 5. */ + { 368, 371 }, /* Profile 6. */ + { 368, 371 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 356, 359 }, /* Profile 5. */ + { 356, 359 }, /* Profile 6. */ + { 356, 359 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + { 112, 127 }, /* Profile 6. */ + { 112, 127 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 380, 383 }, /* Profile 5. */ + { 380, 383 }, /* Profile 6. */ + { 380, 383 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 96, 111 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "TAG_ACTION_CTRL_1_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 409 }, /* Profile 2. */ + { 408, 409 }, /* Profile 3. */ + { 408, 409 }, /* Profile 4. */ + { 376, 377 }, /* Profile 5. */ + { 376, 377 }, /* Profile 6. */ + { 376, 377 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 360, 363 }, /* Profile 5. */ + { 360, 363 }, /* Profile 6. */ + { 360, 363 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "VFI_15_0", + .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + { 192, 207 }, /* Profile 6. */ + { 192, 207 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, +};static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_names[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56780_a0_cna_6_5_29_rxpmd_flex_reasons_info = { + .num_reasons = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_names, + .reason_encode = bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_encode, + .reason_decode = bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_arp_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_arp_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_arp_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_arp_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_arp_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_cpu_composites_0_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_cpu_composites_0_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_cpu_composites_0_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_cpu_composites_0_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_cpu_composites_1_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_cpu_composites_1_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_cpu_composites_1_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_cpu_composites_1_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ep_nih_header_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ep_nih_header_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_ep_nih_header_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_ep_nih_header_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ethertype_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ethertype_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_ethertype_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_ethertype_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_generic_loopback_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_generic_loopback_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_generic_loopback_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_generic_loopback_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_icmp_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_icmp_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_icmp_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_icmp_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ipfix_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ipfix_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_ipfix_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_ipfix_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ipv4_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ipv4_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_ipv4_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_ipv4_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ipv6_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ipv6_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_ipv6_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_ipv6_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_l2_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_l2_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_l2_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_l2_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_mirror_transport_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_mirror_transport_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_mirror_transport_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_mirror_transport_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get, + bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set, + bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_rarp_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_rarp_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rarp_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_rarp_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_rarp_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_udp_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_udp_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_udp_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_udp_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_unknown_l3_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_unknown_l3_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_unknown_l3_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_unknown_l3_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_unknown_l4_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_unknown_l4_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_unknown_l4_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_unknown_l4_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_unknown_l5_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_unknown_l5_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_unknown_l5_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_unknown_l5_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_vlan_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_vlan_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_vlan_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_vlan_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_vxlan_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_vxlan_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_vxlan_t_field_data[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_vxlan_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_29_vxlan_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56780_a0_cna_6_5_29_flexhdr_info_list[BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_arp_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_cpu_composites_0_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_cpu_composites_1_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_ep_nih_header_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_ethertype_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_generic_loopback_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_icmp_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_ipfix_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_ipv4_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_ipv6_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_l2_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_mirror_transport_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_rarp_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_udp_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_unknown_l3_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_unknown_l4_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_unknown_l5_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_vlan_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_29_vxlan_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_29_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_29_rxpmd_flex_field_info, + .reasons_info = &bcm56780_a0_cna_6_5_29_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56780_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56780_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56780_a0_cna_6_5_29_flexhdr_id_map[] = { + BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56780_a0_cna_6_5_29_flexhdr_map_get(void) +{ + return bcm56780_a0_cna_6_5_29_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56780_a0_cna_6_5_29_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56780_a0_cna_6_5_29_flexhdr_info_list[hid]; +} + +int bcm56780_a0_cna_6_5_29_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 7, + -1, + -1, + 27, +}; \ No newline at end of file diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..57ca11ef713f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,2550 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_dna_2_9_5_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant dna_2_9_5_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", + .match = 0x22, + .match_mask = 0x22, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_SVTAG", + .match = 0x20, + .match_mask = 0x22, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", + .match = 0x22, + .match_mask = 0x22, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", + .match = 0x20, + .match_mask = 0x22, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", + .match = 0x22, + .match_mask = 0x22, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SVTAG", + .match = 0x20, + .match_mask = 0x22, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db_info = { + .num_entries = 178, + .db = bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db_info_get(void) { + return &bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map_info = { + .num_entries = 178, + .map = bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map_info_get(void) { + return &bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_pkt_flexhdr.c new file mode 100644 index 000000000000..616d94ee4e0f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_pkt_flexhdr.c @@ -0,0 +1,8523 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56780_a0 and variant dna_2_9_5_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[13] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[13] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[13] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[13] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[13] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[13] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[13] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[13] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[13] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[13] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[13] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[13] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[13] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[13] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[13] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[13] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[13] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[13] |= (0x1 << 31); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_data[] = { + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 240, 255 }, /* Profile 8. */ + { 224, 239 }, /* Profile 9. */ + { 240, 255 }, /* Profile 10. */ + { 224, 239 }, /* Profile 11. */ + { 240, 255 }, /* Profile 12. */ + { 224, 239 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + { 48, 63 }, /* Profile 8. */ + { 48, 63 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 48, 63 }, /* Profile 12. */ + { 48, 63 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "DVP_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 383 }, /* Profile 2. */ + { 368, 383 }, /* Profile 3. */ + { 368, 383 }, /* Profile 4. */ + { 368, 383 }, /* Profile 5. */ + { 368, 383 }, /* Profile 6. */ + { 368, 383 }, /* Profile 7. */ + { 368, 383 }, /* Profile 8. */ + { 368, 383 }, /* Profile 9. */ + { 368, 383 }, /* Profile 10. */ + { 368, 383 }, /* Profile 11. */ + { 368, 383 }, /* Profile 12. */ + { 368, 383 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 263 }, /* Profile 2. */ + { 240, 247 }, /* Profile 3. */ + { 256, 263 }, /* Profile 4. */ + { 240, 247 }, /* Profile 5. */ + { 256, 263 }, /* Profile 6. */ + { 240, 247 }, /* Profile 7. */ + { 256, 263 }, /* Profile 8. */ + { 240, 247 }, /* Profile 9. */ + { 256, 263 }, /* Profile 10. */ + { 240, 247 }, /* Profile 11. */ + { 256, 263 }, /* Profile 12. */ + { 240, 247 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EGR_MTOP_INDEX_HI_3_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + { 384, 387 }, /* Profile 6. */ + { 384, 387 }, /* Profile 7. */ + { 384, 387 }, /* Profile 8. */ + { 384, 387 }, /* Profile 9. */ + { 384, 387 }, /* Profile 10. */ + { 384, 387 }, /* Profile 11. */ + { 384, 387 }, /* Profile 12. */ + { 384, 387 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 48, 63 }, /* Profile 10. */ + { 48, 63 }, /* Profile 11. */ + }, + .profile_cnt = 12, + }, + { + .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 255 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + { 224, 239 }, /* Profile 5. */ + { 240, 255 }, /* Profile 6. */ + { 224, 239 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + { 412, 415 }, /* Profile 6. */ + { 412, 415 }, /* Profile 7. */ + { 412, 415 }, /* Profile 8. */ + { 412, 415 }, /* Profile 9. */ + { 412, 415 }, /* Profile 10. */ + { 412, 415 }, /* Profile 11. */ + { 412, 415 }, /* Profile 12. */ + { 412, 415 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + { 112, 127 }, /* Profile 6. */ + { 112, 127 }, /* Profile 7. */ + { 112, 127 }, /* Profile 8. */ + { 112, 127 }, /* Profile 9. */ + { 112, 127 }, /* Profile 10. */ + { 112, 127 }, /* Profile 11. */ + { 112, 127 }, /* Profile 12. */ + { 112, 127 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 272, 287 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 288, 303 }, /* Profile 8. */ + { 272, 287 }, /* Profile 9. */ + { 288, 303 }, /* Profile 10. */ + { 272, 287 }, /* Profile 11. */ + }, + .profile_cnt = 12, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 319 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 304, 319 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 304, 319 }, /* Profile 8. */ + { 288, 303 }, /* Profile 9. */ + { 304, 319 }, /* Profile 10. */ + { 288, 303 }, /* Profile 11. */ + }, + .profile_cnt = 12, + }, + { + .name = "EVENT_TRACE_VECTOR_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + { 0, 15 }, /* Profile 5. */ + { 0, 15 }, /* Profile 6. */ + { 0, 15 }, /* Profile 7. */ + { 0, 15 }, /* Profile 8. */ + { 0, 15 }, /* Profile 9. */ + { 0, 15 }, /* Profile 10. */ + { 0, 15 }, /* Profile 11. */ + { 0, 15 }, /* Profile 12. */ + { 0, 15 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EVENT_TRACE_VECTOR_31_16", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 16, 31 }, /* Profile 2. */ + { 16, 31 }, /* Profile 3. */ + { 16, 31 }, /* Profile 4. */ + { 16, 31 }, /* Profile 5. */ + { 16, 31 }, /* Profile 6. */ + { 16, 31 }, /* Profile 7. */ + { 16, 31 }, /* Profile 8. */ + { 16, 31 }, /* Profile 9. */ + { 16, 31 }, /* Profile 10. */ + { 16, 31 }, /* Profile 11. */ + { 16, 31 }, /* Profile 12. */ + { 16, 31 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + { 32, 47 }, /* Profile 6. */ + { 32, 47 }, /* Profile 7. */ + { 32, 47 }, /* Profile 8. */ + { 32, 47 }, /* Profile 9. */ + { 32, 47 }, /* Profile 10. */ + { 32, 47 }, /* Profile 11. */ + { 32, 47 }, /* Profile 12. */ + { 32, 47 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + { 208, 223 }, /* Profile 6. */ + { 192, 207 }, /* Profile 7. */ + { 208, 223 }, /* Profile 8. */ + { 192, 207 }, /* Profile 9. */ + { 208, 223 }, /* Profile 10. */ + { 192, 207 }, /* Profile 11. */ + { 208, 223 }, /* Profile 12. */ + { 192, 207 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "IFP_IOAM_GBP_ACTION_3_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 396, 399 }, /* Profile 5. */ + { 396, 399 }, /* Profile 6. */ + { 396, 399 }, /* Profile 7. */ + { 396, 399 }, /* Profile 8. */ + { 396, 399 }, /* Profile 9. */ + { 396, 399 }, /* Profile 10. */ + { 396, 399 }, /* Profile 11. */ + { 396, 399 }, /* Profile 12. */ + { 396, 399 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 80, 95 }, /* Profile 2. */ + { 80, 95 }, /* Profile 3. */ + { 80, 95 }, /* Profile 4. */ + { 80, 95 }, /* Profile 5. */ + { 80, 95 }, /* Profile 6. */ + { 80, 95 }, /* Profile 7. */ + { 80, 95 }, /* Profile 8. */ + { 80, 95 }, /* Profile 9. */ + { 80, 95 }, /* Profile 10. */ + { 80, 95 }, /* Profile 11. */ + { 80, 95 }, /* Profile 12. */ + { 80, 95 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + { 388, 391 }, /* Profile 6. */ + { 388, 391 }, /* Profile 7. */ + { 388, 391 }, /* Profile 8. */ + { 388, 391 }, /* Profile 9. */ + { 388, 391 }, /* Profile 10. */ + { 388, 391 }, /* Profile 11. */ + { 388, 391 }, /* Profile 12. */ + { 388, 391 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "ING_TIMESTAMP_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 288, 303 }, /* Profile 6. */ + { 272, 287 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 288, 303 }, /* Profile 12. */ + { 272, 287 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "ING_TIMESTAMP_31_16", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 304, 319 }, /* Profile 6. */ + { 288, 303 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 304, 319 }, /* Profile 12. */ + { 288, 303 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "INGRESS_PP_PORT_7_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 231 }, /* Profile 2. */ + { 208, 215 }, /* Profile 3. */ + { 224, 231 }, /* Profile 4. */ + { 208, 215 }, /* Profile 5. */ + { 224, 231 }, /* Profile 6. */ + { 208, 215 }, /* Profile 7. */ + { 224, 231 }, /* Profile 8. */ + { 208, 215 }, /* Profile 9. */ + { 224, 231 }, /* Profile 10. */ + { 208, 215 }, /* Profile 11. */ + { 224, 231 }, /* Profile 12. */ + { 208, 215 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 304, 319 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 304, 319 }, /* Profile 5. */ + { 320, 335 }, /* Profile 6. */ + { 304, 319 }, /* Profile 7. */ + { 320, 335 }, /* Profile 8. */ + { 304, 319 }, /* Profile 9. */ + { 320, 335 }, /* Profile 10. */ + { 304, 319 }, /* Profile 11. */ + { 320, 335 }, /* Profile 12. */ + { 304, 319 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 416, 419 }, /* Profile 2. */ + { 416, 419 }, /* Profile 3. */ + { 416, 419 }, /* Profile 4. */ + { 416, 419 }, /* Profile 5. */ + { 416, 419 }, /* Profile 6. */ + { 416, 419 }, /* Profile 7. */ + { 416, 419 }, /* Profile 8. */ + { 416, 419 }, /* Profile 9. */ + { 416, 419 }, /* Profile 10. */ + { 416, 419 }, /* Profile 11. */ + { 416, 419 }, /* Profile 12. */ + { 416, 419 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + { 392, 395 }, /* Profile 6. */ + { 392, 395 }, /* Profile 7. */ + { 392, 395 }, /* Profile 8. */ + { 392, 395 }, /* Profile 9. */ + { 392, 395 }, /* Profile 10. */ + { 392, 395 }, /* Profile 11. */ + { 392, 395 }, /* Profile 12. */ + { 392, 395 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 202 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 192, 202 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 192, 202 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 192, 202 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 192, 202 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 192, 202 }, /* Profile 12. */ + }, + .profile_cnt = 13, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 336, 346 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 336, 346 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 336, 346 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 336, 346 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { 336, 346 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 336, 346 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 285 }, /* Profile 2. */ + { 256, 269 }, /* Profile 3. */ + { 272, 285 }, /* Profile 4. */ + { 256, 269 }, /* Profile 5. */ + { 272, 285 }, /* Profile 6. */ + { 256, 269 }, /* Profile 7. */ + { 272, 285 }, /* Profile 8. */ + { 256, 269 }, /* Profile 9. */ + { 272, 285 }, /* Profile 10. */ + { 256, 269 }, /* Profile 11. */ + { 272, 285 }, /* Profile 12. */ + { 256, 269 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 365 }, /* Profile 2. */ + { 352, 365 }, /* Profile 3. */ + { 352, 365 }, /* Profile 4. */ + { 352, 365 }, /* Profile 5. */ + { 352, 365 }, /* Profile 6. */ + { 352, 365 }, /* Profile 7. */ + { 352, 365 }, /* Profile 8. */ + { 352, 365 }, /* Profile 9. */ + { 352, 365 }, /* Profile 10. */ + { 352, 365 }, /* Profile 11. */ + { 352, 365 }, /* Profile 12. */ + { 352, 365 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "MPLS_LABEL_DECAP_COUNT_3_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 432, 435 }, /* Profile 2. */ + { 432, 435 }, /* Profile 3. */ + { 432, 435 }, /* Profile 4. */ + { 432, 435 }, /* Profile 5. */ + { 432, 435 }, /* Profile 6. */ + { 432, 435 }, /* Profile 7. */ + { 432, 435 }, /* Profile 8. */ + { 432, 435 }, /* Profile 9. */ + { 432, 435 }, /* Profile 10. */ + { 432, 435 }, /* Profile 11. */ + { 432, 435 }, /* Profile 12. */ + { 432, 435 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 191 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + { 176, 191 }, /* Profile 6. */ + { 176, 191 }, /* Profile 7. */ + { 176, 191 }, /* Profile 8. */ + { 176, 191 }, /* Profile 9. */ + { 176, 191 }, /* Profile 10. */ + { 176, 191 }, /* Profile 11. */ + { 176, 191 }, /* Profile 12. */ + { 176, 191 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "NHOP_INDEX_1_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { 128, 143 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ + { 128, 143 }, /* Profile 8. */ + { 128, 143 }, /* Profile 9. */ + { 128, 143 }, /* Profile 10. */ + { 128, 143 }, /* Profile 11. */ + { 128, 143 }, /* Profile 12. */ + { 128, 143 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 79 }, /* Profile 2. */ + { 64, 79 }, /* Profile 3. */ + { 64, 79 }, /* Profile 4. */ + { 64, 79 }, /* Profile 5. */ + { 64, 79 }, /* Profile 6. */ + { 64, 79 }, /* Profile 7. */ + { 64, 79 }, /* Profile 8. */ + { 64, 79 }, /* Profile 9. */ + { 64, 79 }, /* Profile 10. */ + { 64, 79 }, /* Profile 11. */ + { 64, 79 }, /* Profile 12. */ + { 64, 79 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 428, 431 }, /* Profile 2. */ + { 428, 431 }, /* Profile 3. */ + { 428, 431 }, /* Profile 4. */ + { 428, 431 }, /* Profile 5. */ + { 428, 431 }, /* Profile 6. */ + { 428, 431 }, /* Profile 7. */ + { 428, 431 }, /* Profile 8. */ + { 428, 431 }, /* Profile 9. */ + { 428, 431 }, /* Profile 10. */ + { 428, 431 }, /* Profile 11. */ + { 428, 431 }, /* Profile 12. */ + { 428, 431 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "SVP_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 96, 111 }, /* Profile 7. */ + { 96, 111 }, /* Profile 8. */ + { 96, 111 }, /* Profile 9. */ + { 96, 111 }, /* Profile 10. */ + { 96, 111 }, /* Profile 11. */ + { 96, 111 }, /* Profile 12. */ + { 96, 111 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + { 408, 411 }, /* Profile 6. */ + { 408, 411 }, /* Profile 7. */ + { 408, 411 }, /* Profile 8. */ + { 408, 411 }, /* Profile 9. */ + { 408, 411 }, /* Profile 10. */ + { 408, 411 }, /* Profile 11. */ + { 408, 411 }, /* Profile 12. */ + { 408, 411 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 175 }, /* Profile 2. */ + { 160, 175 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { 160, 175 }, /* Profile 5. */ + { 160, 175 }, /* Profile 6. */ + { 160, 175 }, /* Profile 7. */ + { 160, 175 }, /* Profile 8. */ + { 160, 175 }, /* Profile 9. */ + { 160, 175 }, /* Profile 10. */ + { 160, 175 }, /* Profile 11. */ + { 160, 175 }, /* Profile 12. */ + { 160, 175 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 424, 427 }, /* Profile 2. */ + { 424, 427 }, /* Profile 3. */ + { 424, 427 }, /* Profile 4. */ + { 424, 427 }, /* Profile 5. */ + { 424, 427 }, /* Profile 6. */ + { 424, 427 }, /* Profile 7. */ + { 424, 427 }, /* Profile 8. */ + { 424, 427 }, /* Profile 9. */ + { 424, 427 }, /* Profile 10. */ + { 424, 427 }, /* Profile 11. */ + { 424, 427 }, /* Profile 12. */ + { 424, 427 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + { 144, 159 }, /* Profile 6. */ + { 144, 159 }, /* Profile 7. */ + { 144, 159 }, /* Profile 8. */ + { 144, 159 }, /* Profile 9. */ + { 144, 159 }, /* Profile 10. */ + { 144, 159 }, /* Profile 11. */ + { 144, 159 }, /* Profile 12. */ + { 144, 159 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 420, 423 }, /* Profile 2. */ + { 420, 423 }, /* Profile 3. */ + { 420, 423 }, /* Profile 4. */ + { 420, 423 }, /* Profile 5. */ + { 420, 423 }, /* Profile 6. */ + { 420, 423 }, /* Profile 7. */ + { 420, 423 }, /* Profile 8. */ + { 420, 423 }, /* Profile 9. */ + { 420, 423 }, /* Profile 10. */ + { 420, 423 }, /* Profile 11. */ + { 420, 423 }, /* Profile 12. */ + { 420, 423 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + { 400, 403 }, /* Profile 6. */ + { 400, 403 }, /* Profile 7. */ + { 400, 403 }, /* Profile 8. */ + { 400, 403 }, /* Profile 9. */ + { 400, 403 }, /* Profile 10. */ + { 400, 403 }, /* Profile 11. */ + { 400, 403 }, /* Profile 12. */ + { 400, 403 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "VFI_15_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + { 336, 351 }, /* Profile 6. */ + { 320, 335 }, /* Profile 7. */ + { 336, 351 }, /* Profile 8. */ + { 320, 335 }, /* Profile 9. */ + { 336, 351 }, /* Profile 10. */ + { 320, 335 }, /* Profile 11. */ + { 336, 351 }, /* Profile 12. */ + { 320, 335 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0", + .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 405 }, /* Profile 2. */ + { 404, 405 }, /* Profile 3. */ + { 404, 405 }, /* Profile 4. */ + { 404, 405 }, /* Profile 5. */ + { 404, 405 }, /* Profile 6. */ + { 404, 405 }, /* Profile 7. */ + { 404, 405 }, /* Profile 8. */ + { 404, 405 }, /* Profile 9. */ + { 404, 405 }, /* Profile 10. */ + { 404, 405 }, /* Profile 11. */ + { 404, 405 }, /* Profile 12. */ + { 404, 405 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, +};static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_names[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_names, + .reason_encode = bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_arp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_arp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_arp_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_arp_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_authen_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_authen_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_authen_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_authen_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_bfd_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_bfd_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_bfd_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_bfd_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_cntag_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_cntag_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_cntag_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_cntag_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_dest_option_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_dest_option_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_dest_option_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_dest_option_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_esp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_esp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_esp_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_esp_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_esp_t_field_data, +}; + + +static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_etag_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_get, + bcmpkt_etag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_etag_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_set, + bcmpkt_etag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_etag_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_etag_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_etag_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ethertype_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ethertype_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ethertype_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ethertype_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_frag_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_frag_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_frag_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_frag_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_frag_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_generic_loopback_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_generic_loopback_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_generic_loopback_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_generic_loopback_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gpe_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gpe_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gpe_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gpe_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gre_chksum_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gre_chksum_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gre_chksum_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gre_chksum_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gre_key_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gre_key_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gre_key_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gre_key_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gre_rout_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gre_rout_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gre_rout_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gre_rout_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gre_seq_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gre_seq_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gre_seq_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gre_seq_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gre_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gre_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gre_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gre_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_gre_t_field_data, +}; + + +static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 4, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 4, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 6, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 6, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 31, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 10); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 10, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 15, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 15, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 4); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 2, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_hg3_base_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_get, + bcmpkt_hg3_base_t_cng_get, + bcmpkt_hg3_base_t_entropy_get, + bcmpkt_hg3_base_t_ext_hdr_present_get, + bcmpkt_hg3_base_t_hg3_reserved_get, + bcmpkt_hg3_base_t_l3_routed_get, + bcmpkt_hg3_base_t_mirror_copy_get, + bcmpkt_hg3_base_t_reserved_etype_get, + bcmpkt_hg3_base_t_system_destination_get, + bcmpkt_hg3_base_t_system_destination_type_get, + bcmpkt_hg3_base_t_system_source_get, + bcmpkt_hg3_base_t_tc_get, + bcmpkt_hg3_base_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_hg3_base_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_set, + bcmpkt_hg3_base_t_cng_set, + bcmpkt_hg3_base_t_entropy_set, + bcmpkt_hg3_base_t_ext_hdr_present_set, + bcmpkt_hg3_base_t_hg3_reserved_set, + bcmpkt_hg3_base_t_l3_routed_set, + bcmpkt_hg3_base_t_mirror_copy_set, + bcmpkt_hg3_base_t_reserved_etype_set, + bcmpkt_hg3_base_t_system_destination_set, + bcmpkt_hg3_base_t_system_destination_type_set, + bcmpkt_hg3_base_t_system_source_set, + bcmpkt_hg3_base_t_tc_set, + bcmpkt_hg3_base_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_hg3_base_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_hg3_base_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_hg3_base_t_field_data, +}; + + +static int32_t bcmpkt_hg3_extension_0_t_class_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_get, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, + bcmpkt_hg3_extension_0_t_flags_get, + bcmpkt_hg3_extension_0_t_forwarding_domain_get, + bcmpkt_hg3_extension_0_t_svp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_set, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, + bcmpkt_hg3_extension_0_t_flags_set, + bcmpkt_hg3_extension_0_t_forwarding_domain_set, + bcmpkt_hg3_extension_0_t_svp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_icmp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_icmp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_icmp_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_icmp_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 24); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 2); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 2, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 6); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 6, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_get, + bcmpkt_ifa_flex_md_0_b_t_port_speed_get, + bcmpkt_ifa_flex_md_0_b_t_queue_id_get, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_set, + bcmpkt_ifa_flex_md_0_b_t_port_speed_set, + bcmpkt_ifa_flex_md_0_b_t_queue_id_set, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_get, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_set, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_header_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_header_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_header_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_header_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_get, + bcmpkt_ifa_md_base_t_hop_limit_current_length_get, + bcmpkt_ifa_md_base_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_set, + bcmpkt_ifa_md_base_t_hop_limit_current_length_set, + bcmpkt_ifa_md_base_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_get, + bcmpkt_ifa_metadata_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_t_metadata_get, + bcmpkt_ifa_metadata_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_set, + bcmpkt_ifa_metadata_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_t_metadata_set, + bcmpkt_ifa_metadata_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_igmp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_igmp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_igmp_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_igmp_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ipfix_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ipfix_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ipfix_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ipfix_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ipv4_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ipv4_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ipv4_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ipv4_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ipv6_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ipv6_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ipv6_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ipv6_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_l2_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_l2_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_l2_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_l2_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mirror_transport_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mirror_transport_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mirror_transport_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mirror_transport_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mpls_ach_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mpls_ach_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mpls_ach_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mpls_ach_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mpls_bv_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mpls_bv_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mpls_bv_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mpls_bv_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mpls_cw_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mpls_cw_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mpls_cw_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mpls_cw_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mpls_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mpls_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mpls_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mpls_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_p_1588_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_p_1588_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_p_1588_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_p_1588_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_0_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_0_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_psamp_0_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_psamp_0_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_1_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_1_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_psamp_1_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_psamp_1_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get, + bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set, + bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_rarp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_rarp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rarp_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_rarp_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_routing_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_routing_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_routing_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_routing_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_rspan_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_rspan_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rspan_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_rspan_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_rspan_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_snap_llc_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_snap_llc_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_snap_llc_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_snap_llc_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_svtag_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_get, + bcmpkt_svtag_t_data_upr_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_svtag_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_set, + bcmpkt_svtag_t_data_upr_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_svtag_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_svtag_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_svtag_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_udp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_udp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_udp_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_udp_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_unknown_l3_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_unknown_l3_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_unknown_l3_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_unknown_l3_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_unknown_l4_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_unknown_l4_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_unknown_l4_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_unknown_l4_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_unknown_l5_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_unknown_l5_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_unknown_l5_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_unknown_l5_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_vlan_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_vlan_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_vlan_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_vlan_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_vntag_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_get, + bcmpkt_vntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_vntag_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_set, + bcmpkt_vntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_vntag_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_vntag_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_vntag_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_vxlan_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_vxlan_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_vxlan_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_vxlan_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_wesp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_wesp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_wesp_t_field_data[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_wesp_t_field_info = { + .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56780_a0_dna_2_9_5_0_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56780_a0_dna_2_9_5_0_flexhdr_info_list[BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_arp_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_authen_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_bfd_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_cntag_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_dest_option_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_esp_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_etag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_etag_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_etag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_ethertype_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_frag_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_generic_loopback_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_gpe_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_gre_chksum_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_gre_key_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_gre_rout_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_gre_seq_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_gre_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_hg3_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_hg3_base_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_hg3_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_icmp_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_header_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_igmp_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_ipfix_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_ipv4_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_ipv6_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_l2_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_mirror_transport_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_mpls_ach_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_mpls_bv_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_mpls_cw_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_mpls_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_p_1588_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_psamp_0_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_psamp_1_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_rarp_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_routing_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_rspan_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_snap_llc_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_svtag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_svtag_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_svtag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_udp_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_unknown_l3_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_unknown_l4_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_unknown_l5_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_vlan_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_vntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_vntag_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_vntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_vxlan_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_dna_2_9_5_0_wesp_t_fget, + .flex_fset = bcm56780_a0_dna_2_9_5_0_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_info, + .reasons_info = &bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56780_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56780_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56780_a0_dna_2_9_5_0_flexhdr_id_map[] = { + BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56780_a0_dna_2_9_5_0_flexhdr_map_get(void) +{ + return bcm56780_a0_dna_2_9_5_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56780_a0_dna_2_9_5_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56780_a0_dna_2_9_5_0_flexhdr_info_list[hid]; +} + +int bcm56780_a0_dna_2_9_5_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 14, + 21, + 22, + 69, +}; \ No newline at end of file diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..3998c1057341 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,2480 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_hna_6_5_29_2_1_sf_match_id_info.yml + * for device bcm56780_a0 and variant hna_6_5_29_2_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", + .match = 0x40, + .match_mask = 0x60, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_SVTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", + .match = 0x20, + .match_mask = 0x60, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", + .match = 0x40, + .match_mask = 0x60, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", + .match = 0x20, + .match_mask = 0x60, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", + .match = 0x40, + .match_mask = 0x60, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", + .match = 0x20, + .match_mask = 0x60, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", + .match = 0x40, + .match_mask = 0x60, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SVTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", + .match = 0x20, + .match_mask = 0x60, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db_info = { + .num_entries = 173, + .db = bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db_info_get(void) { + return &bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map_info = { + .num_entries = 173, + .map = bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map_info_get(void) { + return &bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_pkt_flexhdr.c new file mode 100644 index 000000000000..a07337a4102d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_pkt_flexhdr.c @@ -0,0 +1,8370 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56780_a0 and variant hna_6_5_29_2_1. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[13] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[13] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[13] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[13] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[13] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[13] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[13] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[13] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[13] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[13] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[13] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[13] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[13] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[13] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[13] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[13] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[13] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[13] |= (0x1 << 31); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_data[] = { + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 80, 95 }, /* Profile 12. */ + { 80, 95 }, /* Profile 13. */ + { 80, 95 }, /* Profile 14. */ + { 80, 95 }, /* Profile 15. */ + { 80, 95 }, /* Profile 16. */ + { 80, 95 }, /* Profile 17. */ + { 80, 95 }, /* Profile 18. */ + { 80, 95 }, /* Profile 19. */ + { 80, 95 }, /* Profile 20. */ + { 80, 95 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 48, 63 }, /* Profile 10. */ + { 48, 63 }, /* Profile 11. */ + { 48, 63 }, /* Profile 12. */ + { 48, 63 }, /* Profile 13. */ + { 48, 63 }, /* Profile 14. */ + { 48, 63 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { 48, 63 }, /* Profile 20. */ + { 48, 63 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "DVP_15_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 383 }, /* Profile 2. */ + { 368, 383 }, /* Profile 3. */ + { 368, 383 }, /* Profile 4. */ + { 368, 383 }, /* Profile 5. */ + { 368, 383 }, /* Profile 6. */ + { 368, 383 }, /* Profile 7. */ + { 368, 383 }, /* Profile 8. */ + { 368, 383 }, /* Profile 9. */ + { 368, 383 }, /* Profile 10. */ + { 368, 383 }, /* Profile 11. */ + { 368, 383 }, /* Profile 12. */ + { 368, 383 }, /* Profile 13. */ + { 368, 383 }, /* Profile 14. */ + { 368, 383 }, /* Profile 15. */ + { 368, 383 }, /* Profile 16. */ + { 368, 383 }, /* Profile 17. */ + { 368, 383 }, /* Profile 18. */ + { 368, 383 }, /* Profile 19. */ + { 368, 383 }, /* Profile 20. */ + { 368, 383 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 119 }, /* Profile 2. */ + { 112, 119 }, /* Profile 3. */ + { 112, 119 }, /* Profile 4. */ + { 112, 119 }, /* Profile 5. */ + { 112, 119 }, /* Profile 6. */ + { 112, 119 }, /* Profile 7. */ + { 112, 119 }, /* Profile 8. */ + { 112, 119 }, /* Profile 9. */ + { 112, 119 }, /* Profile 10. */ + { 112, 119 }, /* Profile 11. */ + { 112, 119 }, /* Profile 12. */ + { 112, 119 }, /* Profile 13. */ + { 112, 119 }, /* Profile 14. */ + { 112, 119 }, /* Profile 15. */ + { 112, 119 }, /* Profile 16. */ + { 112, 119 }, /* Profile 17. */ + { 112, 119 }, /* Profile 18. */ + { 112, 119 }, /* Profile 19. */ + { 112, 119 }, /* Profile 20. */ + { 112, 119 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "EGR_MTOP_INDEX_HI_3_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + { 384, 387 }, /* Profile 6. */ + { 384, 387 }, /* Profile 7. */ + { 384, 387 }, /* Profile 8. */ + { 384, 387 }, /* Profile 9. */ + { 384, 387 }, /* Profile 10. */ + { 384, 387 }, /* Profile 11. */ + { 384, 387 }, /* Profile 12. */ + { 384, 387 }, /* Profile 13. */ + { 384, 387 }, /* Profile 14. */ + { 384, 387 }, /* Profile 15. */ + { 384, 387 }, /* Profile 16. */ + { 384, 387 }, /* Profile 17. */ + { 384, 387 }, /* Profile 18. */ + { 384, 387 }, /* Profile 19. */ + { 384, 387 }, /* Profile 20. */ + { 384, 387 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + { 48, 63 }, /* Profile 8. */ + { 48, 63 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 48, 63 }, /* Profile 16. */ + { 48, 63 }, /* Profile 17. */ + { 48, 63 }, /* Profile 18. */ + { 48, 63 }, /* Profile 19. */ + }, + .profile_cnt = 20, + }, + { + .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 80, 95 }, /* Profile 2. */ + { 80, 95 }, /* Profile 3. */ + { 80, 95 }, /* Profile 4. */ + { 80, 95 }, /* Profile 5. */ + { 80, 95 }, /* Profile 6. */ + { 80, 95 }, /* Profile 7. */ + { 80, 95 }, /* Profile 8. */ + { 80, 95 }, /* Profile 9. */ + { 80, 95 }, /* Profile 10. */ + { 80, 95 }, /* Profile 11. */ + }, + .profile_cnt = 12, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 424, 427 }, /* Profile 2. */ + { 424, 427 }, /* Profile 3. */ + { 424, 427 }, /* Profile 4. */ + { 424, 427 }, /* Profile 5. */ + { 424, 427 }, /* Profile 6. */ + { 424, 427 }, /* Profile 7. */ + { 424, 427 }, /* Profile 8. */ + { 424, 427 }, /* Profile 9. */ + { 424, 427 }, /* Profile 10. */ + { 424, 427 }, /* Profile 11. */ + { 424, 427 }, /* Profile 12. */ + { 424, 427 }, /* Profile 13. */ + { 424, 427 }, /* Profile 14. */ + { 424, 427 }, /* Profile 15. */ + { 424, 427 }, /* Profile 16. */ + { 424, 427 }, /* Profile 17. */ + { 424, 427 }, /* Profile 18. */ + { 424, 427 }, /* Profile 19. */ + { 424, 427 }, /* Profile 20. */ + { 424, 427 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { 128, 143 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ + { 128, 143 }, /* Profile 8. */ + { 128, 143 }, /* Profile 9. */ + { 128, 143 }, /* Profile 10. */ + { 128, 143 }, /* Profile 11. */ + { 128, 143 }, /* Profile 12. */ + { 128, 143 }, /* Profile 13. */ + { 128, 143 }, /* Profile 14. */ + { 128, 143 }, /* Profile 15. */ + { 128, 143 }, /* Profile 16. */ + { 128, 143 }, /* Profile 17. */ + { 128, 143 }, /* Profile 18. */ + { 128, 143 }, /* Profile 19. */ + { 128, 143 }, /* Profile 20. */ + { 128, 143 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 271 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 256, 271 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 240, 255 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 256, 271 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 240, 255 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 256, 271 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 240, 255 }, /* Profile 18. */ + }, + .profile_cnt = 19, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 287 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 256, 271 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 272, 287 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 256, 271 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 272, 287 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 256, 271 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 272, 287 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 256, 271 }, /* Profile 18. */ + }, + .profile_cnt = 19, + }, + { + .name = "EVENT_TRACE_VECTOR_15_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + { 0, 15 }, /* Profile 5. */ + { 0, 15 }, /* Profile 6. */ + { 0, 15 }, /* Profile 7. */ + { 0, 15 }, /* Profile 8. */ + { 0, 15 }, /* Profile 9. */ + { 0, 15 }, /* Profile 10. */ + { 0, 15 }, /* Profile 11. */ + { 0, 15 }, /* Profile 12. */ + { 0, 15 }, /* Profile 13. */ + { 0, 15 }, /* Profile 14. */ + { 0, 15 }, /* Profile 15. */ + { 0, 15 }, /* Profile 16. */ + { 0, 15 }, /* Profile 17. */ + { 0, 15 }, /* Profile 18. */ + { 0, 15 }, /* Profile 19. */ + { 0, 15 }, /* Profile 20. */ + { 0, 15 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "EVENT_TRACE_VECTOR_31_16", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 16, 31 }, /* Profile 2. */ + { 16, 31 }, /* Profile 3. */ + { 16, 31 }, /* Profile 4. */ + { 16, 31 }, /* Profile 5. */ + { 16, 31 }, /* Profile 6. */ + { 16, 31 }, /* Profile 7. */ + { 16, 31 }, /* Profile 8. */ + { 16, 31 }, /* Profile 9. */ + { 16, 31 }, /* Profile 10. */ + { 16, 31 }, /* Profile 11. */ + { 16, 31 }, /* Profile 12. */ + { 16, 31 }, /* Profile 13. */ + { 16, 31 }, /* Profile 14. */ + { 16, 31 }, /* Profile 15. */ + { 16, 31 }, /* Profile 16. */ + { 16, 31 }, /* Profile 17. */ + { 16, 31 }, /* Profile 18. */ + { 16, 31 }, /* Profile 19. */ + { 16, 31 }, /* Profile 20. */ + { 16, 31 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + { 32, 47 }, /* Profile 6. */ + { 32, 47 }, /* Profile 7. */ + { 32, 47 }, /* Profile 8. */ + { 32, 47 }, /* Profile 9. */ + { 32, 47 }, /* Profile 10. */ + { 32, 47 }, /* Profile 11. */ + { 32, 47 }, /* Profile 12. */ + { 32, 47 }, /* Profile 13. */ + { 32, 47 }, /* Profile 14. */ + { 32, 47 }, /* Profile 15. */ + { 32, 47 }, /* Profile 16. */ + { 32, 47 }, /* Profile 17. */ + { 32, 47 }, /* Profile 18. */ + { 32, 47 }, /* Profile 19. */ + { 32, 47 }, /* Profile 20. */ + { 32, 47 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 255 }, /* Profile 2. */ + { 240, 255 }, /* Profile 3. */ + { 224, 239 }, /* Profile 4. */ + { 224, 239 }, /* Profile 5. */ + { 240, 255 }, /* Profile 6. */ + { 240, 255 }, /* Profile 7. */ + { 224, 239 }, /* Profile 8. */ + { 224, 239 }, /* Profile 9. */ + { 240, 255 }, /* Profile 10. */ + { 224, 239 }, /* Profile 11. */ + { 240, 255 }, /* Profile 12. */ + { 240, 255 }, /* Profile 13. */ + { 224, 239 }, /* Profile 14. */ + { 224, 239 }, /* Profile 15. */ + { 240, 255 }, /* Profile 16. */ + { 240, 255 }, /* Profile 17. */ + { 224, 239 }, /* Profile 18. */ + { 224, 239 }, /* Profile 19. */ + { 240, 255 }, /* Profile 20. */ + { 224, 239 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "IFP_IOAM_GBP_ACTION_3_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + { 392, 395 }, /* Profile 6. */ + { 392, 395 }, /* Profile 7. */ + { 392, 395 }, /* Profile 8. */ + { 392, 395 }, /* Profile 9. */ + { 392, 395 }, /* Profile 10. */ + { 392, 395 }, /* Profile 11. */ + { 392, 395 }, /* Profile 12. */ + { 392, 395 }, /* Profile 13. */ + { 392, 395 }, /* Profile 14. */ + { 392, 395 }, /* Profile 15. */ + { 392, 395 }, /* Profile 16. */ + { 392, 395 }, /* Profile 17. */ + { 392, 395 }, /* Profile 18. */ + { 392, 395 }, /* Profile 19. */ + { 392, 395 }, /* Profile 20. */ + { 392, 395 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 239 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 208, 223 }, /* Profile 5. */ + { 224, 239 }, /* Profile 6. */ + { 224, 239 }, /* Profile 7. */ + { 208, 223 }, /* Profile 8. */ + { 208, 223 }, /* Profile 9. */ + { 224, 239 }, /* Profile 10. */ + { 208, 223 }, /* Profile 11. */ + { 224, 239 }, /* Profile 12. */ + { 224, 239 }, /* Profile 13. */ + { 208, 223 }, /* Profile 14. */ + { 208, 223 }, /* Profile 15. */ + { 224, 239 }, /* Profile 16. */ + { 224, 239 }, /* Profile 17. */ + { 208, 223 }, /* Profile 18. */ + { 208, 223 }, /* Profile 19. */ + { 224, 239 }, /* Profile 20. */ + { 208, 223 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + { 400, 403 }, /* Profile 6. */ + { 400, 403 }, /* Profile 7. */ + { 400, 403 }, /* Profile 8. */ + { 400, 403 }, /* Profile 9. */ + { 400, 403 }, /* Profile 10. */ + { 400, 403 }, /* Profile 11. */ + { 400, 403 }, /* Profile 12. */ + { 400, 403 }, /* Profile 13. */ + { 400, 403 }, /* Profile 14. */ + { 400, 403 }, /* Profile 15. */ + { 400, 403 }, /* Profile 16. */ + { 400, 403 }, /* Profile 17. */ + { 400, 403 }, /* Profile 18. */ + { 400, 403 }, /* Profile 19. */ + { 400, 403 }, /* Profile 20. */ + { 400, 403 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "ING_TIMESTAMP_15_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 256, 271 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 240, 255 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 256, 271 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 240, 255 }, /* Profile 9. */ + { 256, 271 }, /* Profile 10. */ + { 240, 255 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 256, 271 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { 240, 255 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { 256, 271 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 240, 255 }, /* Profile 19. */ + { 256, 271 }, /* Profile 20. */ + { 240, 255 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "ING_TIMESTAMP_31_16", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 256, 271 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 272, 287 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 256, 271 }, /* Profile 9. */ + { 272, 287 }, /* Profile 10. */ + { 256, 271 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 272, 287 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { 256, 271 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { 272, 287 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 256, 271 }, /* Profile 19. */ + { 272, 287 }, /* Profile 20. */ + { 256, 271 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "INGRESS_PP_PORT_7_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 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{ 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 96, 111 }, /* Profile 7. */ + { 96, 111 }, /* Profile 8. */ + { 96, 111 }, /* Profile 9. */ + { 96, 111 }, /* Profile 10. */ + { 96, 111 }, /* Profile 11. */ + { 96, 111 }, /* Profile 12. */ + { 96, 111 }, /* Profile 13. */ + { 96, 111 }, /* Profile 14. */ + { 96, 111 }, /* Profile 15. */ + { 96, 111 }, /* Profile 16. */ + { 96, 111 }, /* Profile 17. */ + { 96, 111 }, /* Profile 18. */ + { 96, 111 }, /* Profile 19. */ + { 96, 111 }, /* Profile 20. */ + { 96, 111 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 428, 431 }, /* Profile 2. */ + { 428, 431 }, /* Profile 3. */ + { 428, 431 }, /* Profile 4. */ + { 428, 431 }, /* Profile 5. */ + { 428, 431 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416, 419 }, /* Profile 10. */ + { 416, 419 }, /* Profile 11. */ + { 416, 419 }, /* Profile 12. */ + { 416, 419 }, /* Profile 13. */ + { 416, 419 }, /* Profile 14. */ + { 416, 419 }, /* Profile 15. */ + { 416, 419 }, /* Profile 16. */ + { 416, 419 }, /* Profile 17. */ + { 416, 419 }, /* Profile 18. */ + { 416, 419 }, /* Profile 19. */ + { 416, 419 }, /* Profile 20. */ + { 416, 419 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 170 }, /* Profile 2. */ + { 160, 170 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 160, 170 }, /* Profile 6. */ + { 160, 170 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 160, 170 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 160, 170 }, /* Profile 12. */ + { 160, 170 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 160, 170 }, /* Profile 16. */ + { 160, 170 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { 160, 170 }, /* Profile 20. */ + }, + .profile_cnt = 21, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 336, 346 }, /* Profile 4. */ + { 336, 346 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 336, 346 }, /* Profile 8. */ + { 336, 346 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { 336, 346 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 336, 346 }, /* Profile 14. */ + { 336, 346 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 336, 346 }, /* Profile 18. */ + { 336, 346 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { 336, 346 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 333 }, /* Profile 2. */ + { 320, 333 }, /* Profile 3. */ + { 304, 317 }, /* Profile 4. */ + { 304, 317 }, /* Profile 5. */ + { 320, 333 }, /* Profile 6. */ + { 320, 333 }, /* Profile 7. */ + { 304, 317 }, /* Profile 8. */ + { 304, 317 }, /* Profile 9. */ + { 320, 333 }, /* Profile 10. */ + { 304, 317 }, /* Profile 11. */ + { 320, 333 }, /* Profile 12. */ + { 320, 333 }, /* Profile 13. */ + { 304, 317 }, /* Profile 14. */ + { 304, 317 }, /* Profile 15. */ + { 320, 333 }, /* Profile 16. */ + { 320, 333 }, /* Profile 17. */ + { 304, 317 }, /* Profile 18. */ + { 304, 317 }, /* Profile 19. */ + { 320, 333 }, /* Profile 20. */ + { 304, 317 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 365 }, /* Profile 2. */ + { 352, 365 }, /* Profile 3. */ + { 352, 365 }, /* Profile 4. */ + { 352, 365 }, /* Profile 5. */ + { 352, 365 }, /* Profile 6. */ + { 352, 365 }, /* Profile 7. */ + { 352, 365 }, /* Profile 8. */ + { 352, 365 }, /* Profile 9. */ + { 352, 365 }, /* Profile 10. */ + { 352, 365 }, /* Profile 11. */ + { 352, 365 }, /* Profile 12. */ + { 352, 365 }, /* Profile 13. */ + { 352, 365 }, /* Profile 14. */ + { 352, 365 }, /* Profile 15. */ + { 352, 365 }, /* Profile 16. */ + { 352, 365 }, /* Profile 17. */ + { 352, 365 }, /* Profile 18. */ + { 352, 365 }, /* Profile 19. */ + { 352, 365 }, /* Profile 20. */ + { 352, 365 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + { 144, 159 }, /* Profile 6. */ + { 144, 159 }, /* Profile 7. */ + { 144, 159 }, /* Profile 8. */ + { 144, 159 }, /* Profile 9. */ + { 144, 159 }, /* Profile 10. */ + { 144, 159 }, /* Profile 11. */ + { 144, 159 }, /* Profile 12. */ + { 144, 159 }, /* Profile 13. */ + { 144, 159 }, /* Profile 14. */ + { 144, 159 }, /* Profile 15. */ + { 144, 159 }, /* Profile 16. */ + { 144, 159 }, /* Profile 17. */ + { 144, 159 }, /* Profile 18. */ + { 144, 159 }, /* Profile 19. */ + { 144, 159 }, /* Profile 20. */ + { 144, 159 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "NHOP_INDEX_1_15_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 319 }, /* Profile 2. */ + { 304, 319 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + { 304, 319 }, /* Profile 6. */ + { 304, 319 }, /* Profile 7. */ + { 288, 303 }, /* Profile 8. */ + { 288, 303 }, /* Profile 9. */ + { 304, 319 }, /* Profile 10. */ + { 288, 303 }, /* Profile 11. */ + { 304, 319 }, /* Profile 12. */ + { 304, 319 }, /* Profile 13. */ + { 288, 303 }, /* Profile 14. */ + { 288, 303 }, /* Profile 15. */ + { 304, 319 }, /* Profile 16. */ + { 304, 319 }, /* Profile 17. */ + { 288, 303 }, /* Profile 18. */ + { 288, 303 }, /* Profile 19. */ + { 304, 319 }, /* Profile 20. */ + { 288, 303 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 79 }, /* Profile 2. */ + { 64, 79 }, /* Profile 3. */ + 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420, 423 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + { 192, 207 }, /* Profile 6. */ + { 192, 207 }, /* Profile 7. */ + { 176, 191 }, /* Profile 8. */ + { 176, 191 }, /* Profile 9. */ + { 192, 207 }, /* Profile 10. */ + { 176, 191 }, /* Profile 11. */ + { 192, 207 }, /* Profile 12. */ + { 192, 207 }, /* Profile 13. */ + { 176, 191 }, /* Profile 14. */ + { 176, 191 }, /* Profile 15. */ + { 192, 207 }, /* Profile 16. */ + { 192, 207 }, /* Profile 17. */ + { 176, 191 }, /* Profile 18. */ + { 176, 191 }, /* Profile 19. */ + { 192, 207 }, /* Profile 20. */ + { 176, 191 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + { 412, 415 }, /* Profile 6. */ + { 412, 415 }, /* Profile 7. */ + { 412, 415 }, /* Profile 8. */ + { 412, 415 }, /* Profile 9. */ + { 412, 415 }, /* Profile 10. */ + { 412, 415 }, /* Profile 11. */ + { 412, 415 }, /* Profile 12. */ + { 412, 415 }, /* Profile 13. */ + { 412, 415 }, /* Profile 14. */ + { 412, 415 }, /* Profile 15. */ + { 412, 415 }, /* Profile 16. */ + { 412, 415 }, /* Profile 17. */ + { 412, 415 }, /* Profile 18. */ + { 412, 415 }, /* Profile 19. */ + { 412, 415 }, /* Profile 20. */ + { 412, 415 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + { 408, 411 }, /* Profile 6. */ + { 408, 411 }, /* Profile 7. */ + { 408, 411 }, /* Profile 8. */ + { 408, 411 }, /* Profile 9. */ + { 408, 411 }, /* Profile 10. */ + { 408, 411 }, /* Profile 11. */ + { 408, 411 }, /* Profile 12. */ + { 408, 411 }, /* Profile 13. */ + { 408, 411 }, /* Profile 14. */ + { 408, 411 }, /* Profile 15. */ + { 408, 411 }, /* Profile 16. */ + { 408, 411 }, /* Profile 17. */ + { 408, 411 }, /* Profile 18. */ + { 408, 411 }, /* Profile 19. */ + { 408, 411 }, /* Profile 20. */ + { 408, 411 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "VFI_15_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + { 336, 351 }, /* Profile 6. */ + { 336, 351 }, /* Profile 7. */ + { 320, 335 }, /* Profile 8. */ + { 320, 335 }, /* Profile 9. */ + { 336, 351 }, /* Profile 10. */ + { 320, 335 }, /* Profile 11. */ + { 336, 351 }, /* Profile 12. */ + { 336, 351 }, /* Profile 13. */ + { 320, 335 }, /* Profile 14. */ + { 320, 335 }, /* Profile 15. */ + { 336, 351 }, /* Profile 16. */ + { 336, 351 }, /* Profile 17. */ + { 320, 335 }, /* Profile 18. */ + { 320, 335 }, /* Profile 19. */ + { 336, 351 }, /* Profile 20. */ + { 320, 335 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", + .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + { 388, 391 }, /* Profile 6. */ + { 388, 391 }, /* Profile 7. */ + { 388, 391 }, /* Profile 8. */ + { 388, 391 }, /* Profile 9. */ + { 388, 391 }, /* Profile 10. */ + { 388, 391 }, /* Profile 11. */ + { 388, 391 }, /* Profile 12. */ + { 388, 391 }, /* Profile 13. */ + { 388, 391 }, /* Profile 14. */ + { 388, 391 }, /* Profile 15. */ + { 388, 391 }, /* Profile 16. */ + { 388, 391 }, /* Profile 17. */ + { 388, 391 }, /* Profile 18. */ + { 388, 391 }, /* Profile 19. */ + { 388, 391 }, /* Profile 20. */ + { 388, 391 }, /* Profile 21. */ + }, + .profile_cnt = 22, + }, +};static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_names[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reasons_info = { + .num_reasons = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_names, + .reason_encode = bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_encode, + .reason_decode = bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_arp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_arp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_arp_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_arp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_authen_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_authen_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_authen_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_authen_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_bfd_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_bfd_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_bfd_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_bfd_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_cntag_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_cntag_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_cntag_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_cntag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_dest_option_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_dest_option_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_dest_option_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_dest_option_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_esp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_esp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_esp_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_esp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_esp_t_field_data, +}; + + +static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_etag_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_get, + bcmpkt_etag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_etag_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_set, + bcmpkt_etag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_etag_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_etag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_etag_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ethertype_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ethertype_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ethertype_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ethertype_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_frag_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_frag_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_frag_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_frag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_frag_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gpe_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gpe_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gpe_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gpe_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gre_key_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gre_key_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gre_key_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gre_key_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gre_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gre_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gre_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gre_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_gre_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_icmp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_icmp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_icmp_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_icmp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 24); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 2); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 2, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 6); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 6, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_get, + bcmpkt_ifa_flex_md_0_b_t_port_speed_get, + bcmpkt_ifa_flex_md_0_b_t_queue_id_get, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_set, + bcmpkt_ifa_flex_md_0_b_t_port_speed_set, + bcmpkt_ifa_flex_md_0_b_t_queue_id_set, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_get, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_set, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_get, + bcmpkt_ifa_md_base_t_hop_limit_current_length_get, + bcmpkt_ifa_md_base_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_set, + bcmpkt_ifa_md_base_t_hop_limit_current_length_set, + bcmpkt_ifa_md_base_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_get, + bcmpkt_ifa_metadata_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_t_metadata_get, + bcmpkt_ifa_metadata_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_set, + bcmpkt_ifa_metadata_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_t_metadata_set, + bcmpkt_ifa_metadata_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_igmp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_igmp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_igmp_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_igmp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ipfix_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ipfix_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ipfix_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ipfix_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ipv4_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ipv4_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ipv4_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ipv4_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ipv6_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ipv6_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ipv6_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ipv6_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_l2_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_l2_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_l2_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_l2_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mpls_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mpls_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mpls_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mpls_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_p_1588_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_p_1588_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_p_1588_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_p_1588_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_rarp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_rarp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rarp_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_rarp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_routing_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_routing_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_routing_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_routing_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_rspan_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_rspan_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rspan_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_rspan_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_rspan_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_svtag_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_get, + bcmpkt_svtag_t_data_upr_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_svtag_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_set, + bcmpkt_svtag_t_data_upr_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_svtag_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_svtag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_svtag_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_udp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_udp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_udp_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_udp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_vlan_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_vlan_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_vlan_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_vlan_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_vntag_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_get, + bcmpkt_vntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_vntag_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_set, + bcmpkt_vntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_vntag_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_vntag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_vntag_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_vxlan_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_vxlan_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_vxlan_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_vxlan_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_wesp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_wesp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_wesp_t_field_data[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_wesp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_29_2_1_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56780_a0_hna_6_5_29_2_1_flexhdr_info_list[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_arp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_authen_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_bfd_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_cntag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_dest_option_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_esp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_etag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_etag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_etag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ethertype_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_frag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gpe_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gre_key_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gre_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_icmp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_igmp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ipfix_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ipv4_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ipv6_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_l2_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mpls_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_p_1588_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_rarp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_routing_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_rspan_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_svtag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_svtag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_svtag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_udp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_vlan_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_vntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_vntag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_vntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_vxlan_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_29_2_1_wesp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_29_2_1_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_info, + .reasons_info = &bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56780_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56780_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56780_a0_hna_6_5_29_2_1_flexhdr_id_map[] = { + BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56780_a0_hna_6_5_29_2_1_flexhdr_map_get(void) +{ + return bcm56780_a0_hna_6_5_29_2_1_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56780_a0_hna_6_5_29_2_1_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56780_a0_hna_6_5_29_2_1_flexhdr_info_list[hid]; +} + +int bcm56780_a0_hna_6_5_29_2_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 14, + -1, + -1, + 66, +}; \ No newline at end of file diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..9830ad007bfb --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,2508 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_ina_2_6_11_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant ina_2_6_11_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db[BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x1000, + .match_mask = 0x3806, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1a0, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x418, + .match_mask = 0x638, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x626, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x180, + .match_mask = 0x1a0, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x620, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x1004, + .match_mask = 0x3826, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x6, + .match_mask = 0x26, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x206, + .match_mask = 0x626, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x806, + .match_mask = 0x3826, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x100, + .match_mask = 0x1a0, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x1800, + .match_mask = 0x3806, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x410, + .match_mask = 0x638, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x10, + .match_mask = 0x38, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x18, + .match_mask = 0x38, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x22, + .match_mask = 0x22, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x24, + .match_mask = 0x24, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x28, + .match_mask = 0x28, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x30, + .match_mask = 0x30, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0xa0, + .match_mask = 0xa0, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x120, + .match_mask = 0x120, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x220, + .match_mask = 0x220, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3806, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x2, + .match_mask = 0x26, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x42, + .match_mask = 0x66, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x4, + .match_mask = 0x26, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x8, + .match_mask = 0x38, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x1804, + .match_mask = 0x3826, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x804, + .match_mask = 0x3826, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x1000, + .match_mask = 0x3806, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1a0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x418, + .match_mask = 0x638, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x626, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x180, + .match_mask = 0x1a0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x620, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x1004, + .match_mask = 0x3826, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x6, + .match_mask = 0x26, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x206, + .match_mask = 0x626, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x806, + .match_mask = 0x3826, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x100, + .match_mask = 0x1a0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x1800, + .match_mask = 0x3806, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x410, + .match_mask = 0x638, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x10, + .match_mask = 0x38, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x18, + .match_mask = 0x38, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x22, + .match_mask = 0x22, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x24, + .match_mask = 0x24, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x28, + .match_mask = 0x28, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x30, + .match_mask = 0x30, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0xa0, + .match_mask = 0xa0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x120, + .match_mask = 0x120, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x220, + .match_mask = 0x220, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3806, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x2, + .match_mask = 0x26, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x42, + .match_mask = 0x66, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x4, + .match_mask = 0x26, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x8, + .match_mask = 0x38, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x1804, + .match_mask = 0x3826, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x804, + .match_mask = 0x3826, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 31, + .match_minbit = 24, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 31, + .pminbit = 24, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x1000, + .match_mask = 0x3806, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1a0, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x418, + .match_mask = 0x638, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x626, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x180, + .match_mask = 0x1a0, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x620, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x1800, + .match_mask = 0x3806, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x410, + .match_mask = 0x638, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x10, + .match_mask = 0x38, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x18, + .match_mask = 0x38, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3806, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x2, + .match_mask = 0x26, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x42, + .match_mask = 0x66, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x4, + .match_mask = 0x26, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x8, + .match_mask = 0x38, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x1804, + .match_mask = 0x3826, + .match_maxbit = 45, + .match_minbit = 32, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 45, + .pminbit = 32, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 9, + .match_minbit = 2, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 2, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x1000, + .match_mask = 0x3806, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1a0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x418, + .match_mask = 0x638, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x626, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x180, + .match_mask = 0x1a0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x620, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x1004, + .match_mask = 0x3826, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x6, + .match_mask = 0x26, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x206, + .match_mask = 0x626, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x806, + .match_mask = 0x3826, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x100, + .match_mask = 0x1a0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x1800, + .match_mask = 0x3806, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x410, + .match_mask = 0x638, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x10, + .match_mask = 0x38, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x18, + .match_mask = 0x38, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x22, + .match_mask = 0x22, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x24, + .match_mask = 0x24, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x28, + .match_mask = 0x28, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x30, + .match_mask = 0x30, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0xa0, + .match_mask = 0xa0, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x120, + .match_mask = 0x120, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x220, + .match_mask = 0x220, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3806, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x2, + .match_mask = 0x26, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x42, + .match_mask = 0x66, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x4, + .match_mask = 0x26, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x8, + .match_mask = 0x38, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x1804, + .match_mask = 0x3826, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x804, + .match_mask = 0x3826, + .match_maxbit = 23, + .match_minbit = 10, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 10, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db_info = { + .num_entries = 175, + .db = bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db_info_get(void) { + return &bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map_info = { + .num_entries = 175, + .map = bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map_info_get(void) { + return &bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_pkt_flexhdr.c new file mode 100644 index 000000000000..7ec04020eda1 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_pkt_flexhdr.c @@ -0,0 +1,8131 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56780_a0 and variant ina_2_6_11_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[13] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[13] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[13] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[13] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[13] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[13] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[13] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[13] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[13] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[13] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[13] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[13] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[13] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[13] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[13] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[13] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[13] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[13] |= (0x1 << 31); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_rxpmd_flex_field_data[] = { + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 80, 95 }, /* Profile 8. */ + { 80, 95 }, /* Profile 9. */ + { 80, 95 }, /* Profile 10. */ + { 80, 95 }, /* Profile 11. */ + { 80, 95 }, /* Profile 12. */ + { 80, 95 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + { 48, 63 }, /* Profile 8. */ + { 48, 63 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 48, 63 }, /* Profile 12. */ + { 48, 63 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "DVP_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 191 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + { 176, 191 }, /* Profile 6. */ + { 176, 191 }, /* Profile 7. */ + { 176, 191 }, /* Profile 8. */ + { 176, 191 }, /* Profile 9. */ + { 176, 191 }, /* Profile 10. */ + { 176, 191 }, /* Profile 11. */ + { 176, 191 }, /* Profile 12. */ + { 176, 191 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 103 }, /* Profile 2. */ + { 96, 103 }, /* Profile 3. */ + { 96, 103 }, /* Profile 4. */ + { 96, 103 }, /* Profile 5. */ + { 96, 103 }, /* Profile 6. */ + { 96, 103 }, /* Profile 7. */ + { 96, 103 }, /* Profile 8. */ + { 96, 103 }, /* Profile 9. */ + { 96, 103 }, /* Profile 10. */ + { 96, 103 }, /* Profile 11. */ + { 96, 103 }, /* Profile 12. */ + { 96, 103 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EGR_MTOP_INDEX_HI_3_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 371 }, /* Profile 2. */ + { 368, 371 }, /* Profile 3. */ + { 368, 371 }, /* Profile 4. */ + { 368, 371 }, /* Profile 5. */ + { 368, 371 }, /* Profile 6. */ + { 368, 371 }, /* Profile 7. */ + { 368, 371 }, /* Profile 8. */ + { 368, 371 }, /* Profile 9. */ + { 368, 371 }, /* Profile 10. */ + { 368, 371 }, /* Profile 11. */ + { 368, 371 }, /* Profile 12. */ + { 368, 371 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 48, 63 }, /* Profile 10. */ + { 48, 63 }, /* Profile 11. */ + }, + .profile_cnt = 12, + }, + { + .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 80, 95 }, /* Profile 2. */ + { 80, 95 }, /* Profile 3. */ + { 80, 95 }, /* Profile 4. */ + { 80, 95 }, /* Profile 5. */ + { 80, 95 }, /* Profile 6. */ + { 80, 95 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + { 408, 411 }, /* Profile 6. */ + { 408, 411 }, /* Profile 7. */ + { 408, 411 }, /* Profile 8. */ + { 408, 411 }, /* Profile 9. */ + { 408, 411 }, /* Profile 10. */ + { 408, 411 }, /* Profile 11. */ + { 408, 411 }, /* Profile 12. */ + { 408, 411 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + { 112, 127 }, /* Profile 6. */ + { 112, 127 }, /* Profile 7. */ + { 112, 127 }, /* Profile 8. */ + { 112, 127 }, /* Profile 9. */ + { 112, 127 }, /* Profile 10. */ + { 112, 127 }, /* Profile 11. */ + { 112, 127 }, /* Profile 12. */ + { 112, 127 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 287 }, /* Profile 2. */ + { 256, 271 }, /* Profile 3. */ + { 272, 287 }, /* Profile 4. */ + { 256, 271 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 272, 287 }, /* Profile 8. */ + { 256, 271 }, /* Profile 9. */ + { 272, 287 }, /* Profile 10. */ + { 256, 271 }, /* Profile 11. */ + }, + .profile_cnt = 12, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 272, 287 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 288, 303 }, /* Profile 8. */ + { 272, 287 }, /* Profile 9. */ + { 288, 303 }, /* Profile 10. */ + { 272, 287 }, /* Profile 11. */ + }, + .profile_cnt = 12, + }, + { + .name = "EVENT_TRACE_VECTOR_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + { 0, 15 }, /* Profile 5. */ + { 0, 15 }, /* Profile 6. */ + { 0, 15 }, /* Profile 7. */ + { 0, 15 }, /* Profile 8. */ + { 0, 15 }, /* Profile 9. */ + { 0, 15 }, /* Profile 10. */ + { 0, 15 }, /* Profile 11. */ + { 0, 15 }, /* Profile 12. */ + { 0, 15 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EVENT_TRACE_VECTOR_31_16", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 16, 31 }, /* Profile 2. */ + { 16, 31 }, /* Profile 3. */ + { 16, 31 }, /* Profile 4. */ + { 16, 31 }, /* Profile 5. */ + { 16, 31 }, /* Profile 6. */ + { 16, 31 }, /* Profile 7. */ + { 16, 31 }, /* Profile 8. */ + { 16, 31 }, /* Profile 9. */ + { 16, 31 }, /* Profile 10. */ + { 16, 31 }, /* Profile 11. */ + { 16, 31 }, /* Profile 12. */ + { 16, 31 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + { 32, 47 }, /* Profile 6. */ + { 32, 47 }, /* Profile 7. */ + { 32, 47 }, /* Profile 8. */ + { 32, 47 }, /* Profile 9. */ + { 32, 47 }, /* Profile 10. */ + { 32, 47 }, /* Profile 11. */ + { 32, 47 }, /* Profile 12. */ + { 32, 47 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 271 }, /* Profile 2. */ + { 240, 255 }, /* Profile 3. */ + { 256, 271 }, /* Profile 4. */ + { 240, 255 }, /* Profile 5. */ + { 256, 271 }, /* Profile 6. */ + { 240, 255 }, /* Profile 7. */ + { 256, 271 }, /* Profile 8. */ + { 240, 255 }, /* Profile 9. */ + { 256, 271 }, /* Profile 10. */ + { 240, 255 }, /* Profile 11. */ + { 256, 271 }, /* Profile 12. */ + { 240, 255 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "IFP_IOAM_GBP_ACTION_3_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 372, 375 }, /* Profile 2. */ + { 372, 375 }, /* Profile 3. */ + { 372, 375 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + { 372, 375 }, /* Profile 6. */ + { 372, 375 }, /* Profile 7. */ + { 372, 375 }, /* Profile 8. */ + { 372, 375 }, /* Profile 9. */ + { 372, 375 }, /* Profile 10. */ + { 372, 375 }, /* Profile 11. */ + { 372, 375 }, /* Profile 12. */ + { 372, 375 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 376, 379 }, /* Profile 2. */ + { 376, 379 }, /* Profile 3. */ + { 376, 379 }, /* Profile 4. */ + { 376, 379 }, /* Profile 5. */ + { 376, 379 }, /* Profile 6. */ + { 376, 379 }, /* Profile 7. */ + { 376, 379 }, /* Profile 8. */ + { 376, 379 }, /* Profile 9. */ + { 376, 379 }, /* Profile 10. */ + { 376, 379 }, /* Profile 11. */ + { 376, 379 }, /* Profile 12. */ + { 376, 379 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "ING_TIMESTAMP_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 272, 287 }, /* Profile 6. */ + { 256, 271 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 272, 287 }, /* Profile 12. */ + { 256, 271 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "ING_TIMESTAMP_31_16", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 288, 303 }, /* Profile 6. */ + { 272, 287 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 288, 303 }, /* Profile 12. */ + { 272, 287 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "INGRESS_PP_PORT_7_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 247 }, /* Profile 2. */ + { 224, 231 }, /* Profile 3. */ + { 240, 247 }, /* Profile 4. */ + { 224, 231 }, /* Profile 5. */ + { 240, 247 }, /* Profile 6. */ + { 224, 231 }, /* Profile 7. */ + { 240, 247 }, /* Profile 8. */ + { 224, 231 }, /* Profile 9. */ + { 240, 247 }, /* Profile 10. */ + { 224, 231 }, /* Profile 11. */ + { 240, 247 }, /* Profile 12. */ + { 224, 231 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 319 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 304, 319 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + { 304, 319 }, /* Profile 6. */ + { 288, 303 }, /* Profile 7. */ + { 304, 319 }, /* Profile 8. */ + { 288, 303 }, /* Profile 9. */ + { 304, 319 }, /* Profile 10. */ + { 288, 303 }, /* Profile 11. */ + { 304, 319 }, /* Profile 12. */ + { 288, 303 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + { 384, 387 }, /* Profile 6. */ + { 384, 387 }, /* Profile 7. */ + { 384, 387 }, /* Profile 8. */ + { 384, 387 }, /* Profile 9. */ + { 384, 387 }, /* Profile 10. */ + { 384, 387 }, /* Profile 11. */ + { 384, 387 }, /* Profile 12. */ + { 384, 387 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + { 400, 403 }, /* Profile 6. */ + { 400, 403 }, /* Profile 7. */ + { 400, 403 }, /* Profile 8. */ + { 400, 403 }, /* Profile 9. */ + { 400, 403 }, /* Profile 10. */ + { 400, 403 }, /* Profile 11. */ + { 400, 403 }, /* Profile 12. */ + { 400, 403 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 218 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 208, 218 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 208, 218 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 208, 218 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 208, 218 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 208, 218 }, /* Profile 12. */ + }, + .profile_cnt = 13, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 336, 346 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 336, 346 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 336, 346 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 336, 346 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { 336, 346 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 336, 346 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 237 }, /* Profile 2. */ + { 208, 221 }, /* Profile 3. */ + { 224, 237 }, /* Profile 4. */ + { 208, 221 }, /* Profile 5. */ + { 224, 237 }, /* Profile 6. */ + { 208, 221 }, /* Profile 7. */ + { 224, 237 }, /* Profile 8. */ + { 208, 221 }, /* Profile 9. */ + { 224, 237 }, /* Profile 10. */ + { 208, 221 }, /* Profile 11. */ + { 224, 237 }, /* Profile 12. */ + { 208, 221 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 365 }, /* Profile 2. */ + { 352, 365 }, /* Profile 3. */ + { 352, 365 }, /* Profile 4. */ + { 352, 365 }, /* Profile 5. */ + { 352, 365 }, /* Profile 6. */ + { 352, 365 }, /* Profile 7. */ + { 352, 365 }, /* Profile 8. */ + { 352, 365 }, /* Profile 9. */ + { 352, 365 }, /* Profile 10. */ + { 352, 365 }, /* Profile 11. */ + { 352, 365 }, /* Profile 12. */ + { 352, 365 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + { 192, 207 }, /* Profile 6. */ + { 192, 207 }, /* Profile 7. */ + { 192, 207 }, /* Profile 8. */ + { 192, 207 }, /* Profile 9. */ + { 192, 207 }, /* Profile 10. */ + { 192, 207 }, /* Profile 11. */ + { 192, 207 }, /* Profile 12. */ + { 192, 207 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "NHOP_INDEX_1_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { 128, 143 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ + { 128, 143 }, /* Profile 8. */ + { 128, 143 }, /* Profile 9. */ + { 128, 143 }, /* Profile 10. */ + { 128, 143 }, /* Profile 11. */ + { 128, 143 }, /* Profile 12. */ + { 128, 143 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 79 }, /* Profile 2. */ + { 64, 79 }, /* Profile 3. */ + { 64, 79 }, /* Profile 4. */ + { 64, 79 }, /* Profile 5. */ + { 64, 79 }, /* Profile 6. */ + { 64, 79 }, /* Profile 7. */ + { 64, 79 }, /* Profile 8. */ + { 64, 79 }, /* Profile 9. */ + { 64, 79 }, /* Profile 10. */ + { 64, 79 }, /* Profile 11. */ + { 64, 79 }, /* Profile 12. */ + { 64, 79 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + { 412, 415 }, /* Profile 6. */ + { 412, 415 }, /* Profile 7. */ + { 412, 415 }, /* Profile 8. */ + { 412, 415 }, /* Profile 9. */ + { 412, 415 }, /* Profile 10. */ + { 412, 415 }, /* Profile 11. */ + { 412, 415 }, /* Profile 12. */ + { 412, 415 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "SVP_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 304, 319 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 304, 319 }, /* Profile 5. */ + { 320, 335 }, /* Profile 6. */ + { 304, 319 }, /* Profile 7. */ + { 320, 335 }, /* Profile 8. */ + { 304, 319 }, /* Profile 9. */ + { 320, 335 }, /* Profile 10. */ + { 304, 319 }, /* Profile 11. */ + { 320, 335 }, /* Profile 12. */ + { 304, 319 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 380, 383 }, /* Profile 2. */ + { 380, 383 }, /* Profile 3. */ + { 380, 383 }, /* Profile 4. */ + { 380, 383 }, /* Profile 5. */ + { 380, 383 }, /* Profile 6. */ + { 380, 383 }, /* Profile 7. */ + { 380, 383 }, /* Profile 8. */ + { 380, 383 }, /* Profile 9. */ + { 380, 383 }, /* Profile 10. */ + { 380, 383 }, /* Profile 11. */ + { 380, 383 }, /* Profile 12. */ + { 380, 383 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 175 }, /* Profile 2. */ + { 160, 175 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { 160, 175 }, /* Profile 5. */ + { 160, 175 }, /* Profile 6. */ + { 160, 175 }, /* Profile 7. */ + { 160, 175 }, /* Profile 8. */ + { 160, 175 }, /* Profile 9. */ + { 160, 175 }, /* Profile 10. */ + { 160, 175 }, /* Profile 11. */ + { 160, 175 }, /* Profile 12. */ + { 160, 175 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + { 404, 407 }, /* Profile 6. */ + { 404, 407 }, /* Profile 7. */ + { 404, 407 }, /* Profile 8. */ + { 404, 407 }, /* Profile 9. */ + { 404, 407 }, /* Profile 10. */ + { 404, 407 }, /* Profile 11. */ + { 404, 407 }, /* Profile 12. */ + { 404, 407 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + { 144, 159 }, /* Profile 6. */ + { 144, 159 }, /* Profile 7. */ + { 144, 159 }, /* Profile 8. */ + { 144, 159 }, /* Profile 9. */ + { 144, 159 }, /* Profile 10. */ + { 144, 159 }, /* Profile 11. */ + { 144, 159 }, /* Profile 12. */ + { 144, 159 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + { 388, 391 }, /* Profile 6. */ + { 388, 391 }, /* Profile 7. */ + { 388, 391 }, /* Profile 8. */ + { 388, 391 }, /* Profile 9. */ + { 388, 391 }, /* Profile 10. */ + { 388, 391 }, /* Profile 11. */ + { 388, 391 }, /* Profile 12. */ + { 388, 391 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + { 392, 395 }, /* Profile 6. */ + { 392, 395 }, /* Profile 7. */ + { 392, 395 }, /* Profile 8. */ + { 392, 395 }, /* Profile 9. */ + { 392, 395 }, /* Profile 10. */ + { 392, 395 }, /* Profile 11. */ + { 392, 395 }, /* Profile 12. */ + { 392, 395 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "VFI_15_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + { 336, 351 }, /* Profile 6. */ + { 320, 335 }, /* Profile 7. */ + { 336, 351 }, /* Profile 8. */ + { 320, 335 }, /* Profile 9. */ + { 336, 351 }, /* Profile 10. */ + { 320, 335 }, /* Profile 11. */ + { 336, 351 }, /* Profile 12. */ + { 320, 335 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0", + .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 397 }, /* Profile 2. */ + { 396, 397 }, /* Profile 3. */ + { 396, 397 }, /* Profile 4. */ + { 396, 397 }, /* Profile 5. */ + { 396, 397 }, /* Profile 6. */ + { 396, 397 }, /* Profile 7. */ + { 396, 397 }, /* Profile 8. */ + { 396, 397 }, /* Profile 9. */ + { 396, 397 }, /* Profile 10. */ + { 396, 397 }, /* Profile 11. */ + { 396, 397 }, /* Profile 12. */ + { 396, 397 }, /* Profile 13. */ + }, + .profile_cnt = 14, + }, +};static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_rxpmd_flex_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_names[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_names, + .reason_encode = bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_arp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_arp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_arp_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_arp_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_authen_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_authen_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_authen_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_authen_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_bfd_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_bfd_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_bfd_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_bfd_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_cntag_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_cntag_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_cntag_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_cntag_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_dest_option_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_dest_option_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_dest_option_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_dest_option_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_esp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_esp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_esp_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_esp_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_esp_t_field_data, +}; + + +static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_etag_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_get, + bcmpkt_etag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_etag_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_set, + bcmpkt_etag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_etag_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_etag_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_etag_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ethertype_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ethertype_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ethertype_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ethertype_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_frag_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_frag_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_frag_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_frag_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_frag_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_generic_loopback_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_generic_loopback_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_generic_loopback_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_generic_loopback_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gpe_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gpe_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gpe_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gpe_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gre_chksum_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gre_chksum_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gre_chksum_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gre_chksum_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gre_key_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gre_key_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gre_key_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gre_key_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gre_rout_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gre_rout_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gre_rout_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gre_rout_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gre_seq_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gre_seq_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gre_seq_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gre_seq_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gre_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gre_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gre_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gre_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_gre_t_field_data, +}; + + +static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 4, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 4, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 6, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 6, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 31, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 10); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 10, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 15, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 15, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 4); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 2, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_hg3_base_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_get, + bcmpkt_hg3_base_t_cng_get, + bcmpkt_hg3_base_t_entropy_get, + bcmpkt_hg3_base_t_ext_hdr_present_get, + bcmpkt_hg3_base_t_hg3_reserved_get, + bcmpkt_hg3_base_t_l3_routed_get, + bcmpkt_hg3_base_t_mirror_copy_get, + bcmpkt_hg3_base_t_reserved_etype_get, + bcmpkt_hg3_base_t_system_destination_get, + bcmpkt_hg3_base_t_system_destination_type_get, + bcmpkt_hg3_base_t_system_source_get, + bcmpkt_hg3_base_t_tc_get, + bcmpkt_hg3_base_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_hg3_base_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_set, + bcmpkt_hg3_base_t_cng_set, + bcmpkt_hg3_base_t_entropy_set, + bcmpkt_hg3_base_t_ext_hdr_present_set, + bcmpkt_hg3_base_t_hg3_reserved_set, + bcmpkt_hg3_base_t_l3_routed_set, + bcmpkt_hg3_base_t_mirror_copy_set, + bcmpkt_hg3_base_t_reserved_etype_set, + bcmpkt_hg3_base_t_system_destination_set, + bcmpkt_hg3_base_t_system_destination_type_set, + bcmpkt_hg3_base_t_system_source_set, + bcmpkt_hg3_base_t_tc_set, + bcmpkt_hg3_base_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_hg3_base_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_hg3_base_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_hg3_base_t_field_data, +}; + + +static int32_t bcmpkt_hg3_extension_0_t_class_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_get, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, + bcmpkt_hg3_extension_0_t_flags_get, + bcmpkt_hg3_extension_0_t_forwarding_domain_get, + bcmpkt_hg3_extension_0_t_svp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_set, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, + bcmpkt_hg3_extension_0_t_flags_set, + bcmpkt_hg3_extension_0_t_forwarding_domain_set, + bcmpkt_hg3_extension_0_t_svp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_icmp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_icmp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_icmp_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_icmp_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_1_raw_hdr_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_1_raw_hdr_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FID_COUNT] = { + bcmpkt_ifa_1_raw_hdr_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FID_COUNT] = { + bcmpkt_ifa_1_raw_hdr_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_cur_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[5], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_cur_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[5], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_rsvd_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_rsvd_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_hop_limit_hop_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_hop_limit_hop_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[5], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[5], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_metadata_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_probe_marker_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_probe_marker_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_probe_marker_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_probe_marker_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_rsvd_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_rsvd_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_sender_handle_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[6], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_sender_handle_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[6], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_sequence_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[6], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_sequence_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[6], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ifa_header_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_action_vector_get, + bcmpkt_ifa_header_t_cur_length_get, + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_flags_rsvd_get, + bcmpkt_ifa_header_t_hop_limit_hop_count_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_metadata_get, + bcmpkt_ifa_header_t_msg_type_get, + bcmpkt_ifa_header_t_probe_marker_0_get, + bcmpkt_ifa_header_t_probe_marker_1_get, + bcmpkt_ifa_header_t_request_vector_get, + bcmpkt_ifa_header_t_rsvd_0_get, + bcmpkt_ifa_header_t_sender_handle_get, + bcmpkt_ifa_header_t_sequence_number_get, + bcmpkt_ifa_header_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ifa_header_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_action_vector_set, + bcmpkt_ifa_header_t_cur_length_set, + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_flags_rsvd_set, + bcmpkt_ifa_header_t_hop_limit_hop_count_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_metadata_set, + bcmpkt_ifa_header_t_msg_type_set, + bcmpkt_ifa_header_t_probe_marker_0_set, + bcmpkt_ifa_header_t_probe_marker_1_set, + bcmpkt_ifa_header_t_request_vector_set, + bcmpkt_ifa_header_t_rsvd_0_set, + bcmpkt_ifa_header_t_sender_handle_set, + bcmpkt_ifa_header_t_sequence_number_set, + bcmpkt_ifa_header_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ifa_header_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ifa_header_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_igmp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_igmp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_igmp_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_igmp_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ipfix_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ipfix_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ipfix_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ipfix_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ipv4_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ipv4_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ipv4_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ipv4_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ipv6_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ipv6_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ipv6_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ipv6_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_l2_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_l2_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_l2_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_l2_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mirror_transport_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mirror_transport_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mirror_transport_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mirror_transport_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mpls_ach_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mpls_ach_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mpls_ach_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mpls_ach_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mpls_bv_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mpls_bv_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mpls_bv_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mpls_bv_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mpls_cw_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mpls_cw_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mpls_cw_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mpls_cw_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mpls_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mpls_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mpls_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mpls_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_p_1588_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_p_1588_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_p_1588_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_p_1588_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_psamp_0_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_psamp_0_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_psamp_0_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_psamp_0_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_psamp_1_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_psamp_1_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_psamp_1_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_psamp_1_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get, + bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set, + bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_rarp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_rarp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_rarp_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_rarp_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_routing_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_routing_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_routing_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_routing_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_rspan_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_rspan_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_rspan_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_rspan_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_rspan_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_snap_llc_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_snap_llc_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_snap_llc_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_snap_llc_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_udp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_udp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_udp_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_udp_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_unknown_l3_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_unknown_l3_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_unknown_l3_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_unknown_l3_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_unknown_l4_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_unknown_l4_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_unknown_l4_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_unknown_l4_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_unknown_l5_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_unknown_l5_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_unknown_l5_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_unknown_l5_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_vlan_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_vlan_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_vlan_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_vlan_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_vntag_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_get, + bcmpkt_vntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_vntag_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_set, + bcmpkt_vntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_vntag_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_vntag_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_vntag_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_vxlan_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_vxlan_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_vxlan_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_vxlan_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_wesp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_wesp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_wesp_t_field_data[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_wesp_t_field_info = { + .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56780_a0_ina_2_6_11_0_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56780_a0_ina_2_6_11_0_flexhdr_info_list[BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_arp_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_authen_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_bfd_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_cntag_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_dest_option_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_esp_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_etag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_etag_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_etag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_ethertype_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_frag_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_generic_loopback_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_gpe_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_gre_chksum_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_gre_key_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_gre_rout_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_gre_seq_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_gre_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_hg3_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_hg3_base_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_hg3_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_icmp_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_ifa_header_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_igmp_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_ipfix_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_ipv4_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_ipv6_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_l2_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_mirror_transport_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_mpls_ach_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_mpls_bv_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_mpls_cw_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_mpls_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_p_1588_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_psamp_0_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_psamp_1_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_rarp_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_routing_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_rspan_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_snap_llc_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_udp_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_unknown_l3_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_unknown_l4_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_unknown_l5_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_vlan_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_vntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_vntag_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_vntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_vxlan_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_ina_2_6_11_0_wesp_t_fget, + .flex_fset = bcm56780_a0_ina_2_6_11_0_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_ina_2_6_11_0_rxpmd_flex_field_info, + .reasons_info = &bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56780_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56780_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56780_a0_ina_2_6_11_0_flexhdr_id_map[] = { + BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56780_a0_ina_2_6_11_0_flexhdr_map_get(void) +{ + return bcm56780_a0_ina_2_6_11_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56780_a0_ina_2_6_11_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56780_a0_ina_2_6_11_0_flexhdr_info_list[hid]; +} + +int bcm56780_a0_ina_2_6_11_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 14, + 21, + 22, + 62, +}; \ No newline at end of file diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..6b99aee829c9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,1108 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_cna_6_5_29_sf_match_id_info.yml + * for device bcm56880_a0 and variant cna_6_5_29. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56880_a0_cna_6_5_29_rxpmd_match_id_db[BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 13, + .match_minbit = 11, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 35, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 13, + .match_minbit = 11, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 35, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 13, + .match_minbit = 11, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 37, + .pminbit = 35, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 13, + .match_minbit = 11, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 35, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 3, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 7, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 3, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 7, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 3, + .match_minbit = 1, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 9, + .pminbit = 7, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 3, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 9, + .pminbit = 7, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 13, + .match_minbit = 11, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 11, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 13, + .match_minbit = 11, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 11, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 13, + .match_minbit = 11, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 13, + .pminbit = 11, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 13, + .match_minbit = 11, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 11, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 14, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 14, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 14, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 14, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 14, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 20, + .pminbit = 14, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 14, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 14, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 14, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 14, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 14, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 14, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 20, + .match_minbit = 14, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 14, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 3, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 3, + .pminbit = 1, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 3, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 3, + .pminbit = 1, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 3, + .match_minbit = 1, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 3, + .pminbit = 1, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 3, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 3, + .pminbit = 1, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 4, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 4, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 10, + .pminbit = 4, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 4, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 10, + .pminbit = 4, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 10, + .pminbit = 4, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 4, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 10, + .pminbit = 4, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 4, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 10, + .pminbit = 4, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 10, + .pminbit = 4, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 10, + .pminbit = 4, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 10, + .pminbit = 4, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 10, + .match_minbit = 4, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 4, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_cna_6_5_29_rxpmd_match_id_db_info = { + .num_entries = 75, + .db = bcm56880_a0_cna_6_5_29_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void) { + return &bcm56880_a0_cna_6_5_29_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56880_a0_cna_6_5_29_rxpmd_match_id_map[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_cna_6_5_29_rxpmd_match_id_map_info = { + .num_entries = 75, + .map = bcm56880_a0_cna_6_5_29_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void) { + return &bcm56880_a0_cna_6_5_29_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_pkt_flexhdr.c new file mode 100644 index 000000000000..a5b46c58a295 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_pkt_flexhdr.c @@ -0,0 +1,3453 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56880_a0 and variant cna_6_5_29. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[12] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[12] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[12] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[12] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[12] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[12] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[11] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[12] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[12] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[12] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[12] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[12] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[12] |= (0x1 << 23); + } + reason[11] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[11] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_rxpmd_flex_field_data[] = { + { + .name = "DROP_CODE_15_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "DVP_15_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 231 }, /* Profile 2. */ + { 208, 215 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 376, 379 }, /* Profile 2. */ + { 344, 347 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "ERSPAN3_GBP_SID_15_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "EVENT_TRACE_VECTOR_31_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 31 }, /* Profile 2. */ + { 0, 31 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "INGRESS_PP_PORT_7_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 215 }, /* Profile 2. */ + { 192, 199 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 371 }, /* Profile 2. */ + { 336, 339 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 380, 383 }, /* Profile 2. */ + { 348, 351 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 282 }, /* Profile 2. */ + { 256, 266 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 170 }, /* Profile 2. */ + { 160, 170 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "L2_TUNNEL_SVP_15_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 271 }, /* Profile 2. */ + { 240, 255 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 317 }, /* Profile 2. */ + { 288, 301 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 189 }, /* Profile 2. */ + }, + .profile_cnt = 3, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 80, 94 }, /* Profile 2. */ + { 80, 94 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "NHOP_INDEX_1_14_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 334 }, /* Profile 2. */ + }, + .profile_cnt = 3, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 79 }, /* Profile 2. */ + { 64, 79 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 364, 367 }, /* Profile 2. */ + { 332, 335 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 356, 359 }, /* Profile 2. */ + { 324, 327 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 304, 319 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 372, 375 }, /* Profile 2. */ + { 340, 343 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 255 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "TAG_ACTION_CTRL_1_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 353 }, /* Profile 2. */ + { 320, 321 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 360, 363 }, /* Profile 2. */ + { 328, 331 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "VFI_15_0", + .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, +};static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_rxpmd_flex_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_names[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56880_a0_cna_6_5_29_rxpmd_flex_reasons_info = { + .num_reasons = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_names, + .reason_encode = bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_encode, + .reason_decode = bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_arp_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_arp_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_arp_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_arp_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_arp_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_cpu_composites_0_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_cpu_composites_0_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_cpu_composites_0_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_cpu_composites_0_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_cpu_composites_1_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_cpu_composites_1_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_cpu_composites_1_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_cpu_composites_1_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_ethertype_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_ethertype_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_ethertype_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_ethertype_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_generic_loopback_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_generic_loopback_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_generic_loopback_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_generic_loopback_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_icmp_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_icmp_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_icmp_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_icmp_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_ipfix_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_ipfix_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_ipfix_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_ipfix_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_ipv4_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_ipv4_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_ipv4_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_ipv4_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_ipv6_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_ipv6_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_ipv6_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_ipv6_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_l2_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_l2_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_l2_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_l2_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_mirror_transport_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_mirror_transport_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_mirror_transport_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_mirror_transport_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_rarp_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_rarp_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_rarp_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_rarp_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_rarp_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_udp_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_udp_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_udp_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_udp_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_unknown_l3_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_unknown_l3_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_unknown_l3_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_unknown_l3_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_unknown_l4_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_unknown_l4_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_unknown_l4_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_unknown_l4_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_unknown_l5_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_unknown_l5_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_unknown_l5_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_unknown_l5_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_vlan_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_vlan_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_vlan_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_vlan_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_vxlan_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_vxlan_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_vxlan_t_field_data[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_vxlan_t_field_info = { + .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56880_a0_cna_6_5_29_vxlan_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56880_a0_cna_6_5_29_flexhdr_info_list[BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_arp_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_cpu_composites_0_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_cpu_composites_1_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_ethertype_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_generic_loopback_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_icmp_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_ipfix_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_ipv4_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_ipv6_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_l2_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_mirror_transport_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_rarp_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_udp_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_unknown_l3_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_unknown_l4_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_unknown_l5_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_vlan_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_cna_6_5_29_vxlan_t_fget, + .flex_fset = bcm56880_a0_cna_6_5_29_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_cna_6_5_29_rxpmd_flex_field_info, + .reasons_info = &bcm56880_a0_cna_6_5_29_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56880_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56880_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56880_a0_cna_6_5_29_flexhdr_id_map[] = { + BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56880_a0_cna_6_5_29_flexhdr_map_get(void) +{ + return bcm56880_a0_cna_6_5_29_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56880_a0_cna_6_5_29_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56880_a0_cna_6_5_29_flexhdr_info_list[hid]; +} + +int bcm56880_a0_cna_6_5_29_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 6, + -1, + -1, + 25, +}; \ No newline at end of file diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..fc3b6434400d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,2480 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_dna_4_11_4_0_sf_match_id_info.yml + * for device bcm56880_a0 and variant dna_4_11_4_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db_info = { + .num_entries = 173, + .db = bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db_info_get(void) { + return &bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map_info = { + .num_entries = 173, + .map = bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map_info_get(void) { + return &bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_pkt_flexhdr.c new file mode 100644 index 000000000000..2ba90296858a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_pkt_flexhdr.c @@ -0,0 +1,7665 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56880_a0 and variant dna_4_11_4_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[12] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[12] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[12] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[12] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[12] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[12] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[12] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[12] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[12] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[12] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[12] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[12] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[12] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[12] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[12] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[12] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[12] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[11] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[11] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[11] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[11] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[11] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[11] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[11] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[11] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[11] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[12] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[12] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[12] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[12] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[12] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[12] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[12] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[12] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[12] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[12] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[12] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[12] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[12] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[12] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[12] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[12] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[12] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[12] |= (0x1 << 31); + } + reason[11] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[11] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[11] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[11] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[11] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[11] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[11] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[11] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[11] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[11] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_data[] = { + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 224, 239 }, /* Profile 4. */ + { 240, 255 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "DVP_15_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 311 }, /* Profile 2. */ + { 304, 311 }, /* Profile 3. */ + { 304, 311 }, /* Profile 4. */ + { 304, 311 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 239 }, /* Profile 2. */ + { 240, 255 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 271 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { 256, 271 }, /* Profile 4. */ + { 272, 287 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EVENT_TRACE_VECTOR_31_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 31 }, /* Profile 2. */ + { 0, 31 }, /* Profile 3. */ + { 0, 31 }, /* Profile 4. */ + { 0, 31 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 224, 239 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "IFP_IOAM_GBP_ACTION_3_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 372, 375 }, /* Profile 2. */ + { 372, 375 }, /* Profile 3. */ + { 372, 375 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 376, 379 }, /* Profile 2. */ + { 376, 379 }, /* Profile 3. */ + { 376, 379 }, /* Profile 4. */ + { 376, 379 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_TIMESTAMP_31_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 95 }, /* Profile 2. */ + { 64, 95 }, /* Profile 3. */ + { 64, 95 }, /* Profile 4. */ + { 64, 95 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_PP_PORT_7_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 247 }, /* Profile 2. */ + { 256, 263 }, /* Profile 3. */ + { 240, 247 }, /* Profile 4. */ + { 256, 263 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 175 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 396, 399 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 298 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 288, 298 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 160, 170 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 160, 170 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 205 }, /* Profile 2. */ + { 208, 221 }, /* Profile 3. */ + { 192, 205 }, /* Profile 4. */ + { 208, 221 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 365 }, /* Profile 2. */ + { 352, 365 }, /* Profile 3. */ + { 352, 365 }, /* Profile 4. */ + { 352, 365 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "MPLS_LABEL_DECAP_COUNT_3_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 191 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "NHOP_INDEX_1_15_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + { 336, 351 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SVP_15_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 287 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 272, 287 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 380, 383 }, /* Profile 2. */ + { 380, 383 }, /* Profile 3. */ + { 380, 383 }, /* Profile 4. */ + { 380, 383 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "VFI_15_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0", + .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 369 }, /* Profile 2. */ + { 368, 369 }, /* Profile 3. */ + { 368, 369 }, /* Profile 4. */ + { 368, 369 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, +};static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_names[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_names, + .reason_encode = bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_arp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_arp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_arp_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_arp_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_authen_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_authen_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_authen_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_authen_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_bfd_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_bfd_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_bfd_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_bfd_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_cntag_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_cntag_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_cntag_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_cntag_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_dest_option_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_dest_option_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_dest_option_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_dest_option_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_esp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_esp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_esp_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_esp_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_esp_t_field_data, +}; + + +static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_etag_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_get, + bcmpkt_etag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_etag_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_set, + bcmpkt_etag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_etag_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_etag_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_etag_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ethertype_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ethertype_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ethertype_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ethertype_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_frag_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_frag_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_frag_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_frag_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_frag_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_generic_loopback_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_generic_loopback_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_generic_loopback_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_generic_loopback_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gpe_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gpe_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gpe_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gpe_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gre_chksum_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gre_chksum_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gre_chksum_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gre_chksum_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gre_key_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gre_key_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gre_key_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gre_key_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gre_rout_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gre_rout_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gre_rout_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gre_rout_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gre_seq_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gre_seq_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gre_seq_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gre_seq_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gre_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gre_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gre_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gre_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_gre_t_field_data, +}; + + +static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 4, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 4, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 6, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 6, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 31, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 10); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 10, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 15, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 15, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 4); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 2, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_hg3_base_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_get, + bcmpkt_hg3_base_t_cng_get, + bcmpkt_hg3_base_t_entropy_get, + bcmpkt_hg3_base_t_ext_hdr_present_get, + bcmpkt_hg3_base_t_hg3_reserved_get, + bcmpkt_hg3_base_t_l3_routed_get, + bcmpkt_hg3_base_t_mirror_copy_get, + bcmpkt_hg3_base_t_reserved_etype_get, + bcmpkt_hg3_base_t_system_destination_get, + bcmpkt_hg3_base_t_system_destination_type_get, + bcmpkt_hg3_base_t_system_source_get, + bcmpkt_hg3_base_t_tc_get, + bcmpkt_hg3_base_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_hg3_base_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_set, + bcmpkt_hg3_base_t_cng_set, + bcmpkt_hg3_base_t_entropy_set, + bcmpkt_hg3_base_t_ext_hdr_present_set, + bcmpkt_hg3_base_t_hg3_reserved_set, + bcmpkt_hg3_base_t_l3_routed_set, + bcmpkt_hg3_base_t_mirror_copy_set, + bcmpkt_hg3_base_t_reserved_etype_set, + bcmpkt_hg3_base_t_system_destination_set, + bcmpkt_hg3_base_t_system_destination_type_set, + bcmpkt_hg3_base_t_system_source_set, + bcmpkt_hg3_base_t_tc_set, + bcmpkt_hg3_base_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_hg3_base_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_hg3_base_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_hg3_base_t_field_data, +}; + + +static int32_t bcmpkt_hg3_extension_0_t_class_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_get, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, + bcmpkt_hg3_extension_0_t_flags_get, + bcmpkt_hg3_extension_0_t_forwarding_domain_get, + bcmpkt_hg3_extension_0_t_svp_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_set, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, + bcmpkt_hg3_extension_0_t_flags_set, + bcmpkt_hg3_extension_0_t_forwarding_domain_set, + bcmpkt_hg3_extension_0_t_svp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_icmp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_icmp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_icmp_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_icmp_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 24); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 2); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 2, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 6); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 6, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_get, + bcmpkt_ifa_flex_md_0_b_t_port_speed_get, + bcmpkt_ifa_flex_md_0_b_t_queue_id_get, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_set, + bcmpkt_ifa_flex_md_0_b_t_port_speed_set, + bcmpkt_ifa_flex_md_0_b_t_queue_id_set, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_get, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_set, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_header_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_header_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_header_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_header_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_get, + bcmpkt_ifa_md_base_t_hop_limit_current_length_get, + bcmpkt_ifa_md_base_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_set, + bcmpkt_ifa_md_base_t_hop_limit_current_length_set, + bcmpkt_ifa_md_base_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_get, + bcmpkt_ifa_metadata_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_t_metadata_get, + bcmpkt_ifa_metadata_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_set, + bcmpkt_ifa_metadata_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_t_metadata_set, + bcmpkt_ifa_metadata_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_igmp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_igmp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_igmp_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_igmp_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ipfix_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ipfix_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ipfix_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ipfix_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ipv4_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ipv4_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ipv4_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ipv4_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ipv6_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ipv6_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ipv6_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ipv6_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_l2_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_l2_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_l2_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_l2_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mirror_transport_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mirror_transport_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mirror_transport_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mirror_transport_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mpls_ach_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mpls_ach_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mpls_ach_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mpls_ach_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mpls_bv_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mpls_bv_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mpls_bv_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mpls_bv_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mpls_cw_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mpls_cw_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mpls_cw_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mpls_cw_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mpls_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mpls_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mpls_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mpls_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_p_1588_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_p_1588_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_p_1588_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_p_1588_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_psamp_0_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_psamp_0_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_psamp_0_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_psamp_0_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_psamp_1_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_psamp_1_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_psamp_1_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_psamp_1_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_rarp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_rarp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rarp_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_rarp_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_routing_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_routing_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_routing_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_routing_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_rspan_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_rspan_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rspan_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_rspan_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_rspan_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_snap_llc_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_snap_llc_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_snap_llc_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_snap_llc_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_udp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_udp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_udp_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_udp_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_unknown_l3_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_unknown_l3_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_unknown_l3_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_unknown_l3_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_unknown_l4_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_unknown_l4_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_unknown_l4_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_unknown_l4_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_unknown_l5_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_unknown_l5_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_unknown_l5_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_unknown_l5_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_vlan_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_vlan_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_vlan_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_vlan_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_vntag_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_get, + bcmpkt_vntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_vntag_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_set, + bcmpkt_vntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_vntag_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_vntag_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_vntag_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_vxlan_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_vxlan_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_vxlan_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_vxlan_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_wesp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_wesp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_wesp_t_field_data[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_wesp_t_field_info = { + .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56880_a0_dna_4_11_4_0_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56880_a0_dna_4_11_4_0_flexhdr_info_list[BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_arp_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_authen_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_bfd_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_cntag_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_dest_option_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_esp_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_etag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_etag_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_etag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_ethertype_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_frag_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_generic_loopback_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_gpe_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_gre_chksum_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_gre_key_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_gre_rout_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_gre_seq_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_gre_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_hg3_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_hg3_base_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_hg3_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_icmp_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_header_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_igmp_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_ipfix_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_ipv4_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_ipv6_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_l2_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_mirror_transport_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_mpls_ach_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_mpls_bv_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_mpls_cw_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_mpls_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_p_1588_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_psamp_0_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_psamp_1_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_rarp_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_routing_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_rspan_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_snap_llc_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_udp_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_unknown_l3_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_unknown_l4_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_unknown_l5_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_vlan_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_vntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_vntag_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_vntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_vxlan_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_dna_4_11_4_0_wesp_t_fget, + .flex_fset = bcm56880_a0_dna_4_11_4_0_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_info, + .reasons_info = &bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56880_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56880_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56880_a0_dna_4_11_4_0_flexhdr_id_map[] = { + BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56880_a0_dna_4_11_4_0_flexhdr_map_get(void) +{ + return bcm56880_a0_dna_4_11_4_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56880_a0_dna_4_11_4_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56880_a0_dna_4_11_4_0_flexhdr_info_list[hid]; +} + +int bcm56880_a0_dna_4_11_4_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 13, + 20, + 21, + 66, +}; \ No newline at end of file diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..13843eb79157 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,2410 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_hna_6_5_29_2_2_sf_match_id_info.yml + * for device bcm56880_a0 and variant hna_6_5_29_2_2. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", + .match = 0x20, + .match_mask = 0x30, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x3f, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 0, + .value = 0x0, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", + .match = 0x10, + .match_mask = 0x30, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", + .match = 0x20, + .match_mask = 0x30, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x3f, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 0, + .value = 0x0, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", + .match = 0x10, + .match_mask = 0x30, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", + .match = 0x20, + .match_mask = 0x30, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x3f, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 0, + .value = 0x0, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", + .match = 0x10, + .match_mask = 0x30, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", + .match = 0x20, + .match_mask = 0x30, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x3f, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 0, + .value = 0x0, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", + .match = 0x10, + .match_mask = 0x30, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db_info = { + .num_entries = 168, + .db = bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db_info_get(void) { + return &bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map_info = { + .num_entries = 168, + .map = bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map_info_get(void) { + return &bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_pkt_flexhdr.c new file mode 100644 index 000000000000..9c92caacb6e1 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_pkt_flexhdr.c @@ -0,0 +1,7336 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56880_a0 and variant hna_6_5_29_2_2. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[12] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[12] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[12] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[12] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[12] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[12] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[12] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[12] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[12] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[12] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[12] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[12] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[12] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[12] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[12] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[12] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[12] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[11] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[11] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[11] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[11] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[11] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[11] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[11] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[11] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[11] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + } + if (reason[11] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[12] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[12] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[12] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[12] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[12] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[12] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[12] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[12] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[12] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[12] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[12] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[12] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[12] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[12] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[12] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[12] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[12] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[12] |= (0x1 << 31); + } + reason[11] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[11] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[11] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[11] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[11] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[11] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[11] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[11] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[11] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { + reason[11] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[11] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_data[] = { + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 256, 271 }, /* Profile 4. */ + { 256, 271 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "DVP_15_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 367 }, /* Profile 2. */ + { 352, 367 }, /* Profile 3. */ + { 352, 367 }, /* Profile 4. */ + { 352, 367 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 199 }, /* Profile 2. */ + { 192, 199 }, /* Profile 3. */ + { 192, 199 }, /* Profile 4. */ + { 192, 199 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 271 }, /* Profile 2. */ + { 256, 271 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { 208, 223 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 208, 223 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EVENT_TRACE_VECTOR_31_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 31 }, /* Profile 2. */ + { 0, 31 }, /* Profile 3. */ + { 0, 31 }, /* Profile 4. */ + { 0, 31 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "IFP_IOAM_GBP_ACTION_3_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_PORT_GROUP_ID_3_0_3_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 372, 375 }, /* Profile 2. */ + { 372, 375 }, /* Profile 3. */ + { 372, 375 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_PORT_GROUP_ID_7_4_3_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 376, 379 }, /* Profile 2. */ + { 376, 379 }, /* Profile 3. */ + { 376, 379 }, /* Profile 4. */ + { 376, 379 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_TIMESTAMP_31_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 95 }, /* Profile 2. */ + { 64, 95 }, /* Profile 3. */ + { 64, 95 }, /* Profile 4. */ + { 64, 95 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_PP_PORT_ITAG_PRESERVE_15_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 255 }, /* Profile 2. */ + { 240, 255 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + { 240, 255 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 138 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 128, 138 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 144, 154 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 144, 154 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 189 }, /* Profile 2. */ + { 176, 189 }, /* Profile 3. */ + { 176, 189 }, /* Profile 4. */ + { 176, 189 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 157 }, /* Profile 2. */ + { 128, 141 }, /* Profile 3. */ + { 144, 157 }, /* Profile 4. */ + { 128, 141 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + { 336, 351 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "NHOP_INDEX_1_15_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 239 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 224, 239 }, /* Profile 4. */ + { 224, 239 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 396, 399 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SVP_15_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 319 }, /* Profile 2. */ + { 304, 319 }, /* Profile 3. */ + { 304, 319 }, /* Profile 4. */ + { 304, 319 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 287 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { 272, 287 }, /* Profile 4. */ + { 272, 287 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 371 }, /* Profile 2. */ + { 368, 371 }, /* Profile 3. */ + { 368, 371 }, /* Profile 4. */ + { 368, 371 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 380, 383 }, /* Profile 2. */ + { 380, 383 }, /* Profile 3. */ + { 380, 383 }, /* Profile 4. */ + { 380, 383 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "VFI_15_0", + .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 175 }, /* Profile 2. */ + { 160, 175 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { 160, 175 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, +};static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_names[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reasons_info = { + .num_reasons = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_names, + .reason_encode = bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_encode, + .reason_decode = bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_arp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_arp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_arp_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_arp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_authen_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_authen_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_authen_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_authen_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_bfd_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_bfd_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_bfd_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_bfd_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_cntag_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_cntag_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_cntag_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_cntag_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_dest_option_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_dest_option_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_dest_option_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_dest_option_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_esp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_esp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_esp_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_esp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_esp_t_field_data, +}; + + +static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_etag_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_get, + bcmpkt_etag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_etag_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_set, + bcmpkt_etag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_etag_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_etag_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_etag_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ethertype_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ethertype_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ethertype_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ethertype_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_frag_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_frag_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_frag_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_frag_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_frag_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gpe_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gpe_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gpe_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gpe_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gre_key_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gre_key_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gre_key_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gre_key_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gre_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gre_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gre_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gre_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_gre_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_icmp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_icmp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_icmp_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_icmp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 24); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 2); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 2, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 6); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 6, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_get, + bcmpkt_ifa_flex_md_0_b_t_port_speed_get, + bcmpkt_ifa_flex_md_0_b_t_queue_id_get, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_set, + bcmpkt_ifa_flex_md_0_b_t_port_speed_set, + bcmpkt_ifa_flex_md_0_b_t_queue_id_set, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_get, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_set, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_get, + bcmpkt_ifa_md_base_t_hop_limit_current_length_get, + bcmpkt_ifa_md_base_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_set, + bcmpkt_ifa_md_base_t_hop_limit_current_length_set, + bcmpkt_ifa_md_base_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_get, + bcmpkt_ifa_metadata_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_t_metadata_get, + bcmpkt_ifa_metadata_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_set, + bcmpkt_ifa_metadata_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_t_metadata_set, + bcmpkt_ifa_metadata_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_igmp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_igmp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_igmp_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_igmp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ipfix_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ipfix_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ipfix_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ipfix_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ipv4_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ipv4_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ipv4_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ipv4_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ipv6_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ipv6_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ipv6_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ipv6_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_l2_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_l2_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_l2_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_l2_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mpls_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mpls_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mpls_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mpls_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_p_1588_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_p_1588_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_p_1588_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_p_1588_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_rarp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_rarp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rarp_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_rarp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_routing_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_routing_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_routing_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_routing_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_rspan_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_rspan_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rspan_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_rspan_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_rspan_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_udp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_udp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_udp_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_udp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_vlan_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_vlan_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_vlan_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_vlan_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_vntag_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_get, + bcmpkt_vntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_vntag_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_set, + bcmpkt_vntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_vntag_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_vntag_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_vntag_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_vxlan_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_vxlan_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_vxlan_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_vxlan_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_wesp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_wesp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_wesp_t_field_data[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_wesp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_29_2_2_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56880_a0_hna_6_5_29_2_2_flexhdr_info_list[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_arp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_authen_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_bfd_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_cntag_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_dest_option_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_esp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_etag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_etag_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_etag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ethertype_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_frag_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gpe_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gre_key_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gre_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_icmp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_igmp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ipfix_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ipv4_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ipv6_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_l2_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mpls_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_p_1588_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_rarp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_routing_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_rspan_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_udp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_vlan_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_vntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_vntag_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_vntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_vxlan_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_29_2_2_wesp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_29_2_2_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_info, + .reasons_info = &bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56880_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56880_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56880_a0_hna_6_5_29_2_2_flexhdr_id_map[] = { + BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56880_a0_hna_6_5_29_2_2_flexhdr_map_get(void) +{ + return bcm56880_a0_hna_6_5_29_2_2_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56880_a0_hna_6_5_29_2_2_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56880_a0_hna_6_5_29_2_2_flexhdr_info_list[hid]; +} + +int bcm56880_a0_hna_6_5_29_2_2_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 13, + -1, + -1, + 64, +}; \ No newline at end of file diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..b09767c287bd --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,2550 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_nfa_2_1_7_0_sf_match_id_info.yml + * for device bcm56880_a0 and variant nfa_2_1_7_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OPAQUETAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN */ + .name = "EGRESS_PKT_FWD_L2_HDR_RSPAN", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x2, + .match_mask = 0x4e, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x430, + .match_mask = 0x670, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x648, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0xb0, + .match_mask = 0x1f0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x1006, + .match_mask = 0x3846, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x8, + .match_mask = 0x48, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x208, + .match_mask = 0x648, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x808, + .match_mask = 0x3848, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0xa, + .match_mask = 0x4e, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x380e, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x420, + .match_mask = 0x670, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x10, + .match_mask = 0x70, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x46, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x804, + .match_mask = 0x3846, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x46, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x80, + .match_mask = 0x1f0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x1000, + .match_mask = 0x3806, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x806, + .match_mask = 0x3846, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_RSPAN", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x2, + .match_mask = 0x4e, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x430, + .match_mask = 0x670, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x648, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0xb0, + .match_mask = 0x1f0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x1006, + .match_mask = 0x3846, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x8, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x208, + .match_mask = 0x648, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x808, + .match_mask = 0x3848, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0xa, + .match_mask = 0x4e, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x380e, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x420, + .match_mask = 0x670, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x10, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x46, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x804, + .match_mask = 0x3846, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x46, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x80, + .match_mask = 0x1f0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x1000, + .match_mask = 0x3806, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x806, + .match_mask = 0x3846, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OPAQUETAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN */ + .name = "INGRESS_PKT_INNER_L2_HDR_RSPAN", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x2, + .match_mask = 0x4e, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x430, + .match_mask = 0x670, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x648, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0xb0, + .match_mask = 0x1f0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x380e, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x420, + .match_mask = 0x670, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x10, + .match_mask = 0x70, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x46, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x804, + .match_mask = 0x3846, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x46, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x80, + .match_mask = 0x1f0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x1000, + .match_mask = 0x3806, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN */ + .name = "INGRESS_PKT_OUTER_L2_HDR_RSPAN", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x2, + .match_mask = 0x4e, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x430, + .match_mask = 0x670, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x648, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0xb0, + .match_mask = 0x1f0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x1006, + .match_mask = 0x3846, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x8, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x208, + .match_mask = 0x648, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x808, + .match_mask = 0x3848, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0xa, + .match_mask = 0x4e, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x380e, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x420, + .match_mask = 0x670, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x10, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x46, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x804, + .match_mask = 0x3846, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x46, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x80, + .match_mask = 0x1f0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x1000, + .match_mask = 0x3806, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x806, + .match_mask = 0x3846, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db_info = { + .num_entries = 178, + .db = bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db_info_get(void) { + return &bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map_info = { + .num_entries = 178, + .map = bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map_info_get(void) { + return &bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_pkt_flexhdr.c new file mode 100644 index 000000000000..e027162fd381 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_pkt_flexhdr.c @@ -0,0 +1,6947 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56880_a0 and variant nfa_2_1_7_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[12] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[12] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[12] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[12] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[12] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[12] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[12] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[12] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[12] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[12] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[12] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[12] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[12] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[12] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[12] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[12] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[12] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[11] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[11] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[11] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[11] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[11] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[11] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[11] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[11] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[11] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS); + } + if (reason[11] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS); + } + if (reason[11] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF); + } + if (reason[11] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED); + } + if (reason[11] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED); + } + if (reason[11] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[12] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[12] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[12] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[12] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[12] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[12] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[12] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[12] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[12] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[12] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[12] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[12] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[12] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[12] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[12] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[12] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[12] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[12] |= (0x1 << 31); + } + reason[11] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[11] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[11] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[11] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[11] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[11] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[11] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[11] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[11] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS)) { + reason[11] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS)) { + reason[11] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF)) { + reason[11] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED)) { + reason[11] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED)) { + reason[11] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[11] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_data[] = { + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 175 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "DVP_15_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 271 }, /* Profile 2. */ + { 256, 271 }, /* Profile 3. */ + { 256, 271 }, /* Profile 4. */ + { 256, 271 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 183 }, /* Profile 2. */ + { 160, 167 }, /* Profile 3. */ + { 176, 183 }, /* Profile 4. */ + { 160, 167 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EVENT_TRACE_VECTOR_31_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 31 }, /* Profile 2. */ + { 0, 31 }, /* Profile 3. */ + { 0, 31 }, /* Profile 4. */ + { 0, 31 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 319 }, /* Profile 2. */ + { 304, 319 }, /* Profile 3. */ + { 304, 319 }, /* Profile 4. */ + { 304, 319 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 376, 379 }, /* Profile 2. */ + { 376, 379 }, /* Profile 3. */ + { 376, 379 }, /* Profile 4. */ + { 376, 379 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_ETAG_ACTION_3_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 380, 383 }, /* Profile 2. */ + { 380, 383 }, /* Profile 3. */ + { 380, 383 }, /* Profile 4. */ + { 380, 383 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_ETAG_PCP_DEI_3_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 371 }, /* Profile 2. */ + { 368, 371 }, /* Profile 3. */ + { 368, 371 }, /* Profile 4. */ + { 368, 371 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_ETAG_VID_16_15_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_TIMESTAMP_31_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 95 }, /* Profile 2. */ + { 64, 95 }, /* Profile 3. */ + { 64, 95 }, /* Profile 4. */ + { 64, 95 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_PP_PORT_7_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 279 }, /* Profile 2. */ + { 272, 279 }, /* Profile 3. */ + { 272, 279 }, /* Profile 4. */ + { 272, 279 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 396, 399 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 154 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 144, 154 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 224, 234 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 224, 234 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 365 }, /* Profile 2. */ + { 352, 365 }, /* Profile 3. */ + { 352, 365 }, /* Profile 4. */ + { 352, 365 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 253 }, /* Profile 2. */ + { 240, 253 }, /* Profile 3. */ + { 240, 253 }, /* Profile 4. */ + { 240, 253 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "MPLS_LABEL_DECAP_COUNT_3_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + { 336, 351 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "NHOP_INDEX_1_15_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SVP_15_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "T_VLAN_TAG_VALUE_15_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 372, 375 }, /* Profile 2. */ + { 372, 375 }, /* Profile 3. */ + { 372, 375 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "VFI_15_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 239 }, /* Profile 2. */ + { 208, 223 }, /* Profile 3. */ + { 224, 239 }, /* Profile 4. */ + { 208, 223 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", + .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, +};static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_names[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_names, + .reason_encode = bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_arp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_arp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_arp_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_arp_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_authen_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_authen_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_authen_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_authen_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_bfd_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_bfd_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_bfd_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_bfd_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_dest_option_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_dest_option_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_dest_option_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_dest_option_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_esp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_esp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_esp_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_esp_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_esp_t_field_data, +}; + + +static int32_t bcmpkt_etag_t_pcp_dei_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_etag_t_pcp_dei_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_etag_t_rsrvd0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 30, 2); + + return ret; +} + +static int32_t bcmpkt_etag_t_rsrvd0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_etag_t_rsrvd1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_rsrvd1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_etag_t_svid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_etag_t_svid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_etag_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 14); + + return ret; +} + +static int32_t bcmpkt_etag_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 14, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_etag_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_pcp_dei_get, + bcmpkt_etag_t_rsrvd0_get, + bcmpkt_etag_t_rsrvd1_get, + bcmpkt_etag_t_svid_get, + bcmpkt_etag_t_tpid_get, + bcmpkt_etag_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_etag_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_pcp_dei_set, + bcmpkt_etag_t_rsrvd0_set, + bcmpkt_etag_t_rsrvd1_set, + bcmpkt_etag_t_svid_set, + bcmpkt_etag_t_tpid_set, + bcmpkt_etag_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_etag_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_etag_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_etag_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_ethertype_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_ethertype_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_ethertype_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_ethertype_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_frag_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_frag_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_frag_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_frag_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_frag_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gpe_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gpe_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gpe_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gpe_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_vn_id_lower_entropy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_key_t_vn_id_lower_entropy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_key_t_vn_id_upper_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_key_t_vn_id_upper_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gre_key_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_vn_id_lower_entropy_get, + bcmpkt_gre_key_t_vn_id_upper_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gre_key_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_vn_id_lower_entropy_set, + bcmpkt_gre_key_t_vn_id_upper_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gre_key_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gre_key_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gre_rout_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gre_rout_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gre_rout_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gre_rout_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gre_seq_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gre_seq_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gre_seq_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gre_seq_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gre_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gre_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gre_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gre_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_gre_t_field_data, +}; + + +static int32_t bcmpkt_gtp_12byte_t_bytes_11_8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_12byte_t_bytes_11_8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_12byte_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_12byte_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_12byte_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_12byte_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FID_COUNT] = { + bcmpkt_gtp_12byte_t_bytes_11_8_get, + bcmpkt_gtp_12byte_t_bytes_3_0_get, + bcmpkt_gtp_12byte_t_bytes_7_4_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FID_COUNT] = { + bcmpkt_gtp_12byte_t_bytes_11_8_set, + bcmpkt_gtp_12byte_t_bytes_3_0_set, + bcmpkt_gtp_12byte_t_bytes_7_4_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_field_data, +}; + + +static int32_t bcmpkt_gtp_8byte_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_8byte_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_8byte_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_8byte_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FID_COUNT] = { + bcmpkt_gtp_8byte_t_bytes_3_0_get, + bcmpkt_gtp_8byte_t_bytes_7_4_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FID_COUNT] = { + bcmpkt_gtp_8byte_t_bytes_3_0_set, + bcmpkt_gtp_8byte_t_bytes_7_4_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_icmp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_icmp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_icmp_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_icmp_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_igmp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_igmp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_igmp_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_igmp_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_ipfix_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_ipfix_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_ipfix_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_ipfix_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_ipv4_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_ipv4_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_ipv4_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_ipv4_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_ipv6_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_ipv6_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_ipv6_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_ipv6_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_l2_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_l2_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_l2_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_l2_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mpls_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mpls_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mpls_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mpls_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_mpls_t_field_data, +}; + + +static int32_t bcmpkt_opaquetag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_opaquetag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_opaquetag_t_vlan_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_opaquetag_t_vlan_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_opaquetag_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FID_COUNT] = { + bcmpkt_opaquetag_t_tpid_get, + bcmpkt_opaquetag_t_vlan_tag_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_opaquetag_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FID_COUNT] = { + bcmpkt_opaquetag_t_tpid_set, + bcmpkt_opaquetag_t_vlan_tag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_opaquetag_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_opaquetag_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_opaquetag_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_p_1588_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_p_1588_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_p_1588_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_p_1588_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_psamp_0_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_psamp_0_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_psamp_0_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_psamp_0_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_psamp_1_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_psamp_1_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_psamp_1_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_psamp_1_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_rarp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_rarp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rarp_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_rarp_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_routing_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_routing_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_routing_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_routing_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_rspan_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_rspan_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rspan_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_rspan_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_rspan_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_snap_llc_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_snap_llc_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_snap_llc_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_snap_llc_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_udp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_udp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_udp_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_udp_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_vlan_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_vlan_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_vlan_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_vlan_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_vntag_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_get, + bcmpkt_vntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_vntag_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_set, + bcmpkt_vntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_vntag_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_vntag_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_vntag_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_lower_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_lower_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_upper_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_upper_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_vxlan_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_vn_id_lower_reserved2_get, + bcmpkt_vxlan_t_vn_id_upper_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_vxlan_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_vn_id_lower_reserved2_set, + bcmpkt_vxlan_t_vn_id_upper_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_vxlan_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_vxlan_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_wesp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_wesp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_wesp_t_field_data[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_wesp_t_field_info = { + .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56880_a0_nfa_2_1_7_0_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56880_a0_nfa_2_1_7_0_flexhdr_info_list[BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_arp_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_authen_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_bfd_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_dest_option_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_esp_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_etag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_etag_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_etag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_ethertype_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_frag_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_gpe_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_gre_key_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_gre_rout_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_gre_seq_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_gre_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_icmp_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_igmp_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_ipfix_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_ipv4_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_ipv6_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_l2_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_mpls_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_opaquetag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_opaquetag_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_opaquetag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_p_1588_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_psamp_0_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_psamp_1_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_rarp_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_routing_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_rspan_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_snap_llc_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_udp_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_vlan_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_vntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_vntag_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_vntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_vxlan_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_2_1_7_0_wesp_t_fget, + .flex_fset = bcm56880_a0_nfa_2_1_7_0_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_info, + .reasons_info = &bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56880_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56880_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56880_a0_nfa_2_1_7_0_flexhdr_id_map[] = { + BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56880_a0_nfa_2_1_7_0_flexhdr_map_get(void) +{ + return bcm56880_a0_nfa_2_1_7_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56880_a0_nfa_2_1_7_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56880_a0_nfa_2_1_7_0_flexhdr_info_list[hid]; +} + +int bcm56880_a0_nfa_2_1_7_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 12, + -1, + -1, + 58, +}; \ No newline at end of file diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..8713e3347f26 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,1443 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56890_a0_cna_6_5_29_sf_match_id_info.yml + * for device bcm56890_a0 and variant cna_6_5_29. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = +{ + 0x8, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = +{ + 0xe, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = +{ + 0xc, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[1] = +{ + 0x7fffe, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[1] = +{ + 0x810, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[1] = +{ + 0x3f8, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[1] = +{ + 0x1fc00, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[1] = +{ + 0x20000, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[1] = +{ + 0x3060, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[1] = +{ + 0x2040, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[1] = +{ + 0xc180, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[1] = +{ + 0x40000, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[1] = +{ + 0x10200, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[1] = +{ + 0x8100, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[1] = +{ + 0x28, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[1] = +{ + 0x3e, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[1] = +{ + 0x30, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[1] = +{ + 0x1ffffe, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[1] = +{ + 0x1010, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[1] = +{ + 0x7f8, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[1] = +{ + 0x7f800, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[1] = +{ + 0x80000, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[1] = +{ + 0x6060, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[1] = +{ + 0x4040, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[1] = +{ + 0x38380, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[1] = +{ + 0x100000, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[1] = +{ + 0x40400, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[1] = +{ + 0x10100, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[1] = +{ + 0x20200, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = +{ + 0x8, +}; + + +static bcmpkt_rxpmd_match_id_db_t +bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + .zone_minbit = 10, + .arc_id_mask = 0xc00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + .zone_minbit = 10, + .arc_id_mask = 0xc00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 12, + .zone_minbit = 10, + .arc_id_mask = 0xc00, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + .zone_minbit = 10, + .arc_id_mask = 0xc00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 12, + .arc_id_mask = 0x1f000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1c, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1c, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 4, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1c, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1c, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_sys_hdr_loopback, + + }, + { + /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_cna_6_5_29_rxpmd_match_id_db_info = { + .num_entries = 77, + .db = bcm56890_a0_cna_6_5_29_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void) { + return &bcm56890_a0_cna_6_5_29_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56890_a0_cna_6_5_29_rxpmd_match_id_map[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_cna_6_5_29_rxpmd_match_id_map_info = { + .num_entries = 77, + .map = bcm56890_a0_cna_6_5_29_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void) { + return &bcm56890_a0_cna_6_5_29_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_pkt_flexhdr.c new file mode 100644 index 000000000000..0a040c82a32d --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_pkt_flexhdr.c @@ -0,0 +1,4021 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56890_a0 and variant cna_6_5_29. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data[] = { + { + .name = "DROP_CODE_15_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "DVP_15_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 112, 127 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 343 }, /* Profile 2. */ + { 336, 343 }, /* Profile 3. */ + { 336, 343 }, /* Profile 4. */ + { 304, 311 }, /* Profile 5. */ + { 304, 311 }, /* Profile 6. */ + { 304, 311 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + { 372, 375 }, /* Profile 6. */ + { 372, 375 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 383 }, /* Profile 2. */ + { 368, 383 }, /* Profile 3. */ + { 368, 383 }, /* Profile 4. */ + { 336, 351 }, /* Profile 5. */ + { 336, 351 }, /* Profile 6. */ + { 336, 351 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EP_NIH_HDR_DROP_CODE_15_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 144, 159 }, /* Profile 6. */ + }, + .profile_cnt = 7, + }, + { + .name = "EP_NIH_HDR_RECIRC_CODE_3_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 352, 355 }, /* Profile 5. */ + { 352, 355 }, /* Profile 6. */ + { 352, 355 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { 112, 127 }, /* Profile 6. */ + }, + .profile_cnt = 7, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 175 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + { 128, 143 }, /* Profile 6. */ + }, + .profile_cnt = 7, + }, + { + .name = "ERSPAN3_GBP_SID_15_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 367 }, /* Profile 2. */ + { 352, 367 }, /* Profile 3. */ + { 352, 367 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + { 320, 335 }, /* Profile 6. */ + { 320, 335 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EVENT_TRACE_VECTOR_15_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + { 0, 15 }, /* Profile 5. */ + { 0, 15 }, /* Profile 6. */ + { 0, 15 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EVENT_TRACE_VECTOR_31_16", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 16, 31 }, /* Profile 2. */ + { 16, 31 }, /* Profile 3. */ + { 16, 31 }, /* Profile 4. */ + { 16, 31 }, /* Profile 5. */ + { 16, 31 }, /* Profile 6. */ + { 16, 31 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + { 32, 47 }, /* Profile 6. */ + { 32, 47 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { 208, 223 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + { 176, 191 }, /* Profile 6. */ + { 176, 191 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ING_TIMESTAMP_15_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ING_TIMESTAMP_31_16", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 144, 159 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "INGRESS_PP_PORT_8_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 280 }, /* Profile 2. */ + { 272, 280 }, /* Profile 3. */ + { 272, 280 }, /* Profile 4. */ + { 240, 248 }, /* Profile 5. */ + { 240, 248 }, /* Profile 6. */ + { 240, 248 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 239 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 224, 239 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + { 192, 207 }, /* Profile 6. */ + { 192, 207 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 380, 383 }, /* Profile 5. */ + { 380, 383 }, /* Profile 6. */ + { 380, 383 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 364, 367 }, /* Profile 5. */ + { 364, 367 }, /* Profile 6. */ + { 364, 367 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 202 }, /* Profile 2. */ + { 192, 202 }, /* Profile 3. */ + { 192, 202 }, /* Profile 4. */ + { 160, 170 }, /* Profile 5. */ + { 160, 170 }, /* Profile 6. */ + { 160, 170 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 106 }, /* Profile 2. */ + { 80, 90 }, /* Profile 3. */ + { 96, 106 }, /* Profile 4. */ + { 96, 106 }, /* Profile 5. */ + { 80, 90 }, /* Profile 6. */ + { 96, 106 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L2_TUNNEL_SVP_15_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 255 }, /* Profile 2. */ + { 240, 255 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + { 208, 223 }, /* Profile 5. */ + { 208, 223 }, /* Profile 6. */ + { 208, 223 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 269 }, /* Profile 2. */ + { 256, 269 }, /* Profile 3. */ + { 256, 269 }, /* Profile 4. */ + { 224, 237 }, /* Profile 5. */ + { 224, 237 }, /* Profile 6. */ + { 224, 237 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 125 }, /* Profile 2. */ + { 96, 109 }, /* Profile 3. */ + { 112, 125 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 318 }, /* Profile 2. */ + { 304, 318 }, /* Profile 3. */ + { 304, 318 }, /* Profile 4. */ + { 272, 286 }, /* Profile 5. */ + { 272, 286 }, /* Profile 6. */ + { 272, 286 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "NHOP_INDEX_1_14_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 190 }, /* Profile 2. */ + { 160, 174 }, /* Profile 3. */ + { 176, 190 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 79 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 64, 79 }, /* Profile 4. */ + { 64, 79 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + { 64, 79 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 376, 379 }, /* Profile 5. */ + { 376, 379 }, /* Profile 6. */ + { 376, 379 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 416, 419 }, /* Profile 2. */ + { 416, 419 }, /* Profile 3. */ + { 416, 419 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + { 384, 387 }, /* Profile 6. */ + { 384, 387 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + { 288, 303 }, /* Profile 6. */ + { 288, 303 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 368, 371 }, /* Profile 5. */ + { 368, 371 }, /* Profile 6. */ + { 368, 371 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 256, 271 }, /* Profile 5. */ + { 256, 271 }, /* Profile 6. */ + { 256, 271 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "TAG_ACTION_CTRL_1_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 393 }, /* Profile 2. */ + { 392, 393 }, /* Profile 3. */ + { 392, 393 }, /* Profile 4. */ + { 360, 361 }, /* Profile 5. */ + { 360, 361 }, /* Profile 6. */ + { 360, 361 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 356, 359 }, /* Profile 5. */ + { 356, 359 }, /* Profile 6. */ + { 356, 359 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "VFI_15_0", + .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 80, 95 }, /* Profile 2. */ + { 64, 79 }, /* Profile 3. */ + { 80, 95 }, /* Profile 4. */ + { 80, 95 }, /* Profile 5. */ + { 64, 79 }, /* Profile 6. */ + { 80, 95 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, +};static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_names[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56890_a0_cna_6_5_29_rxpmd_flex_reasons_info = { + .num_reasons = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_names, + .reason_encode = bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_encode, + .reason_decode = bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_arp_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_arp_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_arp_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_arp_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_arp_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_cpu_composites_0_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_cpu_composites_0_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_cpu_composites_0_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_cpu_composites_0_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_cpu_composites_1_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_cpu_composites_1_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_cpu_composites_1_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_cpu_composites_1_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ep_nih_header_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ep_nih_header_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_ep_nih_header_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_ep_nih_header_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ethertype_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ethertype_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_ethertype_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_ethertype_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_generic_loopback_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_generic_loopback_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_generic_loopback_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_generic_loopback_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_icmp_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_icmp_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_icmp_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_icmp_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ipfix_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ipfix_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_ipfix_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_ipfix_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ipv4_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ipv4_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_ipv4_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_ipv4_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ipv6_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ipv6_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_ipv6_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_ipv6_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_l2_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_l2_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_l2_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_l2_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_mirror_transport_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_mirror_transport_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_mirror_transport_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_mirror_transport_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get, + bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set, + bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_rarp_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_rarp_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rarp_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_rarp_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_rarp_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_udp_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_udp_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_udp_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_udp_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_unknown_l3_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_unknown_l3_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_unknown_l3_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_unknown_l3_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_unknown_l4_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_unknown_l4_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_unknown_l4_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_unknown_l4_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_unknown_l5_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_unknown_l5_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_unknown_l5_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_unknown_l5_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_vlan_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_vlan_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_vlan_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_vlan_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_vxlan_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_vxlan_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_vxlan_t_field_data[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_vxlan_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_29_vxlan_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56890_a0_cna_6_5_29_flexhdr_info_list[BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_arp_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_cpu_composites_0_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_cpu_composites_1_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_ep_nih_header_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_ethertype_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_generic_loopback_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_icmp_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_ipfix_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_ipv4_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_ipv6_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_l2_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_mirror_transport_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_rarp_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_udp_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_unknown_l3_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_unknown_l4_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_unknown_l5_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_vlan_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_29_vxlan_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_29_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_29_rxpmd_flex_field_info, + .reasons_info = &bcm56890_a0_cna_6_5_29_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56890_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56890_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56890_a0_cna_6_5_29_flexhdr_id_map[] = { + BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56890_a0_cna_6_5_29_flexhdr_map_get(void) +{ + return bcm56890_a0_cna_6_5_29_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56890_a0_cna_6_5_29_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56890_a0_cna_6_5_29_flexhdr_info_list[hid]; +} + +int bcm56890_a0_cna_6_5_29_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 7, + -1, + -1, + 27, +}; \ No newline at end of file diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id.c new file mode 100644 index 000000000000..c4066744b1df --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,7234 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56890_a0_dna_6_5_29_1_2_sf_match_id_info.yml + * for device bcm56890_a0 and variant dna_6_5_29_1_2. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] = +{ + 0x366c, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = +{ + 0x78f0, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = +{ + 0x1fffe, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = +{ + 0xff00, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] = +{ + 0x1e4c8, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] = +{ + 0x10, + 0x400000, + 0x1dd8000, + 0x20, + 0x0, + 0x0, + 0x0, + 0xbfddfddf, + 0xf77fbbfb, + 0xddfddf77, + 0x1, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x400000, + 0x0, + 0x100, + 0x800776, + 0x0, + 0x0, + 0x0, + 0xf77c0000, + 0xefeeff77, + 0x7ddfddfe, + 0x777f7, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde, + 0x0, + 0x0, + 0x7778, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0x0, + 0x3bbc0, + 0x0, + 0x0, + 0x77780, + 0x0, + 0x0, + 0x3bbc0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0xdde00000, + 0x1, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0xde000000, + 0x1d, + 0x0, + 0x0, + 0xeef0, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] = +{ + 0x0, + 0x0, + 0x100000, + 0x1000000, + 0x0, + 0x0, + 0x2000, + 0x100100, + 0x4002002, + 0x10010040, + 0x400400, + 0x10008008, + 0x40040100, + 0x1001000, + 0x40040020, + 0x100100, + 0x4002002, + 0x80080040, + 0x200200, + 0x2002000, + 0x80040040, + 0x200800, + 0x4004002, + 0x80080, + 0x401001, + 0x2001004, + 0x40040020, + 0x800800, + 0x2002, + 0x0, + 0x0, + 0x40, + 0x400, + 0x0, + 0x80000000, + 0x4000000, + 0x80080040, + 0x1001000, + 0x10004004, + 0x200100, + 0x4004002, + 0x40010010, + 0x800400, + 0x4010010, + 0x80080040, + 0x1001000, + 0x8020020, + 0x80000080, + 0x1000800, + 0x20020010, + 0x80080, + 0x2001001, + 0x40040020, + 0x40100100, + 0x800800, + 0x20010010, + 0x80080200, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xff77f77c, + 0xddfeefee, + 0x77f77ddf, + 0x7, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xddf00000, + 0xbfbbfddf, + 0xf77f77fb, + 0x1ddfdd, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde000, + 0x0, + 0x0, + 0x7778000, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0x3bbc0, + 0x0, + 0x0, + 0x3bbc0000, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0xc0000000, + 0x3bb, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0x1dde, + 0x0, + 0x0, + 0x7778, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0x0, + 0xeef0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0xeef0000, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] = +{ + 0x0, + 0x0, + 0x0, + 0x40, + 0x0, + 0x0, + 0x0, + 0x2000000, + 0x0, + 0x0, + 0x8000000, + 0x0, + 0x0, + 0x20000008, + 0x0, + 0x0, + 0x40000, + 0x0, + 0x0, + 0x40000000, + 0x0, + 0x0, + 0x80000000, + 0x0, + 0x0, + 0x0, + 0x400, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x800, + 0x0, + 0x0, + 0x2000, + 0x0, + 0x200000, + 0x8000, + 0x0, + 0x0, + 0x10, + 0x0, + 0x0, + 0x10000, + 0x0, + 0x0, + 0x20000, + 0x0, + 0x0, + 0x10000000, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] = +{ + 0x1e, + 0x400000, + 0x1dd8000, + 0x3ddcafe0, + 0x0, + 0x8000, + 0xc003bb00, + 0xbfddfddf, + 0xf77fbbfb, + 0xddfddf77, + 0xff77f77d, + 0xddfeefee, + 0x77f77ddf, + 0xfddfddff, + 0x77f77fbb, + 0xbfddfddf, + 0xf77fbbfb, + 0xefeeff77, + 0x7fbbfbbe, + 0xfbbfbbe5, + 0xeff77f77, + 0xbfbbeefe, + 0xf77f77fb, + 0xdfeefeef, + 0x7f77ddfd, + 0xfbbfddf7, + 0x77f77fbb, + 0xbeefeeff, + 0x1bbbfb, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfddfddf0, + 0x77f77fbb, + 0x1ddfddf, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77c00000, + 0xfeeff77f, + 0xf77ddfdd, + 0x777, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0xf0000000, + 0xee, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0xeef, + 0x0, + 0x0, + 0x777800, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0x3bbc000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0x3bbc0000, + 0x0, + 0x0, + 0xe0000000, + 0x1dd, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbe000000, + 0xf77fbbfb, + 0xefeeff77, + 0x3bbfbbe, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xefeef800, + 0xfddfddfe, + 0xeefbbfbb, + 0xeef, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3bbc0, + 0x0, + 0x0, + 0xeef00, + 0x0, + 0xc0000000, + 0x3bb, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0x777800, + 0x0, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0xeef0000, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0xe0000000, + 0x1dd, + 0x0, + 0xc0000000, + 0x3bb, + 0x0, + 0x0, + 0x1dde00, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] = +{ + 0x0, + 0x400000, + 0x0, + 0x80, + 0x0, + 0x8000, + 0x0, + 0x8004004, + 0x140080, + 0x400001, + 0x20010010, + 0x500200, + 0x1000004, + 0x80040040, + 0x1001400, + 0x8004000, + 0x100080, + 0x2002801, + 0x4008000, + 0x80080, + 0x2801001, + 0x8000020, + 0x100100, + 0x5002002, + 0x10000040, + 0x80080000, + 0x1001000, + 0x20028, + 0x80, + 0x0, + 0x100, + 0x2000000, + 0x0, + 0x0, + 0x2, + 0x100000, + 0x2002001, + 0x40050, + 0x400100, + 0x8008004, + 0x100140, + 0x1000400, + 0x50020010, + 0x400, + 0x2002001, + 0xa0040040, + 0x800, + 0x2001002, + 0x40040020, + 0x800a00, + 0x4002000, + 0x80080040, + 0x1001400, + 0x4000, + 0x40020020, + 0xa00400, + 0x2000008, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] = +{ + 0x0, + 0x0, + 0x0, + 0xaf00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x78000000, + 0x5, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbc000000, + 0x2, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x15e000, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata[48] = +{ + 0x0, + 0x0, + 0x0, + 0x8800, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x40000000, + 0x4, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x20000000, + 0x2, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x110000, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] = +{ + 0x0, + 0x0, + 0x0, + 0x40020, + 0x0, + 0x0, + 0x40000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x800000, + 0x10, + 0x0, + 0x0, + 0x10000, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] = +{ + 0x18, + 0x400000, + 0x1dd8000, + 0x3ddcafe0, + 0x0, + 0x8000, + 0x4003bb00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x600000, + 0x0, + 0x100, + 0xbf800776, + 0xf772, + 0x0, + 0xec000002, + 0x1000e, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0xbfddfddf, + 0xf77fbbfb, + 0xddfddf77, + 0xff77f77d, + 0xddfeefee, + 0x77f77ddf, + 0xfddfddff, + 0x77f77fbb, + 0xbfddfddf, + 0xf77fbbfb, + 0xefeeff77, + 0x7fbbfbbe, + 0xfbbfbbe5, + 0xeff77f77, + 0xbfbbeefe, + 0xf77f77fb, + 0xdfeefeef, + 0x7f77ddfd, + 0xfbbfddf7, + 0x77f77fbb, + 0xbeefeeff, + 0x3bbfb, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf77e0000, + 0xefeeff77, + 0x7ddfddfe, + 0xddf777f7, + 0xbfbbfddf, + 0xf77f77fb, + 0x77fddfdd, + 0xfeeff77f, + 0xf77ddfdd, + 0xefeeff77, + 0xfddfddfe, + 0xeefbbfbb, + 0xef95feef, + 0xfddfeefe, + 0xbbfbbfdd, + 0xdfeefeef, + 0xfbbfddfd, + 0x77f77fbb, + 0x77ddfddf, + 0xfeefeeff, + 0xbbfddfdd, + 0xefeefbbf, + 0xe, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] = +{ + 0x0, + 0x0, + 0x400000, + 0x4000000, + 0x0, + 0x0, + 0x8000, + 0x400400, + 0x10008008, + 0x40040100, + 0x1001000, + 0x40020020, + 0x100400, + 0x4004001, + 0x100080, + 0x400401, + 0x10008008, + 0x200100, + 0x800802, + 0x8008000, + 0x100100, + 0x802002, + 0x10010008, + 0x200200, + 0x1004004, + 0x8004010, + 0x100080, + 0x2002001, + 0x8008, + 0x0, + 0x0, + 0x100, + 0x1000, + 0x0, + 0x0, + 0x10000002, + 0x200100, + 0x4004002, + 0x40010010, + 0x800400, + 0x10010008, + 0x40040, + 0x2001001, + 0x10040040, + 0x200100, + 0x4004002, + 0x20080080, + 0x200, + 0x4002002, + 0x80080040, + 0x200200, + 0x8004004, + 0x100080, + 0x400401, + 0x2002001, + 0x80040040, + 0x200800, + 0x2, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbbfbbe0, + 0xeff77f77, + 0xbfbbeefe, + 0x3b, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xef800000, + 0xfddfeefe, + 0xbbfbbfdd, + 0xeefeef, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0xdde00000, + 0x1, + 0x0, + 0x777800, + 0x0, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0xde000000, + 0x1d, + 0x0, + 0x0, + 0xeef0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0x77780, + 0x0, + 0xe0000000, + 0x1dd, + 0x0, + 0xc0000000, + 0x3bb, + 0x0, + 0x0, + 0x3bbc00, + 0x0, + 0x0, + 0x777800, + 0x0, + 0x0, + 0xbbc00000, + 0x3, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf77f77c0, + 0xdfeefeef, + 0x7f77ddfd, + 0x77, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xdf000000, + 0xfbbfddfd, + 0x77f77fbb, + 0x1ddfddf, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0x1dde, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0x0, + 0xeef0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0xeef0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0x1dde00, + 0x0, + 0x0, + 0x3bbc00, + 0x0, + 0x0, + 0xbbc00000, + 0x3, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0x0, + 0x3bbc, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] = +{ + 0x0, + 0x0, + 0x58000, + 0x580e00, + 0x0, + 0x0, + 0xb00, + 0xb0058058, + 0x1600b00, + 0x5805816, + 0xc0160160, + 0x5802c02, + 0x16016058, + 0x580580, + 0x1601600b, + 0xb0058058, + 0x1600b00, + 0x2c02c016, + 0x700b00b0, + 0xb00b00, + 0x2c016016, + 0xb00b02c0, + 0x1601600, + 0x5802c02c, + 0x60160580, + 0xb00581, + 0x1601600b, + 0xb02c02c0, + 0xb00, + 0x0, + 0x0, + 0x38000016, + 0x160, + 0x0, + 0x2c000000, + 0x1600000, + 0x2c02c016, + 0x60580580, + 0x5801601, + 0xb00b0058, + 0x81601600, + 0x16005805, + 0x802c0160, + 0x1605805, + 0x2c02c016, + 0x580580, + 0x2c0b00b, + 0x2c01c02c, + 0x805802c0, + 0xb00b005, + 0x5802c02c, + 0xb00580, + 0x1601600b, + 0x16058058, + 0x802c02c0, + 0xb005805, + 0x2c02c0b0, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] = +{ + 0x0, + 0x0, + 0x50000, + 0x500c00, + 0x0, + 0x0, + 0xa00, + 0xa0050050, + 0x1400a00, + 0x5005014, + 0x80140140, + 0x5002802, + 0x14014050, + 0x500500, + 0x1401400a, + 0xa0050050, + 0x1400a00, + 0x28028014, + 0x600a00a0, + 0xa00a00, + 0x28014014, + 0xa00a0280, + 0x1401400, + 0x50028028, + 0x40140500, + 0xa00501, + 0x1401400a, + 0xa0280280, + 0xa00, + 0x0, + 0x0, + 0x30000014, + 0x140, + 0x0, + 0x28000000, + 0x1400000, + 0x28028014, + 0x40500500, + 0x5001401, + 0xa00a0050, + 0x1401400, + 0x14005005, + 0x280140, + 0x1405005, + 0x28028014, + 0x500500, + 0x280a00a, + 0x28018028, + 0x500280, + 0xa00a005, + 0x50028028, + 0xa00500, + 0x1401400a, + 0x14050050, + 0x280280, + 0xa005005, + 0x280280a0, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] = +{ + 0x0, + 0x0, + 0xd80000, + 0xd80a000, + 0x0, + 0x0, + 0x1b000, + 0xd80d80, + 0x3601b01b, + 0xd80d8360, + 0x3603600, + 0xd806c06c, + 0x60360d80, + 0xd80d803, + 0x603601b0, + 0xd80d83, + 0x3601b01b, + 0xc06c0360, + 0x1b01b06, + 0x1b01b005, + 0xc0360360, + 0x1b06c06, + 0x3603601b, + 0x806c06c0, + 0x360d80d, + 0x1b00d836, + 0x603601b0, + 0x6c06c03, + 0x1b01b, + 0x0, + 0x0, + 0x80000360, + 0x3602, + 0x0, + 0xc0000000, + 0x36000006, + 0xc06c0360, + 0xd80d806, + 0xd8036036, + 0x1b00d80, + 0x3603601b, + 0x600d80d8, + 0x6c03603, + 0x360d80d8, + 0xc06c0360, + 0xd80d806, + 0x6c1b01b0, + 0xc01406c0, + 0xd806c06, + 0xb01b00d8, + 0x806c06c1, + 0x1b00d80d, + 0x603601b0, + 0x60d80d83, + 0x6c06c03, + 0xb00d80d8, + 0xc06c1b01, + 0x6, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x100000, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] = +{ + 0x0, + 0x0, + 0x1000000, + 0x10000000, + 0x0, + 0x0, + 0x20000, + 0x1001000, + 0x40020020, + 0x100400, + 0x4004001, + 0x80080, + 0x401001, + 0x10010004, + 0x400200, + 0x1001004, + 0x40020020, + 0x800400, + 0x2002008, + 0x20020000, + 0x400400, + 0x2008008, + 0x40040020, + 0x800800, + 0x4010010, + 0x20010040, + 0x400200, + 0x8008004, + 0x20020, + 0x0, + 0x0, + 0x400, + 0x4000, + 0x0, + 0x0, + 0x40000008, + 0x800400, + 0x10010008, + 0x40040, + 0x2001001, + 0x40040020, + 0x100100, + 0x8004004, + 0x40100100, + 0x800400, + 0x10010008, + 0x80200200, + 0x800, + 0x10008008, + 0x200100, + 0x800802, + 0x20010010, + 0x400200, + 0x1001004, + 0x8008004, + 0x100100, + 0x802002, + 0x8, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] = +{ + 0x0, + 0x0, + 0x840000, + 0x8400000, + 0x0, + 0x0, + 0x10800, + 0x80840840, + 0x21010810, + 0x84084210, + 0x2102100, + 0x84042042, + 0x10210840, + 0x8408402, + 0x10210108, + 0x80840842, + 0x21010810, + 0x20420210, + 0x1081084, + 0x10810800, + 0x20210210, + 0x81084204, + 0x21021010, + 0x40420420, + 0x2108408, + 0x10808421, + 0x10210108, + 0x84204202, + 0x10810, + 0x0, + 0x0, + 0x210, + 0x2100, + 0x0, + 0x20000000, + 0x21000004, + 0x20420210, + 0x8408404, + 0x84021021, + 0x81080840, + 0x21021010, + 0x10084084, + 0x4202102, + 0x21084084, + 0x20420210, + 0x8408404, + 0x42108108, + 0x20000420, + 0x8404204, + 0x8108084, + 0x40420421, + 0x10808408, + 0x10210108, + 0x10840842, + 0x4204202, + 0x8084084, + 0x20421081, + 0x4, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] = +{ + 0x0, + 0x0, + 0x0, + 0x20000000, + 0x0, + 0x8000, + 0x4003bb00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbbe0000, + 0x77f77fbb, + 0xbeefeeff, + 0x3bbfb, + 0x0, + 0x0, + 0x0, + 0x8000, + 0x0, + 0xec000002, + 0x1000e, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfeefeef8, + 0xbbfddfdd, + 0xefeefbbf, + 0xe, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xdde00000, + 0x1, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0x1dde000, + 0x0, + 0x0, + 0x3bbc000, + 0x0, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0x78000000, + 0x77, + 0x0, + 0x0, + 0x3bbc0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77780, + 0x0, + 0x0, + 0x1dde00, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0xeef, + 0x0, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0x1dde000, + 0x0, + 0x0, + 0xef000000, + 0xe, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[4] = +{ + 0x33033198, + 0xcc66066, + 0x198198cc, + 0x6633033, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[4] = +{ + 0x44044220, + 0x11088088, + 0x22022110, + 0x8844044, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[4] = +{ + 0xffc00000, + 0xffffffff, + 0xffe00000, + 0x7fffffff, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[4] = +{ + 0x0, + 0xfffff800, + 0x0, + 0x7ffffc00, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[4] = +{ + 0xf80f87c0, + 0x3e1f01f0, + 0x7c07c3e0, + 0x1f0f80f8, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[4] = +{ + 0xfffffffe, + 0xffffffff, + 0xffffffff, + 0x7fffffff, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[4] = +{ + 0x1ff800, + 0x7fe003ff, + 0x800ffc00, + 0x3ff001ff, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[4] = +{ + 0xa23a2510, + 0xe8944744, + 0x511d1288, + 0x744a23a2, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag[4] = +{ + 0x0, + 0x0, + 0xffffffff, + 0x7fffffff, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[13] = +{ + 0x10, + 0x0, + 0x4, + 0x20003df6, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7fbef80, + 0xfbfdf7fd, + 0x7dfefbfe, + 0xf7dfefbf, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[34] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7bef00, + 0x0, + 0x0, + 0x0, + 0x1efbc, + 0x0, + 0x0, + 0xf0000000, + 0x7be, + 0x0, + 0x0, + 0xfbc00000, + 0x1e, + 0x0, + 0x0, + 0xc0000000, + 0x1efb, + 0x0, + 0x0, + 0xef000000, + 0x7b, + 0x0, + 0x0, + 0x0, + 0x7bef000, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[39] = +{ + 0x0, + 0x0, + 0x0, + 0x40, + 0x0, + 0x10, + 0x0, + 0x0, + 0x4000, + 0x40008000, + 0x20004000, + 0x10002000, + 0x1000200, + 0x1000200, + 0x800100, + 0x400080, + 0x40008, + 0x40008, + 0x40004, + 0x20004002, + 0x20000000, + 0x10001000, + 0x8000800, + 0x800400, + 0x40, + 0x100020, + 0x80010, + 0x80040008, + 0x80004000, + 0x40004000, + 0x20002000, + 0x2001000, + 0x400100, + 0x80008, + 0x40004, + 0x20002, + 0x10002001, + 0x44444000, + 0x44, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[17] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7dfefbe, + 0xfbeff7df, + 0xfdf7fbef, + 0x3df7fbe, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[35] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7800000, + 0x3d, + 0x0, + 0x0, + 0xf7de0000, + 0x0, + 0x0, + 0x0, + 0x3df7800, + 0x0, + 0x0, + 0x0, + 0xf7de0, + 0x0, + 0x0, + 0x0, + 0xf7de000, + 0x0, + 0x0, + 0x0, + 0x3df780, + 0x0, + 0x0, + 0x0, + 0x78000000, + 0x3df, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[35] = +{ + 0x0, + 0x0, + 0x0, + 0x40000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x40, + 0x0, + 0x0, + 0x0, + 0x1, + 0x0, + 0x4000000, + 0x4000000, + 0x0, + 0x0, + 0x0, + 0x100000, + 0x0, + 0x0, + 0x0, + 0x10000000, + 0x0, + 0x0, + 0x0, + 0x400000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x400, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[39] = +{ + 0x1e, + 0x0, + 0x4, + 0xe0003df6, + 0xe22fffff, + 0x1f7d, + 0x0, + 0x400, + 0x3df600, + 0xf7fbefe0, + 0xfbfdf7fd, + 0x7dfefbfe, + 0xf7dfefbf, + 0xf7dfefbe, + 0xfbeff7df, + 0xfdf7fbef, + 0xffdf7fbe, + 0x7fdf7fbe, + 0xbfdf7fdf, + 0xfbfdf7ef, + 0xfbfffffe, + 0x7dff7dfe, + 0xbeffbeff, + 0xfbefdf7f, + 0xf117fdf7, + 0xff7dfefb, + 0xffbeff7d, + 0xefdf7fbe, + 0xeffdf7fb, + 0xf7fdf7fb, + 0xfbfefbfd, + 0xefbf7dfe, + 0xfdf7f7df, + 0x7fbeffbe, + 0xbfdf7fdf, + 0xdfefbfef, + 0x7dfefbf7, + 0xffffffef, + 0x7ff, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf8000000, + 0x7fdf7fbe, + 0xbfdf7fdf, + 0xfbfdf7ef, + 0x1e, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[35] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3df780, + 0x0, + 0x0, + 0x0, + 0xf7de, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7de00000, + 0xf, + 0x0, + 0x0, + 0xe0000000, + 0xf7d, + 0x0, + 0x0, + 0xf7800000, + 0x3d, + 0x0, + 0x0, + 0x0, + 0x3df7800, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[37] = +{ + 0x0, + 0x0, + 0x0, + 0x180, + 0x0, + 0x60, + 0x0, + 0x0, + 0x18000, + 0x80030000, + 0xc0018001, + 0x6000c000, + 0x6000c00, + 0x6000c00, + 0x3000600, + 0x1800300, + 0x180030, + 0x180030, + 0x180018, + 0xc001800c, + 0xc0000000, + 0x60006000, + 0x30003000, + 0x3001800, + 0x180, + 0x6000c0, + 0x300060, + 0x180030, + 0x18003, + 0x80018003, + 0xc000c001, + 0xc006000, + 0x1800600, + 0x300030, + 0x180018, + 0xc000c, + 0x6000c006, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[21] = +{ + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x7fff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1fffe0, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x1fe, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7f80, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x1e3c, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x78f00, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x5568, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x155a00, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x79b0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1e6c00, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[25] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbe00000, + 0x7dff7dfe, + 0xbeffbeff, + 0xfbefdf7f, + 0x3df7, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[36] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbc00000, + 0x1e, + 0x0, + 0x0, + 0x7bef0000, + 0x0, + 0x0, + 0x78000000, + 0x3df, + 0x0, + 0x0, + 0x0, + 0x7bef0, + 0x0, + 0x0, + 0x0, + 0x7bef000, + 0x0, + 0x0, + 0x0, + 0x1efbc0, + 0x0, + 0x0, + 0x0, + 0xbc000000, + 0x1ef, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[37] = +{ + 0x0, + 0x0, + 0x4, + 0x0, + 0x8000, + 0x0, + 0x0, + 0x400, + 0x0, + 0x1000200, + 0x800100, + 0x4000a0, + 0x40000, + 0x40008, + 0x80020004, + 0x10002, + 0x20001000, + 0x10001000, + 0x8001400, + 0x800000, + 0x800000, + 0x400040, + 0x280020, + 0x10, + 0x80004001, + 0x40004000, + 0x28002000, + 0x1000, + 0x2000100, + 0x1000100, + 0xa00080, + 0x40, + 0x4, + 0x10002000, + 0x8001000, + 0x4000a00, + 0x400000, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[25] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x22f0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1178000, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata[25] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x2080000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1040000, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[10] = +{ + 0x0, + 0x0, + 0x0, + 0x20000000, + 0x20000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x20, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[37] = +{ + 0x0, + 0x0, + 0x0, + 0x100, + 0x0, + 0x40, + 0x0, + 0x0, + 0x10000, + 0x20000, + 0x80010001, + 0x40008000, + 0x4000800, + 0x4000800, + 0x2000400, + 0x1000200, + 0x100020, + 0x100020, + 0x100010, + 0x80010008, + 0x80000000, + 0x40004000, + 0x20002000, + 0x2001000, + 0x100, + 0x400080, + 0x200040, + 0x100020, + 0x10002, + 0x10002, + 0x80008001, + 0x8004000, + 0x1000400, + 0x200020, + 0x100010, + 0x80008, + 0x40008004, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[10] = +{ + 0x18, + 0x0, + 0x4, + 0xe0003df6, + 0xe22fffff, + 0x1f7d, + 0x0, + 0x400, + 0x3df600, + 0x20, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7fbefc0, + 0xfbfdf7fd, + 0x7dfefbfe, + 0xf7dfefbf, + 0xf7dfefbe, + 0xfbeff7df, + 0xfdf7fbef, + 0xffdf7fbe, + 0x7fdf7fbe, + 0xbfdf7fdf, + 0xfbfdf7ef, + 0xfbfffffe, + 0x7dff7dfe, + 0xbeffbeff, + 0xfbefdf7f, + 0xf117fdf7, + 0xff7dfefb, + 0xffbeff7d, + 0xefdf7fbe, + 0xeffdf7fb, + 0xf7fdf7fb, + 0xfbfefbfd, + 0xefbf7dfe, + 0xfdf7f7df, + 0x7fbeffbe, + 0xbfdf7fdf, + 0xdfefbfef, + 0x7dfefbf7, + 0xf, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffffffe0, + 0xff, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffffffc0, + 0xf, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffffff80, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfffff00, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfffe00, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffc00, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf800, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x66666000, + 0x66, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x88888000, + 0x88, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[39] = +{ + 0x0, + 0x0, + 0x0, + 0x400, + 0x0, + 0x100, + 0x0, + 0x0, + 0x40000, + 0x80000, + 0x40004, + 0x20002, + 0x10002001, + 0x10002000, + 0x8001000, + 0x4000800, + 0x400080, + 0x400080, + 0x400040, + 0x40020, + 0x2, + 0x10002, + 0x80008001, + 0x8004000, + 0x400, + 0x1000200, + 0x800100, + 0x400080, + 0x40008, + 0x40008, + 0x20004, + 0x20010002, + 0x4001000, + 0x800080, + 0x400040, + 0x200020, + 0x20010, + 0x1, + 0x100, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[29] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xe0000000, + 0xff7dfefb, + 0xffbeff7d, + 0xefdf7fbe, + 0x3df7fb, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[36] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1efbc0, + 0x0, + 0x0, + 0x0, + 0x7bef, + 0x0, + 0x0, + 0x3df7800, + 0x0, + 0x0, + 0x0, + 0xbef00000, + 0x7, + 0x0, + 0x0, + 0xf0000000, + 0x7be, + 0x0, + 0x0, + 0xfbc00000, + 0x1e, + 0x0, + 0x0, + 0x0, + 0x1efbc00, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x200, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[33] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xef800000, + 0xf7fdf7fb, + 0xfbfefbfd, + 0xefbf7dfe, + 0xf7df, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[37] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7de00000, + 0xf, + 0x0, + 0x0, + 0x3df78000, + 0x0, + 0x0, + 0xbc000000, + 0x1ef, + 0x0, + 0x0, + 0x0, + 0x3df78, + 0x0, + 0x0, + 0x0, + 0x3df7800, + 0x0, + 0x0, + 0x0, + 0xf7de0, + 0x0, + 0x0, + 0x0, + 0xde000000, + 0xf7, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1[33] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3df70000, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[37] = +{ + 0x0, + 0x0, + 0x0, + 0x16, + 0x800e0000, + 0x5, + 0x0, + 0x0, + 0x1600, + 0x16002c00, + 0xb001600, + 0x5800b00, + 0x5800b0, + 0x5800b0, + 0x2c0058, + 0xc016002c, + 0xc0016002, + 0x60016002, + 0xb0016001, + 0xb001600, + 0xb000000, + 0x5800580, + 0x2c002c0, + 0x2c0160, + 0x70016, + 0x8005800b, + 0xc002c005, + 0x2c016002, + 0x2c001600, + 0x16001600, + 0xb000b00, + 0xb00580, + 0xc0160058, + 0x6002c002, + 0xb0016001, + 0x5800b000, + 0x5800b00, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[37] = +{ + 0x0, + 0x0, + 0x0, + 0x14, + 0xc0000, + 0x5, + 0x0, + 0x0, + 0x1400, + 0x14002800, + 0xa001400, + 0x5000a00, + 0x5000a0, + 0x5000a0, + 0x280050, + 0x80140028, + 0x80014002, + 0x40014002, + 0xa0014001, + 0xa001400, + 0xa000000, + 0x5000500, + 0x2800280, + 0x280140, + 0x60014, + 0x5000a, + 0x80028005, + 0x28014002, + 0x28001400, + 0x14001400, + 0xa000a00, + 0xa00500, + 0x80140050, + 0x40028002, + 0xa0014001, + 0x5000a000, + 0x5000a00, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[38] = +{ + 0x0, + 0x0, + 0x0, + 0x1de0, + 0x2200000, + 0x778, + 0x0, + 0x0, + 0x1de000, + 0xe03bc000, + 0xf01de01d, + 0x780ef00e, + 0x7780ef07, + 0x7780ef00, + 0x3bc07780, + 0x1de03bc0, + 0x1de03bc, + 0x1de03bc, + 0x1de01de, + 0xf01de0ef, + 0xf000000e, + 0x7807780e, + 0xbc03bc07, + 0x3bc1de03, + 0x1101de0, + 0x7780ef0, + 0x3bc0778, + 0xc1de03bc, + 0xc01de03b, + 0xe01de03b, + 0xf00ef01d, + 0xef07780e, + 0x1de07780, + 0x3bc03bc, + 0x1de01de, + 0x80ef00ef, + 0x780ef077, + 0x7, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[39] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x400, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[38] = +{ + 0x0, + 0x0, + 0x0, + 0x2000, + 0x0, + 0x800, + 0x0, + 0x0, + 0x200000, + 0x400000, + 0x200020, + 0x100010, + 0x80010008, + 0x80010000, + 0x40008000, + 0x20004000, + 0x2000400, + 0x2000400, + 0x2000200, + 0x200100, + 0x10, + 0x80010, + 0x40008, + 0x40020004, + 0x2000, + 0x8001000, + 0x4000800, + 0x2000400, + 0x200040, + 0x200040, + 0x100020, + 0x80010, + 0x20008001, + 0x4000400, + 0x2000200, + 0x1000100, + 0x100080, + 0x8, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[38] = +{ + 0x0, + 0x0, + 0x0, + 0x810, + 0x0, + 0x204, + 0x0, + 0x0, + 0x81000, + 0x10102000, + 0x8081008, + 0x4040804, + 0x20404082, + 0x20404080, + 0x10202040, + 0x8101020, + 0x810102, + 0x810102, + 0x80810081, + 0x8081040, + 0x8000004, + 0x4020404, + 0x2010202, + 0x10208101, + 0x810, + 0x2040408, + 0x1020204, + 0x20810102, + 0x20081010, + 0x10081010, + 0x8040808, + 0x40820404, + 0x8102040, + 0x1020102, + 0x80810081, + 0x40408040, + 0x4040820, + 0x2, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[38] = +{ + 0x0, + 0x0, + 0x0, + 0x1000, + 0x0, + 0x400, + 0x0, + 0x0, + 0x100000, + 0x200000, + 0x100010, + 0x80008, + 0x40008004, + 0x40008000, + 0x20004000, + 0x10002000, + 0x1000200, + 0x1000200, + 0x1000100, + 0x100080, + 0x8, + 0x40008, + 0x20004, + 0x20010002, + 0x1000, + 0x4000800, + 0x2000400, + 0x1000200, + 0x100020, + 0x100020, + 0x80010, + 0x80040008, + 0x10004000, + 0x2000200, + 0x1000100, + 0x800080, + 0x80040, + 0x4, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1000, + 0x0, + 0x400, + 0x3df600, + 0x20, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7fbef800, + 0xbfdf7fdf, + 0xdfefbfef, + 0x7dfefbf7, + 0xf, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7de0000, + 0x0, + 0x0, + 0x0, + 0x3df7800, + 0x0, + 0x0, + 0xfbc00000, + 0x1e, + 0x0, + 0x0, + 0x80000000, + 0x3df7, + 0x0, + 0x0, + 0x0, + 0x3df780, + 0x0, + 0x0, + 0x0, + 0xf7de, + 0x0, + 0x0, + 0x0, + 0x7de00000, + 0xf, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = +{ + 0x8, +}; + + +static bcmpkt_rxpmd_match_id_db_t +bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_CNTAG", + .match = 0x100, + .match_mask = 0x180, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x80, + .match_mask = 0x180, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x1ff, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 8, + .minbit = 0, + .value = 0x0, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_SVTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x18, + .match_mask = 0x418, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x10000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x4, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x38, + .match_mask = 0x438, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", + .match = 0x18000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x6, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x810, + .match_mask = 0x3c18, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 55, + .pminbit = 38, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", + .match = 0x100, + .match_mask = 0x180, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x80, + .match_mask = 0x180, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x1ff, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 0, + .value = 0x0, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x18, + .match_mask = 0x418, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x10000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x4, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x38, + .match_mask = 0x438, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", + .match = 0x18000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x6, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x810, + .match_mask = 0x3c18, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 28, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_CNTAG", + .match = 0x100, + .match_mask = 0x180, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 37, + .pminbit = 29, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x1ff, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 8, + .minbit = 0, + .value = 0x0, + .pmaxbit = 37, + .pminbit = 29, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 37, + .match_minbit = 29, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 37, + .pminbit = 29, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 55, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 42, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 55, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 55, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 45, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 56, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 48, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 56, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 48, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 48, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 51, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 54, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 55, + .match_minbit = 38, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 55, + .pminbit = 38, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_CNTAG", + .match = 0x100, + .match_mask = 0x180, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x80, + .match_mask = 0x180, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x1ff, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 0, + .value = 0x0, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SVTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x9, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 13, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 34, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0x2c000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0xb, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 17, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 35, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 35, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x30000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0xc, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 35, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x18, + .match_mask = 0x418, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x10000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x4, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x38, + .match_mask = 0x438, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x8000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 25, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", + .match = 0x2c0, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0xb, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 25, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", + .match = 0xc000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x3, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 25, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 10, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 10, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3ffff, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 0, + .value = 0x0, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", + .match = 0x34000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0xd, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x14000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x5, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", + .match = 0x20000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x8, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 33, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", + .match = 0x18000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x6, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 33, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x1c000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0x7, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x810, + .match_mask = 0x3c18, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", + .match = 0x28000, + .match_mask = 0x3c000, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 17, + .minbit = 14, + .value = 0xa, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 28, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 28, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_sys_hdr_loopback, + + }, + { + /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db_info = { + .num_entries = 228, + .db = bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db_info_get(void) { + return &bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map_info = { + .num_entries = 228, + .map = bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map_info_get(void) { + return &bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_pkt_flexhdr.c new file mode 100644 index 000000000000..6a9ef87e6e4f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_pkt_flexhdr.c @@ -0,0 +1,11636 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56890_a0 and variant dna_6_5_29_1_2. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[13] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[13] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[13] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[13] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[13] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[13] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[13] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[13] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DEFAULT); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SRV6); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[13] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[13] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[13] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[13] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[13] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[13] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[13] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[13] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[13] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[13] |= (0x1 << 31); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SRV6)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { + reason[12] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_data[] = { + { + .name = "BSCAN_CONTROL_DATA_15_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 415 }, /* Profile 2. */ + { 368, 383 }, /* Profile 3. */ + { 400, 415 }, /* Profile 4. */ + { 400, 415 }, /* Profile 5. */ + { 400, 415 }, /* Profile 6. */ + { 400, 415 }, /* Profile 7. */ + { 368, 383 }, /* Profile 8. */ + { 400, 415 }, /* Profile 9. */ + { 400, 415 }, /* Profile 10. */ + { 400, 415 }, /* Profile 11. */ + { 400, 415 }, /* Profile 12. */ + { 368, 383 }, /* Profile 13. */ + { 400, 415 }, /* Profile 14. */ + { 400, 415 }, /* Profile 15. */ + { 400, 415 }, /* Profile 16. */ + { 368, 383 }, /* Profile 17. */ + { 400, 415 }, /* Profile 18. */ + { 400, 415 }, /* Profile 19. */ + { 400, 415 }, /* Profile 20. */ + { 400, 415 }, /* Profile 21. */ + { 368, 383 }, /* Profile 22. */ + { 400, 415 }, /* Profile 23. */ + { 400, 415 }, /* Profile 24. */ + { 400, 415 }, /* Profile 25. */ + { 400, 415 }, /* Profile 26. */ + { 368, 383 }, /* Profile 27. */ + { 400, 415 }, /* Profile 28. */ + { 400, 415 }, /* Profile 29. */ + { 400, 415 }, /* Profile 30. */ + { 368, 383 }, /* Profile 31. */ + { 400, 415 }, /* Profile 32. */ + { 400, 415 }, /* Profile 33. */ + { 400, 415 }, /* Profile 34. */ + { 400, 415 }, /* Profile 35. */ + { 368, 383 }, /* Profile 36. */ + { 400, 415 }, /* Profile 37. */ + { 400, 415 }, /* Profile 38. */ + { 400, 415 }, /* Profile 39. */ + { 400, 415 }, /* Profile 40. */ + { 368, 383 }, /* Profile 41. */ + { 400, 415 }, /* Profile 42. */ + { 400, 415 }, /* Profile 43. */ + { 400, 415 }, /* Profile 44. */ + { 368, 383 }, /* Profile 45. */ + { 400, 415 }, /* Profile 46. */ + { 400, 415 }, /* Profile 47. */ + { 400, 415 }, /* Profile 48. */ + { 400, 415 }, /* Profile 49. */ + { 368, 383 }, /* Profile 50. */ + { 400, 415 }, /* Profile 51. */ + { 400, 415 }, /* Profile 52. */ + { 400, 415 }, /* Profile 53. */ + { 400, 415 }, /* Profile 54. */ + { 368, 383 }, /* Profile 55. */ + { 400, 415 }, /* Profile 56. */ + { 400, 415 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "BSCAN_CONTROL_FLAGS_3_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 476, 479 }, /* Profile 2. */ + { 456, 459 }, /* Profile 3. */ + { 476, 479 }, /* Profile 4. */ + { 476, 479 }, /* Profile 5. */ + { 476, 479 }, /* Profile 6. */ + { 476, 479 }, /* Profile 7. */ + { 456, 459 }, /* Profile 8. */ + { 476, 479 }, /* Profile 9. */ + { 476, 479 }, /* Profile 10. */ + { 476, 479 }, /* Profile 11. */ + { 476, 479 }, /* Profile 12. */ + { 456, 459 }, /* Profile 13. */ + { 476, 479 }, /* Profile 14. */ + { 476, 479 }, /* Profile 15. */ + { 476, 479 }, /* Profile 16. */ + { 456, 459 }, /* Profile 17. */ + { 476, 479 }, /* Profile 18. */ + { 476, 479 }, /* Profile 19. */ + { 476, 479 }, /* Profile 20. */ + { 476, 479 }, /* Profile 21. */ + { 456, 459 }, /* Profile 22. */ + { 476, 479 }, /* Profile 23. */ + { 476, 479 }, /* Profile 24. */ + { 476, 479 }, /* Profile 25. */ + { 476, 479 }, /* Profile 26. */ + { 456, 459 }, /* Profile 27. */ + { 476, 479 }, /* Profile 28. */ + { 476, 479 }, /* Profile 29. */ + { 476, 479 }, /* Profile 30. */ + { 456, 459 }, /* Profile 31. */ + { 476, 479 }, /* Profile 32. */ + { 476, 479 }, /* Profile 33. */ + { 476, 479 }, /* Profile 34. */ + { 476, 479 }, /* Profile 35. */ + { 456, 459 }, /* Profile 36. */ + { 476, 479 }, /* Profile 37. */ + { 476, 479 }, /* Profile 38. */ + { 476, 479 }, /* Profile 39. */ + { 476, 479 }, /* Profile 40. */ + { 456, 459 }, /* Profile 41. */ + { 476, 479 }, /* Profile 42. */ + { 476, 479 }, /* Profile 43. */ + { 476, 479 }, /* Profile 44. */ + { 456, 459 }, /* Profile 45. */ + { 476, 479 }, /* Profile 46. */ + { 476, 479 }, /* Profile 47. */ + { 476, 479 }, /* Profile 48. */ + { 476, 479 }, /* Profile 49. */ + { 456, 459 }, /* Profile 50. */ + { 476, 479 }, /* Profile 51. */ + { 476, 479 }, /* Profile 52. */ + { 476, 479 }, /* Profile 53. */ + { 476, 479 }, /* Profile 54. */ + { 456, 459 }, /* Profile 55. */ + { 476, 479 }, /* Profile 56. */ + { 476, 479 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 336, 351 }, /* Profile 16. */ + { 320, 335 }, /* Profile 17. */ + { 336, 351 }, /* Profile 18. */ + { 352, 367 }, /* Profile 19. */ + { 352, 367 }, /* Profile 20. */ + { 336, 351 }, /* Profile 21. */ + { 320, 335 }, /* Profile 22. */ + { 336, 351 }, /* Profile 23. */ + { 352, 367 }, /* Profile 24. */ + { 352, 367 }, /* Profile 25. */ + { 336, 351 }, /* Profile 26. */ + { 320, 335 }, /* Profile 27. */ + { 336, 351 }, /* Profile 28. */ + { 352, 367 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { 336, 351 }, /* Profile 44. */ + { 320, 335 }, /* Profile 45. */ + { 336, 351 }, /* Profile 46. */ + { 352, 367 }, /* Profile 47. */ + { 352, 367 }, /* Profile 48. */ + { 336, 351 }, /* Profile 49. */ + { 320, 335 }, /* Profile 50. */ + { 336, 351 }, /* Profile 51. */ + { 352, 367 }, /* Profile 52. */ + { 352, 367 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Profile 52. */ + { -1, -1 }, /* Profile 53. */ + { -1, -1 }, /* Profile 54. */ + { -1, -1 }, /* Profile 55. */ + { 420, 423 }, /* Profile 56. */ + }, + .profile_cnt = 57, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 48, 63 }, /* Profile 12. */ + { 48, 63 }, /* Profile 13. */ + { 48, 63 }, /* Profile 14. */ + { 48, 63 }, /* Profile 15. */ + { 48, 63 }, /* Profile 16. */ + { 48, 63 }, /* Profile 17. */ + { 48, 63 }, /* Profile 18. */ + { 48, 63 }, /* Profile 19. */ + { 48, 63 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, 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Profile 53. */ + { 48, 63 }, /* Profile 54. */ + { 48, 63 }, /* Profile 55. */ + { 48, 63 }, /* Profile 56. */ + { 48, 63 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "DVP_15_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { 128, 143 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ + { 128, 143 }, /* Profile 8. */ + { 128, 143 }, /* Profile 9. */ + { 128, 143 }, /* Profile 10. */ + { 128, 143 }, /* Profile 11. */ + { 128, 143 }, /* Profile 12. */ + { 128, 143 }, /* Profile 13. */ + { 128, 143 }, /* Profile 14. */ + { 128, 143 }, /* Profile 15. */ + { 128, 143 }, /* Profile 16. */ + { 128, 143 }, /* Profile 17. */ + { 128, 143 }, /* Profile 18. */ + { 128, 143 }, /* Profile 19. */ + { 128, 143 }, /* Profile 20. */ + { 128, 143 }, /* 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{ 352, 367 }, /* Profile 43. */ + }, + .profile_cnt = 44, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 444, 447 }, /* Profile 2. */ + { 424, 427 }, /* Profile 3. */ + { 448, 451 }, /* Profile 4. */ + { 444, 447 }, /* Profile 5. */ + { 444, 447 }, /* Profile 6. */ + { 444, 447 }, /* Profile 7. */ + { 424, 427 }, /* Profile 8. */ + { 448, 451 }, /* Profile 9. */ + { 444, 447 }, /* Profile 10. */ + { 444, 447 }, /* Profile 11. */ + { 444, 447 }, /* Profile 12. */ + { 424, 427 }, /* Profile 13. */ + { 448, 451 }, /* Profile 14. */ + { 444, 447 }, /* Profile 15. */ + { 444, 447 }, /* Profile 16. */ + { 424, 427 }, /* Profile 17. */ + { 448, 451 }, /* Profile 18. */ + { 444, 447 }, /* Profile 19. */ + { 444, 447 }, /* Profile 20. */ + { 444, 447 }, /* Profile 21. */ + { 424, 427 }, /* Profile 22. */ + { 448, 451 }, /* Profile 23. */ + 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/* Profile 53. */ + { 444, 447 }, /* Profile 54. */ + { 424, 427 }, /* Profile 55. */ + { 448, 451 }, /* Profile 56. */ + { 444, 447 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + { 112, 127 }, /* Profile 6. */ + { 112, 127 }, /* Profile 7. */ + { 112, 127 }, /* Profile 8. */ + { 112, 127 }, /* Profile 9. */ + { 112, 127 }, /* Profile 10. */ + { 112, 127 }, /* Profile 11. */ + { 112, 127 }, /* Profile 12. */ + { 112, 127 }, /* Profile 13. */ + { 112, 127 }, /* Profile 14. */ + { 112, 127 }, /* Profile 15. */ + { 112, 127 }, /* Profile 16. */ + { 112, 127 }, /* Profile 17. */ + { 112, 127 }, /* Profile 18. */ + { 112, 127 }, /* Profile 19. */ + { 112, 127 }, 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451 }, /* Profile 49. */ + { 432, 435 }, /* Profile 50. */ + { 452, 455 }, /* Profile 51. */ + { 448, 451 }, /* Profile 52. */ + { 448, 451 }, /* Profile 53. */ + }, + .profile_cnt = 54, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 224, 239 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 224, 239 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 224, 239 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 224, 239 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { 240, 255 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { 240, 255 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { -1, -1 }, /* Profile 45. */ + { -1, -1 }, /* Profile 46. */ + { 240, 255 }, /* Profile 47. */ + { -1, -1 }, /* Profile 48. */ + { -1, -1 }, /* Profile 49. */ + { -1, -1 }, /* Profile 50. */ + { -1, -1 }, /* Profile 51. */ + { 240, 255 }, /* Profile 52. */ + }, + .profile_cnt = 53, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 240, 255 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 240, 255 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 240, 255 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 240, 255 }, /* Profile 24. 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BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + { 0, 15 }, /* Profile 5. */ + { 0, 15 }, /* Profile 6. */ + { 0, 15 }, /* Profile 7. */ + { 0, 15 }, /* Profile 8. */ + { 0, 15 }, /* Profile 9. */ + { 0, 15 }, /* Profile 10. */ + { 0, 15 }, /* Profile 11. */ + { 0, 15 }, /* Profile 12. */ + { 0, 15 }, /* Profile 13. */ + { 0, 15 }, /* Profile 14. */ + { 0, 15 }, /* Profile 15. */ + { 0, 15 }, /* Profile 16. */ + { 0, 15 }, /* Profile 17. */ + { 0, 15 }, /* Profile 18. */ + { 0, 15 }, /* Profile 19. */ + { 0, 15 }, /* Profile 20. */ + { 0, 15 }, /* Profile 21. */ + { 0, 15 }, /* Profile 22. */ + { 0, 15 }, /* Profile 23. */ + { 0, 15 }, /* Profile 24. */ + { 0, 15 }, /* Profile 25. */ + { 0, 15 }, /* Profile 26. */ + { 0, 15 }, /* Profile 27. */ + { 0, 15 }, /* Profile 28. */ + { 0, 15 }, /* Profile 29. */ + { 0, 15 }, /* Profile 30. */ + { 0, 15 }, /* Profile 31. */ + { 0, 15 }, /* Profile 32. */ + { 0, 15 }, /* Profile 33. */ + { 0, 15 }, /* Profile 34. */ + { 0, 15 }, /* Profile 35. */ + { 0, 15 }, /* Profile 36. */ + { 0, 15 }, /* Profile 37. */ + { 0, 15 }, /* Profile 38. */ + { 0, 15 }, /* Profile 39. */ + { 0, 15 }, /* Profile 40. */ + { 0, 15 }, /* Profile 41. */ + { 0, 15 }, /* Profile 42. */ + { 0, 15 }, /* Profile 43. */ + { 0, 15 }, /* Profile 44. */ + { 0, 15 }, /* Profile 45. */ + { 0, 15 }, /* Profile 46. */ + { 0, 15 }, /* Profile 47. */ + { 0, 15 }, /* Profile 48. */ + { 0, 15 }, /* Profile 49. */ + { 0, 15 }, /* Profile 50. */ + { 0, 15 }, /* Profile 51. */ + { 0, 15 }, /* Profile 52. */ + { 0, 15 }, /* Profile 53. */ + { 0, 15 }, /* Profile 54. */ + { 0, 15 }, /* Profile 55. */ + { 0, 15 }, /* Profile 56. */ + { 0, 15 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "EVENT_TRACE_VECTOR_31_16", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 16, 31 }, /* Profile 2. */ + { 16, 31 }, /* Profile 3. */ + { 16, 31 }, /* Profile 4. */ + { 16, 31 }, /* Profile 5. */ + { 16, 31 }, /* Profile 6. */ + { 16, 31 }, /* Profile 7. */ + { 16, 31 }, /* Profile 8. */ + { 16, 31 }, /* Profile 9. */ + { 16, 31 }, /* Profile 10. */ + { 16, 31 }, /* Profile 11. */ + { 16, 31 }, /* Profile 12. */ + { 16, 31 }, /* Profile 13. */ + { 16, 31 }, /* Profile 14. */ + { 16, 31 }, /* Profile 15. */ + { 16, 31 }, /* Profile 16. */ + { 16, 31 }, /* Profile 17. */ + { 16, 31 }, /* Profile 18. */ + { 16, 31 }, /* Profile 19. */ + { 16, 31 }, /* Profile 20. */ + { 16, 31 }, /* Profile 21. */ + { 16, 31 }, /* Profile 22. */ + { 16, 31 }, /* Profile 23. */ + { 16, 31 }, /* Profile 24. */ + { 16, 31 }, /* Profile 25. */ + { 16, 31 }, /* Profile 26. */ + { 16, 31 }, /* Profile 27. */ + { 16, 31 }, /* Profile 28. */ + { 16, 31 }, /* Profile 29. */ + { 16, 31 }, /* Profile 30. */ + { 16, 31 }, /* Profile 31. */ + { 16, 31 }, /* Profile 32. */ + { 16, 31 }, /* Profile 33. */ + { 16, 31 }, /* Profile 34. */ + { 16, 31 }, /* Profile 35. */ + { 16, 31 }, /* Profile 36. */ + { 16, 31 }, /* Profile 37. */ + { 16, 31 }, /* Profile 38. */ + { 16, 31 }, /* Profile 39. */ + { 16, 31 }, /* Profile 40. */ + { 16, 31 }, /* Profile 41. */ + { 16, 31 }, /* Profile 42. */ + { 16, 31 }, /* Profile 43. */ + { 16, 31 }, /* Profile 44. */ + { 16, 31 }, /* Profile 45. */ + { 16, 31 }, /* Profile 46. */ + { 16, 31 }, /* Profile 47. */ + { 16, 31 }, /* Profile 48. */ + { 16, 31 }, /* Profile 49. */ + { 16, 31 }, /* Profile 50. */ + { 16, 31 }, /* Profile 51. */ + { 16, 31 }, /* Profile 52. */ + { 16, 31 }, /* Profile 53. */ + { 16, 31 }, /* Profile 54. */ + { 16, 31 }, /* Profile 55. */ + { 16, 31 }, /* Profile 56. */ + { 16, 31 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + { 32, 47 }, /* Profile 6. */ + { 32, 47 }, /* Profile 7. */ + { 32, 47 }, /* Profile 8. */ + { 32, 47 }, /* Profile 9. */ + { 32, 47 }, /* Profile 10. */ + { 32, 47 }, /* Profile 11. */ + { 32, 47 }, /* Profile 12. */ + { 32, 47 }, /* Profile 13. */ + { 32, 47 }, /* Profile 14. */ + { 32, 47 }, /* Profile 15. */ + { 32, 47 }, /* Profile 16. */ + { 32, 47 }, /* Profile 17. */ + { 32, 47 }, /* Profile 18. */ + { 32, 47 }, /* Profile 19. */ + { 32, 47 }, /* Profile 20. */ + { 32, 47 }, /* Profile 21. */ + { 32, 47 }, /* Profile 22. */ + { 32, 47 }, /* Profile 23. */ + { 32, 47 }, /* Profile 24. */ + { 32, 47 }, /* Profile 25. */ + { 32, 47 }, /* Profile 26. */ + { 32, 47 }, /* Profile 27. */ + { 32, 47 }, /* Profile 28. */ + { 32, 47 }, /* Profile 29. */ + { 32, 47 }, /* Profile 30. */ + { 32, 47 }, /* Profile 31. */ + { 32, 47 }, /* Profile 32. */ + { 32, 47 }, /* Profile 33. */ + { 32, 47 }, /* Profile 34. */ + { 32, 47 }, /* Profile 35. */ + { 32, 47 }, /* Profile 36. */ + { 32, 47 }, /* Profile 37. */ + { 32, 47 }, /* Profile 38. */ + { 32, 47 }, /* Profile 39. */ + { 32, 47 }, /* Profile 40. */ + { 32, 47 }, /* Profile 41. */ + { 32, 47 }, /* Profile 42. */ + { 32, 47 }, /* Profile 43. */ + { 32, 47 }, /* Profile 44. */ + { 32, 47 }, /* Profile 45. */ + { 32, 47 }, /* Profile 46. */ + { 32, 47 }, /* Profile 47. */ + { 32, 47 }, /* Profile 48. */ + { 32, 47 }, /* Profile 49. */ + { 32, 47 }, /* Profile 50. */ + { 32, 47 }, /* Profile 51. */ + { 32, 47 }, /* Profile 52. */ + { 32, 47 }, /* Profile 53. */ + { 32, 47 }, /* Profile 54. */ + { 32, 47 }, /* Profile 55. */ + { 32, 47 }, /* Profile 56. */ + { 32, 47 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "FLOW_ID_LSB_15_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 399 }, /* Profile 2. */ + { 352, 367 }, /* Profile 3. */ + { 384, 399 }, /* Profile 4. */ + { 384, 399 }, /* Profile 5. */ + { 384, 399 }, /* Profile 6. */ + { 384, 399 }, /* Profile 7. */ + { 352, 367 }, /* Profile 8. */ + { 384, 399 }, /* Profile 9. */ + { 384, 399 }, /* Profile 10. */ + { 384, 399 }, /* Profile 11. */ + { 384, 399 }, /* Profile 12. */ + { 352, 367 }, /* Profile 13. */ + { 384, 399 }, /* Profile 14. */ + { 384, 399 }, /* Profile 15. */ + { 384, 399 }, /* Profile 16. */ + { 352, 367 }, /* Profile 17. */ + { 384, 399 }, /* Profile 18. */ + { 384, 399 }, /* Profile 19. */ + { 384, 399 }, /* Profile 20. */ + { 384, 399 }, /* Profile 21. */ + { 352, 367 }, /* Profile 22. */ + { 384, 399 }, /* Profile 23. */ + { 384, 399 }, /* Profile 24. */ + { 384, 399 }, /* Profile 25. */ + { 384, 399 }, /* Profile 26. */ + { 352, 367 }, /* Profile 27. */ + { 384, 399 }, /* Profile 28. */ + { 384, 399 }, /* Profile 29. */ + { 384, 399 }, /* Profile 30. */ + { 352, 367 }, /* Profile 31. */ + { 384, 399 }, /* Profile 32. */ + { 384, 399 }, /* Profile 33. */ + { 384, 399 }, /* Profile 34. */ + { 384, 399 }, /* Profile 35. */ + { 352, 367 }, /* Profile 36. */ + { 384, 399 }, /* Profile 37. */ + { 384, 399 }, /* Profile 38. */ + { 384, 399 }, /* Profile 39. */ + { 384, 399 }, /* Profile 40. */ + { 352, 367 }, /* Profile 41. */ + { 384, 399 }, /* Profile 42. */ + { 384, 399 }, /* Profile 43. */ + { 384, 399 }, /* Profile 44. */ + { 352, 367 }, /* Profile 45. */ + { 384, 399 }, /* Profile 46. */ + { 384, 399 }, /* Profile 47. */ + { 384, 399 }, /* Profile 48. */ + { 384, 399 }, /* Profile 49. */ + { 352, 367 }, /* Profile 50. */ + { 384, 399 }, /* Profile 51. */ + { 384, 399 }, /* Profile 52. */ + { 384, 399 }, /* Profile 53. */ + { 384, 399 }, /* Profile 54. */ + { 352, 367 }, /* Profile 55. */ + { 384, 399 }, /* Profile 56. */ + { 384, 399 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "FLOW_ID_MSB_3_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 472, 475 }, /* Profile 12. */ + { 452, 455 }, /* Profile 13. */ + { 472, 475 }, /* Profile 14. */ + { 472, 475 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { 472, 475 }, /* Profile 26. */ + { 452, 455 }, /* Profile 27. */ + { 472, 475 }, /* Profile 28. */ + { 472, 475 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { 472, 475 }, /* Profile 40. */ + { 452, 455 }, /* Profile 41. */ + { 472, 475 }, /* Profile 42. */ + { 472, 475 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { -1, -1 }, /* Profile 45. */ + { -1, -1 }, /* Profile 46. */ + { -1, -1 }, /* Profile 47. */ + { -1, -1 }, /* Profile 48. */ + { -1, -1 }, /* Profile 49. */ + { -1, -1 }, /* Profile 50. */ + { -1, -1 }, /* Profile 51. */ + { -1, -1 }, /* Profile 52. */ + { -1, -1 }, /* Profile 53. */ + { 472, 475 }, /* Profile 54. */ + { 452, 455 }, /* Profile 55. */ + { 472, 475 }, /* Profile 56. */ + { 472, 475 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 287 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { 272, 287 }, /* Profile 4. */ + { 304, 319 }, /* Profile 5. */ + { 304, 319 }, /* Profile 6. */ + { 272, 287 }, /* Profile 7. */ + { 272, 287 }, /* Profile 8. */ + { 272, 287 }, /* Profile 9. */ + { 304, 319 }, /* Profile 10. */ + { 304, 319 }, /* Profile 11. */ + { 272, 287 }, /* Profile 12. */ + { 272, 287 }, /* Profile 13. */ + { 272, 287 }, /* Profile 14. */ + { 304, 319 }, /* Profile 15. */ + { 272, 287 }, /* Profile 16. */ + { 272, 287 }, /* Profile 17. */ + { 272, 287 }, /* Profile 18. */ + { 304, 319 }, /* Profile 19. */ + { 304, 319 }, /* Profile 20. */ + { 272, 287 }, /* Profile 21. */ + { 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Profile 51. */ + { 304, 319 }, /* Profile 52. */ + { 304, 319 }, /* Profile 53. */ + { 272, 287 }, /* Profile 54. */ + { 272, 287 }, /* Profile 55. */ + { 272, 287 }, /* Profile 56. */ + { 304, 319 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "IFP_IOAM_GBP_ACTION_3_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 436, 439 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 440, 443 }, /* Profile 4. */ + { 436, 439 }, /* Profile 5. */ + { 436, 439 }, /* Profile 6. */ + { 436, 439 }, /* Profile 7. */ + { 408, 411 }, /* Profile 8. */ + { 440, 443 }, /* Profile 9. */ + { 436, 439 }, /* Profile 10. */ + { 436, 439 }, /* Profile 11. */ + { 436, 439 }, /* Profile 12. */ + { 408, 411 }, /* Profile 13. */ + { 440, 443 }, /* Profile 14. */ + { 436, 439 }, /* Profile 15. */ + { 436, 439 }, /* Profile 16. */ + { 408, 411 }, /* Profile 17. */ + { 440, 443 }, /* Profile 18. */ + { 436, 439 }, /* Profile 19. */ + { 436, 439 }, /* Profile 20. */ + { 436, 439 }, /* Profile 21. */ + { 408, 411 }, /* Profile 22. */ + { 440, 443 }, /* Profile 23. */ + { 436, 439 }, /* Profile 24. */ + { 436, 439 }, /* Profile 25. */ + { 436, 439 }, /* Profile 26. */ + { 408, 411 }, /* Profile 27. */ + { 440, 443 }, /* Profile 28. */ + { 436, 439 }, /* Profile 29. */ + { 436, 439 }, /* Profile 30. */ + { 408, 411 }, /* Profile 31. */ + { 440, 443 }, /* Profile 32. */ + { 436, 439 }, /* Profile 33. */ + { 436, 439 }, /* Profile 34. */ + { 436, 439 }, /* Profile 35. */ + { 408, 411 }, /* Profile 36. */ + { 440, 443 }, /* Profile 37. */ + { 436, 439 }, /* Profile 38. */ + { 436, 439 }, /* Profile 39. */ + { 436, 439 }, /* Profile 40. */ + { 408, 411 }, /* Profile 41. */ + { 440, 443 }, /* Profile 42. */ + { 436, 439 }, /* Profile 43. */ + { 436, 439 }, /* Profile 44. */ + { 408, 411 }, /* Profile 45. */ + { 440, 443 }, /* Profile 46. */ + { 436, 439 }, /* Profile 47. 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Profile 14. */ + { 420, 423 }, /* Profile 15. */ + { 420, 423 }, /* Profile 16. */ + { 388, 391 }, /* Profile 17. */ + { 424, 427 }, /* Profile 18. */ + { 420, 423 }, /* Profile 19. */ + { 420, 423 }, /* Profile 20. */ + { 420, 423 }, /* Profile 21. */ + { 388, 391 }, /* Profile 22. */ + { 424, 427 }, /* Profile 23. */ + { 420, 423 }, /* Profile 24. */ + { 420, 423 }, /* Profile 25. */ + { 420, 423 }, /* Profile 26. */ + { 388, 391 }, /* Profile 27. */ + { 424, 427 }, /* Profile 28. */ + { 420, 423 }, /* Profile 29. */ + { 420, 423 }, /* Profile 30. */ + { 388, 391 }, /* Profile 31. */ + { 424, 427 }, /* Profile 32. */ + { 420, 423 }, /* Profile 33. */ + { 420, 423 }, /* Profile 34. */ + { 420, 423 }, /* Profile 35. */ + { 388, 391 }, /* Profile 36. */ + { 424, 427 }, /* Profile 37. */ + { 420, 423 }, /* Profile 38. */ + { 420, 423 }, /* Profile 39. */ + { 420, 423 }, /* Profile 40. */ + { 388, 391 }, /* Profile 41. */ + { 424, 427 }, /* Profile 42. */ + { 420, 423 }, /* Profile 43. */ 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= { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 456, 459 }, /* Profile 2. */ + { 436, 439 }, /* Profile 3. */ + { 456, 459 }, /* Profile 4. */ + { 452, 455 }, /* Profile 5. */ + { 452, 455 }, /* Profile 6. */ + { 456, 459 }, /* Profile 7. */ + { 436, 439 }, /* Profile 8. */ + { 456, 459 }, /* Profile 9. */ + { 452, 455 }, /* Profile 10. */ + { 452, 455 }, /* Profile 11. */ + { 452, 455 }, /* Profile 12. */ + { 432, 435 }, /* Profile 13. */ + { 452, 455 }, /* Profile 14. */ + { 448, 451 }, /* Profile 15. */ + { 456, 459 }, /* Profile 16. */ + { 436, 439 }, /* Profile 17. */ + { 456, 459 }, /* Profile 18. */ + { 452, 455 }, /* Profile 19. */ + { 452, 455 }, /* Profile 20. */ + { 456, 459 }, /* Profile 21. */ + { 436, 439 }, /* Profile 22. */ + { 456, 459 }, /* Profile 23. */ + { 452, 455 }, /* Profile 24. */ + { 452, 455 }, /* Profile 25. */ + { 452, 455 }, /* Profile 26. */ + { 432, 435 }, /* Profile 27. */ + { 452, 455 }, /* Profile 28. */ + { 448, 451 }, /* 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{ + .name = "INT_PRI_3_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 424, 427 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 428, 431 }, /* Profile 4. */ + { 424, 427 }, /* Profile 5. */ + { 424, 427 }, /* Profile 6. */ + { 424, 427 }, /* Profile 7. */ + { 392, 395 }, /* Profile 8. */ + { 428, 431 }, /* Profile 9. */ + { 424, 427 }, /* Profile 10. */ + { 424, 427 }, /* Profile 11. */ + { 424, 427 }, /* Profile 12. */ + { 392, 395 }, /* Profile 13. */ + { 428, 431 }, /* Profile 14. */ + { 424, 427 }, /* Profile 15. */ + { 424, 427 }, /* Profile 16. */ + { 392, 395 }, /* Profile 17. */ + { 428, 431 }, /* Profile 18. */ + { 424, 427 }, /* Profile 19. */ + { 424, 427 }, /* Profile 20. */ + { 424, 427 }, /* Profile 21. */ + { 392, 395 }, /* Profile 22. */ + { 428, 431 }, /* Profile 23. */ + { 424, 427 }, /* Profile 24. */ + { 424, 427 }, /* Profile 25. */ + { 424, 427 }, /* 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+ { 428, 431 }, /* Profile 56. */ + { 424, 427 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "L2_IIF_12_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L2_IIF_12_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 252 }, /* Profile 2. */ + { 240, 252 }, /* Profile 3. */ + { 240, 252 }, /* Profile 4. */ + { 272, 284 }, /* Profile 5. */ + { 272, 284 }, /* Profile 6. */ + { 240, 252 }, /* Profile 7. */ + { 240, 252 }, /* Profile 8. */ + { 240, 252 }, /* Profile 9. */ + { 272, 284 }, /* Profile 10. */ + { 272, 284 }, /* Profile 11. */ + { 240, 252 }, /* Profile 12. */ + { 240, 252 }, /* Profile 13. */ + { 240, 252 }, /* Profile 14. */ + { 272, 284 }, /* Profile 15. */ + { 240, 252 }, /* Profile 16. */ + { 240, 252 }, /* Profile 17. */ + { 240, 252 }, /* Profile 18. */ + { 272, 284 }, /* Profile 19. */ + { 272, 284 }, /* Profile 20. */ + { 240, 252 }, /* Profile 21. */ + { 240, 252 }, /* Profile 22. */ + { 240, 252 }, /* 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"SRV6_DIP_EDIT_CTRL_3_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 428, 431 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 428, 431 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 428, 431 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { 428, 431 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { 428, 431 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { 428, 431 }, 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"SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 396, 399 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 396, 399 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { 396, 399 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { 396, 399 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. 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+ { 460, 463 }, /* Profile 37. */ + { 460, 463 }, /* Profile 38. */ + { 460, 463 }, /* Profile 39. */ + { 456, 459 }, /* Profile 40. */ + { 436, 439 }, /* Profile 41. */ + { 456, 459 }, /* Profile 42. */ + { 456, 459 }, /* Profile 43. */ + { 460, 463 }, /* Profile 44. */ + { 440, 443 }, /* Profile 45. */ + { 460, 463 }, /* Profile 46. */ + { 460, 463 }, /* Profile 47. */ + { 460, 463 }, /* Profile 48. */ + { 460, 463 }, /* Profile 49. */ + { 440, 443 }, /* Profile 50. */ + { 460, 463 }, /* Profile 51. */ + { 460, 463 }, /* Profile 52. */ + { 460, 463 }, /* Profile 53. */ + { 456, 459 }, /* Profile 54. */ + { 436, 439 }, /* Profile 55. */ + { 456, 459 }, /* Profile 56. */ + { 456, 459 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 96, 111 }, /* Profile 7. */ + { 96, 111 }, /* Profile 8. */ + { 96, 111 }, /* Profile 9. */ + { 96, 111 }, /* Profile 10. */ + { 96, 111 }, /* Profile 11. */ + { 96, 111 }, /* Profile 12. */ + { 96, 111 }, /* Profile 13. */ + { 96, 111 }, /* Profile 14. */ + { 96, 111 }, /* Profile 15. */ + { 96, 111 }, /* Profile 16. */ + { 96, 111 }, /* Profile 17. */ + { 96, 111 }, /* Profile 18. */ + { 96, 111 }, /* Profile 19. */ + { 96, 111 }, /* Profile 20. */ + { 96, 111 }, /* Profile 21. */ + { 96, 111 }, /* Profile 22. */ + { 96, 111 }, /* Profile 23. */ + { 96, 111 }, /* Profile 24. */ + { 96, 111 }, /* Profile 25. */ + { 96, 111 }, /* Profile 26. */ + { 96, 111 }, /* Profile 27. */ + { 96, 111 }, /* Profile 28. */ + { 96, 111 }, /* Profile 29. */ + { 96, 111 }, /* Profile 30. */ + { 96, 111 }, /* Profile 31. */ + { 96, 111 }, /* Profile 32. */ + { 96, 111 }, /* Profile 33. */ + { 96, 111 }, /* Profile 34. */ + { 96, 111 }, /* Profile 35. */ + { 96, 111 }, /* Profile 36. */ + { 96, 111 }, /* Profile 37. */ + { 96, 111 }, /* Profile 38. */ + { 96, 111 }, /* Profile 39. */ + { 96, 111 }, /* Profile 40. */ + { 96, 111 }, /* Profile 41. */ + { 96, 111 }, /* Profile 42. */ + { 96, 111 }, /* Profile 43. */ + { 96, 111 }, /* Profile 44. */ + { 96, 111 }, /* Profile 45. */ + { 96, 111 }, /* Profile 46. */ + { 96, 111 }, /* Profile 47. */ + { 96, 111 }, /* Profile 48. */ + { 96, 111 }, /* Profile 49. */ + { 96, 111 }, /* Profile 50. */ + { 96, 111 }, /* Profile 51. */ + { 96, 111 }, /* Profile 52. */ + { 96, 111 }, /* Profile 53. */ + { 96, 111 }, /* Profile 54. */ + { 96, 111 }, /* Profile 55. */ + { 96, 111 }, /* Profile 56. */ + { 96, 111 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 456, 459 }, /* Profile 5. */ + { 456, 459 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 456, 459 }, /* Profile 10. */ + { 456, 459 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { 452, 455 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 456, 459 }, /* Profile 19. */ + { 456, 459 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 456, 459 }, /* Profile 24. */ + { 456, 459 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { 452, 455 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { 456, 459 }, /* Profile 33. */ + { 456, 459 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { 456, 459 }, /* Profile 38. */ + { 456, 459 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { 452, 455 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { -1, -1 }, /* Profile 45. */ + { -1, -1 }, /* Profile 46. */ + { 456, 459 }, /* Profile 47. */ + { 456, 459 }, /* Profile 48. */ + { -1, -1 }, /* Profile 49. */ + { -1, -1 }, /* Profile 50. */ + { -1, -1 }, /* Profile 51. */ + { 456, 459 }, /* Profile 52. */ + { 456, 459 }, /* Profile 53. */ + { -1, -1 }, /* Profile 54. */ + { -1, -1 }, /* Profile 55. */ + { -1, -1 }, /* Profile 56. */ + { 452, 455 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 440, 443 }, /* Profile 2. */ + { 420, 423 }, /* Profile 3. */ + { 444, 447 }, /* Profile 4. */ + { 440, 443 }, /* Profile 5. */ + { 440, 443 }, /* Profile 6. */ + { 440, 443 }, /* Profile 7. */ + { 420, 423 }, /* Profile 8. */ + { 444, 447 }, /* Profile 9. */ + { 440, 443 }, /* Profile 10. */ + { 440, 443 }, /* Profile 11. */ + { 440, 443 }, /* Profile 12. */ + { 420, 423 }, /* Profile 13. */ + { 444, 447 }, /* Profile 14. */ + { 440, 443 }, /* Profile 15. */ + { 440, 443 }, /* Profile 16. */ + { 420, 423 }, /* Profile 17. */ + { 444, 447 }, /* Profile 18. */ + { 440, 443 }, /* Profile 19. */ + { 440, 443 }, /* Profile 20. */ + { 440, 443 }, /* Profile 21. */ + { 420, 423 }, /* Profile 22. */ + { 444, 447 }, /* Profile 23. */ + { 440, 443 }, /* Profile 24. */ + { 440, 443 }, /* Profile 25. */ + { 440, 443 }, /* Profile 26. */ + { 420, 423 }, /* Profile 27. */ + { 444, 447 }, /* Profile 28. */ + { 440, 443 }, /* Profile 29. */ + { 440, 443 }, /* Profile 30. */ + { 420, 423 }, /* Profile 31. */ + { 444, 447 }, /* Profile 32. */ + { 440, 443 }, /* Profile 33. */ + { 440, 443 }, /* Profile 34. */ + { 440, 443 }, /* Profile 35. */ + { 420, 423 }, /* Profile 36. */ + { 444, 447 }, /* Profile 37. */ + { 440, 443 }, /* Profile 38. */ + { 440, 443 }, /* Profile 39. */ + { 440, 443 }, /* Profile 40. */ + { 420, 423 }, /* Profile 41. */ + { 444, 447 }, /* Profile 42. */ + { 440, 443 }, /* Profile 43. */ + { 440, 443 }, /* Profile 44. */ + { 420, 423 }, /* Profile 45. */ + { 444, 447 }, /* Profile 46. */ + { 440, 443 }, /* Profile 47. */ + { 440, 443 }, /* Profile 48. */ + { 440, 443 }, /* Profile 49. */ + { 420, 423 }, /* Profile 50. */ + { 444, 447 }, /* Profile 51. */ + { 440, 443 }, /* Profile 52. */ + { 440, 443 }, /* Profile 53. */ + { 440, 443 }, /* Profile 54. */ + { 420, 423 }, /* Profile 55. */ + { 444, 447 }, /* Profile 56. */ + { 440, 443 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "VFI_15_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 175 }, /* Profile 2. */ + { 160, 175 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { 160, 175 }, /* Profile 5. */ + { 160, 175 }, /* Profile 6. */ + { 160, 175 }, /* Profile 7. */ + { 160, 175 }, /* Profile 8. */ + { 160, 175 }, /* Profile 9. */ + { 160, 175 }, /* Profile 10. */ + { 160, 175 }, /* Profile 11. */ + { 160, 175 }, /* Profile 12. */ + { 160, 175 }, /* Profile 13. */ + { 160, 175 }, /* Profile 14. */ + { 160, 175 }, /* Profile 15. */ + { 160, 175 }, /* Profile 16. */ + { 160, 175 }, /* Profile 17. */ + { 160, 175 }, /* Profile 18. */ + { 160, 175 }, /* Profile 19. */ + { 160, 175 }, /* Profile 20. */ + { 160, 175 }, /* Profile 21. */ + { 160, 175 }, /* Profile 22. */ + { 160, 175 }, /* Profile 23. */ + { 160, 175 }, /* Profile 24. */ + { 160, 175 }, /* Profile 25. */ + { 160, 175 }, /* Profile 26. */ + { 160, 175 }, /* Profile 27. */ + { 160, 175 }, /* Profile 28. */ + { 160, 175 }, /* Profile 29. */ + { 176, 191 }, /* Profile 30. */ + { 176, 191 }, /* Profile 31. */ + { 176, 191 }, /* Profile 32. */ + { 176, 191 }, /* Profile 33. */ + { 176, 191 }, /* Profile 34. */ + { 176, 191 }, /* Profile 35. */ + { 176, 191 }, /* Profile 36. */ + { 176, 191 }, /* Profile 37. */ + { 176, 191 }, /* Profile 38. */ + { 176, 191 }, /* Profile 39. */ + { 176, 191 }, /* Profile 40. */ + { 176, 191 }, /* Profile 41. */ + { 176, 191 }, /* Profile 42. */ + { 176, 191 }, /* Profile 43. */ + { 176, 191 }, /* Profile 44. */ + { 176, 191 }, /* Profile 45. */ + { 176, 191 }, /* Profile 46. */ + { 176, 191 }, /* Profile 47. */ + { 176, 191 }, /* Profile 48. */ + { 176, 191 }, /* Profile 49. */ + { 176, 191 }, /* Profile 50. */ + { 176, 191 }, /* Profile 51. */ + { 176, 191 }, /* Profile 52. */ + { 176, 191 }, /* Profile 53. */ + { 176, 191 }, /* Profile 54. */ + { 176, 191 }, /* Profile 55. */ + { 176, 191 }, /* Profile 56. */ + { 176, 191 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", + .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 432, 435 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 436, 439 }, /* Profile 4. */ + { 432, 435 }, /* Profile 5. */ + { 432, 435 }, /* Profile 6. */ + { 432, 435 }, /* Profile 7. */ + { 404, 407 }, /* Profile 8. */ + { 436, 439 }, /* Profile 9. */ + { 432, 435 }, /* Profile 10. */ + { 432, 435 }, /* Profile 11. */ + { 432, 435 }, /* Profile 12. */ + { 404, 407 }, /* Profile 13. */ + { 436, 439 }, /* Profile 14. */ + { 432, 435 }, /* Profile 15. */ + { 432, 435 }, /* Profile 16. */ + { 404, 407 }, /* Profile 17. */ + { 436, 439 }, /* Profile 18. */ + { 432, 435 }, /* Profile 19. */ + { 432, 435 }, /* Profile 20. */ + { 432, 435 }, /* Profile 21. */ + { 404, 407 }, /* Profile 22. */ + { 436, 439 }, /* Profile 23. */ + { 432, 435 }, /* Profile 24. */ + { 432, 435 }, /* Profile 25. */ + { 432, 435 }, /* Profile 26. */ + { 404, 407 }, /* Profile 27. */ + { 436, 439 }, /* Profile 28. */ + { 432, 435 }, /* Profile 29. */ + { 432, 435 }, /* Profile 30. */ + { 404, 407 }, /* Profile 31. */ + { 436, 439 }, /* Profile 32. */ + { 432, 435 }, /* Profile 33. */ + { 432, 435 }, /* Profile 34. */ + { 432, 435 }, /* Profile 35. */ + { 404, 407 }, /* Profile 36. */ + { 436, 439 }, /* Profile 37. */ + { 432, 435 }, /* Profile 38. */ + { 432, 435 }, /* Profile 39. */ + { 432, 435 }, /* Profile 40. */ + { 404, 407 }, /* Profile 41. */ + { 436, 439 }, /* Profile 42. */ + { 432, 435 }, /* Profile 43. */ + { 432, 435 }, /* Profile 44. */ + { 404, 407 }, /* Profile 45. */ + { 436, 439 }, /* Profile 46. */ + { 432, 435 }, /* Profile 47. */ + { 432, 435 }, /* Profile 48. */ + { 432, 435 }, /* Profile 49. */ + { 404, 407 }, /* Profile 50. */ + { 436, 439 }, /* Profile 51. */ + { 432, 435 }, /* Profile 52. */ + { 432, 435 }, /* Profile 53. */ + { 432, 435 }, /* Profile 54. */ + { 404, 407 }, /* Profile 55. */ + { 436, 439 }, /* Profile 56. */ + { 432, 435 }, /* Profile 57. */ + }, + .profile_cnt = 58, + }, +};static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_data, +}; + +static shr_enum_map_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_names[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reasons_info = { + .num_reasons = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_names, + .reason_encode = bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_encode, + .reason_decode = bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_arp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_arp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_arp_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_arp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_authen_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_authen_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_authen_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_authen_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_bfd_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_bfd_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_bfd_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_bfd_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_cntag_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_cntag_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_cntag_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_cntag_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_dest_option_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_dest_option_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_dest_option_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_dest_option_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_esp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_esp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_esp_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_esp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_esp_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ethertype_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ethertype_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ethertype_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ethertype_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_frag_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_frag_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_frag_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_frag_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_frag_t_field_data, +}; + + +static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { + bcmpkt_gbp_ethernet_shim_t_ethertype_get, + bcmpkt_gbp_ethernet_shim_t_flags_get, + bcmpkt_gbp_ethernet_shim_t_reserved_get, + bcmpkt_gbp_ethernet_shim_t_sid_get, + bcmpkt_gbp_ethernet_shim_t_subtype_get, + bcmpkt_gbp_ethernet_shim_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { + bcmpkt_gbp_ethernet_shim_t_ethertype_set, + bcmpkt_gbp_ethernet_shim_t_flags_set, + bcmpkt_gbp_ethernet_shim_t_reserved_set, + bcmpkt_gbp_ethernet_shim_t_sid_set, + bcmpkt_gbp_ethernet_shim_t_subtype_set, + bcmpkt_gbp_ethernet_shim_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_src_subport_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_src_subport_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_src_subport_num_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_src_subport_num_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gpe_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gpe_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gpe_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gpe_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gre_key_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gre_key_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gre_key_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gre_key_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gre_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gre_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gre_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gre_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_gre_t_field_data, +}; + + +static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 4, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 4, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 6, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 6, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 31, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 10); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 10, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 15, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 15, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 4); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 2, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_get, + bcmpkt_hg3_base_t_cng_get, + bcmpkt_hg3_base_t_entropy_get, + bcmpkt_hg3_base_t_ext_hdr_present_get, + bcmpkt_hg3_base_t_hg3_reserved_get, + bcmpkt_hg3_base_t_l3_routed_get, + bcmpkt_hg3_base_t_mirror_copy_get, + bcmpkt_hg3_base_t_reserved_etype_get, + bcmpkt_hg3_base_t_system_destination_get, + bcmpkt_hg3_base_t_system_destination_type_get, + bcmpkt_hg3_base_t_system_source_get, + bcmpkt_hg3_base_t_tc_get, + bcmpkt_hg3_base_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_set, + bcmpkt_hg3_base_t_cng_set, + bcmpkt_hg3_base_t_entropy_set, + bcmpkt_hg3_base_t_ext_hdr_present_set, + bcmpkt_hg3_base_t_hg3_reserved_set, + bcmpkt_hg3_base_t_l3_routed_set, + bcmpkt_hg3_base_t_mirror_copy_set, + bcmpkt_hg3_base_t_reserved_etype_set, + bcmpkt_hg3_base_t_system_destination_set, + bcmpkt_hg3_base_t_system_destination_type_set, + bcmpkt_hg3_base_t_system_source_set, + bcmpkt_hg3_base_t_tc_set, + bcmpkt_hg3_base_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_field_data, +}; + + +static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_lsb_get, + bcmpkt_hg3_extension_0_t_class_id_msb_get, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, + bcmpkt_hg3_extension_0_t_flags_get, + bcmpkt_hg3_extension_0_t_forwarding_domain_get, + bcmpkt_hg3_extension_0_t_svp_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_lsb_set, + bcmpkt_hg3_extension_0_t_class_id_msb_set, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, + bcmpkt_hg3_extension_0_t_flags_set, + bcmpkt_hg3_extension_0_t_forwarding_domain_set, + bcmpkt_hg3_extension_0_t_svp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_icmp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_icmp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_icmp_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_icmp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 24); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 2); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 2, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 6); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 6, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_get, + bcmpkt_ifa_flex_md_0_b_t_port_speed_get, + bcmpkt_ifa_flex_md_0_b_t_queue_id_get, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_set, + bcmpkt_ifa_flex_md_0_b_t_port_speed_set, + bcmpkt_ifa_flex_md_0_b_t_queue_id_set, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_get, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_set, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_get, + bcmpkt_ifa_md_base_t_hop_limit_current_length_get, + bcmpkt_ifa_md_base_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_set, + bcmpkt_ifa_md_base_t_hop_limit_current_length_set, + bcmpkt_ifa_md_base_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_get, + bcmpkt_ifa_metadata_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_t_metadata_get, + bcmpkt_ifa_metadata_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_set, + bcmpkt_ifa_metadata_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_t_metadata_set, + bcmpkt_ifa_metadata_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_igmp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_igmp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_igmp_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_igmp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_namespace_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_namespace_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FID_COUNT] = { + bcmpkt_ioam_e2e_t_ioam_e2e_data_get, + bcmpkt_ioam_e2e_t_ioam_e2e_type_get, + bcmpkt_ioam_e2e_t_ioam_hdr_len_get, + bcmpkt_ioam_e2e_t_namespace_id_get, + bcmpkt_ioam_e2e_t_next_protocol_get, + bcmpkt_ioam_e2e_t_reserved_get, + bcmpkt_ioam_e2e_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FID_COUNT] = { + bcmpkt_ioam_e2e_t_ioam_e2e_data_set, + bcmpkt_ioam_e2e_t_ioam_e2e_type_set, + bcmpkt_ioam_e2e_t_ioam_hdr_len_set, + bcmpkt_ioam_e2e_t_namespace_id_set, + bcmpkt_ioam_e2e_t_next_protocol_set, + bcmpkt_ioam_e2e_t_reserved_set, + bcmpkt_ioam_e2e_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ipfix_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ipfix_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ipfix_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ipfix_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ipv4_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ipv4_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ipv4_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ipv4_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ipv6_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ipv6_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ipv6_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ipv6_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_l2_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_l2_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_l2_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_l2_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mpls_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mpls_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mpls_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mpls_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_p_1588_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_p_1588_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_p_1588_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_p_1588_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_rarp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_rarp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rarp_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_rarp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_routing_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_routing_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_routing_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_routing_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_rspan_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_rspan_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rspan_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_rspan_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_rspan_t_field_data, +}; + + +static int32_t bcmpkt_segment_routing_srh_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_last_entry_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_last_entry_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_segment_routing_srh_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { + bcmpkt_segment_routing_srh_t_flags_get, + bcmpkt_segment_routing_srh_t_hdr_ext_len_get, + bcmpkt_segment_routing_srh_t_last_entry_get, + bcmpkt_segment_routing_srh_t_next_header_get, + bcmpkt_segment_routing_srh_t_routing_type_get, + bcmpkt_segment_routing_srh_t_segments_left_get, + bcmpkt_segment_routing_srh_t_tag_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = { + bcmpkt_segment_routing_srh_t_flags_set, + bcmpkt_segment_routing_srh_t_hdr_ext_len_set, + bcmpkt_segment_routing_srh_t_last_entry_set, + bcmpkt_segment_routing_srh_t_next_header_set, + bcmpkt_segment_routing_srh_t_routing_type_set, + bcmpkt_segment_routing_srh_t_segments_left_set, + bcmpkt_segment_routing_srh_t_tag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_field_data, +}; + + +static int32_t bcmpkt_segment_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_last_entry_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_last_entry_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_seg_list_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_seg_list_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_segment_routing_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_segment_routing_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { + bcmpkt_segment_routing_t_hdr_ext_len_get, + bcmpkt_segment_routing_t_last_entry_flags_get, + bcmpkt_segment_routing_t_next_header_get, + bcmpkt_segment_routing_t_routing_type_get, + bcmpkt_segment_routing_t_seg_list_get, + bcmpkt_segment_routing_t_segments_left_get, + bcmpkt_segment_routing_t_tag_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = { + bcmpkt_segment_routing_t_hdr_ext_len_set, + bcmpkt_segment_routing_t_last_entry_flags_set, + bcmpkt_segment_routing_t_next_header_set, + bcmpkt_segment_routing_t_routing_type_set, + bcmpkt_segment_routing_t_seg_list_set, + bcmpkt_segment_routing_t_segments_left_set, + bcmpkt_segment_routing_t_tag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_std_segment_id_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_std_segment_id_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { + bcmpkt_std_segment_id_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = { + bcmpkt_std_segment_id_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_field_data, +}; + + +static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_svtag_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_get, + bcmpkt_svtag_t_data_upr_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_svtag_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_set, + bcmpkt_svtag_t_data_upr_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_svtag_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_svtag_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_svtag_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_udp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_udp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_udp_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_udp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, + bcmpkt_unknown_l5_t_l5_bytes_8_9_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, + bcmpkt_unknown_l5_t_l5_bytes_8_9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_vlan_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_vlan_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_vlan_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_vlan_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_vxlan_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_vxlan_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_vxlan_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_vxlan_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_wesp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_wesp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_wesp_t_field_data[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_wesp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_29_1_2_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56890_a0_dna_6_5_29_1_2_flexhdr_info_list[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_arp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_authen_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_bfd_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_cntag_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_dest_option_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_esp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ethertype_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_frag_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gpe_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gre_key_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gre_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_icmp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_igmp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ipfix_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ipv4_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ipv6_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_l2_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mpls_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_p_1588_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_rarp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_routing_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_rspan_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_svtag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_svtag_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_svtag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_udp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_vlan_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_vxlan_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_29_1_2_wesp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_29_1_2_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_info, + .reasons_info = &bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56890_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56890_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56890_a0_dna_6_5_29_1_2_flexhdr_id_map[] = { + BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56890_a0_dna_6_5_29_1_2_flexhdr_map_get(void) +{ + return bcm56890_a0_dna_6_5_29_1_2_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56890_a0_dna_6_5_29_1_2_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56890_a0_dna_6_5_29_1_2_flexhdr_info_list[hid]; +} + +int bcm56890_a0_dna_6_5_29_1_2_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 14, + 21, + 22, + 71, +}; \ No newline at end of file diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild new file mode 100644 index 000000000000..deee1a716832 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild @@ -0,0 +1,63 @@ +# -*- Kbuild -*- +# +# Linux Generic Netlink module. +# +# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder.$ +# +# Enable Kernel PMD +KNETCB_CPPFLAGS += -DKPMD + +# Build Netlink channel for general packetI/O +BUILD_GENL_PACKET = 0 + +# Build Netlink channel for packet sampling +BUILD_GENL_PSAMPLE = 1 + +## Build Netlink channel for packet sampling when kernel enables CONFIG_PSAMPLE +#ifeq ($(CONFIG_PSAMPLE),) +#BUILD_GENL_PSAMPLE = 1 +#endif + +ifeq ($(BUILD_GENL_PACKET),1) +PACKET_CFLAGS = -DPACKET_SUPPORT +PACKET_CB_OBJS = bcmgenl_packet.o +endif + +ifeq ($(BUILD_GENL_PSAMPLE),1) +PSAMPLE_CFLAGS = -DPSAMPLE_SUPPORT +PSAMPLE_CB_OBJS = bcmgenl_psample.o +endif + +obj-m := linux_bcmgenl.o + +ccflags-y := $(KNETCB_CPPFLAGS) $(LKM_CFLAGS) \ + $(SDK_PMD_KFLAGS) \ + -I$(SDK)/shr/include \ + -I$(SDK)/bcmdrd/include \ + -I$(SDK)/bcmltd/include \ + -I$(SDK)/bcmlrd/include \ + -I$(SDK)/linux/include \ + -I$(SDK)/linux/include/kernel \ + -I$(SDK)/linux/knet/include \ + -I$(SDK)/linux/knet \ + -I$(SDK)/linux/bcmgenl \ + $(PACKET_CFLAGS) \ + $(PSAMPLE_CFLAGS) + +linux_bcmgenl-y := $(SDK_PMD_KOBJS) \ + $(PACKET_CB_OBJS) \ + $(PSAMPLE_CB_OBJS) \ + bcmgenl.o diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile new file mode 100644 index 000000000000..3311fc4132e0 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile @@ -0,0 +1,55 @@ +# +# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder.$ +# +# Linux KNET BCMGENL module. +# + +# Include PMD library by default +ifneq (0,$(KPMD)) + +# Kernel module source directory +KMODDIR = $(CURDIR) + +# Avoid creating links in original kernel module source directory +GENDIR = $(KMODDIR)/generated +ifneq ($(OUTPUT_DIR),) +GENDIR = $(OUTPUT_DIR)/knet/generated/bcmgenl +endif + +bcmgenl: kpmd + $(MAKE) -C $(GENDIR) all + +# SDK make helper for stand-alone PMD kernel module +include $(SDK)/make/kpmd.mk + +distclean:: + rm -rf $(GENDIR) + +endif # KPMD + +include Kbuild + +ifeq ($(KERNELRELEASE),) + +MOD_NAME = linux_bcmgenl + +include $(SDK)/make/lkm.mk + +endif + +.PHONY: bcmgenl distclean + +distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c new file mode 100644 index 000000000000..06bb99ff8198 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c @@ -0,0 +1,608 @@ +/*! \file bcmgenl.c + * + * BCMGENL module entry. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include +#include +#include +#include + +#include +#include + +#ifdef KPMD +#include +#include +#include +#include +#include +#include +#include +#include +#include +#endif /* KPMD */ + +#include + +/*! \cond */ +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("BCMGENL Module"); +MODULE_LICENSE("GPL"); +/*! \endcond */ + +/*! driver proc entry root */ +static struct proc_dir_entry *bcmgenl_proc_root = NULL; + +/*! set BCMGENL_DEBUG for debug info */ +#define BCMGENL_DEBUG + +#ifdef BCMGENL_DEBUG +#define DBG_LVL_VERB 0x1 +#define DBG_LVL_PDMP 0x2 + +/*! \cond */ +static int debug = 0; +MODULE_PARAM(debug, int, 0); +MODULE_PARM_DESC(debug, "Debug level (default 0)"); +/*! \endcond */ +#endif /* BCMGENL_DEBUG */ + +/*! These below need to match incoming enum values */ +#define FILTER_TAG_STRIP 0 +#define FILTER_TAG_KEEP 1 +#define FILTER_TAG_ORIGINAL 2 + +#ifndef KPMD +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + BCMDRD_DEV_T_##_bd, +/*! Enumeration for all base device types. */ +typedef enum { + BCMDRD_DEV_T_NONE = 0, +/*! \cond */ +#include +/*! \endcond */ + BCMDRD_DEV_T_COUNT +} bcmdrd_dev_type_t; + +/*! Create enumeration values from list of supported variants. */ +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ + BCMLRD_VARIANT_T_##_bd##_##_ve, + +/*! Enumeration for all device variants. */ +typedef enum bcmlrd_variant_e { + BCMLRD_VARIANT_T_NONE = 0, +/*! \cond */ +#include +/*! \endcond */ + BCMLRD_VARIANT_T_COUNT +} bcmlrd_variant_t; +#endif /* !KPMD */ + +typedef struct ngknetcb_dev_s { + bool initialized; + bcmdrd_dev_type_t dev_type; + bcmlrd_variant_t var_type; +} ngknetcb_dev_t; + +static ngknetcb_dev_t cb_dev[NUM_PDMA_DEV_MAX]; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + {#_bd, BCMDRD_DEV_T_##_bd}, +static const struct { + char *name; + bcmdrd_dev_type_t dev; +} device_types[] = { + {"device_none", BCMDRD_DEV_T_NONE}, +#include + {"device_count", BCMDRD_DEV_T_COUNT} +}; + +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ + {#_bd, #_ve, BCMLRD_VARIANT_T_##_bd##_##_ve}, +static const struct { + char *dev_name; + char *var_name; + bcmlrd_variant_t var; +} variant_types[] = { + {"device_none", "variant_none", BCMLRD_VARIANT_T_NONE}, +#include + {"device_count", "variant_count", BCMLRD_VARIANT_T_COUNT} +}; + +void dump_skb(struct sk_buff *skb) +{ + int idx; + char str[128]; + uint8_t *data = skb->data; + + printk(KERN_INFO " SKB len: %4d\n", skb->len); + for (idx = 0; idx < skb->len; idx++) { + if ((idx & 0xf) == 0) { + printk(str, "%04x: ", idx); + } + if ((idx & 0xf) == 8) { + printk(&str[strlen(str)], "- "); + } + sprintf(&str[strlen(str)], "%02x ", data[idx]); + if ((idx & 0xf) == 0xf) { + sprintf(&str[strlen(str)], "\n"); + printk("%s", str); + } + } + if ((idx & 0xf) != 0) { + sprintf(&str[strlen(str)], "\n"); + printk("%s", str); + } +} + +#ifdef BCMGENL_DEBUG +static void +dump_buffer(uint8_t * data, int size) +{ + const char *const to_hex = "0123456789ABCDEF"; + int i; + char buffer[128]; + char *buffer_ptr; + int addr = 0; + + buffer_ptr = buffer; + for (i = 0; i < size; i++) { + *buffer_ptr++ = ' '; + *buffer_ptr++ = to_hex[(data[i] >> 4) & 0xF]; + *buffer_ptr++ = to_hex[data[i] & 0xF]; + if (((i % 16) == 15) || (i == size - 1)) { + *buffer_ptr = '\0'; + buffer_ptr = buffer; + printk(KERN_INFO "%04X %s\n", addr, buffer); + addr = i + 1; + } + } +} + +static void +dump_pmd(uint8_t *pmd, int len) +{ + if (debug & DBG_LVL_PDMP) { + printk("PMD (%d bytes):\n", len); + dump_buffer(pmd, len); + } +} + +void dump_bcmgenl_pkt(bcmgenl_pkt_t *bcmgenl_pkt) +{ + printk(KERN_INFO "Network namespace 0x%p\n", + bcmgenl_pkt->netns); + printk(KERN_INFO "ing_pp_port %d src_port %d, dst_port %d, dst_port_type %x\n", + bcmgenl_pkt->meta.ing_pp_port, + bcmgenl_pkt->meta.src_port, + bcmgenl_pkt->meta.dst_port, + bcmgenl_pkt->meta.dst_port_type); + printk(KERN_INFO "tag status %d", + bcmgenl_pkt->meta.tag_status); + printk(KERN_INFO "proto 0x%x, vlan 0x%x\n", + bcmgenl_pkt->meta.proto, + bcmgenl_pkt->meta.vlan); + printk(KERN_INFO "sample_rate %d, sample_size %d\n", + bcmgenl_pkt->psamp_meta.sample_rate, + bcmgenl_pkt->psamp_meta.sample_size); +} +#endif /* BCMGENL_DEBUG */ + +/* + * The function get_tag_status() returns the tag status. + * 0 = Untagged + * 1 = Single inner-tag + * 2 = Single outer-tag + * 3 = Double tagged. + * -1 = Unsupported type + */ +static int +get_tag_status(uint32_t dev_type, uint32_t variant, void *meta) +{ + uint32_t *valptr; + uint32_t fd_index; + uint32_t outer_l2_hdr = 0; + int tag_status = -1; + uint32_t match_id_minbit = 1; + uint32_t outer_tag_match = 0x10; + + if ((dev_type == 0xb880) || (dev_type == 0xb780)) { + /* Field BCM_PKTIO_RXPMD_MATCH_ID_LO has tag status in RX PMD */ + fd_index = 2; + valptr = (uint32_t *)meta; + match_id_minbit = (dev_type == 0xb780) ? 2 : 1; + outer_l2_hdr = (valptr[fd_index] >> match_id_minbit & 0xFF); + outer_tag_match = ((dev_type == 0xb780 && variant == 1) ? 0x8 : 0x10); + if (outer_l2_hdr & 0x1) { + tag_status = 0; + if (outer_l2_hdr & 0x4) { + tag_status = 0; + } + if (outer_l2_hdr & outer_tag_match) { + tag_status = 2; + if (outer_l2_hdr & 0x20) { + tag_status = 3; + } + } + else if (outer_l2_hdr & 0x20) { + tag_status = 1; + } + } + } + else if ((dev_type == 0xb990)|| (dev_type == 0xb996)) { + fd_index = 9; + valptr = (uint32_t *)meta; + /* On TH4, outer_l2_header means INCOMING_TAG_STATUS. + * TH4 only supports single tagging, so if TAG_STATUS + * says there's a tag, then we don't want to strip. + * Otherwise, we do. + */ + outer_l2_hdr = (valptr[fd_index] >> 13) & 3; + + if (outer_l2_hdr) { + tag_status = 2; + } else { + tag_status = 0; + } + } +#ifdef BCMGENL_DEBUG + if (debug & DBG_LVL_VERB) { + if (outer_l2_hdr) { + printk(" L2 Header Present\n"); + if (tag_status == 0) { + printk(" Incoming frame untagged\n"); + } else { + printk(" Incoming frame tagged\n"); + } + switch (tag_status) { + case 0: + printk(" SNAP/LLC\n"); + break; + case 1: + printk(" Inner Tagged\n"); + break; + case 2: + printk(" Outer Tagged\n"); + break; + case 3: + printk(" Double Tagged\n"); + break; + default: + break; + } + } + printk("%s; Device Type: %d; tag status: %d\n", __func__, dev_type, tag_status); + } +#endif /* BCMGENL_DEBUG */ + return tag_status; +} + +static int +dstport_get(void *pkt_meta) +{ + int dstport = 0; + HIGIG_t *hg = (HIGIG_t *)pkt_meta; + HIGIG2_t *hg2 = (HIGIG2_t *)pkt_meta; + + if (HIGIG2_STARTf_GET(*hg2) == BCMPKT_HIGIG2_SOF) + { + if (HIGIG2_MCSTf_GET(*hg2)) + { + dstport = 0; + } + else + { + dstport = HIGIG2_DST_PORT_MGIDLf_GET(*hg2); + } + } + else if (HIGIG_STARTf_GET(*hg) == BCMPKT_HIGIG_SOF) + { + dstport = HIGIG_DST_PORTf_GET(*hg); + } +#ifdef BCMGENL_DEBUG + else + { + /* SDKLT-43751: Failed to parse dstport on TD4/TH4 */ + if (debug & DBG_LVL_VERB) { + printk("%s: Could not detect metadata sop type: 0x%02x\n", + __func__, HIGIG_STARTf_GET(*hg)); + return (-1); + } + } +#endif /* BCMGENL_DEBUG */ + return dstport; +} + +static bool +dstport_type_get(void *pkt_meta) +{ + HIGIG2_t *hg2 = (HIGIG2_t *)pkt_meta; + + if (HIGIG2_STARTf_GET(*hg2) == BCMPKT_HIGIG2_SOF) + { + if (HIGIG2_MCSTf_GET(*hg2)) + { + return DSTPORT_TYPE_MC; + } + } + return DSTPORT_TYPE_NONE; +} + +int +bcmgenl_pkt_package( + int dev, + struct sk_buff *skb, + bcmgenl_info_t *bcmgenl_info, + bcmgenl_pkt_t *bcmgenl_pkt) +{ + int unit, rv, rv2; + struct ngknet_callback_desc *cbd; + uint8_t *pkt; + uint32_t rxpmd[BCMPKT_RXPMD_SIZE_WORDS]; + uint32_t dev_type = 0; + bcmlrd_variant_t var_type; + uint32_t *rxpmd_flex = NULL; + uint32_t rxpmd_flex_len = 0; + uint32_t hid, val = 0; + int fid; + + if (!skb || !bcmgenl_info || !bcmgenl_pkt) { + return SHR_E_PARAM; + } + cbd = NGKNET_SKB_CB(skb); + unit = cbd->dinfo->dev_no; + pkt = cbd->pmd + cbd->pmd_len; + + bcmgenl_pkt->meta.proto = (uint16_t) ((pkt[12] << 8) | pkt[13]); + bcmgenl_pkt->meta.vlan = (uint16_t) ((pkt[14] << 8) | pkt[15]); + + bcmgenl_pkt->netns = bcmgenl_info->netns; + + if (cb_dev[unit].initialized) { +#ifdef KPMD + dev_type = cb_dev[unit].dev_type; + var_type = cb_dev[unit].var_type; + /* Get tag status */ + bcmgenl_pkt->meta.tag_status = get_tag_status(dev_type, var_type,(void *)cbd->pmd); + + /* Get dst port */ + bcmgenl_pkt->meta.dst_port = dstport_get((void *)cbd->pmd); + bcmgenl_pkt->meta.dst_port_type = dstport_type_get((void *)cbd->pmd); + + /* Get src port */ + rv = bcmpkt_rxpmd_field_get(dev_type, + (uint32_t *)cbd->pmd, BCMPKT_RXPMD_SRC_PORT_NUM, &val); + if (SHR_SUCCESS(rv)) { + bcmgenl_pkt->meta.src_port = val; + } + rv = bcmpkt_rxpmd_flexdata_get + (dev_type, rxpmd, &rxpmd_flex, &rxpmd_flex_len); + if (SHR_FAILURE(rv) && (rv != SHR_E_UNAVAIL)) { + printk("Failed to detect RXPMD_FLEX.\n"); + } else { + if (rxpmd_flex_len) { + /* Get hid of RXPMD_FLEX_T */ + if (bcmpkt_flexhdr_header_id_get(var_type, + "RXPMD_FLEX_T", &hid)) { + rv = SHR_E_UNAVAIL; + } + + /* Get fid of INGRESS_PP_PORT_7_0 */ + if (SHR_FAILURE(rv) || + bcmpkt_flexhdr_field_id_get(var_type, hid, + "INGRESS_PP_PORT_7_0", + &fid) || + bcmpkt_flexhdr_field_get(var_type, hid, + rxpmd_flex, + BCMPKT_FLEXHDR_PROFILE_NONE, + fid, &val)) { + rv2 = SHR_E_UNAVAIL; + } + if (SHR_SUCCESS(rv) || SHR_SUCCESS(rv2)) { + bcmgenl_pkt->meta.ing_pp_port = val; + } + + /* Get fid of ING_TIMESTAMP_31_0 */ + if (SHR_FAILURE(rv) || + bcmpkt_flexhdr_field_id_get(var_type, hid, + "ING_TIMESTAMP_31_0", + &fid) || + bcmpkt_flexhdr_field_get(var_type, hid, + rxpmd_flex, + BCMPKT_FLEXHDR_PROFILE_NONE, + fid, &val)) { + rv2 = SHR_E_UNAVAIL; + } + if (SHR_SUCCESS(rv) || SHR_SUCCESS(rv2)) { + bcmgenl_pkt->meta.timestamp = val; + } + } + } +#endif /* KPMD */ + } +#ifdef BCMGENL_DEBUG + if (debug & DBG_LVL_PDMP) { + if (cb_dev[unit].initialized) { + printk("bcmgenl_pkt_package for dev %d: %s variant %s\n", + cbd->dinfo->dev_no, cbd->dinfo->type_str, + variant_types[cb_dev[unit].var_type].var_name); + printk("dev_type: %d\n", cb_dev[unit].dev_type); + printk("variant: %d\n\n", cb_dev[unit].var_type); + + if (cbd->pmd_len != 0) { + dump_pmd(cbd->pmd, cbd->pmd_len); + } + printk("Packet raw data (%d):", cbd->pkt_len); + dump_buffer(pkt, cbd->pkt_len); + } + dump_bcmgenl_pkt(bcmgenl_pkt); + } +#endif /* BCMGENL_DEBUG */ + return SHR_E_NONE; +} + +#ifdef KPMD +/* + Change this structure to reflect the match_ids of interest. + This is an example of how it can be used. +*/ +typedef struct cb_match_id_s { + int egress_pkt_fwd_l2_hdr_etag; + int egress_pkt_fwd_l2_hdr_l2; + int ingress_pkt_inner_l2_hdr_l2; + int ingress_pkt_fwd_l2_hdr_etag; +} cb_match_id_t; + +static cb_match_id_t match_id; + +/* + Initialize the desired match_ids for use later in the code. +*/ +static void +init_match_ids(int unit) +{ + uint32_t val; + + match_id.egress_pkt_fwd_l2_hdr_etag = -1; + match_id.egress_pkt_fwd_l2_hdr_l2 = -1; + match_id.ingress_pkt_inner_l2_hdr_l2 = -1; + match_id.ingress_pkt_fwd_l2_hdr_etag = -1; + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "EGRESS_PKT_FWD_L2_HDR_ETAG", &val) == 0) { + match_id.egress_pkt_fwd_l2_hdr_etag = val; + printk("EGRESS_PKT_FWD_L2_HDR_ETAG: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "EGRESS_PKT_FWD_L2_HDR_L2", &val) == 0) { + match_id.egress_pkt_fwd_l2_hdr_l2 = val; + printk("EGRESS_PKT_FWD_L2_HDR_L2: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "INGRESS_PKT_INNER_L2_HDR_L2", &val) == 0) { + match_id.ingress_pkt_inner_l2_hdr_l2 = val; + printk("INGRESS_PKT_INNER_L2_HDR_L2: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "INGRESS_PKT_FWD_L2_HDR_ETAG", &val) == 0) { + match_id.ingress_pkt_fwd_l2_hdr_etag = val; + printk("INGRESS_PKT_FWD_L2_HDR_ETAG: %d\n", val); + } +} +#endif /* KPMD */ + +/*! + * \brief Device Initialization Callback. + * + * The device initialization callback allows an external module to + * perform device-specific initialization in preparation for Tx and Rx + * packet processing. + * + * \param [in] dinfo Device information. + * + */ +static void +init_cb(ngknet_dev_info_t *dinfo) +{ + int unit; + bcmdrd_dev_type_t dt; + bcmlrd_variant_t var; + unit = dinfo->dev_no; + + if ((unsigned int)unit >= NUM_PDMA_DEV_MAX) { + return; + } + + for (dt = 0; dt < BCMDRD_DEV_T_COUNT; dt++) { + if (!strcasecmp(dinfo->type_str, device_types[dt].name)) { + cb_dev[unit].dev_type = dt; + break; + } + } + + for (var = 0; var < BCMLRD_VARIANT_T_COUNT; var++) { + if ((!strcasecmp(dinfo->type_str, variant_types[var].dev_name)) && + (!strcasecmp(dinfo->var_str, variant_types[var].var_name))) { + cb_dev[unit].var_type = var; + break; + } + } + + printk("init_cb unit %d, dev %s variant %s\n", + dinfo->dev_no, dinfo->type_str, dinfo->var_str); + printk("dev_type: %d\n", cb_dev[unit].dev_type); + printk("variant: %d\n", cb_dev[unit].var_type); + + cb_dev[unit].initialized = true; + +#ifdef KPMD + init_match_ids(unit); +#endif /* KPMD */ +} + +static int +bcmgenl_proc_cleanup(void) +{ + remove_proc_entry(BCMGENL_PROCFS_PATH, NULL); + remove_proc_entry(BCM_PROCFS_NAME, NULL); + return 0; +} + +static int +bcmgenl_proc_init(void) +{ + /* initialize proc files (for bcmgenl) */ + proc_mkdir(BCM_PROCFS_NAME, NULL); + bcmgenl_proc_root = proc_mkdir(BCMGENL_PROCFS_PATH, NULL); + return 0; +} + +static int __init +bcmgenl_init_module(void) +{ + ngknet_dev_init_cb_register(init_cb); + + bcmgenl_proc_init(); +#ifdef PACKET_SUPPORT + bcmgenl_packet_init(); +#endif +#ifdef PSAMPLE_SUPPORT + bcmgenl_psample_init(); +#endif + return 0; +} + +static void __exit +bcmgenl_exit_module(void) +{ + ngknet_dev_init_cb_unregister(init_cb); + +#ifdef PACKET_SUPPORT + bcmgenl_packet_cleanup(); +#endif +#ifdef PSAMPLE_SUPPORT + bcmgenl_psample_cleanup(); +#endif + bcmgenl_proc_cleanup(); +} + +module_init(bcmgenl_init_module); +module_exit(bcmgenl_exit_module); + diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h new file mode 100644 index 000000000000..a3aa8c1ce5cc --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h @@ -0,0 +1,165 @@ +/*! \file bcmgenl.h + * + * BCMGENL module entry. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMGENL_H +#define BCMGENL_H + +#include +#include +#include + +/*! Max length of proc path */ +#define PROCFS_MAX_PATH 1024 + +/*! Module information */ +#define BCMGENL_MODULE_NAME "linux_bcmgenl" + +/*! Use similar path to SDK6 genl psample path */ +#define BCM_PROCFS_NAME "bcm" +#define BCMGENL_PROCFS_NAME "genl" +#define BCMGENL_PROCFS_PATH (BCM_PROCFS_NAME "/" BCMGENL_PROCFS_NAME) + +typedef struct { + uint8_t cmic_type; + uint8_t dcb_type; + uint8_t dcb_size; + uint8_t pkt_hdr_size; + uint32_t cdma_channels; +} knet_hw_info_t; + +/*! generic netlink data per interface */ +typedef struct { + struct list_head list; + struct net_device *dev; + uint16_t id; + uint8_t port; + uint16_t vlan; + uint16_t qnum; + uint32_t sample_rate; /* sFlow sample rate */ + uint32_t sample_size; /* sFlow sample size */ +} bcmgenl_netif_t; + +/*! generic netlink interface info */ +typedef struct { + struct list_head netif_list; + int netif_count; + knet_hw_info_t hw; + struct net *netns; + spinlock_t lock; +} bcmgenl_info_t; + +#define DSTPORT_TYPE_NONE 0 +#define DSTPORT_TYPE_DISCARD 1 +#define DSTPORT_TYPE_MC 2 + +/*! generic netlink packet metadata */ +typedef struct bcmgenl_packet_meta_s { + int ing_pp_port; + int src_port; + int dst_port; + int dst_port_type; + uint32_t trunk_id; + uint64_t timestamp; + /* + * Tag status + * 0x0(Untagged) + * 0x1(Single inner-tag) + * 0x2(Single outer-tag) + * 0x3(Double tagged) + */ + int tag_status; + uint16_t proto; + uint16_t vlan; +} bcmgenl_packet_meta_t; + +/*! generic netlink packet sampling metadata */ +typedef struct bcmgenl_psample_meta_s { + int sample_rate; /* Sampling rate */ + int sample_size; /* Truncated size of sampled packet */ +} bcmgenl_psample_meta_t; + +/*! generic netlink packet info */ +typedef struct bcmgenl_pkt_s { + struct net *netns; /* net namespace */ + bcmgenl_packet_meta_t meta; + bcmgenl_psample_meta_t psamp_meta; +} bcmgenl_pkt_t; + +/*! + * \brief Dump skb buffer. + * + * \param [in] skb socket buffer. + */ +void dump_skb(struct sk_buff *skb); + +/*! + * \brief Dump generic netlink packet. + * + * \param [in] bcmgenl_pkt generic netlink packet. + */ +void dump_bcmgenl_pkt(bcmgenl_pkt_t *bcmgenl_pkt); + +/*! + * \brief Package packet to Generic Netlink packet format. + * + * \param [in] dev NGKNET device structure point. + * \param [in] skb socket buffer. + * \param [in] pkt packet data buffer. + * \param [in] pkt_meta packet metadata buffer. + * \param [in] bcmgenl_info Generic Netlink interface information + * structure point. + * \param [out] bcmgenl_pkt Generic Netlink packet information + * structure point. + * + * \retval SHR_E_NONE No errors. + * \retval SHR_E_XXXX Operation failed. + */ +extern int +bcmgenl_pkt_package( + int dev, + struct sk_buff *skb, + bcmgenl_info_t *bcmgenl_info, + bcmgenl_pkt_t *bcmgenl_pkt); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,17,0) +/* last should be static or global */ +#define bcmgenl_limited_gprintk(last, ...) { \ + struct timeval tv; \ + do_gettimeofday(&tv); \ + if (tv.tv_sec != last) { \ + printk(__VA_ARGS__); \ + last = tv.tv_sec; \ + } \ +} +#else +/* last should be static or global */ +#define bcmgenl_limited_gprintk(last, ...) { \ + struct timespec64 ts; \ + ktime_get_real_ts64(&ts); \ + if (ts.tv_sec != last) { \ + printk(__VA_ARGS__); \ + last = ts.tv_sec; \ + } \ +} + +#endif /* KERNEL_VERSION(3,17,0) */ +#endif /* BCMGENL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c new file mode 100644 index 000000000000..5290d9f4e013 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c @@ -0,0 +1,817 @@ +/*! \file bcmgenl_packet.c + * + * BCMGENL packet callback module. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include +#include +#include + +#include +#include +#include +#include +#include + +/*! \cond */ +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("BCMGENL Module"); +MODULE_LICENSE("GPL"); +/*! \endcond */ + +#include +#include +#include + +#define BCMGENL_PACKET_NAME GENL_PACKET_NAME + +/* set BCMGENL_PACKET_CB_DBG for debug info */ +#define BCMGENL_PACKET_CB_DBG +#ifdef BCMGENL_PACKET_CB_DBG +static int debug; + +#define DBG_LVL_VERB 0x1 +#define DBG_LVL_PDMP 0x2 +#define BCMGENL_PACKET_DBG_VERB(...) \ + if (debug & DBG_LVL_VERB) { \ + printk(__VA_ARGS__); \ + } +#else +#define BCMGENL_PACKET_DBG_VERB(...) +#endif + +#define BCMGENL_PACKET_QLEN_DFLT 1024 +static int bcmgenl_packet_qlen = BCMGENL_PACKET_QLEN_DFLT; +MODULE_PARAM(bcmgenl_packet_qlen, int, 0); +MODULE_PARM_DESC(bcmgenl_packet_qlen, "generic cb queue length (default 1024 buffers)"); + +#define FCS_SZ 4 + +static bcmgenl_info_t g_bcmgenl_packet_info = {{0}}; + +/* Maintain sampled pkt statistics */ +typedef struct bcmgenl_packet_stats_s { + unsigned long pkts_f_packet_cb; + unsigned long pkts_f_packet_mod; + unsigned long pkts_f_handled; + unsigned long pkts_f_tag_checked; + unsigned long pkts_f_tag_stripped; + unsigned long pkts_f_dst_mc; + unsigned long pkts_f_src_cpu; + unsigned long pkts_f_dst_cpu; + unsigned long pkts_c_qlen_cur; + unsigned long pkts_c_qlen_hi; + unsigned long pkts_d_qlen_max; + unsigned long pkts_d_no_mem; + unsigned long pkts_d_not_ready; + unsigned long pkts_d_metadata; + unsigned long pkts_d_skb; + unsigned long pkts_d_skb_cbd; + unsigned long pkts_d_meta_srcport; + unsigned long pkts_d_meta_dstport; + unsigned long pkts_d_invalid_size; +} bcmgenl_packet_stats_t; +static bcmgenl_packet_stats_t g_bcmgenl_packet_stats = {0}; + +typedef struct genl_packet_meta_s { + int in_ifindex; + int out_ifindex; + unsigned int context; +} genl_packet_meta_t; + +typedef struct genl_pkt_s { + struct list_head list; + struct net *netns; + genl_packet_meta_t meta; + struct sk_buff *skb; +} genl_pkt_t; + +typedef struct bcmgenl_packet_work_s { + struct list_head pkt_list; + struct work_struct wq; + spinlock_t lock; +} bcmgenl_packet_work_t; +static bcmgenl_packet_work_t g_bcmgenl_packet_work = {{0}}; + +/* driver proc entry root */ +static struct proc_dir_entry *bcmgenl_packet_proc_root = NULL; + +static bcmgenl_netif_t * +bcmgenl_packet_netif_lookup_by_ifindex(int ifindex) __attribute__ ((unused)); +static bcmgenl_netif_t * +bcmgenl_packet_netif_lookup_by_ifindex(int ifindex) +{ + struct list_head *list; + bcmgenl_netif_t *bcmgenl_netif = NULL; + unsigned long flags; + + /* look for ifindex from list of available net_devices */ + spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags); + list_for_each(list, &g_bcmgenl_packet_info.netif_list) { + bcmgenl_netif = (bcmgenl_netif_t*)list; + if (bcmgenl_netif->dev->ifindex == ifindex) { + spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags); + return bcmgenl_netif; + } + } + spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags); + return (NULL); +} + +static bcmgenl_netif_t * +bcmgenl_packet_netif_lookup_by_port(int port) +{ + struct list_head *list; + bcmgenl_netif_t *bcmgenl_netif = NULL; + unsigned long flags; + + /* look for port from list of available net_devices */ + spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags); + list_for_each(list, &g_bcmgenl_packet_info.netif_list) { + bcmgenl_netif = (bcmgenl_netif_t*)list; + if (bcmgenl_netif->port == port) { + spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags); + return bcmgenl_netif; + } + } + spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags); + return (NULL); +} + +static int +bcmgenl_packet_generic_meta_get(bcmgenl_pkt_t *bcmgenl_pkt, genl_packet_meta_t *genl_packet_meta) +{ + int srcport, dstport, dstport_type; + int src_ifindex = 0, dst_ifindex = 0; + bcmgenl_netif_t *bcmgenl_netif = NULL; + + if (!bcmgenl_pkt || !genl_packet_meta) { + printk("%s: bcmgenl_pkt or genl_packet_meta is NULL\n", __func__); + return (-1); + } + + /* get src and dst ports */ + srcport = bcmgenl_pkt->meta.src_port; + dstport = bcmgenl_pkt->meta.dst_port; + dstport_type = bcmgenl_pkt->meta.dst_port_type; + /* SDKLT-43751: Skip check of dstport on TD4/TH4 */ + if (srcport == -1) { + printk("%s: invalid srcport %d\n", __func__, srcport); + return (-1); + } + + /* find src port netif (no need to lookup CPU port) */ + if (srcport != 0) { + if ((bcmgenl_netif = bcmgenl_packet_netif_lookup_by_port(srcport))) { + src_ifindex = bcmgenl_netif->dev->ifindex; + } else { + src_ifindex = -1; + g_bcmgenl_packet_stats.pkts_d_meta_srcport++; + BCMGENL_PACKET_DBG_VERB("%s: could not find srcport(%d)\n", __func__, srcport); + } + } else { + g_bcmgenl_packet_stats.pkts_f_src_cpu++; + } + + /* set generic dst type for MC pkts */ + if (dstport_type == DSTPORT_TYPE_MC) { + g_bcmgenl_packet_stats.pkts_f_dst_mc++; + } else if (dstport != 0) { + /* find dst port netif for UC pkts (no need to lookup CPU port) */ + if ((bcmgenl_netif = bcmgenl_packet_netif_lookup_by_port(dstport))) { + dst_ifindex = bcmgenl_netif->dev->ifindex; + } else { + dst_ifindex = -1; + g_bcmgenl_packet_stats.pkts_d_meta_dstport++; + BCMGENL_PACKET_DBG_VERB("%s: could not find dstport(%d)\n", __func__, dstport); + } + } else if (dstport == 0) { + g_bcmgenl_packet_stats.pkts_f_dst_cpu++; + } + + BCMGENL_PACKET_DBG_VERB + ("%s: srcport %d, dstport %d, src_ifindex %d, dst_ifindex %d\n", + __func__, srcport, dstport, src_ifindex, dst_ifindex); + + memset(genl_packet_meta, 0, sizeof(genl_packet_meta_t)); + genl_packet_meta->in_ifindex = src_ifindex; + genl_packet_meta->out_ifindex = dst_ifindex; + return (0); +} + +static struct sk_buff * +bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt) +{ + int rv = 0, dev_no, pkt_len; + const struct ngknet_callback_desc *cbd = NULL; + ngknet_filter_t *match_filt = NULL; + uint8_t *pkt_ptr = NULL; + unsigned long flags; + bcmgenl_pkt_t bcmgenl_pkt; + genl_pkt_t *generic_pkt; + bool strip_tag = false; + struct sk_buff *skb_generic_pkt; + static uint32_t last_drop, last_alloc, last_skb; + + if (!skb) { + printk("%s: skb is NULL\n", __func__); + g_bcmgenl_packet_stats.pkts_d_skb++; + return (NULL); + } + cbd = NGKNET_SKB_CB(skb); + match_filt = cbd->filt; + /* SDKLT-43751: Get ptr offset to pkt payload to send to genetlink */ + pkt_ptr = cbd->pmd + cbd->pmd_len; + pkt_len = skb->len - cbd->pmd_len; + + if (!cbd || !match_filt) { + printk("%s: cbd(0x%p) or match_filt(0x%p) is NULL\n", + __func__, cbd, match_filt); + g_bcmgenl_packet_stats.pkts_d_skb_cbd++; + return (skb); + } + + /* check if this packet is from the same filter */ + if (!match_filt || + (match_filt->dest_type != NGKNET_FILTER_DEST_T_CB) || + (strncmp(match_filt->desc, BCMGENL_PACKET_NAME, NGKNET_FILTER_DESC_MAX) != 0)) { + return (skb); + } + dev_no = cbd->dinfo->dev_no; + + BCMGENL_PACKET_DBG_VERB + ("pkt size %d, match_filt->dest_id %d\n", + cbd->pkt_len, match_filt->dest_id); + BCMGENL_PACKET_DBG_VERB + ("filter user data: 0x%08x\n", *(uint32_t *)match_filt->user_data); + BCMGENL_PACKET_DBG_VERB + ("filter_cb for dev %d: %s\n", dev_no, cbd->dinfo->type_str); + g_bcmgenl_packet_stats.pkts_f_packet_cb++; + + /* Adjust original pkt_len to remove 4B FCS */ + if (pkt_len < FCS_SZ) { + g_bcmgenl_packet_stats.pkts_d_invalid_size++; + goto FILTER_CB_PKT_HANDLED; + } else { + pkt_len -= FCS_SZ; + } + + if (g_bcmgenl_packet_stats.pkts_c_qlen_cur >= bcmgenl_packet_qlen) { + g_bcmgenl_packet_stats.pkts_d_qlen_max++; + last_drop = 0; + bcmgenl_limited_gprintk + (last_drop, "%s: tail drop due to max qlen %d reached: %lu\n", + __func__, bcmgenl_packet_qlen, + g_bcmgenl_packet_stats.pkts_d_qlen_max); + goto FILTER_CB_PKT_HANDLED; + } + + if ((generic_pkt = kmalloc(sizeof(genl_pkt_t), GFP_ATOMIC)) == NULL) { + g_bcmgenl_packet_stats.pkts_d_no_mem++; + last_alloc = 0; + bcmgenl_limited_gprintk + (last_alloc, "%s: failed to alloc generic mem for pkt: %lu\n", + __func__, g_bcmgenl_packet_stats.pkts_d_no_mem); + goto FILTER_CB_PKT_HANDLED; + } + /* get packet metadata */ + rv = bcmgenl_pkt_package(dev_no, skb, + &g_bcmgenl_packet_info, + &bcmgenl_pkt); + if (rv < 0) { + printk("%s: Could not parse pkt metadata\n", __func__); + g_bcmgenl_packet_stats.pkts_d_metadata++; + goto FILTER_CB_PKT_HANDLED; + } + + BCMGENL_PACKET_DBG_VERB + ("%s: netns 0x%p, src_port %d, dst_port %d, dst_port_type %x\n", + __func__, + bcmgenl_pkt.netns, + bcmgenl_pkt.meta.src_port, + bcmgenl_pkt.meta.dst_port, + bcmgenl_pkt.meta.dst_port_type); + + /* generic_pkt start */ + generic_pkt->netns = bcmgenl_pkt.netns; + + /* get generic_pkt generic metadata */ + rv = bcmgenl_packet_generic_meta_get(&bcmgenl_pkt, &generic_pkt->meta); + if (rv < 0) { + printk("%s: Could not parse pkt metadata\n", __func__); + g_bcmgenl_packet_stats.pkts_d_metadata++; + goto FILTER_CB_PKT_HANDLED; + } + generic_pkt->meta.context = *(uint32_t *)cbd->filt->user_data; + + if (pkt_len >= 16) { + uint16_t proto = bcmgenl_pkt.meta.proto; + uint16_t vlan = bcmgenl_pkt.meta.vlan; + strip_tag = (vlan == 0xFFF) && + ((proto == 0x8100) || (proto == 0x88a8) || + (proto == 0x9100)); + if (strip_tag) { + pkt_len -= 4; + } + g_bcmgenl_packet_stats.pkts_f_tag_checked++; + } + + if ((skb_generic_pkt = dev_alloc_skb(pkt_len)) == NULL) + { + g_bcmgenl_packet_stats.pkts_d_no_mem++; + last_skb = 0; + bcmgenl_limited_gprintk + (last_skb, "%s: failed to alloc generic mem for pkt skb: %lu\n", + __func__, g_bcmgenl_packet_stats.pkts_d_no_mem); + goto FILTER_CB_PKT_HANDLED; + } + + /* SDKLT-43751: Use ptr offset to pkt payload to send to genetlink */ + /* setup skb by copying packet content */ + if (strip_tag) { + memcpy(skb_generic_pkt->data, pkt_ptr, 12); + memcpy(skb_generic_pkt->data + 12, pkt_ptr + 16, pkt_len - 12); + g_bcmgenl_packet_stats.pkts_f_tag_stripped++; + } else { + memcpy(skb_generic_pkt->data, pkt_ptr, pkt_len); + } + skb_put(skb_generic_pkt, pkt_len); + skb_generic_pkt->len = pkt_len; + generic_pkt->skb = skb_generic_pkt; + /* generic_pkt end */ + + spin_lock_irqsave(&g_bcmgenl_packet_work.lock, flags); + list_add_tail(&generic_pkt->list, &g_bcmgenl_packet_work.pkt_list); + + g_bcmgenl_packet_stats.pkts_c_qlen_cur++; + if (g_bcmgenl_packet_stats.pkts_c_qlen_cur > + g_bcmgenl_packet_stats.pkts_c_qlen_hi) { + g_bcmgenl_packet_stats.pkts_c_qlen_hi = + g_bcmgenl_packet_stats.pkts_c_qlen_cur; + } + + schedule_work(&g_bcmgenl_packet_work.wq); + spin_unlock_irqrestore(&g_bcmgenl_packet_work.lock, flags); + + /* + * expected rv values: + * -ve for error + * 0 for passthrough + * 1 for packet handled + * + */ + + /* Set rv to packet handled */ + rv = 1; + +FILTER_CB_PKT_HANDLED: + g_bcmgenl_packet_stats.pkts_f_handled++; + return skb; +} + +static void +bcmgenl_packet_task(struct work_struct *work) +{ + bcmgenl_packet_work_t *packet_work = + container_of(work, bcmgenl_packet_work_t, wq); + unsigned long flags; + struct list_head *list_ptr, *list_next; + genl_pkt_t *pkt; + + spin_lock_irqsave(&packet_work->lock, flags); + list_for_each_safe(list_ptr, list_next, &packet_work->pkt_list) { + /* dequeue pkt from list */ + pkt = list_entry(list_ptr, genl_pkt_t, list); + list_del(list_ptr); + g_bcmgenl_packet_stats.pkts_c_qlen_cur--; + spin_unlock_irqrestore(&packet_work->lock, flags); + + /* send generic_pkt to generic netlink */ + if (pkt) { + BCMGENL_PACKET_DBG_VERB + ("%s: netns 0x%p, in_ifindex %d, out_ifindex %d, context 0x%08x\n", + __func__, + pkt->netns, + pkt->meta.in_ifindex, + pkt->meta.out_ifindex, + pkt->meta.context); + genl_packet_send_packet(pkt->netns, + pkt->skb, + pkt->meta.in_ifindex, + pkt->meta.out_ifindex, + pkt->meta.context); + g_bcmgenl_packet_stats.pkts_f_packet_mod++; + + dev_kfree_skb_any(pkt->skb); + kfree(pkt); + } + spin_lock_irqsave(&packet_work->lock, flags); + } + spin_unlock_irqrestore(&packet_work->lock, flags); +} + +static int +bcmgenl_packet_netif_create_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif) +{ + bool found; + struct list_head *list; + bcmgenl_netif_t *new_netif, *lbcmgenl_netif; + unsigned long flags; + + if (!dinfo) { + printk("%s: dinfo is NULL\n", __func__); + return (-1); + } + if (netif->id == 0) { + printk("%s: netif->id == 0 is not a valid interface ID\n", __func__); + return (-1); + } + if ((new_netif = kmalloc(sizeof(bcmgenl_netif_t), GFP_ATOMIC)) == NULL) { + printk("%s: failed to alloc psample mem for netif '%s'\n", + __func__, netif->name); + return (-1); + } + + spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags); + + new_netif->dev = dinfo->vdev[netif->id]; + new_netif->id = netif->id; + new_netif->vlan = netif->vlan; + new_netif->port = netif->port; + /* insert netif sorted by ID similar to ngknet_netif_create() */ + found = false; + list_for_each(list, &g_bcmgenl_packet_info.netif_list) { + lbcmgenl_netif = (bcmgenl_netif_t *)list; + if (netif->id < lbcmgenl_netif->id) { + found = true; + g_bcmgenl_packet_info.netif_count++; + break; + } + } + + if (found) { + /* Replace previously removed interface */ + list_add_tail(&new_netif->list, &lbcmgenl_netif->list); + } else { + /* No holes - add to end of list */ + list_add_tail(&new_netif->list, &g_bcmgenl_packet_info.netif_list); + } + + spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags); + + BCMGENL_PACKET_DBG_VERB("%s: added netlink packet netif '%s'\n", __func__, netif->name); + return (0); +} + +static int +bcmgenl_packet_netif_destroy_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif) +{ + bool found = false; + struct list_head *list; + bcmgenl_netif_t *lbcmgenl_netif; + unsigned long flags; + + if (!dinfo || !netif) { + printk("%s: dinfo or netif is NULL\n", __func__); + return (-1); + } + + spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags); + + list_for_each(list, &g_bcmgenl_packet_info.netif_list) { + lbcmgenl_netif = (bcmgenl_netif_t *)list; + if (netif->id == lbcmgenl_netif->id) { + found = true; + list_del(&lbcmgenl_netif->list); + BCMGENL_PACKET_DBG_VERB("%s: removing psample netif '%s'\n", __func__, netif->name); + kfree(lbcmgenl_netif); + g_bcmgenl_packet_info.netif_count--; + break; + } + } + + spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags); + + if (!found) { + printk("%s: netif ID %d not found!\n", __func__, netif->id); + return (-1); + } + return (0); +} + +/* + * map Proc Read Entry + */ +static int +bcmgenl_packet_proc_map_show(struct seq_file *m, void *v) +{ + struct list_head *list; + bcmgenl_netif_t *bcmgenl_netif; + unsigned long flags; + + seq_printf(m, " Interface logical port ifindex\n"); + seq_printf(m, "------------- ------------ -------\n"); + spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags); + + list_for_each(list, &g_bcmgenl_packet_info.netif_list) { + bcmgenl_netif = (bcmgenl_netif_t*)list; + seq_printf(m, " %-14s %-14d %d\n", + bcmgenl_netif->dev->name, + bcmgenl_netif->port, + bcmgenl_netif->dev->ifindex); + } + + spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags); + return 0; +} + +static int +bcmgenl_packet_proc_map_open(struct inode * inode, struct file * file) +{ + return single_open(file, bcmgenl_packet_proc_map_show, NULL); +} + +static struct proc_ops bcmgenl_packet_proc_map_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bcmgenl_packet_proc_map_open, + .proc_read = seq_read, + .proc_write = NULL, + .proc_lseek = seq_lseek, + .proc_release = single_release, +}; + +static int +bcmgenl_packet_proc_stats_show(struct seq_file *m, void *v) +{ + seq_printf(m, "BCM KNET %s Callback Stats\n", BCMGENL_PACKET_NAME); + seq_printf(m, " DCB type %d\n", g_bcmgenl_packet_info.hw.dcb_type); + seq_printf(m, " pkts filter generic cb %10lu\n", g_bcmgenl_packet_stats.pkts_f_packet_cb); + seq_printf(m, " pkts sent to generic module %10lu\n", g_bcmgenl_packet_stats.pkts_f_packet_mod); + seq_printf(m, " pkts handled by generic cb %10lu\n", g_bcmgenl_packet_stats.pkts_f_handled); + seq_printf(m, " pkts with vlan tag checked %10lu\n", g_bcmgenl_packet_stats.pkts_f_tag_checked); + seq_printf(m, " pkts with vlan tag stripped %10lu\n", g_bcmgenl_packet_stats.pkts_f_tag_stripped); + seq_printf(m, " pkts with mc destination %10lu\n", g_bcmgenl_packet_stats.pkts_f_dst_mc); + seq_printf(m, " pkts with cpu source %10lu\n", g_bcmgenl_packet_stats.pkts_f_src_cpu); + seq_printf(m, " pkts with cpu destination %10lu\n", g_bcmgenl_packet_stats.pkts_f_dst_cpu); + seq_printf(m, " pkts current queue length %10lu\n", g_bcmgenl_packet_stats.pkts_c_qlen_cur); + seq_printf(m, " pkts high queue length %10lu\n", g_bcmgenl_packet_stats.pkts_c_qlen_hi); + seq_printf(m, " pkts drop max queue length %10lu\n", g_bcmgenl_packet_stats.pkts_d_qlen_max); + seq_printf(m, " pkts drop no memory %10lu\n", g_bcmgenl_packet_stats.pkts_d_no_mem); + seq_printf(m, " pkts drop generic not ready %10lu\n", g_bcmgenl_packet_stats.pkts_d_not_ready); + seq_printf(m, " pkts drop metadata parse error %10lu\n", g_bcmgenl_packet_stats.pkts_d_metadata); + seq_printf(m, " pkts drop skb error %10lu\n", g_bcmgenl_packet_stats.pkts_d_skb); + seq_printf(m, " pkts drop skb cbd error %10lu\n", g_bcmgenl_packet_stats.pkts_d_skb_cbd); + seq_printf(m, " pkts with invalid src port %10lu\n", g_bcmgenl_packet_stats.pkts_d_meta_srcport); + seq_printf(m, " pkts with invalid dst port %10lu\n", g_bcmgenl_packet_stats.pkts_d_meta_dstport); + seq_printf(m, " pkts with invalid orig pkt sz %10lu\n", g_bcmgenl_packet_stats.pkts_d_invalid_size); + return 0; +} + +static int +bcmgenl_packet_proc_stats_open(struct inode * inode, struct file * file) +{ + return single_open(file, bcmgenl_packet_proc_stats_show, NULL); +} + +/* + * generic stats Proc Write Entry + * + * Syntax: + * write any value to clear stats + */ +static ssize_t +bcmgenl_packet_proc_stats_write( + struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + int qlen_cur = 0; + unsigned long flags; + + spin_lock_irqsave(&g_bcmgenl_packet_work.lock, flags); + qlen_cur = g_bcmgenl_packet_stats.pkts_c_qlen_cur; + memset(&g_bcmgenl_packet_stats, 0, sizeof(bcmgenl_packet_stats_t)); + g_bcmgenl_packet_stats.pkts_c_qlen_cur = qlen_cur; + spin_unlock_irqrestore(&g_bcmgenl_packet_work.lock, flags); + + return count; +} + +static struct proc_ops bcmgenl_packet_proc_stats_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bcmgenl_packet_proc_stats_open, + .proc_read = seq_read, + .proc_write = bcmgenl_packet_proc_stats_write, + .proc_lseek = seq_lseek, + .proc_release = single_release, +}; + +/* + * generic debug Proc Read Entry + */ +static int +bcmgenl_packet_proc_debug_show(struct seq_file *m, void *v) +{ + seq_printf(m, "BCM KNET %s Callback Config\n", BCMGENL_PACKET_NAME); + seq_printf(m, " debug: 0x%x\n", debug); + seq_printf(m, " cmic_type: %d\n", g_bcmgenl_packet_info.hw.cmic_type); + seq_printf(m, " dcb_type: %d\n", g_bcmgenl_packet_info.hw.dcb_type); + seq_printf(m, " dcb_size: %d\n", g_bcmgenl_packet_info.hw.dcb_size); + seq_printf(m, " pkt_hdr_size: %d\n", g_bcmgenl_packet_info.hw.pkt_hdr_size); + seq_printf(m, " cdma_channels: %d\n", g_bcmgenl_packet_info.hw.cdma_channels); + seq_printf(m, " netif_count: %d\n", g_bcmgenl_packet_info.netif_count); + seq_printf(m, " queue length: %d\n", bcmgenl_packet_qlen); + + return 0; +} + +static int +bcmgenl_packet_proc_debug_open(struct inode * inode, struct file * file) +{ + return single_open(file, bcmgenl_packet_proc_debug_show, NULL); +} + +/* + * generic debug Proc Write Entry + * + * Syntax: + * debug= + * + * Where corresponds to the debug module parameter. + * + * Examples: + * debug=0x1 + */ +static ssize_t +bcmgenl_packet_proc_debug_write( + struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + char debug_str[40]; + char *ptr; + + if (count > sizeof(debug_str)) { + count = sizeof(debug_str) - 1; + debug_str[count] = '\0'; + } + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + if ((ptr = strstr(debug_str, "debug=")) != NULL) { + ptr += 6; + debug = simple_strtol(ptr, NULL, 0); + } else { + printk("Warning: unknown configuration setting\n"); + } + + return count; +} + +static struct proc_ops bcmgenl_packet_proc_debug_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bcmgenl_packet_proc_debug_open, + .proc_read = seq_read, + .proc_write = bcmgenl_packet_proc_debug_write, + .proc_lseek = seq_lseek, + .proc_release = single_release, +}; + +static int +genl_cb_proc_cleanup(void) +{ + remove_proc_entry("stats", bcmgenl_packet_proc_root); + remove_proc_entry("debug", bcmgenl_packet_proc_root); + remove_proc_entry("map" , bcmgenl_packet_proc_root); + + proc_remove(bcmgenl_packet_proc_root); + return 0; +} + +static int +genl_cb_proc_init(void) +{ + char packet_procfs_path[PROCFS_MAX_PATH]; + struct proc_dir_entry *entry; + + /* create procfs for generic */ + snprintf(packet_procfs_path, PROCFS_MAX_PATH, "%s/%s", + BCMGENL_PROCFS_PATH, BCMGENL_PACKET_NAME); + bcmgenl_packet_proc_root = proc_mkdir(packet_procfs_path, NULL); + + /* create procfs for generic stats */ + PROC_CREATE(entry, "stats", 0666, bcmgenl_packet_proc_root, + &bcmgenl_packet_proc_stats_file_ops); + if (entry == NULL) { + printk("%s: Unable to create procfs entry '/procfs/%s/stats'\n", + __func__, packet_procfs_path); + return -1; + } + + /* create procfs for getting netdev mapping */ + PROC_CREATE(entry, "map", 0666, bcmgenl_packet_proc_root, + &bcmgenl_packet_proc_map_file_ops); + if (entry == NULL) { + printk("%s: Unable to create procfs entry '/procfs/%s/map'\n", + __func__, packet_procfs_path); + return -1; + } + + /* create procfs for debug log */ + PROC_CREATE(entry, "debug", 0666, bcmgenl_packet_proc_root, + &bcmgenl_packet_proc_debug_file_ops); + if (entry == NULL) { + printk("%s: Unable to create procfs entry '/procfs/%s/debug'\n", + __func__, packet_procfs_path); + return -1; + } + return 0; +} + +static int +genl_cb_cleanup(void) +{ + genl_pkt_t *pkt; + + cancel_work_sync(&g_bcmgenl_packet_work.wq); + + while (!list_empty(&g_bcmgenl_packet_work.pkt_list)) { + pkt = list_entry(g_bcmgenl_packet_work.pkt_list.next, + genl_pkt_t, list); + list_del(&pkt->list); + dev_kfree_skb_any(pkt->skb); + kfree(pkt); + } + + return 0; +} + +static int +genl_cb_init(void) +{ + /* clear data structs */ + memset(&g_bcmgenl_packet_stats, 0, sizeof(bcmgenl_packet_stats_t)); + memset(&g_bcmgenl_packet_info, 0, sizeof(bcmgenl_info_t)); + memset(&g_bcmgenl_packet_work, 0, sizeof(bcmgenl_packet_work_t)); + + /* setup bcmgenl_packet_info struct */ + INIT_LIST_HEAD(&g_bcmgenl_packet_info.netif_list); + spin_lock_init(&g_bcmgenl_packet_info.lock); + + /* setup generic work queue */ + spin_lock_init(&g_bcmgenl_packet_work.lock); + INIT_LIST_HEAD(&g_bcmgenl_packet_work.pkt_list); + INIT_WORK(&g_bcmgenl_packet_work.wq, bcmgenl_packet_task); + + /* get net namespace */ + g_bcmgenl_packet_info.netns = get_net_ns_by_pid(current->pid); + if (!g_bcmgenl_packet_info.netns) { + printk("%s: Could not get network namespace for pid %d\n", + __func__, current->pid); + return (-1); + } + BCMGENL_PACKET_DBG_VERB + ("%s: current->pid %d, netns 0x%p\n", + __func__, current->pid, g_bcmgenl_packet_info.netns); + return 0; +} + +int bcmgenl_packet_cleanup(void) +{ + ngknet_netif_create_cb_unregister(bcmgenl_packet_netif_create_cb); + ngknet_netif_destroy_cb_unregister(bcmgenl_packet_netif_destroy_cb); + ngknet_filter_cb_unregister(bcmgenl_packet_filter_cb); + genl_cb_cleanup(); + genl_cb_proc_cleanup(); + return 0; +} + +int bcmgenl_packet_init(void) +{ + ngknet_netif_create_cb_register(bcmgenl_packet_netif_create_cb); + ngknet_netif_destroy_cb_register(bcmgenl_packet_netif_destroy_cb); + ngknet_filter_cb_register_by_name + (bcmgenl_packet_filter_cb, BCMGENL_PACKET_NAME); + + genl_cb_proc_init(); + return genl_cb_init(); +} + +EXPORT_SYMBOL(bcmgenl_packet_cleanup); +EXPORT_SYMBOL(bcmgenl_packet_init); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h new file mode 100644 index 000000000000..3ef3fe87d23a --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h @@ -0,0 +1,29 @@ +/*! \file bcmgenl_packet.h + * + * BCMGENL packet module. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMGENL_PACKET_H +#define BCMGENL_PACKET_H + +extern int bcmgenl_packet_init(void); +extern int bcmgenl_packet_cleanup(void); + +#endif /* BCMGENL_PACKET_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c new file mode 100644 index 000000000000..27944af15484 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c @@ -0,0 +1,1076 @@ +/*! \file bcmgenl_psample.c + * + * BCMGENL psample callback module. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include +#include +#include + +#include +#include +#include +#include +#include + +/*! \cond */ +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("BCMGENL Module"); +MODULE_LICENSE("GPL"); +/*! \endcond */ + +#include +#include + +#if BCMGENL_PSAMPLE_SUPPORT +#include +#define BCMGENL_PSAMPLE_NAME PSAMPLE_GENL_NAME + +/* set BCMGENL_PSAMPLE_CB_DBG for debug info */ +#define BCMGENL_PSAMPLE_CB_DBG +#ifdef BCMGENL_PSAMPLE_CB_DBG +static int debug; + +#define DBG_LVL_VERB 0x1 +#define DBG_LVL_PDMP 0x2 +#define BCMGENL_PSAMPLE_DBG_VERB(...) \ + if (debug & DBG_LVL_VERB) { \ + printk(__VA_ARGS__); \ + } +#else +#define BCMGENL_PSAMPLE_DBG_VERB(...) +#endif + + + +#define FCS_SZ 4 + +#define PSAMPLE_NLA_PADDING 4 +#define PSAMPLE_PKT_HANDLED (1) + +#define PSAMPLE_RATE_DFLT 1 +#define PSAMPLE_SIZE_DFLT 128 +static int psample_size = PSAMPLE_SIZE_DFLT; +MODULE_PARAM(psample_size, int, 0); +MODULE_PARM_DESC(psample_size, +"psample pkt size (default 128 bytes)"); + +#define BCMGENL_PSAMPLE_QLEN_DFLT 1024 +static int bcmgenl_psample_qlen = BCMGENL_PSAMPLE_QLEN_DFLT; +MODULE_PARAM(bcmgenl_psample_qlen, int, 0); +MODULE_PARM_DESC(bcmgenl_psample_qlen, "psample queue length (default 1024 buffers)"); + +static bcmgenl_info_t g_bcmgenl_psample_info = {{0}}; + +/* Maintain sampled pkt statistics */ +typedef struct psample_stats_s { + unsigned long pkts_f_psample_cb; + unsigned long pkts_f_psample_mod; + unsigned long pkts_f_handled; + unsigned long pkts_f_pass_through; + unsigned long pkts_f_dst_mc; + unsigned long pkts_f_dst_cpu; + unsigned long pkts_c_qlen_cur; + unsigned long pkts_c_qlen_hi; + unsigned long pkts_d_qlen_max; + unsigned long pkts_d_no_mem; + unsigned long pkts_d_no_group; + unsigned long pkts_d_sampling_disabled; + unsigned long pkts_d_not_ready; + unsigned long pkts_d_metadata; + unsigned long pkts_d_skb; + unsigned long pkts_d_skb_cbd; + unsigned long pkts_d_meta_srcport; + unsigned long pkts_d_meta_dstport; + unsigned long pkts_d_invalid_size; +} bcmgenl_psample_stats_t; +static bcmgenl_psample_stats_t g_bcmgenl_psample_stats = {0}; + +typedef struct psample_meta_s { + int trunc_size; + int src_ifindex; + int dst_ifindex; + int sample_rate; +} psample_meta_t; + +typedef struct psample_pkt_s { + struct list_head list; + psample_meta_t meta; + struct sk_buff *skb; +#if IS_ENABLED(CONFIG_PSAMPLE) + struct psample_group *group; +#endif /* CONFIG_PSAMPLE */ +} psample_pkt_t; + +typedef struct bcmgenl_psample_work_s { + struct list_head pkt_list; + struct work_struct wq; + spinlock_t lock; +} bcmgenl_psample_work_t; +static bcmgenl_psample_work_t g_bcmgenl_psample_work = {{0}}; + +/* driver proc entry root */ +static struct proc_dir_entry *psample_proc_root = NULL; + +static bcmgenl_netif_t * +psample_netif_lookup_by_ifindex(int ifindex) __attribute__ ((unused)); +static bcmgenl_netif_t * +psample_netif_lookup_by_ifindex(int ifindex) +{ + struct list_head *list; + bcmgenl_netif_t *bcmgenl_netif = NULL; + unsigned long flags; + + /* look for port from list of available net_devices */ + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + bcmgenl_netif = (bcmgenl_netif_t*)list; + if (bcmgenl_netif->dev->ifindex == ifindex) { + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + return bcmgenl_netif; + } + } + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + return (NULL); +} + +static bcmgenl_netif_t * +psample_netif_lookup_by_port(int port) +{ + struct list_head *list; + bcmgenl_netif_t *bcmgenl_netif = NULL; + unsigned long flags; + + /* look for port from list of available net_devices */ + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + bcmgenl_netif = (bcmgenl_netif_t*)list; + if (bcmgenl_netif->port == port) { + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + return bcmgenl_netif; + } + } + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + return (NULL); +} + +static int +bcmgenl_psample_meta_get(struct sk_buff *skb, bcmgenl_pkt_t *bcmgenl_pkt, psample_meta_t *sflow_meta) +{ + int srcport, dstport, dstport_type; + int src_ifindex = 0, dst_ifindex = 0; + int sample_rate = 1; + int sample_size = PSAMPLE_SIZE_DFLT; + bcmgenl_netif_t *psample_netif = NULL; + const struct ngknet_callback_desc *cbd; + + if (!skb || !sflow_meta) { + printk("%s: skb or sflow_meta is NULL\n", __func__); + return (-1); + } + cbd = NGKNET_SKB_CB(skb); + /* get src and dst ports */ + srcport = bcmgenl_pkt->meta.src_port; + dstport = bcmgenl_pkt->meta.dst_port; + dstport_type = bcmgenl_pkt->meta.dst_port_type; + /* SDKLT-43751: Skip check of dstport on TD4/TH4 */ + if (srcport == -1) { + printk("%s: invalid srcport %d\n", __func__, srcport); + return (-1); + } + + /* find src port netif */ + if ((psample_netif = psample_netif_lookup_by_port(srcport))) { + src_ifindex = psample_netif->dev->ifindex; + sample_rate = psample_netif->sample_rate; + sample_size = psample_netif->sample_size; + } else { + g_bcmgenl_psample_stats.pkts_d_meta_srcport++; + BCMGENL_PSAMPLE_DBG_VERB("%s: could not find psample netif for src dev %s (ifidx %d)\n", + __func__, cbd->net_dev->name, src_ifindex); + } + + /* set generic dst type for MC pkts */ + if (dstport_type == DSTPORT_TYPE_MC) { + g_bcmgenl_psample_stats.pkts_f_dst_mc++; + } else if (dstport != 0) { + /* find dst port netif for UC pkts (no need to lookup CPU port) */ + if ((psample_netif = psample_netif_lookup_by_port(dstport))) { + dst_ifindex = psample_netif->dev->ifindex; + } else { + dst_ifindex = -1; + g_bcmgenl_psample_stats.pkts_d_meta_dstport++; + BCMGENL_PSAMPLE_DBG_VERB("%s: could not find dstport(%d)\n", __func__, dstport); + } + } else if (dstport == 0) { + g_bcmgenl_psample_stats.pkts_f_dst_cpu++; + } + + BCMGENL_PSAMPLE_DBG_VERB + ("%s: srcport %d, dstport %d, src_ifindex %d, dst_ifindex %d\n", + __func__, srcport, dstport, src_ifindex, dst_ifindex); + + memset(sflow_meta, 0, sizeof(psample_meta_t)); + sflow_meta->src_ifindex = src_ifindex; + sflow_meta->dst_ifindex = dst_ifindex; + sflow_meta->trunc_size = sample_size; + sflow_meta->sample_rate = sample_rate; + return (0); +} + +static struct sk_buff * +bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt) +{ + int rv = 0, dev_no, pkt_len; + const struct ngknet_callback_desc *cbd = NULL; + ngknet_filter_t *match_filt = NULL; + psample_meta_t meta; + uint8_t *pkt_ptr = NULL; + bcmgenl_pkt_t bcmgenl_pkt; + static uint32_t last_drop, last_alloc, last_skb; +#if IS_ENABLED(CONFIG_PSAMPLE) + struct psample_group *group; +#endif /* CONFIG_PSAMPLE */ + + if (!skb) { + printk("%s: skb is NULL\n", __func__); + g_bcmgenl_psample_stats.pkts_d_skb++; + return (NULL); + } + cbd = NGKNET_SKB_CB(skb); + match_filt = cbd->filt; + /* SDKLT-43751: Get ptr offset to pkt payload to send to genetlink */ + pkt_ptr = cbd->pmd + cbd->pmd_len; + pkt_len = skb->len - cbd->pmd_len; + + if (!cbd || !match_filt) { + printk("%s: cbd(0x%p) or match_filt(0x%p) is NULL\n", + __func__, cbd, match_filt); + g_bcmgenl_psample_stats.pkts_d_skb_cbd++; + return (skb); + } + + /* check if this packet is sampled packet (from sample filter) */ + if (!match_filt || + (match_filt->dest_type != NGKNET_FILTER_DEST_T_CB) || + (strncmp(match_filt->desc, BCMGENL_PSAMPLE_NAME, NGKNET_FILTER_DESC_MAX) != 0)) { + return (skb); + } + dev_no = cbd->dinfo->dev_no; + + BCMGENL_PSAMPLE_DBG_VERB + ("pkt size %d, match_filt->dest_id %d\n", cbd->pkt_len, match_filt->dest_id); + BCMGENL_PSAMPLE_DBG_VERB + ("filter user data: 0x%08x\n", *(uint32_t *)match_filt->user_data); + BCMGENL_PSAMPLE_DBG_VERB + ("filter_cb for dev %d: %s\n", dev_no, cbd->dinfo->type_str); + g_bcmgenl_psample_stats.pkts_f_psample_cb++; + +#if IS_ENABLED(CONFIG_PSAMPLE) + /* get psample group info. psample genetlink group ID passed in match_filt->dest_id */ + group = psample_group_get(g_bcmgenl_psample_info.netns, match_filt->dest_id); + if (!group) { + printk("%s: Could not find psample genetlink group %d\n", __func__, match_filt->dest_id); + g_bcmgenl_psample_stats.pkts_d_no_group++; + goto PSAMPLE_FILTER_CB_PKT_HANDLED; + } +#endif /* CONFIG_PSAMPLE */ + /* get packet metadata */ + rv = bcmgenl_pkt_package(dev_no, skb, + &g_bcmgenl_psample_info, + &bcmgenl_pkt); + if (rv < 0) { + printk("%s: Could not parse pkt metadata\n", __func__); + g_bcmgenl_psample_stats.pkts_d_metadata++; + goto PSAMPLE_FILTER_CB_PKT_HANDLED; + } + + BCMGENL_PSAMPLE_DBG_VERB + ("%s: netns 0x%p, src_port %d, dst_port %d, dst_port_type %x\n", + __func__, + bcmgenl_pkt.netns, + bcmgenl_pkt.meta.src_port, + bcmgenl_pkt.meta.dst_port, + bcmgenl_pkt.meta.dst_port_type); + + /* get psample metadata */ + rv = bcmgenl_psample_meta_get(skb, &bcmgenl_pkt, &meta); + if (rv < 0) { + printk("%s: Could not parse pkt metadata\n", __func__); + g_bcmgenl_psample_stats.pkts_d_metadata++; + goto PSAMPLE_FILTER_CB_PKT_HANDLED; + } + + /* Adjust original pkt pkt_len to remove 4B FCS */ + if (pkt_len < FCS_SZ) { + g_bcmgenl_psample_stats.pkts_d_invalid_size++; + goto PSAMPLE_FILTER_CB_PKT_HANDLED; + } else { + pkt_len -= FCS_SZ; + } + + /* Account for padding in libnl used by psample */ + if (meta.trunc_size >= pkt_len) { + meta.trunc_size = pkt_len - PSAMPLE_NLA_PADDING; + } + BCMGENL_PSAMPLE_DBG_VERB + ("%s: trunc_size %d, sample_rate %d " + "src_ifindex %d, dst_ifindex %d\n", + __func__, meta.trunc_size, meta.sample_rate, + meta.src_ifindex, meta.dst_ifindex); +#if IS_ENABLED(CONFIG_PSAMPLE) + BCMGENL_PSAMPLE_DBG_VERB + ("%s: group 0x%x\n", __func__, group->group_num); +#endif /* CONFIG_PSAMPLE */ + + /* drop if configured sample rate is 0 */ + if (meta.sample_rate > 0) { + unsigned long flags; + psample_pkt_t *psample_pkt; + struct sk_buff *skb_psample; + + if (g_bcmgenl_psample_stats.pkts_c_qlen_cur >= bcmgenl_psample_qlen) { + g_bcmgenl_psample_stats.pkts_d_qlen_max++; + last_drop = 0; + bcmgenl_limited_gprintk + (last_drop, "%s: tail drop due to max qlen %d reached: %lu\n", + __func__, bcmgenl_psample_qlen, + g_bcmgenl_psample_stats.pkts_d_qlen_max); + goto PSAMPLE_FILTER_CB_PKT_HANDLED; + } + + if ((psample_pkt = kmalloc(sizeof(psample_pkt_t), GFP_ATOMIC)) == NULL) { + g_bcmgenl_psample_stats.pkts_d_no_mem++; + last_alloc = 0; + bcmgenl_limited_gprintk + (last_alloc, "%s: failed to alloc generic mem for pkt: %lu\n", + __func__, g_bcmgenl_psample_stats.pkts_d_no_mem); + goto PSAMPLE_FILTER_CB_PKT_HANDLED; + } + memcpy(&psample_pkt->meta, &meta, sizeof(psample_meta_t)); +#if IS_ENABLED(CONFIG_PSAMPLE) + psample_pkt->group = group; +#endif /* CONFIG_PSAMPLE */ + if ((skb_psample = dev_alloc_skb(meta.trunc_size)) == NULL) { + g_bcmgenl_psample_stats.pkts_d_no_mem++; + last_skb = 0; + bcmgenl_limited_gprintk + (last_skb, "%s: failed to alloc generic mem for pkt skb: %lu\n", + __func__, g_bcmgenl_psample_stats.pkts_d_no_mem); + goto PSAMPLE_FILTER_CB_PKT_HANDLED; + } + + /* SDKLT-43751: Use ptr offset to pkt payload to send to genetlink */ + /* setup skb to point to pkt */ + memcpy(skb_psample->data, pkt_ptr, meta.trunc_size); + skb_put(skb_psample, meta.trunc_size); + skb_psample->len = pkt_len; + psample_pkt->skb = skb_psample; + + spin_lock_irqsave(&g_bcmgenl_psample_work.lock, flags); + list_add_tail(&psample_pkt->list, &g_bcmgenl_psample_work.pkt_list); + + g_bcmgenl_psample_stats.pkts_c_qlen_cur++; + if (g_bcmgenl_psample_stats.pkts_c_qlen_cur > g_bcmgenl_psample_stats.pkts_c_qlen_hi) { + g_bcmgenl_psample_stats.pkts_c_qlen_hi = g_bcmgenl_psample_stats.pkts_c_qlen_cur; + } + + schedule_work(&g_bcmgenl_psample_work.wq); + spin_unlock_irqrestore(&g_bcmgenl_psample_work.lock, flags); + } else { + g_bcmgenl_psample_stats.pkts_d_sampling_disabled++; + } + +PSAMPLE_FILTER_CB_PKT_HANDLED: + g_bcmgenl_psample_stats.pkts_f_pass_through++; + return skb; +} + +static void +bcmgenl_psample_task(struct work_struct *work) +{ + bcmgenl_psample_work_t *psample_work = container_of(work, bcmgenl_psample_work_t, wq); + unsigned long flags; + struct list_head *list_ptr, *list_next; + psample_pkt_t *pkt; + + spin_lock_irqsave(&psample_work->lock, flags); + list_for_each_safe(list_ptr, list_next, &psample_work->pkt_list) { + /* dequeue pkt from list */ + pkt = list_entry(list_ptr, psample_pkt_t, list); + list_del(list_ptr); + g_bcmgenl_psample_stats.pkts_c_qlen_cur--; + spin_unlock_irqrestore(&psample_work->lock, flags); + + /* send generic_pkt to generic netlink */ + if (pkt) { +#if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \ + (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR)) + struct psample_metadata md = {0}; + md.trunc_size = pkt->meta.trunc_size; + md.in_ifindex = pkt->meta.src_ifindex; + md.out_ifindex = pkt->meta.dst_ifindex; +#endif + BCMGENL_PSAMPLE_DBG_VERB + ("%s: trunc_size %d, sample_rate %d," + "src_ifindex %d, dst_ifindex %d group 0x%x\n", + __func__, pkt->meta.trunc_size, pkt->meta.sample_rate, + pkt->meta.src_ifindex, pkt->meta.dst_ifindex, pkt->group->group_num); +#if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \ + (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR)) + psample_sample_packet(pkt->group, + pkt->skb, + pkt->meta.sample_rate, + &md); +#else + psample_sample_packet(pkt->group, + pkt->skb, + pkt->meta.trunc_size, + pkt->meta.src_ifindex, + pkt->meta.dst_ifindex, + pkt->meta.sample_rate); +#endif /* CONFIG_PSAMPLE */ + g_bcmgenl_psample_stats.pkts_f_psample_mod++; + + dev_kfree_skb_any(pkt->skb); + kfree(pkt); + } + spin_lock_irqsave(&psample_work->lock, flags); + } + spin_unlock_irqrestore(&psample_work->lock, flags); +} + +static int +bcmgenl_psample_netif_create_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif) +{ + bool found; + struct list_head *list; + bcmgenl_netif_t *new_netif, *lbcmgenl_netif; + unsigned long flags; + + if (!dinfo) { + printk("%s: dinfo is NULL\n", __func__); + return (-1); + } + if (netif->id == 0) { + printk("%s: netif->id == 0 is not a valid interface ID\n", __func__); + return (-1); + } + if ((new_netif = kmalloc(sizeof(bcmgenl_netif_t), GFP_ATOMIC)) == NULL) { + printk("%s: failed to alloc psample mem for netif '%s'\n", + __func__, netif->name); + return (-1); + } + + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + new_netif->dev = dinfo->vdev[netif->id]; + new_netif->id = netif->id; + new_netif->port = netif->port; + new_netif->vlan = netif->vlan; + new_netif->sample_rate = PSAMPLE_RATE_DFLT; + new_netif->sample_size = PSAMPLE_SIZE_DFLT; + + /* insert netif sorted by ID similar to ngknet_netif_create() */ + found = false; + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + lbcmgenl_netif = (bcmgenl_netif_t*)list; + if (netif->id < lbcmgenl_netif->id) { + found = true; + g_bcmgenl_psample_info.netif_count++; + break; + } + } + + if (found) { + /* Replace previously removed interface */ + list_add_tail(&new_netif->list, &lbcmgenl_netif->list); + } else { + /* No holes - add to end of list */ + list_add_tail(&new_netif->list, &g_bcmgenl_psample_info.netif_list); + } + + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + + BCMGENL_PSAMPLE_DBG_VERB + ("%s: added netlink psample netif '%s'\n", __func__, netif->name); + return (0); +} + +static int +bcmgenl_psample_netif_destroy_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif) +{ + bool found = false; + struct list_head *list; + bcmgenl_netif_t *lbcmgenl_netif; + unsigned long flags; + + if (!dinfo || !netif) { + printk("%s: dinfo or netif is NULL\n", __func__); + return (-1); + } + + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + lbcmgenl_netif = (bcmgenl_netif_t *)list; + if (netif->id == lbcmgenl_netif->id) { + found = true; + list_del(&lbcmgenl_netif->list); + BCMGENL_PSAMPLE_DBG_VERB + ("%s: removing psample netif '%s'\n", __func__, netif->name); + kfree(lbcmgenl_netif); + g_bcmgenl_psample_info.netif_count--; + break; + } + } + + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + + if (!found) { + printk("%s: netif ID %d not found!\n", __func__, netif->id); + return (-1); + } + return (0); +} + +/* + * psample rate Proc Read Entry + */ +static int +bcmgenl_psample_proc_rate_show(struct seq_file *m, void *v) +{ + struct list_head *list; + bcmgenl_netif_t *psample_netif; + unsigned long flags; + + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + psample_netif = (bcmgenl_netif_t*)list; + seq_printf(m, " %-14s %d\n", psample_netif->dev->name, psample_netif->sample_rate); + } + + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + + return 0; +} + +static int +bcmgenl_psample_proc_rate_open(struct inode * inode, struct file * file) +{ + return single_open(file, bcmgenl_psample_proc_rate_show, NULL); +} + +/* + * psample rate Proc Write Entry + * + * Syntax: + * = + * + * Where is a virtual network interface name. + * + * Examples: + * eth4=1000 + */ +static ssize_t +bcmgenl_psample_proc_rate_write( + struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + bool found; + struct list_head *list; + bcmgenl_netif_t *psample_netif; + char sample_str[40], *ptr, *newline; + unsigned long flags; + + + if (count > sizeof(sample_str)) { + count = sizeof(sample_str) - 1; + sample_str[count] = '\0'; + } + if (copy_from_user(sample_str, buf, count)) { + return -EFAULT; + } + sample_str[count] = 0; + newline = strchr(sample_str, '\n'); + if (newline) { + /* Chop off the trailing newline */ + *newline = '\0'; + } + + if ((ptr = strchr(sample_str, '=')) == NULL && + (ptr = strchr(sample_str, ':')) == NULL) { + printk("Error: Pkt sample rate syntax not recognized: '%s'\n", + sample_str); + return count; + } + *ptr++ = 0; + + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + + found = false; + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + psample_netif = (bcmgenl_netif_t*)list; + if (strcmp(psample_netif->dev->name, sample_str) == 0) { + psample_netif->sample_rate = simple_strtol(ptr, NULL, 10); + found = true; + break; + } + } + + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + + if (!found) { + printk("Warning: Failed setting psample rate on unknown network" + "interface: '%s'\n", sample_str); + } + return count; +} + +struct proc_ops bcmgenl_psample_proc_rate_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bcmgenl_psample_proc_rate_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = bcmgenl_psample_proc_rate_write, + .proc_release = single_release, +}; + +/* + * psample size Proc Read Entry + */ +static int +bcmgenl_psample_proc_size_show(struct seq_file *m, void *v) +{ + struct list_head *list; + bcmgenl_netif_t *psample_netif; + unsigned long flags; + + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + psample_netif = (bcmgenl_netif_t*)list; + seq_printf(m, " %-14s %d\n", psample_netif->dev->name, psample_netif->sample_size); + } + + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + return 0; +} + +static int +bcmgenl_psample_proc_size_open(struct inode * inode, struct file * file) +{ + return single_open(file, bcmgenl_psample_proc_size_show, NULL); +} + +/* + * psample size Proc Write Entry + * + * Syntax: + * = + * + * Where is a virtual network interface name. + * + * Examples: + * eth4=128 + */ +static ssize_t +bcmgenl_psample_proc_size_write( + struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + bool found; + struct list_head *list; + bcmgenl_netif_t *bcmgenl_netif; + char sample_str[40], *ptr, *newline; + unsigned long flags; + + if (count > sizeof(sample_str)) { + count = sizeof(sample_str) - 1; + sample_str[count] = '\0'; + } + if (copy_from_user(sample_str, buf, count)) { + return -EFAULT; + } + sample_str[count] = 0; + newline = strchr(sample_str, '\n'); + if (newline) { + /* Chop off the trailing newline */ + *newline = '\0'; + } + + if ((ptr = strchr(sample_str, '=')) == NULL && + (ptr = strchr(sample_str, ':')) == NULL) { + printk("Error: Pkt sample size syntax not recognized: '%s'\n", sample_str); + return count; + } + *ptr++ = 0; + + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + + found = false; + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + bcmgenl_netif = (bcmgenl_netif_t*)list; + if (strcmp(bcmgenl_netif->dev->name, sample_str) == 0) { + bcmgenl_netif->sample_size = simple_strtol(ptr, NULL, 10); + found = true; + break; + } + } + + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + + if (!found) { + printk("Warning: Failed setting psample size on unknown network interface: '%s'\n", sample_str); + } + return count; +} + +struct proc_ops bcmgenl_psample_proc_size_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bcmgenl_psample_proc_size_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = bcmgenl_psample_proc_size_write, + .proc_release = single_release, +}; + +/* + * psample map Proc Read Entry + */ +static int +bcmgenl_psample_proc_map_show(struct seq_file *m, void *v) +{ + struct list_head *list; + bcmgenl_netif_t *bcmgenl_netif; + unsigned long flags; + + seq_printf(m, " Interface logical port ifindex\n"); + seq_printf(m, "------------- ------------ -------\n"); + spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags); + + list_for_each(list, &g_bcmgenl_psample_info.netif_list) { + bcmgenl_netif = (bcmgenl_netif_t*)list; + seq_printf(m, " %-14s %-14d %d\n", + bcmgenl_netif->dev->name, + bcmgenl_netif->port, + bcmgenl_netif->dev->ifindex); + } + + spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags); + return 0; +} + +static int +bcmgenl_psample_proc_map_open(struct inode * inode, struct file * file) +{ + return single_open(file, bcmgenl_psample_proc_map_show, NULL); +} + +struct proc_ops bcmgenl_psample_proc_map_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bcmgenl_psample_proc_map_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = NULL, + .proc_release = single_release, +}; + +/* + * psample debug Proc Read Entry + */ +static int +bcmgenl_psample_proc_debug_show(struct seq_file *m, void *v) +{ + seq_printf(m, "BCM KNET %s Callback Config\n", BCMGENL_PSAMPLE_NAME); + seq_printf(m, " debug: 0x%x\n", debug); + seq_printf(m, " netif_count: %d\n", g_bcmgenl_psample_info.netif_count); + seq_printf(m, " queue length: %d\n", bcmgenl_psample_qlen); + + return 0; +} + +static int +bcmgenl_psample_proc_debug_open(struct inode * inode, struct file * file) +{ + return single_open(file, bcmgenl_psample_proc_debug_show, NULL); +} + +/* + * psample debug Proc Write Entry + * + * Syntax: + * debug= + * + * Where corresponds to the debug module parameter. + * + * Examples: + * debug=0x1 + */ +static ssize_t +bcmgenl_psample_proc_debug_write( + struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + char debug_str[40]; + char *ptr; + + if (count > sizeof(debug_str)) { + count = sizeof(debug_str) - 1; + debug_str[count] = '\0'; + } + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + if ((ptr = strstr(debug_str, "debug=")) != NULL) { + ptr += 6; + debug = simple_strtol(ptr, NULL, 0); + } else { + printk("Warning: unknown configuration setting\n"); + } + + return count; +} + +struct proc_ops bcmgenl_psample_proc_debug_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bcmgenl_psample_proc_debug_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = bcmgenl_psample_proc_debug_write, + .proc_release = single_release, +}; + +static int +bcmgenl_psample_proc_stats_show(struct seq_file *m, void *v) +{ + seq_printf(m, "BCM KNET %s Callback Stats\n", BCMGENL_PSAMPLE_NAME); + seq_printf(m, " pkts filter psample cb %10lu\n", g_bcmgenl_psample_stats.pkts_f_psample_cb); + seq_printf(m, " pkts sent to psample module %10lu\n", g_bcmgenl_psample_stats.pkts_f_psample_mod); + seq_printf(m, " pkts handled by psample %10lu\n", g_bcmgenl_psample_stats.pkts_f_handled); + seq_printf(m, " pkts pass through %10lu\n", g_bcmgenl_psample_stats.pkts_f_pass_through); + seq_printf(m, " pkts with mc destination %10lu\n", g_bcmgenl_psample_stats.pkts_f_dst_mc); + seq_printf(m, " pkts current queue length %10lu\n", g_bcmgenl_psample_stats.pkts_c_qlen_cur); + seq_printf(m, " pkts high queue length %10lu\n", g_bcmgenl_psample_stats.pkts_c_qlen_hi); + seq_printf(m, " pkts drop max queue length %10lu\n", g_bcmgenl_psample_stats.pkts_d_qlen_max); + seq_printf(m, " pkts drop no memory %10lu\n", g_bcmgenl_psample_stats.pkts_d_no_mem); + seq_printf(m, " pkts drop no psample group %10lu\n", g_bcmgenl_psample_stats.pkts_d_no_group); + seq_printf(m, " pkts drop sampling disabled %10lu\n", g_bcmgenl_psample_stats.pkts_d_sampling_disabled); + seq_printf(m, " pkts drop psample not ready %10lu\n", g_bcmgenl_psample_stats.pkts_d_not_ready); + seq_printf(m, " pkts drop metadata parse error %10lu\n", g_bcmgenl_psample_stats.pkts_d_metadata); + seq_printf(m, " pkts drop skb error %10lu\n", g_bcmgenl_psample_stats.pkts_d_skb); + seq_printf(m, " pkts drop skb cbd error %10lu\n", g_bcmgenl_psample_stats.pkts_d_skb_cbd); + seq_printf(m, " pkts with invalid src port %10lu\n", g_bcmgenl_psample_stats.pkts_d_meta_srcport); + seq_printf(m, " pkts with invalid dst port %10lu\n", g_bcmgenl_psample_stats.pkts_d_meta_dstport); + seq_printf(m, " pkts with invalid orig pkt sz %10lu\n", g_bcmgenl_psample_stats.pkts_d_invalid_size); + return 0; +} + +static int +bcmgenl_psample_proc_stats_open(struct inode * inode, struct file * file) +{ + return single_open(file, bcmgenl_psample_proc_stats_show, NULL); +} + +/* + * psample stats Proc Write Entry + * + * Syntax: + * write any value to clear stats + */ +static ssize_t +bcmgenl_psample_proc_stats_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + int qlen_cur = 0; + unsigned long flags; + + spin_lock_irqsave(&g_bcmgenl_psample_work.lock, flags); + qlen_cur = g_bcmgenl_psample_stats.pkts_c_qlen_cur; + memset(&g_bcmgenl_psample_stats, 0, sizeof(bcmgenl_psample_stats_t)); + g_bcmgenl_psample_stats.pkts_c_qlen_cur = qlen_cur; + spin_unlock_irqrestore(&g_bcmgenl_psample_work.lock, flags); + + return count; +} +struct proc_ops bcmgenl_psample_proc_stats_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bcmgenl_psample_proc_stats_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = bcmgenl_psample_proc_stats_write, + .proc_release = single_release, +}; + +static int +psample_cb_proc_cleanup(void) +{ + remove_proc_entry("stats", psample_proc_root); + remove_proc_entry("rate", psample_proc_root); + remove_proc_entry("size", psample_proc_root); + remove_proc_entry("debug", psample_proc_root); + remove_proc_entry("map" , psample_proc_root); + + proc_remove(psample_proc_root); + return 0; +} + +static int +psample_cb_proc_init(void) +{ + char psample_procfs_path[PROCFS_MAX_PATH]; + struct proc_dir_entry *entry; + + /* create procfs for psample */ + snprintf(psample_procfs_path, PROCFS_MAX_PATH, "%s/%s", + BCMGENL_PROCFS_PATH, BCMGENL_PSAMPLE_NAME); + psample_proc_root = proc_mkdir(psample_procfs_path, NULL); + + /* create procfs for psample stats */ + PROC_CREATE(entry, "stats", 0666, psample_proc_root, + &bcmgenl_psample_proc_stats_file_ops); + if (entry == NULL) { + printk("%s: Unable to create procfs entry '/procfs/%s/stats'\n", + __func__, psample_procfs_path); + return -1; + } + + /* create procfs for setting sample rates */ + PROC_CREATE(entry, "rate", 0666, psample_proc_root, + &bcmgenl_psample_proc_rate_file_ops); + if (entry == NULL) { + printk("%s: Unable to create procfs entry '/procfs/%s/rate'\n", + __func__, psample_procfs_path); + return -1; + } + + /* create procfs for setting sample size */ + PROC_CREATE(entry, "size", 0666, psample_proc_root, + &bcmgenl_psample_proc_size_file_ops); + if (entry == NULL) { + printk("%s: Unable to create procfs entry '/procfs/%s/size'\n", + __func__, psample_procfs_path); + return -1; + } + + /* create procfs for getting netdev mapping */ + PROC_CREATE(entry, "map", 0666, psample_proc_root, + &bcmgenl_psample_proc_map_file_ops); + if (entry == NULL) { + printk("%s: Unable to create procfs entry '/procfs/%s/map'\n", + __func__, psample_procfs_path); + return -1; + } + + /* create procfs for debug log */ + PROC_CREATE(entry, "debug", 0666, psample_proc_root, + &bcmgenl_psample_proc_debug_file_ops); + if (entry == NULL) { + printk("%s: Unable to create procfs entry '/procfs/%s/debug'\n", + __func__, psample_procfs_path); + return -1; + } + return 0; +} + +static int +psample_cb_cleanup(void) +{ + psample_pkt_t *pkt; + + cancel_work_sync(&g_bcmgenl_psample_work.wq); + + while (!list_empty(&g_bcmgenl_psample_work.pkt_list)) { + pkt = list_entry(g_bcmgenl_psample_work.pkt_list.next, + psample_pkt_t, list); + list_del(&pkt->list); + dev_kfree_skb_any(pkt->skb); + kfree(pkt); + } + + return 0; +} + +static int +psample_cb_init(void) +{ + /* clear data structs */ + memset(&g_bcmgenl_psample_stats, 0, sizeof(bcmgenl_psample_stats_t)); + memset(&g_bcmgenl_psample_info, 0, sizeof(bcmgenl_info_t)); + memset(&g_bcmgenl_psample_work, 0, sizeof(bcmgenl_psample_work_t)); + + /* setup psample_info struct */ + INIT_LIST_HEAD(&g_bcmgenl_psample_info.netif_list); + spin_lock_init(&g_bcmgenl_psample_info.lock); + + /* setup psample work queue */ + spin_lock_init(&g_bcmgenl_psample_work.lock); + INIT_LIST_HEAD(&g_bcmgenl_psample_work.pkt_list); + INIT_WORK(&g_bcmgenl_psample_work.wq, bcmgenl_psample_task); + + /* get net namespace */ + g_bcmgenl_psample_info.netns = get_net_ns_by_pid(current->pid); + if (!g_bcmgenl_psample_info.netns) { + printk("%s: Could not get network namespace for pid %d\n", + __func__, current->pid); + return (-1); + } + BCMGENL_PSAMPLE_DBG_VERB + ("%s: current->pid %d, netns 0x%p, sample_size %d\n", + __func__, current->pid, g_bcmgenl_psample_info.netns, psample_size); + return 0; +} + +int bcmgenl_psample_cleanup(void) +{ + ngknet_netif_create_cb_unregister(bcmgenl_psample_netif_create_cb); + ngknet_netif_destroy_cb_unregister(bcmgenl_psample_netif_destroy_cb); + ngknet_filter_cb_unregister(bcmgenl_psample_filter_cb); + + psample_cb_cleanup(); + psample_cb_proc_cleanup(); + return 0; +} + +int bcmgenl_psample_init(void) +{ + ngknet_netif_create_cb_register(bcmgenl_psample_netif_create_cb); + ngknet_netif_destroy_cb_register(bcmgenl_psample_netif_destroy_cb); + ngknet_filter_cb_register_by_name + (bcmgenl_psample_filter_cb, BCMGENL_PSAMPLE_NAME); + + psample_cb_proc_init(); + return psample_cb_init(); +} + +#else +int bcmgenl_psample_cleanup(void) +{ + return 0; +} + +int bcmgenl_psample_init(void) +{ + return 0; +} +#endif /* BCMGENL_PSAMPLE_SUPPORT */ +EXPORT_SYMBOL(bcmgenl_psample_cleanup); +EXPORT_SYMBOL(bcmgenl_psample_init); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h new file mode 100644 index 000000000000..a934a03c1bf1 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h @@ -0,0 +1,35 @@ +/*! \file bcmgenl_psample.h + * + * BCMGENL psample module. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef BCMGENL_PSAMPLE_H +#define BCMGENL_PSAMPLE_H + +#include + +#ifndef BCMGENL_PSAMPLE_SUPPORT +#define BCMGENL_PSAMPLE_SUPPORT (IS_ENABLED(CONFIG_PSAMPLE)) +#endif /* BCMGENL_PSAMPLE_SUPPORT */ + +extern int bcmgenl_psample_init(void); +extern int bcmgenl_psample_cleanup(void); + +#endif /* BCMGENL_PSAMPLE_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild index 7b444f5097f4..51bbcae56f47 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild @@ -6,7 +6,7 @@ # builds of the NGBDE kernel module, for example, using a different # default DMA pool size or turning off MSI interrupts. # -# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. +# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or @@ -25,6 +25,7 @@ obj-m := linux_ngbde.o ccflags-y := $(LKM_CFLAGS) $(NGBDE_CFLAGS) \ + $(LKM_BUILD_INFO) \ -I$(SDK)/linux/include \ -I$(SDK)/linux/bde \ -I$(SDK)/bcmdrd/include diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile index f4401e62dc5e..1803ca728c81 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile @@ -1,5 +1,5 @@ # -# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. +# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h index 5d3339ad74ef..b930e435e623 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c index 6e15855034c0..082c006214be 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -31,7 +31,7 @@ MODULE_PARM_DESC(dma_debug, /*! Default size of of DMA memory pools (in MB). */ #ifndef DMAPOOL_SIZE_DEFAULT -#define DMAPOOL_SIZE_DEFAULT 16 +#define DMAPOOL_SIZE_DEFAULT 32 #endif /*! Default number of DMA memory pools per device. */ @@ -41,7 +41,7 @@ MODULE_PARM_DESC(dma_debug, static int dma_size = DMAPOOL_SIZE_DEFAULT; module_param(dma_size, int, S_IRUSR); MODULE_PARM_DESC(dma_size, -"Size of of DMA memory pools in MB (default 16 MB)."); +"Size of of DMA memory pools in MB (default 32 MB)."); /*! \endcond */ /*! \cond */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c index 99ced831e015..3293493ae78d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c @@ -5,7 +5,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c index 5d68fa92abe2..d92a63316ee5 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c index f83857f6edcc..4d20ca65424a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c index 10f221642c3d..e297ca35e618 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c @@ -8,7 +8,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c index 506231054b7d..b95beee3a97b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c index 38a60867b719..13391c2d9da5 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c index 376062d348d5..44cd90867cd8 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c @@ -5,7 +5,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c index f74ccf5a4377..0d5d7417b406 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c index ec6b369780a8..7cdd2f099b0f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c @@ -31,7 +31,7 @@ * likely these requests are to succeed. */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c index cfcc97a94e49..b124c0b029e0 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c @@ -5,7 +5,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c index 6fd02ebd3d4b..0394f86a55df 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -35,7 +35,9 @@ proc_show(struct seq_file *m, void *v) ngbde_swdev_get_all(&swdev, &num_swdev); seq_printf(m, "Broadcom Device Enumerator (%s)\n", MOD_NAME); - +#ifdef LKM_BUILD_INFO + seq_printf(m, "%s\n", LKM_BUILD_INFO); +#endif seq_printf(m, "Found %d switch device(s):\n", num_swdev); for (idx = 0; idx < num_swdev; idx++) { if (swdev->inactive) { diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c index a6fedc2c4a30..1f56ed7fbf82 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild new file mode 100644 index 000000000000..0218b85de98f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild @@ -0,0 +1,13 @@ +# -*- Kbuild -*- +# +# Linux Netlink channel for general packet I/O module. +# +# $Copyright: (c) 2023 Broadcom. +# Broadcom Proprietary and Confidential. All rights reserved.$ +# + +obj-m := genl-packet.o + +ccflags-y := $(LKM_CFLAGS) \ + -I$(SDK)/linux/include/lkm \ + -I$(SDK)/linux/include/kernel diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile new file mode 100644 index 000000000000..9bf7afe3f9a7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile @@ -0,0 +1,20 @@ +# +# $Copyright: (c) 2023 Broadcom. +# Broadcom Proprietary and Confidential. All rights reserved.$ +# +# Linux Netlink channel for general packet I/O module. +# + +include Kbuild + +ifeq ($(KERNELRELEASE),) + +MOD_NAME = genl-packet + +include $(SDK)/make/lkm.mk + +endif + +.PHONY: distclean + +distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/genl-packet.c b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/genl-packet.c new file mode 100644 index 000000000000..141edc6d7603 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/genl-packet.c @@ -0,0 +1,118 @@ +/* + * net/genl-packet/genl-packet.c - Netlink channel for general packetIO + * Copyright (c) 2021 Google, based on psample.c (originally written by + * Yotam Gigi ) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include + +#define GENL_PACKET_MAX_PACKET_SIZE 0xffff + +/* multicast groups */ +enum genl_packet_multicast_groups { + GENL_PACKET_MCGRP_PACKET, +}; + +static const struct genl_multicast_group genl_packet_mcgrps[] = { + [GENL_PACKET_MCGRP_PACKET] = { .name = GENL_PACKET_MCGRP_NAME }, +}; + +static struct genl_family genl_packet_family = { + .name = GENL_PACKET_NAME, + .version = GENL_PACKET_VERSION, + .maxattr = GENL_PACKET_ATTR_MAX, + .netnsok = true, + .module = THIS_MODULE, + .mcgrps = genl_packet_mcgrps, + .n_mcgrps = ARRAY_SIZE(genl_packet_mcgrps), +}; + +void genl_packet_send_packet(struct net *net, struct sk_buff *skb, + int in_ifindex, int out_ifindex, unsigned int context) +{ + struct sk_buff *nl_skb; + int data_len; + int meta_len; + void *data; + int ret; + + /* Metalength is sum of netlink message sizes of in_ifindex + out_ifindex + + * context */ + meta_len = nla_total_size(sizeof(s16)) + + nla_total_size(sizeof(s16)) + + nla_total_size(sizeof(u32)); + + data_len = skb->len; + if (meta_len + nla_total_size(data_len) > GENL_PACKET_MAX_PACKET_SIZE) + data_len = GENL_PACKET_MAX_PACKET_SIZE - meta_len - NLA_HDRLEN + - NLA_ALIGNTO; + if (data_len <= 0) + return; + + nl_skb = genlmsg_new(meta_len + nla_total_size(data_len), GFP_ATOMIC); + if (unlikely(!nl_skb)) + return; + + data = genlmsg_put(nl_skb, 0, 0, &genl_packet_family, 0, + GENL_PACKET_CMD_PACKET); + if (unlikely(!data)) + goto error; + + ret = nla_put_s16(nl_skb, GENL_PACKET_ATTR_IIFINDEX, in_ifindex); + if (unlikely(ret < 0)) + goto error; + + ret = nla_put_s16(nl_skb, GENL_PACKET_ATTR_OIFINDEX, out_ifindex); + if (unlikely(ret < 0)) + goto error; + + ret = nla_put_u32(nl_skb, GENL_PACKET_ATTR_CONTEXT, context); + if (unlikely(ret < 0)) + goto error; + + if (data_len > 0) { + int nla_len = nla_total_size(data_len); + struct nlattr *nla; + + nla = (struct nlattr *)skb_put(nl_skb, nla_len); + nla->nla_type = GENL_PACKET_ATTR_DATA; + nla->nla_len = nla_attr_size(data_len); + + if (skb_copy_bits(skb, 0, nla_data(nla), data_len)) + goto error; + } + + genlmsg_end(nl_skb, data); + genlmsg_multicast_netns(&genl_packet_family, net, nl_skb, 0, + GENL_PACKET_MCGRP_PACKET, GFP_ATOMIC); + + return; +error: + pr_err_ratelimited("Could not create genl_packet message\n"); + nlmsg_free(nl_skb); +} +EXPORT_SYMBOL_GPL(genl_packet_send_packet); + +static int __init genl_packet_module_init(void) +{ + return genl_register_family(&genl_packet_family); +} + +static void __exit genl_packet_module_exit(void) +{ + genl_unregister_family(&genl_packet_family); +} + +module_init(genl_packet_module_init); +module_exit(genl_packet_module_exit); + +MODULE_AUTHOR("Google"); +MODULE_DESCRIPTION("netlink channel for genl_packet"); +MODULE_LICENSE("GPL v2"); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/README b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/README new file mode 100644 index 000000000000..dd6ab429db66 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/README @@ -0,0 +1,8 @@ +This directory is mainly for the header files which are planned +for upstreaming to the mainline kernels. +The header files can be placed in the simulated kernel include path +created in this directory. + +The directory (include/kernel) can be added to the include path (-I) +when compiling the associated source files such that the standard Linux path +can be used in the source files. \ No newline at end of file diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/net/genl-packet.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/net/genl-packet.h new file mode 100644 index 000000000000..48db3895db3e --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/net/genl-packet.h @@ -0,0 +1,9 @@ +#ifndef __NET_GENL_PACKET_H +#define __NET_GENL_PACKET_H + +#include + +extern void genl_packet_send_packet(struct net *net, struct sk_buff *skb, + int in_ifindex, int out_ifindex, unsigned int context); + +#endif /* __NET_GENL_PACKET_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/uapi/linux/genl-packet.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/uapi/linux/genl-packet.h new file mode 100644 index 000000000000..e57442117f85 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/uapi/linux/genl-packet.h @@ -0,0 +1,24 @@ +#ifndef __UAPI_GENL_PACKET_H +#define __UAPI_GENL_PACKET_H + +enum { + /* packet metadata */ + GENL_PACKET_ATTR_IIFINDEX, + GENL_PACKET_ATTR_OIFINDEX, + GENL_PACKET_ATTR_CONTEXT, + GENL_PACKET_ATTR_DATA, + + __GENL_PACKET_ATTR_MAX +}; + +enum genl_packet_command { + GENL_PACKET_CMD_PACKET, +}; + +/* Can be overridden at runtime by module option */ +#define GENL_PACKET_ATTR_MAX (__GENL_PACKET_ATTR_MAX - 1) + +#define GENL_PACKET_MCGRP_NAME "packets" +#define GENL_PACKET_NAME "genl_packet" +#define GENL_PACKET_VERSION 1 +#endif /* __UAPI_GENL_PACKET_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h index 4da4ab985e96..d58ea599118a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h index 1a3b94f0ad5d..e8155a620940 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h @@ -9,7 +9,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h index 98a148711aaa..84280ac36cd0 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h @@ -6,7 +6,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h index 05063d3207b0..384adc2aab6a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h @@ -9,7 +9,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -43,7 +43,7 @@ /*! Maximum number of mHosts supported per switch device. */ #ifndef MCS_NUM_UC -#define MCS_NUM_UC 4 +#define MCS_NUM_UC 6 #endif /*! diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h new file mode 100644 index 000000000000..e9db5cb316c0 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h @@ -0,0 +1,39 @@ +/*! \file ngedk_kapi.h + * + * NGEDK kernel API. + * + * This file is intended for use by other kernel modules relying on the NGEDK. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef NGEDK_KAPI_H +#define NGEDK_KAPI_H + +/*! + * \brief Converts physical address to virtual address. + * + * \param [in] paddr physical address. + * + * \retval void * Corresponding virtual address. + */ +extern void * +ngedk_dmamem_map_p2v(dma_addr_t paddr); + +#endif /* NGEDK_KAPI_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h index 1c6ec921c0aa..02cb97df4eff 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h @@ -9,7 +9,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -104,6 +104,8 @@ #define NGKNET_NETIF_F_ADD_TAG (1U << 1) /*! Bind network interface to Rx channel */ #define NGKNET_NETIF_F_BIND_CHAN (1U << 2) +/*! Create network interface with specified ID */ +#define NGKNET_NETIF_F_WITH_ID (1U << 3) /*! * \brief Network interface description. @@ -147,6 +149,9 @@ typedef struct ngknet_netif_s { /*! User data gotten back through callbacks */ uint8_t user_data[NGKNET_NETIF_USER_DATA]; + + /*! Network interface port */ + uint32_t port; } ngknet_netif_t; /*! @@ -303,10 +308,12 @@ typedef struct ngknet_dev_info_s { /*! Device variant string */ char var_str[NGKNET_DEV_NAME_MAX]; + /*! Virtual network devices, pointer to ngknet_dev.vdev[] */ + struct net_device **vdev; } ngknet_dev_info_t; /*! - * \brief Device configure structure. + * \brief Device configuration structure. */ typedef struct ngknet_dev_cfg_s { /*! Device name */ @@ -338,6 +345,11 @@ typedef struct ngknet_dev_cfg_s { /*! Base network interface */ ngknet_netif_t base_netif; + + /*! Configuration flags */ + uint32_t flags; + /*! Rx polling for single queue */ +#define NGKNET_RX_POLL_SQ (1 << 0) } ngknet_dev_cfg_t; /*! @@ -404,8 +416,8 @@ struct ngknet_rcpu_hdr { /*! Packet data length */ uint16_t data_len; - /*! Reserved must be 0 */ - uint16_t rsvd0; + /*! Header profile */ + uint16_t hdr_prof; /*! packet meta data length */ uint8_t meta_len; @@ -414,7 +426,7 @@ struct ngknet_rcpu_hdr { uint8_t queue_id; /*! Reserved must be 0 */ - uint16_t rsvd1; + uint16_t rsvd; }; /*! RCPU Rx operation */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h index ad1614f8110c..ed683111a6c4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h @@ -9,7 +9,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h index 878a065ba39b..5230ba6635c3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h @@ -6,7 +6,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -49,28 +49,41 @@ struct ngknet_callback_desc { /*! Packet data length */ int pkt_len; + + /*! Network device */ + struct net_device *net_dev; }; /*! SKB callback data */ #define NGKNET_SKB_CB(_skb) ((struct ngknet_callback_desc *)_skb->cb) +/*! + * PHC specific private data + */ +struct ngknet_ptp_data { + /*! Physical port */ + int phy_port; + + /*! HW timestamp Tx type */ + int hwts_tx_type; +}; + /*! TX/RX callback init */ typedef void (*ngknet_dev_init_cb_f)(ngknet_dev_info_t *dinfo); /*! Handle Rx packet */ typedef struct sk_buff * -(*ngknet_rx_cb_f)(struct net_device *dev, struct sk_buff *skb); +(*ngknet_rx_cb_f)(struct sk_buff *skb); /*! Handle Tx packet */ typedef struct sk_buff * (*ngknet_tx_cb_f)(struct sk_buff *skb); -#if 0 /*! Handle Netif callback */ typedef int (*ngknet_netif_cb_f)(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif); -#endif + /*! Handle Filter callback */ typedef struct sk_buff * (*ngknet_filter_cb_f)(struct sk_buff *skb, ngknet_filter_t **filt); @@ -95,9 +108,9 @@ typedef int typedef int (*ngknet_ptp_dev_ctrl_cb_f)(ngknet_dev_info_t *dinfo, int cmd, char *data, int len); -/*! Netif callback */ +/*! PTP RX Preprocessing */ typedef int -(*ngknet_netif_cb_f)(struct net_device *dev); +(*ngknet_ptp_rx_pre_process_cb_f)(struct sk_buff *skb, uint32_t *cust_hdr_len); /*! * \brief Register TX/RX callback device initialization callback function. @@ -225,6 +238,17 @@ ngknet_netif_destroy_cb_unregister(ngknet_netif_cb_f netif_cb); extern int ngknet_filter_cb_register(ngknet_filter_cb_f filter_cb); +/*! + * \brief Register filter callback by name. + * + * \param [in] filter_cb Filter callback function. + * \param [in] desc Filter description. + * + * \retval SHR_E_NONE No errors. + */ +extern int +ngknet_filter_cb_register_by_name(ngknet_filter_cb_f filter_cb, const char *desc); + /*! * \brief Unregister filter callback. * @@ -375,5 +399,25 @@ ngknet_ptp_dev_ctrl_cb_register(ngknet_ptp_dev_ctrl_cb_f ptp_dev_ctrl_cb); extern int ngknet_ptp_dev_ctrl_cb_unregister(ngknet_ptp_dev_ctrl_cb_f ptp_dev_ctrl_cb); +/*! + * \brief Register PTP RX pre processing callback. + * + * \param [in] ptp_rx_pre_process_cb RX pre processing callback function. + * + * \retval SHR_E_NONE No errors. + */ +extern int +ngknet_ptp_rx_pre_process_cb_register(ngknet_ptp_rx_pre_process_cb_f ptp_rx_pre_process_cb); + +/*! + * \brief Unregister PTP RX pre processing callback. + * + * \param [in] ptp_rx_pre_process_cb RX pre processing callback function. + * + * \retval SHR_E_NONE No errors. + */ +extern int +ngknet_ptp_rx_pre_process_cb_unregister(ngknet_ptp_rx_pre_process_cb_f ptp_rx_pre_process_cb); + #endif /* NGKNET_KAPI_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h new file mode 100644 index 000000000000..0164b4b3174f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h @@ -0,0 +1,43 @@ +/*! \file ngptpclock_ioctl.h + * + * NGPTPCLOCK I/O control definitions. + * + * This file is intended for use in both kernel mode and user mode. + * + * IMPORTANT! + * All shared structures must be properly 64-bit aligned. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef NGPTPCLOCK_IOCTL_H +#define NGPTPCLOCK_IOCTL_H + +/* Module Information */ +#define NGPTPCLOCK_MODULE_NAME "linux_ngptpclock" + +/*! + * \brief PTP hardware clock driver commands + */ +/*! Initialize PTP hardware clock driver module */ +#define NGPTPCLOCK_HW_INIT 0 +/*! Clean up PTP hardware clock driver module */ +#define NGPTPCLOCK_HW_CLEANUP 1 + +#endif /* NGPTPCLOCK_IOCTL_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild index a23e587b1d45..38ddb39ecd13 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild @@ -2,7 +2,7 @@ # # Linux KNET module. # -# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. +# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or @@ -39,6 +39,7 @@ linux_ngknet-y := $(CHIP_OBJS) \ bcmcnet_cmicx_pdma_rxtx.o \ bcmcnet_cmicr_pdma_hw.o \ bcmcnet_cmicr_pdma_rxtx.o \ + bcmcnet_cmicr2_pdma_rxtx.o \ bcmcnet_core.o \ bcmcnet_dev.o \ bcmcnet_rxtx.o \ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile index f13702ac92fd..9a20f596d3dc 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile @@ -1,5 +1,5 @@ # -# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. +# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or @@ -26,6 +26,7 @@ GENDIR = $(OUTPUT_DIR)/knet/generated endif DSTIDIR = $(GENDIR)/include/bcmcnet + # Change comma-separated list to space-separated list comma = , empty = @@ -78,8 +79,9 @@ mklinks: -ln -s $(SRCIDIR)/bcmcnet_rxtx.h $(DSTIDIR) $(R) -ln -s $(SRCIDIR)/bcmcnet_cmicd.h $(DSTIDIR) $(R) -ln -s $(SRCIDIR)/bcmcnet_cmicx.h $(DSTIDIR) $(R) - -ln -s $(SRCIDIR)/bcmcnet_cmicr.h $(DSTIDIR) $(R) -ln -s $(SRCIDIR)/bcmcnet_cmicr_acc.h $(DSTIDIR) $(R) + -ln -s $(SRCIDIR)/bcmcnet_cmicr.h $(DSTIDIR) $(R) + -ln -s $(SRCIDIR)/bcmcnet_cmicr2.h $(DSTIDIR) $(R) -ln -s $(CNETDIR)/chip/*/*attach.c $(GENDIR) $(R) -ln -s $(CNETDIR)/hmi/cmicd/*.c $(GENDIR) $(R) -ln -s $(CNETDIR)/hmi/cmicx/*.c $(GENDIR) $(R) diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c index 362c6e156e2b..e4e27f6af442 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -251,19 +251,8 @@ ngknet_rx_buf_mode(struct pdma_dev *dev, struct pdma_rx_queue *rxq) { uint32_t len, order; - switch (ngknet_page_buffer_mode_get()) { - case 0: - /* Forced SKB mode */ + if (ngknet_page_buffer_mode_get() == 0) { return PDMA_BUF_MODE_SKB; - case 1: - /* Forced page mode */ - break; - default: /* -1 */ - /* Select buffer mode based on system capability */ - if (kal_support_paged_skb() == 0) { - return PDMA_BUF_MODE_SKB; - } - break; } len = dev->rx_ph_size ? rxq->buf_size : rxq->buf_size + PDMA_RXB_META; @@ -327,12 +316,7 @@ ngknet_tx_buf_free(struct pdma_dev *dev, struct pdma_tx_queue *txq, } dma_unmap_single(kdev->dev, pbuf->dma, pbuf->len, DMA_TO_DEVICE); - if (skb_shinfo(pbuf->skb)->tx_flags & SKBTX_IN_PROGRESS) { - skb_queue_tail(&kdev->ptp_tx_queue, pbuf->skb); - schedule_work(&kdev->ptp_tx_work); - } else { - dev_kfree_skb_any(pbuf->skb); - } + dev_kfree_skb_any(pbuf->skb); pbuf->dma = 0; pbuf->len = 0; diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h index e8d5a69dc4f6..81a0e7e0c8ed 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c index 04d1540a270b..5a96e4f27d4b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,10 +20,48 @@ * be found in the LICENSES folder.$ */ +#include "ngknet_main.h" #include "ngknet_callback.h" +#include "ngknet_extra.h" static struct ngknet_callback_ctrl callback_ctrl; +void +ngknet_callback_init(struct ngknet_dev *devs) +{ + INIT_LIST_HEAD(&callback_ctrl.netif_create_cb_list); + INIT_LIST_HEAD(&callback_ctrl.netif_destroy_cb_list); + INIT_LIST_HEAD(&callback_ctrl.filter_cb_list); + callback_ctrl.devs = devs; +} + +void +ngknet_callback_cleanup(void) +{ + netif_cb_t *netif_cb; + filter_cb_t *filter_cb; + + /* Destroy any create/destroy netif which is not unregistered */ + while (!list_empty(&callback_ctrl.netif_create_cb_list)) { + netif_cb = list_entry(callback_ctrl.netif_create_cb_list.next, + netif_cb_t, list); + list_del(&netif_cb->list); + kfree(netif_cb); + } + while (!list_empty(&callback_ctrl.netif_destroy_cb_list)) { + netif_cb = list_entry(callback_ctrl.netif_destroy_cb_list.next, + netif_cb_t, list); + list_del(&netif_cb->list); + kfree(netif_cb); + } + while (!list_empty(&callback_ctrl.filter_cb_list)) { + filter_cb = list_entry(callback_ctrl.filter_cb_list.next, + filter_cb_t, list); + list_del(&filter_cb->list); + kfree(filter_cb); + } +} + int ngknet_callback_control_get(struct ngknet_callback_ctrl **cbc) { @@ -105,10 +143,24 @@ ngknet_tx_cb_unregister(ngknet_tx_cb_f tx_cb) int ngknet_netif_create_cb_register(ngknet_netif_cb_f netif_cb) { - if (callback_ctrl.netif_create_cb != NULL) { + struct list_head *list; + netif_cb_t *netif_create_cb; + + if (netif_cb == NULL) { + return -1; + } + list_for_each(list, &callback_ctrl.netif_create_cb_list) { + netif_create_cb = list_entry(list, netif_cb_t, list); + if (netif_create_cb->cb == netif_cb) { + return -1; + } + } + netif_create_cb = kmalloc(sizeof(*netif_create_cb), GFP_KERNEL); + if (netif_create_cb == NULL) { return -1; } - callback_ctrl.netif_create_cb = netif_cb; + netif_create_cb->cb = netif_cb; + list_add_tail(&netif_create_cb->list, &callback_ctrl.netif_create_cb_list); return 0; } @@ -116,10 +168,25 @@ ngknet_netif_create_cb_register(ngknet_netif_cb_f netif_cb) int ngknet_netif_create_cb_unregister(ngknet_netif_cb_f netif_cb) { - if (netif_cb == NULL || callback_ctrl.netif_create_cb != netif_cb) { + struct list_head *list, *list_next; + netif_cb_t *netif_create_cb; + int found = 0; + + if (netif_cb == NULL) { return -1; } - callback_ctrl.netif_create_cb = NULL; + list_for_each_safe(list, list_next, &callback_ctrl.netif_create_cb_list) { + netif_create_cb = list_entry(list, netif_cb_t, list); + if (netif_create_cb->cb == netif_cb) { + found = 1; + list_del(list); + break; + } + } + if (!found) { + return -1; + } + kfree(netif_create_cb); return 0; } @@ -127,10 +194,24 @@ ngknet_netif_create_cb_unregister(ngknet_netif_cb_f netif_cb) int ngknet_netif_destroy_cb_register(ngknet_netif_cb_f netif_cb) { - if (callback_ctrl.netif_destroy_cb != NULL) { + struct list_head *list; + netif_cb_t *netif_destroy_cb; + + if (netif_cb == NULL) { + return -1; + } + list_for_each(list, &callback_ctrl.netif_destroy_cb_list) { + netif_destroy_cb = list_entry(list, netif_cb_t, list); + if (netif_destroy_cb->cb == netif_cb) { + return -1; + } + } + netif_destroy_cb = kmalloc(sizeof(*netif_destroy_cb), GFP_KERNEL); + if (netif_destroy_cb == NULL) { return -1; } - callback_ctrl.netif_destroy_cb = netif_cb; + netif_destroy_cb->cb = netif_cb; + list_add_tail(&netif_destroy_cb->list, &callback_ctrl.netif_destroy_cb_list); return 0; } @@ -138,10 +219,25 @@ ngknet_netif_destroy_cb_register(ngknet_netif_cb_f netif_cb) int ngknet_netif_destroy_cb_unregister(ngknet_netif_cb_f netif_cb) { - if (netif_cb == NULL || callback_ctrl.netif_destroy_cb != netif_cb) { + struct list_head *list, *list_next; + netif_cb_t *netif_destroy_cb; + int found = 0; + + if (netif_cb == NULL) { return -1; } - callback_ctrl.netif_destroy_cb = NULL; + list_for_each_safe(list, list_next, &callback_ctrl.netif_destroy_cb_list) { + netif_destroy_cb = list_entry(list, netif_cb_t, list); + if (netif_destroy_cb->cb == netif_cb) { + found = 1; + list_del(list); + break; + } + } + if (!found) { + return -1; + } + kfree(netif_destroy_cb); return 0; } @@ -157,14 +253,113 @@ ngknet_filter_cb_register(ngknet_filter_cb_f filter_cb) return 0; } +int +ngknet_filter_cb_register_by_name(ngknet_filter_cb_f filter_cb, const char *desc) +{ + struct ngknet_dev *dev; + struct list_head *list; + struct filt_ctrl *fc = NULL; + filter_cb_t *fcb; + unsigned long flags; + int idx; + + if (filter_cb == NULL || desc == NULL) { + return -1; + } + if (desc[0] == '\0' || strlen(desc) >= NGKNET_FILTER_DESC_MAX) { + return -1; + } + + list_for_each(list, &callback_ctrl.filter_cb_list) { + fcb = list_entry(list, filter_cb_t, list); + if (strcmp(fcb->desc, desc) == 0) { + return -1; + } + } + fcb = kmalloc(sizeof(*fcb), GFP_KERNEL); + if (fcb == NULL) { + return -1; + } + fcb->cb = filter_cb; + strcpy(fcb->desc, desc); // nosemgrep + list_add_tail(&fcb->list, &callback_ctrl.filter_cb_list); + + /* Check if any existing filter matches the registered name */ + for (idx = 0; idx < NUM_PDMA_DEV_MAX; idx++) { + dev = &callback_ctrl.devs[idx]; + if (!(dev->flags & NGKNET_DEV_ACTIVE) || + list_empty(&dev->filt_list)) { + continue; + } + spin_lock_irqsave(&dev->lock, flags); + list_for_each(list, &dev->filt_list) { + fc = (struct filt_ctrl *)list; + if (fc && + fc->filt.dest_type == NGKNET_FILTER_DEST_T_CB && + fc->filt.desc[0] != '\0') { + if (strcmp(fc->filt.desc, desc) == 0) { + fc->filter_cb = filter_cb; + } + } + } + spin_unlock_irqrestore(&dev->lock, flags); + } + return 0; +} + int ngknet_filter_cb_unregister(ngknet_filter_cb_f filter_cb) { - if (filter_cb == NULL || callback_ctrl.filter_cb != filter_cb) { + struct ngknet_dev *dev; + struct list_head *list, *list2; + struct filt_ctrl *fc = NULL; + filter_cb_t *fcb; + unsigned long flags; + int found = 0, idx; + + if (filter_cb == NULL) { return -1; } - callback_ctrl.filter_cb = NULL; + /* Check if the any existing filter-specific callback matches */ + + /* Remove from list */ + list_for_each_safe(list, list2, &callback_ctrl.filter_cb_list) { + fcb = list_entry(list, filter_cb_t, list); + if (fcb->cb == filter_cb) { + found = 1; + list_del(&fcb->list); + kfree(fcb); + break; + } + } + /* Check if the callback is set to filters */ + if (found) { + for (idx = 0; idx < NUM_PDMA_DEV_MAX; idx++) { + dev = &callback_ctrl.devs[idx]; + if (!(dev->flags & NGKNET_DEV_ACTIVE) || + list_empty(&dev->filt_list)) { + continue; + } + spin_lock_irqsave(&dev->lock, flags); + list_for_each(list, &dev->filt_list) { + fc = (struct filt_ctrl *)list; + if (fc && + fc->filt.dest_type == NGKNET_FILTER_DEST_T_CB && + fc->filter_cb == filter_cb) { + fc->filter_cb = NULL; + } + } + spin_unlock_irqrestore(&dev->lock, flags); + } + } + + if (!found && filter_cb != callback_ctrl.filter_cb) { + return -1; + } + if (!found || filter_cb == callback_ctrl.filter_cb) { + callback_ctrl.filter_cb = NULL; + } return 0; } @@ -329,6 +524,29 @@ ngknet_ptp_dev_ctrl_cb_unregister(ngknet_ptp_dev_ctrl_cb_f ptp_dev_ctrl_cb) return 0; } +int +ngknet_ptp_rx_pre_process_cb_register(ngknet_ptp_rx_pre_process_cb_f ptp_rx_pre_process_cb) +{ + if (callback_ctrl.ptp_rx_pre_process_cb != NULL) { + return -1; + } + callback_ctrl.ptp_rx_pre_process_cb = ptp_rx_pre_process_cb; + + return 0; +} + +int +ngknet_ptp_rx_pre_process_cb_unregister(ngknet_ptp_rx_pre_process_cb_f ptp_rx_pre_process_cb) +{ + if (ptp_rx_pre_process_cb == NULL || + callback_ctrl.ptp_rx_pre_process_cb != ptp_rx_pre_process_cb) { + return -1; + } + callback_ctrl.ptp_rx_pre_process_cb = NULL; + + return 0; +} + EXPORT_SYMBOL(ngknet_dev_init_cb_register); EXPORT_SYMBOL(ngknet_dev_init_cb_unregister); EXPORT_SYMBOL(ngknet_rx_cb_register); @@ -340,6 +558,7 @@ EXPORT_SYMBOL(ngknet_netif_create_cb_unregister); EXPORT_SYMBOL(ngknet_netif_destroy_cb_register); EXPORT_SYMBOL(ngknet_netif_destroy_cb_unregister); EXPORT_SYMBOL(ngknet_filter_cb_register); +EXPORT_SYMBOL(ngknet_filter_cb_register_by_name); EXPORT_SYMBOL(ngknet_filter_cb_unregister); EXPORT_SYMBOL(ngknet_ptp_rx_config_set_cb_register); EXPORT_SYMBOL(ngknet_ptp_rx_config_set_cb_unregister); @@ -355,4 +574,6 @@ EXPORT_SYMBOL(ngknet_ptp_phc_index_get_cb_register); EXPORT_SYMBOL(ngknet_ptp_phc_index_get_cb_unregister); EXPORT_SYMBOL(ngknet_ptp_dev_ctrl_cb_register); EXPORT_SYMBOL(ngknet_ptp_dev_ctrl_cb_unregister); +EXPORT_SYMBOL(ngknet_ptp_rx_pre_process_cb_register); +EXPORT_SYMBOL(ngknet_ptp_rx_pre_process_cb_unregister); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h index c330c106817f..b0d16c891b56 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -25,6 +25,24 @@ #include +typedef struct netif_cb_s { + /*! List head */ + struct list_head list; + + /*! Handle Netif creation or destruction */ + ngknet_netif_cb_f cb; +} netif_cb_t; + +typedef struct filter_cb_s { + /*! List head */ + struct list_head list; + + char desc[NGKNET_FILTER_DESC_MAX]; + + /*! Handle Filter callback */ + ngknet_filter_cb_f cb; +} filter_cb_t; + /*! * \brief NGKNET callback control. */ @@ -38,11 +56,14 @@ struct ngknet_callback_ctrl { /*! Handle Tx packet */ ngknet_tx_cb_f tx_cb; - /*! Handle Netif creation */ - ngknet_netif_cb_f netif_create_cb; + /*! Netif creation list */ + struct list_head netif_create_cb_list; - /*! Handle Netif destruction */ - ngknet_netif_cb_f netif_destroy_cb; + /*! Netif destruction list */ + struct list_head netif_destroy_cb_list; + + /*! Filter callback list */ + struct list_head filter_cb_list; /*! Handle filter callback */ ngknet_filter_cb_f filter_cb; @@ -67,8 +88,29 @@ struct ngknet_callback_ctrl { /*! PTP device control */ ngknet_ptp_dev_ctrl_cb_f ptp_dev_ctrl_cb; + + /*! PTP Rx pre processing */ + ngknet_ptp_rx_pre_process_cb_f ptp_rx_pre_process_cb; + + /*! Devices */ + struct ngknet_dev *devs; }; +/*! + * \brief Initialize callback control. + * + * \param [in] devs Devices array. + */ +extern void +ngknet_callback_init(struct ngknet_dev *devs); + +/*! + * \brief Cleanup callback control. + * + */ +extern void +ngknet_callback_cleanup(void); + /*! * \brief Get callback control. * @@ -80,4 +122,3 @@ extern int ngknet_callback_control_get(struct ngknet_callback_ctrl **cbc); #endif /* NGKNET_CALLBACK_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h index 6292494bc92d..c52dbd7e4e7e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c index 3bf2dbfdc5ef..92df52a372a3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -45,10 +45,12 @@ #include #include +#include #include #include "ngknet_main.h" #include "ngknet_extra.h" #include "ngknet_callback.h" +#include "ngknet_ptp.h" /*! Defalut Rx tick for Rx rate limit control. */ #define NGKNET_EXTRA_RATE_LIMIT_DEFAULT_RX_TICK 10 @@ -61,6 +63,7 @@ ngknet_filter_create(struct ngknet_dev *dev, ngknet_filter_t *filter) struct filt_ctrl *fc = NULL; struct list_head *list = NULL; ngknet_filter_t *filt = NULL; + filter_cb_t *filter_cb; unsigned long flags; int num, id, done = 0; @@ -107,6 +110,18 @@ ngknet_filter_create(struct ngknet_dev *dev, ngknet_filter_t *filter) memcpy(&fc->filt, filter, sizeof(fc->filt)); fc->filt.id = id; + /* Check for filter-specific callback */ + if (filter->dest_type == NGKNET_FILTER_DEST_T_CB && + filter->desc[0] != '\0') { + list_for_each(list, &dev->cbc->filter_cb_list) { + filter_cb = list_entry(list, filter_cb_t, list); + if (strcmp(filter->desc, filter_cb->desc) == 0) { + fc->filter_cb = filter_cb->cb; + break; + } + } + } + list_for_each(list, &dev->filt_list) { filt = &((struct filt_ctrl *)list)->filt; if (filt->flags & NGKNET_FILTER_F_MATCH_CHAN) { @@ -248,22 +263,26 @@ ngknet_filter_get_next(struct ngknet_dev *dev, ngknet_filter_t *filter) } int -ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_device **ndev, - struct net_device **mndev, struct sk_buff **mskb) +ngknet_rx_pkt_filter(struct ngknet_dev *dev, + struct sk_buff **oskb, struct net_device **ndev, + struct sk_buff **mskb, struct net_device **mndev) { - struct pkt_buf *pkb = (struct pkt_buf *)skb->data; + struct sk_buff *skb = *oskb, *mirror_skb = NULL; struct net_device *dest_ndev = NULL, *mirror_ndev = NULL; - struct sk_buff *mirror_skb = NULL; struct ngknet_private *priv = NULL; struct filt_ctrl *fc = NULL; struct list_head *list = NULL; - ngknet_filter_t scratch, *filt = NULL, *filt_cb = NULL; + ngknet_filter_t scratch, *filt = NULL; + struct pkt_buf *pkb = (struct pkt_buf *)skb->data; uint8_t *oob = &pkb->data, *data = NULL; uint16_t tpid; unsigned long flags; int wsize; int chan_id; - int rv, idx, match = 0,match_cb = 0; + int rv, idx, match = 0; + int eth_offset = 0; + int cust_hdr_len = 0; + ngknet_filter_cb_f filter_cb; rv = bcmcnet_pdma_dev_queue_to_chan(&dev->pdma_dev, pkb->pkh.queue_id, PDMA_Q_RX, &chan_id); @@ -285,7 +304,7 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_dev if (list_empty(&dev->filt_list)) { spin_unlock_irqrestore(&dev->lock, flags); - return SHR_E_NONE; + return SHR_E_NO_HANDLER; } list_for_each(list, &dev->filt_list) { @@ -311,11 +330,6 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_dev } } if (idx == wsize) { - if (NGKNET_FILTER_DEST_T_CB == filt->dest_type) { - match_cb = 1; - filt_cb = filt; - continue; - } match = 1; break; } @@ -326,7 +340,8 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_dev if (filt->dest_type == NGKNET_FILTER_DEST_T_CB) { struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data; - if (!dev->cbc->filter_cb) { + filter_cb = fc->filter_cb ? fc->filter_cb : dev->cbc->filter_cb; + if (!filter_cb) { spin_unlock_irqrestore(&dev->lock, flags); return SHR_E_UNAVAIL; } @@ -335,10 +350,19 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_dev cbd->pmd_len = pkh->meta_len; cbd->pkt_len = pkh->data_len; cbd->filt = filt; - skb = dev->cbc->filter_cb(skb, &filt); - if (!skb || !filt) { + skb = filter_cb(skb, &filt); + if (!skb) { + *oskb = NULL; spin_unlock_irqrestore(&dev->lock, flags); - return SHR_E_UNAVAIL; + return SHR_E_NONE; + } + if (skb != *oskb) { + *oskb = skb; + pkb = (struct pkt_buf *)skb->data; + } + if (!filt) { + spin_unlock_irqrestore(&dev->lock, flags); + return SHR_E_NO_HANDLER; } } switch (filt->dest_type) { @@ -361,40 +385,41 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_dev case NGKNET_FILTER_DEST_T_VNET: pkb->pkh.attrs |= PDMA_RX_TO_VNET; spin_unlock_irqrestore(&dev->lock, flags); - return SHR_E_NO_HANDLER; + return SHR_E_NONE; case NGKNET_FILTER_DEST_T_NULL: default: spin_unlock_irqrestore(&dev->lock, flags); - return SHR_E_UNAVAIL; + return SHR_E_NO_HANDLER; } } spin_unlock_irqrestore(&dev->lock, flags); if (!dest_ndev) { - return SHR_E_NONE; + return SHR_E_NO_HANDLER; } else { *ndev = dest_ndev; } + /* PTP Rx Pre processing */ + if (priv->hwts_rx_filter) { + ngknet_ptp_rx_pre_process(dest_ndev, skb, &cust_hdr_len); + } + if (filt->flags & NGKNET_FILTER_F_STRIP_TAG) { pkb->pkh.attrs |= PDMA_RX_STRIP_TAG; - data = skb->data + PKT_HDR_SIZE + pkb->pkh.meta_len; + eth_offset = PKT_HDR_SIZE + pkb->pkh.meta_len + cust_hdr_len; + data = skb->data + eth_offset; tpid = data[12] << 8 | data[13]; if (tpid == ETH_P_8021Q || tpid == ETH_P_8021AD) { pkb->pkh.data_len -= VLAN_HLEN; - memmove(skb->data + VLAN_HLEN, skb->data, - PKT_HDR_SIZE + pkb->pkh.meta_len + 2 * ETH_ALEN); + memmove(skb->data + VLAN_HLEN, skb->data, eth_offset + 2 * ETH_ALEN); skb_pull(skb, VLAN_HLEN); } } if (dev->cbc->rx_cb) { NGKNET_SKB_CB(skb)->filt = filt; - /* Add callback filter if matched */ - if (priv) { - priv->filt_cb = match_cb? filt_cb : NULL; - } } if (filt->mirror_type == NGKNET_FILTER_DEST_T_NETIF) { diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h index 1dbeb8094a88..fdbc0c381f39 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -23,6 +23,8 @@ #ifndef NGKNET_EXTRA_H #define NGKNET_EXTRA_H +#include + /*! * \brief Filter control. */ @@ -38,6 +40,9 @@ struct filt_ctrl { /*! Filter description */ ngknet_filter_t filt; + + /*! Filter callback */ + ngknet_filter_cb_f filter_cb; }; /*! @@ -104,16 +109,18 @@ ngknet_filter_get_next(struct ngknet_dev *dev, ngknet_filter_t *filter); * \brief Filter packet. * * \param [in] dev Device structure point. - * \param [in] skb Rx packet SKB. - * \param [out] mndev Mirror network interface. - * \param [out] mskb Mirror Rx packet SKB. + * \param [in] oskb Rx packet SKB. + * \param [out] ndev Network interface. + * \param [out] mskb Mirrored Rx packet SKB. + * \param [out] mndev Mirrored network interface. * * \retval Matched network interface. * \retval NULL No matched network interface. */ extern int -ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_device **ndev, - struct net_device **mndev, struct sk_buff **mskb); +ngknet_rx_pkt_filter(struct ngknet_dev *dev, + struct sk_buff **oskb, struct net_device **ndev, + struct sk_buff **mskb, struct net_device **mndev); /*! * \brief Rx rate limit control. diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c index 56d3f2371b47..b3fcaec24317 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h index 14475167d7e8..cc14001411e9 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -34,7 +34,6 @@ #define MODULE_PARAM(n, t, p) module_param(n, t, p) - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0)) #define NGKNET_ETHTOOL_LINK_SETTINGS 1 #else @@ -186,16 +185,6 @@ kal_copy_to_user(void __user *to, const void *from, return copy_to_user(to, from, len); } -static inline int -kal_support_paged_skb(void) -{ -#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,4,0) - return 1; -#else - return 0; -#endif -} - /*! * System abstraction */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c index 040466751e8d..a19fbb258f85 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -93,6 +93,26 @@ #include "ngknet_callback.h" #include "ngknet_ptp.h" +/* FIXME: SAI_FIXUP */ +#if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */ +#define NGKNET_IOC_SVTAG_SET (SIOCDEVPRIVATE + 0) +#define NGKNET_IOC_SVTAG_MAGIC 0x53565447 /* "SVTG" */ +#define NGKNET_NETIF_F_DEL_SVTAG (1U << 15) /* Remove SVTAG from the RX packets */ +#define NGKNET_NETIF_F_ADD_SVTAG (1U << 14) /* Insert SVTAG into the TX packets */ + +/* Enum to define SVTAG packet type */ +#define NGKNET_SVTAG_PKTYPE_NONMACSEC 0 /* Unsecure data packet (Untag Control Port packet) */ +#define NGKNET_SVTAG_PKTYPE_MACSEC 1 /* Secure data packet (Tag Controlled Port packet) */ +#define NGKNET_SVTAG_PKTYPE_KAY 2 /* KaY Frame (KaY Uncontrolled Port packet) */ + +/* Struct for SVTAG ioctl */ +struct ifru_svtag { + uint32_t magic; + uint32_t flags; + uint8_t svtag[4]; +}; +#endif + /*! \cond */ MODULE_AUTHOR("Broadcom Corporation"); MODULE_DESCRIPTION("Network Device Driver Module"); @@ -124,42 +144,42 @@ MODULE_PARM_DESC(mac_addr, static int default_mtu = 1500; MODULE_PARAM(default_mtu, int, 0); MODULE_PARM_DESC(default_mtu, -"Default MTU for NGKNET network interfaces (default 1500)"); +"MTU size for KNET network interfaces (default 1500)"); /*! \endcond */ /*! \cond */ static int rx_buffer_size = RX_BUF_SIZE_DFLT; MODULE_PARAM(rx_buffer_size, int, 0); MODULE_PARM_DESC(rx_buffer_size, -"Default size of RX packet buffers (default 9216)"); +"RX packet buffer size in bytes (default 9216)"); /*! \endcond */ /*! \cond */ static int rx_rate_limit = -1; MODULE_PARAM(rx_rate_limit, int, 0); MODULE_PARM_DESC(rx_rate_limit, -"Rx rate limit (pps, default -1 no limit)"); +"Rx rate limit in packets per second (default -1 for no limit)"); /*! \endcond */ /*! \cond */ static int tx_polling = 0; MODULE_PARAM(tx_polling, int, 0); MODULE_PARM_DESC(tx_polling, -"Tx polling mode (default 0 in interrupt mode)"); +"Enable Tx poll mode (default 0 for interrupt mode)"); /*! \endcond */ /*! \cond */ static int rx_batching = 0; MODULE_PARAM(rx_batching, int, 0); MODULE_PARM_DESC(rx_batching, -"Rx batching mode (default 0 in single fill mode)"); +"Enable Rx batch fill mode (default 0 for single fill mode)"); /*! \endcond */ /*! \cond */ -static int page_buffer_mode = -1; +static int page_buffer_mode = 0; MODULE_PARAM(page_buffer_mode, int, 0); -MODULE_PARM_DESC(rx_batching, -"Page buffer mode (default -1 do not override, 0 forced disable, 1 forced enable)"); +MODULE_PARM_DESC(page_buffer_mode, +"Enable SKB page buffer mode (default 0 for legacy SKB mode)"); /*! \endcond */ typedef int (*drv_ops_attach)(struct pdma_dev *dev); @@ -347,11 +367,6 @@ ngknet_rx_frame_process(struct net_device *ndev, struct sk_buff **oskb) struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data; uint8_t meta_len = pkh->meta_len; - /* Do Rx timestamping */ - if (priv->hwts_rx_filter) { - ngknet_ptp_rx_hwts_set(ndev, skb); - } - /* Remove FCS from packet length */ skb_trim(skb, skb->len - ETH_FCS_LEN); pkh->data_len -= ETH_FCS_LEN; @@ -380,14 +395,29 @@ ngknet_rx_frame_process(struct net_device *ndev, struct sk_buff **oskb) skb_pull(skb, PKT_HDR_SIZE + meta_len); } - /* Check to ensure ngknet_callback_desc struct fits in sk_buff->cb */ + /* Do Rx timestamping */ + if (priv->hwts_rx_filter) { + ngknet_ptp_rx_hwts_set(ndev, skb); + } + + /* Check to ensure ngknet_callback_desc struct fits in sk_buff->cb */ BUILD_BUG_ON(sizeof(struct ngknet_callback_desc) > sizeof(skb->cb)); +#if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */ + /* Strip SVTAG from the packets injected by the MACSEC block */ + if (priv->netif.flags & NGKNET_NETIF_F_DEL_SVTAG) { + /* Strip SVTAG (4 bytes) */ + memmove(skb->data + 4, skb->data, 12); + skb_pull(skb, 4); + } +#endif /* Optional callback handle */ if (dev->cbc->rx_cb) { struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); cbd->dinfo = &dev->dev_info; cbd->netif = &priv->netif; + cbd->net_dev = priv->net_dev; + if (priv->netif.flags & NGKNET_NETIF_F_RCPU_ENCAP) { cbd->pmd = skb->data + PKT_HDR_SIZE; cbd->pkt_len = ntohs(rch->data_len); @@ -396,7 +426,7 @@ ngknet_rx_frame_process(struct net_device *ndev, struct sk_buff **oskb) cbd->pkt_len = pkh->data_len; } cbd->pmd_len = meta_len; - skb = dev->cbc->rx_cb(ndev, skb); + skb = dev->cbc->rx_cb(skb); if (!skb) { *oskb = NULL; return SHR_E_UNAVAIL; @@ -429,19 +459,17 @@ ngknet_netif_recv(struct net_device *ndev, struct sk_buff *skb) { struct ngknet_private *priv = netdev_priv(ndev); struct ngknet_dev *dev = priv->bkn_dev; - struct pdma_dev *pdev = &dev->pdma_dev; struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data; - struct napi_struct *napi = NULL; uint16_t proto; - int chan_id, gi, qi, skb_len; int rv; /* Handle one incoming packet */ rv = ngknet_rx_frame_process(ndev, &skb); + if (!skb) { + return SHR_E_NONE; + } if (SHR_FAILURE(rv)) { - if (!skb) { - return SHR_E_NONE; - } + return rv; } DBG_VERB(("Rx packet sent up to ndev%d (%d bytes).\n", @@ -468,26 +496,11 @@ ngknet_netif_recv(struct net_device *ndev, struct sk_buff *skb) skb_record_rx_queue(skb, pkh->queue_id); - rv = bcmcnet_pdma_dev_queue_to_chan(pdev, pkh->queue_id, PDMA_Q_RX, &chan_id); - if (SHR_FAILURE(rv)) { - return rv; - } - - gi = chan_id / pdev->grp_queues; - if (pdev->flags & PDMA_GROUP_INTR) { - napi = (struct napi_struct *)pdev->ctrl.grp[gi].intr_hdl[0].priv; - } else { - qi = pkh->queue_id; - napi = (struct napi_struct *)pdev->ctrl.grp[gi].intr_hdl[qi].priv; - } - - /* FIXME: File CSP on KASAN warning on use-after-free in ngknet_netif_recv */ - skb_len = skb->len; - napi_gro_receive(napi, skb); /* Update accounting */ priv->stats.rx_packets++; - priv->stats.rx_bytes += skb_len; + priv->stats.rx_bytes += skb->len; + netif_receive_skb(skb); /* Rate limit */ if (rx_rate_limit >= 0) { @@ -529,9 +542,15 @@ ngknet_frame_recv(struct pdma_dev *pdev, int queue, void *buf) DBG_NDEV(("Valid virtual network devices: %ld.\n", (long)dev->vdev[0])); /* Go through the filters */ - rv = ngknet_rx_pkt_filter(dev, skb, &ndev, &mndev, &mskb); - if (SHR_FAILURE(rv) || !ndev) { - return SHR_E_FAIL; + rv = ngknet_rx_pkt_filter(dev, &skb, &ndev, &mskb, &mndev); + if (!skb) { + return SHR_E_NONE; + } + if (SHR_FAILURE(rv)) { + dev_kfree_skb_any(skb); + return SHR_E_NONE; + } else if (!ndev) { + return SHR_E_NO_HANDLER; } /* Populate header, checksum status, VLAN, and protocol */ @@ -539,7 +558,7 @@ ngknet_frame_recv(struct pdma_dev *pdev, int queue, void *buf) if (!netif_carrier_ok(ndev) || SHR_FAILURE(ngknet_netif_recv(ndev, skb))) { priv->stats.rx_dropped++; - rv = SHR_E_UNAVAIL; + dev_kfree_skb_any(skb); } spin_lock_irqsave(&dev->lock, flags); @@ -623,6 +642,7 @@ ngknet_ptp_tx_config(struct net_device *ndev, struct sk_buff *skb) { struct ngknet_private *priv = netdev_priv(ndev); struct ngknet_dev *dev = priv->bkn_dev; + uint64_t *tx_ts = (uint64_t *)skb->cb; int rv; if (priv->netif.type == NGKNET_NETIF_T_PORT) { @@ -634,6 +654,16 @@ ngknet_ptp_tx_config(struct net_device *ndev, struct sk_buff *skb) return SHR_E_UNAVAIL; } + /* For 1step meta_set will populate the TX timestamp for + * the required PTP packets (i.e. DELAY_REQ), only in such + * case we should schedule ptp_tx_work for the TX timestamp + * to be sent back on the socket. + */ + if (priv->hwts_tx_type == HWTSTAMP_TX_ONESTEP_SYNC && + *tx_ts == 0) { + return SHR_E_NONE; + } + skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; if (priv->hwts_tx_type == HWTSTAMP_TX_ONESTEP_SYNC) { @@ -731,6 +761,7 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb) return SHR_E_MEMORY; } skb_shinfo(nskb)->tx_flags = skb_shinfo(skb)->tx_flags; + nskb->sk = skb->sk; skb = nskb; } skb_push(skb, PKT_HDR_SIZE + meta_len); @@ -771,6 +802,7 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb) return SHR_E_MEMORY; } skb_shinfo(nskb)->tx_flags = skb_shinfo(skb)->tx_flags; + nskb->sk = skb->sk; skb = nskb; } skb_push(skb, VLAN_HLEN); @@ -785,6 +817,45 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb) tag_len = VLAN_HLEN; } +#if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */ + /* XGS MACSEC: Add SVTAG (Secure Vlan TAG) */ + if (priv->netif.flags & NGKNET_NETIF_F_ADD_SVTAG) { + uint16_t ether_type = 0; + static const uint16_t mgmt_et = 0x888e; + static const uint8_t mgmt_dst[] = {0x01, 0x80, 0xc2, 0x00, 0x00, 0x03}; + + copy_len = PKT_HDR_SIZE + pkh->meta_len + 2 * ETH_ALEN; + if (skb_header_cloned(skb) || skb_headroom(skb) < VLAN_HLEN) { + nskb = skb_copy_expand(skb, VLAN_HLEN, 0, GFP_ATOMIC); + if (!nskb) { + return SHR_E_MEMORY; + } + skb_shinfo(nskb)->tx_flags = skb_shinfo(skb)->tx_flags; + nskb->sk = skb->sk; + skb = nskb; + } + skb_push(skb, VLAN_HLEN); + memmove(skb->data, skb->data + VLAN_HLEN, copy_len); + pkh = (struct pkt_hdr *)skb->data; + data = skb->data + PKT_HDR_SIZE + pkh->meta_len; + ether_type = ((uint8_t)data[16] << 8) | (uint8_t)data[17]; + data[12] = priv->svtag[0]; + data[13] = priv->svtag[1]; + if (mgmt_et == ether_type && !memcmp(mgmt_dst, data, 6)) { + if (priv->svtag[2]) + data[14] = NGKNET_SVTAG_PKTYPE_KAY << 2; + else + data[14] = NGKNET_SVTAG_PKTYPE_NONMACSEC << 2; + } else { + data[14] = priv->svtag[2]; /* secured if configured */ + } + data[15] = priv->svtag[3]; + pkh->data_len += VLAN_HLEN; + tag_len += VLAN_HLEN; + printk(KERN_DEBUG "ether_type: %04x, pktype %d, subport %d\n", ether_type, (data[14] >> 2) & 0xf, data[15]); + } +#endif + /* Optional callback handle */ if (dev->cbc->tx_cb) { struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); @@ -965,28 +1036,30 @@ ngknet_poll(struct napi_struct *napi, int budget) DBG_NAPI(("Scheduled NAPI on queue %d.\n", hdl->queue)); - kih->napi_resched = 0; kih->napi_pending = 0; if (pdev->flags & PDMA_GROUP_INTR) { work_done = bcmcnet_group_poll(pdev, hdl->group, budget); } else { + if (!kih->napi_resched) { + bcmcnet_queue_intr_ack(pdev, hdl); + } work_done = bcmcnet_queue_poll(pdev, hdl, budget); } if (work_done < budget) { + kih->napi_resched = 0; napi_complete(napi); if (kih->napi_pending && napi_schedule_prep(napi)) { + kih->napi_resched = 1; __napi_schedule(napi); return work_done; } spin_lock_irqsave(&dev->lock, flags); - if (!kih->napi_resched) { - if (pdev->flags & PDMA_GROUP_INTR) { - bcmcnet_group_intr_enable(pdev, hdl->group); - } else { - bcmcnet_queue_intr_enable(pdev, hdl); - } + if (pdev->flags & PDMA_GROUP_INTR) { + bcmcnet_group_intr_enable(pdev, hdl->group); + } else { + bcmcnet_queue_intr_enable(pdev, hdl); } spin_unlock_irqrestore(&dev->lock, flags); } @@ -1004,6 +1077,7 @@ ngknet_isr(void *isr_data) struct pdma_dev *pdev = &dev->pdma_dev; struct intr_handle *hdl = NULL; struct napi_struct *napi = NULL; + unsigned long bm_queue; unsigned long flags; int gi, qi; int iv = 0; @@ -1012,7 +1086,11 @@ ngknet_isr(void *isr_data) if (!pdev->ctrl.grp[gi].attached) { continue; } + bm_queue = pdev->ctrl.grp[gi].bm_rxq | pdev->ctrl.grp[gi].bm_txq; for (qi = 0; qi < pdev->grp_queues; qi++) { + if (!(pdev->flags & PDMA_GROUP_INTR) && !(1 << qi & bm_queue)) { + continue; + } hdl = &pdev->ctrl.grp[gi].intr_hdl[qi]; if (pdev->flags & PDMA_GROUP_INTR) { if (!bcmcnet_group_intr_check(pdev, gi)) { @@ -1056,26 +1134,27 @@ ngknet_isr(void *isr_data) static void ngknet_dev_hnet_work(struct pdma_dev *pdev) { - struct ngknet_dev *dev = (struct ngknet_dev *)pdev->priv; struct intr_handle *hdl = NULL; struct napi_struct *napi = NULL; struct ngknet_intr_handle *kih = NULL; - unsigned long flags; + unsigned long bm_queue; int gi, qi; for (gi = 0; gi < pdev->num_groups; gi++) { if (!pdev->ctrl.grp[gi].attached) { continue; } + bm_queue = pdev->ctrl.grp[gi].bm_rxq | pdev->ctrl.grp[gi].bm_txq; for (qi = 0; qi < pdev->grp_queues; qi++) { + if (!(pdev->flags & PDMA_GROUP_INTR) && !(1 << qi & bm_queue)) { + continue; + } hdl = &pdev->ctrl.grp[gi].intr_hdl[qi]; napi = (struct napi_struct *)hdl->priv; kih = (struct ngknet_intr_handle *)napi; kih->napi_pending = 1; if (napi_schedule_prep(napi)) { - spin_lock_irqsave(&dev->lock, flags); kih->napi_resched = 1; - spin_unlock_irqrestore(&dev->lock, flags); local_bh_disable(); __napi_schedule(napi); local_bh_enable(); @@ -1134,8 +1213,10 @@ ngknet_dev_vnet_wake(struct pdma_dev *pdev) { struct ngknet_dev *dev = (struct ngknet_dev *)pdev->priv; - atomic_set(&dev->vnet_active, 1); - wake_up_interruptible(&dev->vnet_wq); + if (atomic_read(&dev->vnet_active) != 1) { + atomic_set(&dev->vnet_active, 1); + wake_up_interruptible(&dev->vnet_wq); + } return SHR_E_NONE; } @@ -1463,6 +1544,20 @@ ngknet_do_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd) struct hwtstamp_config config; int rv; +#if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */ + if (cmd == NGKNET_IOC_SVTAG_SET) { + struct ifru_svtag req; + + if (copy_from_user(&req, ifr->ifr_data, sizeof(req))) + return -EFAULT; + if (ntohl(req.magic) != NGKNET_IOC_SVTAG_MAGIC) + return -EINVAL; + priv->netif.flags &= ~(NGKNET_NETIF_F_ADD_SVTAG | NGKNET_NETIF_F_DEL_SVTAG); + priv->netif.flags |= req.flags & (NGKNET_NETIF_F_ADD_SVTAG | NGKNET_NETIF_F_DEL_SVTAG); + memcpy(priv->svtag, req.svtag, 4); + return 0; + } else +#endif if (cmd == SIOCSHWTSTAMP) { if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) { return -EFAULT; @@ -1692,7 +1787,7 @@ ngknet_ndev_init(ngknet_netif_t *netif, struct net_device **nd) ndev->ethtool_ops = &ngknet_ethtool_ops; /* Network device name */ - if (netif->name && *netif->name) { + if (netif->name[0] != '\0') { strncpy(ndev->name, netif->name, IFNAMSIZ - 1); } @@ -1777,7 +1872,6 @@ ngknet_pdev_init(struct ngknet_dev *dev) pdev->sys_p2v = ngknet_sys_p2v; pdev->sys_v2p = ngknet_sys_v2p; - pdev->flags |= PDMA_GROUP_INTR; if (tx_polling) { pdev->flags |= PDMA_TX_POLLING; } @@ -1827,7 +1921,7 @@ ngknet_dev_info_get(int dn) dev->dev_info.dev_no = dn; strlcpy(dev->dev_info.type_str, drv_ops[dev->pdma_dev.dev_type]->drv_desc, sizeof(dev->dev_info.type_str)); - + dev->dev_info.vdev = dev->vdev; return SHR_E_NONE; } @@ -2062,8 +2156,10 @@ ngknet_netif_create(struct ngknet_dev *dev, ngknet_netif_t *netif) struct net_device *ndev = NULL; struct ngknet_private *priv = NULL; unsigned long flags; - int num, id; + uint16_t id, num; int rv; + struct list_head *list; + netif_cb_t *netif_create_cb; switch (netif->type) { case NGKNET_NETIF_T_VLAN: @@ -2100,20 +2196,39 @@ ngknet_netif_create(struct ngknet_dev *dev, ngknet_netif_t *netif) spin_lock_irqsave(&dev->lock, flags); num = (long)dev->vdev[0]; - for (id = 1; id < num + 1; id++) { - if (!dev->vdev[id]) { - break; + id = netif->id; + if (netif->flags & NGKNET_NETIF_F_WITH_ID) { + if (id == 0 || id > NUM_VDEV_MAX) { + rv = SHR_E_PARAM; + } else { + /* ID assignment is specifed by user. */ + if (dev->vdev[id]) { + DBG_WARN(("ID %d is already in use\n", id)); + rv = SHR_E_BUSY; + } + } + } else { + /* Automatic ID assignment. */ + for (id = 1; id < num + 1; id++) { + if (!dev->vdev[id]) { + break; + } + } + if (id > NUM_VDEV_MAX) { + rv = SHR_E_RESOURCE; } } - if (id > NUM_VDEV_MAX) { + if (SHR_FAILURE(rv)) { spin_unlock_irqrestore(&dev->lock, flags); unregister_netdev(ndev); free_netdev(ndev); - return SHR_E_RESOURCE; + return rv; } dev->vdev[id] = ndev; - num += id == (num + 1) ? 1 : 0; + if (id > num) { + num = id; + } dev->vdev[0] = (struct net_device *)(long)num; spin_unlock_irqrestore(&dev->lock, flags); @@ -2133,8 +2248,9 @@ ngknet_netif_create(struct ngknet_dev *dev, ngknet_netif_t *netif) } /* Optional netif create callback handle */ - if (dev->cbc->netif_create_cb) { - if (dev->cbc->netif_create_cb(ndev)) { + list_for_each(list, &dev->cbc->netif_create_cb_list) { + netif_create_cb = list_entry(list, netif_cb_t, list); + if (netif_create_cb->cb(&dev->dev_info, &priv->netif)) { DBG_WARN(("Network interface callback (create) failed for '%s'\n", ndev->name)); } @@ -2153,6 +2269,8 @@ ngknet_netif_destroy(struct ngknet_dev *dev, int id) struct ngknet_private *priv = NULL; unsigned long flags; int num; + struct list_head *list; + netif_cb_t *netif_destroy_cb; DECLARE_WAITQUEUE(wait, current); if (id <= 0 || id > NUM_VDEV_MAX) { @@ -2198,8 +2316,9 @@ ngknet_netif_destroy(struct ngknet_dev *dev, int id) remove_wait_queue(&dev->wq, &wait); /* Optional netif destroy callback handle */ - if (dev->cbc->netif_destroy_cb) { - if (dev->cbc->netif_destroy_cb(ndev)) { + list_for_each(list, &dev->cbc->netif_destroy_cb_list) { + netif_destroy_cb = list_entry(list, netif_cb_t, list); + if (netif_destroy_cb->cb(&dev->dev_info, &priv->netif)) { DBG_WARN(("Network interface callback (destroy) failed for '%s'\n", ndev->name)); } @@ -2426,6 +2545,10 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) } pdev->rx_ph_size = dev_cfg->rx_ph_size; pdev->tx_ph_size = dev_cfg->tx_ph_size; + pdev->flags |= PDMA_GROUP_INTR; + if (dev_cfg->flags & NGKNET_RX_POLL_SQ) { + pdev->flags &= ~PDMA_GROUP_INTR; + } pdev->mode = dev_cfg->mode; if (pdev->mode != DEV_MODE_KNET && pdev->mode != DEV_MODE_HNET) { pdev->mode = DEV_MODE_KNET; @@ -2561,8 +2684,10 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ioc.rc = SHR_E_UNAVAIL; break; } - atomic_set(&dev->hnet_active, 1); - wake_up_interruptible(&dev->hnet_wq); + if (atomic_read(&dev->hnet_active) != 1) { + atomic_set(&dev->hnet_active, 1); + wake_up_interruptible(&dev->hnet_wq); + } break; case NGKNET_DEV_VNET_DOCK: DBG_CMD(("NGKNET_DEV_VNET_DOCK\n")); @@ -2818,6 +2943,9 @@ ngknet_init_module(void) /* Initialize Rx rate limit */ ngknet_rx_rate_limit_init(ngknet_devices); + /* Initialize Callback control */ + ngknet_callback_init(ngknet_devices); + return 0; } @@ -2826,6 +2954,9 @@ ngknet_exit_module(void) { int idx; + /* Cleanup Callback control */ + ngknet_callback_cleanup(); + /* Cleanup Rx rate limit */ ngknet_rx_rate_limit_cleanup(); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h index e31d4bb257ab..ac740a409fc4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -58,6 +58,10 @@ #define DBG_RATE(_s) do { if (debug & DBG_LVL_RATE) printk _s; } while (0) #define DBG_LINK(_s) do { if (debug & DBG_LVL_LINK) printk _s; } while (0) +/* FIXME: SAI_FIXUP */ +#define SAI_FIXUP 1 +#define KNET_SVTAG_HOTFIX 1 + /*! * Device description */ @@ -80,7 +84,7 @@ struct ngknet_dev { /*! PDMA device */ struct pdma_dev pdma_dev; - /*! Virtual network devices, 0 is reserved for valid number of devices. */ + /*! Virtual network devices, 0 is used for max ID number. */ struct net_device *vdev[NUM_VDEV_MAX + 1]; /*! Virtual network devices bound to queue */ @@ -166,8 +170,10 @@ struct ngknet_private { /* Link settings */ struct ethtool_link_settings link_settings; #endif - /*! Matched callback filter */ - struct ngknet_filter_s *filt_cb; +#if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */ + /* ! MACSEC SVTAG */ + uint8_t svtag[4]; +#endif }; /*! diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c index ad3aefe83b32..19b83df7229f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h index f6df80fe7064..4664f0973e99 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c index eaec51a9800f..e648db8c49fe 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -95,19 +95,11 @@ ngknet_ptp_tx_hwts_get(struct net_device *ndev, struct sk_buff *skb, uint64_t *t { struct ngknet_private *priv = netdev_priv(ndev); struct ngknet_dev *dev = priv->bkn_dev; - struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); - struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data; if (!dev->cbc->ptp_tx_hwts_get_cb) { return SHR_E_UNAVAIL; } - cbd->dinfo = &dev->dev_info; - cbd->netif = &priv->netif; - cbd->pmd = skb->data + PKT_HDR_SIZE; - cbd->pmd_len = pkh->meta_len; - cbd->pkt_len = pkh->data_len; - /* * The callback should get timestamp value for a Tx packet and return * by the parameter . @@ -130,11 +122,14 @@ ngknet_ptp_tx_meta_set(struct net_device *ndev, struct sk_buff *skb) struct ngknet_dev *dev = priv->bkn_dev; struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data; + struct ngknet_ptp_data *pd = (struct ngknet_ptp_data *)priv->netif.user_data; if (!dev->cbc->ptp_tx_meta_set_cb) { return SHR_E_UNAVAIL; } + /* First 4bytes of user_data already has phy_port */ + pd->hwts_tx_type = priv->hwts_tx_type; cbd->dinfo = &dev->dev_info; cbd->netif = &priv->netif; cbd->pmd = skb->data + PKT_HDR_SIZE; @@ -187,3 +182,32 @@ ngknet_ptp_dev_ctrl(struct ngknet_dev *dev, int cmd, char *data, int len) return dev->cbc->ptp_dev_ctrl_cb(&dev->dev_info, cmd, data, len); } +extern int +ngknet_ptp_rx_pre_process(struct net_device *ndev, struct sk_buff *skb, + uint32_t *cust_hdr_len) +{ + struct ngknet_private *priv = netdev_priv(ndev); + struct ngknet_dev *dev = priv->bkn_dev; + struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); + struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data; + + if (!dev->cbc->ptp_rx_pre_process_cb) { + return SHR_E_UNAVAIL; + } + + cbd->dinfo = &dev->dev_info; + cbd->netif = &priv->netif; + cbd->pmd = skb->data + PKT_HDR_SIZE; + cbd->pmd_len = pkh->meta_len; + cbd->pkt_len = pkh->data_len; + + /* + * The callback should get custom header length return by the parameter + * . + * Some parameters have been consolidated to SKB as above. They can be + * achieved by NGKNET_SKB_CB(skb). Specially more private paramters are + * in NGKNET_SKB_CB(skb)->dinfo or NGKNET_SKB_CB(skb)->netif->user_data + * such as dev_type, phys_port and so on. + */ + return dev->cbc->ptp_rx_pre_process_cb(skb, cust_hdr_len); +} diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h index c365a8d8d0e7..bccbb3a99d69 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -107,5 +107,21 @@ ngknet_ptp_phc_index_get(struct net_device *ndev, int *index); extern int ngknet_ptp_dev_ctrl(struct ngknet_dev *dev, int cmd, char *data, int len); +/*! + * \brief PTP Rx pre-process to get custom header length. + * + * If the RX PTP packet is timestamped by the HW and requires + * timestamp processing then, this function can be used + * to get the custom/system header length encapsulated by the FW. + * + * \param [in] dev NGKNET device structure point. + * \param [in] skb Rx packet SKB. + * \param [out] Custom header length. + * + * \retval SHR_E_NONE No errors. + */ +extern int +ngknet_ptp_rx_pre_process(struct net_device *ndev, struct sk_buff *skb, uint32_t *cust_hdr_len); + #endif /* NGKNET_PTP_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild index 0469855c7dfd..b60be7fda92f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild @@ -2,7 +2,7 @@ # # Linux KNET Callback module. # -# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. +# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or @@ -18,11 +18,6 @@ # be found in the LICENSES folder.$ # -ifeq ($(BUILD_PSAMPLE),1) -PSAMPLE_CFLAGS=-DPSAMPLE_SUPPORT -PSAMPLE_CB_OBJS=psample-cb.o -endif - ifneq ($(OUTPUT_DIR),) INCLUDES := -I$(OUTPUT_DIR)/knet/generated/include -I$(OUTPUT_DIR)/knet/generated endif @@ -40,9 +35,8 @@ ccflags-y := $(KNETCB_CPPFLAGS) $(LKM_CFLAGS) \ -I$(SDK)/linux/knet \ -I$(SDK)/linux/knet/generated/include \ -I$(SDK)/linux/knet/generated \ - $(INCLUDES) \ - $(PSAMPLE_CFLAGS) \ + $(INCLUDES) + linux_ngknetcb-y := $(SDK_PMD_KOBJS) \ - ngknetcb_main.o \ - $(PSAMPLE_CB_OBJS) + ngknetcb_main.o diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile index b23af7ed4e86..704ea29a0523 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile @@ -1,5 +1,5 @@ # -# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. +# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or @@ -17,23 +17,27 @@ # Linux KNET Callback module. # -ifdef KPMD +# Include PMD library by default +ifneq (0,$(KPMD)) -BCMPKTDIR = $(SDK)/bcmpkt -KPMDDIR = $(SDK)/linux/knetcb -SHRDIR = $(SDK)/shr +# Kernel module source directory +KMODDIR = $(CURDIR) -.PHONY: mklinks rmlinks - -knetcb: mklinks - $(MAKE) all +# Avoid creating links in original kernel module source directory +GENDIR = $(KMODDIR)/generated +ifneq ($(OUTPUT_DIR),) +GENDIR = $(OUTPUT_DIR)/knet/generated/knetcb +endif +knetcb: kpmd + $(MAKE) -C $(GENDIR) all # SDK make helper for stand-alone PMD kernel module include $(SDK)/make/kpmd.mk -distclean:: rmlinks +distclean:: + rm -rf $(GENDIR) -endif #KPMD +endif # KPMD include Kbuild diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c index 0cfe939ac5fc..704a3072a312 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c +++ b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c @@ -9,7 +9,6 @@ #include #include -#include "psample-cb.h" #include "bcmcnet/bcmcnet_core.h" /*! \cond */ MODULE_AUTHOR("Broadcom Corporation"); @@ -97,6 +96,14 @@ dev_id_get(char* dev_type) { dev_id = 0xb993; } + else if (0== strcmp(dev_type, "bcm78900_b0")) + { + dev_id = 0xf900; + } + else if (0== strcmp(dev_type, "bcm78905_a0")) + { + dev_id = 0xf905; + } return dev_id; } @@ -134,7 +141,8 @@ get_tag_status(char* dev_type, char* dev_var, void *meta) match_id_minbit = (dev_id == 0xb780) ? 2 : 1; outer_l2_hdr = (valptr[fd_index] >> match_id_minbit & 0xFF); outer_tag_match = (((dev_id == 0xb780) && - ((strncmp(dev_var, "DNA_", 4)) == 0)) ? 0x8 : 0x10); + (((strncmp(dev_var, "DNA_", 4)) == 0)|| + ((strncmp(dev_var, "HNA_", 4)) == 0))) ? 0x8 : 0x10); if (outer_l2_hdr & 0x1) { #ifdef KNET_CB_DEBUG if (debug & 0x1) { @@ -177,7 +185,8 @@ get_tag_status(char* dev_type, char* dev_var, void *meta) } } else if ((dev_id == 0xb990)|| (dev_id == 0xb996) || - (dev_id == 0xb999)|| (dev_id == 0xb993)) + (dev_id == 0xb999)|| (dev_id == 0xb993) || + (dev_id == 0xf900)|| (dev_id == 0xf905)) { fd_index = 9; valptr = (uint32_t *)meta; @@ -186,8 +195,14 @@ get_tag_status(char* dev_type, char* dev_var, void *meta) * says there's a tag, then we don't want to strip. * Otherwise, we do. */ - outer_l2_hdr = (valptr[fd_index] >> 13) & 3; - + if ((dev_id == 0xf900) || (dev_id == 0xf905)) + { + outer_l2_hdr = (valptr[fd_index]) & 1; + } + else + { + outer_l2_hdr = (valptr[fd_index] >> 13) & 3; + } if (outer_l2_hdr) { tag_status = 2; @@ -351,12 +366,9 @@ strip_tag_tx_cb(struct sk_buff *skb) } static struct sk_buff * -ngknet_rx_cb(struct net_device *dev, struct sk_buff *skb) +ngknet_rx_cb(struct sk_buff *skb) { skb = strip_tag_rx_cb(skb); -#ifdef PSAMPLE_SUPPORT - skb = psample_rx_cb(dev, skb); -#endif return skb; } @@ -367,26 +379,6 @@ ngknet_tx_cb(struct sk_buff *skb) return skb; } -static int -ngknet_netif_create_cb(struct net_device *dev) -{ - int retv = 0; -#ifdef PSAMPLE_SUPPORT - retv = psample_netif_create_cb(dev); -#endif - return retv; -} - -static int -ngknet_netif_destroy_cb(struct net_device *dev) -{ - int retv = 0; -#ifdef PSAMPLE_SUPPORT - retv = psample_netif_destroy_cb(dev); -#endif - return retv; -} - /*! * Generic module functions */ @@ -480,25 +472,12 @@ ngknetcb_init_module(void) ngknet_rx_cb_register(ngknet_rx_cb); ngknet_tx_cb_register(ngknet_tx_cb); -#ifdef PSAMPLE_SUPPORT - psample_init(); -#endif - - ngknet_netif_create_cb_register(ngknet_netif_create_cb); - ngknet_netif_destroy_cb_register(ngknet_netif_destroy_cb); return 0; } static void __exit ngknetcb_exit_module(void) { - ngknet_netif_create_cb_unregister(ngknet_netif_create_cb); - ngknet_netif_destroy_cb_unregister(ngknet_netif_destroy_cb); - -#ifdef PSAMPLE_SUPPORT - psample_cleanup(); -#endif - ngknet_rx_cb_unregister(ngknet_rx_cb); ngknet_tx_cb_unregister(ngknet_tx_cb); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.c b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.c deleted file mode 100755 index bdd116434611..000000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.c +++ /dev/null @@ -1,974 +0,0 @@ -/* - * Copyright 2017-2022 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - */ -/* - * $Id: psample_cb.c $ - * $Copyright: (c) 2019 Broadcom Corp. - * All Rights Reserved.$ - */ - -/* - * Driver for call-back functions for Linux KNET driver. - * - * This code is used to integrate packet sampling KNET callback to - * the psample infra for sending sampled pkts to userspace sflow - * applications such as Host Sflow (https://github.com/sflow/host-sflow) - * using genetlink interfaces. - * - * The module can be built from the standard Linux user mode target - * directories using the following command (assuming bash), e.g. - * - * cd $SDK/systems/linux/user/ - * make BUILD_KNET_CB=1 - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include "psample-cb.h" -#include "ngknet_main.h" - -#define PSAMPLE_CB_DBG -#ifdef PSAMPLE_CB_DBG -extern int debug; -#define PSAMPLE_CB_DBG_LVL_VERB (0x1) -#define PSAMPLE_CB_DBG_LVL_PMD (0x2) -#define PSAMPLE_CB_DBG_PRINT(...) if (debug & PSAMPLE_CB_DBG_LVL_VERB) { printk(__VA_ARGS__); } -#define PSAMPLE_CB_PMD_PRINT(...) if (debug & PSAMPLE_CB_DBG_LVL_PMD) { printk(__VA_ARGS__); } -#else -#define PSAMPLE_CB_DBG_PRINT(...) -#define PSAMPLE_CB_PMD_PRINT(...) -#endif - -#define FCS_SZ 4 -#define PSAMPLE_NLA_PADDING 4 -#define PSAMPLE_PKT_HANDLED (1) - -#define PSAMPLE_RATE_DFLT 1 -#define PSAMPLE_SIZE_DFLT 128 -static int psample_size = PSAMPLE_SIZE_DFLT; -module_param(psample_size, int, 0); -MODULE_PARM_DESC(psample_size, -"psample pkt size (default 128 bytes)"); - -#define PSAMPLE_QLEN_DFLT 1024 -static int psample_qlen = PSAMPLE_QLEN_DFLT; -module_param(psample_qlen, int, 0); -MODULE_PARM_DESC(psample_qlen, -"psample queue length (default 1024 buffers)"); - -#if !IS_ENABLED(CONFIG_PSAMPLE) -inline struct -psample_group *psample_group_get(struct net *net, u32 group_num) -{ - return NULL; -} -#endif - -/* driver proc entry root */ -static struct proc_dir_entry *psample_proc_root = NULL; -static struct proc_dir_entry *knet_cb_proc_root = NULL; - -/* psample general info */ -typedef struct { - struct list_head netif_list; - int netif_count; - struct net *netns; - spinlock_t lock; - int dcb_type; -} psample_info_t; -static psample_info_t g_psample_info = {0}; - -/* Maintain sampled pkt statistics */ -typedef struct psample_stats_s { - unsigned long pkts_f_psample_cb; - unsigned long pkts_f_psample_mod; - unsigned long pkts_f_handled; - unsigned long pkts_f_pass_through; - unsigned long pkts_f_dst_mc; - unsigned long pkts_c_qlen_cur; - unsigned long pkts_c_qlen_hi; - unsigned long pkts_d_qlen_max; - unsigned long pkts_d_no_mem; - unsigned long pkts_d_no_group; - unsigned long pkts_d_sampling_disabled; - unsigned long pkts_d_not_ready; - unsigned long pkts_d_metadata; - unsigned long pkts_d_skb; - unsigned long pkts_d_skb_cbd; - unsigned long pkts_d_meta_srcport; - unsigned long pkts_d_meta_dstport; - unsigned long pkts_d_invalid_size; -} psample_stats_t; -static psample_stats_t g_psample_stats = {0}; - -typedef struct psample_meta_s { - int trunc_size; - int src_ifindex; - int dst_ifindex; - int sample_rate; -} psample_meta_t; - -typedef struct psample_pkt_s { - struct list_head list; - struct psample_group *group; - psample_meta_t meta; - struct sk_buff *skb; -} psample_pkt_t; - -typedef struct psample_work_s { - struct list_head pkt_list; - struct work_struct wq; - spinlock_t lock; -} psample_work_t; -static psample_work_t g_psample_work = {0}; - -static psample_netif_t* -psample_netif_lookup_by_ifindex(int ifindex) -{ - struct list_head *list; - psample_netif_t *psample_netif = NULL; - unsigned long flags; - - /* look for port from list of available net_devices */ - spin_lock_irqsave(&g_psample_info.lock, flags); - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (psample_netif->dev->ifindex == ifindex) { - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return psample_netif; - } - } - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return (NULL); -} - -static psample_netif_t* -psample_netif_lookup_by_port(int port) __attribute__ ((unused)); -static psample_netif_t* -psample_netif_lookup_by_port(int port) -{ - struct list_head *list; - psample_netif_t *psample_netif = NULL; - unsigned long flags; - - /* look for port from list of available net_devices */ - spin_lock_irqsave(&g_psample_info.lock, flags); - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (psample_netif->port == port) { - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return psample_netif; - } - } - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return (NULL); -} - -static int -psample_meta_get(struct sk_buff *skb, psample_meta_t *sflow_meta) -{ - int src_ifindex = 0; - int sample_rate = 1; - int sample_size = PSAMPLE_SIZE_DFLT; - psample_netif_t *psample_netif = NULL; - const struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb); - ngknet_netif_t *netif = cbd->netif; - memset(sflow_meta, 0, sizeof(psample_meta_t)); - - /* find src port */ - if ((psample_netif = psample_netif_lookup_by_ifindex(netif->id))) { - src_ifindex = psample_netif->dev->ifindex; - sample_rate = psample_netif->sample_rate; - sample_size = psample_netif->sample_size; - } else { - g_psample_stats.pkts_d_meta_srcport++; - PSAMPLE_CB_DBG_PRINT("%s: could not find psample netif for src dev %s (ifidx %d)\n", - __func__, netif->name, netif->id); - } - - sflow_meta->src_ifindex = src_ifindex; - sflow_meta->trunc_size = sample_size; - sflow_meta->sample_rate = sample_rate; - return (0); -} - -static void -psample_task(struct work_struct *work) -{ - psample_work_t *psample_work = container_of(work, psample_work_t, wq); - unsigned long flags; - struct list_head *list_ptr, *list_next; - psample_pkt_t *pkt; - - spin_lock_irqsave(&psample_work->lock, flags); - list_for_each_safe(list_ptr, list_next, &psample_work->pkt_list) { - /* dequeue pkt from list */ - pkt = list_entry(list_ptr, psample_pkt_t, list); - list_del(list_ptr); - g_psample_stats.pkts_c_qlen_cur--; - spin_unlock_irqrestore(&psample_work->lock, flags); - - /* send to psample */ - if (pkt) { -#if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \ - (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR)) - struct psample_metadata md = {0}; - md.trunc_size = pkt->meta.trunc_size; - md.in_ifindex = pkt->meta.src_ifindex; - md.out_ifindex = pkt->meta.dst_ifindex; -#endif - PSAMPLE_CB_DBG_PRINT("%s: group 0x%x, trunc_size %d, src_ifdx 0x%x, dst_ifdx 0x%x, sample_rate %d\n", - __func__, pkt->group->group_num, - pkt->meta.trunc_size, pkt->meta.src_ifindex, - pkt->meta.dst_ifindex, pkt->meta.sample_rate); - -#if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \ - (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR)) - psample_sample_packet(pkt->group, - pkt->skb, - pkt->meta.sample_rate, - &md); -#else - psample_sample_packet(pkt->group, - pkt->skb, - pkt->meta.trunc_size, - pkt->meta.src_ifindex, - pkt->meta.dst_ifindex, - pkt->meta.sample_rate); -#endif - g_psample_stats.pkts_f_psample_mod++; - - dev_kfree_skb_any(pkt->skb); - kfree(pkt); - } - spin_lock_irqsave(&psample_work->lock, flags); - } - spin_unlock_irqrestore(&psample_work->lock, flags); -} - -struct sk_buff* -psample_rx_cb(struct net_device *dev, struct sk_buff *skb) -{ - struct psample_group *group; - psample_meta_t meta; - int rv = 0, size; - const struct ngknet_callback_desc *cbd = NULL; - const struct ngknet_private *netif = NULL; - const struct ngknet_filter_s *filt = NULL; - const struct ngknet_filter_s *filt_src = NULL; - - if (!skb) { - printk("%s: skb is NULL\n", __func__); - g_psample_stats.pkts_d_skb++; - return (NULL); - } - cbd = NGKNET_SKB_CB(skb); - netif = netdev_priv(dev); - filt_src = cbd->filt; - filt = netif->filt_cb; - - if (!cbd || !netif || !filt_src) { - printk("%s: cbd(0x%p) or priv(0x%p) or filter src(0x%p) is NULL\n", - __func__, cbd, netif, filt_src); - g_psample_stats.pkts_d_skb_cbd++; - return (skb); - } - - /* Enable PMD output in dmesg: "echo "debug=0x2" > /proc/bcm/knet-cb/psample/debug" - * Use bshell cmd "pmddecode rxpmd ..." to decode pkt metadata - */ - if (debug & PSAMPLE_CB_DBG_LVL_PMD) { - char str[128]; - int i, len = cbd->pmd_len > 128? 128 : cbd->pmd_len; - PSAMPLE_CB_PMD_PRINT("PMD (%d bytes): %s\n", - cbd->pmd_len, skb->dev->name); - for (i=0; ipmd+i))); - if ((i & 0x1c) == 0x1c) { - sprintf(&str[strlen(str)], "\n"); - printk(str); - continue; - } - } - if ((i & 0x1f) != 0) { - sprintf(&str[strlen(str)], "\n"); - PSAMPLE_CB_PMD_PRINT(str); - } - } - - /* check if this packet is sampled packet (from sample filter) */ - if (!filt || - (NGKNET_FILTER_DEST_T_CB != filt->dest_type) || - (strncmp(filt->desc, PSAMPLE_CB_NAME, NGKNET_FILTER_DESC_MAX) != 0)) { - return (skb); - } - - PSAMPLE_CB_DBG_PRINT("%s: src dev %s, pkt size %d, filt->dest_id %d\n", - __func__, skb->dev->name, cbd->pkt_len, filt->dest_id); - g_psample_stats.pkts_f_psample_cb++; - - /* get psample group info. psample genetlink group ID passed in filt->dest_id */ - group = psample_group_get(g_psample_info.netns, filt->dest_id); - if (!group) { - printk("%s: Could not find psample genetlink group %d\n", __func__, filt->dest_id); - g_psample_stats.pkts_d_no_group++; - goto PSAMPLE_FILTER_CB_PKT_HANDLED; - } - - /* get psample metadata */ - rv = psample_meta_get(skb, &meta); - if (rv < 0) { - printk("%s: Could not parse pkt metadata\n", __func__); - g_psample_stats.pkts_d_metadata++; - goto PSAMPLE_FILTER_CB_PKT_HANDLED; - } - - /* Adjust original pkt size to remove 4B FCS */ - size = cbd->pkt_len; - if (size < FCS_SZ) { - g_psample_stats.pkts_d_invalid_size++; - goto PSAMPLE_FILTER_CB_PKT_HANDLED; - } else { - size -= FCS_SZ; - } - - /* Account for padding in libnl used by psample */ - if (meta.trunc_size >= size) { - meta.trunc_size = size - PSAMPLE_NLA_PADDING; - } - - PSAMPLE_CB_DBG_PRINT("%s: group 0x%x, trunc_size %d, src_ifdx 0x%x, dst_ifdx 0x%x, sample_rate %d\n", - __func__, group->group_num, meta.trunc_size, meta.src_ifindex, meta.dst_ifindex, meta.sample_rate); - - /* drop if configured sample rate is 0 */ - if (meta.sample_rate > 0) { - unsigned long flags; - psample_pkt_t *psample_pkt; - struct sk_buff *skb_psample; - - if (g_psample_stats.pkts_c_qlen_cur >= psample_qlen) { - printk("%s: tail drop due to max qlen %d reached\n", __func__, psample_qlen); - g_psample_stats.pkts_d_qlen_max++; - goto PSAMPLE_FILTER_CB_PKT_HANDLED; - } - - if ((psample_pkt = kmalloc(sizeof(psample_pkt_t), GFP_ATOMIC)) == NULL) { - printk("%s: failed to alloc psample mem for pkt\n", __func__); - g_psample_stats.pkts_d_no_mem++; - goto PSAMPLE_FILTER_CB_PKT_HANDLED; - } - memcpy(&psample_pkt->meta, &meta, sizeof(psample_meta_t)); - psample_pkt->group = group; - - if ((skb_psample = dev_alloc_skb(meta.trunc_size)) == NULL) { - printk("%s: failed to alloc psample mem for pkt skb\n", __func__); - g_psample_stats.pkts_d_no_mem++; - goto PSAMPLE_FILTER_CB_PKT_HANDLED; - } - - /* setup skb to point to pkt */ - memcpy(skb_psample->data, skb->data, meta.trunc_size); - skb_put(skb_psample, meta.trunc_size); - skb_psample->len = meta.trunc_size; - psample_pkt->skb = skb_psample; - - spin_lock_irqsave(&g_psample_work.lock, flags); - list_add_tail(&psample_pkt->list, &g_psample_work.pkt_list); - - g_psample_stats.pkts_c_qlen_cur++; - if (g_psample_stats.pkts_c_qlen_cur > g_psample_stats.pkts_c_qlen_hi) { - g_psample_stats.pkts_c_qlen_hi = g_psample_stats.pkts_c_qlen_cur; - } - - schedule_work(&g_psample_work.wq); - spin_unlock_irqrestore(&g_psample_work.lock, flags); - } else { - g_psample_stats.pkts_d_sampling_disabled++; - } - -PSAMPLE_FILTER_CB_PKT_HANDLED: - g_psample_stats.pkts_f_pass_through++; - return skb; -} - -int -psample_netif_create_cb(struct net_device *dev) -{ - int found; - struct list_head *list; - psample_netif_t *psample_netif, *lpsample_netif; - unsigned long flags; - struct ngknet_private *netif = NULL; - - if (!dev) { - printk("%s: net_device is NULL\n", __func__); - return (-1); - } - netif = netdev_priv(dev); - - if ((psample_netif = kmalloc(sizeof(psample_netif_t), GFP_ATOMIC)) == NULL) { - printk("%s: failed to alloc psample mem for netif '%s'\n", - __func__, dev->name); - return (-1); - } - - spin_lock_irqsave(&g_psample_info.lock, flags); - - psample_netif->dev = dev; - psample_netif->id = netif->netif.id; - /*Application has encoded the port in netif user data 0 & 1 */ - if (netif->netif.type == NGKNET_NETIF_T_PORT) - { - psample_netif->port = netif->netif.user_data[0]; - psample_netif->port |= netif->netif.user_data[1] << 8; - } - psample_netif->vlan = netif->netif.vlan; - psample_netif->sample_rate = PSAMPLE_RATE_DFLT; - psample_netif->sample_size = PSAMPLE_SIZE_DFLT; - printk("\r\n Type %d vlan %d", netif->netif.type, psample_netif->vlan); - /* insert netif sorted by ID similar to bkn_knet_netif_create() */ - found = 0; - list_for_each(list, &g_psample_info.netif_list) { - lpsample_netif = (psample_netif_t*)list; - if (netif->netif.id < lpsample_netif->id) { - found = 1; - g_psample_info.netif_count++; - break; - } - } - - if (found) { - /* Replace previously removed interface */ - list_add_tail(&psample_netif->list, &lpsample_netif->list); - } else { - /* No holes - add to end of list */ - list_add_tail(&psample_netif->list, &g_psample_info.netif_list); - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - - PSAMPLE_CB_DBG_PRINT("%s: added psample netif '%s'\n", __func__, dev->name); - return (0); -} - -int -psample_netif_destroy_cb(struct net_device *dev) -{ - int found; - struct list_head *list; - psample_netif_t *psample_netif; - unsigned long flags; - struct ngknet_private *netif = NULL; - - if (!dev) { - printk("%s: net_device is NULL\n", __func__); - return (-1); - } - netif = netdev_priv(dev); - - spin_lock_irqsave(&g_psample_info.lock, flags); - - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (netif->netif.id == psample_netif->id) { - found = 1; - list_del(&psample_netif->list); - PSAMPLE_CB_DBG_PRINT("%s: removing psample netif '%s'\n", __func__, dev->name); - kfree(psample_netif); - g_psample_info.netif_count--; - break; - } - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - - if (!found) { - return (-1); - } - return (0); -} - -/* - * psample rate Proc Read Entry - */ -static int -psample_proc_rate_show(struct seq_file *m, void *v) -{ - struct list_head *list; - psample_netif_t *psample_netif; - unsigned long flags; - - spin_lock_irqsave(&g_psample_info.lock, flags); - - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - seq_printf(m, " %-14s %d\n", psample_netif->dev->name, psample_netif->sample_rate); - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - - return 0; -} - -static int -psample_proc_rate_open(struct inode * inode, struct file * file) -{ - return single_open(file, psample_proc_rate_show, NULL); -} - -/* - * psample rate Proc Write Entry - * - * Syntax: - * = - * - * Where is a virtual network interface name. - * - * Examples: - * eth4=1000 - */ -static ssize_t -psample_proc_rate_write(struct file *file, const char *buf, - size_t count, loff_t *loff) -{ - int found; - struct list_head *list; - psample_netif_t *psample_netif; - char sample_str[40], *ptr, *newline; - unsigned long flags; - - - if (count > sizeof(sample_str)) { - count = sizeof(sample_str) - 1; - sample_str[count] = '\0'; - } - if (copy_from_user(sample_str, buf, count)) { - return -EFAULT; - } - sample_str[count] = 0; - newline = strchr(sample_str, '\n'); - if (newline) { - /* Chop off the trailing newline */ - *newline = '\0'; - } - - if ((ptr = strchr(sample_str, '=')) == NULL && - (ptr = strchr(sample_str, ':')) == NULL) { - printk("Error: Pkt sample rate syntax not recognized: '%s'\n", sample_str); - return count; - } - *ptr++ = 0; - - spin_lock_irqsave(&g_psample_info.lock, flags); - - found = 0; - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (strcmp(psample_netif->dev->name, sample_str) == 0) { - psample_netif->sample_rate = simple_strtol(ptr, NULL, 10); - // TODO MLI@BRCM - check valid sample rate - found = 1; - break; - } - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - - if (!found) { - printk("Warning: Failed setting psample rate on unknown network interface: '%s'\n", sample_str); - } - return count; -} - -struct proc_ops psample_proc_rate_file_ops = { - PROC_OWNER(THIS_MODULE) - .proc_open = psample_proc_rate_open, - .proc_read = seq_read, - .proc_lseek = seq_lseek, - .proc_write = psample_proc_rate_write, - .proc_release = single_release, -}; - -/* - * psample size Proc Read Entry - */ -static int -psample_proc_size_show(struct seq_file *m, void *v) -{ - struct list_head *list; - psample_netif_t *psample_netif; - unsigned long flags; - - spin_lock_irqsave(&g_psample_info.lock, flags); - - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - seq_printf(m, " %-14s %d\n", psample_netif->dev->name, psample_netif->sample_size); - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return 0; -} - -static int -psample_proc_size_open(struct inode * inode, struct file * file) -{ - return single_open(file, psample_proc_size_show, NULL); -} - -/* - * psample size Proc Write Entry - * - * Syntax: - * = - * - * Where is a virtual network interface name. - * - * Examples: - * eth4=128 - */ -static ssize_t -psample_proc_size_write(struct file *file, const char *buf, - size_t count, loff_t *loff) -{ - int found; - struct list_head *list; - psample_netif_t *psample_netif; - char sample_str[40], *ptr, *newline; - unsigned long flags; - - if (count > sizeof(sample_str)) { - count = sizeof(sample_str) - 1; - sample_str[count] = '\0'; - } - if (copy_from_user(sample_str, buf, count)) { - return -EFAULT; - } - sample_str[count] = 0; - newline = strchr(sample_str, '\n'); - if (newline) { - /* Chop off the trailing newline */ - *newline = '\0'; - } - - if ((ptr = strchr(sample_str, '=')) == NULL && - (ptr = strchr(sample_str, ':')) == NULL) { - printk("Error: Pkt sample size syntax not recognized: '%s'\n", sample_str); - return count; - } - *ptr++ = 0; - - spin_lock_irqsave(&g_psample_info.lock, flags); - - found = 0; - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (strcmp(psample_netif->dev->name, sample_str) == 0) { - psample_netif->sample_size = simple_strtol(ptr, NULL, 10); - // TODO MLI@BRCM - check valid sample size - found = 1; - break; - } - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - - if (!found) { - printk("Warning: Failed setting psample size on unknown network interface: '%s'\n", sample_str); - } - return count; -} - -struct proc_ops psample_proc_size_file_ops = { - PROC_OWNER(THIS_MODULE) - .proc_open = psample_proc_size_open, - .proc_read = seq_read, - .proc_lseek = seq_lseek, - .proc_write = psample_proc_size_write, - .proc_release = single_release, -}; - -/* - * psample map Proc Read Entry - */ -static int -psample_proc_map_show(struct seq_file *m, void *v) -{ - struct list_head *list; - psample_netif_t *psample_netif; - unsigned long flags; - - seq_printf(m, " Interface logical port ifindex\n"); - seq_printf(m, "------------- ------------ -------\n"); - spin_lock_irqsave(&g_psample_info.lock, flags); - - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - seq_printf(m, " %-14s %-14d %d\n", - psample_netif->dev->name, - psample_netif->port, - psample_netif->dev->ifindex); - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return 0; -} - -static int -psample_proc_map_open(struct inode * inode, struct file * file) -{ - return single_open(file, psample_proc_map_show, NULL); -} - -struct proc_ops psample_proc_map_file_ops = { - PROC_OWNER(THIS_MODULE) - .proc_open = psample_proc_map_open, - .proc_read = seq_read, - .proc_lseek = seq_lseek, - .proc_write = NULL, - .proc_release = single_release, -}; - -/* - * psample debug Proc Read Entry - */ -static int -psample_proc_debug_show(struct seq_file *m, void *v) -{ - seq_printf(m, "BCM KNET %s Callback Config\n", PSAMPLE_CB_NAME); - seq_printf(m, " debug: 0x%x\n", debug); - seq_printf(m, " dcb_type: %d\n", g_psample_info.dcb_type); - seq_printf(m, " netif_count: %d\n", g_psample_info.netif_count); - seq_printf(m, " queue length: %d\n", psample_qlen); - - return 0; -} - -static int -psample_proc_debug_open(struct inode * inode, struct file * file) -{ - return single_open(file, psample_proc_debug_show, NULL); -} - -/* - * psample debug Proc Write Entry - * - * Syntax: - * debug= - * - * Where corresponds to the debug module parameter. - * - * Examples: - * debug=0x1 - */ -static ssize_t -psample_proc_debug_write(struct file *file, const char *buf, - size_t count, loff_t *loff) -{ - char debug_str[40]; - char *ptr; - - if (count > sizeof(debug_str)) { - count = sizeof(debug_str) - 1; - debug_str[count] = '\0'; - } - if (copy_from_user(debug_str, buf, count)) { - return -EFAULT; - } - - if ((ptr = strstr(debug_str, "debug=")) != NULL) { - ptr += 6; - debug = simple_strtol(ptr, NULL, 0); - } else { - printk("Warning: unknown configuration setting\n"); - } - - return count; -} - -struct proc_ops psample_proc_debug_file_ops = { - PROC_OWNER(THIS_MODULE) - .proc_open = psample_proc_debug_open, - .proc_read = seq_read, - .proc_lseek = seq_lseek, - .proc_write = psample_proc_debug_write, - .proc_release = single_release, -}; - -static int -psample_proc_stats_show(struct seq_file *m, void *v) -{ - seq_printf(m, "BCM KNET %s Callback Stats\n", PSAMPLE_CB_NAME); - seq_printf(m, " DCB type %d\n", g_psample_info.dcb_type); - seq_printf(m, " pkts filter psample cb %10lu\n", g_psample_stats.pkts_f_psample_cb); - seq_printf(m, " pkts sent to psample module %10lu\n", g_psample_stats.pkts_f_psample_mod); - seq_printf(m, " pkts handled by psample %10lu\n", g_psample_stats.pkts_f_handled); - seq_printf(m, " pkts pass through %10lu\n", g_psample_stats.pkts_f_pass_through); - seq_printf(m, " pkts with mc destination %10lu\n", g_psample_stats.pkts_f_dst_mc); - seq_printf(m, " pkts current queue length %10lu\n", g_psample_stats.pkts_c_qlen_cur); - seq_printf(m, " pkts high queue length %10lu\n", g_psample_stats.pkts_c_qlen_hi); - seq_printf(m, " pkts drop max queue length %10lu\n", g_psample_stats.pkts_d_qlen_max); - seq_printf(m, " pkts drop no memory %10lu\n", g_psample_stats.pkts_d_no_mem); - seq_printf(m, " pkts drop no psample group %10lu\n", g_psample_stats.pkts_d_no_group); - seq_printf(m, " pkts drop sampling disabled %10lu\n", g_psample_stats.pkts_d_sampling_disabled); - seq_printf(m, " pkts drop psample not ready %10lu\n", g_psample_stats.pkts_d_not_ready); - seq_printf(m, " pkts drop metadata parse error %10lu\n", g_psample_stats.pkts_d_metadata); - seq_printf(m, " pkts drop skb error %10lu\n", g_psample_stats.pkts_d_skb); - seq_printf(m, " pkts drop skb cbd error %10lu\n", g_psample_stats.pkts_d_skb_cbd); - seq_printf(m, " pkts with invalid src port %10lu\n", g_psample_stats.pkts_d_meta_srcport); - seq_printf(m, " pkts with invalid dst port %10lu\n", g_psample_stats.pkts_d_meta_dstport); - seq_printf(m, " pkts with invalid orig pkt sz %10lu\n", g_psample_stats.pkts_d_invalid_size); - return 0; -} - -static int -psample_proc_stats_open(struct inode * inode, struct file * file) -{ - return single_open(file, psample_proc_stats_show, NULL); -} - -/* - * psample stats Proc Write Entry - * - * Syntax: - * write any value to clear stats - */ -static ssize_t -psample_proc_stats_write(struct file *file, const char *buf, - size_t count, loff_t *loff) -{ - int qlen_cur = 0; - unsigned long flags; - - spin_lock_irqsave(&g_psample_work.lock, flags); - qlen_cur = g_psample_stats.pkts_c_qlen_cur; - memset(&g_psample_stats, 0, sizeof(psample_stats_t)); - g_psample_stats.pkts_c_qlen_cur = qlen_cur; - spin_unlock_irqrestore(&g_psample_work.lock, flags); - - return count; -} -struct proc_ops psample_proc_stats_file_ops = { - PROC_OWNER(THIS_MODULE) - .proc_open = psample_proc_stats_open, - .proc_read = seq_read, - .proc_lseek = seq_lseek, - .proc_write = psample_proc_stats_write, - .proc_release = single_release, -}; - -int psample_cleanup(void) -{ - cancel_work_sync(&g_psample_work.wq); - remove_proc_entry("stats", psample_proc_root); - remove_proc_entry("rate", psample_proc_root); - remove_proc_entry("size", psample_proc_root); - remove_proc_entry("debug", psample_proc_root); - remove_proc_entry("map" , psample_proc_root); - remove_proc_entry("psample", knet_cb_proc_root); - remove_proc_entry("bcm/knet-cb", NULL); - remove_proc_entry("bcm", NULL); - return 0; -} - -int psample_init(void) -{ - #define PROCFS_MAX_PATH 1024 - char psample_procfs_path[PROCFS_MAX_PATH]; - struct proc_dir_entry *entry; - - /* initialize proc files (for ngknet) */ - proc_mkdir("bcm", NULL); - - /* create procfs for psample */ - snprintf(psample_procfs_path, PROCFS_MAX_PATH, "bcm/knet-cb"); - knet_cb_proc_root = proc_mkdir(psample_procfs_path, NULL); - snprintf(psample_procfs_path, PROCFS_MAX_PATH, "%s/%s", psample_procfs_path, PSAMPLE_CB_NAME); - psample_proc_root = proc_mkdir(psample_procfs_path, NULL); - - /* create procfs for psample stats */ - PROC_CREATE(entry, "stats", 0666, psample_proc_root, &psample_proc_stats_file_ops); - if (entry == NULL) { - printk("%s: Unable to create procfs entry '/procfs/%s/stats'\n", __func__, psample_procfs_path); - return -1; - } - - /* create procfs for setting sample rates */ - PROC_CREATE(entry, "rate", 0666, psample_proc_root, &psample_proc_rate_file_ops); - if (entry == NULL) { - printk("%s: Unable to create procfs entry '/procfs/%s/rate'\n", __func__, psample_procfs_path); - return -1; - } - - /* create procfs for setting sample size */ - PROC_CREATE(entry, "size", 0666, psample_proc_root, &psample_proc_size_file_ops); - if (entry == NULL) { - printk("%s: Unable to create procfs entry '/procfs/%s/size'\n", __func__, psample_procfs_path); - return -1; - } - - /* create procfs for getting netdev mapping */ - PROC_CREATE(entry, "map", 0666, psample_proc_root, &psample_proc_map_file_ops); - if (entry == NULL) { - printk("%s: Unable to create procfs entry '/procfs/%s/map'\n", __func__, psample_procfs_path); - return -1; - } - - /* create procfs for debug log */ - PROC_CREATE(entry, "debug", 0666, psample_proc_root, &psample_proc_debug_file_ops); - if (entry == NULL) { - printk("%s: Unable to create procfs entry '/procfs/%s/debug'\n", __func__, psample_procfs_path); - return -1; - } - - /* clear data structs */ - memset(&g_psample_stats, 0, sizeof(psample_stats_t)); - memset(&g_psample_info, 0, sizeof(psample_info_t)); - memset(&g_psample_work, 0, sizeof(psample_work_t)); - - /* FIXME: How to get DCB type from NGKNET? */ - //g_psample_info.dcb_type - - /* setup psample_info struct */ - INIT_LIST_HEAD(&g_psample_info.netif_list); - spin_lock_init(&g_psample_info.lock); - - /* setup psample work queue */ - spin_lock_init(&g_psample_work.lock); - INIT_LIST_HEAD(&g_psample_work.pkt_list); - INIT_WORK(&g_psample_work.wq, psample_task); - - /* get net namespace */ - g_psample_info.netns = get_net_ns_by_pid(current->pid); - if (!g_psample_info.netns) { - printk("%s: Could not get network namespace for pid %d\n", __func__, current->pid); - return (-1); - } - PSAMPLE_CB_DBG_PRINT("%s: current->pid %d, netns 0x%p, sample_size %d\n", __func__, - current->pid, g_psample_info.netns, psample_size); - - - return 0; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.h b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.h deleted file mode 100755 index d89c5f4178bb..000000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Copyright 2022 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - */ -/* - * $Id: psample_cb.h $ - * $Copyright: (c) 2019 Broadcom Corp. - * All Rights Reserved.$ - */ -#ifndef __PSAMPLE_CB_H__ -#define __PSAMPLE_CB_H__ - -#include -#include - -//#define PSAMPLE_SUPPORT 1 // TODO: MLI@BRCM - Add this as part of conditional in Makefile -#define PSAMPLE_CB_NAME "psample" - -extern int -psample_init(void); - -extern int -psample_cleanup(void); - -extern struct sk_buff* -psample_rx_cb(struct net_device *dev, struct sk_buff *skb); - -/* psample data per interface */ -typedef struct { - struct list_head list; - struct net_device *dev; - uint16_t id; - uint16_t port; - uint16_t vlan; - uint16_t qnum; - uint32_t sample_rate; - uint32_t sample_size; -} psample_netif_t; - -extern int -psample_netif_create_cb(struct net_device *dev); - -extern int -psample_netif_destroy_cb(struct net_device *dev); - -#endif /* __PSAMPLE_CB_H__ */ diff --git a/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk b/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk new file mode 100644 index 000000000000..db21c5829d1f --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk @@ -0,0 +1,202 @@ +# +# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder.$ +# +# Helper makefile for building stand-alone PMD kernel module +# + +# SDK make utilities +include $(SDK)/make/makeutils.mk + +# SDK source directories +SHRDIR = $(SDK)/shr +BCMPKTDIR = $(SDK)/bcmpkt +BCMPKTIDIR = $(BCMPKTDIR)/include/bcmpkt + +# Create links locally if no GENDIR was specified +ifeq (,$(GENDIR)) +GENDIR = $(KMODDIR) +endif + +# +# Suppress symlink error messages. +# +# Note that we do not use "ln -f" as this may cause failures if +# multiple builds are done in parallel on the same source tree. +# +R = 2>/dev/null + +# Check for valid FLTG configuration by default +ifneq (0,$(KPMD_CONFIG_CHECK)) +KPMD_CONFIG := config +endif + +mklinks: $(KPMD_CONFIG) + mkdir -p $(GENDIR) + -ln -s $(BCMPKTDIR)/chip/*/*lbhdr.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/chip/*/*rxpmd.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/chip/*/*rxpmd_field.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/chip/*/*txpmd.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/lbpmd/bcmpkt_lbhdr.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/rxpmd/bcmpkt_rxpmd.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/rxpmd/bcmpkt_rxpmd_match_id.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/txpmd/bcmpkt_txpmd.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/flexhdr/bcmpkt_flexhdr.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/include/bcmpkt/bcmpkt_flexhdr_field.h $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/xfcr/*/*/*.c $(GENDIR) $(R) + -ln -s $(BCMPKTDIR)/ltt_stub/*/*/*/*.c $(GENDIR) $(R) + -ln -s $(SHRDIR)/bitop/shr_bitop_range_clear.c $(GENDIR) $(R) + -ln -s $(KMODDIR)/*.[ch] $(GENDIR) $(R) + -ln -s $(KMODDIR)/Makefile $(GENDIR) $(R) + -ln -s $(KMODDIR)/Kbuild $(GENDIR) $(R) + +rmlinks: + -rm -f $(KMODDIR)/bcm* + -rm -f $(KMODDIR)/shr* + +# FLTG tools directory (not present in GPL package) +FLTG_DIR := $(SDK)/tools/fltg + +# File indicating that the FLTG build is complete +FLTG_DONE := $(FLTG_DIR)/generated/ltt.sum + +# If not GPL, check that FLTG files have been generated +config: + if [ -d $(FLTG_DIR) ]; then \ + if [ ! -e $(FLTG_DONE) ]; then \ + echo 'kpmd.mk: Please run "make -C $$SDK config"' \ + 'before building the Linux PMD library'; \ + exit 1; \ + fi \ + fi + +kpmd: mklinks + +distclean:: rmlinks + +.PHONY: mklinks rmlinks config kpmd distclean + +ALL_CHIPS := $(subst $(BCMPKTDIR)/chip/,,$(wildcard $(BCMPKTDIR)/chip/bcm*)) +VAR_CHIPS := $(subst $(BCMPKTDIR)/xfcr/,,$(wildcard $(BCMPKTDIR)/xfcr/bcm*)) + +# If SDK_VARIANTS is defined but not SDK_CHIPS, find the chips for the +# specified variants and set SDK_CHIPS so the partial build can work correctly +ifdef SDK_VARIANTS +SDK_VARIANTS_SPC := $(call spc_sep,$(SDK_VARIANTS)) +SDK_VARIANTS_LC := $(call var_lc,$(SDK_VARIANTS_SPC)) +ifdef SDK_CHIPS +# Both SDK_CHIPS and SDK_VARIANTS +# Set PMD_CHIPS and VARIANT_DIRS +SDK_CHIPS_SPC := $(call spc_sep,$(SDK_CHIPS)) +SDK_CHIPS_LC := $(call var_lc,$(SDK_CHIPS_SPC)) +PMD_CHIPS := $(SDK_CHIPS_LC) +TMP_ALL_VAR_DIRS = $(foreach K, $(PMD_CHIPS),$(filter-out $(SDK_VARIANTS_LC),\ + $(shell find $(BCMPKTDIR)/xfcr/$K/* -type d))) +VARIANT_DIRS := $(foreach K, $(SDK_CHIPS_LC),$(foreach V, $(SDK_VARIANTS_LC),\ + $(findstring $(BCMPKTDIR)/xfcr/$K/$V,$(TMP_ALL_VAR_DIRS)))) +else +# SDK_VARIANTS only +# Set SDK_CHIPS, PMD_CHIPS and VARIANT_DIRS +TMP_ALL_VAR_DIRS = $(foreach K, $(ALL_CHIPS),$(filter-out $(SDK_VARIANTS_LC),\ + $(shell find $(BCMPKTDIR)/xfcr/$K/* -type d))) +VARIANT_DIRS := $(foreach K, $(ALL_CHIPS),$(foreach V, $(SDK_VARIANTS_LC),\ + $(findstring $(BCMPKTDIR)/xfcr/$K/$V,$(TMP_ALL_VAR_DIRS)))) +TMP_VARIANTS = $(foreach D, $(VARIANT_DIRS),$(lastword $(subst /, ,$D))) +SDK_CHIPS_SPC := $(foreach D, $(VARIANT_DIRS),$(lastword $(filter-out \ + $(lastword $(subst /, ,$D)),$(subst /, ,$D)))) +SDK_CHIPS_LC := $(call var_lc,$(SDK_CHIPS_SPC)) +SDK_CHIPS := $(SDK_CHIPS_LC) +PMD_CHIPS := $(SDK_CHIPS) +endif +else +# If SDK_VARIANTS is not defined but SDK_CHIPS is defined, we want all variants +# for the chips so set SDK_VARIANTS for the partial build to work correctly +ifdef SDK_CHIPS +# SDK_CHIPS only +# Set SDK_VARIANTS, PMD_CHIPS and VARIANT_DIRS +SDK_CHIPS_SPC := $(call spc_sep,$(SDK_CHIPS)) +SDK_CHIPS_LC := $(call var_lc,$(SDK_CHIPS_SPC)) +VARIANT_DIRS := $(foreach K, $(SDK_CHIPS),\ + $(shell find $(BCMPKTDIR)/xfcr/$K/* -type d)) +SDK_VARIANTS_SPC := $(foreach D, $(VARIANT_DIRS),$(lastword $(subst /, ,$D))) +SDK_VARIANTS_LC := $(call var_lc,$(SDK_VARIANTS_SPC)) +SDK_VARIANTS := $(SDK_VARIANTS_LC) +PMD_CHIPS := $(SDK_CHIPS_LC) +else +# Neither SDK_VARIANTS or SDK_CHIPS +# Set PMD_CHIPS and VARIANT_DIRS +PMD_CHIPS := $(ALL_CHIPS) +VARIANT_DIRS := $(foreach K, $(filter $(VAR_CHIPS),$(PMD_CHIPS)),\ + $(shell find $(BCMPKTDIR)/xfcr/$K/* -type d)) +endif +endif + +# Set options for partial build support +include $(SDK)/make/partial.mk + +ifdef SDK_CHIPS +KNETCB_CPPFLAGS := $(SDK_CPPFLAGS) +endif + +ifdef SDK_VARIANTS +override KNETCB_CPPFLAGS := $(SDK_CPPFLAGS) +endif + +KNETCB_CPPFLAGS += -DKPMD +export KNETCB_CPPFLAGS + +PMD_FLEX_CHIPS := $(filter $(PMD_CHIPS),$(sort $(foreach D, $(VARIANT_DIRS), \ + $(lastword $(filter-out $(lastword $(subst /, ,$D)),$(subst /, ,$D)))))) + +CHIP_SRCS := $(addsuffix _pkt_lbhdr.c,$(PMD_CHIPS)) +CHIP_SRCS += $(addsuffix _pkt_rxpmd.c,$(PMD_CHIPS)) +ifneq (,$(PMD_FLEX_CHIPS)) +CHIP_SRCS += $(addsuffix _pkt_rxpmd_field.c,$(PMD_FLEX_CHIPS)) +endif +CHIP_SRCS += $(addsuffix _pkt_txpmd.c,$(PMD_CHIPS)) + +VARIANTS := $(subst /,_, $(subst $(BCMPKTDIR)/xfcr/,,$(sort $(VARIANT_DIRS)))) +CHIP_SRCS += $(addsuffix _pkt_flexhdr.c,$(VARIANTS)) +CHIP_SRCS += $(addsuffix _bcmpkt_rxpmd_match_id.c,$(VARIANTS)) + +ifneq (,$(wildcard $(BCMPKTDIR)/ltt_stub/*)) +STUB_DIRS := $(sort $(shell find $(BCMPKTDIR)/ltt_stub -mindepth 3 -type d)) +endif +ifneq (,$(STUB_DIRS)) +STUB_VARS := $(subst /,_, $(subst $(BCMPKTDIR)/ltt_stub/generated/,,$(sort $(STUB_DIRS)))) +CHIP_SRCS += $(addsuffix _pkt_flexhdr.c,$(STUB_VARS)) +CHIP_SRCS += $(addsuffix _bcmpkt_rxpmd_match_id.c,$(STUB_VARS)) +endif + +CHIP_OBJS ?= $(patsubst %.c, %.o, $(CHIP_SRCS)) + +SDK_PMD_KFLAGS := -DSAL_LINUX \ + -I$(SDK)/sal/include \ + -I$(SDK)/bcmltd/include \ + -I$(SDK)/bcmlrd/include \ + -I$(SDK)/bcmdrd/include \ + -I$(SDK)/bcmpkt/include +export SDK_PMD_KFLAGS + +COMMON_SRCS := bcmpkt_lbhdr.c +COMMON_SRCS += bcmpkt_rxpmd.c +COMMON_SRCS += bcmpkt_rxpmd_match_id.c +COMMON_SRCS += bcmpkt_txpmd.c +COMMON_SRCS += bcmpkt_flexhdr.c +COMMON_SRCS += shr_bitop_range_clear.c + +SDK_PMD_KOBJS ?= $(patsubst %.c, %.o, $(COMMON_SRCS) $(CHIP_SRCS)) +export SDK_PMD_KOBJS diff --git a/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk b/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk index f565514a1123..df45e70048d3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk +++ b/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk @@ -1,5 +1,5 @@ # -# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. +# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or @@ -36,7 +36,11 @@ ifneq ($(LKM_BLDDIR),) # output as we want it. # MDIR := $(LKM_BLDDIR) -MSRCS := $(patsubst %.o,%.c,$($(MOD_NAME)-y)) +MOBJS := $($(MOD_NAME)-y) +ifeq (,$(MOBJS)) +MOBJS := $(obj-m) +endif +MSRCS := $(patsubst %.o,%.c,$(MOBJS)) MSRCS += Makefile Kbuild BSRCS := $(addprefix $(PWD)/,$(MSRCS)) else diff --git a/platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk b/platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk new file mode 100644 index 000000000000..dd6477a7dc07 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk @@ -0,0 +1,42 @@ +# +# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder.$ +# +# Various make utility functions. +# + +ifneq (1,MAKEUTILS) +MAKEUTILS := 1 + +# Change comma-separated list to space-separated list +comma = , +empty = +space = $(empty) $(empty) +spc_sep = $(subst $(comma),$(space),$1) +comma_sep = $(subst $(space),$(comma),$1) + +# Convert chip name to uppercase +chip_uc = $(subst a,A,$(subst b,B,$(subst c,C,$(subst m,M,$1)))) + +# Convert chip name to lowercase +chip_lc = $(subst A,a,$(subst B,b,$(subst C,c,$(subst M,m,$1)))) + +# Convert chip variant name to uppercase +var_uc = $(shell echo $1 | tr a-z A-Z) + +# Convert chip variant name to lowercase +var_lc = $(shell echo $1 | tr A-Z a-z) + +endif diff --git a/platform/broadcom/saibcm-modules/sdklt/make/partial.mk b/platform/broadcom/saibcm-modules/sdklt/make/partial.mk new file mode 100644 index 000000000000..ffbe3323de1b --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/make/partial.mk @@ -0,0 +1,65 @@ +# +# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder.$ +# +# SDK partial build support +# + +include $(SDK)/make/makeutils.mk + +# +# If SDK_CHIPS is defined, then exclude any chip which is not part of +# this list. Note that bond-option chips must be added via SDK_SKUS +# separately if needed. +# +ifneq (,$(SDK_CHIPS)) +# Create space-separated uppercase version of chip list +SDK_CHIPS_SPC := $(call spc_sep,$(SDK_CHIPS)) +SDK_CHIPS_UC := $(call chip_uc,$(SDK_CHIPS_SPC)) +endif +ifneq (,$(SDK_SKUS)) +# Create space-separated uppercase version of SKU list +SDK_SKUS_SPC := $(call spc_sep,$(SDK_SKUS)) +SDK_SKUS_UC := $(call chip_uc,$(SDK_SKUS_SPC)) +endif + +# +# If SDK_VARIANTS is defined, then exclude any chip variant which is +# not part of this list. +# +ifneq (,$(SDK_VARIANTS)) +# Create space-separated uppercase version of chip variant list +SDK_VARIANTS_SPC := $(call spc_sep,$(SDK_VARIANTS)) +SDK_VARIANTS_UC := $(call var_uc,$(SDK_VARIANTS_SPC)) +endif + +ifneq (,$(SDK_CHIPS)) +CHIP_CPPFLAGS := CHIP_DEFAULT=0 $(addsuffix =1,$(SDK_CHIPS_UC) $(SDK_SKUS_UC)) +CHIP_CPPFLAGS := $(addprefix -DBCMDRD_CONFIG_INCLUDE_,$(CHIP_CPPFLAGS)) +TMP_CPPFLAGS := $(filter-out $(CHIP_CPPFLAGS),$(SDK_CPPFLAGS)) +override SDK_CPPFLAGS := $(TMP_CPPFLAGS) $(CHIP_CPPFLAGS) +ifdef SDK_VARIANTS +VAR_CPPFLAGS := VARIANT_DEFAULT=0 +VAR_CPPFLAGS += $(foreach C,$(SDK_CHIPS_UC),$(addprefix $(C)_,$(addsuffix =1,$(SDK_VARIANTS_UC)))) +VAR_CPPFLAGS := $(addprefix -DBCMLTD_CONFIG_INCLUDE_,$(VAR_CPPFLAGS)) +TMP_CPPFLAGS := $(filter-out $(VAR_CPPFLAGS),$(SDK_CPPFLAGS)) +override SDK_CPPFLAGS := $(TMP_CPPFLAGS) $(VAR_CPPFLAGS) +endif # SDK_VARIANTS +else +# If SDK_VARIANTS is defined, but SDK_CHIPS is not. +ifneq (,$(SDK_VARIANTS)) +$(error 'Specifying SDK_VARIANTS requires a non-empty SDK_CHIPS') +endif # SDK_VARIANTS +endif # SDK_CHIPS diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h new file mode 100644 index 000000000000..10413f08bbe3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h @@ -0,0 +1,266 @@ +/*! \file sal_libc.h + * + * STandard C functions. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef SAL_LIBC_H +#define SAL_LIBC_H + +#include + +/* System MUST supply stdarg.h */ +#include + +/*! + * \cond SAL_STDC + * + * Standard C library functions. + */ + +#ifndef sal_memcmp +extern int sal_memcmp(const void *s1, const void *s2, size_t cnt); +#endif + +#ifndef sal_memcpy +extern void *sal_memcpy(void *dest, const void *src, size_t cnt); +#endif + +#ifndef sal_memset +extern void *sal_memset(void *dest, int c, size_t cnt); +#endif + +#ifndef sal_memmove +extern void *sal_memmove(void *dest, const void *src, size_t cnt); +#endif + +#ifndef sal_strcpy +extern char *sal_strcpy(char *dest, const char *src); +#endif + +#ifndef sal_strncpy +extern char *sal_strncpy(char *dest, const char *src, size_t cnt); +#endif + +#ifndef sal_strlen +extern size_t sal_strlen(const char *str); +#endif + +#ifndef sal_strcmp +extern int sal_strcmp(const char *dest, const char *src); +#endif + +#ifndef sal_strncmp +extern int sal_strncmp(const char *dest, const char *src, size_t cnt); +#endif + +#ifndef sal_strchr +extern char *sal_strchr(const char *dest, int c); +#endif + +#ifndef sal_strrchr +extern char *sal_strrchr(const char *dest, int c); +#endif + +#ifndef sal_strstr +extern char *sal_strstr(const char *dest, const char *src); +#endif + +#ifndef sal_strcat +extern char *sal_strcat(char *dest, const char *src); +#endif + +#ifndef sal_strncat +extern char *sal_strncat(char *dest, const char *src, size_t cnt); +#endif + +/* ANSI/ISO ctype.h */ + +#ifndef sal_tolower +extern char sal_tolower(char c); +#endif + +#ifndef sal_toupper +extern char sal_toupper(char c); +#endif + +#ifndef sal_isspace +extern int sal_isspace(int c); +#endif + +#ifndef sal_isupper +extern int sal_isupper(int c); +#endif + +#ifndef sal_islower +extern int sal_islower(int c); +#endif + +#ifndef sal_isalpha +extern int sal_isalpha(int c); +#endif + +#ifndef sal_isdigit +extern int sal_isdigit(int c); +#endif + +#ifndef sal_isalnum +extern int sal_isalnum(int c); +#endif + +#ifndef sal_isxdigit +extern int sal_isxdigit(int c); +#endif + +/* ANSI/ISO stdlib.h */ + +#ifndef sal_strtol +extern long sal_strtol(const char *s, char **end, int base); +#endif + +#ifndef sal_strtoul +extern unsigned long sal_strtoul(const char *s, char **end, int base); +#endif + +#ifndef sal_strtoll +extern long long sal_strtoll(const char *s, char **end, int base); +#endif + +#ifndef sal_strtoull +extern unsigned long long sal_strtoull(const char *s, char **end, int base); +#endif + +#ifndef sal_atoi +extern int sal_atoi(const char *s); +#endif + +#ifndef sal_abs +extern int sal_abs(int j); +#endif + +#ifndef RAND_MAX +#define RAND_MAX 32767 +#endif + +#ifndef sal_rand +extern int sal_rand(void); +#endif + +#ifndef sal_srand +extern void sal_srand(unsigned seed); +#endif + +#ifndef sal_qsort +extern void sal_qsort(void *arr, size_t numel, + size_t elsz, int (*cmpfn)(const void *, const void *)); +#endif + +#ifndef sal_bsearch +extern void *sal_bsearch(const void *el, const void *arr, size_t numel, + size_t elsz, int (*cmpfn)(const void *, const void *)); +#endif + +/* ANSI/ISO stdio.h */ + +#ifndef sal_vsnprintf +extern int sal_vsnprintf(char *buf, size_t bufsz, const char *fmt, va_list ap); +#endif + +#ifndef sal_vsprintf +extern int sal_vsprintf(char *buf, const char *fmt, va_list ap); +#endif + +#ifndef sal_snprintf +extern int sal_snprintf(char *buf, size_t bufsz, const char *fmt, ...); +#endif + +#ifndef sal_sprintf +extern int sal_sprintf(char *buf, const char *fmt, ...); +#endif + + +/* Non-standard ANSI/ISO functions */ + +#ifndef sal_strcasecmp +extern int sal_strcasecmp(const char *dest, const char *src); +#endif + +#ifndef sal_strncasecmp +extern int sal_strncasecmp(const char *dest, const char *src, size_t cnt); +#endif + +#ifndef sal_strlcpy +extern size_t sal_strlcpy(char *dest, const char *src, size_t cnt); +#endif + +#ifndef sal_strupr +extern void sal_strupr(char *s); +#endif + +#ifndef sal_strlwr +extern void sal_strlwr(char *s); +#endif + +#ifndef sal_strnchr +extern char *sal_strnchr(const char *dest, int c, size_t cnt); +#endif + +#ifndef sal_strtok_r +extern char *sal_strtok_r(char *s1, const char *delim, char **s2); +#endif + +#ifndef sal_strcasestr +extern char *sal_strcasestr(const char *dest, const char *src); +#endif + +/*! + * End of standard C library functions. + * + * \endcond + */ + +/* Special SAL library functions */ + +#ifndef sal_ctoi +/*! + * \brief Convert a string to an int type. + * + * Similar to atoi, but in addition to 0x it also reconizes prefix 0b + * for binary numbers (e.g. 0b10010) and 0 for octal numbers + * (e.g. 0347). + * + * If not NULL, the \c end pointer will be updated with the address of + * the first invalid character in the string. The functionality of \c + * end is similar to that of standard C \c strtol. + * + * \param [in] s Input string, + * \param [out] end Pointer to first invalid character in \c s. + * + * \return Parsed integer value of input string. + */ +extern int sal_ctoi(const char *s, char **end); +#endif + + +/*! Internal marker used by sal_vsnprintf. */ +#ifndef SAL_VSNPRINTF_X_INF +#define SAL_VSNPRINTF_X_INF 0x7ff0 +#endif + +#endif /* SAL_LIBC_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h new file mode 100644 index 000000000000..e24b073ff429 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h @@ -0,0 +1,170 @@ +/*! \file sal_linux.h + * + * Convenience file for mapping SAL C library functions to Linux. + * + * The main purpose of this file is to allow shared SDK source files + * to be used for building Linux kernel modules. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef SAL_LINUX_H +#define SAL_LINUX_H + +#if !defined(SAL_CONFIG_H) || !defined(SAL_LINUX) + +/* + * If we get here it means that some file other than sal_config.h + * included this file before sal_config.h did. + */ +#error sal_linux.h file cannot be included by regular source files + +#else + +/*! + * \cond SAL_LINUX + */ + +#include +#define SAL_CONFIG_DEFINE_SIZE_T 0 +#define SAL_CONFIG_DEFINE_UINT8_T 0 +#define SAL_CONFIG_DEFINE_UINT16_T 0 +#define SAL_CONFIG_DEFINE_UINT32_T 0 +#define SAL_CONFIG_DEFINE_UINT64_T 0 +#define SAL_CONFIG_DEFINE_UINTPTR_T 0 +#define SAL_CONFIG_DEFINE_INT8_T 0 +#define SAL_CONFIG_DEFINE_INT16_T 0 +#define SAL_CONFIG_DEFINE_INT32_T 0 +#define SAL_CONFIG_DEFINE_INT64_T 0 +#define SAL_CONFIG_DEFINE_PRIu32 0 +#define SAL_CONFIG_DEFINE_PRId32 0 +#define SAL_CONFIG_DEFINE_PRIx32 0 +#define SAL_CONFIG_DEFINE_PRIu64 0 +#define SAL_CONFIG_DEFINE_PRId64 0 +#define SAL_CONFIG_DEFINE_PRIx64 0 +#define SAL_CONFIG_DEFINE_BOOL_T 0 +#define SAL_CONFIG_DEFINE_DMA_ADDR_T 0 + +#include +#ifndef sal_memcmp +#define sal_memcmp memcmp +#endif +#ifndef sal_memcpy +#define sal_memcpy memcpy +#endif +#ifndef sal_memset +#define sal_memset memset +#endif +#ifndef sal_memmove +#define sal_memmove memmove +#endif +#ifndef sal_strcpy +#define sal_strcpy strcpy +#endif +#ifndef sal_strncpy +#define sal_strncpy strncpy +#endif +#ifndef sal_strlen +#define sal_strlen strlen +#endif +#ifndef sal_strcmp +#define sal_strcmp strcmp +#endif +#ifndef sal_strncmp +#define sal_strncmp strncmp +#endif +#ifndef sal_strchr +#define sal_strchr strchr +#endif +#ifndef sal_strrchr +#define sal_strrchr strrchr +#endif +#ifndef sal_strstr +#define sal_strstr strstr +#endif +#ifndef sal_strcat +#define sal_strcat strcat +#endif +#ifndef sal_strncat +#define sal_strncat strncat +#endif +#ifndef sal_strcasecmp +#define sal_strcasecmp strcasecmp +#endif +#ifndef sal_strncasecmp +#define sal_strncasecmp strncasecmp +#endif + +#include +#ifndef sal_tolower +#define sal_tolower tolower +#endif +#ifndef sal_toupper +#define sal_toupper toupper +#endif +#ifndef sal_isspace +#define sal_isspace isspace +#endif +#ifndef sal_isupper +#define sal_isupper isupper +#endif +#ifndef sal_islower +#define sal_islower islower +#endif +#ifndef sal_isalpha +#define sal_isalpha isalpha +#endif +#ifndef sal_isdigit +#define sal_isdigit isdigit +#endif +#ifndef sal_isalnum +#define sal_isalnum isalnum +#endif +#ifndef sal_isxdigit +#define sal_isxdigit isxdigit +#endif + +#include +#ifndef sal_vsnprintf +#define sal_vsnprintf vsnprintf +#endif +#ifndef sal_vsprintf +#define sal_vsprintf vsprintf +#endif +#ifndef sal_snprintf +#define sal_snprintf snprintf +#endif +#ifndef sal_sprintf +#define sal_sprintf sprintf +#endif + +/*! + * \endcond + */ + +#endif /* SAL_CONFIG_H */ + +#else + +/* + * If we get here it means that some file other than sal_config.h + * included this file after sal_config.h already included it once. + */ +#error sal_linux.h file cannot be included by regular source files + +#endif /* SAL_LINUX_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h new file mode 100644 index 000000000000..2ca0dcd40abb --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h @@ -0,0 +1,154 @@ +/*! \file sal_types.h + * + * Basic types and convenience macros. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef SAL_TYPES_H +#define SAL_TYPES_H + +#include + +/*! + * \cond SAL_TYPES + */ + +#if SAL_CONFIG_DEFINE_UINT8_T == 1 +typedef SAL_CONFIG_TYPE_UINT8_T uint8_t; +#endif + +#if SAL_CONFIG_DEFINE_UINT16_T == 1 +typedef SAL_CONFIG_TYPE_UINT16_T uint16_t; +#endif + +#if SAL_CONFIG_DEFINE_UINT32_T == 1 +typedef SAL_CONFIG_TYPE_UINT32_T uint32_t; +#endif + +#if SAL_CONFIG_DEFINE_UINT64_T == 1 +typedef SAL_CONFIG_TYPE_UINT64_T uint64_t; +#endif + +#if SAL_CONFIG_DEFINE_UINTPTR_T == 1 +typedef SAL_CONFIG_TYPE_UINTPTR_T uintptr_t; +#endif + +#if SAL_CONFIG_DEFINE_INT8_T == 1 +typedef SAL_CONFIG_TYPE_INT8_T int8_t; +#endif + +#if SAL_CONFIG_DEFINE_INT16_T == 1 +typedef SAL_CONFIG_TYPE_INT16_T int16_t; +#endif + +#if SAL_CONFIG_DEFINE_INT32_T == 1 +typedef SAL_CONFIG_TYPE_INT32_T int32_t; +#endif + +#if SAL_CONFIG_DEFINE_INT64_T == 1 +typedef SAL_CONFIG_TYPE_INT64_T int64_t; +#endif + +#if SAL_CONFIG_DEFINE_SIZE_T == 1 +typedef SAL_CONFIG_TYPE_SIZE_T size_t; +#endif + +#if SAL_CONFIG_DEFINE_BOOL_T == 1 +typedef SAL_CONFIG_TYPE_BOOL_T bool; +#endif + +#if SAL_CONFIG_DEFINE_DMA_ADDR_T == 1 +typedef SAL_CONFIG_TYPE_DMA_ADDR_T dma_addr_t; +#endif + +#if SAL_CONFIG_DEFINE_PRIu32 == 1 +#define PRIu32 SAL_CONFIG_MACRO_PRIu32 +#endif + +#if SAL_CONFIG_DEFINE_PRId32 == 1 +#define PRId32 SAL_CONFIG_MACRO_PRId32 +#endif + +#if SAL_CONFIG_DEFINE_PRIx32 == 1 +#define PRIx32 SAL_CONFIG_MACRO_PRIx32 +#endif + +#if SAL_CONFIG_DEFINE_PRIu64 == 1 +#define PRIu64 SAL_CONFIG_MACRO_PRIu64 +#endif + +#if SAL_CONFIG_DEFINE_PRId64 == 1 +#define PRId64 SAL_CONFIG_MACRO_PRId64 +#endif + +#if SAL_CONFIG_DEFINE_PRIx64 == 1 +#define PRIx64 SAL_CONFIG_MACRO_PRIx64 +#endif + +#ifndef offsetof +#define offsetof(_s, _m) ((unsigned long)&(((_s *)0)->_m)) +#endif + +#ifndef NULL +#define NULL (void*)0 +#endif + +#ifndef STATIC +#define STATIC static +#endif + +#ifndef VOLATILE +#define VOLATILE volatile +#endif + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +#ifndef COUNTOF +#define COUNTOF(ary) ((int) (sizeof(ary) / sizeof((ary)[0]))) +#endif + +#ifndef COMPILER_REFERENCE +#define COMPILER_REFERENCE(_a) ((void)(_a)) +#endif + +/*! + * Compiler attribute keyword. + * + * We use this only for enhanced code validation, so it does not need + * to be fully portable. + */ +#ifndef SAL_ATTR +# if defined(__GNUC__) && !defined(__PEDANTIC__) +# define SAL_ATTR(_a) __attribute__(_a) +# else +# define SAL_ATTR(_a) +# endif +#endif + +/*! + * \endcond + */ + +#endif /* SAL_TYPES_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h new file mode 100644 index 000000000000..6778b010dbda --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h @@ -0,0 +1,254 @@ +/*! \file sal_config.h + * + * Broadcom System Abstraction Layer (SAL) configuration + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef SAL_CONFIG_H +#define SAL_CONFIG_H + +/* + * Include system config file if specified: + */ +#ifdef SAL_INCLUDE_CUSTOM_CONFIG +#include +#endif + +/* + * Optionally use Linux C library and header files: + */ +#ifdef SAL_LINUX +#include +/* Linux implies no standard C (see below) */ +#ifndef SAL_NO_STDC +#define SAL_NO_STDC +#endif +#endif + +/* + * Use standard C library and header files by default: + */ +#ifndef SAL_NO_STDC +#include +#endif + +/*! + * \cond SAL_CONFIG + */ + +/* Type uint8_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_UINT8_T +#define SAL_CONFIG_DEFINE_UINT8_T 1 +#endif + +/* Default type definition for uint8_t */ +#ifndef SAL_CONFIG_TYPE_UINT8_T +#define SAL_CONFIG_TYPE_UINT8_T unsigned char +#endif + +/* Type uint16_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_UINT16_T +#define SAL_CONFIG_DEFINE_UINT16_T 1 +#endif + +/* Default type definition for uint16_t */ +#ifndef SAL_CONFIG_TYPE_UINT16_T +#define SAL_CONFIG_TYPE_UINT16_T unsigned short +#endif + +/* Type uint32_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_UINT32_T +#define SAL_CONFIG_DEFINE_UINT32_T 1 +#endif + +/* Default type definition for uint32_t */ +#ifndef SAL_CONFIG_TYPE_UINT32_T +#define SAL_CONFIG_TYPE_UINT32_T unsigned int +#endif + +/* Type uint64_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_UINT64_T +#define SAL_CONFIG_DEFINE_UINT64_T 1 +#endif + +/* Default type definition for uint64_t */ +#ifndef SAL_CONFIG_TYPE_UINT64_T +#define SAL_CONFIG_TYPE_UINT64_T unsigned long long +#endif + +/* Type uintptr_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_UINTPTR_T +#define SAL_CONFIG_DEFINE_UINTPTR_T 1 +#endif + +/* Default type definition for uintptr_t */ +#ifndef SAL_CONFIG_TYPE_UINTPTR_T +#define SAL_CONFIG_TYPE_UINTPTR_T unsigned long long +#endif + +/* Type int8_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_INT8_T +#define SAL_CONFIG_DEFINE_INT8_T 1 +#endif + +/* Default type definition for int8_t */ +#ifndef SAL_CONFIG_TYPE_INT8_T +#define SAL_CONFIG_TYPE_INT8_T signed char +#endif + +/* Type int16_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_INT16_T +#define SAL_CONFIG_DEFINE_INT16_T 1 +#endif + +/* Default type definition for int16_t */ +#ifndef SAL_CONFIG_TYPE_INT16_T +#define SAL_CONFIG_TYPE_INT16_T signed short +#endif + +/* Type int32_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_INT32_T +#define SAL_CONFIG_DEFINE_INT32_T 1 +#endif + +/* Default type definition for int32_t */ +#ifndef SAL_CONFIG_TYPE_INT32_T +#define SAL_CONFIG_TYPE_INT32_T signed int +#endif + +/* Type int64_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_INT64_T +#define SAL_CONFIG_DEFINE_INT64_T 1 +#endif + +/* Default type definition for int64_t */ +#ifndef SAL_CONFIG_TYPE_INT64_T +#define SAL_CONFIG_TYPE_INT64_T signed long long +#endif + +/* Type size_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_SIZE_T +#define SAL_CONFIG_DEFINE_SIZE_T 1 +#endif + +/* Default type definition for size_t */ +#ifndef SAL_CONFIG_TYPE_SIZE_T +#define SAL_CONFIG_TYPE_SIZE_T unsigned int +#endif + +/* Type bool is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_BOOL_T +#define SAL_CONFIG_DEFINE_BOOL_T 1 +#endif + +/* Default type definition for bool */ +#ifndef SAL_CONFIG_TYPE_BOOL_T +#define SAL_CONFIG_TYPE_BOOL_T enum { false = 0, true = 1 } +#endif + +/* Type dma_addr_t is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_DMA_ADDR_T +#define SAL_CONFIG_DEFINE_DMA_ADDR_T 1 +#endif + +/* Default type definition for dma_addr_t */ +#ifndef SAL_CONFIG_TYPE_DMA_ADDR_T +#define SAL_CONFIG_TYPE_DMA_ADDR_T unsigned int +#endif + +/* Formatting macro SAL_PRIu32 is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_PRIu32 +#define SAL_CONFIG_DEFINE_PRIu32 1 +#endif + +/* Default definition for formatting macro SAL_PRIu32 */ +#ifndef SAL_CONFIG_MACRO_PRIu32 +#define SAL_CONFIG_MACRO_PRIu32 "u" +#endif + +/* Formatting macro SAL_PRId32 is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_PRId32 +#define SAL_CONFIG_DEFINE_PRId32 1 +#endif + +/* Default definition for formatting macro SAL_PRId32 */ +#ifndef SAL_CONFIG_MACRO_PRId32 +#define SAL_CONFIG_MACRO_PRId32 "d" +#endif + +/* Formatting macro SAL_PRIx32 is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_PRIx32 +#define SAL_CONFIG_DEFINE_PRIx32 1 +#endif + +/* Default definition for formatting macro SAL_PRIx32 */ +#ifndef SAL_CONFIG_MACRO_PRIx32 +#define SAL_CONFIG_MACRO_PRIx32 "x" +#endif + +/* Formatting macro SAL_PRIu64 is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_PRIu64 +#define SAL_CONFIG_DEFINE_PRIu64 1 +#endif + +/* Default definition for formatting macro SAL_PRIu64 */ +#ifndef SAL_CONFIG_MACRO_PRIu64 +#define SAL_CONFIG_MACRO_PRIu64 "llu" +#endif + +/* Formatting macro SAL_PRId64 is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_PRId64 +#define SAL_CONFIG_DEFINE_PRId64 1 +#endif + +/* Default definition for formatting macro SAL_PRId64 */ +#ifndef SAL_CONFIG_MACRO_PRId64 +#define SAL_CONFIG_MACRO_PRId64 "lld" +#endif + +/* Formatting macro SAL_PRIx64 is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_PRIx64 +#define SAL_CONFIG_DEFINE_PRIx64 1 +#endif + +/* Default definition for formatting macro SAL_PRIx64 */ +#ifndef SAL_CONFIG_MACRO_PRIx64 +#define SAL_CONFIG_MACRO_PRIx64 "llx" +#endif + +/* Assert macro is not provided by the system */ +#ifndef SAL_CONFIG_DEFINE_ASSERT +#define SAL_CONFIG_DEFINE_ASSERT 1 +#endif + +/* Default definition for assert macro */ +#ifndef SAL_CONFIG_MACRO_ASSERT +#define SAL_CONFIG_MACRO_ASSERT SAL_ASSERT_DEFAULT +#endif + +/* Memory Barrier if necessary */ +#ifndef SAL_CONFIG_MEMORY_BARRIER +#define SAL_CONFIG_MEMORY_BARRIER ; +#endif + +/*! + * \endcond + */ + +#endif /* SAL_CONFIG_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c b/platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c new file mode 100644 index 000000000000..307014215d99 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c @@ -0,0 +1,79 @@ +/*! \file shr_bitop_range_clear.c + * + * Bit array operations. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#include + +/*! + * INTERNAL USE ONLY. + * + * Same as shr_bitop_range_clear, but for a single SHR_BITDCL. + */ +static inline void +shr_bitop_range_clear_one_bitdcl(SHR_BITDCL *a, int offs, int n) +{ + SHR_BITDCL mask = ~0; + + mask >>= (SHR_BITWID - n); + mask <<= offs; + *a &= ~mask; +} + +/*! + * \brief Clear range of bits in a bit array. + * + * INTERNAL USE ONLY. + * + * Refer to \ref SHR_BITCLR_RANGE macro. + */ +void +shr_bitop_range_clear(SHR_BITDCL *a, int offs, int n) +{ + SHR_BITDCL *pa; + int woffs, wremain; + + if (n <= 0) { + return; + } + + pa = a + (offs / SHR_BITWID); + + woffs = offs % SHR_BITWID; + + if (woffs != 0) { + wremain = SHR_BITWID - woffs; + if (n <= wremain) { + shr_bitop_range_clear_one_bitdcl(pa, woffs, n); + return; + } + shr_bitop_range_clear_one_bitdcl(pa, woffs, wremain); + n -= wremain; + ++pa; + } + while (n >= SHR_BITWID) { + *(pa++) = 0; + n -= SHR_BITWID; + } + + if (n > 0) { + shr_bitop_range_clear_one_bitdcl(pa, 0, n); + } +} diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h new file mode 100644 index 000000000000..c213fdcf2ab7 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h @@ -0,0 +1,411 @@ +/*! \file shr_bitop.h + * + * Bit array library. + * + * The macros provided by this library allows the user to declare and + * operate on bit arrays of arbitrary size. + * + * In addition to macros for setting, clearing and testing individual + * bits, there are macros for performing various operations on ranges + * of bits within one or between two bit arrays. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef SHR_BITOP_H +#define SHR_BITOP_H + +#include + +/*! + * Base type for bit arrays. This type is essentially a block of bits, + * and each block contains \ref SHR_BITWID bits. + */ +#define SHR_BITDCL uint32_t + +/*! + * Number of bits in a bit array base type (\ref SHR_BITDCL). An + * applcation should normally not care about the size of the bit + * array base type. + */ +#define SHR_BITWID 32 + +/*! \cond */ +/* + *-------------------------------------------------------------------------- + * + * The following functions and macros should not be called directly. + */ +extern void +shr_bitop_range_clear(SHR_BITDCL *a, int offs, int n); + +extern void +shr_bitop_range_set(SHR_BITDCL *a, int offs, int n); + +extern void +shr_bitop_range_copy(SHR_BITDCL *a1, int offs1, const SHR_BITDCL *a2, + int offs2, int n); + +extern int +shr_bitop_range_null(const SHR_BITDCL *a, + int offs, int n); + +extern int +shr_bitop_range_eq(const SHR_BITDCL *a1, const SHR_BITDCL *a2, + int offs, int n); + +extern void +shr_bitop_range_count(const SHR_BITDCL *a, + int offs, int n, int *count); + +extern void +shr_bitop_range_and(const SHR_BITDCL *a1, const SHR_BITDCL *a2, + int offs, int n, SHR_BITDCL *dest); + +extern void +shr_bitop_range_or(const SHR_BITDCL *a1, const SHR_BITDCL *a2, + int offs, int n, SHR_BITDCL *dest); + +extern void +shr_bitop_range_xor(const SHR_BITDCL *a1, const SHR_BITDCL *a2, + int offs, int n, SHR_BITDCL *dest); + +extern void +shr_bitop_range_remove(const SHR_BITDCL *a1, const SHR_BITDCL *a2, + int offs, int n, SHR_BITDCL *dest); + +extern void +shr_bitop_range_negate(const SHR_BITDCL *a1, + int offs, int n, SHR_BITDCL *dest); + +extern int +shr_bitop_str_decode(const char *str, SHR_BITDCL *dest, int max_bitdcl); + +/*! + * Number of SHR_BITDCLs needed to contain _max bits, i.e. the \ref + * SHR_BITWID-aligned number of bits needed to support _max bits. + */ +#define SHRi_BITDCLSIZE(_max) \ + (((_max) + SHR_BITWID - 1) / SHR_BITWID) + +/*! + * Generic operation macro on bit array _a, with bit _b. Used for + * public set/clear/test macros. + */ +#define SHRi_BITOP(_a, _b, _op) \ + (((_a)[(_b) / SHR_BITWID]) _op (1U << ((_b) % SHR_BITWID))) + +/* + * End of internal functions and macros. + *-------------------------------------------------------------------------- + */ +/*! \endcond */ + +/*! + * Size in bytes of a bit array containing _max bits. + * + * This size is useful when calling malloc, memcpy, etc. + */ +#define SHR_BITALLOCSIZE(_max) \ + (SHRi_BITDCLSIZE(_max) * sizeof (SHR_BITDCL)) + +/*! + * Declare bit array _name of size _max bits. + * + * Used for declaring a bit array on the stack (or as a static). + * + * For example, to declare an array containing 80 bits: + * + * \code{.c} + * void my_func(void) + * { + * SHR_BITDCLNAME(my_bit_array, 80); + * ... + * } + * \endcode + */ +#define SHR_BITDCLNAME(_name, _max) \ + SHR_BITDCL _name[SHRi_BITDCLSIZE(_max)] + +/*! + * \brief Test if a bit is set in a bit array. + * + * \param [in] _a Bit array to operate on + * \param [in] _b Bit number to test (first is 0) + * + * \return 0 if not set, otherwise non-zero. + */ +#define SHR_BITGET(_a, _b) \ + SHRi_BITOP(_a, _b, &) + +/*! + * \brief Set a bit in a bit array. + * + * \param [in] _a Bit array to operate on + * \param [in] _b Bit number to set (first is 0) + * + * \return Nothing + */ +#define SHR_BITSET(_a, _b) \ + SHRi_BITOP(_a, _b, |=) + +/*! + * \brief Clear a bit in a bit array. + * + * \param [in] _a Bit array to operate on + * \param [in] _b Bit number to clear (first is 0) + * + * \return Nothing + */ +#define SHR_BITCLR(_a, _b) \ + SHRi_BITOP(_a, _b, &= ~) + +/*! + * \brief Iterate over bits in bit array. + * + * Used to perform a specific action for all the bits which are set in + * a bit array. + * + * Example: + * + * \code{.c} + * #define MAX_BITS 80 + * + * static SHR_BITDCLNAME(my_bit_array, MAX_BITS); + * + * void my_biterator(void) + * { + * int bitnum; + * + * SHR_BIT_ITER(my_bit_array, MAX_BITS, bitnum) { + * printf("Bit number %d is set\n", bitnum); + * } + * } + * \endcode + * + * \param [in] _a Bit array to iterate over + * \param [in] _max Number of bits to iterate over (starting from 0) + * \param [in] _b Iterator variable (should be same type as _max) + */ +#define SHR_BIT_ITER(_a, _max, _b) \ + for ((_b) = 0; (_b) < (_max); (_b)++) \ + if ((_a)[(_b) / SHR_BITWID] == 0) \ + (_b) += (SHR_BITWID - 1); \ + else if (SHR_BITGET((_a), (_b))) + +/*! + * \brief Set range of bits in a bit array. + * + * This macro sets a specified range of bits within a bit array. + * + * \param [in] _a Bit array in which to set bits + * \param [in] _offs Offset (in bits) into the array + * \param [in] _n Number of bits to clear + * + * \return Nothing + */ +#define SHR_BITSET_RANGE(_a, _offs, _n) \ + (shr_bitop_range_set(_a, _offs, _n)) + +/*! + * \brief Clear range of bits in a bit array. + * + * This macro clears a specified range of bits within a bit array. + * + * \param [in] _a Bit array in which to clear bits + * \param [in] _offs Offset (in bits) into the array + * \param [in] _n Number of bits to clear + * + * \return Nothing + */ +#define SHR_BITCLR_RANGE(_a, _offs, _n) \ + (shr_bitop_range_clear(_a, _offs, _n)) + +/*! + * \brief Copy a range of bits between two bit arrays. + * + * This macro copies a range of bits from one bit array to + * another. The bit range may reside at different offsets within the + * source and destination bit arrays. + * + * If source and destination are within the same bit array, then the + * ranges must not overlap. + * + * \param [in] _a1 Destination bit array + * \param [in] _offs1 Offset (in bits) in destination bit array + * \param [in] _a2 Source bit array + * \param [in] _offs2 Offset (in bits) in source bit array + * \param [in] _n Number of bits to copy + * + * \return Nothing + */ +#define SHR_BITCOPY_RANGE(_a1, _offs1, _a2, _offs2, _n) \ + (shr_bitop_range_copy(_a1, _offs1, _a2, _offs2, _n)) + +/*! + * \brief Perform bitwise AND for a range of bits in two bit arrays. + * + * The destination bit array may the same as one of the source bit + * arrays. + * + * \param [in] _a1 First source bit array + * \param [in] _a2 Second source bit array + * \param [in] _offs Offset (in bits) in bit array + * \param [in] _n Number of bits to operate on + * \param [in] _dest Destination bit array + * + * \return Nothing + */ +#define SHR_BITAND_RANGE(_a1, _a2, _offs, _n, _dest) \ + (shr_bitop_range_and(_a1, _a2, _offs, _n, _dest)) + +/*! + * \brief Perform bitwise OR for a range of bits in two bit arrays. + * + * This macro performs a logical AND operation between each bit of a + * specified range of bits within two bit arrays. + * + * The destination bit array may the same as one of the source bit + * arrays. + * + * \param [in] _a1 First bit array for operation + * \param [in] _a2 Second bit array for operation + * \param [in] _offs Offset (in bits) into the arrays + * \param [in] _n Number of bits to operate on + * \param [in] _dest Destination bit array + * + * \return Nothing + */ +#define SHR_BITOR_RANGE(_a1, _a2, _offs, _n, _dest) \ + (shr_bitop_range_or(_a1, _a2, _offs, _n, _dest)) + +/*! + * \brief Perform bitwise XOR operation on bit arrays. + * + * This macro performs a logical XOR operation between each bit of a + * specified range of bits within two bit arrays. + * + * The destination bit array may the same as one of the source bit + * arrays. + * + * \param [in] _a1 First bit array for operation + * \param [in] _a2 Second bit array for operation + * \param [in] _offs Offset (in bits) into the arrays + * \param [in] _n Number of bits to operate on + * \param [in] _dest Destination bit array + * + * \return Nothing + */ +#define SHR_BITXOR_RANGE(_a1, _a2, _offs, _n, _dest) \ + (shr_bitop_range_xor(_a1, _a2, _offs, _n, _dest)) + +/*! + * \brief Clear select bits in a bit array. + * + * This macro clears bits within a specified range of bits in a bit + * array. Only the bits which are set in the supplied mask bit array + * will be cleared, i.e. any bit not set in the mask (or outside the + * range) are unaffected. + * + * The destination bit array may the same as the source bit array. + * + * \param [in] _a1 Source bit array + * \param [in] _a2 Mask bit array + * \param [in] _offs Offset (in bits) into the arrays + * \param [in] _n Number of bits to operate on + * \param [in] _dest Destination bit array + * + * \return Nothing + */ +#define SHR_BITREMOVE_RANGE(_a1, _a2, _offs, _n, _dest) \ + (shr_bitop_range_remove(_a1, _a2, _offs, _n, _dest)) + +/*! + * \brief Negate a range of bits in a bit array. + * + * This operation is essentially the same as performing an XOR with a + * bit array consisting of all 1s. + * + * \param [in] _a Source bit array + * \param [in] _offs Offset (in bits) into the array + * \param [in] _n Number of bits to negate + * \param [in] _dest Destination bit array + */ +#define SHR_BITNEGATE_RANGE(_a, _offs, _n, _dest) \ + (shr_bitop_range_negate(_a, _offs, _n, _dest)) + +/*! + * \brief Test if bits are cleared in a bit array. + * + * + * + * \param [in] _a Source bit array + * \param [in] _offs Offset (in bits) into the array + * \param [in] _n Number of bits to negate + * + * \return 1 if all bits in range are cleared, otherwise 0. + */ +#define SHR_BITNULL_RANGE(_a, _offs, _n) \ + (shr_bitop_range_null(_a, _offs, _n)) + +/*! + * \brief Test if two bit array bit ranges are equal. + * + * This macro compares a range of bits at the same offset within two + * bit arrays. + * + * \param [in] _a1 First bit array + * \param [in] _a2 Second bit array + * \param [in] _offs Offset (in bits) into the arrays + * \param [in] _n Number of bits to compare + * + * \return 1 if all bits in range are equal, otherwise 0. + */ +#define SHR_BITEQ_RANGE(_a1, _a2, _offs, _n) \ + (shr_bitop_range_eq(_a1, _a2, _offs, _n)) + +/*! + * \brief Count the number of bits set in a range of bits in a bit array. + * + * This macro counts the number of bits that are set in a range of \c + * _n bits starting at offset \c _offs within bit array \c _a. + * + * \param [in] _a Bit array. + * \param [out] _count Number of bits set within specified range. + * \param [in] _offs Offset into the bit array. + * \param [in] _n Number of bits to check. + */ +#define SHR_BITCOUNT_RANGE(_a, _count, _offs, _n) \ + shr_bitop_range_count(_a, _offs, _n, &(_count)) + +/*! + * \brief Decode a string in hex format into a bitmap. + * + * The string can be more than 32 bits worth of data if it is in hex + * format (0x...). If not hex, it is treated as a 32 bit value. + * + * \param [in] _str String to decode. + * \param [out] _a Bit array where to store decoded data. + * \param [in] _max Size of output bit array in bits. + * + * \retval 0 No errors + */ +#define SHR_BITSTR_DECODE(_str, _a, _max) \ + shr_bitop_str_decode(_str, _a, SHRi_BITDCLSIZE(_max)) + +#endif /* SHR_BITOP_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h index 702e6317f5f0..cca344b3f2c7 100644 --- a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h +++ b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h @@ -4,7 +4,7 @@ * */ /* - * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved. + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h new file mode 100644 index 000000000000..f180585ca7d6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h @@ -0,0 +1,161 @@ +/*! \file shr_types.h + * + * Shared data types. + * + */ +/* + * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder.$ + */ + +#ifndef SHR_TYPES_H +#define SHR_TYPES_H + +#include + +/*! IPv4 header version. */ +#define SHR_IPV4_VERSION 4 + +/*! IPv4 header length in bytes. */ +#define SHR_IPV4_HEADER_LENGTH 20 + +/*! IPv4 header length in 32-bit words. */ +#define SHR_IPV4_HDR_WLEN 5 + +/*! IPv4 Address length. */ +#define SHR_IPV4_ADDR_LEN 4 + +/*! IPv6 header version. */ +#define SHR_IPV6_VERSION 6 + +/*! IPv6 header length in bytes. */ +#define SHR_IPV6_HEADER_LENGTH 40 + +/*! IPv6 Address length. */ +#define SHR_IPV6_ADDR_LEN 16 + +/*! L2 header EthertType for IPv4. */ +#define SHR_L2_ETYPE_IPV4 0x0800 + +/*! L2 header ether type for IPv6. */ +#define SHR_L2_ETYPE_IPV6 0x86dd + +/*! L2 header ether type for MPLS unicast. */ +#define SHR_L2_ETYPE_MPLS_UNICAST 0x8847 + +/*! L2 ether type length. */ +#define SHR_L2_ETYPE_LEN 2 + +/*! IP protocol number of UDP. */ +#define SHR_IP_PROTO_UDP 17 + +/*! IP protocol number of IPV4 (IPv4 in IP encapsulation). */ +#define SHR_IP_PROTO_IPV4 4 + +/*! IP protocol number of IPV6 (IPv6 in IP encapsulation). */ +#define SHR_IP_PROTO_IPV6 41 + +/*! IP protocol number of GRE (Generic Routing Encapsulation). */ +#define SHR_IP_PROTO_GRE 47 + +/*! UDP header length */ +#define SHR_UDP_HDR_LEN 8 + +/*! Initial UDP Payload length. */ +#define SHR_UDP_PAYLOAD_LEN 0x10 + +/*! Length of L2 CRC. */ +#define SHR_L2_CRC_LEN 4 + +/*! Ethernet MAC address length. */ +#define SHR_MAC_ADDR_LEN 6 + +/*! VLAN header length. */ +#define SHR_VLAN_HDR_LEN 4 + +/*! Generic Routing Encapsulation (GRE) header length. */ +#define SHR_GRE_HDR_LEN 4 + +/*! Length of the MPLS header. */ +#define SHR_MPLS_HDR_LEN 4 + +/*! MPLS Associated Channel Header (ACH) length. */ +#define SHR_MPLS_ACH_LEN 4 + +/*! Length of the MPLS label. */ +#define SHR_MPLS_LABEL_LEN 3 + +/*! IPFIX header length */ +#define SHR_IPFIX_HDR_LEN 16 + +/*! Initial IPFIX Timestamp */ +#define SHR_IPFIX_INITIAL_TIMESTAMP 0 + +/*! Initial IPFIX Sequence Number */ +#define SHR_IPFIX_INITIAL_SEQNUM 0 + +/*! Port number type. */ +typedef uint16_t shr_port_t; + +/*! Ethernet MAC address type. */ +typedef uint8_t shr_mac_t[SHR_MAC_ADDR_LEN]; + +/*! Check if Ethernet MAC address is a multicast address. */ +#define SHR_MAC_IS_MCAST(_mac) \ + (_mac[0] & 0x1) + +/*! Check if Ethernet MAC address is all zeros. */ +#define SHR_MAC_IS_ZERO(_mac) \ + (((_mac)[0] | (_mac)[1] | (_mac)[2] | \ + (_mac)[3] | (_mac)[4] | (_mac)[5]) == 0) + +/*! Virtual eXtensible Local Area Network(VxLAN) header length. */ +#define SHR_VXLAN_HDR_LEN 8 + +/*! VxLAN Network Identifier(VNID) length. */ +#define SHR_VXLAN_VNID_LEN 3 + +/*! VxLAN Network Identifier type. */ +typedef uint32_t shr_vxlan_vnid_t; + +/*! IPv4 address type. */ +typedef uint32_t shr_ip_t; + +/*! IPv6 address type. */ +typedef uint8_t shr_ip6_t[SHR_IPV6_ADDR_LEN]; + +/*! + * \brief Enum string map entry. + * + * This type is intended for mapping enum values to strings, e.g. when + * an enum value needs to be printed on the console. + * + * The complete enum map will be an array of this type, i.e. with one + * entry per enum value. + * + * The type can also be used directly for CLI commands which take an + * enum value as a parameter. + */ +typedef struct shr_enum_map_s { + + /*! Enum name. */ + char *name; + + /*! Enum value. */ + int val; + +} shr_enum_map_t; + +#endif /* SHR_TYPES_H */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h index fa8849eb2bf7..b287d3ede41d 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h @@ -1,5 +1,7 @@ -/* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. +/*********************************************************************** + * + * $Id: linux-bde.h,v 1.24 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,13 +24,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/*********************************************************************** - * - * $Id: linux-bde.h,v 1.24 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * * * Linux Broadcom Device Enumerators * @@ -244,7 +241,6 @@ extern int lkbde_dev_state_set(int d, uint32 state); extern int lkbde_dev_instid_get(int d, uint32 *instid); extern int lkbde_dev_instid_set(int d, uint32 instid); - /* * Return none-zero if the SDK instance with the given instance ID * manages the given device. @@ -263,6 +259,7 @@ extern linux_bde_device_bitmap_t* lkbde_get_inst_devs(uint32 inst_id); */ extern int lkbde_irq_mask_set(int d, uint32 addr, uint32 mask, uint32 fmask); extern int lkbde_irq_mask_get(int d, uint32 *mask, uint32 *fmask); +extern int lkbde_irq_status_get(int d, uint32_t addr, uint32 *status); #ifdef BCM_SAND_SUPPORT extern int lkbde_cpu_write(int d, uint32 addr, uint32 *buf); diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h index c2730c140b6e..f4b3aa74f734 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h @@ -1,5 +1,7 @@ -/* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. +/*********************************************************************** + * + * $Id: linux_dma.h,v 1.24 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,13 +24,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/*********************************************************************** - * - * $Id: linux_dma.h,v 1.24 Broadcom SDK $ - * $Copyright: (c) 2016 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * * **********************************************************************/ diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h index 15d496ff623d..ca96dc6c95b3 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: mpool.h,v 1.2 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: mpool.h,v 1.2 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * */ #ifndef __MPOOL_H__ diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile index 1c3e94815c4e..d771c315d73a 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile @@ -1,33 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.18 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # # Makefile for Linux kernel BDE # diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c index 0fc8b63437b7..6b591f75f71f 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c @@ -1,17 +1,29 @@ /* - * Copyright 2017 Broadcom - * + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as * published by the Free Software Foundation (the "GPL"). - * + * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License version 2 (GPLv2) for more details. - * + * * You should have received a copy of the GNU General Public License * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * */ /* @@ -21,7 +33,6 @@ #include #include #include -#include #include #include #include @@ -627,50 +638,6 @@ _eb_device_create(resource_size_t paddr, int irq, int rd_hw, int wr_hw) return 0; } -#ifdef BCM_SAND_SUPPORT - -#include - -static int -sand_device_create(void) -{ -#ifndef __DUNE_LINUX_BCM_CPU_PCIE__ - bde_ctrl_t* ctrl; - - ctrl = _devices; /* on petra, take first device */ - - - ctrl->dev_type |= BDE_PCI_DEV_TYPE | BDE_SWITCH_DEV_TYPE; - ctrl->pci_device = NULL; /* No PCI bus */ - - /* Map in the device */ /* not realy map anything */ - ctrl->bde_dev.base_address = (sal_vaddr_t)ioremap(0x40000000, 0x100000); - ctrl->iowin[0].addr = 0x40000000; - ctrl->iowin[0].size = 0x100000; - - ctrl->iLine = 0; - ctrl->isr = NULL; - ctrl->isr_data = NULL; - - ctrl->bde_dev.device = BCM88950_DEVICE_ID; - ctrl->bde_dev.rev = BCM88950_A0_REV_ID; -#endif - - /* Map CPU regs */ -#ifdef __DUNE_WRX_BCM_CPU__ - cpu_address = ioremap(0x18000000, 0x4000000); -#elif defined(__DUNE_GTO_BCM_CPU__) - cpu_address = ioremap(0xe0000000, 0x100000); -#endif - -#ifndef __DUNE_LINUX_BCM_CPU_PCIE__ - _bde_add_device(); -#endif - - return 0; -} -#endif /* BCM_SAND_SUPPORT */ - #ifdef IPROC_CMICD static void iproc_cmicd_get_irqres(ibde_dev_t bde_dev, struct resource *res_irq) @@ -1437,6 +1404,10 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, BCM56671_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56672_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56675_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53650_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53651_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53652_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM53653_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56568_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56670_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56760_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, @@ -1690,8 +1661,42 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, BCM8883E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM8883F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, #ifdef BCM_DNX3_SUPPORT - { BROADCOM_VENDOR_ID, BCM88860_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88870_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START + 1, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START + 2, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START + 3, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START + 4, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START + 5, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, #endif #endif /* BCM_DNX_SUPPORT */ #ifdef BCM_DFE_SUPPORT @@ -1728,38 +1733,26 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, BCM8879D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM8879F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, #ifdef BCM_DNXF3_SUPPORT - { BROADCOM_VENDOR_ID, BCM88910_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88911_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88912_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88913_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88914_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88915_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88916_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88917_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88918_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88919_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8891A_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8891B_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8891C_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8891D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8891E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8891F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88920_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88921_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88922_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88923_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88924_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88925_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88926_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88927_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88928_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM88929_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8892A_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8892B_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8892C_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8892D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8892E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM8892F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, #endif #endif { BROADCOM_VENDOR_ID, BCM56860_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, @@ -3235,11 +3228,6 @@ _init(void) #endif #endif /* BCM_ICS */ - -#ifdef BCM_SAND_SUPPORT - sand_device_create(); -#endif - /* * Probe for EB Bus devices. */ @@ -3343,6 +3331,10 @@ _pprint(struct seq_file *m) pprintf(m, "Broadcom Device Enumerator (%s)\n", LINUX_KERNEL_BDE_NAME); +#ifdef LKM_BUILD_INFO + pprintf(m, "%s\n", LKM_BUILD_INFO); +#endif + pprintf(m, "Module parameters:\n"); pprintf(m, "\tmaxpayload=%d\n", maxpayload); pprintf(m, "\tusemsi=%d\n", usemsi); @@ -3865,7 +3857,8 @@ _interrupt_connect(int d, #endif { #if defined(IPROC_CMICD) && defined(CONFIG_OF) - if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) { + if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE) && + (ctrl->pci_device == NULL)) { int i, j; for (i = 0; i < IHOST_CMICX_MAX_INTRS; i++) { if (!iproc_cmicx_irqs[i]) { @@ -4008,7 +4001,8 @@ _interrupt_disconnect(int d) #endif #endif #if defined(IPROC_CMICD) && defined(CONFIG_OF) - if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) { + if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE) && + (ctrl->pci_device == NULL)) { int i; for (i = 0; i < IHOST_CMICX_MAX_INTRS; i++) { if (!iproc_cmicx_irqs[i]) { @@ -4332,13 +4326,15 @@ lkbde_cpu_pci_register(int d) case J2X_DEVICE_ID: #ifdef BCM_DNX3_SUPPORT case JERICHO3_DEVICE_ID: - case Q4_DEVICE_ID: + case J3AI_DEVICE_ID: + case Q3D_DEVICE_ID: #endif #endif #ifdef BCM_DNXF_SUPPORT case BCM88790_DEVICE_ID: #ifdef BCM_DNXF3_SUPPORT - case BCM88920_DEVICE_ID: + case RAMON2_DEVICE_ID: + case RAMON3_DEVICE_ID: #endif #endif /* @@ -4669,6 +4665,7 @@ lkbde_dev_instid_get(int d, uint32 *instid) return 0; } + /* * When a secondary interrupt handler is installed this function * is used for synchronizing hardware access to the IRQ mask @@ -4752,6 +4749,36 @@ lkbde_irq_mask_get(int d, uint32_t *mask, uint32_t *fmask) return 0; } +int +lkbde_irq_status_get(int d, uint32_t addr, uint32 *status) +{ + bde_ctrl_t *ctrl; + int iproc_reg; + unsigned long flags; + + iproc_reg = d & LKBDE_IPROC_REG; + d &= ~LKBDE_IPROC_REG; + + if (!VALID_DEVICE(d)) { + return -1; + } + + ctrl = _devices + d; + + /* Lock is required to synchronize access from user space */ + spin_lock_irqsave(&ctrl->lock, flags); + + if (iproc_reg) { + *status = _iproc_read(d, addr); + } else { + *status = _read(d, addr); + } + + spin_unlock_irqrestore(&ctrl->lock, flags); + + return 0; +} + int lkbde_get_num_devices(int type) { @@ -4820,6 +4847,7 @@ LKM_EXPORT_SYM(lkbde_get_hw_dev); LKM_EXPORT_SYM(lkbde_get_dma_dev); LKM_EXPORT_SYM(lkbde_irq_mask_set); LKM_EXPORT_SYM(lkbde_irq_mask_get); +LKM_EXPORT_SYM(lkbde_irq_status_get); LKM_EXPORT_SYM(lkbde_get_dev_phys_hi); LKM_EXPORT_SYM(lkbde_dev_state_set); LKM_EXPORT_SYM(lkbde_dev_state_get); diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c index bdb8d121b8c3..5c2c90a42939 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: linux_dma.c,v 1.414 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: linux_dma.c,v 1.414 Broadcom SDK $ - * $Copyright: (c) 2016 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * * * Linux Kernel BDE DMA memory allocation * diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c index dd003e1f9297..f8bd381eee20 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2014 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * * */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h index ef4b49dc2124..a37cc20a9672 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2014 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * * */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c b/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c index 4c2db5e4de6c..4f2dbe019e69 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: mpool.c,v 1.18 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: mpool.c,v 1.18 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * */ #include diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile index 633475c2590e..c5b31c9e4a2d 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile @@ -1,33 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.1 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # LOCALDIR = systems/bde/linux/user/kernel @@ -55,6 +52,7 @@ build: kernel_libs $(MODULE) endif KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../kernel/kernel_module/Module.symvers +export KBUILD_EXTRA_SYMBOLS $(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ @@ -63,7 +61,6 @@ $(KMODULE): $(MODULE) rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile - cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko endif diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c index deff8954665b..f0eee1e118b0 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c @@ -1,17 +1,29 @@ /* - * Copyright 2017 Broadcom - * + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as * published by the Free Software Foundation (the "GPL"). - * + * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License version 2 (GPLv2) for more details. - * + * * You should have received a copy of the GNU General Public License * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * */ /* @@ -122,12 +134,18 @@ be made. #define CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_DELAY_REG0 (0x0292C3b0) #define CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_DELAY_BASE (CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_DELAY_REG0) #define CMICX_GEN2_PAXB_0_PCIE_ERROR_STATUS (0x0292C024) -#define CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_REG0 (0x0292D100) +#define CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_REG0 (0x0292d150) #define CMICX_GEN2_PAXB_0_INTC_INTR_STATUS_REG0 (0x0292D1A0) #define CMICX_GEN2_PAXB_0_INTC_INTR_RAW_STATUS_REG0 (0x0292D178) +#define CMICX_GEN2_PAXB_0_INTC_SET_INTR_ENABLE_REG0 (0x0292d100) +#define CMICX_GEN2_PAXB_0_INTC_CLEAR_INTR_ENABLE_REG0 (0x0292d128) + #define CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_BASE (CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_REG0) #define CMICX_GEN2_PAXB_0_INTC_INTR_STATUS_BASE (CMICX_GEN2_PAXB_0_INTC_INTR_STATUS_REG0) #define CMICX_GEN2_PAXB_0_INTC_INTR_RAW_STATUS_BASE (CMICX_GEN2_PAXB_0_INTC_INTR_RAW_STATUS_REG0) +#define CMICX_GEN2_PAXB_0_INTC_INTR_SET_ENABLE_BASE (CMICX_GEN2_PAXB_0_INTC_SET_INTR_ENABLE_REG0) +#define CMICX_GEN2_PAXB_0_INTC_INTR_CLEAR_ENABLE_BASE (CMICX_GEN2_PAXB_0_INTC_CLEAR_INTR_ENABLE_REG0) + #define CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0 5 #define CMICX_GEN2_INTC_PDMA_INTR_REG_IND_1 6 @@ -154,9 +172,10 @@ be made. #define HX5_IHOST_INTR_STATUS_MAP_NUM (INTC_INTR_REG_NUM * (sizeof(uint32))) #define IRQ_BIT(intr) (intr % (sizeof(uint32)*8)) #define IRQ_MASK_INDEX(intr) (intr / (sizeof(uint32)*8)) -#define HX5_SW_PROG_INTR_PRIORITY 73 -#define INTR_SW_PROG_INTR_BITPOS (1 << IRQ_BIT(HX5_SW_PROG_INTR_PRIORITY)) -#define INTC_SW_PROG_INTR_REG_IND IRQ_MASK_INDEX(HX5_SW_PROG_INTR_PRIORITY) +#define P19_SW_PROG_INTR_IRQ 69 +#define HX5_SW_PROG_INTR_IRQ 73 +#define INTR_SW_PROG_INTR_BITPOS (1 << IRQ_BIT(ihost_sw_prog_intr_num)) +#define INTC_SW_PROG_INTR_REG_IND IRQ_MASK_INDEX(ihost_sw_prog_intr_num) #define HX5_CHIP_INTR_LOW_PRIORITY 119 #define INTR_LOW_PRIORITY_BITPOS (1 << IRQ_BIT(HX5_CHIP_INTR_LOW_PRIORITY)) #define INTC_LOW_PRIORITY_INTR_REG_IND IRQ_MASK_INDEX(HX5_CHIP_INTR_LOW_PRIORITY) @@ -198,6 +217,7 @@ be made. static uint32 *ihost_intr_status_base = NULL; static uint32 *ihost_intr_enable_base = NULL; +static int ihost_sw_prog_intr_num = HX5_SW_PROG_INTR_IRQ; /* Module parameter for Interruptible timeout */ static int intr_timeout = 0; @@ -228,6 +248,8 @@ typedef void (*isr_f)(void *); typedef struct _intr_regs_s { uint32 intc_intr_status_base; uint32 intc_intr_enable_base; + uint32 intc_intr_set_enable_base; + uint32 intc_intr_clear_enable_base; uint32 intc_intr_raw_status_base; uint32 intc_intr_clear_0; uint32 intc_intr_clear_1; @@ -339,7 +361,7 @@ static _dma_pool_t _dma_pool; * Returns: * Nothing */ -static void +static void _cmic_interrupt(bde_ctrl_t *ctrl) { int d; @@ -650,6 +672,7 @@ _cmicx_gen2_interrupt(bde_ctrl_t *ctrl) uint32 stat, iena, mask, fmask; int active_interrupts = 0; bde_inst_resource_t *res; + uint32 intrs = 0; intr_count++; d = (((uint8 *)ctrl - (uint8 *)_devices) / sizeof (bde_ctrl_t)); @@ -664,25 +687,44 @@ _cmicx_gen2_interrupt(bde_ctrl_t *ctrl) } lkbde_irq_mask_get(d, &mask, &fmask); - for (ind = 0; ind < CMICX_GEN2_INTC_INTR_REG_NUM; ind++) { - IPROC_READ(d, ctrl->intr_regs.intc_intr_status_base + 4 * ind, stat); - if (stat == 0) { - continue; - } - if (fmask) { - /** Packet DMA 8 - 31 bits on IPROC_IRQ_BASE5 */ - if ((ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0) && !(stat & 0xFF)) { - continue; - } else if ((ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_1) && !(stat & 0xFFFFFF00)) { - /** Packet DMA 0 - 7 bits on IPROC_IRQ_BASE6 */ - continue; + if (fmask) { + /* + * Packet DMA occupies 8 - 31 bits on IPROC_IRQ_BASE5, KNET only uses 8 - 23 bits for CMC0 currently + * Prioritizing IPROC_IRQ_BASE5 when ONLY Packet DMA interrupts are raised + */ + IPROC_READ(d, ctrl->intr_regs.intc_intr_status_base + 4 * CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0, stat); + IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0, iena); + intrs = stat & iena; + if (intrs && (intrs == (intrs & fmask))) { + IPROC_WRITE(d, ctrl->intr_regs.intc_intr_clear_enable_base + (4 * CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0), 0xFFFFFFFF); + IPROC_WRITE(d, ctrl->intr_regs.intc_intr_set_enable_base + (4 * CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0), 0x0); + + for (ind = 0; ind < CMICX_GEN2_INTC_INTR_REG_NUM; ind++) { + if (ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0) { + continue; + } + IPROC_READ(d, ctrl->intr_regs.intc_intr_status_base + 4 * ind, stat); + IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * ind, iena); + if (stat & iena) { + active_interrupts = 1; + break; + } } - } - IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * ind, iena); - if (stat & iena) { + } else if (intrs) { active_interrupts = 1; - break; + } + } else { + for (ind = 0; ind < CMICX_GEN2_INTC_INTR_REG_NUM; ind++) { + IPROC_READ(d, ctrl->intr_regs.intc_intr_status_base + 4 * ind, stat); + if (stat == 0) { + continue; + } + IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * ind, iena); + if (stat & iena) { + active_interrupts = 1; + break; + } } } @@ -696,19 +738,11 @@ _cmicx_gen2_interrupt(bde_ctrl_t *ctrl) * enumerates the interrupts to be serviced */ for (ind = 0; ind < CMICX_GEN2_INTC_INTR_REG_NUM; ind++) { - if (fmask) { - /** TODO? change by KNET */ - if (ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0) { - IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * ind, iena); - IPROC_WRITE(d, ctrl->intr_regs.intc_intr_enable_base + (4 * ind), iena & ((fmask & 0xFFFFFF) << 8)); - continue; - } else if (ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_1) { - IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * ind, iena); - IPROC_WRITE(d, ctrl->intr_regs.intc_intr_enable_base + (4 * ind), iena & ((fmask & 0xFF) << 24)); - continue; - } + if (fmask && (intrs == (intrs & fmask)) && ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0) { + continue; } - IPROC_WRITE(d, ctrl->intr_regs.intc_intr_enable_base + (4 * ind), 0); + IPROC_WRITE(d, ctrl->intr_regs.intc_intr_clear_enable_base + (4 * ind), 0xFFFFFFFF); + IPROC_WRITE(d, ctrl->intr_regs.intc_intr_set_enable_base + (4 * ind), 0); } /* Notify */ @@ -1024,7 +1058,7 @@ _cmicd_interrupt(bde_ctrl_t *ctrl) /* The actual interrupt handler of ethernet devices */ -static void +static void _ether_interrupt(bde_ctrl_t *ctrl) { SSOC_WRITEL(0, ctrl->ba + 0x024/4); @@ -1047,6 +1081,9 @@ static struct _intr_mode_s { { (isr_f)_cmicd_interrupt, "CMICd" }, { (isr_f)_cmicd_cmc0_interrupt, "CMICd CMC0" }, { (isr_f)_cmicx_interrupt, "CMICx" }, +#ifdef NEED_CMICX_GEN2_INTERRUPT + { (isr_f)_cmicx_gen2_interrupt, "CMICx Gen2" }, +#endif { NULL, NULL } }; @@ -1082,10 +1119,24 @@ _intr_regs_init(bde_ctrl_t *ctrl, int flag) ctrl->intr_regs.intc_intr_clear_delay_base = HX5_PAXB_0_PAXB_IC_INTRCLR_DELAY_BASE; ctrl->intr_regs.intc_intr_pcie_err_status = HX5_PAXB_0_PCIE_ERROR_STATUS; ctrl->intr_regs.intc_intr_nof_regs = INTC_INTR_REG_NUM; + if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { + switch (ctrl->devid) { + case BCM53650_DEVICE_ID: + case BCM53651_DEVICE_ID: + case BCM53652_DEVICE_ID: + case BCM53653_DEVICE_ID: + ihost_sw_prog_intr_num = P19_SW_PROG_INTR_IRQ; + break; + default: + break; + } + } } else if (flag == 2){ ctrl->intr_regs.intc_intr_status_base = CMICX_GEN2_PAXB_0_INTC_INTR_STATUS_BASE; ctrl->intr_regs.intc_intr_raw_status_base = CMICX_GEN2_PAXB_0_INTC_INTR_RAW_STATUS_BASE; ctrl->intr_regs.intc_intr_enable_base = CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_BASE; + ctrl->intr_regs.intc_intr_set_enable_base = CMICX_GEN2_PAXB_0_INTC_INTR_SET_ENABLE_BASE; + ctrl->intr_regs.intc_intr_clear_enable_base = CMICX_GEN2_PAXB_0_INTC_INTR_CLEAR_ENABLE_BASE; ctrl->intr_regs.intc_intr_clear_0 = CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_0; ctrl->intr_regs.intc_intr_clear_1 = CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_1; ctrl->intr_regs.intc_intr_clear_mode_0 = CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_MODE_0; @@ -1227,6 +1278,10 @@ _devices_init(int d) case BCM56175_DEVICE_ID: case BCM56176_DEVICE_ID: case BCM53642_DEVICE_ID: + case BCM53650_DEVICE_ID: + case BCM53651_DEVICE_ID: + case BCM53652_DEVICE_ID: + case BCM53653_DEVICE_ID: ctrl->isr = (isr_f)_cmicx_interrupt; if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { if (!ihost_intr_enable_base) { @@ -1291,11 +1346,13 @@ _devices_init(int d) #ifdef BCM_DNX3_SUPPORT case JERICHO3_DEVICE_ID: - case Q4_DEVICE_ID: + case J3AI_DEVICE_ID: + + case Q3D_DEVICE_ID: #endif #ifdef BCM_DNXF3_SUPPORT - case BCM88910_DEVICE_ID: - case BCM88920_DEVICE_ID: + case RAMON2_DEVICE_ID: + case RAMON3_DEVICE_ID: #endif #if defined(BCM_DNX3_SUPPORT) || defined(BCM_DNXF3_SUPPORT) ctrl->isr = (isr_f)_cmicx_gen2_interrupt; @@ -1438,6 +1495,9 @@ _pprint(struct seq_file *m) uint32 state, instid; pprintf(m, "Broadcom Device Enumerator (%s)\n", LINUX_USER_BDE_NAME); +#ifdef LKM_BUILD_INFO + pprintf(m, "%s\n", LKM_BUILD_INFO); +#endif for (idx = 0; idx < user_bde->num_devices(BDE_ALL_DEVICES); idx++) { name = _intr_mode_str(_devices[idx].isr); if (name == NULL) { @@ -1477,7 +1537,7 @@ _pprint(struct seq_file *m) } #ifdef BCM_INSTANCE_SUPPORT -/* +/* * Allocate the DMA resource from DMA pool * Parameter : * dma_size (IN): allocate dma_size in MB @@ -1527,7 +1587,7 @@ _dma_resource_get(unsigned inst_id, phys_addr_t *cpu_pbase, phys_addr_t *dma_pba /* * Checks if we have the instance in _bde_inst_resource. If not, return LUBDE_SUCCESS==0 (considered a new instance). * If it exists with the same dmasize, return 1 (It is considered already in use) - * Otherwise if the device with the same index of the resource, has resource/instance index 0, return LUBDE_SUCCESS==0. (bug) + * Otherwise if the device with the same index of the resource, has resource/instance index 0, return LUBDE_SUCCESS==0. (error) * Otherwise return LUBDE_FAIL==-1 (It is considered to exist with a different dmasize). */ static int @@ -1612,7 +1672,7 @@ _instance_attach(unsigned int inst_id, unsigned int dma_size, linux_bde_device_b _bde_inst_resource->is_active = 0; /*_bde_inst_resource->dev will not be used when _bde_inst_resource->is_active == 0 */ } - + /* Validate the resource with inst_devices */ exist = _instance_validate(inst_id, dma_size, inst_devices); @@ -1694,7 +1754,7 @@ _edk_instance_attach(unsigned int inst_id, unsigned int dma_size) * Returns: * 0 on success, <0 on error */ -static int +static int _ioctl(unsigned int cmd, unsigned long arg) { lubde_ioctl_t io; @@ -1708,9 +1768,9 @@ _ioctl(unsigned int cmd, unsigned long arg) if (copy_from_user(&io, (void *)arg, sizeof(io))) { return -EFAULT; } - + io.rc = LUBDE_SUCCESS; - + switch(cmd) { case LUBDE_VERSION: io.d0 = KBDE_VERSION; @@ -1832,7 +1892,7 @@ _ioctl(unsigned int cmd, unsigned long arg) /* FIXME: for multiple chips */ if (!_devices[io.dev].enabled) { user_bde->interrupt_connect(io.dev, - (void(*)(void *))_ether_interrupt, + (void(*)(void *))_ether_interrupt, _devices+io.dev); _devices[io.dev].enabled = 1; } @@ -1880,7 +1940,7 @@ _ioctl(unsigned int cmd, unsigned long arg) if (_devices[io.dev].dev_type & BDE_SWITCH_DEV_TYPE) { res = &_bde_inst_resource[_devices[io.dev].inst]; #ifdef BDE_LINUX_NON_INTERRUPTIBLE - wait_event_timeout(res->intr_wq, + wait_event_timeout(res->intr_wq, atomic_read(&res->intr) != 0, 100); #else @@ -1913,21 +1973,21 @@ _ioctl(unsigned int cmd, unsigned long arg) atomic_read(&res->intr) != 0); } #endif - /* - * Even if we get multiple interrupts, we + /* + * Even if we get multiple interrupts, we * only run the interrupt handler once. */ atomic_set(&res->intr, 0); } else { #ifdef BDE_LINUX_NON_INTERRUPTIBLE - wait_event_timeout(_ether_interrupt_wq, + wait_event_timeout(_ether_interrupt_wq, atomic_read(&_ether_interrupt_has_taken_place) != 0, 100); #else - wait_event_interruptible(_ether_interrupt_wq, + wait_event_interruptible(_ether_interrupt_wq, atomic_read(&_ether_interrupt_has_taken_place) != 0); #endif - /* + /* * Even if we get multiple interrupts, we * only run the interrupt handler once. */ @@ -1983,14 +2043,21 @@ _ioctl(unsigned int cmd, unsigned long arg) /* CMICx device */ if (_devices[io.dev].isr == (isr_f)_cmicx_interrupt) { io.rc = lkbde_irq_mask_set(io.dev + LKBDE_IPROC_REG, io.d0, io.d1, 0); - } else { + } +#ifdef NEED_CMICX_GEN2_INTERRUPT + else if (_devices[io.dev].isr == (isr_f)_cmicx_gen2_interrupt) + { + io.rc = lkbde_irq_mask_set(io.dev | LKBDE_IPROC_REG, io.d0, io.d1, 0); + } +#endif + else { io.rc = lkbde_irq_mask_set(io.dev, io.d0, io.d1, 0); } break; case LUBDE_SPI_READ_REG: if (user_bde->spi_read(io.dev, io.d0, io.dx.buf, io.d1) == -1) { io.rc = LUBDE_FAIL; - } + } break; case LUBDE_SPI_WRITE_REG: if (user_bde->spi_write(io.dev, io.d0, io.dx.buf, io.d1) == -1) { @@ -2097,15 +2164,15 @@ _ioctl(unsigned int cmd, unsigned long arg) /* Workaround for broken Busybox/PPC insmod */ static char _modname[] = LINUX_USER_BDE_NAME; -static gmodule_t _gmodule = +static gmodule_t _gmodule = { - .name = LINUX_USER_BDE_NAME, - .major = LINUX_USER_BDE_MAJOR, - .init = _init, - .cleanup = _cleanup, - .pprint = _pprint, + .name = LINUX_USER_BDE_NAME, + .major = LINUX_USER_BDE_MAJOR, + .init = _init, + .cleanup = _cleanup, + .pprint = _pprint, .ioctl = _ioctl, -}; +}; gmodule_t* gmodule_get(void) diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h index 4bd4b746c521..1716c31b2b54 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h +++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: linux-user-bde.h,v 1.23 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: linux-user-bde.h,v 1.23 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * */ #ifndef __LINUX_USER_BDE_H__ diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h index 2d0651191fbb..82f141a1eef0 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2014 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * * */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h index 4b71b8f16ee3..b5277d09c606 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2014 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * * */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h index a51dd2ac6f5f..9e1f7303285c 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2015 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * * */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h index a0b88494823f..b1f2614ff889 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2014 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * * */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c index ca8024c78a32..0596775a045c 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2014 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * * */ @@ -349,7 +346,7 @@ shbde_iproc_pci_read(shbde_hal_t *shbde, void *iproc_regs, unsigned int addr) { unsigned int subwin_base; - void *reg; + void *reg = 0; shbde_iproc_config_t *icfg = &shbde->icfg; if (!iproc_regs) { @@ -359,16 +356,29 @@ shbde_iproc_pci_read(shbde_hal_t *shbde, void *iproc_regs, /* Sub-window size is 0x1000 (4K) */ subwin_base = (addr & ~0xfff); - if((icfg->cmic_ver >= 4) && - ((subwin_base == 0x10230000) || (subwin_base == 0x18012000))) { - /* Route the PAXB register through IMAP0_2 */ - reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff)); - } else if((icfg->cmic_ver >= 4) && - ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) { - /* Route the INTC block access through IMAP0_6 */ - reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff)); + if (icfg->iproc_ver >= 20) { + if (subwin_base == 0x292c000) { + /* Route PAXB register through IMAP0_2 */ + reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff)); + } else if (subwin_base == 0x292d000) { + /* Route INTC register through IMAP0_6 */ + reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff)); + } } else { - /* Update base address for sub-window 7 */ + if((icfg->cmic_ver >= 4) && + ((subwin_base == 0x10230000) || (subwin_base == 0x18012000))) { + /* Route the PAXB register through IMAP0_2 */ + reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff)); + } else if((icfg->cmic_ver >= 4) && + ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) { + /* Route the INTC block access through IMAP0_6 */ + reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff)); + } + } + + /* Not found fixed sub-window, reuse the sub-window 7 */ + if (0 == reg) { + /* Update base address for sub-window 7 */ subwin_base |= 1; /* Valid bit */ reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_7); iproc32_write(shbde, reg, subwin_base); @@ -400,7 +410,7 @@ shbde_iproc_pci_write(shbde_hal_t *shbde, void *iproc_regs, unsigned int addr, unsigned int data) { unsigned int subwin_base; - void *reg; + void *reg = 0; shbde_iproc_config_t *icfg = &shbde->icfg; if (!iproc_regs) { @@ -410,16 +420,29 @@ shbde_iproc_pci_write(shbde_hal_t *shbde, void *iproc_regs, /* Sub-window size is 0x1000 (4K) */ subwin_base = (addr & ~0xfff); - if((icfg->cmic_ver >= 4) && - ((subwin_base == 0x10230000) || (subwin_base == 0x18012000))) { - /* Route the PAXB register through IMAP0_2 */ - reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff)); - } else if((icfg->cmic_ver >= 4) && - ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) { - /* Route the INTC block access through IMAP0_6 */ - reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff)); + if (icfg->iproc_ver >= 20) { + if (subwin_base == 0x292c000) { + /* Route PAXB register through IMAP0_2 */ + reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff)); + } else if (subwin_base == 0x292d000) { + /* Route INTC register through IMAP0_6 */ + reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff)); + } } else { - /* Update base address for sub-window 7 */ + if((icfg->cmic_ver >= 4) && + ((subwin_base == 0x10230000) || (subwin_base == 0x18012000))) { + /* Route the PAXB register through IMAP0_2 */ + reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff)); + } else if((icfg->cmic_ver >= 4) && + ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) { + /* Route the INTC block access through IMAP0_6 */ + reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff)); + } + } + + /* Not found fixed sub-window */ + if (0 == reg) { + /* Update base address for sub-window 7 */ subwin_base |= 1; /* Valid bit */ reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_7); iproc32_write(shbde, reg, subwin_base); diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c index 1e38eb024adc..e5e8c6dc7ab5 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2015 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * * */ diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c index 8e64b475a41f..869d4b169c22 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c +++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: $ - * $Copyright: (c) 2014 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * * */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile index b599580ae861..74591ad787f1 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile @@ -1,33 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.10 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # # Makefile for SOC SAL support # diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile new file mode 100644 index 000000000000..c12c4e0b6011 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile @@ -0,0 +1,91 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.3 Broadcom SDK $ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +LOCALDIR = systems/linux/kernel/modules/bcm-genl + +include ${SDK}/make/Make.config + +LIBS = $(LIBDIR)/libkern.a +ifndef DCBDIR +DCBDIR = $(SDK)/systems/linux/kernel/modules/dcb +# $(error 'The $$DCBDIR variable is not set') +endif +ifeq (1,$(NO_PRECOMPILED_MODULE)) +$(error 'DCB_LIB build is not supported if NO_PRECOMPILED_MODULE=1') +endif +LIBS += $(LIBDIR)/libdcb.a +CFLAGS += -DDCBLIB_SUPPORT -I$(DCBDIR)/include +ifeq (1,$(BUILD_GENL_PACKET)) +CFLAGS += -I${SDK}/systems/linux/kernel/modules/include/kernel +endif + +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := linux-bcm-genl +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +# BCM Network Device +# { +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../bcm-knet/kernel_module/Module.symvers +ifeq (1,$(BUILD_GENL_PACKET)) +KBUILD_EXTRA_SYMBOLS += ${BLDDIR}/../genl-packet/kernel_module/Module.symvers +endif +export KBUILD_EXTRA_SYMBOLS + +build: $(MODULE) $(KMODULE) +# +# This is for the compilation of the 'precompiled' object. We keep it +# here for compatibility. +# +$(LIBDIR)/libdcb.a: + $(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) \ + KADD_CFLAGS="-I${SDK}/systems/linux/kernel/modules/include $(KFLAGS) -D$(ENDIAN)" \ + CROSS_COMPILE=$(CROSS_COMPILE) + +$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ + +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko +# } + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. + +include ${SDK}/make/Make.depend + +clean:: + $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o + $(RM) $(BOBJS) $(MODULE) + $(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) clean + +.PHONY: build diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c new file mode 100644 index 000000000000..7e0d85e3ed5d --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c @@ -0,0 +1,199 @@ +/* + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + */ + +/* + * Middle-driver for communication between Linux KNET driver and + * drivers support Generic Netlink channel. + * + * This code is used to provide the device information. + * This driver is built with the DCB library as the helper for parsing + * the RX packet meta data from the Linux KNET driver filter call-back function. + * The environment DCBDIR must be set to indicate the directroy of the DCB + * library. + */ + +#include /* Must be included first */ +#include +#include +#include + +#include + +#include "bcm-genl-dev.h" + +/* Module header Op-Codes */ +#define SOC_HIGIG_OP_CPU 0x00 /* CPU Frame */ +#define SOC_HIGIG_OP_UC 0x01 /* Unicast Frame */ +#define SOC_HIGIG_OP_BC 0x02 /* Broadcast or DLF frame */ +#define SOC_HIGIG_OP_MC 0x03 /* Multicast Frame */ +#define SOC_HIGIG_OP_IPMC 0x04 /* IP Multicast Frame */ + +static dcb_handle_t g_dcb_hdl[LINUX_BDE_MAX_DEVICES]; + +static dcb_handle_t * +dcb_handle_get(int dev_no) +{ + uint16_t dev_id; + uint8_t rev_id; + dcb_handle_t *dcbh; + + if (dev_no >= LINUX_BDE_MAX_DEVICES || dev_no < 0) { + return NULL; + } + + dcbh = &g_dcb_hdl[dev_no]; + if (DCB_OP(dcbh) == NULL) { + if (bkn_hw_device_get(dev_no, &dev_id, &rev_id) < 0) { + return NULL; + } + if (dcb_handle_init(dcbh, dev_id, rev_id) != DCB_OK) { + gprintk("%s: dev id 0x%04x rev id 0x%02x is not supported\n", + __func__, dev_id, rev_id); + return NULL; + } + } + + return DCB_OP(dcbh) ? dcbh : NULL; +} + +int +bcmgenl_dev_pktmeta_rx_srcport_get(int dev_no, void *pkt_meta, + uint32_t *srcport) +{ + dcb_handle_t *dcbh = dcb_handle_get(dev_no); + + if (dcbh == NULL || srcport == NULL) { + return -1; + } + + *srcport = DCB_RX_SRCPORT_GET(dcbh, pkt_meta); + + return 0; +} + +int +bcmgenl_dev_pktmeta_rx_dstport_get(int dev_no, void *pkt_meta, + bool *mcast, uint32_t *dstport) +{ + dcb_handle_t *dcbh = dcb_handle_get(dev_no); + uint32_t opc; + + if (dcbh == NULL || mcast == NULL || dstport == NULL) { + return -1; + } + + opc = DCB_RX_OPCODE_GET(dcbh, pkt_meta); + *mcast = (opc == SOC_HIGIG_OP_CPU || opc == SOC_HIGIG_OP_UC) ? 0 : 1; + if (*mcast) { + *dstport = 0; + } else { + *dstport = DCB_RX_DESTPORT_GET(dcbh, pkt_meta); + } + + return 0; +} + +int +bcmgenl_dev_pktmeta_rx_reason_get(int dev_no, void *pkt_meta, uint64_t *reason) +{ + dcb_handle_t *dcbh = dcb_handle_get(dev_no); + + if (dcbh == NULL || reason == NULL) { + return -1; + } + + *reason = (uint64_t)DCB_RX_REASON_HI_GET(dcbh, pkt_meta) << 32; + *reason |= DCB_RX_REASON_GET(dcbh, pkt_meta); + + return 0; +} + +int +bcmgenl_dev_rx_reason_sample_source_get(int dev_no, uint64_t *val) +{ + dcb_handle_t *dcbh = dcb_handle_get(dev_no); + soc_rx_reason_t *map; + int idx = 0; + + if (dcbh == NULL || val == NULL) { + return -1; + } + *val = 0; + + if (DCB_TYPE(dcbh) == 38) { + /* Rx reason for SampleSouce is an encoded value (3) in bits [17:16] */ + *val = 0x30000; + } else { + map = DCB_OP(dcbh)->rx_reason_maps[0]; + do { + if (map[idx] == socRxReasonSampleSource) { + *val = (uint64_t)1 << idx; + break; + } + } while (map[++idx] != socRxReasonInvalid); + } + + if (*val == 0) { + gprintk("%s: No rx reasone sample source for dcb type %d\n", + __func__, DCB_TYPE(dcbh)); + return -1; + } + return 0; +} + +int +bcmgenl_dev_dcb_info_get(int dev_no, int *dcb_type, int *dcb_size) +{ + dcb_handle_t *dcbh = dcb_handle_get(dev_no); + + if (dcbh == NULL) { + return -1; + } + + if (dcb_type) { + *dcb_type = DCB_TYPE(dcbh); + } + if (dcb_size) { + *dcb_size = DCB_SIZE(dcbh); + } + + return 0; +} + +int +bcmgenl_dev_init(void) +{ + memset(g_dcb_hdl, 0, sizeof(g_dcb_hdl)); + return 0; +} + +int +bcmgenl_dev_cleanup(void) +{ + return 0; +} diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h new file mode 100644 index 000000000000..edff871d1df4 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h @@ -0,0 +1,55 @@ +/* + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + */ + +#ifndef __BCM_GENL_DEV_H__ +#define __BCM_GENL_DEV_H__ + +extern int +bcmgenl_dev_pktmeta_rx_srcport_get(int dev_no, void *pkt_meta, + uint32_t *srcport); + +extern int +bcmgenl_dev_pktmeta_rx_dstport_get(int dev_no, void *pkt_meta, + bool *mcast, uint32_t *dstport); + +extern int +bcmgenl_dev_pktmeta_rx_reason_get(int dev_no, void *pkt_meta, uint64_t *reason); + +extern int +bcmgenl_dev_rx_reason_sample_source_get(int dev_no, uint64_t *val); + +extern int +bcmgenl_dev_dcb_info_get(int dev_no, int *dcb_type, int *dcb_size); + +extern int +bcmgenl_dev_init(void); + +extern int +bcmgenl_dev_cleanup(void); + +#endif /* __BCM_GENL_DEV_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c new file mode 100644 index 000000000000..b8eb60148ecd --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c @@ -0,0 +1,293 @@ +/* + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + */ + +/* + * Middle-driver for communication between Linux KNET driver and + * drivers support Generic Netlink channel. + * + * This code is to handle the NET interfaces from the create and destroy + * call-back functios of Linux KNET driver. + */ + +#include /* Must be included first */ +#include +#include +#include +#include +#include +#include +#include "bcm-genl-netif.h" + +/* generic netlink interface info */ +typedef struct { + struct list_head netif_list; + int netif_count; + spinlock_t lock; +} genl_netif_info_t; +static genl_netif_info_t g_netif_info; + +typedef struct { + struct list_head list; + bcmgenl_netif_t netif; +} genl_netif_t; + +static uint32 g_sample_rate; +static uint32 g_sample_size; + +static int +knet_netif_create_cb(struct net_device *dev, int dev_no, kcom_netif_t *netif) +{ + int found = 0; + struct list_head *list_ptr; + genl_netif_t *genl_netif, *lgenl_netif; + bcmgenl_netif_t *bcmgenl_netif; + unsigned long flags; + + if ((genl_netif = kmalloc(sizeof(genl_netif_t), GFP_ATOMIC)) == NULL) { + gprintk("%s: failed to alloc genl-netif memory for netif '%s'\n", + __func__, dev->name); + return -1; + } + + bcmgenl_netif = &genl_netif->netif; + bcmgenl_netif->dev = dev; + bcmgenl_netif->id = netif->id; + bcmgenl_netif->port = netif->port; + bcmgenl_netif->vlan = netif->vlan; + bcmgenl_netif->qnum = netif->qnum; + bcmgenl_netif->sample_rate = g_sample_rate; + bcmgenl_netif->sample_size = g_sample_size; + + /* insert netif sorted by ID similar to bkn_knet_netif_create() */ + spin_lock_irqsave(&g_netif_info.lock, flags); + + list_for_each(list_ptr, &g_netif_info.netif_list) { + lgenl_netif = list_entry(list_ptr, genl_netif_t, list); + bcmgenl_netif = &lgenl_netif->netif; + if (netif->id < bcmgenl_netif->id) { + found = 1; + break; + } + } + if (found) { + /* Replace previously removed interface */ + list_add_tail(&genl_netif->list, &lgenl_netif->list); + } else { + /* No holes - add to end of list */ + list_add_tail(&genl_netif->list, &g_netif_info.netif_list); + } + g_netif_info.netif_count++; + + spin_unlock_irqrestore(&g_netif_info.lock, flags); + + return 0; +} + +static int +knet_netif_destroy_cb(struct net_device *dev, int dev_no, kcom_netif_t *netif) +{ + int found = 0; + struct list_head *list_ptr, *list_next; + genl_netif_t *genl_netif; + bcmgenl_netif_t *bcmgenl_netif; + unsigned long flags; + + if (!netif || !dev) { + gprintk("%s: netif or net_device is NULL\n", __func__); + return -1; + } + + spin_lock_irqsave(&g_netif_info.lock, flags); + list_for_each_safe(list_ptr, list_next, &g_netif_info.netif_list) { + genl_netif = list_entry(list_ptr, genl_netif_t, list); + bcmgenl_netif = &genl_netif->netif; + if (netif->id == bcmgenl_netif->id) { + found = 1; + list_del(list_ptr); + g_netif_info.netif_count--; + break; + } + } + spin_unlock_irqrestore(&g_netif_info.lock, flags); + + if (!found) { + gprintk("%s: netif ID %d not found!\n", __func__, netif->id); + return -1; + } + kfree(genl_netif); + return 0; +} + +int +bcmgenl_netif_search(char *dev_name, + bcmgenl_netif_search_f cb, void *cb_data) +{ + struct list_head *list_ptr; + genl_netif_t *genl_netif; + bcmgenl_netif_t *bcmgenl_netif; + unsigned long flags; + int rv; + int cnt = 0; + + if (cb == NULL) { + return -1; + } + + spin_lock_irqsave(&g_netif_info.lock, flags); + list_for_each(list_ptr, &g_netif_info.netif_list) { + genl_netif = list_entry(list_ptr, genl_netif_t, list); + bcmgenl_netif = &genl_netif->netif; + if (dev_name && strcmp(bcmgenl_netif->dev->name, dev_name) != 0) { + continue; + } + rv = cb(cb_data, bcmgenl_netif); + if (rv < 0) { + spin_unlock_irqrestore(&g_netif_info.lock, flags); + return rv; + } + cnt++; + } + spin_unlock_irqrestore(&g_netif_info.lock, flags); + + return cnt; +} + +int +bcmgenl_netif_num_get(void) +{ + int num = 0; + unsigned long flags; + + spin_lock_irqsave(&g_netif_info.lock, flags); + num = g_netif_info.netif_count; + spin_unlock_irqrestore(&g_netif_info.lock, flags); + + return num; +} + +int +bcmgenl_netif_get_by_ifindex(int ifindex, bcmgenl_netif_t *bcmgenl_netif) +{ + struct list_head *list_ptr; + genl_netif_t *genl_netif; + bcmgenl_netif_t *netif; + unsigned long flags; + + if (bcmgenl_netif == NULL) { + return -1; + } + + /* look for port from list of available net_devices */ + spin_lock_irqsave(&g_netif_info.lock, flags); + list_for_each(list_ptr, &g_netif_info.netif_list) { + genl_netif = list_entry(list_ptr, genl_netif_t, list); + netif = &genl_netif->netif; + if (netif->dev->ifindex == ifindex) { + memcpy(bcmgenl_netif, netif, sizeof(*bcmgenl_netif)); + spin_unlock_irqrestore(&g_netif_info.lock, flags); + return 0; + } + } + spin_unlock_irqrestore(&g_netif_info.lock, flags); + + return -1; +} + +int +bcmgenl_netif_get_by_port(int port, bcmgenl_netif_t *bcmgenl_netif) +{ + struct list_head *list_ptr; + genl_netif_t *genl_netif; + bcmgenl_netif_t *netif; + unsigned long flags; + + if (bcmgenl_netif == NULL) { + return -1; + } + + /* look for port from list of available net_devices */ + spin_lock_irqsave(&g_netif_info.lock, flags); + list_for_each(list_ptr, &g_netif_info.netif_list) { + genl_netif = list_entry(list_ptr, genl_netif_t, list); + netif = &genl_netif->netif; + if (netif->port == port) { + memcpy(bcmgenl_netif, netif, sizeof(bcmgenl_netif_t)); + spin_unlock_irqrestore(&g_netif_info.lock, flags); + return 0; + } + } + spin_unlock_irqrestore(&g_netif_info.lock, flags); + + return -1; +} + +int +bcmgenl_netif_default_sample_set(int sample_rate, int sample_size) +{ + if (sample_rate >= 0) { + g_sample_rate = sample_rate; + } + if (sample_size >= 0) { + g_sample_size = sample_size; + } + + return 0; +} + +int +bcmgenl_netif_init(void) +{ + memset(&g_netif_info, 0, sizeof(genl_netif_info_t)); + + INIT_LIST_HEAD(&g_netif_info.netif_list); + spin_lock_init(&g_netif_info.lock); + + bkn_netif_create_cb_register(knet_netif_create_cb); + bkn_netif_destroy_cb_register(knet_netif_destroy_cb); + + return 0; +} + +int +bcmgenl_netif_cleanup(void) +{ + genl_netif_t *genl_netif; + + bkn_netif_create_cb_unregister(knet_netif_create_cb); + bkn_netif_destroy_cb_unregister(knet_netif_destroy_cb); + + while (!list_empty(&g_netif_info.netif_list)) { + genl_netif = list_entry(g_netif_info.netif_list.next, + genl_netif_t, list); + list_del(&genl_netif->list); + kfree(genl_netif); + } + + return 0; +} + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h new file mode 100644 index 000000000000..2a7c31cee277 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h @@ -0,0 +1,69 @@ +/* + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + */ + +#ifndef __BCM_GENL_NETIF_H__ +#define __BCM_GENL_NETIF_H__ + +#include + +/* generic netlink data per interface */ +typedef struct { + struct net_device *dev; + unsigned short id; + unsigned char port; + unsigned short vlan; + unsigned short qnum; + unsigned int sample_rate; + unsigned int sample_size; +} bcmgenl_netif_t; + +typedef int +(*bcmgenl_netif_search_f)(void *cb_data, bcmgenl_netif_t *bcmgenl_netif); + +extern int +bcmgenl_netif_search(char *dev_name, bcmgenl_netif_search_f cb, void *cb_data); + +extern int +bcmgenl_netif_num_get(void); + +extern int +bcmgenl_netif_get_by_ifindex(int ifindex, bcmgenl_netif_t *bcmgenl_netif); + +extern int +bcmgenl_netif_get_by_port(int port, bcmgenl_netif_t *bcmgenl_netif); + +extern int +bcmgenl_netif_default_sample_set(int sample_rate, int sample_size); + +extern int +bcmgenl_netif_init(void); + +extern int +bcmgenl_netif_cleanup(void); + +#endif /* __BCM_GENL_NETIF_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c new file mode 100644 index 000000000000..095c001c5e86 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c @@ -0,0 +1,664 @@ +/* + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + */ + +/* + * Middle-driver for communication between Linux KNET driver and + * drivers support Generic Netlink channel. + * + * This code is used to integrate packet from KNET Rx filter + * call-back function to the genl_packet driver from Google + * for sending packets to userspace applications using Generic Netlink + * interfaces. + * + * This driver is also built with the DCB library as the helper for parsing + * the RX packet meta data from the Linux KNET driver filter call-back function. + * The environment DCBDIR must be set to indicate the directroy of the DCB + * library. + */ +#ifdef BUILD_GENL_PACKET +#include /* Must be included first */ +#include +#include +#include +#include +#include +#include +#include +#include +#ifndef LINUX_HAS_MONOTONIC_TIME +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,17,0) +#include +#define LINUX_HAS_MONOTONIC_TIME +#endif +#endif +#include +#include +#include +#include "bcm-genl-packet.h" +#include "bcm-genl-dev.h" +#include "bcm-genl-netif.h" + +#define GENL_CB_DBG +#ifdef GENL_CB_DBG +static int debug; + +#define DBG_LVL_PRINT 0x1 +#define DBG_LVL_PDMP 0x2 +#define GENL_CB_DBG_PRINT(...) \ + if (debug & DBG_LVL_PRINT) { \ + gprintk(__VA_ARGS__); \ + } +#else +#define GENL_CB_DBG_PRINT(...) +#endif + +/* last should be static or global */ +#ifdef LINUX_HAS_MONOTONIC_TIME +#define genl_limited_gprintk(last, ...) { \ + struct timespec64 tv; \ + ktime_get_ts64(&tv); \ + if (tv.tv_sec != last) { \ + gprintk(__VA_ARGS__); \ + last = tv.tv_sec; \ + } \ +} +#else +#define genl_limited_gprintk(last, ...) { \ + struct timeval tv; \ + do_gettimeofday(&tv); \ + if (tv.tv_sec != last) { \ + gprintk(__VA_ARGS__); \ + last = tv.tv_sec; \ + } \ +} +#endif + +#define FCS_SZ 4 + +#define GENL_QLEN_DFLT 1024 +static int genl_qlen = GENL_QLEN_DFLT; +LKM_MOD_PARAM(genl_qlen, "i", int, 0); +MODULE_PARM_DESC(genl_qlen, +"generic cb queue length (default 1024 buffers)"); + +/* driver proc entry root */ +static struct proc_dir_entry *genl_proc_root = NULL; +static char genl_procfs_path[80]; + +/* generic general info */ +typedef struct { + struct net *netns; +} genl_info_t; +static genl_info_t g_genl_info = {0}; + +/* Maintain sampled pkt statistics */ +typedef struct genl_stats_s { + unsigned long pkts_f_genl_cb; + unsigned long pkts_f_genl_mod; + unsigned long pkts_f_handled; + unsigned long pkts_f_tag_stripped; + unsigned long pkts_f_dst_mc; + unsigned long pkts_f_src_cpu; + unsigned long pkts_f_dst_cpu; + unsigned long pkts_c_qlen_cur; + unsigned long pkts_c_qlen_hi; + unsigned long pkts_d_qlen_max; + unsigned long pkts_d_no_mem; + unsigned long pkts_d_not_ready; + unsigned long pkts_d_metadata; + unsigned long pkts_d_meta_srcport; + unsigned long pkts_d_meta_dstport; + unsigned long pkts_d_invalid_size; +} genl_stats_t; +static genl_stats_t g_genl_stats = {0}; + +typedef struct genl_meta_s { + int src_ifindex; + int dst_ifindex; + uint32 user_data; +} genl_meta_t; + +typedef struct genl_pkt_s { + struct list_head list; + struct net *netns; + genl_meta_t meta; + struct sk_buff *skb; +} genl_pkt_t; + +typedef struct genl_work_s { + struct list_head pkt_list; + struct work_struct wq; + spinlock_t lock; +} genl_work_t; +static genl_work_t g_genl_work; + +static int +genl_meta_srcport_get(int dev_no, void *pkt_meta) +{ + uint32_t p; + + if (bcmgenl_dev_pktmeta_rx_srcport_get(dev_no, pkt_meta, &p) < 0) { + return -1; + } + + return p; +} + +static int +genl_meta_dstport_get(int dev_no, void *pkt_meta, bool *is_mcast) +{ + bool mcast; + uint32_t p; + + if (bcmgenl_dev_pktmeta_rx_dstport_get(dev_no, pkt_meta, &mcast, &p) < 0) { + return -1; + } + if (is_mcast) { + *is_mcast = mcast; + } + + return p; +} + +static int +genl_meta_get(int dev_no, kcom_filter_t *kf, void *pkt_meta, + genl_meta_t *genl_meta) +{ + bool mcast = false; + int srcport, dstport; + int src_ifindex = 0; + int dst_ifindex = 0; + bcmgenl_netif_t bcmgenl_netif; + +#ifdef GENL_CB_DBG + if (debug & 0x1) { + int i=0; + uint8_t *meta = (uint8_t*)pkt_meta; + GENL_CB_DBG_PRINT("%s: generic pkt metadata\n", __func__); + for (i=0; i<64; i+=16) { + GENL_CB_DBG_PRINT("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", + meta[i+0], meta[i+1], meta[i+2], meta[i+3], meta[i+4], meta[i+5], meta[i+6], meta[i+7], + meta[i+8], meta[i+9], meta[i+10], meta[i+11], meta[i+12], meta[i+13], meta[i+14], meta[i+15]); + } + } +#endif + + /* parse pkt metadata for src and dst ports */ + srcport = genl_meta_srcport_get(dev_no, pkt_meta); + dstport = genl_meta_dstport_get(dev_no, pkt_meta, &mcast); + if (srcport == -1 || dstport == -1) { + gprintk("%s: invalid srcport %d or dstport %d\n", __func__, srcport, dstport); + return -1; + } + + /* find src port netif (no need to lookup CPU port) */ + if (srcport != 0) { + if (bcmgenl_netif_get_by_port(srcport, &bcmgenl_netif) == 0) { + src_ifindex = bcmgenl_netif.dev->ifindex; + } else { + src_ifindex = -1; + g_genl_stats.pkts_d_meta_srcport++; + GENL_CB_DBG_PRINT("%s: could not find srcport(%d)\n", __func__, srcport); + } + } else { + g_genl_stats.pkts_f_src_cpu++; + } + + /* set generic dst type for MC pkts */ + if (mcast) { + g_genl_stats.pkts_f_dst_mc++; + /* find dst port netif for UC pkts (no need to lookup CPU port) */ + } else if (dstport != 0) { + if (bcmgenl_netif_get_by_port(dstport, &bcmgenl_netif) == 0) { + dst_ifindex = bcmgenl_netif.dev->ifindex; + } else { + g_genl_stats.pkts_d_meta_dstport++; + GENL_CB_DBG_PRINT("%s: could not find dstport(%d)\n", __func__, dstport); + } + } else if (dstport == 0) { + dst_ifindex = 0; + g_genl_stats.pkts_f_dst_cpu++; + } + + GENL_CB_DBG_PRINT("%s: dstport %d, src_ifindex 0x%x, dst_ifindex 0x%x\n", + __func__, dstport, src_ifindex, dst_ifindex); + + genl_meta->src_ifindex = src_ifindex; + genl_meta->dst_ifindex = dst_ifindex; + return 0; +} + +static void dump_pkt(struct sk_buff *skb) +{ + int idx; + char str[128]; + uint8_t *data = skb->data; + + for (idx = 0; idx < skb->len; idx++) { + if ((idx & 0xf) == 0) { + sprintf(str, "%04x: ", idx); + } + if ((idx & 0xf) == 8) { + sprintf(&str[strlen(str)], "- "); + } + sprintf(&str[strlen(str)], "%02x ", data[idx]); + if ((idx & 0xf) == 0xf) { + sprintf(&str[strlen(str)], "\n"); + gprintk(str); + } + } + if ((idx & 0xf) != 0) { + sprintf(&str[strlen(str)], "\n"); + gprintk(str); + } +} + +static void +genl_task(struct work_struct *work) +{ + genl_work_t *genl_work = container_of(work, genl_work_t, wq); + unsigned long flags; + struct list_head *list_ptr, *list_next; + genl_pkt_t *pkt; + + spin_lock_irqsave(&genl_work->lock, flags); + list_for_each_safe(list_ptr, list_next, &genl_work->pkt_list) { + /* dequeue pkt from list */ + pkt = list_entry(list_ptr, genl_pkt_t, list); + list_del(list_ptr); + g_genl_stats.pkts_c_qlen_cur--; + spin_unlock_irqrestore(&genl_work->lock, flags); + + /* send to genl */ + if (pkt) { + GENL_CB_DBG_PRINT("%s: netns 0x%p, src_ifdx 0x%x, dst_ifdx 0x%x\n", + __func__, pkt->netns, pkt->meta.src_ifindex, + pkt->meta.dst_ifindex); + + if (debug & DBG_LVL_PDMP) { + dump_pkt(pkt->skb); + } + + genl_packet_send_packet(pkt->netns, + pkt->skb, + pkt->meta.src_ifindex, + pkt->meta.dst_ifindex, + pkt->meta.user_data); + g_genl_stats.pkts_f_genl_mod++; + + dev_kfree_skb_any(pkt->skb); + kfree(pkt); + } + spin_lock_irqsave(&genl_work->lock, flags); + } + spin_unlock_irqrestore(&genl_work->lock, flags); +} + +static int +genl_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta, + int chan, kcom_filter_t *kf) +{ + genl_meta_t meta; + int rv = 0; + unsigned long flags; + genl_pkt_t *genl_pkt; + struct sk_buff *skb; + bool strip_tag = false; + static uint32_t last_drop = 0; + static uint32_t last_alloc = 0; + static uint32_t last_skb_fail = 0; + + GENL_CB_DBG_PRINT("%s: pkt size %d, kf->dest_id %d, kf->cb_user_data %d\n", + __func__, size, kf->dest_id, kf->cb_user_data); + + g_genl_stats.pkts_f_genl_cb++; + + /* get generic metadata */ + rv = genl_meta_get(dev_no, kf, pkt_meta, &meta); + if (rv < 0) { + gprintk("%s: Could not parse pkt metadata\n", __func__); + g_genl_stats.pkts_d_metadata++; + goto GENL_FILTER_CB_PKT_HANDLED; + } + + meta.user_data = kf->cb_user_data; + + /* Adjust original pkt size to remove 4B FCS */ + if (size < FCS_SZ) { + g_genl_stats.pkts_d_invalid_size++; + goto GENL_FILTER_CB_PKT_HANDLED; + } else { + size -= FCS_SZ; + } + + GENL_CB_DBG_PRINT("%s: netns 0x%p, src_ifdx 0x%x, dst_ifdx 0x%x, user_data %d\n", + __func__, g_genl_info.netns, meta.src_ifindex, meta.dst_ifindex, meta.user_data); + + if (g_genl_stats.pkts_c_qlen_cur >= genl_qlen) { + g_genl_stats.pkts_d_qlen_max++; + genl_limited_gprintk(last_drop, + "%s: tail drop due to max qlen %d reached: %lu\n", + __func__, genl_qlen, g_genl_stats.pkts_d_qlen_max); + goto GENL_FILTER_CB_PKT_HANDLED; + } + + if ((genl_pkt = kmalloc(sizeof(genl_pkt_t), GFP_ATOMIC)) == NULL) + { + g_genl_stats.pkts_d_no_mem++; + genl_limited_gprintk(last_alloc, "%s: failed to alloc generic mem for pkt: %lu\n", __func__, g_genl_stats.pkts_d_no_mem); + goto GENL_FILTER_CB_PKT_HANDLED; + } + memcpy(&genl_pkt->meta, &meta, sizeof(genl_meta_t)); + genl_pkt->netns = g_genl_info.netns; + + if (size >= 16) { + uint16_t vlan_proto = (uint16_t) ((pkt[12] << 8) | pkt[13]); + uint16_t vlan = (uint16_t) ((pkt[14] << 8) | pkt[15]); + strip_tag = ((vlan_proto == 0x8100) || (vlan_proto == 0x88a8) || (vlan_proto == 0x9100)) + && (vlan == 0xFFF); + } + + if (strip_tag) { + size -= 4; + } + + if ((skb = dev_alloc_skb(size)) == NULL) + { + g_genl_stats.pkts_d_no_mem++; + genl_limited_gprintk(last_skb_fail, "%s: failed to alloc generic mem for pkt skb: %lu\n", __func__, g_genl_stats.pkts_d_no_mem); + goto GENL_FILTER_CB_PKT_HANDLED; + } + + /* setup skb by copying packet content */ + /* + * Strip reserved vlan tag + * FIXME: enhance GENL interface to support FILTER_TAG_STRIP, + * FILTER_TAG_KEEP and FILTER_TAG_ORIGINAL + */ + if(strip_tag) { + memcpy(skb->data, pkt, 12); + memcpy(skb->data + 12, pkt + 16, size - 12); + g_genl_stats.pkts_f_tag_stripped++; + } else { + memcpy(skb->data, pkt, size); + } + + skb_put(skb, size); + skb->len = size; + genl_pkt->skb = skb; + + spin_lock_irqsave(&g_genl_work.lock, flags); + list_add_tail(&genl_pkt->list, &g_genl_work.pkt_list); + + g_genl_stats.pkts_c_qlen_cur++; + if (g_genl_stats.pkts_c_qlen_cur > g_genl_stats.pkts_c_qlen_hi) + { + g_genl_stats.pkts_c_qlen_hi = g_genl_stats.pkts_c_qlen_cur; + } + + schedule_work(&g_genl_work.wq); + spin_unlock_irqrestore(&g_genl_work.lock, flags); + + /* expected rv values: + * -ve for error + * 0 for passthrough + * 1 for packet handled + * */ + + /* Set rv to packet handled */ + rv = 1; + +GENL_FILTER_CB_PKT_HANDLED: + g_genl_stats.pkts_f_handled++; + return rv; +} + +/* + * generic debug Proc Read Entry + */ +static int +genl_proc_debug_show(struct seq_file *m, void *v) +{ + seq_printf(m, "BCM KNET %s Callback Config\n", GENL_PACKET_NAME); + seq_printf(m, " debug: 0x%x\n", debug); + seq_printf(m, " netif_count: %d\n", bcmgenl_netif_num_get()); + seq_printf(m, " queue length: %d\n", genl_qlen); + + return 0; +} + +static int +genl_proc_debug_open(struct inode * inode, struct file * file) +{ + return single_open(file, genl_proc_debug_show, NULL); +} + +/* + * generic debug Proc Write Entry + * + * Syntax: + * debug= + * + * Where corresponds to the debug module parameter. + * + * Examples: + * debug=0x1 + */ +static ssize_t +genl_proc_debug_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + char debug_str[40]; + char *ptr; + + if (count > sizeof(debug_str)) { + count = sizeof(debug_str) - 1; + debug_str[count] = '\0'; + } + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + if ((ptr = strstr(debug_str, "debug=")) != NULL) { + ptr += 6; + debug = simple_strtol(ptr, NULL, 0); + } else { + gprintk("Warning: unknown configuration setting\n"); + } + + return count; +} + +struct proc_ops genl_proc_debug_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = genl_proc_debug_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = genl_proc_debug_write, + .proc_release = single_release, +}; + +static int +genl_proc_stats_show(struct seq_file *m, void *v) +{ + seq_printf(m, "BCM KNET %s Callback Stats\n", GENL_PACKET_NAME); + seq_printf(m, " pkts filter generic cb %10lu\n", g_genl_stats.pkts_f_genl_cb); + seq_printf(m, " pkts sent to generic module %10lu\n", g_genl_stats.pkts_f_genl_mod); + seq_printf(m, " pkts handled by generic cb %10lu\n", g_genl_stats.pkts_f_handled); + seq_printf(m, " pkts with vlan tag stripped %10lu\n", g_genl_stats.pkts_f_tag_stripped); + seq_printf(m, " pkts with mc destination %10lu\n", g_genl_stats.pkts_f_dst_mc); + seq_printf(m, " pkts with cpu source %10lu\n", g_genl_stats.pkts_f_src_cpu); + seq_printf(m, " pkts with cpu destination %10lu\n", g_genl_stats.pkts_f_dst_cpu); + seq_printf(m, " pkts current queue length %10lu\n", g_genl_stats.pkts_c_qlen_cur); + seq_printf(m, " pkts high queue length %10lu\n", g_genl_stats.pkts_c_qlen_hi); + seq_printf(m, " pkts drop max queue length %10lu\n", g_genl_stats.pkts_d_qlen_max); + seq_printf(m, " pkts drop no memory %10lu\n", g_genl_stats.pkts_d_no_mem); + seq_printf(m, " pkts drop generic not ready %10lu\n", g_genl_stats.pkts_d_not_ready); + seq_printf(m, " pkts drop metadata parse error %10lu\n", g_genl_stats.pkts_d_metadata); + seq_printf(m, " pkts with invalid src port %10lu\n", g_genl_stats.pkts_d_meta_srcport); + seq_printf(m, " pkts with invalid dst port %10lu\n", g_genl_stats.pkts_d_meta_dstport); + seq_printf(m, " pkts with invalid orig pkt sz %10lu\n", g_genl_stats.pkts_d_invalid_size); + return 0; +} + +static int +genl_proc_stats_open(struct inode * inode, struct file * file) +{ + return single_open(file, genl_proc_stats_show, NULL); +} + +/* + * generic stats Proc Write Entry + * + * Syntax: + * write any value to clear stats + */ +static ssize_t +genl_proc_stats_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + int qlen_cur = 0; + unsigned long flags; + + spin_lock_irqsave(&g_genl_work.lock, flags); + qlen_cur = g_genl_stats.pkts_c_qlen_cur; + memset(&g_genl_stats, 0, sizeof(genl_stats_t)); + g_genl_stats.pkts_c_qlen_cur = qlen_cur; + spin_unlock_irqrestore(&g_genl_work.lock, flags); + + return count; +} +struct proc_ops genl_proc_stats_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = genl_proc_stats_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = genl_proc_stats_write, + .proc_release = single_release, +}; + +static int +genl_cb_proc_init(char *procfs_path) +{ + struct proc_dir_entry *entry; + + if (procfs_path == NULL || procfs_path[0] == '\0') { + return 0; + } + + /* create procfs for generic */ + snprintf(genl_procfs_path, sizeof(genl_procfs_path) - 1, + "%s/%s", procfs_path, GENL_PACKET_NAME); + genl_proc_root = proc_mkdir(genl_procfs_path, NULL); + + /* create procfs for generic stats */ + PROC_CREATE(entry, "stats", 0666, genl_proc_root, + &genl_proc_stats_file_ops); + if (entry == NULL) { + return -1; + } + + /* create procfs for debug log */ + PROC_CREATE(entry, "debug", 0666, genl_proc_root, &genl_proc_debug_file_ops); + if (entry == NULL) { + return -1; + } + + return 0; +} + +static int +genl_cb_proc_cleanup(void) +{ + if (genl_proc_root) { + remove_proc_entry("stats", genl_proc_root); + remove_proc_entry("debug", genl_proc_root); + remove_proc_entry(genl_procfs_path, NULL); + genl_proc_root = NULL; + } + return 0; +} + +static int +genl_cb_cleanup(void) +{ + genl_pkt_t *pkt; + + cancel_work_sync(&g_genl_work.wq); + + while (!list_empty(&g_genl_work.pkt_list)) { + pkt = list_entry(g_genl_work.pkt_list.next, genl_pkt_t, list); + list_del(&pkt->list); + dev_kfree_skb_any(pkt->skb); + kfree(pkt); + } + + return 0; +} + +static int +genl_cb_init(void) +{ + /* clear data structs */ + memset(&g_genl_stats, 0, sizeof(genl_stats_t)); + memset(&g_genl_work, 0, sizeof(genl_work_t)); + + /* setup generic work queue */ + spin_lock_init(&g_genl_work.lock); + INIT_LIST_HEAD(&g_genl_work.pkt_list); + INIT_WORK(&g_genl_work.wq, genl_task); + + /* get net namespace */ + g_genl_info.netns = get_net_ns_by_pid(current->pid); + if (!g_genl_info.netns) { + gprintk("%s: Could not get network namespace for pid %d\n", + __func__, current->pid); + return -1; + } + GENL_CB_DBG_PRINT("%s: current->pid %d, netns 0x%p\n", __func__, + current->pid, g_genl_info.netns); + + return 0; +} + +int bcmgenl_packet_cleanup(void) +{ + genl_cb_cleanup(); + genl_cb_proc_cleanup(); + bkn_filter_cb_unregister(genl_filter_cb); + return 0; +} + +int +bcmgenl_packet_init(char *procfs_path) +{ + bkn_filter_cb_register_by_name(genl_filter_cb, GENL_PACKET_NAME); + genl_cb_proc_init(procfs_path); + return genl_cb_init(); +} +#endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h new file mode 100644 index 000000000000..aa39454899f4 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h @@ -0,0 +1,38 @@ +/* + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + */ + +#ifndef __BCM_GENL_PACKET_H__ +#define __BCM_GENL_PACKET_H__ + +extern int +bcmgenl_packet_init(char *procfs_path); + +extern int +bcmgenl_packet_cleanup(void); + +#endif /* __BCM_GENL_PACKET_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c similarity index 52% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.c rename to platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c index 38c5bee6f848..1ea33c7fc52f 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.c +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c @@ -1,41 +1,50 @@ /* - * Copyright 2017-2019 Broadcom - * + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as * published by the Free Software Foundation (the "GPL"). - * + * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License version 2 (GPLv2) for more details. - * + * * You should have received a copy of the GNU General Public License * version 2 (GPLv2) along with this source code. - */ -/* - * $Id: psample_cb.c $ - * $Copyright: (c) 2019 Broadcom Corp. - * All Rights Reserved.$ + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * */ /* - * Driver for call-back functions for Linux KNET driver. - * - * This code is used to integrate packet sampling KNET callback to - * the psample infra for sending sampled pkts to userspace sflow - * applications such as Host Sflow (https://github.com/sflow/host-sflow) - * using genetlink interfaces. - * - * The module can be built from the standard Linux user mode target - * directories using the following command (assuming bash), e.g. + * Middle-driver for communication between Linux KNET driver and + * drivers support Generic Netlink channel. * - * cd $SDK/systems/linux/user/ - * make BUILD_KNET_CB=1 + * This code is used to integrate packet sampling from KNET Rx filter + * call-back function to the psample infra (kernel/linux/net/psample) + * for sending sampled packets to userspace sflow applications such as + * Host Sflow (https://github.com/sflow/host-sflow) using Generic Netlink + * interfaces. * + * This driver is also built with the DCB library as the helper for parsing + * the RX packet meta data from the Linux KNET driver filter call-back function. + * The environment DCBDIR must be set to indicate the directroy of the DCB + * library. */ + #include /* Must be included first */ +#include #include #include #include @@ -43,12 +52,16 @@ #include #include #include +#include "bcm-genl-psample.h" +#include "bcm-genl-dev.h" +#include "bcm-genl-netif.h" +#if BCMGENL_PSAMPLE_SUPPORT #include -#include "psample-cb.h" +#include #define PSAMPLE_CB_DBG -#ifdef PSAMPLE_CB_DBG -extern int debug; +#ifdef PSAMPLE_CB_DBG +static int debug; #define PSAMPLE_CB_DBG_PRINT(...) \ if (debug & 0x1) { \ gprintk(__VA_ARGS__); \ @@ -57,31 +70,6 @@ extern int debug; #define PSAMPLE_CB_DBG_PRINT(...) #endif -/* HIGIG2 header fields */ -#define SOC_HIGIG_SOP (0xfb) -#define SOC_HIGIG_START(x) ((x[0] >> 24) & 0xff) -#define SOC_HIGIG_DSTPORT(x) ((x[1] >> 11) & 0x1f) -#define SOC_HIGIG_SRCPORT(x) ((x[1] >> 16) & 0x1f) -#define SOC_HIGIG2_SOP (0xfb) //0xfc - TODO: how can we differentiate between Higig and higig2? -#define SOC_HIGIG2_START(x) ((x[0] >> 24) & 0xff) -#define SOC_HIGIG2_IS_MC(x) ((x[0] >> 20) & 0x1) -#define SOC_HIGIG2_DSTPORT(x) ((x[0] >> 0) & 0xff) -#define SOC_HIGIG2_SRCPORT(x) ((x[1] >> 16) & 0xff) -#define SOC_DCB32_HG_OFFSET (6) - -/* sFlow v5 datagram dst ifindex field type - * dst ifindex encoding bits [31:30] - */ -#define DSTPORT_TYPE_DISCARD 1 -#define DSTPORT_TYPE_MC 2 - -#define DSTPORT_TYPE_OFFSET 30 -#define DSTPORT_TYPE_MASK 0x3 -#define DSTPORT_TYPE_CLR(_dst) (_dst &= ~(DSTPORT_TYPE_MASK << DSTPORT_TYPE_OFFSET)) -#define DSTPORT_TYPE_SET(_dst,_type) (_dst |= ((_type & DSTPORT_TYPE_MASK) << DSTPORT_TYPE_OFFSET)) -#define DSTPORT_TYPE_GET(_dst) ((_dst >> DSTPORT_TYPE_OFFSET) & DSTPORT_TYPE_MASK) -#define DSTPORT_GET(_dst) (_dst & ~(DSTPORT_TYPE_MASK << DSTPORT_TYPE_OFFSET)) - #define FCS_SZ 4 #define PSAMPLE_NLA_PADDING 4 @@ -98,27 +86,23 @@ LKM_MOD_PARAM(psample_qlen, "i", int, 0); MODULE_PARM_DESC(psample_qlen, "psample queue length (default 1024 buffers)"); -#if !IS_ENABLED(CONFIG_PSAMPLE) -inline struct -psample_group *psample_group_get(struct net *net, u32 group_num) -{ - return NULL; -} -#endif - /* driver proc entry root */ static struct proc_dir_entry *psample_proc_root = NULL; -static struct proc_dir_entry *knet_cb_proc_root = NULL; +static char psample_procfs_path[80]; /* psample general info */ -typedef struct { - struct list_head netif_list; - int netif_count; - knet_hw_info_t hw; +typedef struct psample_info_s { struct net *netns; - spinlock_t lock; + struct list_head group_list; + uint64_t rx_reason_sample_source[LINUX_BDE_MAX_DEVICES]; } psample_info_t; -static psample_info_t g_psample_info = {0}; +static psample_info_t g_psample_info; + +typedef struct psample_group_data_s { + struct list_head list; + struct psample_group *group; + uint32_t group_num; +} psample_group_data_t; /* Maintain sampled pkt statistics */ typedef struct psample_stats_s { @@ -139,7 +123,7 @@ typedef struct psample_stats_s { unsigned long pkts_d_meta_dstport; unsigned long pkts_d_invalid_size; } psample_stats_t; -static psample_stats_t g_psample_stats = {0}; +static psample_stats_t g_psample_stats; typedef struct psample_meta_s { int trunc_size; @@ -160,186 +144,108 @@ typedef struct psample_work_s { struct work_struct wq; spinlock_t lock; } psample_work_t; -static psample_work_t g_psample_work = {0}; +static psample_work_t g_psample_work; -static psample_netif_t* -psample_netif_lookup_by_port(int unit, int port) +static struct psample_group * +psample_group_get_from_list(uint32_t grp_num) { - struct list_head *list; - psample_netif_t *psample_netif = NULL; - unsigned long flags; + struct list_head *list_ptr; + psample_group_data_t *grp; - /* look for port from list of available net_devices */ - spin_lock_irqsave(&g_psample_info.lock, flags); - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (psample_netif->port == port) { - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return psample_netif; + list_for_each(list_ptr, &g_psample_info.group_list) { + grp = list_entry(list_ptr, psample_group_data_t, list); + if (grp->group_num == grp_num) { + return grp->group; } } - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return (NULL); -} - -static int -psample_info_get (int unit, psample_info_t *psample_info) -{ - int rv = 0; - if (!psample_info) { - gprintk("%s: psample_info is NULL\n", __func__); - return (-1); - } - /* get hw info */ - rv = bkn_hw_info_get(unit, &psample_info->hw); - if (rv < 0) { - gprintk("%s: failed to get hw info\n", __func__); - return (-1); + if ((grp = kmalloc(sizeof(psample_group_data_t), GFP_ATOMIC)) == NULL) { + return NULL; + } + grp->group = psample_group_get(g_psample_info.netns, grp_num); + if (grp->group == NULL) { + kfree(grp); + return NULL; } + grp->group_num = grp_num; + list_add_tail(&grp->list, &g_psample_info.group_list); - PSAMPLE_CB_DBG_PRINT("%s: DCB type %d\n", - __func__, psample_info->hw.dcb_type); - return (0); + return grp->group; } static int -psample_meta_srcport_get(uint8_t *pkt, void *pkt_meta) +psample_meta_srcport_get(int dev_no, void *pkt_meta) { - int srcport = 0; - uint32_t *metadata = (uint32_t*)pkt_meta; - - switch(g_psample_info.hw.dcb_type) { - case 36: /* TD3 */ - case 38: /* TH3 */ - break; - case 32: /* TH1/TH2 */ - case 26: /* TD2 */ - case 23: /* HX4 */ - metadata += SOC_DCB32_HG_OFFSET; - default: - break; - } + uint32_t p; - if (SOC_HIGIG2_START(metadata) == SOC_HIGIG2_SOP) - { - srcport = SOC_HIGIG2_SRCPORT(metadata); - } - else if (SOC_HIGIG_START(metadata) == SOC_HIGIG_SOP) - { - srcport = SOC_HIGIG_SRCPORT(metadata); - } - else - { - PSAMPLE_CB_DBG_PRINT("%s: Could not detect metadata sop type: 0x%02x (w[0]: 0x%04x)\n", __func__, - SOC_HIGIG_START(metadata), metadata[0]); + if (bcmgenl_dev_pktmeta_rx_srcport_get(dev_no, pkt_meta, &p) < 0) { return -1; } - return srcport; + + return p; } static int -psample_meta_dstport_get(uint8_t *pkt, void *pkt_meta) +psample_meta_dstport_get(int dev_no, void *pkt_meta, bool *is_mcast) { - int dstport = 0; - uint32_t *metadata = (uint32_t*)pkt_meta; - - switch(g_psample_info.hw.dcb_type) { - case 36: /* TD3 */ - case 38: /* TH3 */ - break; - case 32: /* TH1/TH2 */ - case 26: /* TD2 */ - case 23: /* HX4 */ - default: - metadata += SOC_DCB32_HG_OFFSET; - break; + bool mcast; + uint32_t p; + + if (bcmgenl_dev_pktmeta_rx_dstport_get(dev_no, pkt_meta, &mcast, &p) < 0) { + return -1; } - - if (SOC_HIGIG2_START(metadata) == SOC_HIGIG2_SOP) - { - if (SOC_HIGIG2_IS_MC(metadata)) - { - DSTPORT_TYPE_CLR(dstport); - DSTPORT_TYPE_SET(dstport, DSTPORT_TYPE_MC); - } - else - { - dstport = SOC_HIGIG2_DSTPORT(metadata); - } - } - else if (SOC_HIGIG_START(metadata) == SOC_HIGIG_SOP) - { - dstport = SOC_HIGIG_DSTPORT(metadata); - } - else - { - PSAMPLE_CB_DBG_PRINT("%s: Could not detect metadata sop type: 0x%02x (w[0]: 0x%04x)\n", __func__, - SOC_HIGIG_START(metadata), metadata[0]); - return (-1); + if (is_mcast) { + *is_mcast = mcast; } - return dstport; + + return p; } static int -psample_meta_sample_reason(uint8_t *pkt, void *pkt_meta) +psample_meta_sample_reason(int dev_no, void *pkt_meta) { - uint32_t *metadata = (uint32_t*)pkt_meta; - uint32_t reason = 0; - uint32_t reason_hi = 0; - uint32_t sample_rx_reason_mask = 0; - - /* Sample Pkt reason code (bcmRxReasonSampleSource) */ - switch(g_psample_info.hw.dcb_type) { - case 36: /* TD3 */ - case 38: /* TH3 */ - reason_hi = *(metadata + 4); - reason = *(metadata + 5); - sample_rx_reason_mask = (1 << 3); - break; - case 32: /* TH1/TH2 */ - case 26: /* TD2 */ - case 23: /* HX4 */ - default: - reason_hi = *(metadata + 2); - reason = *(metadata + 3); - sample_rx_reason_mask = (1 << 5); - break; + uint64_t rx_reason; + uint64_t *exp_reason = &g_psample_info.rx_reason_sample_source[dev_no]; + + if (bcmgenl_dev_pktmeta_rx_reason_get(dev_no, pkt_meta, &rx_reason) < 0) { + return 0; + } + if (*exp_reason == 0) { + if (bcmgenl_dev_rx_reason_sample_source_get(dev_no, exp_reason) < 0) { + return 0; + } } - - PSAMPLE_CB_DBG_PRINT("%s: DCB%d sample_rx_reason_mask: 0x%08x, reason: 0x%08x, reason_hi: 0x%08x\n", - __func__, g_psample_info.hw.dcb_type, sample_rx_reason_mask, reason, reason_hi); /* Check if only sample reason code is set. * If only sample reason code, then consume pkt. - * If other reason codes exist, then pkt should be + * If other reason codes exist, then pkt should be * passed through to Linux network stack. */ - if ((reason & ~sample_rx_reason_mask) || reason_hi) { - return 0; /* multiple reasons set, pass through */ + if ((rx_reason & *exp_reason) == *exp_reason) { + return 1; } - - /* only sample rx reason set, consume pkt */ - return (1); + return 0; } static int -psample_meta_get(int unit, uint8_t *pkt, void *pkt_meta, psample_meta_t *sflow_meta) +psample_meta_get(int dev_no, kcom_filter_t *kf, void *pkt_meta, + psample_meta_t *sflow_meta) { - int srcport, dstport, dstport_type; + bool mcast = false; + int srcport, dstport; int src_ifindex = 0; int dst_ifindex = 0; int sample_rate = 1; int sample_size = PSAMPLE_SIZE_DFLT; - psample_netif_t *psample_netif = NULL; + bcmgenl_netif_t bcmgenl_netif; #ifdef PSAMPLE_CB_DBG if (debug & 0x1) { int i=0; - uint8_t *meta = (uint8_t*)pkt_meta; + uint8_t *meta = (uint8_t *)pkt_meta; PSAMPLE_CB_DBG_PRINT("%s: psample pkt metadata\n", __func__); for (i=0; i<64; i+=16) { - PSAMPLE_CB_DBG_PRINT("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", + PSAMPLE_CB_DBG_PRINT("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", meta[i+0], meta[i+1], meta[i+2], meta[i+3], meta[i+4], meta[i+5], meta[i+6], meta[i+7], meta[i+8], meta[i+9], meta[i+10], meta[i+11], meta[i+12], meta[i+13], meta[i+14], meta[i+15]); } @@ -347,52 +253,46 @@ psample_meta_get(int unit, uint8_t *pkt, void *pkt_meta, psample_meta_t *sflow_m #endif /* parse pkt metadata for src and dst ports */ - srcport = psample_meta_srcport_get(pkt, pkt_meta); - dstport = psample_meta_dstport_get(pkt, pkt_meta); + srcport = psample_meta_srcport_get(dev_no, pkt_meta); + dstport = psample_meta_dstport_get(dev_no, pkt_meta, &mcast); if ((srcport == -1) || (dstport == -1)) { gprintk("%s: invalid srcport %d or dstport %d\n", __func__, srcport, dstport); - return (-1); + return -1; } /* find src port netif (no need to lookup CPU port) */ if (srcport != 0) { - if ((psample_netif = psample_netif_lookup_by_port(unit, srcport))) { - src_ifindex = psample_netif->dev->ifindex; - sample_rate = psample_netif->sample_rate; - sample_size = psample_netif->sample_size; + if (bcmgenl_netif_get_by_port(srcport, &bcmgenl_netif) == 0) { + src_ifindex = bcmgenl_netif.dev->ifindex; + sample_rate = bcmgenl_netif.sample_rate; + sample_size = bcmgenl_netif.sample_size; } else { g_psample_stats.pkts_d_meta_srcport++; PSAMPLE_CB_DBG_PRINT("%s: could not find srcport(%d)\n", __func__, srcport); } } - dstport_type = DSTPORT_TYPE_GET(dstport); - dstport = DSTPORT_GET(dstport); - /* set sFlow dst type for MC pkts */ - if (dstport_type == DSTPORT_TYPE_MC) { - DSTPORT_TYPE_SET(dst_ifindex, DSTPORT_TYPE_MC); + if (mcast) { g_psample_stats.pkts_f_dst_mc++; - /* find dst port netif for UC pkts (no need to lookup CPU port) */ } else if (dstport != 0) { - if ((psample_netif = psample_netif_lookup_by_port(unit, dstport))) { - dst_ifindex = psample_netif->dev->ifindex; + if (bcmgenl_netif_get_by_port(dstport, &bcmgenl_netif) == 0) { + dst_ifindex = bcmgenl_netif.dev->ifindex; } else { g_psample_stats.pkts_d_meta_dstport++; PSAMPLE_CB_DBG_PRINT("%s: could not find dstport(%d)\n", __func__, dstport); } } - PSAMPLE_CB_DBG_PRINT("%s: srcport %d, dstport %d, src_ifindex 0x%x, dst_ifindex 0x%x, trunc_size %d, sample_rate %d\n", - __func__, srcport, dstport, src_ifindex, dst_ifindex, sample_size, sample_rate); + PSAMPLE_CB_DBG_PRINT("%s: dstport %d, src_ifindex 0x%x, dst_ifindex 0x%x\n", + __func__, dstport, src_ifindex, dst_ifindex); sflow_meta->src_ifindex = src_ifindex; sflow_meta->dst_ifindex = dst_ifindex; sflow_meta->trunc_size = sample_size; sflow_meta->sample_rate = sample_rate; - - return (0); + return 0; } static void @@ -424,7 +324,6 @@ psample_task(struct work_struct *work) __func__, pkt->group->group_num, pkt->meta.trunc_size, pkt->meta.src_ifindex, pkt->meta.dst_ifindex, pkt->meta.sample_rate); - #if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \ (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR)) psample_sample_packet(pkt->group, @@ -449,30 +348,20 @@ psample_task(struct work_struct *work) spin_unlock_irqrestore(&psample_work->lock, flags); } -int -psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta, +static int +psample_filter_cb(uint8_t *pkt, int size, int dev_no, void *pkt_meta, int chan, kcom_filter_t *kf) { - struct psample_group *group; + struct psample_group *group = NULL; psample_meta_t meta; int rv = 0; - static int info_get = 0; - - if (!info_get) { - rv = psample_info_get (dev_no, &g_psample_info); - if (rv < 0) { - gprintk("%s: failed to get psample info\n", __func__); - goto PSAMPLE_FILTER_CB_PKT_HANDLED; - } - info_get = 1; - } PSAMPLE_CB_DBG_PRINT("%s: pkt size %d, kf->dest_id %d, kf->cb_user_data %d\n", __func__, size, kf->dest_id, kf->cb_user_data); g_psample_stats.pkts_f_psample_cb++; /* get psample group info. psample genetlink group ID passed in kf->dest_id */ - group = psample_group_get(g_psample_info.netns, kf->dest_id); + group = psample_group_get_from_list(kf->dest_id); if (!group) { gprintk("%s: Could not find psample genetlink group %d\n", __func__, kf->cb_user_data); g_psample_stats.pkts_d_no_group++; @@ -480,7 +369,7 @@ psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta, } /* get psample metadata */ - rv = psample_meta_get(dev_no, pkt, pkt_meta, &meta); + rv = psample_meta_get(dev_no, kf, pkt_meta, &meta); if (rv < 0) { gprintk("%s: Could not parse pkt metadata\n", __func__); g_psample_stats.pkts_d_metadata++; @@ -532,7 +421,7 @@ psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta, /* setup skb to point to pkt */ memcpy(skb->data, pkt, meta.trunc_size); skb_put(skb, meta.trunc_size); - skb->len = meta.trunc_size; + skb->len = size; psample_pkt->skb = skb; spin_lock_irqsave(&g_psample_work.lock, flags); @@ -551,7 +440,7 @@ psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta, PSAMPLE_FILTER_CB_PKT_HANDLED: /* if sample reason only, consume pkt. else pass through */ - rv = psample_meta_sample_reason(pkt, pkt_meta); + rv = psample_meta_sample_reason(dev_no, pkt_meta); if (rv) { g_psample_stats.pkts_f_handled++; } else { @@ -560,110 +449,23 @@ psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta, return rv; } -int -psample_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev) -{ - int found; - struct list_head *list; - psample_netif_t *psample_netif, *lpsample_netif; - unsigned long flags; - - if ((psample_netif = kmalloc(sizeof(psample_netif_t), GFP_ATOMIC)) == NULL) { - gprintk("%s: failed to alloc psample mem for netif '%s'\n", - __func__, dev->name); - return (-1); - } - - spin_lock_irqsave(&g_psample_info.lock, flags); - - psample_netif->dev = dev; - psample_netif->id = netif->id; - psample_netif->port = netif->port; - psample_netif->vlan = netif->vlan; - psample_netif->qnum = netif->qnum; - psample_netif->sample_rate = PSAMPLE_RATE_DFLT; - psample_netif->sample_size = PSAMPLE_SIZE_DFLT; - - /* insert netif sorted by ID similar to bkn_knet_netif_create() */ - found = 0; - list_for_each(list, &g_psample_info.netif_list) { - lpsample_netif = (psample_netif_t*)list; - if (netif->id < lpsample_netif->id) { - found = 1; - g_psample_info.netif_count++; - break; - } - } - - if (found) { - /* Replace previously removed interface */ - list_add_tail(&psample_netif->list, &lpsample_netif->list); - } else { - /* No holes - add to end of list */ - list_add_tail(&psample_netif->list, &g_psample_info.netif_list); - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - - PSAMPLE_CB_DBG_PRINT("%s: added psample netif '%s'\n", __func__, dev->name); - return (0); -} - -int -psample_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev) -{ - int found; - struct list_head *list; - psample_netif_t *psample_netif; - unsigned long flags; - - if (!netif || !dev) { - gprintk("%s: netif or net_device is NULL\n", __func__); - return (-1); - } - - spin_lock_irqsave(&g_psample_info.lock, flags); - - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (netif->id == psample_netif->id) { - found = 1; - list_del(&psample_netif->list); - PSAMPLE_CB_DBG_PRINT("%s: removing psample netif '%s'\n", __func__, dev->name); - kfree(psample_netif); - g_psample_info.netif_count--; - break; - } - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - - if (!found) { - gprintk("%s: netif ID %d not found!\n", __func__, netif->id); - return (-1); - } - return (0); -} - /* * psample rate Proc Read Entry */ static int -psample_proc_rate_show(struct seq_file *m, void *v) +proc_rate_show(void *cb_data, bcmgenl_netif_t *netif) { - struct list_head *list; - psample_netif_t *psample_netif; - unsigned long flags; - - spin_lock_irqsave(&g_psample_info.lock, flags); + struct seq_file *m = (struct seq_file *)cb_data; - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - seq_printf(m, " %-14s %d\n", psample_netif->dev->name, psample_netif->sample_rate); - } + seq_printf(m, " %-14s %d\n", + netif->dev->name, netif->sample_rate); + return 0; +} - spin_unlock_irqrestore(&g_psample_info.lock, flags); - +static int +psample_proc_rate_show(struct seq_file *m, void *v) +{ + bcmgenl_netif_search(NULL, proc_rate_show, (void *)m); return 0; } @@ -684,16 +486,21 @@ psample_proc_rate_open(struct inode * inode, struct file * file) * Examples: * eth4=1000 */ +static int +proc_rate_write(void *cb_data, bcmgenl_netif_t *netif) +{ + uint32 sample_rate = (uint32)(uintptr_t)cb_data; + + netif->sample_rate = sample_rate; + return 0; +} + static ssize_t psample_proc_rate_write(struct file *file, const char *buf, - size_t count, loff_t *loff) + size_t count, loff_t *loff) { - int found; - struct list_head *list; - psample_netif_t *psample_netif; + int netif_cnt; char sample_str[40], *ptr, *newline; - unsigned long flags; - if (count > sizeof(sample_str)) { count = sizeof(sample_str) - 1; @@ -716,24 +523,13 @@ psample_proc_rate_write(struct file *file, const char *buf, } *ptr++ = 0; - spin_lock_irqsave(&g_psample_info.lock, flags); - - found = 0; - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (strcmp(psample_netif->dev->name, sample_str) == 0) { - psample_netif->sample_rate = simple_strtol(ptr, NULL, 10); - // TODO MLI@BRCM - check valid sample rate - found = 1; - break; - } + netif_cnt = bcmgenl_netif_search(sample_str, proc_rate_write, + (void *)(uintptr_t)simple_strtol(ptr, NULL, 10)); + if (netif_cnt <= 0) { + gprintk("Warning: Failed setting psample rate on " + "unknown network interface: '%s'\n", sample_str); } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - if (!found) { - gprintk("Warning: Failed setting psample rate on unknown network interface: '%s'\n", sample_str); - } return count; } @@ -750,20 +546,18 @@ struct proc_ops psample_proc_rate_file_ops = { * psample size Proc Read Entry */ static int -psample_proc_size_show(struct seq_file *m, void *v) +proc_size_show(void *cb_data, bcmgenl_netif_t *netif) { - struct list_head *list; - psample_netif_t *psample_netif; - unsigned long flags; - - spin_lock_irqsave(&g_psample_info.lock, flags); + struct seq_file *m = (struct seq_file *)cb_data; - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - seq_printf(m, " %-14s %d\n", psample_netif->dev->name, psample_netif->sample_size); - } + seq_printf(m, " %-14s %d\n", netif->dev->name, netif->sample_size); + return 0; +} - spin_unlock_irqrestore(&g_psample_info.lock, flags); +static int +psample_proc_size_show(struct seq_file *m, void *v) +{ + bcmgenl_netif_search(NULL, proc_size_show, (void *)m); return 0; } @@ -784,15 +578,21 @@ psample_proc_size_open(struct inode * inode, struct file * file) * Examples: * eth4=128 */ +static int +proc_size_write(void *cb_data, bcmgenl_netif_t *netif) +{ + uint32 sample_size = (uint32)(uintptr_t)cb_data; + + netif->sample_size = sample_size; + return 0; +} + static ssize_t psample_proc_size_write(struct file *file, const char *buf, size_t count, loff_t *loff) { - int found; - struct list_head *list; - psample_netif_t *psample_netif; + int netif_cnt; char sample_str[40], *ptr, *newline; - unsigned long flags; if (count > sizeof(sample_str)) { count = sizeof(sample_str) - 1; @@ -815,24 +615,13 @@ psample_proc_size_write(struct file *file, const char *buf, } *ptr++ = 0; - spin_lock_irqsave(&g_psample_info.lock, flags); - - found = 0; - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - if (strcmp(psample_netif->dev->name, sample_str) == 0) { - psample_netif->sample_size = simple_strtol(ptr, NULL, 10); - // TODO MLI@BRCM - check valid sample size - found = 1; - break; - } + netif_cnt = bcmgenl_netif_search(sample_str, proc_size_write, + (void *)(uintptr_t)simple_strtol(ptr, NULL, 10)); + if (netif_cnt <= 0) { + gprintk("Warning: Failed setting psample size on " + "unknown network interface: '%s'\n", sample_str); } - spin_unlock_irqrestore(&g_psample_info.lock, flags); - - if (!found) { - gprintk("Warning: Failed setting psample size on unknown network interface: '%s'\n", sample_str); - } return count; } @@ -845,61 +634,15 @@ struct proc_ops psample_proc_size_file_ops = { .proc_release = single_release, }; -/* - * psample map Proc Read Entry - */ -static int -psample_proc_map_show(struct seq_file *m, void *v) -{ - struct list_head *list; - psample_netif_t *psample_netif; - unsigned long flags; - - seq_printf(m, " Interface logical port ifindex\n"); - seq_printf(m, "------------- ------------ -------\n"); - spin_lock_irqsave(&g_psample_info.lock, flags); - - list_for_each(list, &g_psample_info.netif_list) { - psample_netif = (psample_netif_t*)list; - seq_printf(m, " %-14s %-14d %d\n", - psample_netif->dev->name, - psample_netif->port, - psample_netif->dev->ifindex); - } - - spin_unlock_irqrestore(&g_psample_info.lock, flags); - return 0; -} - -static int -psample_proc_map_open(struct inode * inode, struct file * file) -{ - return single_open(file, psample_proc_map_show, NULL); -} - -struct proc_ops psample_proc_map_file_ops = { - PROC_OWNER(THIS_MODULE) - .proc_open = psample_proc_map_open, - .proc_read = seq_read, - .proc_lseek = seq_lseek, - .proc_write = NULL, - .proc_release = single_release, -}; - /* * psample debug Proc Read Entry */ static int psample_proc_debug_show(struct seq_file *m, void *v) { - seq_printf(m, "BCM KNET %s Callback Config\n", PSAMPLE_CB_NAME); + seq_printf(m, "BCM KNET %s Callback Config\n", PSAMPLE_GENL_NAME); seq_printf(m, " debug: 0x%x\n", debug); - seq_printf(m, " cmic_type: %d\n", g_psample_info.hw.cmic_type); - seq_printf(m, " dcb_type: %d\n", g_psample_info.hw.dcb_type); - seq_printf(m, " dcb_size: %d\n", g_psample_info.hw.dcb_size); - seq_printf(m, " pkt_hdr_size: %d\n", g_psample_info.hw.pkt_hdr_size); - seq_printf(m, " cdma_channels: %d\n", g_psample_info.hw.cdma_channels); - seq_printf(m, " netif_count: %d\n", g_psample_info.netif_count); + seq_printf(m, " netif_count: %d\n", bcmgenl_netif_num_get()); seq_printf(m, " queue length: %d\n", psample_qlen); return 0; @@ -959,8 +702,7 @@ struct proc_ops psample_proc_debug_file_ops = { static int psample_proc_stats_show(struct seq_file *m, void *v) { - seq_printf(m, "BCM KNET %s Callback Stats\n", PSAMPLE_CB_NAME); - seq_printf(m, " DCB type %d\n", g_psample_info.hw.dcb_type); + seq_printf(m, "BCM KNET %s Callback Stats\n", PSAMPLE_GENL_NAME); seq_printf(m, " pkts filter psample cb %10lu\n", g_psample_stats.pkts_f_psample_cb); seq_printf(m, " pkts sent to psample module %10lu\n", g_psample_stats.pkts_f_psample_mod); seq_printf(m, " pkts handled by psample %10lu\n", g_psample_stats.pkts_f_handled); @@ -1007,6 +749,7 @@ psample_proc_stats_write(struct file *file, const char *buf, return count; } + struct proc_ops psample_proc_stats_file_ops = { PROC_OWNER(THIS_MODULE) .proc_open = psample_proc_stats_open, @@ -1016,74 +759,101 @@ struct proc_ops psample_proc_stats_file_ops = { .proc_release = single_release, }; -int psample_cleanup(void) -{ - cancel_work_sync(&g_psample_work.wq); - remove_proc_entry("stats", psample_proc_root); - remove_proc_entry("rate", psample_proc_root); - remove_proc_entry("size", psample_proc_root); - remove_proc_entry("debug", psample_proc_root); - remove_proc_entry("map" , psample_proc_root); - remove_proc_entry("psample", knet_cb_proc_root); - remove_proc_entry("bcm/knet-cb", NULL); - return 0; -} - -int psample_init(void) +static int +psample_proc_init(char *procfs_path) { - #define PROCFS_MAX_PATH 1024 - #define PSAMPLE_PROCFS_PATH "bcm/knet-cb" - char psample_procfs_path[PROCFS_MAX_PATH]; struct proc_dir_entry *entry; - /* create procfs for psample */ - knet_cb_proc_root = proc_mkdir(PSAMPLE_PROCFS_PATH, NULL); - snprintf(psample_procfs_path, sizeof(psample_procfs_path), "%s/%s", PSAMPLE_PROCFS_PATH, PSAMPLE_CB_NAME); + if (procfs_path == NULL || procfs_path[0] == '\0') { + return 0; + } + + /* Initialize proc files for psample */ + snprintf(psample_procfs_path, sizeof(psample_procfs_path) - 1, + "%s/%s", procfs_path, PSAMPLE_GENL_NAME); psample_proc_root = proc_mkdir(psample_procfs_path, NULL); /* create procfs for psample stats */ - PROC_CREATE(entry, "stats", 0666, psample_proc_root, &psample_proc_stats_file_ops); + PROC_CREATE(entry, "stats", 0666, psample_proc_root, + &psample_proc_stats_file_ops); if (entry == NULL) { - gprintk("%s: Unable to create procfs entry '/procfs/%s/stats'\n", __func__, psample_procfs_path); return -1; } /* create procfs for setting sample rates */ - PROC_CREATE(entry, "rate", 0666, psample_proc_root, &psample_proc_rate_file_ops); + PROC_CREATE(entry, "rate", 0666, psample_proc_root, + &psample_proc_rate_file_ops); if (entry == NULL) { - gprintk("%s: Unable to create procfs entry '/procfs/%s/rate'\n", __func__, psample_procfs_path); return -1; } /* create procfs for setting sample size */ - PROC_CREATE(entry, "size", 0666, psample_proc_root, &psample_proc_size_file_ops); + PROC_CREATE(entry, "size", 0666, psample_proc_root, + &psample_proc_size_file_ops); if (entry == NULL) { - gprintk("%s: Unable to create procfs entry '/procfs/%s/size'\n", __func__, psample_procfs_path); return -1; } - /* create procfs for getting netdev mapping */ - PROC_CREATE(entry, "map", 0666, psample_proc_root, &psample_proc_map_file_ops); + /* create procfs for debug log */ + PROC_CREATE(entry, "debug", 0666, psample_proc_root, + &psample_proc_debug_file_ops); if (entry == NULL) { - gprintk("%s: Unable to create procfs entry '/procfs/%s/map'\n", __func__, psample_procfs_path); return -1; } - /* create procfs for debug log */ - PROC_CREATE(entry, "debug", 0666, psample_proc_root, &psample_proc_debug_file_ops); - if (entry == NULL) { - gprintk("%s: Unable to create procfs entry '/procfs/%s/debug'\n", __func__, psample_procfs_path); - return -1; + return 0; +} + +static int +psample_proc_cleanup(void) +{ + if (psample_proc_root) { + remove_proc_entry("stats", psample_proc_root); + remove_proc_entry("rate", psample_proc_root); + remove_proc_entry("size", psample_proc_root); + remove_proc_entry("debug", psample_proc_root); + remove_proc_entry(psample_procfs_path, NULL); + psample_proc_root = NULL; } + return 0; +} +static int +psample_cleanup(void) +{ + psample_pkt_t *pkt; + psample_group_data_t *grp; + + cancel_work_sync(&g_psample_work.wq); + + while (!list_empty(&g_psample_work.pkt_list)) { + pkt = list_entry(g_psample_work.pkt_list.next, psample_pkt_t, list); + list_del(&pkt->list); + dev_kfree_skb_any(pkt->skb); + kfree(pkt); + } + + while (!list_empty(&g_psample_info.group_list)) { + grp = list_entry(g_psample_info.group_list.next, + psample_group_data_t, list); + list_del(&grp->list); + psample_group_put(grp->group); + kfree(grp); + } + + return 0; +} + +static int +psample_init(void) +{ /* clear data structs */ memset(&g_psample_stats, 0, sizeof(psample_stats_t)); memset(&g_psample_info, 0, sizeof(psample_info_t)); memset(&g_psample_work, 0, sizeof(psample_work_t)); /* setup psample_info struct */ - INIT_LIST_HEAD(&g_psample_info.netif_list); - spin_lock_init(&g_psample_info.lock); + INIT_LIST_HEAD(&g_psample_info.group_list); /* setup psample work queue */ spin_lock_init(&g_psample_work.lock); @@ -1093,12 +863,46 @@ int psample_init(void) /* get net namespace */ g_psample_info.netns = get_net_ns_by_pid(current->pid); if (!g_psample_info.netns) { - gprintk("%s: Could not get network namespace for pid %d\n", __func__, current->pid); - return (-1); + gprintk("%s: Could not get network namespace for pid %d\n", + __func__, current->pid); + return -1; } - PSAMPLE_CB_DBG_PRINT("%s: current->pid %d, netns 0x%p, sample_size %d\n", __func__, - current->pid, g_psample_info.netns, psample_size); + PSAMPLE_CB_DBG_PRINT("%s: current->pid %d, netns 0x%p, sample_size %d\n", + __func__, + current->pid, g_psample_info.netns, psample_size); + + return 0; +} + +int bcmgenl_psample_cleanup(void) +{ + psample_cleanup(); + psample_proc_cleanup(); + bkn_filter_cb_unregister(psample_filter_cb); + return 0; +} + +int +bcmgenl_psample_init(char *procfs_path) +{ + bkn_filter_cb_register_by_name(psample_filter_cb, PSAMPLE_GENL_NAME); + bcmgenl_netif_default_sample_set(PSAMPLE_RATE_DFLT, PSAMPLE_SIZE_DFLT); + psample_proc_init(procfs_path); + return psample_init(); +} +#else + +int +bcmgenl_psample_init(char *procfs_path) +{ + return 0; +} +int +bcmgenl_psample_cleanup(void) +{ return 0; } + +#endif /* BCMGENL_PSAMPLE_SUPPORT */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h new file mode 100644 index 000000000000..d3b6521d14c6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h @@ -0,0 +1,44 @@ +/* + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + */ + +#ifndef __BCM_GENL_PSAMPLE_H__ +#define __BCM_GENL_PSAMPLE_H__ + +#include + +#ifndef BCMGENL_PSAMPLE_SUPPORT +#define BCMGENL_PSAMPLE_SUPPORT (IS_ENABLED(CONFIG_PSAMPLE)) +#endif + +extern int +bcmgenl_psample_init(char *procfs_path); + +extern int +bcmgenl_psample_cleanup(void); + +#endif /* __BCM_GENL_PSAMPLE_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c new file mode 100644 index 000000000000..e78d4e21792a --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c @@ -0,0 +1,253 @@ +/* + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + */ + +/* + * Middle-driver for communication between Linux KNET driver and + * drivers support Generic Netlink channel. + * + * This driver utilizes the NETIF and RX filter call-back functions + * of Linux KNET driver to trasform the RX filter packets to Generic Netlink + * packets for application usage. + * + * Current supported Generic Netlink kernel modules are: + * + * - psample module in kernel/linux/net/psample + * + * Filter call-back function is registered for recevieing KNET filter + * created with description name 'psample'. + * + * - genl_packet module from Google + * + * Filter call-back function is registered for recevieing KNET filter + * created with description name 'genl_packet'. + * + * This driver is also built with the DCB library as the helper for parsing + * the RX packet meta data from the Linux KNET driver filter call-back function. + * The environment DCBDIR must be set to indicate the directroy of the DCB + * library. + * + * The module can be built from the standard Linux user mode target + * directories using the following command (assuming bash), e.g. + * + * cd $SDK/systems/linux/user/gto-2_6 + * BUILD_BCM_GENL=1 make -s mod + * + */ + +#include /* Must be included first */ +#include +#include "bcm-genl-dev.h" +#include "bcm-genl-netif.h" +#include "bcm-genl-psample.h" +#include "bcm-genl-packet.h" + +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("Broadcom Linux KNET Call-Back Driver for GenLink"); +MODULE_LICENSE("GPL"); + +int debug; +LKM_MOD_PARAM(debug, "i", int, 0); +MODULE_PARM_DESC(debug, +"Debug level (default 0)"); + +/* Module Information */ +#define MODULE_MAJOR 0 +#define MODULE_NAME "linux-bcm-genl" + +#define BCMGENL_PROCFS_PATH "bcm/genl" + +/* driver proc entry root */ +static struct proc_dir_entry *bcmgenl_proc_root = NULL; + +/* + * dev Proc Read Entry + */ +static int +proc_dev_show(struct seq_file *m, void *v) +{ + int dev_no; + int dcb_type, dcb_size; + + for (dev_no = 0; dev_no < LINUX_BDE_MAX_DEVICES; dev_no++) { + if (bcmgenl_dev_dcb_info_get(dev_no, &dcb_type, &dcb_size) == 0) { + seq_printf(m, "Device number %d:\n", dev_no); + seq_printf(m, " dcb_type: %d\n", dcb_type); + seq_printf(m, " dcb_size: %d\n", dcb_size); + } + } + return 0; +} + +static int +proc_dev_open(struct inode *inode, struct file *file) +{ + return single_open(file, proc_dev_show, NULL); +} + +struct proc_ops proc_dev_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = proc_dev_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = NULL, + .proc_release = single_release, +}; + +/* + * netif Proc Read Entry + */ +static int +netif_show(void *cb_data, bcmgenl_netif_t *netif) +{ + struct seq_file *m = (struct seq_file *)cb_data; + + seq_printf(m, " %-14s %-14d %d\n", + netif->dev->name, netif->port, netif->dev->ifindex); + return 0; +} + +static int +proc_netif_show(struct seq_file *m, void *v) +{ + if (bcmgenl_netif_num_get() == 0) { + seq_printf(m, "No interfaces are available\n"); + return 0; + } + seq_printf(m, " Interface logical port ifindex\n"); + seq_printf(m, "------------- ------------ -------\n"); + bcmgenl_netif_search(NULL, netif_show, (void *)m); + return 0; +} + +static int +proc_netif_open(struct inode *inode, struct file *file) +{ + return single_open(file, proc_netif_show, NULL); +} + +struct proc_ops proc_netif_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = proc_netif_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = NULL, + .proc_release = single_release, +}; + +static int +bcmgenl_proc_init(void) +{ + struct proc_dir_entry *entry; + + /* Initialize proc files */ + bcmgenl_proc_root = proc_mkdir(BCMGENL_PROCFS_PATH, NULL); + + /* create procfs for getting netdev mapping */ + PROC_CREATE(entry, "netif", 0666, bcmgenl_proc_root, &proc_netif_file_ops); + if (entry == NULL) { + return -1; + } + + /* create procfs for generic stats */ + PROC_CREATE(entry, "dev", 0666, bcmgenl_proc_root, &proc_dev_file_ops); + if (entry == NULL) { + return -1; + } + + return 0; +} + +static int +bcmgenl_proc_cleanup(void) +{ + remove_proc_entry("netif", bcmgenl_proc_root); + remove_proc_entry("dev", bcmgenl_proc_root); + remove_proc_entry(BCMGENL_PROCFS_PATH, NULL); + return 0; +} + +/* + * Get statistics. + * % cat /proc/linux-bcm-genl + */ +static int +_pprint(struct seq_file *m) +{ + pprintf(m, "Broadcom Linux KNET Call-Back: genlink\n"); + + return 0; +} + +static int +_cleanup(void) +{ + bcmgenl_psample_cleanup(); +#ifdef BUILD_GENL_PACKET + bcmgenl_packet_cleanup(); +#endif + bcmgenl_netif_cleanup(); + bcmgenl_dev_cleanup(); + + bcmgenl_proc_cleanup(); + + return 0; +} + +static int +_init(void) +{ + bcmgenl_proc_init(); + + bcmgenl_dev_init(); + bcmgenl_netif_init(); + + bcmgenl_psample_init(BCMGENL_PROCFS_PATH); +#ifdef BUILD_GENL_PACKET + bcmgenl_packet_init(BCMGENL_PROCFS_PATH); +#endif + + return 0; +} + +static gmodule_t _gmodule = { + name: MODULE_NAME, + major: MODULE_MAJOR, + init: _init, + cleanup: _cleanup, + pprint: _pprint, + ioctl: NULL, + open: NULL, + close: NULL, +}; + +gmodule_t* +gmodule_get(void) +{ + EXPORT_NO_SYMBOLS; + return &_gmodule; +} diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile index d42798e737db..42e6c7405bf5 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile @@ -1,33 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.3 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # LOCALDIR = systems/linux/kernel/modules/bcm-knet diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c old mode 100755 new mode 100644 index a45acfe2ffc8..ca569d785776 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c @@ -1,17 +1,29 @@ /* - * Copyright 2017 Broadcom - * + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as * published by the Free Software Foundation (the "GPL"). - * + * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License version 2 (GPLv2) for more details. - * + * * You should have received a copy of the GNU General Public License * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * */ /* @@ -143,12 +155,12 @@ LKM_MOD_PARAM(num_rx_prio, "i", int, 0); MODULE_PARM_DESC(num_rx_prio, "Number of filter priorities per Rx DMA channel"); -static int rx_rate[8] = { 100000, 100000, 100000, 100000, 100000, 100000, 100000, 0 }; +static int rx_rate[16] = { 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000}; LKM_MOD_PARAM_ARRAY(rx_rate, "1-4i", int, NULL, 0); MODULE_PARM_DESC(rx_rate, "Rx rate in packets per second (default 100000)"); -static int rx_burst[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; +static int rx_burst[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; LKM_MOD_PARAM_ARRAY(rx_burst, "1-4i", int, NULL, 0); MODULE_PARM_DESC(rx_burst, "Rx rate burst maximum in packets (default rx_rate/10)"); @@ -173,11 +185,7 @@ MODULE_PARM_DESC(mirror_local, /* * Force to add one layer of VLAN tag to untagged packets on Dune devices */ -#if defined(SAI_FIXUP) && defined(BCM_DNX_SUPPORT) /* SONIC-16195 CS9129167 - Change the default to NOT add tag */ -static int force_tagged = 0; -#else static int force_tagged = 1; -#endif LKM_MOD_PARAM(force_tagged, "i", int, 0); MODULE_PARM_DESC(force_tagged, "Always tagged with VLAN tag with spceified VID or VSI(default 1)"); @@ -306,6 +314,10 @@ static int napi_weight = 0; /* Compatibility */ +#ifndef DMA_BIT_MASK +#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) +#endif + #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)) #define NETDEV_UPDATE_TRANS_START_TIME(dev) dev->trans_start = jiffies #else @@ -560,8 +572,11 @@ typedef struct bkn_dcb_chain_s { #define MAX_TX_DCBS 64 #define MAX_RX_DCBS 64 -#define NUM_DMA_CHAN 8 -#define NUM_RX_CHAN 7 +#define NUM_DMA_CHAN 16 +#define NUM_CMICX_DMA_CHAN 8 +#define NUM_CMICR_DMA_CHAN 16 +#define NUM_RX_CHAN 15 +#define NUM_CMICR_RX_CHAN 15 #define NUM_CMICX_RX_CHAN 7 #define NUM_CMICM_RX_CHAN 3 @@ -628,7 +643,9 @@ typedef struct bkn_switch_info_s { uint32_t poll_channels; /* Channels for polling */ uint32_t unet_channels; /* User network channels */ uint32_t inst_id; /* Instance id of this device */ - uint32_t device_id; /* Device ID, like 0x8675 for Jericho A0, 0x */ + uint32_t base_id; /* Device (family) ID, like 0x8675 for Jericho A0, 0x */ + uint16_t dev_id; /* Device ID */ + uint8_t rev_id; /* Revision ID */ int evt_idx; /* Event queue index for this device*/ int basedev_suspended; /* Base device suspended */ int pcie_link_status; /* This flag is used to indicate PCIE Link status, 0 for up and 1 for down */ @@ -977,6 +994,7 @@ typedef struct bkn_filter_s { int dev_no; unsigned long hits; kcom_filter_t kf; + knet_filter_cb_f cb; } bkn_filter_t; @@ -1018,8 +1036,22 @@ static knet_hw_tstamp_ptp_clock_index_cb_f knet_hw_tstamp_ptp_clock_index_cb = N static knet_hw_tstamp_rx_time_upscale_cb_f knet_hw_tstamp_rx_time_upscale_cb = NULL; static knet_hw_tstamp_rx_pre_process_cb_f knet_hw_tstamp_rx_pre_process_cb = NULL; static knet_hw_tstamp_ioctl_cmd_cb_f knet_hw_tstamp_ioctl_cmd_cb = NULL; -static knet_netif_cb_f knet_netif_create_cb = NULL; -static knet_netif_cb_f knet_netif_destroy_cb = NULL; +static knet_hw_tstamp_ptp_transport_get_cb_f knet_hw_tstamp_ptp_transport_get_cb = NULL; + +typedef struct bkn_netif_cb_s { + struct list_head list; + knet_netif_cb_f cb; +} bkn_netif_cb_t; +LIST_HEAD(netif_create_cb_list); +LIST_HEAD(netif_destroy_cb_list); + +typedef struct bkn_filter_cb_s { + struct list_head list; + char desc[KCOM_FILTER_DESC_MAX]; + knet_filter_cb_f cb; +} bkn_filter_cb_t; +LIST_HEAD(filter_cb_list); + /* * Thread management */ @@ -1105,6 +1137,31 @@ bkn_sleep(int clicks) /* CMICx interrupts reserved for kernel handler */ #define CMICX_TXRX_IRQ_MASK 0xffffffff +/* CMICR registers */ +#define CMICR_CMC_BASE 0x00000000 +#define CMICR_DMA_CTRLr (CMICR_CMC_BASE + 0x00003100) +#define CMICR_DMA_STATr (CMICR_CMC_BASE + 0x00003114) +#define CMICR_DMA_DESC_HIr (CMICR_CMC_BASE + 0x00003108) +#define CMICR_DMA_DESC_LOr (CMICR_CMC_BASE + 0x00003104) +#define CMICR_DMA_HALT_HIr (CMICR_CMC_BASE + 0x00003110) +#define CMICR_DMA_HALT_LOr (CMICR_CMC_BASE + 0x0000310c) +#define CMICR_INTR_STATr (CMICR_CMC_BASE + 0x00003118) +#define CMICR_INTR_ENABr (CMICR_CMC_BASE + 0x0000311C) +#define CMICR_INTR_CLRr (CMICR_CMC_BASE + 0x00003120) + +/* + * PAXB_0_INTC_SET_INTR_ENABLE_REG5r sets interrupt enable bit for interrupts 191 down to 160 + * Packet DMA interrupt enable bit is [168 : 199], here bit [168 : 183] is considered because it is assumed that only cmc0 + */ +#define PAXB_0_INTC_SET_INTR_ENABLE_REG5r 0x0292D114 +#define PAXB_0_INTC_INTR_RAW_STATUS_REG5r 0x0292D18C + + +/* CMICR interrupts reserved for kernel handler */ +#define CMICR_TXRX_IRQ_MASK 0xffff00 + + +#define DEV_IS_CMICR(_sinfo) ((_sinfo)->cmic_type == 'r') #define DEV_IS_CMICX(_sinfo) ((_sinfo)->cmic_type == 'x') #define DEV_IS_CMICM(_sinfo) ((_sinfo)->cmic_type == 'm') #define DEV_IS_CMIC(_sinfo) ((_sinfo)->cmic_type != 0) @@ -1145,6 +1202,14 @@ bkn_sleep(int clicks) #define CMICX_DS_CMC_DMA_CHAIN_DONE (0x00000001) #define CMICX_DS_CMC_DMA_ACTIVE (0x00000002) +#define CMICR_DS_CHAIN_DONE_INTR (0x00000001) +#define CMICR_DS_DESC_DONE_INTR (0x00000002) +#define CMICR_DS_DESC_CONTROLLED_INTR (0x00000004) +#define CMICR_DS_INTR_COALESCING_INTR (0x00000008) + +#define CMICR_DS_CMC_DMA_CHAIN_DONE (0x00000001) +#define CMICR_DS_CMC_DMA_ACTIVE (0x00000002) + #define DMA_TO_BUS_HI(dma) ((dma) | sinfo->dma_hi) #define BUS_TO_DMA_HI(bus) ((bus) & ~sinfo->dma_hi) @@ -1163,10 +1228,23 @@ bkn_sleep(int clicks) #define CMICX_DC_CMC_CTRLD_INT (0x00000080) #define CMICX_DC_CMC_CONTINUOUS (0x00000100) +#define CMICR_DC_CMC_DIRECTION (0x00000001) +#define CMICR_DC_CMC_ENABLE (0x00000002) +#define CMICR_DC_CMC_ABORT (0x00000004) +#define CMICR_DC_CMC_CTRLD_INT (0x00000080) +#define CMICR_DC_CMC_CONTINUOUS (0x00000100) +#define CMICR_DC_CHAIN_DONE_INTR_ENABLE (0x00000001) +#define CMICR_DC_DESC_DONE_INTR_ENABLE (0x00000002) +#define CMICR_DC_DESC_CONTROLLED_INTR_ENABLE (0x00000004) +#define CMICR_DC_INTR_COALESCING_INTR_ENABLE (0x00000008) + + /* Minimum packet header size for protect underflow. */ #define CMICX_PKT_HDR_SIZE_MIN 8 /* CMICX minimum packet header size for protect underflow. */ #define CMICX_DCB_SIZE_MIN 16 +/* CMICR minimum packet header size for protect underflow. */ +#define CMICR_DCB_SIZE_MIN 16 /* Minimum packet header size for protect underflow. */ #define DCB_SIZE_MIN 20 /* Maximum packet raw data size for filter validation. */ @@ -1176,7 +1254,7 @@ static void dev_read32(bkn_switch_info_t *sinfo, uint32_t address, uint32_t *value) { /* Devices id started with 0x8 is always from DNX devices */ - if ((sinfo->device_id & 0x8000) == 0x8000) { + if ((sinfo->base_id & 0x8000) == 0x8000) { if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) { /* Bypass register access when PCIE Link is down */ return; @@ -1190,7 +1268,7 @@ static void dev_write32(bkn_switch_info_t *sinfo, uint32_t address, uint32_t value) { /* Devices id started with 0x8 is always from DNX devices */ - if ((sinfo->device_id & 0x8000) == 0x8000) { + if ((sinfo->base_id & 0x8000) == 0x8000) { if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) { /* Bypass register access when PCIE Link is down */ return; @@ -1318,7 +1396,7 @@ static inline void xgs_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) { /* Devices id started with 0x8 is always from DNX devices */ - if ((sinfo->device_id & 0x8000) == 0x8000) { + if ((sinfo->base_id & 0x8000) == 0x8000) { if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) { /* Bypass hw access when PCIE Link is down */ return; @@ -1498,7 +1576,7 @@ xgsm_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) uint32_t ctrld_mask = 0; /* Devices id started with 0x8 is always from DNX devices */ - if ((sinfo->device_id & 0x8000) == 0x8000) { + if ((sinfo->base_id & 0x8000) == 0x8000) { if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) { /* Bypass hw access when PCIE Link is down */ return; @@ -1729,7 +1807,7 @@ xgsx_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) uint32_t fmask = CMICX_TXRX_IRQ_MASK; /* Devices id started with 0x8 is always from DNX devices */ - if ((sinfo->device_id & 0x8000) == 0x8000) { + if ((sinfo->base_id & 0x8000) == 0x8000) { if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) { /* Bypass hw access when PCIE Link is down */ return; @@ -1801,10 +1879,239 @@ xgsx_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw) } } +static inline void +xgsr_dma_chain_clear(bkn_switch_info_t *sinfo, int chan) +{ + uint32_t ctrl = 0; + uint32_t stat = 0; + + /* Disabing DMA clears chain done */ + dev_read32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, &ctrl); + ctrl &= ~(CMICR_DC_CMC_ENABLE | CMICR_DC_CMC_ABORT); + dev_write32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, ctrl); + + stat = CMICR_DS_CHAIN_DONE_INTR; + dev_write32(sinfo, CMICR_INTR_CLRr + 0x80 * chan, stat); + + MEMORY_BARRIER; + + /* Flush write buffer */ + dev_read32(sinfo, CMICR_INTR_CLRr + 0x80 * chan, &stat); + + MEMORY_BARRIER; +} + +static inline void +xgsr_dma_desc_clear(bkn_switch_info_t *sinfo, int chan) +{ + uint32_t stat = 0; + + if (CDMA_CH(sinfo, chan)) { + stat = CMICR_DS_DESC_CONTROLLED_INTR; + } else { + stat = CMICR_DS_DESC_DONE_INTR; + } + dev_write32(sinfo, CMICR_INTR_CLRr + 0x80 * chan, stat); + + MEMORY_BARRIER; + + /* Flush write buffer */ + dev_read32(sinfo, CMICR_INTR_CLRr + 0x80 * chan, &stat); + + MEMORY_BARRIER; +} + +static int +xgsr_dma_chan_clear(bkn_switch_info_t *sinfo, int chan) +{ + xgsr_dma_chain_clear(sinfo, chan); + xgsr_dma_desc_clear(sinfo, chan); + + return 0; +} + +static inline void +xgsr_cdma_halt_set(bkn_switch_info_t *sinfo, int chan) +{ + dev_write32(sinfo, CMICR_DMA_HALT_LOr + 0x80 * chan, + sinfo->halt_addr[chan]); + dev_write32(sinfo, CMICR_DMA_HALT_HIr + 0x80 * chan, + DMA_TO_BUS_HI(sinfo->halt_addr[chan] >> 32)); + + MEMORY_BARRIER; +} + +static int +xgsr_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir) +{ + uint32_t ctrl = 0; + + dev_read32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, &ctrl); + ctrl &= ~CMICR_DC_CMC_DIRECTION; + if (dir) { + ctrl |= CMICR_DC_CMC_DIRECTION; + } + if (CDMA_CH(sinfo, chan)) { + ctrl |= CMICR_DC_CMC_CONTINUOUS | CMICR_DC_CMC_CTRLD_INT; + xgsr_cdma_halt_set(sinfo, chan); + } + dev_write32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, ctrl); + + MEMORY_BARRIER; + + return 0; +} + +static int +xgsr_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb) +{ + uint32_t ctrl = 0; + + /* Write the DCB address to the DESC address for this channel */ + dev_write32(sinfo, CMICR_DMA_DESC_LOr + 0x80 * chan, dcb); + dev_write32(sinfo, CMICR_DMA_DESC_HIr + 0x80 * chan, DMA_TO_BUS_HI(dcb >> 32)); + + MEMORY_BARRIER; + + /* Kick it off */ + dev_read32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, &ctrl); + ctrl |= CMICR_DC_CMC_ENABLE; + dev_write32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, ctrl); + + MEMORY_BARRIER; + + return 0; +} + +static int +xgsr_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls) +{ + uint32_t ctrl = 0; + uint32_t stat = 0; + int p; + + /* Skip abort sequence if channel is not active */ + dev_read32(sinfo, CMICR_DMA_STATr + 0x80 * chan, &stat); + if (!(stat & CMICR_DS_CMC_DMA_ACTIVE)) { + return 0; + } + + /* Abort the channel */ + dev_read32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, &ctrl); + ctrl |= CMICR_DC_CMC_ENABLE | CMICR_DC_CMC_ABORT; + dev_write32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, ctrl); + + MEMORY_BARRIER; + + /* Poll for abort completion */ + for (p = 0; p < polls; p++) { + dev_read32(sinfo, CMICR_DMA_STATr + 0x80 * chan, &stat); + if (!(stat & CMICR_DS_CMC_DMA_ACTIVE)) { + /* Clear up channel */ + xgsr_dma_chan_clear(sinfo, chan); + return polls; + } + } + + DBG_WARN(("DMA channel %d abort failed\n", chan)); + + return -1; +} + +static inline void +xgsr_irq_fmask_get(bkn_switch_info_t *sinfo, uint32_t *fmask) +{ + int chan, bits = 1, base = 8; + + if (fmask == NULL) { + return; + } + + *fmask = CMICR_TXRX_IRQ_MASK; + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + *fmask &= ~(((0x1 << bits) - 1) << ((XGS_DMA_RX_CHAN + chan) * bits + base)); + } + } + return; +} + +static inline void +xgsr_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) +{ + uint32_t irq_mask_reg = PAXB_0_INTC_SET_INTR_ENABLE_REG5r; + uint32_t fmask = CMICR_TXRX_IRQ_MASK; + + if ((sinfo->base_id & 0x8000) == 0x8000) { + /* Devices id started with 0x8 is always from DNX devices */ + if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) { + /* Bypass hw access when PCIE Link is down */ + return; + } + } + + if (sinfo->napi_poll_mode) { + mask = 0; + } + + xgsr_irq_fmask_get(sinfo, &fmask); + if (sinfo->cpu_no == 1) { + DBG_WARN(("IHost(AXI) is not supported.\n")); + } + + lkbde_irq_mask_set(sinfo->dev_no | LKBDE_ISR2_DEV | LKBDE_IPROC_REG, + irq_mask_reg, mask, fmask); +} + +static inline void +xgsr_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + uint32_t enabler; + int bits = 1, base = 8; + + if (CDMA_CH(sinfo, chan)) { + dev_read32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, &enabler); + enabler |= CMICR_DC_DESC_CONTROLLED_INTR_ENABLE; + dev_write32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, enabler); + } else { + DBG_WARN(("Chained mode is not supported.\n")); + } + + sinfo->irq_mask |= (((0x1 << bits) - 1) << (chan * bits + base)); + + if (update_hw) { + xgsr_irq_mask_set(sinfo, sinfo->irq_mask); + } +} + +static inline void +xgsr_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw) +{ + uint32_t enabler; + int bits = 1, base = 8; + + if (CDMA_CH(sinfo, chan)) { + dev_read32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, &enabler); + enabler &= ~CMICR_DC_DESC_CONTROLLED_INTR_ENABLE; + dev_write32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, enabler); + } else { + DBG_WARN(("Chained mode is not supported.\n")); + } + + sinfo->irq_mask &= ~(((0x1 << bits) - 1) << (chan * bits + base)); + + if (update_hw) { + xgsr_irq_mask_set(sinfo, sinfo->irq_mask); + } +} + static inline void dev_dma_chain_clear(bkn_switch_info_t *sinfo, int chan) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + xgsr_dma_chain_clear(sinfo, chan); + } else if (DEV_IS_CMICX(sinfo)) { xgsx_dma_chain_clear(sinfo, chan); } else if (DEV_IS_CMICM(sinfo)) { xgsm_dma_chain_clear(sinfo, chan); @@ -1816,7 +2123,9 @@ dev_dma_chain_clear(bkn_switch_info_t *sinfo, int chan) static inline void dev_dma_desc_clear(bkn_switch_info_t *sinfo, int chan) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + xgsr_dma_desc_clear(sinfo, chan); + } else if (DEV_IS_CMICX(sinfo)) { xgsx_dma_desc_clear(sinfo, chan); } else if (DEV_IS_CMICM(sinfo)) { xgsm_dma_desc_clear(sinfo, chan); @@ -1828,7 +2137,9 @@ dev_dma_desc_clear(bkn_switch_info_t *sinfo, int chan) static int dev_dma_chan_clear(bkn_switch_info_t *sinfo, int chan) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + return xgsr_dma_chan_clear(sinfo, chan); + } else if (DEV_IS_CMICX(sinfo)) { return xgsx_dma_chan_clear(sinfo, chan); } else if (DEV_IS_CMICM(sinfo)) { return xgsm_dma_chan_clear(sinfo, chan); @@ -1840,7 +2151,9 @@ dev_dma_chan_clear(bkn_switch_info_t *sinfo, int chan) static void dev_cdma_halt_set(bkn_switch_info_t *sinfo, int chan) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + xgsr_cdma_halt_set(sinfo, chan); + } else if (DEV_IS_CMICX(sinfo)) { xgsx_cdma_halt_set(sinfo, chan); } else if (DEV_IS_CMICM(sinfo)) { xgsm_cdma_halt_set(sinfo, chan); @@ -1850,7 +2163,9 @@ dev_cdma_halt_set(bkn_switch_info_t *sinfo, int chan) static int dev_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + return xgsr_dma_chan_init(sinfo, chan, dir); + } else if (DEV_IS_CMICX(sinfo)) { return xgsx_dma_chan_init(sinfo, chan, dir); } else if (DEV_IS_CMICM(sinfo)) { return xgsm_dma_chan_init(sinfo, chan, dir); @@ -1862,7 +2177,9 @@ dev_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir) static int dev_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + return xgsr_dma_chan_start(sinfo, chan, dcb); + } else if (DEV_IS_CMICX(sinfo)) { return xgsx_dma_chan_start(sinfo, chan, dcb); } else if (DEV_IS_CMICM(sinfo)) { return xgsm_dma_chan_start(sinfo, chan, dcb); @@ -1874,7 +2191,9 @@ dev_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb) static int dev_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + return xgsr_dma_chan_abort(sinfo, chan, polls); + } else if (DEV_IS_CMICX(sinfo)) { return xgsx_dma_chan_abort(sinfo, chan, polls); } else if (DEV_IS_CMICM(sinfo)) { return xgsm_dma_chan_abort(sinfo, chan, polls); @@ -1886,7 +2205,9 @@ dev_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls) static inline void dev_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + xgsr_irq_mask_set(sinfo, mask); + } else if (DEV_IS_CMICX(sinfo)) { xgsx_irq_mask_set(sinfo, mask); } else if (DEV_IS_CMICM(sinfo)) { xgsm_irq_mask_set(sinfo, mask); @@ -1898,7 +2219,9 @@ dev_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask) static inline void dev_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + xgsr_irq_mask_enable(sinfo, chan, update_hw); + } else if (DEV_IS_CMICX(sinfo)) { xgsx_irq_mask_enable(sinfo, chan, update_hw); } else if (DEV_IS_CMICM(sinfo)) { xgsm_irq_mask_enable(sinfo, chan, update_hw); @@ -1910,7 +2233,9 @@ dev_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw) static void dev_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw) { - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + xgsr_irq_mask_disable(sinfo, chan, update_hw); + } else if (DEV_IS_CMICX(sinfo)) { xgsx_irq_mask_disable(sinfo, chan, update_hw); } else if (DEV_IS_CMICM(sinfo)) { xgsm_irq_mask_disable(sinfo, chan, update_hw); @@ -2043,13 +2368,13 @@ bkn_init_dcbs(bkn_switch_info_t *sinfo) for (idx = 0; idx < (MAX_TX_DCBS + 1); idx++) { if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[2] |= 1 << 24 | 1 << 16; } else { dcb_mem[1] |= 1 << 24 | 1 << 16; } if (idx == MAX_TX_DCBS) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[0] = sinfo->tx.desc[0].dcb_dma; dcb_mem[1] = DMA_TO_BUS_HI(sinfo->tx.desc[0].dcb_dma >> 32); dcb_mem[2] |= 1 << 18; @@ -2076,13 +2401,13 @@ bkn_init_dcbs(bkn_switch_info_t *sinfo) for (chan = 0; chan < sinfo->rx_chans; chan++) { for (idx = 0; idx < (MAX_RX_DCBS + 1); idx++) { if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[2] |= 1 << 24 | 1 << 16; } else { dcb_mem[1] |= 1 << 24 | 1 << 16; } if (idx == MAX_RX_DCBS) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[0] = sinfo->rx[chan].desc[0].dcb_dma; dcb_mem[1] = DMA_TO_BUS_HI(sinfo->rx[chan].desc[0].dcb_dma >> 32); dcb_mem[2] |= 1 << 18; @@ -2154,12 +2479,12 @@ bkn_dump_pkt(uint8_t *data, int size, int txrx) sprintf(&str[strlen(str)], "%02x ", data[idx]); if ((idx & 0xf) == 0xf) { sprintf(&str[strlen(str)], "\n"); - gprintk(str); + gprintk("%s", str); } } if ((idx & 0xf) != 0) { sprintf(&str[strlen(str)], "\n"); - gprintk(str); + gprintk("%s", str); } } @@ -2277,12 +2602,12 @@ bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo, return -1; } dcb = &dcb_chain->dcb_mem[dcb_chain->dcb_cur * sinfo->dcb_wsize]; - if ((sinfo->cmic_type == 'x' && (dcb[2] & 0xffff) < pktlen) || - (sinfo->cmic_type != 'x' && (dcb[1] & 0xffff) < pktlen)) { + if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && (dcb[2] & 0xffff) < pktlen) || + (((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) && (dcb[1] & 0xffff) < pktlen)) { DBG_WARN(("Rx API buffer too small\n")); return -1; } - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { pkt_dma = BUS_TO_DMA_HI(dcb[1]); pkt_dma = pkt_dma << 32 | dcb[0]; } else { @@ -2308,7 +2633,7 @@ bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo, memcpy(pkt, skb_pkt, pktlen); /* Copy packet metadata and mark as done */ - if (sinfo->cmic_type != 'x') { + if ((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) { for (i = SOC_DCB_META_OFFSET; i < sinfo->dcb_wsize; i++) { dcb[i] = desc->dcb_mem[i]; } @@ -2320,8 +2645,8 @@ bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo, if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { dcb = &dcb_chain->dcb_mem[dcb_chain->dcb_cur * sinfo->dcb_wsize]; - if ((sinfo->cmic_type == 'x' && dcb[2] & (1 << 18)) || - (sinfo->cmic_type != 'x' && dcb[1] & (1 << 18))) { + if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && dcb[2] & (1 << 18)) || + (((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) && dcb[1] & (1 << 18))) { /* Get the next chain if reload done */ dcb[sinfo->dcb_wsize-1] |= 1 << 31 | SOC_DCB_KNET_DONE; MEMORY_BARRIER; @@ -2332,8 +2657,8 @@ bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo, } } } else { - if ((sinfo->cmic_type == 'x' && (dcb[2] & (1 << 16)) == 0) || - (sinfo->cmic_type != 'x' && (dcb[1] & (1 << 16)) == 0)) { + if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && (dcb[2] & (1 << 16)) == 0) || + (((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) && (dcb[1] & (1 << 16)) == 0)) { bkn_api_rx_chain_done(sinfo, chan); } } @@ -2353,8 +2678,8 @@ bkn_rx_refill(bkn_switch_info_t *sinfo, int chan) struct sk_buff *skb; bkn_desc_info_t *desc; uint32_t *dcb; - uint32_t resv_size = sinfo->cmic_type == 'x' ? RCPU_HDR_SIZE : RCPU_RX_ENCAP_SIZE; - uint32_t meta_size = sinfo->cmic_type == 'x' ? RCPU_RX_META_SIZE : 0; + uint32_t resv_size = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? RCPU_HDR_SIZE : RCPU_RX_ENCAP_SIZE; + uint32_t meta_size = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? RCPU_RX_META_SIZE : 0; int prev; if (sinfo->rx[chan].use_rx_skb == 0) { @@ -2414,7 +2739,7 @@ bkn_rx_refill(bkn_switch_info_t *sinfo, int chan) dcb = desc->dcb_mem; dcb[0] = desc->skb_dma; if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[2] |= 1 << 24 | 1 << 16; } else { dcb[1] |= 1 << 24 | 1 << 16; @@ -2422,14 +2747,14 @@ bkn_rx_refill(bkn_switch_info_t *sinfo, int chan) } else { prev = PREV_IDX(sinfo->rx[chan].cur, MAX_RX_DCBS); if (prev < (MAX_RX_DCBS - 1)) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { sinfo->rx[chan].desc[prev].dcb_mem[2] |= 1 << 16; } else { sinfo->rx[chan].desc[prev].dcb_mem[1] |= 1 << 16; } } } - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[1] = DMA_TO_BUS_HI(desc->skb_dma >> 32); dcb[2] |= rx_buffer_size + meta_size; } else { @@ -2639,6 +2964,7 @@ bkn_match_rx_pkt(bkn_switch_info_t *sinfo, uint8_t *pkt, int pktlen, uint8_t *oob = (uint8_t *)meta; int size, wsize; int idx, match; + knet_filter_cb_f filter_cb; list_for_each(list, &sinfo->rxpf_list) { filter = (bkn_filter_t *)list; @@ -2704,11 +3030,12 @@ bkn_match_rx_pkt(bkn_switch_info_t *sinfo, uint8_t *pkt, int pktlen, if (match) { if (kf->dest_type == KCOM_DEST_T_CB) { /* Check for custom filters */ - if (knet_filter_cb != NULL && cbf != NULL) { + filter_cb = filter->cb ? filter->cb : knet_filter_cb; + if (filter_cb != NULL && cbf != NULL) { memset(cbf, 0, sizeof(*cbf)); memcpy(&cbf->kf, kf, sizeof(cbf->kf)); - if (knet_filter_cb(pkt, pktlen, sinfo->dev_no, - meta, chan, &cbf->kf)) { + if (filter_cb(pkt, pktlen, sinfo->dev_no, + meta, chan, &cbf->kf)) { filter->hits++; return cbf; } @@ -2791,7 +3118,7 @@ bkn_add_rcpu_encap(bkn_switch_info_t *sinfo, struct sk_buff *skb, void *meta, in psize = RCPU_HDR_SIZE + len; skb_push(skb, psize); memset(skb->data, 0, psize); - } else if (sinfo->cmic_type == 'x') { + } else if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { psize = RCPU_HDR_SIZE + sinfo->pkt_hdr_size; skb_push(skb, psize); memset(skb->data, 0, RCPU_HDR_SIZE); @@ -2833,8 +3160,8 @@ bkn_add_rcpu_encap(bkn_switch_info_t *sinfo, struct sk_buff *skb, void *meta, in len = len > RCPU_RX_META_SIZE_MAX ? RCPU_RX_META_SIZE_MAX : len; memcpy(&skb->data[RCPU_HDR_SIZE], (uint8_t *)meta, len); } else { - smeta = sinfo->cmic_type == 'x' ? (uint32_t *)meta : (uint32_t *)meta + 2; - wsize = sinfo->cmic_type == 'x' ? sinfo->pkt_hdr_size / 4 : sinfo->dcb_wsize - 3; + smeta = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? (uint32_t *)meta : (uint32_t *)meta + 2; + wsize = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? sinfo->pkt_hdr_size / 4 : sinfo->dcb_wsize - 3; for (idx = 0; idx < wsize; idx++) { dmeta[idx] = htonl(smeta[idx]); } @@ -3729,8 +4056,8 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) if (dcbs_done >= budget) { break; } - if ((sinfo->cmic_type == 'x' && dcb[2] & (1 << 18)) || - (sinfo->cmic_type != 'x' && dcb[1] & (1 << 18))) { + if (((sinfo->cmic_type == 'x' || sinfo->cmic_type == 'r') && dcb[2] & (1 << 18)) || + ((sinfo->cmic_type != 'x' && sinfo->cmic_type != 'r') && dcb[1] & (1 << 18))) { dcb[sinfo->dcb_wsize-1] |= SOC_DCB_KNET_DONE; bkn_api_rx_chain_done(sinfo, chan); dcb_chain = sinfo->rx[chan].api_dcb_chain; @@ -3740,12 +4067,12 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) continue; } } - if ((sinfo->cmic_type == 'x' && (dcb[2] & (1 << 16)) == 0) || - (sinfo->cmic_type != 'x' && (dcb[1] & (1 << 16)) == 0)) { + if (((sinfo->cmic_type == 'x' || sinfo->cmic_type == 'r') && (dcb[2] & (1 << 16)) == 0) || + ((sinfo->cmic_type != 'x' && sinfo->cmic_type != 'r') && (dcb[1] & (1 << 16)) == 0)) { sinfo->rx[chan].chain_complete = 1; } sinfo->rx[chan].pkts++; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { pkt_dma = BUS_TO_DMA_HI(dcb[1]); pkt_dma = pkt_dma << 32 | dcb[0]; } else { @@ -3764,7 +4091,7 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) bkn_packet_header_parse(sinfo, pkt, (uint32_t)pktlen, &packet_info); pkt_hdr_size = packet_info.system_header_size; } else { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta = (uint32_t *)pkt; err_woff = sinfo->pkt_hdr_size / sizeof(uint32_t) - 1; meta[err_woff] = dcb[sinfo->dcb_wsize-1]; @@ -4150,8 +4477,8 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) if ((dcb[sinfo->dcb_wsize-1] & (1 << 31)) == 0) { break; } - if ((sinfo->cmic_type == 'x' && (dcb[2] & (1 << 16)) == 0) || - (sinfo->cmic_type != 'x' && (dcb[1] & (1 << 16)) == 0)) { + if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && (dcb[2] & (1 << 16)) == 0) || + (((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) && (dcb[1] & (1 << 16)) == 0)) { sinfo->rx[chan].chain_complete = 1; /* Request one extra poll to check for chain done interrupt */ if (sinfo->napi_poll_mode) { @@ -4201,7 +4528,7 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) } } else { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta = (uint32_t *)skb->data; err_woff = sinfo->pkt_hdr_size / sizeof(uint32_t) - 1; meta[err_woff] = dcb[sinfo->dcb_wsize-1]; @@ -4377,7 +4704,7 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) for (idx = pkt_hdr_size; idx >= 4; idx--) { pkt[idx] = pkt[idx - 4]; } - } else if (sinfo->cmic_type == 'x') { + } else if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { for (idx = pkt_hdr_size / sizeof(uint32_t); idx; idx--) { meta[idx] = meta[idx - 1]; @@ -4568,7 +4895,7 @@ bkn_rx_debug_dump(bkn_switch_info_t *sinfo, int chan) (unsigned long)sinfo->rx[chan].desc[0].dcb_dma); for (cnt = 0; cnt < MAX_RX_DCBS; cnt++) { dcb = sinfo->rx[chan].desc[cnt].dcb_mem; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { gprintk(" DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt, dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); } else { @@ -4583,7 +4910,7 @@ bkn_rx_debug_dump(bkn_switch_info_t *sinfo, int chan) gprintk(" [0x%08lx]--->\n", (unsigned long)dcb_chain->dcb_dma); for (cnt = 0; cnt < dcb_chain->dcb_cnt; cnt++) { dcb = &dcb_chain->dcb_mem[sinfo->dcb_wsize * cnt]; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { gprintk(" DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt, dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); } else { @@ -4714,7 +5041,9 @@ bkn_suspend_tx(bkn_switch_info_t *sinfo) /* Stop associated virtual devices */ list_for_each(list, &sinfo->ndev_list) { priv = (bkn_priv_t *)list; - netif_stop_queue(priv->dev); + if (priv->dev) { + netif_stop_queue(priv->dev); + } } } @@ -4731,8 +5060,10 @@ bkn_resume_tx(bkn_switch_info_t *sinfo) /* Check associated virtual devices */ list_for_each(list, &sinfo->ndev_list) { priv = (bkn_priv_t *)list; - if (netif_queue_stopped(priv->dev) && sinfo->tx.free > 1) { - netif_wake_queue(priv->dev); + if (priv->dev) { + if (netif_queue_stopped(priv->dev) && sinfo->tx.free > 1) { + netif_wake_queue(priv->dev); + } } } } @@ -4752,7 +5083,7 @@ bkn_hw_tstamp_tx_set(bkn_switch_info_t *sinfo, struct sk_buff *skb) int hwts; int port; uint64_t ts = 0; - uint32_t hdrlen = sinfo->cmic_type == 'x' ? PKT_TX_HDR_SIZE : 0; + uint32_t hdrlen = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? PKT_TX_HDR_SIZE : 0; struct skb_shared_hwtstamps shhwtstamps; if (!knet_hw_tstamp_tx_time_get_cb) { @@ -4918,7 +5249,7 @@ bkn_tx_cdma_chain_switch(bkn_switch_info_t *sinfo) dcb_mem = sinfo->tx.desc[sinfo->tx.cur].dcb_mem; memset(dcb_mem, 0, sinfo->dcb_wsize * sizeof(uint32_t)); dcb_mem[0] = dcb_chain->dcb_dma; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32); dcb_mem[2] |= 1 << 24 | 1 << 18 | 1 << 16; } else { @@ -4938,7 +5269,7 @@ bkn_tx_cdma_chain_switch(bkn_switch_info_t *sinfo) woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize; dcb_mem = &dcb_chain->dcb_mem[woffset]; dcb_mem[0] = sinfo->tx.desc[sinfo->tx.dirty].dcb_dma; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[1] = DMA_TO_BUS_HI(sinfo->tx.desc[sinfo->tx.dirty].dcb_dma >> 32); } dcb_dma = sinfo->tx.desc[sinfo->tx.cur].dcb_dma; @@ -4978,14 +5309,14 @@ bkn_api_tx(bkn_switch_info_t *sinfo) if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN) && i == dcb_chain->dcb_cnt - 1) { break; } - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { pkt_dma = BUS_TO_DMA_HI(dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 1]); pkt_dma = pkt_dma << 32 | dcb_chain->dcb_mem[sinfo->dcb_wsize * i]; } else { pkt_dma = dcb_chain->dcb_mem[sinfo->dcb_wsize * i]; } pktdata = kernel_bde->p2l(sinfo->dev_no, pkt_dma); - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { pktlen = dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 2] & 0xffff; } else { pktlen = dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 1] & 0xffff; @@ -5117,7 +5448,7 @@ bkn_tx_chain_done(bkn_switch_info_t *sinfo, int done) pending = MAX_TX_DCBS - sinfo->tx.free; idx = sinfo->tx.dirty; while (--pending && idx < (MAX_TX_DCBS - 1)) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { sinfo->tx.desc[idx++].dcb_mem[2] |= 1 << 16; } else { sinfo->tx.desc[idx++].dcb_mem[1] |= 1 << 16; @@ -5333,6 +5664,7 @@ xgsx_do_dma(bkn_switch_info_t *sinfo, int budget) dev_read32(sinfo, CMICX_IRQ_STATr, &irq_stat); dev_read32(sinfo, CMICX_DMA_STATr + 0x80 * XGS_DMA_TX_CHAN, &tx_dma_stat); + for (chan = 0; chan < sinfo->rx_chans; chan++) { if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { unet_chans++; @@ -5408,54 +5740,139 @@ xgsx_do_dma(bkn_switch_info_t *sinfo, int budget) } static int -dev_do_dma(bkn_switch_info_t *sinfo, int budget) -{ - if (DEV_IS_CMICX(sinfo)) { - return xgsx_do_dma(sinfo, budget); - } else if (DEV_IS_CMICM(sinfo)) { - return xgsm_do_dma(sinfo, budget); - } else { - return xgs_do_dma(sinfo, budget); - } -} - -static void -xgs_isr(bkn_switch_info_t *sinfo) +xgsr_do_dma(bkn_switch_info_t *sinfo, int budget) { - uint32_t irq_stat = 0; - int rx_dcbs_done; + int rx_dcbs_done = 0, tx_dcbs_done = 0; + int chan_done, budget_chans = 0; + uint32_t tx_dma_stat = 0; + uint32_t rx_dma_stat[NUM_CMICR_RX_CHAN] = {0}; + int chan; + int unet_chans = 0; - dev_read32(sinfo, CMIC_IRQ_STATr, &irq_stat); - if ((irq_stat & sinfo->irq_mask) == 0) { - /* Not ours */ - return; + dev_read32(sinfo, CMICR_INTR_STATr + 0x80 * XGS_DMA_TX_CHAN, &tx_dma_stat); + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + unet_chans++; + continue; + } + dev_read32(sinfo, + CMICR_INTR_STATr + 0x80 * (XGS_DMA_RX_CHAN + chan), + &rx_dma_stat[chan]); } - sinfo->interrupts++; - - DBG_IRQ(("Got interrupt on device %d (0x%08x)\n", - sinfo->dev_no, irq_stat)); - if (use_napi) { - bkn_schedule_napi_poll(sinfo); - } else { - xgs_irq_mask_set(sinfo, 0); - do { - rx_dcbs_done = xgs_do_dma(sinfo, MAX_RX_DCBS); - } while (rx_dcbs_done); + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + continue; + } + if (rx_dma_stat[chan] & CMICR_DS_DESC_CONTROLLED_INTR) { + xgsr_dma_desc_clear(sinfo, XGS_DMA_RX_CHAN + chan); + sinfo->poll_channels |= 1 << chan; + } } - - xgs_irq_mask_set(sinfo, sinfo->irq_mask); -} - -static void -xgsm_isr(bkn_switch_info_t *sinfo) -{ - uint32_t irq_stat = 0; - int rx_dcbs_done; - - dev_read32(sinfo, CMICM_IRQ_STATr, &irq_stat); - if ((irq_stat & sinfo->irq_mask) == 0) { - /* Not ours */ + if (!sinfo->poll_channels) { + sinfo->poll_channels = (uint32_t)(1 << sinfo->rx_chans) - 1; + sinfo->poll_channels &= ~(sinfo->unet_channels >> 1); + if (sinfo->rx_chans > unet_chans) { + budget_chans = budget / (sinfo->rx_chans - unet_chans); + } + } else { + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (1 << chan & sinfo->poll_channels) { + budget_chans++; + } + } + if (budget_chans) { + budget_chans = budget / budget_chans; + } + } + + for (chan = 0; chan < sinfo->rx_chans; chan++) { + if (1 << chan & sinfo->poll_channels) { + chan_done = bkn_do_rx(sinfo, chan, budget_chans); + rx_dcbs_done += chan_done; + if (chan_done < budget_chans) { + sinfo->poll_channels &= ~(1 << chan); + } + bkn_rx_desc_done(sinfo, chan); + } + + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + continue; + } + + if (rx_dma_stat[chan] & CMICR_DS_CMC_DMA_CHAIN_DONE) { + if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + continue; + } + xgsx_dma_chain_clear(sinfo, XGS_DMA_RX_CHAN + chan); + bkn_rx_chain_done(sinfo, chan); + } + } + + if (tx_dma_stat & CMICR_DS_DESC_CONTROLLED_INTR) { + if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { + xgsr_dma_desc_clear(sinfo, XGS_DMA_TX_CHAN); + } else { + xgsr_dma_chain_clear(sinfo, XGS_DMA_TX_CHAN); + } + tx_dcbs_done = bkn_do_tx(sinfo); + bkn_tx_chain_done(sinfo, tx_dcbs_done); + } + + return sinfo->poll_channels ? budget : rx_dcbs_done; +} + +static int +dev_do_dma(bkn_switch_info_t *sinfo, int budget) +{ + if (DEV_IS_CMICR(sinfo)) { + return xgsr_do_dma(sinfo, budget); + } else if (DEV_IS_CMICX(sinfo)) { + return xgsx_do_dma(sinfo, budget); + } else if (DEV_IS_CMICM(sinfo)) { + return xgsm_do_dma(sinfo, budget); + } else { + return xgs_do_dma(sinfo, budget); + } +} + +static void +xgs_isr(bkn_switch_info_t *sinfo) +{ + uint32_t irq_stat = 0; + int rx_dcbs_done; + + dev_read32(sinfo, CMIC_IRQ_STATr, &irq_stat); + if ((irq_stat & sinfo->irq_mask) == 0) { + /* Not ours */ + return; + } + sinfo->interrupts++; + + DBG_IRQ(("Got interrupt on device %d (0x%08x)\n", + sinfo->dev_no, irq_stat)); + + if (use_napi) { + bkn_schedule_napi_poll(sinfo); + } else { + xgs_irq_mask_set(sinfo, 0); + do { + rx_dcbs_done = xgs_do_dma(sinfo, MAX_RX_DCBS); + } while (rx_dcbs_done); + } + + xgs_irq_mask_set(sinfo, sinfo->irq_mask); +} + +static void +xgsm_isr(bkn_switch_info_t *sinfo) +{ + uint32_t irq_stat = 0; + int rx_dcbs_done; + + dev_read32(sinfo, CMICM_IRQ_STATr, &irq_stat); + if ((irq_stat & sinfo->irq_mask) == 0) { + /* Not ours */ return; } sinfo->interrupts++; @@ -5497,7 +5914,7 @@ xgsx_isr(bkn_switch_info_t *sinfo) if (device_is_dnx(sinfo)) { uint32_t ctrl = 0; int chan = 0; - for (chan = 0; chan < NUM_DMA_CHAN; chan++) { + for (chan = 0; chan < NUM_CMICX_DMA_CHAN; chan++) { if (irq_stat & CMICX_DS_CMC_CHAIN_DONE(chan)) { dev_read32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, &ctrl); if (ctrl & CMICX_DC_CMC_ABORT) { @@ -5531,6 +5948,59 @@ xgsx_isr(bkn_switch_info_t *sinfo) xgsx_irq_mask_set(sinfo, sinfo->irq_mask); } +static void +xgsr_isr(bkn_switch_info_t *sinfo) +{ + uint32_t irq_stat = 0; + int rx_dcbs_done; + + lkbde_irq_status_get(sinfo->dev_no | LKBDE_IPROC_REG, PAXB_0_INTC_INTR_RAW_STATUS_REG5r, &irq_stat); + + if ((irq_stat & sinfo->irq_mask) == 0) { + /* Not ours */ + return; + } + + /* Bypass chain_done from Abort */ + if (device_is_dnx(sinfo)) { + uint32_t ctrl = 0; + uint32_t intr_stat = 0; + int chan = 0; + for (chan = 0; chan < NUM_CMICR_DMA_CHAN; chan++) { + dev_read32(sinfo, CMICR_INTR_STATr + 0x80 * chan, &intr_stat); + if (intr_stat & CMICR_DS_CHAIN_DONE_INTR) { + dev_read32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, &ctrl); + if (ctrl & CMICR_DC_CMC_ABORT) { + DBG_IRQ(("chain %d: chain done for Abort\n", chan)); + return; + } + } + } + } + + sinfo->interrupts++; + + DBG_IRQ(("Got interrupt on device %d (0x%08x)\n", + sinfo->dev_no, irq_stat)); + + if (use_napi) { + bkn_schedule_napi_poll(sinfo); + } else { + xgsr_irq_mask_set(sinfo, 0); + do { + rx_dcbs_done = xgsr_do_dma(sinfo, MAX_RX_DCBS); + if (sinfo->cdma_channels) { + if (rx_dcbs_done >= MAX_RX_DCBS || sinfo->tx_yield) { + /* Continuous DMA mode requires to yield timely */ + break; + } + } + } while (rx_dcbs_done); + } + + xgsr_irq_mask_set(sinfo, sinfo->irq_mask); +} + static void bkn_isr(void *isr_data) { @@ -5555,7 +6025,9 @@ bkn_isr(void *isr_data) return; } - if (DEV_IS_CMICX(sinfo)) { + if (DEV_IS_CMICR(sinfo)) { + xgsr_isr(sinfo); + } else if (DEV_IS_CMICX(sinfo)) { xgsx_isr(sinfo); } else if (DEV_IS_CMICM(sinfo)) { xgsm_isr(sinfo); @@ -5948,6 +6420,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) unsigned long flags; uint8_t cpu_channel = 0; int headroom, tailroom; + int ptp_transport = 0; DBG_VERB(("Netif Tx(%s): Len=%d priv->id=%d\n", dev->name, skb->len, priv->id)); @@ -5987,9 +6460,25 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) /* Account for extra OAM-TS header. */ if ((bkn_skb_tx_flags(skb) & SKBTX_HW_TSTAMP) && (hdrlen > (BKN_DNX_PTCH_2_SIZE))) { - /* T_LOCAL_PORT intf will use Module Hdr + PTCH + ITMH + ASE1588 + TSH */ if (device_is_dnx(sinfo)) { - hdrlen += (BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE + BKN_DNX_TSH_SIZE); + if (knet_hw_tstamp_ptp_transport_get_cb != NULL) { + ptp_transport = knet_hw_tstamp_ptp_transport_get_cb(skb->data); + switch(ptp_transport) { + case 6: /* UDP IPv6 */ + /* T_LOCAL_PORT intf will use + Module Hdr + PTCH + ITMH + ASE1588 + TSH + INTERNAL_HDR + UDH base + */ + hdrlen += (BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE + BKN_DNX_TSH_SIZE + + BKN_DNX_INTERNAL_BASE_TYPE_12 + BKN_DNX_UDH_BASE_SIZE); + break; + case 4: /* UDP IPv4 */ + case 2: /* IEEE 802.3 */ + default: + /* T_LOCAL_PORT intf will use Module Hdr + PTCH + ITMH + ASE1588 + TSH */ + hdrlen += (BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE + BKN_DNX_TSH_SIZE); + break; + } + } } else { hdrlen += BKN_DPP_OTSH_SIZE_BYTE; } @@ -5997,7 +6486,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } else { - hdrlen = (sinfo->cmic_type == 'x' ) ? PKT_TX_HDR_SIZE : 0; + hdrlen = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? PKT_TX_HDR_SIZE : 0; } rcpulen = 0; sop = 0; @@ -6122,7 +6611,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } } } else { - if (((sinfo->cmic_type == 'x') && (priv->port >= 0)) + if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && (priv->port >= 0)) || device_is_sand(sinfo)) { if (skb_header_cloned(skb) || skb_headroom(skb) < hdrlen + 4) { /* Current SKB cannot be modified */ @@ -6236,11 +6725,11 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } dcb = desc->dcb_mem; - meta = (sinfo->cmic_type == 'x') ? (uint32_t *)pktdata : dcb; + meta = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? (uint32_t *)pktdata : dcb; memset(dcb, 0, sinfo->dcb_wsize * sizeof(uint32_t)); if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { if (device_is_sand(sinfo)) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[2] |= 1 << 19; /* Given Module Header exists and set first byte to be CPU channel */ pktdata[0] = cpu_channel; @@ -6252,7 +6741,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } else if (sop != 0) { /* If module header SOP is non-zero, use RCPU meta data */ - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[2] |= 1 << 19; } else { metalen = (sinfo->dcb_wsize - 3) * sizeof(uint32_t); @@ -6268,7 +6757,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } } else if (priv->port >= 0) { /* Send to physical port */ - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[2] |= 1 << 19; } else { dcb[1] |= 1 << 19; @@ -6276,16 +6765,28 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) switch (sinfo->dcb_type) { case 23: case 26: - case 30: - case 31: - case 34: - case 37: dcb[2] = 0x81000000; dcb[3] = priv->port; dcb[3] |= (priv->qnum & 0xc00) << 20; dcb[4] = 0x00040000; dcb[4] |= (priv->qnum & 0x3ff) << 8; break; + case 30: + case 31: + case 34: + case 37: + case 40: + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { + meta[0] = htonl(0x81000000); + meta[1] = htonl(priv->port); + meta[2] = htonl(0x00040000 | (priv->qnum & 0x7) << 24); + } else { + dcb[2] = 0x81000000; + dcb[3] = priv->port; + dcb[4] = 0x00040000; + dcb[4] |= (priv->qnum & 0x7) << 24; + } + break; case 24: dcb[2] = 0xff000000; dcb[3] = 0x00000100; @@ -6327,7 +6828,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) dcb[4] |= (priv->qnum & 0x3fff) << 8; break; case 36: - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta[0] = htonl(0x81000000); meta[1] = htonl(priv->port); meta[2] = htonl(0x00008000 | (priv->qnum & 0x3f) << 9); @@ -6339,7 +6840,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } break; case 38: - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta[0] = htonl(0x81000000); meta[1] = htonl(priv->port); meta[2] = htonl(0x00004000 | (priv->qnum & 0x3f) << 8); @@ -6360,17 +6861,16 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) memcpy(&pktdata[0], priv->system_headers, priv->system_headers_size); } break; - case 40: - if (sinfo->cmic_type == 'x') { + case 41: + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta[0] = htonl(0x81000000); - meta[1] = htonl(priv->port | (priv->qnum & 0xc00) << 20); - meta[2] = htonl(0x00040000 | (priv->qnum & 0x3ff) << 8); + meta[1] = htonl((priv->port) << 4); + meta[2] = htonl(0x00400000 | (priv->qnum & 0x3fff) << 8); } else { dcb[2] = 0x81000000; - dcb[3] = priv->port; - dcb[3] |= (priv->qnum & 0xc00) << 20; - dcb[4] = 0x00040000; - dcb[4] |= (priv->qnum & 0x3ff) << 8; + dcb[3] = (priv->port) << 4; + dcb[4] = 0x00400000; + dcb[4] |= (priv->qnum & 0x3fff) << 8; } break; default: @@ -6412,7 +6912,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) DBG_SKB(("Packet padded to %d bytes after tx callback\n", pktlen)); } pktdata = skb->data; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta = (uint32_t *)pktdata; } } else { @@ -6477,7 +6977,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) return 0; } dcb[0] = desc->skb_dma; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[1] = DMA_TO_BUS_HI(desc->skb_dma >> 32); dcb[2] &= ~SOC_DCB_KNET_COUNT_MASK; dcb[2] |= pktlen; @@ -6493,7 +6993,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) bkn_dump_pkt(pktdata, pktlen, XGS_DMA_TX_CHAN); if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[2] |= 1 << 24 | 1 << 16; } else { dcb[1] |= 1 << 24 | 1 << 16; @@ -6873,6 +7373,7 @@ bkn_get_ts_info(struct net_device *dev, struct ethtool_ts_info *info) case 36: case 38: case 40: + case 41: case 37: info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE | SOF_TIMESTAMPING_TX_SOFTWARE | @@ -7003,9 +7504,9 @@ bkn_init_ndev(u8 *mac, char *name) if (name && *name) { strncpy(dev->name, name, IFNAMSIZ-1); } -#if defined(CONFIG_NET_NS) + bkn_dev_net_set(dev, current->nsproxy->net_ns); -#endif + /* Register the kernel Ethernet device */ if (register_netdev(dev)) { DBG_WARN(("Error registering Ethernet device.\n")); @@ -7365,7 +7866,7 @@ bkn_seq_dma_show(struct seq_file *s, void *v) seq_printf(s, " [0x%08lx]--->\n", (unsigned long)dcb_chain->dcb_dma); for (cnt = 0; cnt < dcb_chain->dcb_cnt; cnt++) { dcb = &dcb_chain->dcb_mem[sinfo->dcb_wsize * cnt]; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { seq_printf(s, " DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt, dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); } else { @@ -7445,7 +7946,7 @@ bkn_seq_dma_show(struct seq_file *s, void *v) seq_printf(s, " [0x%08lx]--->\n", (unsigned long)dcb_chain->dcb_dma); for (cnt = 0; cnt < dcb_chain->dcb_cnt; cnt++) { dcb = &dcb_chain->dcb_mem[sinfo->dcb_wsize * cnt]; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { seq_printf(s, " DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt, dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); } else { @@ -7466,7 +7967,7 @@ bkn_seq_dma_show(struct seq_file *s, void *v) } } if (dcb) { - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { seq_printf(s, " DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", iter->idx, dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); } else { @@ -7615,7 +8116,7 @@ bkn_proc_debug_show(struct seq_file *m, void *v) sinfo->oamp_ports[1], sinfo->oamp_ports[2], sinfo->oamp_ports[3]); - seq_printf(m, " device_id: 0x%x\n", sinfo->device_id); + seq_printf(m, " device_id: 0x%x\n", sinfo->base_id); seq_printf(m, " pcie_status: %d\n", sinfo->pcie_link_status); unit++; } @@ -8165,7 +8666,7 @@ bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len) /* Handle for Continuous DMA mode */ if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize + 1; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { woffset += 1; } if ((dcb_chain->dcb_mem[woffset] & ((1 << 18) | (1 << 16))) != 0x50000) { @@ -8181,7 +8682,7 @@ bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len) /* Stitch this chain */ woffset = (dcb_chain_end->dcb_cnt - 1) * sinfo->dcb_wsize; dcb_chain_end->dcb_mem[woffset] = dcb_chain->dcb_dma; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_chain_end->dcb_mem[woffset + 1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32); } MEMORY_BARRIER; @@ -8220,7 +8721,7 @@ bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len) /* Handle for Continuous DMA mode */ if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize + 1; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { woffset += 1; } if ((dcb_chain->dcb_mem[woffset] & ((1 << 18) | (1 << 16))) != 0x50000) { @@ -8236,7 +8737,7 @@ bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len) /* Stitch this chain */ woffset = (dcb_chain_end->dcb_cnt - 1) * sinfo->dcb_wsize; dcb_chain_end->dcb_mem[woffset] = dcb_chain->dcb_dma; - if (sinfo->cmic_type == 'x') { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_chain_end->dcb_mem[woffset + 1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32); } MEMORY_BARRIER; @@ -8284,7 +8785,10 @@ bkn_create_inst(uint32 inst_id) if ((_bkn_multi_inst == 0) || (evt->inst_id == INVALID_INSTANCE_ID)) { _bkn_multi_inst ++; evt_idx = i; - init_waitqueue_head(&evt->evt_wq); + /* avoid repeated initialization */ + if (!waitqueue_active(&evt->evt_wq)) { + init_waitqueue_head(&evt->evt_wq); + } evt->inst_id = inst_id; DBG_INST(("%s evt_idx %d inst_id 0x%x\n",__FUNCTION__, i, inst_id)); break; @@ -8478,8 +8982,9 @@ bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len) return sizeof(kcom_msg_hdr_t); } - if ((kmsg->cmic_type == 'x' && kmsg->dcb_size < CMICX_DCB_SIZE_MIN) || - (kmsg->cmic_type != 'x' && kmsg->dcb_size < DCB_SIZE_MIN) || + if ((kmsg->cmic_type == 'r' && kmsg->dcb_size < CMICR_DCB_SIZE_MIN) || + (kmsg->cmic_type == 'x' && kmsg->dcb_size < CMICX_DCB_SIZE_MIN) || + ((kmsg->cmic_type != 'x' && kmsg->cmic_type != 'r') && kmsg->dcb_size < DCB_SIZE_MIN) || (kmsg->dcb_type != 39 && kmsg->cmic_type == 'x' && kmsg->pkt_hdr_size < CMICX_PKT_HDR_SIZE_MIN)) { kmsg->hdr.status = KCOM_E_PARAM; return sizeof(kcom_msg_hdr_t); @@ -8492,7 +8997,7 @@ bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len) sinfo->dcb_wsize = BYTES2WORDS(kmsg->dcb_size); sinfo->pkt_hdr_size = kmsg->pkt_hdr_size; sinfo->dma_hi = kmsg->dma_hi; - sinfo->rx_chans = sinfo->cmic_type == 'x' ? NUM_CMICX_RX_CHAN : NUM_CMICM_RX_CHAN; + sinfo->rx_chans = sinfo->cmic_type == 'r' ? NUM_CMICR_RX_CHAN : (sinfo->cmic_type == 'x' ? NUM_CMICX_RX_CHAN : NUM_CMICM_RX_CHAN); if (sinfo->rx_chans > NUM_RX_CHAN) { sinfo->rx_chans = NUM_RX_CHAN; } @@ -8510,8 +9015,8 @@ bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len) /* Ensure 32-bit PCI DMA is mapped properly on 64-bit platforms */ dev_type = kernel_bde->get_dev_type(sinfo->dev_no); - if (dev_type & BDE_PCI_DEV_TYPE && sinfo->cmic_type != 'x') { - if (dma_set_mask_and_coherent(&sinfo->pdev->dev, 0xffffffff)) { + if (dev_type & BDE_PCI_DEV_TYPE && (sinfo->cmic_type != 'x' && sinfo->cmic_type != 'r')) { + if (dma_set_mask(&sinfo->pdev->dev, DMA_BIT_MASK(32))) { cfg_api_unlock(sinfo, &flags); gprintk("No suitable DMA available for SKBs\n"); kmsg->hdr.status = KCOM_E_RESOURCE; @@ -8672,6 +9177,25 @@ bkn_knet_reprobe(kcom_msg_reprobe_t *kmsg, int len) return sizeof(kcom_msg_reprobe_t); } +static void +bkn_knet_netif_from_priv(kcom_netif_t *netif, bkn_priv_t *priv) +{ + memcpy(netif->macaddr, priv->dev->dev_addr, 6); + memcpy(netif->name, priv->dev->name, KCOM_NETIF_NAME_MAX - 1); + netif->vlan = priv->vlan; + netif->type = priv->type; + netif->id = priv->id; + netif->flags = priv->flags; + netif->cb_user_data = priv->cb_user_data; + + if (priv->port < 0) { + netif->port = 0; + } else { + netif->port = priv->port; + } + netif->qnum = priv->qnum; +} + static int bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len) { @@ -8680,8 +9204,12 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len) struct list_head *list; bkn_priv_t *priv, *lpriv; unsigned long flags; - int found, id; + int found; uint8_t *ma; + uint16_t id; + int realloc; + int rv = KCOM_E_NONE; + bkn_netif_cb_t *netif_create_cb; kmsg->hdr.type = KCOM_MSG_TYPE_RSP; @@ -8754,42 +9282,52 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len) DBG_RCPU(("RCPU auto-enabled\n")); } + id = kmsg->netif.id; /* Prevent (incorrect) compiler warning */ lpriv = NULL; + realloc = 0; spin_lock_irqsave(&sinfo->lock, flags); - /* - * We insert network interfaces sorted by ID. - * In case an interface is destroyed, we reuse the ID - * the next time an interface is created. - */ - found = 0; - id = 1; - list_for_each(list, &sinfo->ndev_list) { - lpriv = (bkn_priv_t *)list; - if (id < lpriv->id) { - found = 1; - break; + if (id > KCOM_NETIF_MAX) { + DBG_NDEV(("ID %d exceeds maximum network interface ID (max: %d)\n", + id, KCOM_NETIF_MAX)); + rv = KCOM_E_PARAM; + } else if (id == 0) { + for (id = 1; id < sinfo->ndev_max; id++) { + if (!sinfo->ndevs[id]) { + break; + } + } + if (id >= sinfo->ndev_max) { + realloc = 1; } - id = lpriv->id + 1; - } - priv->id = id; - if (found) { - /* Replace previously removed interface */ - list_add_tail(&priv->list, &lpriv->list); } else { - /* No holes - add to end of list */ - list_add_tail(&priv->list, &sinfo->ndev_list); + if (id >= sinfo->ndev_max) { + realloc = 1; + } else { + if (sinfo->ndevs[id]) { + DBG_NDEV(("ID %d is already in use\n", id)); + rv = KCOM_E_RESOURCE; + } + } } - if (id < sinfo->ndev_max) { - DBG_NDEV(("Add netif ID %d to table\n", id)); - sinfo->ndevs[id] = dev; - } else { - int ndev_max = sinfo->ndev_max + NDEVS_CHUNK; - int size = ndev_max * sizeof(struct net_device *); - void *ndevs = kmalloc(size, GFP_ATOMIC); + if (realloc) { + int ndev_max; + int size; + void *ndevs; + + ndev_max = sinfo->ndev_max; + do { + ndev_max += NDEVS_CHUNK; + } while ((id + 1) > ndev_max); + + if (ndev_max >= KCOM_NETIF_MAX) { + ndev_max = KCOM_NETIF_MAX + 1; + } + size = ndev_max * sizeof(struct net_device *); + ndevs = kmalloc(size, GFP_ATOMIC); if (ndevs != NULL) { DBG_NDEV(("Reallocate netif table for ID %d\n", id)); memset(ndevs, 0, size); @@ -8800,11 +9338,38 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len) } sinfo->ndevs = ndevs; sinfo->ndev_max = ndev_max; - sinfo->ndevs[id] = dev; + } else { + rv = KCOM_E_RESOURCE; } } + if (rv != KCOM_E_NONE) { + spin_unlock_irqrestore(&sinfo->lock, flags); + unregister_netdev(dev); + free_netdev(dev); + kmsg->hdr.status = rv; + return sizeof(kcom_msg_hdr_t); + } + priv->id = id; + DBG_NDEV(("Add netif ID %d to table\n", id)); + sinfo->ndevs[id] = dev; + + found = 0; + list_for_each(list, &sinfo->ndev_list) { + lpriv = (bkn_priv_t *)list; + if (id < lpriv->id) { + found = 1; + break; + } + } + if (found) { + /* Replace previously removed interface */ + list_add_tail(&priv->list, &lpriv->list); + } else { + /* No holes - add to end of list */ + list_add_tail(&priv->list, &sinfo->ndev_list); + } DBG_VERB(("Assigned ID %d to Ethernet device %s\n", priv->id, dev->name)); @@ -8812,10 +9377,11 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len) memcpy(kmsg->netif.macaddr, dev->dev_addr, 6); memcpy(kmsg->netif.name, dev->name, KCOM_NETIF_NAME_MAX - 1); - if (knet_netif_create_cb != NULL) { - int retv = knet_netif_create_cb(kmsg->hdr.unit, &(kmsg->netif), dev); - if (retv) { - gprintk("Warning: knet_netif_create_cb() returned %d for netif '%s'\n", retv, dev->name); + list_for_each(list, &netif_create_cb_list) { + netif_create_cb = list_entry(list, bkn_netif_cb_t, list); + if (netif_create_cb->cb(dev, sinfo->dev_no, &kmsg->netif) != 0) { + DBG_WARN(("Network interface create callback failed for '%s'\n", + dev->name)); } } @@ -8841,6 +9407,8 @@ bkn_knet_netif_destroy(kcom_msg_netif_destroy_t *kmsg, int len) struct list_head *list; unsigned long flags; int found; + bkn_netif_cb_t *netif_destroy_cb; + kcom_netif_t kcom_netif; kmsg->hdr.type = KCOM_MSG_TYPE_RSP; @@ -8867,20 +9435,6 @@ bkn_knet_netif_destroy(kcom_msg_netif_destroy_t *kmsg, int len) return sizeof(kcom_msg_hdr_t); } - if (!device_is_sand(sinfo)) { - if (knet_netif_destroy_cb != NULL) { - int retv; - kcom_netif_t netif; - memset(&netif, 0, sizeof(kcom_netif_t)); - netif.id = priv->id; - retv = knet_netif_destroy_cb(kmsg->hdr.unit, &netif, priv->dev); - if (retv) { - gprintk("warning: knet_netif_destroy_cb() returned %d for netif '%s'\n", - retv, priv->dev? priv->dev->name : "unknown"); - } - } - } - list_del(&priv->list); if (priv->id < sinfo->ndev_max) { @@ -8890,6 +9444,19 @@ bkn_knet_netif_destroy(kcom_msg_netif_destroy_t *kmsg, int len) cfg_api_unlock(sinfo, &flags); dev = priv->dev; + + if (!list_empty(&netif_destroy_cb_list)) { + memset(&kcom_netif, 0, sizeof(kcom_netif)); + bkn_knet_netif_from_priv(&kcom_netif, priv); + list_for_each(list, &netif_destroy_cb_list) { + netif_destroy_cb = list_entry(list, bkn_netif_cb_t, list); + if (netif_destroy_cb->cb(dev, sinfo->dev_no, &kcom_netif) != 0) { + DBG_WARN(("Network interface destroy callback failed for '%s'\n", + dev->name)); + } + } + } + DBG_VERB(("Removing virtual Ethernet device %s (%d).\n", dev->name, priv->id)); unregister_netdev(dev); @@ -8960,20 +9527,7 @@ bkn_knet_netif_get(kcom_msg_netif_get_t *kmsg, int len) return sizeof(kcom_msg_hdr_t); } - memcpy(kmsg->netif.macaddr, priv->dev->dev_addr, 6); - memcpy(kmsg->netif.name, priv->dev->name, KCOM_NETIF_NAME_MAX - 1); - kmsg->netif.vlan = priv->vlan; - kmsg->netif.type = priv->type; - kmsg->netif.id = priv->id; - kmsg->netif.flags = priv->flags; - kmsg->netif.cb_user_data = priv->cb_user_data; - - if (priv->port < 0) { - kmsg->netif.port = 0; - } else { - kmsg->netif.port = priv->port; - } - kmsg->netif.qnum = priv->qnum; + bkn_knet_netif_from_priv(&kmsg->netif, priv); spin_unlock_irqrestore(&sinfo->lock, flags); @@ -8986,6 +9540,7 @@ bkn_knet_filter_create(kcom_msg_filter_create_t *kmsg, int len) bkn_switch_info_t *sinfo; struct list_head *list; bkn_filter_t *filter, *lfilter; + bkn_filter_cb_t *filter_cb; unsigned long flags; int found, id; int oob_offset_max; @@ -9008,7 +9563,7 @@ bkn_knet_filter_create(kcom_msg_filter_create_t *kmsg, int len) if (device_is_sand(sinfo)) { oob_offset_max = BKN_SAND_SCRATCH_DATA_SIZE * 4; - } else if (sinfo->cmic_type == 'x') { + } else if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { oob_offset_max = sinfo->pkt_hdr_size; } else { oob_offset_max = sinfo->dcb_wsize * 4; @@ -9042,21 +9597,34 @@ bkn_knet_filter_create(kcom_msg_filter_create_t *kmsg, int len) } } } + + spin_unlock_irqrestore(&sinfo->lock, flags); + if (found) { /* Too many filters */ - spin_unlock_irqrestore(&sinfo->lock, flags); kmsg->hdr.status = KCOM_E_RESOURCE; return sizeof(kcom_msg_hdr_t); } - filter = kmalloc(sizeof(*filter), GFP_ATOMIC); + filter = kmalloc(sizeof(*filter), GFP_KERNEL); if (filter == NULL) { - spin_unlock_irqrestore(&sinfo->lock, flags); kmsg->hdr.status = KCOM_E_PARAM; return sizeof(kcom_msg_hdr_t); } memset(filter, 0, sizeof(*filter)); memcpy(&filter->kf, &kmsg->filter, sizeof(filter->kf)); filter->kf.id = id; + /* Check for filter-specific callback */ + if (filter->kf.dest_type == KCOM_DEST_T_CB && filter->kf.desc[0] != '\0') { + list_for_each(list, &filter_cb_list) { + filter_cb = list_entry(list, bkn_filter_cb_t, list); + if (strcmp(filter->kf.desc, filter_cb->desc) == 0) { + filter->cb = filter_cb->cb; + break; + } + } + } + + spin_lock_irqsave(&sinfo->lock, flags); /* Add according to priority */ found = 0; @@ -9515,6 +10083,8 @@ _cleanup(void) bkn_priv_t *priv; bkn_switch_info_t *sinfo; unsigned long flags; + bkn_netif_cb_t *netif_cb; + bkn_filter_cb_t *filter_cb; /* Inidicate that we are shutting down */ module_initialized = 0; @@ -9587,6 +10157,26 @@ _cleanup(void) bkn_destroy_sinfo(sinfo); } + /* Destroy any callback list which is not unregistered */ + while (!list_empty(&netif_create_cb_list)) { + netif_cb = list_entry(netif_create_cb_list.next, + bkn_netif_cb_t, list); + list_del(&netif_cb->list); + kfree(netif_cb); + } + while (!list_empty(&netif_destroy_cb_list)) { + netif_cb = list_entry(netif_destroy_cb_list.next, + bkn_netif_cb_t, list); + list_del(&netif_cb->list); + kfree(netif_cb); + } + while (!list_empty(&filter_cb_list)) { + filter_cb = list_entry(filter_cb_list.next, + bkn_filter_cb_t, list); + list_del(&filter_cb->list); + kfree(filter_cb); + } + return 0; } @@ -9665,7 +10255,9 @@ bkn_knet_dev_init(int d) /* Initialize default RCPU signature */ if ((bde_dev = kernel_bde->get_dev(d)) != NULL) { sinfo->rcpu_sig = bde_dev->device & ~0xf; - sinfo->device_id= bde_dev->device & ~0xf; + sinfo->base_id = bde_dev->device & ~0xf; + sinfo->dev_id = bde_dev->device; + sinfo->rev_id = bde_dev->rev; } /* Check for override */ if (rcpu_signature) { @@ -9751,11 +10343,11 @@ _init(void) /* Initialize event queue */ for (idx = 0; idx < LINUX_BDE_MAX_DEVICES; idx++) { - memset(&_bkn_evt[idx], 0, sizeof(bkn_evt_resource_t)); - _bkn_evt[idx].inst_id = INVALID_INSTANCE_ID; + evt = &_bkn_evt[idx]; + memset(evt, 0, sizeof(bkn_evt_resource_t)); + evt->inst_id = INVALID_INSTANCE_ID; + init_waitqueue_head(&evt->evt_wq); } - evt = &_bkn_evt[0]; - init_waitqueue_head(&evt->evt_wq); module_initialized = 1; @@ -9844,139 +10436,269 @@ gmodule_get(void) } /* - * Get DCB type and other HW info + * Call-back interfaces for other Linux kernel drivers. + * + * The Rx call-back allows an external module to modify SKB contents + * before it is handed off to the Linux network stack. + * + * The Tx call-back allows an external module to modify SKB contents + * before it is injected inot the switch. + * + * The HW timestamp callbacks invoke an external module to enable, disable + * HW timestamp on a specific port which is indicated while the netif is + * created through KNET API. KNET can also get device-specific SOBMH and + * timestamp for a Tx PTP packet through these callbacks. */ + int -bkn_hw_info_get(int unit, knet_hw_info_t *hw_info) +bkn_rx_skb_cb_register(knet_skb_cb_f rx_cb) { - bkn_switch_info_t *sinfo; - sinfo = bkn_sinfo_from_unit(unit); - if (sinfo == NULL) { - gprintk("Warning: unknown unit: %d\n", unit); - return (-1); + if (knet_rx_cb != NULL) { + return -1; } - - hw_info->cmic_type = sinfo->cmic_type; - hw_info->dcb_type = sinfo->dcb_type; - hw_info->dcb_size = WORDS2BYTES(sinfo->dcb_wsize); - hw_info->pkt_hdr_size = sinfo->pkt_hdr_size; - hw_info->cdma_channels = sinfo->cdma_channels; - - return (0); + knet_rx_cb = rx_cb; + return 0; } int -bkn_netif_create_cb_register(knet_netif_cb_f netif_cb) +bkn_rx_skb_cb_unregister(knet_skb_cb_f rx_cb) { - if (knet_netif_create_cb != NULL) { + if (rx_cb != NULL && knet_rx_cb != rx_cb) { return -1; } - knet_netif_create_cb = netif_cb; + knet_rx_cb = NULL; return 0; } int -bkn_netif_create_cb_unregister(knet_netif_cb_f netif_cb) +bkn_tx_skb_cb_register(knet_skb_cb_f tx_cb) { - if (netif_cb != NULL && knet_netif_create_cb != netif_cb) { + if (knet_tx_cb != NULL) { return -1; } - knet_netif_create_cb = NULL; + knet_tx_cb = tx_cb; return 0; } int -bkn_netif_destroy_cb_register(knet_netif_cb_f netif_cb) +bkn_tx_skb_cb_unregister(knet_skb_cb_f tx_cb) { - if (knet_netif_destroy_cb != NULL) { + if (tx_cb != NULL && knet_tx_cb != tx_cb) { return -1; } - knet_netif_destroy_cb = netif_cb; + knet_tx_cb = NULL; return 0; } int -bkn_netif_destroy_cb_unregister(knet_netif_cb_f netif_cb) +bkn_netif_create_cb_register(knet_netif_cb_f netif_cb) { - if (netif_cb != NULL && knet_netif_destroy_cb != netif_cb) { + struct list_head *list; + bkn_netif_cb_t *netif_create_cb; + + if (netif_cb == NULL) { return -1; } - knet_netif_destroy_cb = NULL; + list_for_each(list, &netif_create_cb_list) { + netif_create_cb = list_entry(list, bkn_netif_cb_t, list); + if (netif_create_cb->cb == netif_cb) { + return -1; + } + } + netif_create_cb = kmalloc(sizeof(*netif_create_cb), GFP_KERNEL); + if (netif_create_cb == NULL) { + return -1; + } + netif_create_cb->cb = netif_cb; + list_add_tail(&netif_create_cb->list, &netif_create_cb_list); return 0; } -/* - * Call-back interfaces for other Linux kernel drivers. - * - * The Rx call-back allows an external module to modify SKB contents - * before it is handed off to the Linux network stack. - * - * The Tx call-back allows an external module to modify SKB contents - * before it is injected inot the switch. - * - * The HW timestamp callbacks invoke an external module to enable, disable - * HW timestamp on a specific port which is indicated while the netif is - * created through KNET API. KNET can also get device-specific SOBMH and - * timestamp for a Tx PTP packet through these callbacks. - */ - int -bkn_rx_skb_cb_register(knet_skb_cb_f rx_cb) +bkn_netif_create_cb_unregister(knet_netif_cb_f netif_cb) { - if (knet_rx_cb != NULL) { + struct list_head *list, *list_next; + bkn_netif_cb_t *netif_create_cb; + int found = 0; + + if (netif_cb == NULL) { return -1; } - knet_rx_cb = rx_cb; + list_for_each_safe(list, list_next, &netif_create_cb_list) { + netif_create_cb = list_entry(list, bkn_netif_cb_t, list); + if (netif_create_cb->cb == netif_cb) { + found = 1; + list_del(list); + break; + } + } + if (!found) { + return -1; + } + kfree(netif_create_cb); return 0; } int -bkn_rx_skb_cb_unregister(knet_skb_cb_f rx_cb) +bkn_netif_destroy_cb_register(knet_netif_cb_f netif_cb) { - if (rx_cb != NULL && knet_rx_cb != rx_cb) { + struct list_head *list; + bkn_netif_cb_t *netif_destroy_cb; + + if (netif_cb == NULL) { return -1; } - knet_rx_cb = NULL; + list_for_each(list, &netif_destroy_cb_list) { + netif_destroy_cb = list_entry(list, bkn_netif_cb_t, list); + if (netif_destroy_cb->cb == netif_cb) { + return -1; + } + } + netif_destroy_cb = kmalloc(sizeof(*netif_destroy_cb), GFP_KERNEL); + if (netif_destroy_cb == NULL) { + return -1; + } + netif_destroy_cb->cb = netif_cb; + list_add_tail(&netif_destroy_cb->list, &netif_destroy_cb_list); return 0; } int -bkn_tx_skb_cb_register(knet_skb_cb_f tx_cb) +bkn_netif_destroy_cb_unregister(knet_netif_cb_f netif_cb) { - if (knet_tx_cb != NULL) { + struct list_head *list, *list_next; + bkn_netif_cb_t *netif_destroy_cb; + int found = 0; + + if (netif_cb == NULL) { return -1; } - knet_tx_cb = tx_cb; + list_for_each_safe(list, list_next, &netif_destroy_cb_list) { + netif_destroy_cb = list_entry(list, bkn_netif_cb_t, list); + if (netif_destroy_cb->cb == netif_cb) { + found = 1; + list_del(list); + break; + } + } + if (!found) { + return -1; + } + kfree(netif_destroy_cb); return 0; } int -bkn_tx_skb_cb_unregister(knet_skb_cb_f tx_cb) +bkn_filter_cb_register(knet_filter_cb_f filter_cb) { - if (tx_cb != NULL && knet_tx_cb != tx_cb) { + if (knet_filter_cb != NULL) { return -1; } - knet_tx_cb = NULL; + knet_filter_cb = filter_cb; return 0; } int -bkn_filter_cb_register(knet_filter_cb_f filter_cb) +bkn_filter_cb_register_by_name(knet_filter_cb_f filter_cb, char *filter_name) { - if (knet_filter_cb != NULL) { + struct list_head *list, *list2; + bkn_switch_info_t *sinfo; + bkn_filter_t *filter; + bkn_filter_cb_t *fcb; + unsigned long flags; + + if (filter_cb == NULL || filter_name == NULL) { return -1; } - knet_filter_cb = filter_cb; + if (filter_name[0] == '\0' || strlen(filter_name) >= KCOM_FILTER_DESC_MAX) { + return -1; + } + + list_for_each(list, &filter_cb_list) { + fcb = list_entry(list, bkn_filter_cb_t, list); + if (strcmp(fcb->desc, filter_name) == 0) { + return -1; + } + } + fcb = kmalloc(sizeof(*fcb), GFP_KERNEL); + if (fcb == NULL) { + return -1; + } + fcb->cb = filter_cb; + strcpy(fcb->desc, filter_name); + list_add_tail(&fcb->list, &filter_cb_list); + + /* Check if any existing filter matches the registered name */ + list_for_each(list, &_sinfo_list) { + sinfo = list_entry(list, bkn_switch_info_t, list); + spin_lock_irqsave(&sinfo->lock, flags); + + list_for_each(list2, &sinfo->rxpf_list) { + filter = list_entry(list2, bkn_filter_t, list); + if (filter->kf.dest_type != KCOM_DEST_T_CB) { + continue; + } + if (filter->kf.desc[0] != '\0') { + if (strcmp(filter->kf.desc, filter_name) == 0) { + filter->cb = filter_cb; + } + } + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + } return 0; } int bkn_filter_cb_unregister(knet_filter_cb_f filter_cb) { - if (filter_cb != NULL && knet_filter_cb != filter_cb) { + struct list_head *list, *list2; + bkn_switch_info_t *sinfo; + bkn_filter_t *filter; + bkn_filter_cb_t *fcb; + unsigned long flags; + int found = 0; + + /* Check if the any existing filter-specific callback matches */ + if (filter_cb) { + /* Remove from list */ + list_for_each_safe(list, list2, &filter_cb_list) { + fcb = list_entry(list, bkn_filter_cb_t, list); + if (fcb->cb == filter_cb) { + found = 1; + list_del(&fcb->list); + kfree(fcb); + break; + } + } + /* Check if the callback is set to filters */ + if (found) { + list_for_each(list, &_sinfo_list) { + sinfo = list_entry(list, bkn_switch_info_t, list); + spin_lock_irqsave(&sinfo->lock, flags); + + list_for_each(list2, &sinfo->rxpf_list) { + filter = list_entry(list2, bkn_filter_t, list); + if (filter->kf.dest_type != KCOM_DEST_T_CB) { + continue; + } + if (filter->cb == filter_cb) { + filter->cb = NULL; + } + } + + spin_unlock_irqrestore(&sinfo->lock, flags); + } + } + } + + if (!found && filter_cb != NULL && knet_filter_cb != filter_cb) { return -1; } - knet_filter_cb = NULL; + if (!found || filter_cb == knet_filter_cb) { + knet_filter_cb = NULL; + } return 0; } @@ -10149,11 +10871,61 @@ bkn_hw_tstamp_ioctl_cmd_cb_unregister(knet_hw_tstamp_ioctl_cmd_cb_f hw_tstamp_io return 0; } +int +bkn_hw_tstamp_ptp_transport_get_cb_register(knet_hw_tstamp_ptp_transport_get_cb_f hw_tstamp_ptp_transport_get_cb) +{ + if (knet_hw_tstamp_ptp_transport_get_cb != NULL) { + return -1; + } + knet_hw_tstamp_ptp_transport_get_cb = hw_tstamp_ptp_transport_get_cb; + return 0; +} + +int +bkn_hw_tstamp_ptp_transport_get_cb_unregister(knet_hw_tstamp_ptp_transport_get_cb_f hw_tstamp_ptp_transport_get_cb) +{ + if (knet_hw_tstamp_ptp_transport_get_cb == NULL || + knet_hw_tstamp_ptp_transport_get_cb != hw_tstamp_ptp_transport_get_cb) { + return -1; + } + knet_hw_tstamp_ptp_transport_get_cb = NULL; + return 0; +} + +/* + * Get HW device info + */ +int +bkn_hw_device_get(int dev_no, uint16_t *dev_id, uint8_t *rev_id) +{ + bkn_switch_info_t *sinfo; + + sinfo = bkn_sinfo_from_unit(dev_no); + if (sinfo == NULL) { + DBG_WARN(("Warning: unknown unit: %d\n", dev_no)); + return -1; + } + + if (dev_id) { + *dev_id = sinfo->dev_id; + } + if (rev_id) { + *rev_id = sinfo->rev_id; + } + + return 0; +} + LKM_EXPORT_SYM(bkn_rx_skb_cb_register); LKM_EXPORT_SYM(bkn_rx_skb_cb_unregister); LKM_EXPORT_SYM(bkn_tx_skb_cb_register); LKM_EXPORT_SYM(bkn_tx_skb_cb_unregister); +LKM_EXPORT_SYM(bkn_netif_create_cb_register); +LKM_EXPORT_SYM(bkn_netif_create_cb_unregister); +LKM_EXPORT_SYM(bkn_netif_destroy_cb_register); +LKM_EXPORT_SYM(bkn_netif_destroy_cb_unregister); LKM_EXPORT_SYM(bkn_filter_cb_register); +LKM_EXPORT_SYM(bkn_filter_cb_register_by_name); LKM_EXPORT_SYM(bkn_filter_cb_unregister); LKM_EXPORT_SYM(bkn_hw_tstamp_enable_cb_register); LKM_EXPORT_SYM(bkn_hw_tstamp_enable_cb_unregister); @@ -10169,10 +10941,8 @@ LKM_EXPORT_SYM(bkn_hw_tstamp_rx_time_upscale_cb_register); LKM_EXPORT_SYM(bkn_hw_tstamp_rx_time_upscale_cb_unregister); LKM_EXPORT_SYM(bkn_hw_tstamp_rx_pre_process_cb_register); LKM_EXPORT_SYM(bkn_hw_tstamp_rx_pre_process_cb_unregister); -LKM_EXPORT_SYM(bkn_hw_info_get); -LKM_EXPORT_SYM(bkn_netif_create_cb_register); -LKM_EXPORT_SYM(bkn_netif_create_cb_unregister); -LKM_EXPORT_SYM(bkn_netif_destroy_cb_register); -LKM_EXPORT_SYM(bkn_netif_destroy_cb_unregister); LKM_EXPORT_SYM(bkn_hw_tstamp_ioctl_cmd_cb_register); LKM_EXPORT_SYM(bkn_hw_tstamp_ioctl_cmd_cb_unregister); +LKM_EXPORT_SYM(bkn_hw_tstamp_ptp_transport_get_cb_register); +LKM_EXPORT_SYM(bkn_hw_tstamp_ptp_transport_get_cb_unregister); +LKM_EXPORT_SYM(bkn_hw_device_get); diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README new file mode 100644 index 000000000000..e5ddd7d92719 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README @@ -0,0 +1,114 @@ +$Id:$ +$Copyright: 2007-2023 Broadcom Inc. All rights reserved. + +Permission is granted to use, copy, modify and/or distribute this +software under either one of the licenses below. + +License Option 1: GPL + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License, version 2, as +published by the Free Software Foundation (the "GPL"). + +This program is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License version 2 (GPLv2) for more details. + +You should have received a copy of the GNU General Public License +version 2 (GPLv2) along with this source code. + + +License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + +This software is governed by the Broadcom Open Network Switch APIs license: +https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + + +DCB Library + +The DCB Library is a stand-alone library that allows access to +DCB fields easily without bringing all the complexity of the +SDK source tree. + + +DCB Initialization + +The following routine initializes a DCB handle. A unique DCB handle +needs to be initialized for a given device ID and revision ID. + +This initialization function needs to be called before accessing +any DCB field. + +Function: +#include + + int dcb_handle_init(dcb_handle_t *handle, uint16 dev_id, uint8 rev_id); + +Parameters: + handle - (IN/OUT) Pointer to DCB library handle + device_id - (IN) Device ID + rev_id - (IN) Revision ID + +Returns: + DCB_OK Success + DCB_ERROR Failure + + +DCB Field GET + +Set of macros that return the value from a DCB field. + +The correct DCB structure needs to be allocated and +initialized prior to calling any of the get/set macros. + +Macro: + DCB__GET(handle, dcb) + +Parameters: + handle - (IN) Pointer to the handle for a given device; + type is dcb_handle_t * + dcb - (IN) Pointer to the DCB structure to get the field value from; + type is dcb_t * +Returns: + Value of DCB field + + +DCB Field SET + +Set of macros to set the value for a DCB field. + +The correct DCB structure needs to be allocated and +initialized prior to calling any of the get/set macros. + +Macro: + DCB__SET(handle, dcb, value) + +Parameters: + handle - (IN) Pointer to the handle for a given device; + type is dcb_handle_t * + dcb - (IN/OUT) Pointer to the DCB structure to set the field value to; + type is dcb_t * + value - (IN) Value to set for the DCB field; + type varies + +Returns: + None + + +Compiling the DCB Library + +To compile the DCB library, the DCBDIR environment variable needs +to be set to point to the location where the DCB library resides +and run make. If DCBDIR is not set, the default value of DCBDIR is the parent +directory of this README file. + +The DCB library output will be generated in $DCBDIR/build/ by default. +The output directory can be specified by setting the BLDDIR environment +variable. + +Example: + cd + export DCBDIR=`pwd` + cd make + make diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/RELEASE b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/RELEASE new file mode 100644 index 000000000000..889d5e0ce171 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/RELEASE @@ -0,0 +1 @@ +DCB SDK-HEAD diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h new file mode 100644 index 000000000000..cda80ad5da2e --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h @@ -0,0 +1,226 @@ +/* + * $Id:$ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: dcb.h + * Purpose: DCB Library interface + */ + +#ifndef _DCB_DCB_H_ +#define _DCB_DCB_H_ + +#include +#include + + +/* + * DCB Return Codes + */ +#define DCB_OK 0 +#define DCB_ERROR 1 + + +/* + * DCB Handle + */ +typedef struct dcb_handle_s { + dcb_op_t *dcb_op; +} dcb_handle_t; + +#define DCB_HANDLE(_h) (_h) +#define DCB_OP(_h) DCB_HANDLE(_h)->dcb_op + + +/* + * Function to initialize the DCB library for a + * given device type and revision ID. + * + * It must be called before accessing any of the DCB fields. + */ +extern int +dcb_handle_init(dcb_handle_t *handle, uint16 dev_id, uint8 rev_id); + + +/* + * DCB Fields + */ + +#define DCB_TYPE(_h) \ + DCB_OP(_h)->dcbtype + +#define DCB_SIZE(_h) \ + DCB_OP(_h)->dcbsize + +#define DCB_INIT(_h, _dcb) \ + DCB_OP(_h)->init(_dcb) + +#define DCB_REQCOUNT_SET(_h, _dcb, _count) \ + DCB_OP(_h)->reqcount_set(_dcb, _count) +#define DCB_REQCOUNT_GET(_h, _dcb) \ + DCB_OP(_h)->reqcount_get(_dcb) + +#ifdef INCLUDE_KNET +/* Mask off indicator for kernel processing done */ +#define DCB_XFERCOUNT_GET(_h, _dcb) \ + (DCB_OP(_h)->xfercount_get(_dcb) & ~SOC_DCB_KNET_DONE) +#else +#define DCB_XFERCOUNT_GET(_h, _dcb) \ + DCB_OP(_h)->xfercount_get(_dcb) +#endif + +#define DCB_DONE_SET(_h, _dcb, _val) \ + DCB_OP(_h)->done_set(_dcb, _val) +#define DCB_DONE_GET(_h, _dcb) \ + DCB_OP(_h)->done_get(_dcb) +#define DCB_SG_SET(_h, _dcb, _val) \ + DCB_OP(_h)->sg_set(_dcb, _val) +#define DCB_SG_GET(_h, _dcb) \ + DCB_OP(_h)->sg_get(_dcb) +#define DCB_CHAIN_SET(_h, _dcb, _val) \ + DCB_OP(_h)->chain_set(_dcb, _val) +#define DCB_CHAIN_GET(_h, _dcb) \ + DCB_OP(_h)->chain_get(_dcb) +#define DCB_RELOAD_SET(_h, _dcb, _val) \ + DCB_OP(_h)->reload_set(_dcb, _val) +#define DCB_RELOAD_GET(_h, _dcb) \ + DCB_OP(_h)->reload_get(_dcb) + +#define DCB_TX_CRC_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_crc_set(_dcb, _val) +#define DCB_TX_COS_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_cos_set(_dcb, _val) +#define DCB_TX_DESTMOD_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_destmod_set(_dcb, _val) +#define DCB_TX_DESTPORT_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_destport_set(_dcb, _val) +#define DCB_TX_OPCODE_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_opcode_set(_dcb, _val) +#define DCB_TX_SRCMOD_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_srcmod_set(_dcb, _val) +#define DCB_TX_SRCPORT_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_srcport_set(_dcb, _val) +#define DCB_TX_PRIO_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_prio_set(_dcb, _val) +#define DCB_TX_PFM_SET(_h, _dcb, _val) \ + DCB_OP(_h)->tx_pfm_set(_dcb, _val) + +#define DCB_RX_UNTAGGED_GET(_h, _dcb, _dt_mode, _ingport_is_hg) \ + DCB_OP(_h)->rx_untagged_get(_dcb, _dt_mode, _ingport_is_hg) +#define DCB_RX_CRC_GET(_h, _dcb) \ + DCB_OP(_h)->rx_crc_get(_dcb) +#define DCB_RX_COS_GET(_h, _dcb) \ + DCB_OP(_h)->rx_cos_get(_dcb) +#define DCB_RX_DESTMOD_GET(_h, _dcb) \ + DCB_OP(_h)->rx_destmod_get(_dcb) +#define DCB_RX_DESTPORT_GET(_h, _dcb) \ + DCB_OP(_h)->rx_destport_get(_dcb) +#define DCB_RX_OPCODE_GET(_h, _dcb) \ + DCB_OP(_h)->rx_opcode_get(_dcb) + +#define DCB_RX_CLASSTAG_GET(_h, _dcb) \ + DCB_OP(_h)->rx_classtag_get(_dcb) +#define DCB_RX_MATCHRULE_GET(_h, _dcb) \ + DCB_OP(_h)->rx_matchrule_get(_dcb) +#define DCB_RX_START_GET(_h, _dcb) \ + DCB_OP(_h)->rx_start_get(_dcb) +#define DCB_RX_END_GET(_h, _dcb) \ + DCB_OP(_h)->rx_end_get(_dcb) +#define DCB_RX_ERROR_GET(_h, _dcb) \ + DCB_OP(_h)->rx_error_get(_dcb) +#define DCB_RX_PRIO_GET(_h, _dcb) \ + DCB_OP(_h)->rx_prio_get(_dcb) +#define DCB_RX_REASON_GET(_h, _dcb) \ + DCB_OP(_h)->rx_reason_get(_dcb) +#define DCB_RX_REASON_HI_GET(_h, _dcb) \ + DCB_OP(_h)->rx_reason_hi_get(_dcb) +#define DCB_RX_REASONS_GET(_h, _dcb, _reasons) \ + DCB_OP(_h)->rx_reasons_get(DCB_OP(_h), _dcb, _reasons) +#define DCB_RX_INGPORT_GET(_h, _dcb) \ + DCB_OP(_h)->rx_ingport_get(_dcb) +#define DCB_RX_SRCPORT_GET(_h, _dcb) \ + DCB_OP(_h)->rx_srcport_get(_dcb) +#define DCB_RX_SRCMOD_GET(_h, _dcb) \ + DCB_OP(_h)->rx_srcmod_get(_dcb) +#define DCB_RX_MCAST_GET(_h, _dcb) \ + DCB_OP(_h)->rx_mcast_get(_dcb) +#define DCB_RX_VCLABEL_GET(_h, _dcb) \ + DCB_OP(_h)->rx_vclabel_get(_dcb) +#define DCB_RX_MIRROR_GET(_h, _dcb) \ + DCB_OP(_h)->rx_mirror_get(_dcb) +#define DCB_RX_MATCHRULE_GET(_h, _dcb) \ + DCB_OP(_h)->rx_matchrule_get(_dcb) +#define DCB_RX_TIMESTAMP_GET(_h, _dcb) \ + DCB_OP(_h)->rx_timestamp_get(_dcb) +#define DCB_RX_TIMESTAMP_UPPER_GET(_h, _dcb) \ + DCB_OP(_h)->rx_timestamp_upper_get(_dcb) + +#define DCB_HG_SET(_h, _dcb, _val) \ + DCB_OP(_h)->hg_set(_dcb, _val) +#define DCB_HG_GET(_h, _dcb) \ + DCB_OP(_h)->hg_get(_dcb) +#define DCB_STAT_SET(_h, _dcb, _val) \ + DCB_OP(_h)->stat_set(_dcb, _val) +#define DCB_STAT_GET(_h, _dcb) \ + DCB_OP(_h)->stat_get(_dcb) +#define DCB_PURGE_SET(_h, _dcb, _val) \ + DCB_OP(_h)->purge_set(_dcb, _val) +#define DCB_PURGE_GET(_h, _dcb) \ + DCB_OP(_h)->purge_get(_dcb) + +#define DCB_MHP_GET(_h, _dcb) \ + DCB_OP(_h)->mhp_get(_dcb) +#define DCB_RX_OUTER_VID_GET(_h, _dcb) \ + DCB_OP(_h)->rx_outer_vid_get(_dcb) +#define DCB_RX_OUTER_PRI_GET(_h, _dcb) \ + DCB_OP(_h)->rx_outer_pri_get(_dcb) +#define DCB_RX_OUTER_CFI_GET(_h, _dcb) \ + DCB_OP(_h)->rx_outer_cfi_get(_dcb) +#define DCB_RX_OUTER_TAG_ACTION_GET(_h, _dcb) \ + DCB_OP(_h)->rx_outer_tag_action_get(_dcb) +#define DCB_RX_INNER_VID_GET(_h, _dcb) \ + DCB_OP(_h)->rx_inner_vid_get(_dcb) +#define DCB_RX_INNER_PRI_GET(_h, _dcb) \ + DCB_OP(_h)->rx_inner_pri_get(_dcb) +#define DCB_RX_INNER_CFI_GET(_h, _dcb) \ + DCB_OP(_h)->rx_inner_cfi_get(_dcb) +#define DCB_RX_INNER_TAG_ACTION_GET(_h, _dcb) \ + DCB_OP(_h)->rx_inner_tag_action_get(_dcb) +#define DCB_RX_BPDU_GET(_h, _dcb) \ + DCB_OP(_h)->rx_bpdu_get(_dcb) +#define DCB_RX_L3_INTF_GET(_h, _dcb) \ + DCB_OP(_h)->rx_l3_intf_get(_dcb) +#define DCB_RX_DECAP_TUNNEL_GET(_h, _dcb) \ + DCB_OP(_h)->rx_decap_tunnel_get(_dcb) +#define DCB_RX_SWITCH_DROP_GET(_h, _dcb) \ + DCB_OP(_h)->rx_switch_drop_get(_dcb) +#define DCB_OLP_ENCAP_OAM_PKT_GET(_h, _dcb) \ + DCB_OP(_h)->olp_encap_oam_pkt_get(_dcb) +#define DCB_READ_ECC_ERROR_GET(_h, _dcb) \ + DCB_OP(_h)->read_ecc_error_get(_dcb) + + +#endif /* _DCB_DCB_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h new file mode 100644 index 000000000000..af041f52505c --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h @@ -0,0 +1,162 @@ +/* + * $Id:$ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: dcb_int.h + * Purpose: DCB Library Internal + */ + +#ifndef _DCB_INT_H_ +#define _DCB_INT_H_ + +#ifdef DCB_CUSTOM_CONFIG +/* Allow application to override soc_cm_print, etc. */ +#include +#else +#ifdef __KERNEL__ +#include +#else +/* Needed for printf */ +#include +#endif +#endif + +#include +#include + +/* Include first to redefine macros */ +#include + + +/********************** + * Stubs and Redefines + */ + +/* + * + */ +typedef struct soc_control_s { + dcb_op_t *dcb_op; +} soc_control_t; +extern soc_control_t soc_control; + +#define SOC_CONTROL(_u) (&soc_control) + +/* + * + */ +#ifdef SOC_DCB +#undef SOC_DCB +#endif +#define SOC_DCB(_h) DCB_OP(_h) + +#ifdef SOC_DCB_IDX2PTR +#undef SOC_DCB_IDX2PTR +#endif +#define SOC_DCB_IDX2PTR(_u, _dcb, _i) NULL + +#ifdef SOC_DCB_PTR2IDX +#undef SOC_DCB_PTR2IDX +#endif +#define SOC_DCB_PTR2IDX(_u, _dcb1, _dcb2) 0 + +/* + * + */ +#define SOC_DMA_HG_GET(_flags) 0 +#define SOC_DMA_PURGE_GET(_flags) 0 +#define SOC_DMA_COS_GET(flags) 0 +#define SOC_DMA_CRC_GET(flags) 0 +#define SOC_DV_TX_ALIGN(dv, i) 0 + +typedef struct dv_s { + int dv_unit; + int dv_cnt; + int dv_vcnt; + int dv_flags; +# define DV_F_NOTIFY_DSC 0x01 +# define DV_F_NOTIFY_CHN 0x02 +# define DV_F_COMBINE_DCB 0x04 +# define DV_F_NEEDS_REFILL 0x10 + dcb_t *dv_dcb; +} dv_t; + +/* + * + */ +#ifdef __KERNEL__ +#define printf printk +#endif + +#ifndef soc_cm_debug +#define soc_cm_debug(flags, format, ...) printf(format, __VA_ARGS__) +#endif +#ifndef soc_cm_print +#define soc_cm_print(format, ...) printf(format, __VA_ARGS__) +#endif + +#define soc_cm_l2p(unit, addr) ((uint32)(((sal_vaddr_t)(addr))&0xFFFFFFFF)) +#define soc_cm_p2l(dev, addr) (addr) + +/* + * + */ +typedef int enet_hdr_t; + +/* + * + */ +extern uint32 _dcb_htonl(uint32 value); + +#define soc_ntohl(_x) \ + ((((uint8 *)&(_x))[0] << 24) | (((uint8 *)&(_x))[1] << 16) | \ + (((uint8 *)&(_x))[2] << 8) | (((uint8 *)&(_x))[3])) + +#define soc_htonl(_x) _dcb_htonl(_x) + +/* + * + */ +#define soc_feature(_u, _f) 0 + +/* + * + */ +#define SOC_E_PARAM -4 +#define SOC_E_FULL -6 + +/* + * + */ +#define assert(_x) + +/* + * + */ +#define _SHR_L3_EGRESS_IDX_MIN (0x186A0) /* Egress object start index */ + +#endif /* _DCB_INT_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h new file mode 100644 index 000000000000..3f2ea4081fec --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h @@ -0,0 +1,85 @@ +/* + * $Id: types.h,v 1.1 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: types.h + * Purpose: SAL Definitions + */ + +#ifndef _SAL_TYPES_H_ +#define _SAL_TYPES_H_ + +#ifdef DCB_CUSTOM_CONFIG +/* Allow application to override sal_sprintf, sal_memset, sal_memcpy */ +#include +#else +#ifdef __KERNEL__ +#include +#else +/* Needed for sprintf, memset */ +#include +#include +#endif +#endif + + +/* Booleans */ +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +/* Data types */ +typedef unsigned char uint8; /* 8-bit quantity */ +typedef unsigned short uint16; /* 16-bit quantity */ +typedef unsigned int uint32; /* 32-bit quantity */ +typedef uint64_t uint64; /* 64-bit quantity */ + +typedef signed char int8; /* 8-bit quantity */ +typedef signed short int16; /* 16-bit quantity */ +typedef signed int int32; /* 32-bit quantity */ + +typedef uint32 sal_paddr_t; /* Physical address (PCI address) */ +typedef uintptr_t sal_vaddr_t; /* Virtual address (Host address) */ + +#define PTR_TO_INT(x) ((uint32)(((uint64)(x))&0xFFFFFFFF)) +#define PTR_HI_TO_INT(x) ((uint32)((((uint64)(x))>>32)&0xFFFFFFFF)) + +typedef uint8 sal_mac_addr_t[6]; /* MAC address */ + +/* Macros */ +#define COMPILER_REFERENCE(_a) ((void)(_a)) + +/* Functions */ +#define sal_memset memset +#define sal_sprintf sprintf +#define sal_memcpy memcpy + +#endif /* _SAL_TYPES_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h new file mode 100644 index 000000000000..31ae2947bfb3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h @@ -0,0 +1,30 @@ +/* + * $Id:$ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * Stub header file + */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h new file mode 100644 index 000000000000..319f88600cb5 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h @@ -0,0 +1,56 @@ +/* + * $Id: $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * Broadcom System Log (bSL) + * + * Defines for INTERNAL usage only. + */ + +#ifndef _SHR_BSL_H_ +#define _SHR_BSL_H_ + +#ifdef DCB_CUSTOM_CONFIG +/* Allow application to override BSL_META, LOG_CLI, etc. */ +#include +#else +#ifdef __KERNEL__ +#include + +#define printf printk +#else +/* Needed for printf */ +#include +#endif + +#define BSL_META(_str) _str +#define BSL_META_U(_unit, _str) _str +#define LOG_ERROR(_chk, _str) printf _str +#define LOG_CLI(_str) printf _str + +#endif +#endif /* _SHR_BSL_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h new file mode 100644 index 000000000000..973e8cab6c1b --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h @@ -0,0 +1,621 @@ +/* + * $Id: rx.h,v 1.35 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: rx.h + * Purpose: Packet Receive Reason Types shared between BCM and SOC layers + */ + +#ifndef _SHR_RX_H_ +#define _SHR_RX_H_ + +/* + * PKT RX Packet Reasons; reason CPU received the packet. + * Notes: It is possible no reasons are set (directed to CPU from ARL + * for example), or multiple reasons may be set. + */ + +typedef enum _shr_rx_reason_e { + _SHR_RX_INVALID = 0, + _SHR_RX_ARP = 1, /* ARP Packet */ + _SHR_RX_BPDU = 2, /* BPDU Packet */ + _SHR_RX_BROADCAST = 3, /* Broadcast packet */ + _SHR_RX_CLASS_BASED_MOVE = 4, /* Class-based move prevented */ + _SHR_RX_CLASS_TAG_PACKETS = 5, /* Higig Header with PPD=1 */ + _SHR_RX_CONTROL = 6, /* Control frame or reserved addr */ + _SHR_RX_CPU_LEARN = 7, /* CPU Learned (or VLAN not found */ + /* on Strata devices) */ + _SHR_RX_DEST_LOOKUP_FAIL = 8, /* Destination lookup fail (or L3 */ + /* station move on Strata devices) */ + _SHR_RX_DHCP = 9, /* DHCP packets */ + _SHR_RX_DOS_ATTACK = 10, /* DOS Attack Packet */ + _SHR_RX_E2E_HOL_IBP = 11, /* E2E HOL or IBP Packet */ + _SHR_RX_ENCAP_HIGIG_ERROR = 12, /* Non-HG packets received on an */ + /* E-HG port */ + _SHR_RX_FILTER_MATCH = 13, /* Filter Match */ + _SHR_RX_GRE_CHECKSUM = 14, /* GRE checksum */ + _SHR_RX_GRE_SOURCE_ROUTE = 15, /* GRE source routing */ + _SHR_RX_HIGIG_CONTROL = 16, /* Higig Packet with Control Opcode */ + _SHR_RX_HIGIG_HDR_ERROR = 17, /* Higig+ header errors */ + _SHR_RX_ICMP_REDIRECT = 18, /* ICMP Recirect */ + _SHR_RX_IGMP = 19, /* IGMP packet */ + _SHR_RX_INGRESS_FILTER = 20, /* Ingress Filter (VLAN membership) */ + _SHR_RX_IP = 21, /* IP packet */ + _SHR_RX_IPFIX_RATE_VIOLATION = 22, /* IPFIX flows exceed metering */ + _SHR_RX_IP_MCAST_MISS = 23, /* IPMC miss */ + _SHR_RX_IP_OPTION_VERSION = 24, /* IP options present or IP ver != 4 */ + _SHR_RX_IPMC = 25, /* Class D IP multicast packet */ + _SHR_RX_IPMC_RSVD = 26, /* IPMC Reserved Packet */ + _SHR_RX_L2_CPU = 27, /* L2_TABLE - copy to CPU (on 5690) */ + _SHR_RX_L2_DEST_MISS = 28, /* L2 destination lookup failure */ + _SHR_RX_L2_LEARN_LIMIT = 29, /* L2 Learn Limit */ + _SHR_RX_L2_MOVE = 30, /* L2 Station Movement */ + _SHR_RX_L2_MTU_FAIL = 31, /* L2 MTU check fail */ + _SHR_RX_L2_NON_UNICAST_MISS = 32, /* L2 Non-Unicast lookup miss */ + _SHR_RX_L2_SOURCE_MISS = 33, /* L2 source lookup failure */ + _SHR_RX_L3_ADDR_BIND_FAIL = 34, /* MAC to IP bind check failure */ + _SHR_RX_L3_DEST_MISS = 35, /* L3 DIP Miss */ + _SHR_RX_L3_HEADER_ERROR = 36, /* L3 header - IP options, */ + _SHR_RX_L3_MTU_FAIL = 37, /* L3 MTU check fail */ + _SHR_RX_L3_SLOW_PATH = 38, /* L3 slow path processed pkt. */ + _SHR_RX_L3_SOURCE_MISS = 39, /* L3 SIP Miss */ + _SHR_RX_L3_SOUCE_MOVE = 40, /* L3 Station Movement */ + _SHR_RX_MARTIAN_ADDR = 41, /* Pkt. with Martian address */ + _SHR_RX_MCAST_IDX_ERROR = 42, /* Multicast index error */ + _SHR_RX_MCAST_MISS = 43, /* MC miss */ + _SHR_RX_MIM_SERVICE_ERROR = 44, /* MiM terminated unicast packets */ + /* that do not have a valid I-SID */ + _SHR_RX_MPLS_CTRL_WORD_ERROR = 45, /* MPLS Control Word type is not 0 */ + _SHR_RX_MPLS_ERROR = 46, /* MPLS error */ + _SHR_RX_MPLS_INVALID_ACTION = 47, /* MPLS Invalid Action */ + _SHR_RX_MPLS_INVALID_PAYLOAD = 48, /* MPLS Invalid Payload */ + _SHR_RX_MPLS_LABEL_MISS = 49, /* MPLS table miss */ + _SHR_RX_MPLS_SEQUENCE_NUMBER = 50, /* MPLS Sequence number */ + _SHR_RX_MPLS_TTL = 51, /* MPLS TTL */ + _SHR_RX_MULTICAST = 52, /* Multicast packet */ + _SHR_RX_NHOP = 53, /* Copy to CPU from NH Idx Tbl */ + _SHR_RX_OAM_ERROR = 54, /* OAM packets to CPU for error cases */ + _SHR_RX_OAM_SLOW_PATH = 55, /* OAM packets to CPU - slowpath */ + /* process */ + _SHR_RX_OAM_LMDM = 56, /* OAM LMM/LMR, DMM/DMR packets to CPU */ + _SHR_RX_PARITY_ERROR = 57, /* Parity error on IP tables */ + _SHR_RX_PROTOCOL = 58, /* Protocol Packet */ + _SHR_RX_SAMPLE_DEST = 59, /* Egress sFlow sampled */ + _SHR_RX_SAMPLE_SOURCE = 60, /* Ingress sFlow sampled */ + _SHR_RX_SHARED_VLAN_MISMATCH = 61, /* Private VLAN Mismatch */ + _SHR_RX_SOURCE_ROUTE = 62, /* Source routing bit set */ + _SHR_RX_TIME_STAMP = 63, /* Network time sync packet */ + _SHR_RX_TTL = 64, /* TTL <= 0 or TTL < IPMC threshold */ + _SHR_RX_TTL1 = 65, /* L3UC or IPMC packet with TTL */ + /* equal to 1 */ + _SHR_RX_TUNNEL_ERROR = 66, /* Tunnel error trap */ + _SHR_RX_UDP_CHECKSUM = 67, /* UDP checksum */ + _SHR_RX_UNKNOWN_VLAN = 68, /* Unknown VLAN; VID = 0xfff; */ + /* CPU Learn bit (on 5690 devices) */ + _SHR_RX_URPF_FAIL = 69, /* URPF Check Failed */ + _SHR_RX_VC_LABEL_MISS = 70, /* VPLS table miss */ + _SHR_RX_VLAN_FILTER_MATCH = 71, /* VLAN Filter Match */ + _SHR_RX_WLAN_CLIENT_ERROR = 72, /* ROC error packets to the CPU */ + _SHR_RX_WLAN_SLOW_PATH = 73, /* WLAN packets slowpath to the CPU */ + _SHR_RX_WLAN_DOT1X_DROP = 74, /* WLAN client is unauthenticated */ + _SHR_RX_EXCEPTION_FLOOD = 75, /* Exception processing or flooding */ + _SHR_RX_TIMESYNC = 76, /* Time Sync protocol packet */ + _SHR_RX_EAV_DATA = 77, /* Ethernet AV data packet */ + _SHR_RX_SAME_PORT_BRIDGE = 78, /* Hairpin or Same port */ + /* switching/bridging */ + _SHR_RX_SPLIT_HORIZON = 79, /* Basic bridging or VPLS Split */ + /* horizon */ + _SHR_RX_L4_ERROR = 80, /* TCP/UDP header or port number */ + /* errors */ + _SHR_RX_STP = 81, /* STP Ingress or Egress checks */ + _SHR_RX_EGRESS_FILTER_REDIRECT = 82, /* Vlan egress filter redirect */ + _SHR_RX_FILTER_REDIRECT = 83, /* Field processor redirect */ + _SHR_RX_LOOPBACK = 84, /* Loopbacked */ + _SHR_RX_VLAN_TRANSLATE = 85, /* VLAN translation table missed when */ + /* it is expected to hit */ + _SHR_RX_MMRP = 86, /* Packet of type MMRP */ + _SHR_RX_SRP = 87, /* Packet of type SRP */ + _SHR_RX_TUNNEL_CONTROL = 88, /* Tunnel control packet */ + _SHR_RX_L2_MARKED = 89, /* L2 table marked */ + _SHR_RX_WLAN_SLOWPATH_KEEPALIVE = 90, /* WLAN slowpath to the CPU, */ + /* otherwise dropped */ + _SHR_RX_STATION = 91, /* My Station packet to CPU */ + _SHR_RX_NIV = 92, /* NIV packet */ + _SHR_RX_NIV_PRIO_DROP = 93, /* NIV packet, priority drop */ + _SHR_RX_NIV_INTERFACE_MISS = 94, /* NIV packet, interface miss */ + _SHR_RX_NIV_RPF_FAIL = 95, /* NIV packet, RPF failed */ + _SHR_RX_NIV_TAG_INVALID = 96, /* NIV packet, invalid tag */ + _SHR_RX_NIV_TAG_DROP = 97, /* NIV packet, tag drop */ + _SHR_RX_NIV_UNTAG_DROP = 98, /* NIV packet, untagged drop */ + _SHR_RX_TRILL = 99, /* TRILL packet */ + _SHR_RX_TRILL_INVALID = 100, /* TRILL packet, header error */ + _SHR_RX_TRILL_MISS = 101, /* TRILL packet, lookup miss */ + _SHR_RX_TRILL_RPF_FAIL = 102, /* TRILL packet, RPF check failed */ + _SHR_RX_TRILL_SLOWPATH = 103, /* TRILL packet, slowpath to CPU */ + _SHR_RX_TRILL_CORE_IS_IS = 104, /* TRILL packet, Core IS-IS */ + _SHR_RX_TRILL_TTL = 105, /* TRILL packet, TTL check failed */ + _SHR_RX_BFD_SLOWPATH = 106, /* The BFD packet is being fwd to the */ + /* local uC for processing */ + _SHR_RX_BFD = 107, /* BFD Error */ + _SHR_RX_MIRROR = 108, /* Mirror packet */ + _SHR_RX_REGEX_ACTION = 109, /* Flow tracker */ + _SHR_RX_REGEX_MATCH = 110, /* Signature Match */ + _SHR_RX_FAILOVER_DROP = 111, /* Protection drop data */ + _SHR_RX_WLAN_TUNNEL_ERROR = 112, /* WLAN shim header error to CPU */ + _SHR_RX_CONGESTION_CNM_PROXY = 113, /* Congestion CNM Proxy */ + _SHR_RX_CONGESTION_CNM_PROXY_ERROR = 114, /* Congestion CNM Proxy Error */ + _SHR_RX_CONGESTION_CNM = 115, /* Congestion CNM Internal Packet */ + _SHR_RX_MPLS_UNKNOWN_ACH = 116, /* MPLS Unknown ACH */ + _SHR_RX_MPLS_LOOKUPS_EXCEEDED = 117, /* MPLS out of lookups */ + _SHR_RX_MPLS_RESERVED_ENTROPY_LABEL = 118, /* MPLS Entropy label in unallowed */ + /* range */ + _SHR_RX_MPLS_ILLEGAL_RESERVED_LABEL = 119, /* MPLS illegal reserved label */ + _SHR_RX_MPLS_ROUTER_ALERT_LABEL = 120, /* MPLS alert label */ + _SHR_RX_NIV_PRUNE = 121, /* NIV access port pruning (dst = src) */ + _SHR_RX_VIRTUAL_PORT_PRUNE = 122, /* SVP == DVP */ + _SHR_RX_NON_UNICAST_DROP = 123, /* Explicit multicast packet drop */ + _SHR_RX_TRILL_PACKET_PORT_MISMATCH = 124, /* TRILL packet vs Rbridge port */ + /* conflict */ + _SHR_RX_WLAN_CLIENT_MOVE = 125, /* WLAN client moved */ + _SHR_RX_WLAN_SOURCE_PORT_MISS = 126, /* WLAN SVP miss */ + _SHR_RX_WLAN_CLIENT_SOURCE_MISS = 127, /* WLAN client database SA miss */ + _SHR_RX_WLAN_CLIENT_DEST_MISS = 128, /* WLAN client database DA miss */ + _SHR_RX_WLAN_MTU = 129, /* WLAN MTU error */ + _SHR_RX_TRILL_NAME = 130, /* TRILL packet, Name check failed */ + _SHR_RX_L2GRE_SIP_MISS = 131, /* L2 GRE SIP miss */ + _SHR_RX_L2GRE_VPN_ID_MISS = 132, /* L2 GRE VPN id miss */ + _SHR_RX_TIMESYNC_UNKNOWN_VERSION = 133, /* Unknown version of IEEE1588 */ + _SHR_RX_BFD_ERROR = 134, /* BFD ERROR */ + _SHR_RX_BFD_UNKNOWN_VERSION = 135, /* BFD UNKNOWN VERSION */ + _SHR_RX_BFD_INVALID_VERSION = 136, /* BFD INVALID VERSION */ + _SHR_RX_BFD_LOOKUP_FAILURE = 137, /* BFD LOOKUP FAILURE */ + _SHR_RX_BFD_INVALID_PACKET = 138, /* BFD INVALID PACKET */ + _SHR_RX_VXLAN_SIP_MISS = 139, /* Vxlan SIP miss */ + _SHR_RX_VXLAN_VPN_ID_MISS = 140, /* Vxlan VPN id miss */ + _SHR_RX_FCOE_ZONE_CHECK_FAIL = 141, /* Fcoe zone check failed */ + _SHR_RX_IPMC_INTERFACE_MISMATCH = 142, /* IPMC input interface check failed */ + _SHR_RX_NAT = 143, /* NAT */ + _SHR_RX_TCP_UDP_NAT_MISS = 144, /* TCP/UDP packet NAT lookup miss */ + _SHR_RX_ICMP_NAT_MISS = 145, /* ICMP packet NAT lookup miss */ + _SHR_RX_NAT_FRAGMENT = 146, /* NAT lookup on fragmented packet */ + _SHR_RX_NAT_MISS = 147, /* Non TCP/UDP/ICMP packet NAT lookup */ + /* miss */ + _SHR_RX_UNKNOWN_SUBTENTING_PORT = 148, /* UNKNOWN_SUBTENTING_PORT */ + _SHR_RX_LLTAG_ABSENT_DROP = 149, /* LLTAG_ABSENT */ + _SHR_RX_LLTAG_PRESENT_DROP = 150, /* LLTAG_PRESENT */ + _SHR_RX_OAM_CCM_SLOWPATH = 151, /* OAM CCM packet copied to CPU */ + _SHR_RX_OAM_INCOMPLETE_OPCODE = 152, /* OAM INCOMPLETE_OPCODE */ + _SHR_RX_BHH_OAM_PACKET = 153, /* BHH OAM Packet */ + _SHR_RX_RESERVED_0 = 154, /* Broadcom Reserved */ + _SHR_RX_OAM_MPLS_LMDM = 155, /* MPLS LM/DM (RFC 6374) packet */ + _SHR_RX_SAT = 156, /* OAM SAT pkt */ + _SHR_RX_SAMPLE_SOURCE_FLEX = 157, /* Flexible sampled packets to CPU */ + _SHR_RX_FLEX_SFLOW = 158, /* Flex Sflow? */ + _SHR_RX_VXLT_MISS = 159, /* VLAN Translation miss packet */ + _SHR_RX_TUNNEL_DECAP_ECN_ERROR = 160, /* Tunnel decap ECN error */ + _SHR_RX_TUNNEL_OBJECT_VALIDATION_FAIL = 161, /* Tunnel Object Validation Fail */ + _SHR_RX_L3_CPU = 162, /* L3 Copy to CPU */ + _SHR_RX_TUNNEL_ADAPT_LOOKUP_MISS = 163, /* Tunnel Adapt Lookup Miss Drop */ + _SHR_RX_PACKET_FLOW_SELECT_MISS = 164, /* Packet Flow Select Miss */ + _SHR_RX_PROTECTION_DATA_DROP = 165, /* Protection Data Drop */ + _SHR_RX_PACKET_FLOW_SELECT = 166, /* Packet Flow Select */ + _SHR_RX_OTHER_LOOKUP_MISS = 167, /* Neither Source or Dest type of */ + /* Lookup Miss */ + _SHR_RX_INVALID_TPID = 168, /* Invalid TPID */ + _SHR_RX_MPLS_CONTROL_PACKET = 169, /* MPLS Control Packet */ + _SHR_RX_TUNNEL_TTL_ERROR = 170, /* Tunnel TTL Error */ + _SHR_RX_L2_HEADER_ERROR = 171, /* L2 header */ + _SHR_RX_OTHER_LOOKUP_HIT = 172, /* Neither Source or Dest type of */ + /* Lookup Hit */ + _SHR_RX_L2_SRC_LOOKUP_MISS = 173, /* L2 Source Lookup Miss */ + _SHR_RX_L2_SRC_LOOKUP_HIT = 174, /* L2 Source Lookup Hit */ + _SHR_RX_L2_DST_LOOKUP_MISS = 175, /* L2 Dest Lookup Miss */ + _SHR_RX_L2_DST_LOOKUP_HIT = 176, /* L2 Dest Lookup Hit */ + _SHR_RX_L3_SRC_ROUTE_LOOKUP_MISS = 177, /* L3 Source Route Lookup Miss */ + _SHR_RX_L3_SRC_HOST_LOOKUP_MISS = 178, /* L3 Source Host Lookup Miss */ + _SHR_RX_L3_SRC_ROUTE_LOOKUP_HIT = 179, /* L3 Source Route Lookup Hit */ + _SHR_RX_L3_SRC_HOST_LOOKUP_HIT = 180, /* L3 Source Host Lookup Hit */ + _SHR_RX_L3_DST_ROUTE_LOOKUP_MISS = 181, /* L3 Dest Route Lookup Miss */ + _SHR_RX_L3_DST_HOST_LOOKUP_MISS = 182, /* L3 Dest Host Lookup Miss */ + _SHR_RX_L3_DST_ROUTE_LOOKUP_HIT = 183, /* L3 Dest Route Lookup Hit */ + _SHR_RX_L3_DST_HOST_LOOKUP_HIT = 184, /* L3 Dest Host Lookup Hit */ + _SHR_RX_VLAN_TRANSLATE1_LOOKUP1_MISS = 185, /* VLAN Translate1 Lookup1 Miss */ + _SHR_RX_VLAN_TRANSLATE1_LOOKUP2_MISS = 186, /* VLAN Translate1 Lookup2 Miss */ + _SHR_RX_MPLS_LOOKUP1_MISS = 187, /* MPLS Lookup1 Miss */ + _SHR_RX_MPLS_LOOKUP2_MISS = 188, /* MPLS Lookup2 Miss */ + _SHR_RX_L3_TUNNEL_LOOKUP_MISS = 189, /* L3 Tunnel Lookup Miss */ + _SHR_RX_VLAN_TRANSLATE2_LOOKUP1_MISS = 190, /* VLAN Translate2 Lookup1 Miss */ + _SHR_RX_VLAN_TRANSLATE2_LOOKUP2_MISS = 191, /* VLAN Translate2 Lookup2 Miss */ + _SHR_RX_L2_STU_FAIL = 192, /* L2 STU check fail */ + _SHR_RX_SR_COUNTER_EXCEEDED = 193, /* Seamless Redundancy(SR) - */ + /* Counter Threshold Exceeded */ + _SHR_RX_SR_COPY_TO_CPU_BIT0 = 194, /* Seamless Redundancy(SR) copy to CPU */ + /* SR custom reason code bit 0 */ + _SHR_RX_SR_COPY_TO_CPU_BIT1 = 195, /* SR custom reason code bit 1 */ + _SHR_RX_SR_COPY_TO_CPU_BIT2 = 196, /* SR custom reason code bit 2 */ + _SHR_RX_SR_COPY_TO_CPU_BIT3 = 197, /* SR custom reason code bit 3 */ + _SHR_RX_SR_COPY_TO_CPU_BIT4 = 198, /* SR custom reason code bit 4 */ + _SHR_RX_SR_COPY_TO_CPU_BIT5 = 199, /* SR custom reason code bit 5 */ + _SHR_RX_L3_HEADER_MISMATCH = 200, /* L3 Header Mismatch */ + _SHR_RX_DLB_MONITOR = 201, /* DLB Monitor */ + _SHR_RX_ETRAP_MONITOR = 202, /* ETRAP Monitor */ + _SHR_RX_INT_TURNAROUND = 203, /* INT TurnAround */ + _SHR_RX_INT_HOP_LIMIT = 204, /* INT Hop Limit */ + _SHR_RX_PROTECTION_STATUS_DOWN = 205, /* Protection Status Down */ + _SHR_RX_SVTAG = 206, /* SVtag */ + _SHR_RX_SVTAG_LOOKUP_MISS = 207, /* SVtag Lookup Miss */ + _SHR_RX_PKT_DROP_ON_PORT_HIGIG3_CHECK = 208, /* Port HIGIG3 check fail */ + _SHR_RX_SRV6_PROCESS_ERROR = 209, /* SRV6 process error */ + _SHR_RX_SRV6_VALIDATION_ERROR = 210, /* SRV6 validation error */ + _SHR_RX_SRV6_UNKNOWN_RT_WITH_NONZERO_SL = 211, /* unknown routing type in SRV6 */ + /* packets with nonzero segment */ + /* left field */ + _SHR_RX_RCPU_TO_CPU = 212, /* RCPU copied to CPU */ + _SHR_RX_REASON_COUNT = 213 /* MUST BE LAST */ +} _shr_rx_reason_t; + +#define _SHR_RX_REASON_NAMES_INITIALIZER { \ + "Invalid", \ + "Arp", \ + "Bpdu", \ + "Broadcast", \ + "ClassBasedMove", \ + "ClassTagPackets", \ + "Control", \ + "CpuLearn", \ + "DestLookupFail", \ + "Dhcp", \ + "DosAttack", \ + "E2eHolIbp", \ + "EncapHiGigError", \ + "FilterMatch", \ + "GreChecksum", \ + "GreSourceRoute", \ + "HigigControl", \ + "HigigHdrError", \ + "IcmpRedirect", \ + "Igmp", \ + "IngressFilter", \ + "Ip", \ + "IpfixRateViolation", \ + "IpMcastMiss", \ + "IpOptionVersion", \ + "Ipmc", \ + "IpmcRsvd", \ + "L2Cpu", \ + "L2DestMiss", \ + "L2LearnLimit", \ + "L2Move", \ + "L2MtuFail", \ + "L2NonUnicastMiss", \ + "L2SourceMiss", \ + "L3AddrBindFail", \ + "L3DestMiss", \ + "L3HeaderError", \ + "L3MtuFail", \ + "L3Slowpath", \ + "L3SourceMiss", \ + "L3SourceMove", \ + "MartianAddr", \ + "McastIdxError", \ + "McastMiss", \ + "MimServiceError", \ + "MplsCtrlWordError", \ + "MplsError", \ + "MplsInvalidAction", \ + "MplsInvalidPayload", \ + "MplsLabelMiss", \ + "MplsSequenceNumber", \ + "MplsTtl", \ + "Multicast", \ + "Nhop", \ + "OamError", \ + "OamSlowPath", \ + "OamLMDM", \ + "ParityError", \ + "Protocol", \ + "SampleDest", \ + "SampleSource", \ + "SharedVlanMismatch", \ + "SourceRoute", \ + "TimeStamp", \ + "Ttl", \ + "Ttl1", \ + "TunnelError", \ + "UdpChecksum", \ + "UnknownVlan", \ + "UrpfFail", \ + "VcLabelMiss", \ + "VlanFilterMatch", \ + "WlanClientError", \ + "WlanSlowPath", \ + "WlanDot1xDrop", \ + "ExceptionFlood", \ + "Timesync", \ + "EavData", \ + "SamePortBridge", \ + "SplitHorizon", \ + "L4Error", \ + "Stp", \ + "EgressFilterRedirect", \ + "FilterRedirect", \ + "Loopback", \ + "VlanTranslate", \ + "Mmrp", \ + "Srp", \ + "TunnelControl", \ + "L2Marked", \ + "WlanSlowpathKeepalive", \ + "Station", \ + "Niv", \ + "NivPrioDrop", \ + "NivInterfaceMiss", \ + "NivRpfFail", \ + "NivTagInvalid", \ + "NivTagDrop", \ + "NivUntagDrop", \ + "Trill", \ + "TrillInvalid", \ + "TrillMiss", \ + "TrillRpfFail", \ + "TrillSlowpath", \ + "TrillCoreIsIs", \ + "TrillTtl", \ + "BfdSlowpath", \ + "Bfd", \ + "Mirror", \ + "RegexAction", \ + "RegexMatch", \ + "FailoverDrop", \ + "WlanTunnelError", \ + "CongestionCnmProxy", \ + "CongestionCnmProxyError", \ + "CongestionCnm", \ + "MplsUnknownAch", \ + "MplsLookupsExceeded", \ + "MplsReservedEntropyLabel", \ + "MplsIllegalReservedLabel", \ + "MplsRouterAlertLabel", \ + "NivPrune", \ + "VirtualPortPrune", \ + "NonUnicastDrop", \ + "TrillPacketPortMismatch", \ + "WlanClientMove", \ + "WlanSourcePortMiss", \ + "WlanClientSourceMiss", \ + "WlanClientDestMiss", \ + "WlanMtu", \ + "TrillName", \ + "L2GreSipMiss", \ + "L2GreVpnIdMiss", \ + "TimesyncUnknownVersion", \ + "BfdError", \ + "BfdUnknownVersion", \ + "BfdInvalidVersion", \ + "BfdLookupFailure", \ + "BfdInvalidPacket", \ + "VxlanSipMiss", \ + "VxlanVpnIdMiss", \ + "FcoeZoneCheckFail", \ + "IpmcInterfaceMismatch", \ + "Nat", \ + "TcpUdpNatMiss", \ + "IcmpNatMiss", \ + "NatFragment", \ + "NatMiss", \ + "UnknownSubtentingPort", \ + "LLTagAbsentDrop", \ + "LLTagpresenDrop", \ + "OAMCCMslowpath", \ + "OAMIncompleteOpcode", \ + "OAMCCMpacket", \ + "Reserved0", \ + "OAMMplsLmDM", \ + "SAT", \ + "SampleSourceFlex", \ + "FlexSflow", \ + "VxltMiss", \ + "TunnelDecapEcnError", \ + "TunnelObjectValidationFail", \ + "L3Cpu", \ + "TunnelAdaptLookupMiss", \ + "PacketFlowSelectMiss", \ + "ProtectionDataDrop", \ + "PacketFlowSelect", \ + "OtherLookupMiss", \ + "InvalidTpid", \ + "MplsControlPacket", \ + "TunnelTtlError", \ + "L2HeaderError", \ + "OtherLookupHit", \ + "L2SrcLookupMiss", \ + "L2SrcLookupHit", \ + "L2DstLookupMiss", \ + "L2DstLookupHit", \ + "L3SrcRouteLookupMiss", \ + "L3SrcHostLookupMiss", \ + "L3SrcRouteLookupHit", \ + "L3SrcHostLookupHit", \ + "L3DstRouteLookupMiss", \ + "L3DstHostLookupMiss", \ + "L3DstRouteLookupHit", \ + "L3DstHostLookupHit", \ + "MplsLookup1Miss", \ + "MplsLookup2Miss", \ + "L3TunnelLookupMiss", \ + "VlanTranslate1Lookup1Miss",\ + "VlanTranslate1Lookup2Miss",\ + "VlanTranslate2Lookup1Miss",\ + "VlanTranslate2Lookup2Miss",\ + "L2StuFail", \ + "SrCounterExceeded", \ + "SrCopyToCpuBit0", \ + "SrCopyToCpuBit1", \ + "SrCopyToCpuBit2", \ + "SrCopyToCpuBit3", \ + "SrCopyToCpuBit4", \ + "SrCopyToCpuBit5", \ + "L3HeaderMismatch", \ + "DlbMonitor", \ + "EtrapMonitor", \ + "IntTurnAround", \ + "IntHopLimit", \ + "ProtectionStatusDown", \ + "Svtag", \ + "SvtagLookupMiss", \ + "PktDropOnPortHigig3Check", \ + "Srv6ProcessError", \ + "Srv6ValidationError", \ + "Srv6UnknownRoutingTypeWithNonZeroSl", \ + "RcpuToCpu", \ +} + +/* Base type for declarations */ +#define SHR_BITDCL uint32 +#define SHR_BITWID 32 + +/* (internal) Number of SHR_BITDCLs needed to contain _max bits */ +#define _SHR_BITDCLSIZE(_max) (((_max) + SHR_BITWID - 1) / SHR_BITWID) + +/* + * Set of "reasons" (see _SHR_RX_*) why a packet came to the CPU. + */ +typedef struct _shr_rx_reasons_s { + SHR_BITDCL pbits[_SHR_BITDCLSIZE(_SHR_RX_REASON_COUNT)]; +} _shr_rx_reasons_t; + +/* + * Macro to add a reason (_SHR_RX_*) to a set of + * reasons (_shr_rx_reasons_t) + */ +#define _SHR_RX_REASON_SET(_reasons, _reason) \ + ((((_reasons).pbits)[(_reason) / SHR_BITWID]) |= (1U << ((_reason) % SHR_BITWID))) + +/* + * Macro to clear a set of reasons (_shr_rx_reasons_t). + */ +#define _SHR_RX_REASON_CLEAR_ALL(_reasons) \ +{ \ + SHR_BITDCL *_ptr; \ + int _c = _SHR_RX_REASON_COUNT; \ + \ + if (_c <= 0) { \ + return; \ + } \ + \ + _ptr = (((_reasons).pbits)); \ + \ + while (_c >= SHR_BITWID) { \ + *(_ptr++) = 0; \ + _c -= SHR_BITWID; \ + } \ + \ + if(_c > 0) { \ + SHR_BITDCL _mask = ~0; \ + _mask >>= (SHR_BITWID - _c); \ + *(_ptr) &= ~_mask; \ + } \ +} + +/* + * Macro to check if a reason (_SHR_RX_*) is included in a + * set of reasons (_shr_rx_reasons_t). Returns: + * zero => reason is not included in the set + * non-zero => reason is included in the set + */ +#define _SHR_RX_REASON_GET(_reasons, _reason) \ + ((((_reasons).pbits)[(_reason) / SHR_BITWID]) & (1U << ((_reason) % SHR_BITWID))) + +#define _SHR_RX_REASON_ITER(_reasons, reason) \ + for(reason = _SHR_RX_INVALID; reason < (int)_SHR_RX_REASON_COUNT; reason++) \ + if(_SHR_RX_REASON_GET(_reasons, reason)) + +typedef enum _shr_rx_redirect_e { + _SHR_RX_REDIRECT_NORMAL = 0, + _SHR_RX_REDIRECT_HIGIG = 1, + _SHR_RX_REDIRECT_TRUNCATED = 2, + _SHR_RX_REDIRECT_MAX = _SHR_RX_REDIRECT_TRUNCATED +} _shr_rx_redirect_e; + + +typedef enum _shr_rx_decap_tunnel_e { + _SHR_RX_DECAP_NONE = 0, /* No tunnel Decap */ + _SHR_RX_DECAP_ACCESS_SVP = 1, /* Packet ingress on Access SVP (No decap) */ + _SHR_RX_DECAP_MIM = 2, /* Decap Mac-in-Mac tunnel */ + _SHR_RX_DECAP_L2GRE = 3, /* Decap L2GRE tunnel */ + _SHR_RX_DECAP_VXLAN = 4, /* Decap VXLAN tunnel */ + _SHR_RX_DECAP_AMT = 5, /* Decap AMT tunnel */ + _SHR_RX_DECAP_IP = 6, /* Decap IP tunnel */ + _SHR_RX_DECAP_TRILL = 7, /* Decap TRILL tunnel */ + _SHR_RX_DECAP_L2MPLS_1LABEL = 8, /* Decap MPLS 1 Label, L2 payload, no + Control Word */ + _SHR_RX_DECAP_L2MPLS_2LABEL = 9, /* Decap MPLS 2 Label, L2 payload, no + Control Word */ + _SHR_RX_DECAP_L2MPLS_1LABELCW = 10, /* Decap MPLS 1 Label, L2 payload, Control + Word present */ + _SHR_RX_DECAP_L2MPLS_2LABELCW = 11, /* Decap MPLS 2 Label, L2 payload, Control + Word present */ + _SHR_RX_DECAP_L3MPLS_1LABEL = 12, /* Decap MPLS 1 Label, L3 payload, no + Control Word present */ + _SHR_RX_DECAP_L3MPLS_2LABEL = 13, /* Decap MPLS 2 Label, L3 payload, no + Control Word present */ + _SHR_RX_DECAP_L3MPLS_1LABELCW = 14, /* Decap MPLS 1 Label, L3 payload, Control + Word present */ + _SHR_RX_DECAP_L3MPLS_2LABELCW = 15, /* Decap MPLS 2 Label, L3 payload, Control + Word present */ + _SHR_RX_DECAP_WTP2AC = 16, /* Decap WTP2AC Tunnel */ + _SHR_RX_DECAP_AC2AC = 17, /* Decap AC2AC Tunnel */ + _SHR_RX_DECAP_MPLS_1LABELCW = 18, /* Decap MPLS 1 Label, Control + Word present */ + _SHR_RX_DECAP_MPLS_2LABELCW = 19, /* Decap MPLS 2 Label, Control + Word present */ + _SHR_RX_DECAP_MPLS_1LABEL = 20, /* Decap MPLS 1 Label, no + Control Word */ + _SHR_RX_DECAP_MPLS_2LABEL = 21, /* Decap MPLS 2 Label, no + Control Word */ + _SHR_RX_DECAP_MPLS_3LABEL = 22, /* Decap MPLS 3 Label, no Control + Word */ + _SHR_RX_DECAP_MPLS_3LABELCW = 23, /* Decap MPLS 3 Label, Control + Word present */ + _SHR_RX_DECAP_MPLS_3LABEL_ENTROPY = 25, /* Decap MPLS 3 Label + entropy, + no Control Word */ + _SHR_RX_DECAP_MPLS_3LABEL_ENTROPYCW = 26, /* Decap MPLS 3 Label + entropy, + Control Word present */ + _SHR_RX_DECAP_COUNT = 27 /* Decap Tunnel Max */ +} _shr_rx_decap_tunnel_t; + +typedef enum _shr_rx_decap_hdr_e { + _SHR_RX_DECAP_HDR_NONE = 0, /* No headers Decapped */ + _SHR_RX_DECAP_SYSTEM_HDR = 1, /* Decap System Header */ + _SHR_RX_DECAP_OUTER_L2_HDR = 2, /* Decap Outer L2 Header */ + _SHR_RX_DECAP_L3_L4_TUNNEL_HDR = 4, /* Decap Outer L3/L4/TUNNEL Header */ + _SHR_RX_DECAP_INNER_L2_HDR = 8, /* Decap Inner L2 Header */ + _SHR_RX_DECAP_INNER_L3_L4_HDR = 16, /* Decap Inner L3 and L4 Header */ + _SHR_RX_DECAP_HDR_MAX = _SHR_RX_DECAP_INNER_L3_L4_HDR /* Max Value */ +} _shr_rx_decap_hdr_t; + +#endif /* _SHR_RX_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h new file mode 100644 index 000000000000..2ec41adadb4a --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h @@ -0,0 +1,354 @@ +/* + * $Id: dcb.h,v 1.32 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: soc/dcb.h + * Purpose: Define dma control block (DCB) operations + * A uniform set of operations is defined here and loaded + * into SOC_CONTROL during initialization. + */ + +#ifndef _SOC_DCB_H +#define _SOC_DCB_H + +#include +#include + +typedef void dcb_t; +struct dv_s; /* in soc/dma.h, but we have recursive problems */ + +#ifdef INCLUDE_KNET +/* + * On XGS devices bit 15 fo the Transferred Bytes field in + * the DCBs is used to indicate that kernel processing is + * complete. Using this bit reduces the theoretically maximum + * supported packet size from 64K to 32K, but this is still + * adequate for 16K jumbo packets. + */ +#define SOC_DCB_KNET_DONE 0x8000 + +#endif + +/* + * DCB Operations + */ + +typedef struct dcb_op_s { + int dcbtype; + int dcbsize; + soc_rx_reason_t **rx_reason_maps; + soc_rx_reason_t * (*rx_reason_map_get)(struct dcb_op_s *dcb_op, dcb_t *dcb); + void (*rx_reasons_get)(struct dcb_op_s *dcb_op, dcb_t *dcb, + soc_rx_reasons_t *reasons); + void (*init)(dcb_t *dcb); + /* composite helper functions */ + int (*addtx)(struct dv_s *dv, sal_vaddr_t addr, uint32 count, + pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, + uint32 flags, uint32 *hgh); + int (*addrx)(struct dv_s *dv, sal_vaddr_t addr, uint32 count, + uint32 flags); + uint32 (*intrinfo)(int unit, dcb_t *dcb, int tx, uint32 *count); + /* basic dcb values */ + void (*reqcount_set)(dcb_t *dcb, uint32 count); + uint32 (*reqcount_get)(dcb_t *dcb); + uint32 (*xfercount_get)(dcb_t *dcb); + void (*addr_set)(int unit, dcb_t *dcb, sal_vaddr_t addr); + sal_vaddr_t (*addr_get)(int unit, dcb_t *dcb); + sal_paddr_t (*paddr_get)(dcb_t *dcb); + void (*done_set)(dcb_t *dcb, int val); + uint32 (*done_get)(dcb_t *dcb); + void (*sg_set)(dcb_t *dcb, int val); + uint32 (*sg_get)(dcb_t *dcb); + void (*chain_set)(dcb_t *dcb, int val); + uint32 (*chain_get)(dcb_t *dcb); + void (*reload_set)(dcb_t *dcb, int val); + uint32 (*reload_get)(dcb_t *dcb); + void (*desc_intr_set)(dcb_t *dcb, int val); + uint32 (*desc_intr_get)(dcb_t *dcb); + /* transmit dcb controls */ + void (*tx_l2pbm_set)(dcb_t *dcb, pbmp_t pbm); + void (*tx_utpbm_set)(dcb_t *dcb, pbmp_t pbm); + void (*tx_l3pbm_set)(dcb_t *dcb, pbmp_t pbm); + void (*tx_crc_set)(dcb_t *dcb, int crc); + void (*tx_cos_set)(dcb_t *dcb, int cos); + void (*tx_destmod_set)(dcb_t *dcb, uint32 modid); + void (*tx_destport_set)(dcb_t *dcb, uint32 port); + void (*tx_opcode_set)(dcb_t *dcb, uint32 opcode); + void (*tx_srcmod_set)(dcb_t *dcb, uint32 modid); + void (*tx_srcport_set)(dcb_t *dcb, uint32 port); + void (*tx_prio_set)(dcb_t *dcb, uint32 prio); + void (*tx_pfm_set)(dcb_t *dcb, uint32 pfm); + + /* receive dcb controls */ + uint32 (*rx_untagged_get)(dcb_t *dcb, int dt_mode, int ingport_is_hg); + uint32 (*rx_crc_get)(dcb_t *dcb); + uint32 (*rx_cos_get)(dcb_t *dcb); + uint32 (*rx_destmod_get)(dcb_t *dcb); + uint32 (*rx_destport_get)(dcb_t *dcb); + uint32 (*rx_opcode_get)(dcb_t *dcb); + uint32 (*rx_classtag_get)(dcb_t *dcb); + uint32 (*rx_matchrule_get)(dcb_t *dcb); + uint32 (*rx_start_get)(dcb_t *dcb); + uint32 (*rx_end_get)(dcb_t *dcb); + uint32 (*rx_error_get)(dcb_t *dcb); + uint32 (*rx_prio_get)(dcb_t *dcb); + uint32 (*rx_reason_get)(dcb_t *dcb); + uint32 (*rx_reason_hi_get)(dcb_t *dcb); + uint32 (*rx_ingport_get)(dcb_t *dcb); + uint32 (*rx_srcport_get)(dcb_t *dcb); + uint32 (*rx_srcmod_get)(dcb_t *dcb); + uint32 (*rx_mcast_get)(dcb_t *dcb); + uint32 (*rx_vclabel_get)(dcb_t *dcb); + uint32 (*rx_mirror_get)(dcb_t *dcb); + uint32 (*rx_timestamp_get)(dcb_t *dcb); + uint32 (*rx_timestamp_upper_get)(dcb_t *dcb); + void (*hg_set)(dcb_t *dcb, uint32 hg); + uint32 (*hg_get)(dcb_t *dcb); + void (*stat_set)(dcb_t *dcb, uint32 stat); + uint32 (*stat_get)(dcb_t *dcb); + void (*purge_set)(dcb_t *dcb, uint32 purge); + uint32 (*purge_get)(dcb_t *dcb); + uint32 * (*mhp_get)(dcb_t *dcb); + uint32 (*rx_outer_vid_get)(dcb_t *dcb); + uint32 (*rx_outer_pri_get)(dcb_t *dcb); + uint32 (*rx_outer_cfi_get)(dcb_t *dcb); + uint32 (*rx_outer_tag_action_get)(dcb_t *dcb); + uint32 (*rx_inner_vid_get)(dcb_t *dcb); + uint32 (*rx_inner_pri_get)(dcb_t *dcb); + uint32 (*rx_inner_cfi_get)(dcb_t *dcb); + uint32 (*rx_inner_tag_action_get)(dcb_t *dcb); + uint32 (*rx_bpdu_get)(dcb_t *dcb); + uint32 (*rx_l3_intf_get)(dcb_t *dcb); + uint32 (*rx_decap_tunnel_get)(dcb_t *dcb); + uint32 (*rx_switch_drop_get)(dcb_t *dcb); + uint32 (*olp_encap_oam_pkt_get)(dcb_t *dcb); + uint32 (*read_ecc_error_get)(dcb_t *dcb); + uint32 (*desc_remaining_get)(dcb_t *dcb); + uint32 (*desc_remaining_set)(dcb_t *dcb, uint32 val); + uint32 (*desc_status_get)(dcb_t *dcb); + uint32 (*desc_status_set)(dcb_t *dcb, uint32 val); + uint32 (*rx_hg2_ext_eh_type_get)(dcb_t *dcb); +} dcb_op_t; + +#define SOC_DCB(_u) SOC_CONTROL(_u)->dcb_op + +#define SOC_DCB_TYPE(_u) SOC_DCB(_u)->dcbtype +#define SOC_DCB_SIZE(_u) SOC_DCB(_u)->dcbsize + +#define SOC_DCB_RX_REASON_MAPS( _u) SOC_DCB(_u)->rx_reason_maps + +#define SOC_DCB_INIT(_u, _dcb) SOC_DCB(_u)->init(_dcb) +#define SOC_DCB_ADDTX(_u, _dv, _addr, _count, _l2pbm, _utpbm, _l3pbm, _f, _hgh) \ + SOC_DCB(_u)->addtx(_dv, _addr, _count, _l2pbm, _utpbm, _l3pbm, _f, _hgh) +#define SOC_DCB_ADDRX(_u, _dv, _addr, _count, _f) \ + SOC_DCB(_u)->addrx(_dv, _addr, _count, _f) +#define SOC_DCB_INTRINFO(_u, _dcb, _tx, _countp) \ + SOC_DCB(_u)->intrinfo(_u, _dcb, _tx, _countp) + +/* flags returned from INTRINFO */ +#define SOC_DCB_INFO_DONE 0x02 +#define SOC_DCB_INFO_PKTEND 0x01 + +#define SOC_DCB_REQCOUNT_SET(_u, _dcb, _count) \ + SOC_DCB(_u)->reqcount_set(_dcb, _count) +#define SOC_DCB_REQCOUNT_GET(_u, _dcb) \ + SOC_DCB(_u)->reqcount_get(_dcb) +#ifdef INCLUDE_KNET +/* Mask off indicator for kernel processing done */ +#define SOC_DCB_XFERCOUNT_GET(_u, _dcb) \ + (SOC_DCB(_u)->xfercount_get(_dcb) & ~SOC_DCB_KNET_DONE) +#else +#define SOC_DCB_XFERCOUNT_GET(_u, _dcb) \ + SOC_DCB(_u)->xfercount_get(_dcb) +#endif +#define SOC_DCB_ADDR_SET(_u, _dcb, _addr) \ + SOC_DCB(_u)->addr_set(_u, _dcb, _addr) +#define SOC_DCB_ADDR_GET(_u, _dcb) \ + SOC_DCB(_u)->addr_get(_u, _dcb) +#define SOC_DCB_PADDR_GET(_u, _dcb) \ + SOC_DCB(_u)->paddr_get(_dcb) +#define SOC_DCB_DONE_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->done_set(_dcb, _val) +#define SOC_DCB_DONE_GET(_u, _dcb) \ + SOC_DCB(_u)->done_get(_dcb) +#define SOC_DCB_SG_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->sg_set(_dcb, _val) +#define SOC_DCB_SG_GET(_u, _dcb) \ + SOC_DCB(_u)->sg_get(_dcb) +#define SOC_DCB_CHAIN_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->chain_set(_dcb, _val) +#define SOC_DCB_CHAIN_GET(_u, _dcb) \ + SOC_DCB(_u)->chain_get(_dcb) +#define SOC_DCB_RELOAD_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->reload_set(_dcb, _val) +#define SOC_DCB_RELOAD_GET(_u, _dcb) \ + SOC_DCB(_u)->reload_get(_dcb) + +#define SOC_DCB_ALL_DESC_INTR 0x1 +#define SOC_DCB_CNTLD_DESC_INTR 0x2 + +#define SOC_DCB_DESC_INTR_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->desc_intr_set(_dcb, _val) +#define SOC_DCB_DESC_INTR_GET(_u, _dcb) \ + SOC_DCB(_u)->desc_intr_get(_dcb) + +#define SOC_DCB_TX_L2PBM_SET(_u, _dcb, _pbm) \ + SOC_DCB(_u)->tx_l2pbm_set(_dcb, _pbm) +#define SOC_DCB_TX_UTPBM_SET(_u, _dcb, _pbm) \ + SOC_DCB(_u)->tx_utpbm_set(_dcb, _pbm) +#define SOC_DCB_TX_L3PBM_SET(_u, _dcb, _pbm) \ + SOC_DCB(_u)->tx_l3pbm_set(_dcb, _pbm) +#define SOC_DCB_TX_CRC_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_crc_set(_dcb, _val) +#define SOC_DCB_TX_COS_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_cos_set(_dcb, _val) +#define SOC_DCB_TX_DESTMOD_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_destmod_set(_dcb, _val) +#define SOC_DCB_TX_DESTPORT_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_destport_set(_dcb, _val) +#define SOC_DCB_TX_OPCODE_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_opcode_set(_dcb, _val) +#define SOC_DCB_TX_SRCMOD_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_srcmod_set(_dcb, _val) +#define SOC_DCB_TX_SRCPORT_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_srcport_set(_dcb, _val) +#define SOC_DCB_TX_PRIO_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_prio_set(_dcb, _val) +#define SOC_DCB_TX_PFM_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->tx_pfm_set(_dcb, _val) + +#define SOC_DCB_RX_UNTAGGED_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_untagged_get(_dcb, \ + SOC_DT_MODE(_u), IS_HG_PORT(_u, SOC_DCB_RX_INGPORT_GET(_u, _dcb))) +#define SOC_DCB_RX_CRC_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_crc_get(_dcb) +#define SOC_DCB_RX_COS_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_cos_get(_dcb) +#define SOC_DCB_RX_DESTMOD_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_destmod_get(_dcb) +#define SOC_DCB_RX_DESTPORT_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_destport_get(_dcb) +#define SOC_DCB_RX_OPCODE_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_opcode_get(_dcb) +#define SOC_DCB_RX_CLASSTAG_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_classtag_get(_dcb) +#define SOC_DCB_RX_MATCHRULE_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_matchrule_get(_dcb) +#define SOC_DCB_OLP_ENCAP_OAM_PKT_GET(_u, _dcb) \ + SOC_DCB(_u)->olp_encap_oam_pkt_get(_dcb) +#define SOC_DCB_READ_ECC_ERROR_GET(_u, _dcb) \ + SOC_DCB(_u)->read_ecc_error_get(_dcb) +#define SOC_DCB_DESC_REMAINING_GET(_u, _dcb) \ + SOC_DCB(_u)->desc_remaining_get(_dcb) +#define SOC_DCB_DESC_REMAINING_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->desc_remaining_set(_dcb, _val) +#define SOC_DCB_DESC_STATUS_GET(_u, _dcb) \ + SOC_DCB(_u)->desc_status_get(_dcb) +#define SOC_DCB_DESC_STATUS_SET(_u, _dcb) \ + SOC_DCB(_u)->desc_status_set(_dcb) +#define SOC_DCB_RX_START_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_start_get(_dcb) +#define SOC_DCB_RX_END_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_end_get(_dcb) +#define SOC_DCB_RX_ERROR_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_error_get(_dcb) +#define SOC_DCB_RX_PRIO_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_prio_get(_dcb) +#define SOC_DCB_RX_REASON_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_reason_get(_dcb) +#define SOC_DCB_RX_REASON_HI_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_reason_hi_get(_dcb) +#define SOC_DCB_RX_REASONS_GET(_u, _dcb, _reasons) \ + SOC_DCB(_u)->rx_reasons_get(SOC_DCB(_u), _dcb, _reasons) +#define SOC_DCB_RX_INGPORT_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_ingport_get(_dcb) +#define SOC_DCB_RX_SRCPORT_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_srcport_get(_dcb) +#define SOC_DCB_RX_SRCMOD_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_srcmod_get(_dcb) +#define SOC_DCB_RX_MCAST_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_mcast_get(_dcb) +#define SOC_DCB_RX_VCLABEL_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_vclabel_get(_dcb) +#define SOC_DCB_RX_MIRROR_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_mirror_get(_dcb) +#define SOC_DCB_RX_TIMESTAMP_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_timestamp_get(_dcb) +#define SOC_DCB_RX_TIMESTAMP_UPPER_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_timestamp_upper_get(_dcb) + +#define SOC_DCB_HG_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->hg_set(_dcb, _val) +#define SOC_DCB_HG_GET(_u, _dcb) \ + SOC_DCB(_u)->hg_get(_dcb) +#define SOC_DCB_STAT_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->stat_set(_dcb, _val) +#define SOC_DCB_STAT_GET(_u, _dcb) \ + SOC_DCB(_u)->stat_get(_dcb) +#define SOC_DCB_PURGE_SET(_u, _dcb, _val) \ + SOC_DCB(_u)->purge_set(_dcb, _val) +#define SOC_DCB_PURGE_GET(_u, _dcb) \ + SOC_DCB(_u)->purge_get(_dcb) + +#define SOC_DCB_MHP_GET(_u, _dcb) \ + SOC_DCB(_u)->mhp_get(_dcb) +#define SOC_DCB_RX_OUTER_VID_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_outer_vid_get(_dcb) +#define SOC_DCB_RX_OUTER_PRI_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_outer_pri_get(_dcb) +#define SOC_DCB_RX_OUTER_CFI_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_outer_cfi_get(_dcb) +#define SOC_DCB_RX_OUTER_TAG_ACTION_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_outer_tag_action_get(_dcb) +#define SOC_DCB_RX_INNER_VID_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_inner_vid_get(_dcb) +#define SOC_DCB_RX_INNER_PRI_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_inner_pri_get(_dcb) +#define SOC_DCB_RX_INNER_CFI_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_inner_cfi_get(_dcb) +#define SOC_DCB_RX_INNER_TAG_ACTION_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_inner_tag_action_get(_dcb) +#define SOC_DCB_RX_BPDU_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_bpdu_get(_dcb) +#define SOC_DCB_RX_L3_INTF_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_l3_intf_get(_dcb) +#define SOC_DCB_RX_DECAP_TUNNEL_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_decap_tunnel_get(_dcb) +#define SOC_DCB_RX_SWITCH_DROP_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_switch_drop_get(_dcb) + +#define SOC_DCB_RX_HG2_EXT_EH_TYPE_GET(_u, _dcb) \ + SOC_DCB(_u)->rx_hg2_ext_eh_type_get(_dcb) + +#define SOC_DCB_IDX2PTR(_u, _dcb, _i) \ + (dcb_t *)((char *)_dcb + (SOC_DCB_SIZE(_u) * (_i))) +#define SOC_DCB_PTR2IDX(_u, _dcb1, _dcb2) \ + (int)(((char *)_dcb1 - (char *)_dcb2) / SOC_DCB_SIZE(_u)) + +extern void soc_dcb_unit_init(int unit); + +#endif /* _SOC_DCB_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h new file mode 100644 index 000000000000..80f6481c69d5 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h @@ -0,0 +1,552 @@ +/* + * $Id$ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: soc/dcbformats.h + * Purpose: Define dma control block (DCB) formats for various chips. + * This information is only needed in soc/dcb.c, which + * provides a uniform interface to the reset of software + * for controlling DCBs. + * + * There are currently 32 DMA Control block formats + * (also known as DMA descriptors): + * + * Type 2 5670/75 (TX) + * Type 3 5690 aka DRACO1 + * Type 4 5670/75 (RX) aka HERCULES + * Type 5 5673 aka LYNX + * Type 6 5665 aka TUCANA + * Type 7 5695 aka DRACO15 + * Type 9 56504 aka XGS3 (Firebolt) + * Type 10 56601 aka XGS3 (Easyrider) + * Type 11 56800 aka XGS3 (HUMV) + * Type 12 56218 aka XGS3 (Raptor) (Derived from DCB 9) + * Type 13 56514 aka XGS3 (Firebolt2) (Derived from DCB 9) + * Type 14 56624 & 56680 aka XGS3 (Triumph & Valkyrie) + * Type 15 56224 aka XGS3 (Raven A0) (Derived from DCB 12) + * Type 16 56820 aka XGS3 (Scorpion) + * Type 17 53314 aka XGS3 (Hawkeye) (Derived from DCB 15) + * Type 18 56224 aka XGS3 (Raven B0) (Derived from DCB 15) + * Type 19 56634/56524/56685 aka XGS3 (Triumph2/Apollo/Valkyrie2) + * Type 20 56334 aka XGS3 (Enduro) (Derived from DCB 19) + * Type 21 56840 aka XGS3 (Trident) + * Type 23 56640 aka XGS3 (Triumph3) + * Type 24 56440 aka XGS3 (Katana) + * Type 25 Obsolete 88030 aka SBX Caladan3 + * Type 26 56850 aka XGS3 (Trident2) (Derived from DCB 23) + * Type 27 Obsolete 88230 aka SBX Sirius + * Type 29 56450 aka XGX3 (Katana2) + * Type 31 53400 aka XGX3 (Greyhound) + * Type 32 56960 aka XGX3 (Tomahawk) (Derived from DCB 26) + * Type 33 56860 aka XGS3 (Trident2+) (Derived from DCB 26) + * Type 34 56160 aka XGX3 (Hurricane3) + * Type 35 56560 APACHE + * Type 36 56870 (Trident 3) + * Type 37 53570 aka XGX3 (Greyhound2) + * Type 38 56980 (Tomahawk 3) + * + * The 5670/75 uses two different formats depending on whether the DCB is + * for transmit or receive. + * + * The 5695 can be configured to use type 3 or type 7 depending on whether + * CMIC_CONFIG.EXTENDED_DCB_ENABLE is set or not. + */ + +#ifndef _SOC_DCBFORMATS_H +#define _SOC_DCBFORMATS_H + +#include +#include + +#define DCB_STRATA_OPTIM_PURGE 3 +#define DCB_STRATA_CRC_LEAVE 0 +#define DCB_STRATA_CRC_REGEN 2 +#define DCB_XGS_CRC_LEAVE 0 +#define DCB_XGS_CRC_REGEN 1 + +#define DCB_MAX_REQCOUNT 0x7fff /* 32KB */ +#define DCB_MAX_SIZE (16*4) /* type 14 */ + +#if defined(BCM_XGS3_SWITCH_SUPPORT) +/* + * DMA Control Block - Type 9 + * Used on 56504 devices + * 11 words + */ +typedef struct { + uint32 addr; /* T9.0: physical address */ + /* T9.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, + c_stat:1, + c_hg:1, + c_reload:1, + c_sg:1, + c_chain:1, + c_count:16; +#endif /* LE_HOST */ + uint32 mh0; /* T9.2: Module Header word 0 */ + uint32 mh1; /* T9.3: Module Header word 1 */ + uint32 mh2; /* T9.4: Module Header word 2 */ +#ifdef LE_HOST + /* T9.5: RX Status 0 */ + uint32 mtp_index_hi:5, /* Mirror-to-Port Index */ + l3uc:1, /* L3 UC */ + l3only:1, /* L3 only */ + l3ipmc:1, /* L3 IPMC */ + l3_intf:12, /* L3 Intf number */ + imirror:1, /* Ingress Mirroring */ + emirror:1, /* Egress Mirroring */ + cos:3, /* Packet Priority */ + cpu_cos:3, /* CPU COS */ + chg_tos:1, /* DSCP Changed */ + cell_error:1, /* Cell CRC Checksum Error Detected */ + bpdu:1, /* BPDU Packet */ + add_vid:1; /* VLAN ID Added */ + /* T9.6: RX Status 1 */ + uint32 reason:25, /* CPU opcode */ + regen_crc:1, /* Regenerate CRC */ + switch_pkt:1, /* Switched packet */ + src_hg:1, /* Source is Higig */ + purge_cell:1, /* Packet is marked Purged */ + pkt_aged:1, /* Pkt is Aged */ + mtp_index_lo:2; /* Mirror-to-Port Index */ + /* T9.7: RX Status 2 */ + uint32 dscp_hi:2, /* New DSCP */ + srcport:5, /* Source port */ + nh_index:13, /* Next hop index */ + match_rule:10, /* Matched Rule */ + match_rule_valid:1, /* Matched Rule valid */ + decap_iptunnel:1; /* Decap IP Tunneling Packet */ + + /* T9.8: RX Status 3 */ + uint32 :11, + ingress_untagged:1, /* Pkt came in untagged */ + outer_vid:12, /* VID */ + outer_cfi:1, /* CFI */ + outer_pri:3, /* Priority */ + dscp_lo:4; /* New DSCP */ +#else + /* T9.5: RX Status 0 */ + uint32 add_vid:1, /* VLAN ID Added */ + bpdu:1, /* BPDU Packet */ + cell_error:1, /* Cell CRC Checksum Error Detected */ + chg_tos:1, /* DSCP Changed */ + cpu_cos:3, /* CPU COS */ + cos:3, /* Packet Priority */ + emirror:1, /* Egress Mirroring */ + imirror:1, /* Ingress Mirroring */ + l3_intf:12, /* L3 Intf number */ + l3ipmc:1, /* L3 IPMC */ + l3only:1, /* L3 only */ + l3uc:1, /* L3 UC */ + mtp_index_hi:5; /* Mirror-to-Port Index */ + /* T9.6: RX Status 1 */ + uint32 mtp_index_lo:2, /* Mirror-to-Port Index */ + pkt_aged:1, /* Pkt is Aged */ + purge_cell:1, /* Packet is marked Purged */ + src_hg:1, /* Source is Higig */ + switch_pkt:1, /* Switched packet */ + regen_crc:1, /* Regenerate CRC */ + reason:25; /* CPU opcode */ + /* T9.7: RX Status 2 */ + uint32 decap_iptunnel:1, /* Decap IP Tunneling Packet */ + match_rule_valid:1, /* Matched Rule valid */ + match_rule:10, /* Matched Rule */ + nh_index:13, /* Next hop index */ + srcport:5, /* Source port */ + dscp_hi:2; /* New DSCP */ + /* T9.8: RX Status 3 */ + uint32 dscp_lo:4, /* New DSCP */ + outer_pri:3, /* Priority (D)*/ + outer_cfi:1, /* CFI (D)*/ + outer_vid:12, /* VID (D)*/ + ingress_untagged:1, /* Pkt came in untagged (D)*/ + :11; +#endif + + uint32 s_4; /* T9.9: RX Status 4 */ + /* T9.10: DMA Status 0 */ +#ifdef LE_HOST + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + dc:12, /* Don't Care */ + done:1; /* Descriptor Done */ +#else + uint32 done:1, + dc:12, + error:1, + start:1, + end:1, + count:16; +#endif +} dcb9_t; +#endif /* BCM_XGS3_SWITCH_SUPPORT */ + +#if defined(BCM_TRIUMPH2_SUPPORT) +/* + * DMA Control Block - Type 19 + * Used on 5663x devices + * 16 words + */ +#include +#endif /* BCM_TRIUMPH2_SUPPORT */ + +#if defined(BCM_ENDURO_SUPPORT) +/* + * DMA Control Block - Type 20 + * Used on 5623x devices + * 16 words + */ +typedef struct { + uint32 addr; /* T20.0: physical address */ + /* T20.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, + c_stat:1, + c_hg:1, + c_reload:1, + c_sg:1, + c_chain:1, + c_count:16; +#endif /* LE_HOST */ + uint32 mh0; /* T20.2: Module Header word 0 */ + uint32 mh1; /* T20.3: Module Header word 1 */ + uint32 mh2; /* T20.4: Module Header word 2 */ + uint32 mh3; /* T20.5: Module Header word 3 */ +#ifdef LE_HOST + /* T20.6: RX Status 0 */ + uint32 timestamp_type:2, /* TIMESTAMP field type indicator */ + em_mtp_index:5, /* EM Mirror-to-Port Index */ + :1, /* Reserved */ + cpu_cos:6, /* COS queue for CPU packets */ + :2, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_pri:3; /* Inner priority */ + + /* T20.7 */ + uint32 reason_hi:16, /* CPU opcode (high bits) */ + pkt_len:14, /* Packet Length After Modification */ + :2; /* Reserved */ + + /* T20.8 */ + uint32 reason; /* CPU opcode */ + + /* T20.9 */ + uint32 dscp:8, /* New DSCP */ + chg_tos:1, /* DSCP has been changed by HW */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + regen_crc:1, /* Packet modified and needs new CRC */ + :2, /* Reserved */ + outer_vid:12, /* Outer VLAN ID */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3; /* Outer priority */ + + /* T20.10 */ + uint32 timestamp; /* Timestamp */ + + /* T20.11 */ + uint32 cos:4, /* COS */ + higig_cos:5, /* Higig COS */ + vlan_cos:5, /* VLAN COS */ + shaping_cos_sel:2, /* Shaping COS Select */ + vfi:12, /* Internal VFI or FID value */ + vfi_valid:1, /* VFI or FID */ + :3; /* Reserved */ + + /* T20.12 */ + uint32 srcport:8, /* Source port number */ + hgi:2, /* Higig Interface Format Indicator */ + itag_status:2, /* Ingress incoming tag status */ + otag_action:2, /* Ingress Outer tag action */ + itag_action:2, /* Ingress Inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + imirror:1, /* Ingress Mirroring */ + emirror:1, /* Egress Mirroring */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + hg_lookup:1, /* Reserved for future use */ + :4; /* Reserved */ + + /* T20.13 */ + uint32 nhop_index:15, /* L3 IP Multicast Interface Number or Next HOP Index */ + :1, /* Reserved */ + match_rule:8, /* Matched FP rule */ + im_mtp_index:5, /* IM Mirror-to-Port Index */ + ecn:2, /* Reserved */ + change_ecn:1; /* Reserved */ + + /* T20.14 */ + uint32 timestamp_upper; /* OAM delay measurement: Upper 32-bit of 64-bit timestamp */ + + /* T20.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + dc:12, /* Don't Care */ + done:1; /* Descriptor Done */ +#else + /* T20.6: RX Status 0 */ + uint32 inner_pri:3, /* Inner priority */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :2, /* Reserved */ + cpu_cos:6, /* COS queue for CPU packets */ + :1, /* Reserved */ + em_mtp_index:5, /* EM Mirror-to-Port Index */ + timestamp_type:2; /* TIMESTAMP field type indicator */ + + /* T20.7 */ + uint32 :2, /* Reserved */ + pkt_len:14, /* Packet Length After Modification */ + reason_hi:16; /* CPU opcode (high bits) */ + + /* T20.8 */ + uint32 reason; /* CPU opcode */ + + /* T20.9 */ + uint32 outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_vid:12, /* Outer VLAN ID */ + :2, /* Reserved */ + regen_crc:1, /* Packet modified and needs new CRC */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:8; /* New DSCP */ + + /* T20.10 */ + uint32 timestamp; /* Timestamp */ + + /* T20.11 */ + uint32 :3, /* Reserved */ + vfi_valid:1, /* VFI or FID */ + vfi:12, /* Internal VFI or FID value */ + shaping_cos_sel:2, /* Shaping COS Select */ + vlan_cos:5, /* VLAN COS */ + higig_cos:5, /* Higig COS */ + cos:4; /* COS */ + + /* T20.12 */ + uint32 :4, /* Reserved */ + hg_lookup:1, /* Reserved for future use */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + emirror:1, /* Egress Mirroring */ + imirror:1, /* Ingress Mirroring */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress Inner tag action */ + otag_action:2, /* Ingress Outer tag action */ + itag_status:2, /* Ingress incoming tag status */ + hgi:2, /* Higig Interface Format Indicator */ + srcport:8; /* Source port number */ + + /* T20.13 */ + uint32 change_ecn:1, /* Reserved */ + ecn:2, /* Reserved */ + im_mtp_index:5, /* IM Mirror-to-Port Index */ + match_rule:8, /* Matched FP rule */ + :1, /* Reserved */ + nhop_index:15; /* L3 IP Multicast Interface Number or Next HOP Index */ + + /* T20.14 */ + uint32 timestamp_upper; /* OAM delay measurement: Upper 32-bit of 64-bit timestamp */ + + /* T20.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + dc:12, /* Don't Care */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb20_t; +#endif /* BCM_ENDURO_SUPPORT */ + +#if defined(BCM_TRIUMPH3_SUPPORT) || defined(BCM_KATANA_SUPPORT) || \ + defined(BCM_TRIDENT2_SUPPORT) || defined(BCM_GREYHOUND_SUPPORT) +/* + * DMA Control Block - Type 23 + * Used on 56640 devices + * 16 words + */ +#include + +#endif /* BCM_TRIUMPH3_SUPPORT || BCM_KATANA_SUPPORT || \ + BCM_TRIDENT2_SUPPORT || BCM_GREYHOUND_SUPPORT */ + +#if defined(BCM_KATANA_SUPPORT) +/* + * DMA Control Block - Type 24 + * Used on 56440 devices + * 16 words + */ +#include + +#endif /* BCM_KATANA_SUPPORT */ + +#if defined(BCM_TRIDENT2_SUPPORT) || defined(BCM_HURRICANE2_SUPPORT) +/* + * DMA Control Block - Type 26 + * Used on 56850 devices + * 16 words + */ +#include + +#endif /* BCM_TRIDENT2_SUPPORT */ + +#if defined(BCM_KATANA2_SUPPORT) +/* + * DMA Control Block - Type 29 + * Used on 56450 devices + * 16 words + */ +#include + +#endif /* BCM_KATANA2_SUPPORT */ + +#if defined(BCM_GREYHOUND_SUPPORT) +/* + * DMA Control Block - Type 31 + * Used on 53400 devices + * 16 words + */ +#include + +#endif /* BCM_GREYHOUND_SUPPORT */ + +#if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TOMAHAWK2_SUPPORT) +/* + * DMA Control Block - Type 32 + * Used on 5696X devices + * 16 words + */ +#include + +#endif /* BCM_TOMAHAWK_SUPPORT */ + +#if defined(BCM_TRIDENT2PLUS_SUPPORT) +/* + * DMA Control Block - Type 33 + * Used on 56860 devices + * 16 words + */ +#include + +#endif /* BCM_TRIDENT2PLUS_SUPPORT */ + +#if defined(BCM_HURRICANE3_SUPPORT) +/* + * DMA Control Block - Type 34 + * Used on 56160 devices + * 16 words + */ +#include + +#endif /* BCM_HURRICANE3_SUPPORT */ + +#if defined(BCM_APACHE_SUPPORT) +/* + * DMA Control Block - Type 35 + * Used on 56560 devices + * 16 words + */ +#include + +#endif /* BCM_APACHE_SUPPORT */ + +#if defined(BCM_TRIDENT3_SUPPORT) +/* + * DMA Control Block - Type 36 + * Used on 56870 devices + * 16 words + */ +#include + +#endif /* BCM_TRIDENT3_SUPPORT */ + +#if defined(BCM_GREYHOUND2_SUPPORT) +/* + * DMA Control Block - Type 37 + * Used on XXXXX devices + * 16 words + */ +#include + +#endif /* BCM_GREYHOUND2_SUPPORT */ + +#if defined(BCM_TOMAHAWK3_SUPPORT) +/* + * DMA Control Block - Type 38 + * Used on XXXXX devices + * 16 words + */ +#include + +#endif /* BCM_TOMAHAWK3_SUPPORT */ + + +#endif /* _SOC_DCBFORMATS_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h new file mode 100644 index 000000000000..c49fa06f4db0 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h @@ -0,0 +1,2742 @@ +/* + * $Id: defs.h,v 1.271 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: defs.h + * Purpose: Basic defines for system and chips + * This should be included before all other SOC include + * files to make sure BCM_xxxx is defined for them. + */ + +#ifndef _SOC_DEFS_H +#define _SOC_DEFS_H + +/* add the definition below to add memory measurement diagnostics capabilities */ +/* #define MEMORY_MEASUREMENT_DIAGNOSTICS 1 */ + +#include +#if defined(BCM_ESW_SUPPORT) || defined(BCM_SAND_SUPPORT) || defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT) +#include +#endif +#include + +/* Enable per unit linkscan lock for all ESW devices. */ +#if defined(BCM_ESW_SUPPORT) +#define BCM_LINKSCAN_LOCK_PER_UNIT +#endif + +/* + * BCM Chip Support + * + * There are a few classes of defines used throughout the code: + * - chip number defines with revsion numbers (from soc/allenum.h, + * but it can be modified from $SDK/make/Make.local) + * - chip number defines without revision numbers + * - chip type or group defines (such as BCM_*_SUPPORT) + * - component support defines (GBP or FILTER) + */ +#if defined(BCM_5675_A0) +#define BCM_5675 +#define BCM_5670 +#define BCM_HERCULES15_SUPPORT +#define BCM_HERCULES_SUPPORT +#endif + +#if defined(BCM_56504_A0) || defined(BCM_56504_B0) +#define BCM_56504 +#define BCM_FIREBOLT_SUPPORT +#endif + +#if defined(BCM_56102_A0) +#define BCM_56102 +#define BCM_FIREBOLT_SUPPORT +#define BCM_FELIX_SUPPORT +#define BCM_FELIX1_SUPPORT +#endif + +#if defined(BCM_56304_B0) +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_HELIX_SUPPORT +#define BCM_HELIX1_SUPPORT +#define BCM_MIRAGE_SUPPORT +#endif + +#if defined(BCM_56112_A0) +#define BCM_56112 +#define BCM_FIREBOLT_SUPPORT +#define BCM_FELIX_SUPPORT +#define BCM_FELIX15_SUPPORT +#endif + +#if defined(BCM_56314_A0) +#define BCM_56314 +#define BCM_FIREBOLT_SUPPORT +#define BCM_HELIX_SUPPORT +#define BCM_HELIX15_SUPPORT +#define BCM_MIRAGE_SUPPORT +#endif + +#if defined(BCM_56580_A0) +#define BCM_56580 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_GOLDWING_SUPPORT +#define BCM_HB_GW_SUPPORT /* HumV & Goldwing use the Bradley Driver */ +#endif + +#if defined(BCM_56700_A0) +#define BCM_56700 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_HB_GW_SUPPORT +#endif + +#if defined(BCM_56800_A0) +#define BCM_56800 +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_BRADLEY1_SUPPORT /* Only Bradley, excluding HumV & Goldwing */ +#define BCM_HB_GW_SUPPORT +#endif + +#if defined(BCM_56218_A0) +#define BCM_56218 +#define BCM_FIREBOLT_SUPPORT +#define BCM_HELIX_SUPPORT +#define BCM_RAPTOR_SUPPORT +#define BCM_RAPTOR1_SUPPORT +#endif + +#if defined(BCM_56514_A0) +#define BCM_56514 +#define BCM_FIREBOLT_SUPPORT +#define BCM_FIREBOLT2_SUPPORT +#endif + +#if defined(BCM_56624_A0) || defined(BCM_56624_B0) +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPFIX_SUPPORT +#endif + +#if defined(BCM_56680_A0) || defined(BCM_56680_B0) +#define BCM_56680 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_VALKYRIE_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPFIX_SUPPORT +#endif + +#if defined(BCM_56224_A0) || defined(BCM_56224_B0) +#define BCM_56224 +#define BCM_FIREBOLT_SUPPORT +#define BCM_HELIX_SUPPORT +#define BCM_RAPTOR_SUPPORT +#define BCM_RAVEN_SUPPORT +#endif + +#if defined(BCM_53314_A0) || defined(BCM_53324_A0) +#define BCM_53314 +#define BCM_FIREBOLT_SUPPORT +#define BCM_HELIX_SUPPORT +#define BCM_RAPTOR_SUPPORT +#define BCM_RAVEN_SUPPORT +#define BCM_HAWKEYE_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#endif + +#if defined(BCM_56820_A0) +#define BCM_56820 +#define BCM_56800 +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRX_SUPPORT +#endif + +#if defined(BCM_56725_A0) +#define BCM_56725 +#define BCM_56820 +#define BCM_56800 +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_CONQUEROR_SUPPORT +#define BCM_TRX_SUPPORT +#endif + +#if defined(BCM_56634_A0) || defined(BCM_56634_B0) +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPFIX_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#endif + +#if defined(BCM_56524_A0) || defined(BCM_56524_B0) +#define BCM_56524 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_APOLLO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPFIX_SUPPORT +#define BCM_CMICM_SUPPORT +#endif + +#if defined(BCM_56685_A0) || defined(BCM_56685_B0) +#define BCM_56685 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_VALKYRIE2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPFIX_SUPPORT +#endif + +#if defined(BCM_56334_A0) || defined(BCM_56334_B0) +#define BCM_56334 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#endif + +#if defined(BCM_56142_A0) +#define BCM_56142 +#define BCM_56334 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_HURRICANE_SUPPORT +#define BCM_HURRICANE1_SUPPORT +#endif + +#if defined(BCM_56840_A0) || defined(BCM_56840_B0) +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#endif + +#if defined(BCM_56640_A0) || defined(BCM_56640_B0) +#define BCM_56640 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_IPFIX_SUPPORT +#endif + +#if defined(BCM_56340_A0) +#define BCM_56340 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_56640 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_HELIX4_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#endif + +#if defined(BCM_56440_A0) || defined(BCM_56440_B0) +#define BCM_56440 +#define BCM_56840 +#define BCM_56634 +#define BCM_56334 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_KATANA_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#endif + +#if defined(BCM_56260_A0) +#define BCM_56260 +#define BCM_56450 +#define BCM_56440 +#define BCM_56840 +#define BCM_56634 +#define BCM_56640 +#define BCM_56334 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_SABER2_SUPPORT +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_KATANA2_SUPPORT +#define BCM_KATANA_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define BCM_PE_SUPPORT +#define BCM_OLP_SUPPORT +#endif + +#if defined(BCM_56270_A0) +#define BCM_56270 +#define BCM_56260 +#define BCM_56450 +#define BCM_56440 +#define BCM_56840 +#define BCM_56634 +#define BCM_56640 +#define BCM_56334 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_SABER2_SUPPORT +#define BCM_METROLITE_SUPPORT +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_KATANA2_SUPPORT +#define BCM_KATANA_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define BCM_PE_SUPPORT +#define BCM_OLP_SUPPORT +#endif + + +#if defined(BCM_56450_A0) || defined(BCM_56450_B0) || defined(BCM_56450_B1) +#define BCM_56450 +#define BCM_56440 +#define BCM_56840 +#define BCM_56634 +#define BCM_56640 +#define BCM_56334 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_KATANA2_SUPPORT +#define BCM_KATANA_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_PE_SUPPORT +#define BCM_OLP_SUPPORT +#endif + +#if defined(BCM_56850_A0) +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#endif + +#if defined(BCM_56560_A0) || defined(BCM_56560_B0) +#define BCM_56860 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_56560 +#define BCM_APACHE_SUPPORT +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_IPROC_SUPPORT +#define BCM_CMICDV2_SUPPORT +#define BCM_CMICDV3_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define BCM_OLP_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM12X10_SUPPORT +#define PORTMOD_PM12X10_XGS_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define BCM_EP_REDIRECT_VERSION_2 +#endif + +#if defined(BCM_56670_A0) || defined(BCM_56670_B0) || defined(BCM_56670_C0) +#define BCM_56860 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_56560 +#define BCM_56670 +#define BCM_MONTEREY_SUPPORT +#define BCM_APACHE_SUPPORT +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_IPROC_SUPPORT +#define BCM_CMICDV2_SUPPORT +#define BCM_CMICDV3_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define BCM_OLP_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_CPM4X25_SUPPORT +#define PORTMOD_PM12X10_SUPPORT +#define PORTMOD_PM12X10_XGS_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define BCM_PREEMPTION_SUPPORT +#define BCM_FIFODMA_SUPPORT +#endif + +#if defined(BCM_53650_A0) +#define BCM_56860 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_56560 +#define BCM_56670 +#define BCM_53650 +#define BCM_MONTEREY_SUPPORT +#define BCM_APACHE_SUPPORT +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIMESYNC_LIVE_WIRE_TOD_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_IPROC_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_CCMDMA_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define BCM_OLP_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_CPM4X25_SUPPORT +#define PORTMOD_PM12X10_SUPPORT +#define PORTMOD_PM12X10_XGS_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define BCM_PREEMPTION_SUPPORT +#define BCM_MIXED_LEGACY_AND_PORTMOD_SUPPORT +#define BCM_WOLFHOUND3_PLUS_SUPPORT +#endif + +#if defined(BCM_56860_A0) +#define BCM_56860 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_CCMDMA_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X10TD_SUPPORT +#define PORTMOD_PM12X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM4X25TD_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_OLP_SUPPORT +#endif + +#if defined(BCM_56960_A0) +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_TOMAHAWKX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SOC_ASYNC_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_CCMDMA_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_CMICDV2_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#endif + +#if defined(BCM_56980_A0) || defined(BCM_56980_B0) +#define BCM_56980 +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SOC_ASYNC_SUPPORT +#define BCM_CCMDMA_SUPPORT +#define BCM_CMICDV2_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_CMICX_SIM_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define SOC_ROBUST_HASH +#define SOC_COUNTER_TABLE_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM8X50_SUPPORT +#define BCM_CPU_TX_PROC_SUPPORT + +/* TH2 dependent code */ +#define BCM_TOMAHAWK2_SUPPORT +#define BCM_TOMAHAWKX_SUPPORT + +/* + * TH3 dependent code. + * + * Note that this define is normally provided by the BCM dispatcher, + * but we also need it for non-dispatched environments like the + * stand-alone DCB library. + */ +#ifndef BCM_TOMAHAWK3_SUPPORT +#define BCM_TOMAHAWK3_SUPPORT +#endif + +#endif + +#if defined(BCM_56870_A0) +#define BCM_56870 +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_TRIDENT3_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_TCB_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_CMICX_TX_PREALLOC_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_CCMDMA_SUPPORT +#define BCM_SOC_ASYNC_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define BCM_OLP_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#endif + +#if defined(BCM_56470_A0) +#define BCM_56470 +#define BCM_56275 +#define BCM_56370 +#define BCM_56870 +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_TRIDENT3_SUPPORT +#define BCM_HELIX5_SUPPORT +#define BCM_HURRICANE4_SUPPORT +#define BCM_FIREBOLT6_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_MPLS_SUPPORT /* TODO: FB6 */ +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIMESYNC_LIVE_WIRE_TOD_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#define BCM_DDR3_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_CMICX_TX_PREALLOC_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_CCMDMA_SUPPORT +#define BCM_SOC_ASYNC_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PHYMOD_EAGLE_SUPPORT +#define PHYMOD_FALCON_SUPPORT +#define BCM_OLP_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define BCM_CHANNELIZED_SWITCHING_SUPPORT +#define BCM_FLOWTRACKER_SUPPORT +#define BCM_FLOWTRACKER_V2_SUPPORT +#define BCM_FLOWTRACKER_V3_SUPPORT +#define BCM_FLOWTRACKER_EXPORT_FIFO_SUPPORT +#define BCM_UTT_SUPPORT +#define BCM_HLA_SUPPORT +#define BCM_APPL_SIGNATURE_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#endif + +#if defined(BCM_56275_A0) +#define BCM_56275 +#define BCM_56370 +#define BCM_56870 +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_TRIDENT3_SUPPORT +#define BCM_HELIX5_SUPPORT +#define BCM_HURRICANE4_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_MPLS_SUPPORT /* TODO: HR4 */ +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIMESYNC_LIVE_WIRE_TOD_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_CMICX_TX_PREALLOC_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_CCMDMA_SUPPORT +#define BCM_SOC_ASYNC_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM4X10_QTC_SUPPORT +#define BCM_OLP_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define BCM_FLOWTRACKER_SUPPORT +#define BCM_FLOWTRACKER_V2_SUPPORT +#define BCM_FLOWTRACKER_EXPORT_FIFO_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#define BCM_MIXED_LEGACY_AND_PORTMOD_SUPPORT +#define BCM_UTT_SUPPORT +#endif + +#if defined(BCM_56370_A0) +#define BCM_56370 +#define BCM_56870 +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_TRIDENT3_SUPPORT +#define BCM_HELIX5_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_TCB_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_CMICX_TX_PREALLOC_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_SOC_ASYNC_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM4X10_QTC_SUPPORT +#define BCM_OLP_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define BCM_FLOWTRACKER_SUPPORT +#define BCM_FLOWTRACKER_EXPORT_FIFO_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#endif + +#if defined(BCM_56770_A0) +#define BCM_56770 +#define BCM_56870 +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TRIDENT2PLUS_SUPPORT +#define BCM_TRIDENT3_SUPPORT +#define BCM_MAVERICK2_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_TCB_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_CMICX_TX_PREALLOC_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_SOC_ASYNC_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define BCM_HGPROXY_COE_SUPPORT +#define BCM_OLP_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#endif + +#if defined(BCM_56965_A0) +#define BCM_56965 +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_TOMAHAWKX_SUPPORT +#define BCM_TOMAHAWKPLUS_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_CMICDV2_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#endif + +#if defined(BCM_56970_A0) +#define BCM_56970 +#define BCM_56960 +#define BCM_56850 +#define BCM_56840 +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_HUMV_SUPPORT +#define BCM_SCORPION_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_TRIDENT_SUPPORT +#define BCM_TRIUMPH3_SUPPORT +#define BCM_TRIDENT2_SUPPORT +#define BCM_TOMAHAWK_SUPPORT +#define BCM_TOMAHAWK2_SUPPORT +#define BCM_TOMAHAWKX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_XGS3_FABRIC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_TCB_SUPPORT +#define SOC_ROBUST_HASH +#define BCM_CMICDV2_SUPPORT +#define BCM_CMICDV3_SUPPORT +#define BCM_CMICDV4_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#endif + +/* if ARAD_A0, ARAD_B0, ARAD_PLUS is defined, define also ARAD_A0, ARAD_B0, ARAD_PLUS */ +/* Pay attention that effectively all chip flags defined here are functionally equal to BCM_PETRA_SUPPORT */ +#if defined(BCM_88660_A0) || defined(BCM_88675_A0)|| defined(BCM_88675_B0) || defined(BCM_88375_A0) || defined(BCM_88680_A0) || defined(BCM_88470_A0) || defined(BCM_88470_B0) || defined(BCM_88270_A0) +#define BCM_88660 +#define BCM_88660_A0 +#define BCM_ARAD_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#ifndef BCM_DPP_SUPPORT +#define BCM_DPP_SUPPORT +#endif +/* #define BCM_EXTND_SBUS_SUPPORT */ +#define BCM_DDR3_SUPPORT +/*Compilation features*/ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#endif + +#if defined(BCM_88675_A0) /* Defined via mcmrelease: genallchips.pl... */ +#define BCM_88675 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_DNX_FABRIC_SUPPORT +#endif + +#if defined(BCM_88675_B0) /* Defined via mcmrelease: genallchips.pl... */ +#define BCM_88675 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_DNX_FABRIC_SUPPORT +#endif + +#if defined(BCM_88375_A0) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88375 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_DNX_FABRIC_SUPPORT +#endif + + +#if defined(BCM_88680_A0) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88680 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_DNX_FABRIC_SUPPORT +#endif + +#if defined(BCM_88690_A0) || defined(BCM_88690_B0) || defined(BCM_88690_B1) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88690 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM_OS_ILKN_50G_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM8X50_FABRIC_SUPPORT +#define PORTMOD_PM8X50_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_SBUSDMA_SUPPORT + +#endif + +#if defined(BCM_88800_A0) || defined(BCM_88800_A1) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88800 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM_OS_ILKN_50G_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM8X50_FABRIC_SUPPORT +#define PORTMOD_PM8X50_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_SBUSDMA_SUPPORT + +#endif + +#if defined(BCM_88850_A0) || defined(BCM_88850_A1) || defined(BCM_88850_A2)/* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88850 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM_OS_ILKN_50G_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM8X50_FABRIC_SUPPORT +#define PORTMOD_PM8X50_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#endif + +#if defined(BCM_88830_A0) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88830 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM_OS_ILKN_50G_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM8X50_FLEXE_GEN2_SUPPORT +#define PORTMOD_PM8X50_FABRIC_SUPPORT +#define PORTMOD_PM8X50_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#endif + +#ifdef BCM_DNX3_SUPPORT +#define BCM_88860 +#define BCM_88870 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM4X25D_SUPPORT +#define PORTMOD_PM8X100_FABRIC_SUPPORT +#define PORTMOD_PM8X100_GEN2_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_CMICX_GEN2_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#endif + +#ifdef BCM_DNX3_SUPPORT +#endif + + +#if defined(BCM_88480_A0) || defined(BCM_88480_B0) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88480 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM_OS_ILKN_50G_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM8X50_FABRIC_SUPPORT +#define PORTMOD_PM8X50_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#endif + +#if defined(BCM_88470_A0) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88470 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_DNX_FABRIC_SUPPORT +#define PORTMOD_DNX_FABRIC_O_NIF_SUPPORT +#endif + +#if defined(BCM_88470_B0) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88470 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_DNX_FABRIC_SUPPORT +#define PORTMOD_DNX_FABRIC_O_NIF_SUPPORT +#endif + +#if defined(BCM_88270_A0) /* Defined via mcmrelease: genallchips.pl... ??? */ +#define BCM_88270 +#define BCM_IPROC_SUPPORT +#define BCM_UC_MHOST_SUPPORT +/* Compilation features */ +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4x10Q_SUPPORT +#define PORTMOD_PM_OS_ILKN_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_DNX_FABRIC_SUPPORT +#define PORTMOD_PM4X2P5_SUPPORT +#endif + + +#if defined(BCM_88950_A0) || defined(BCM_88950_A1) || defined(BCM_88770_A1) +#define BCM_88770 +#define BCM_88770_A1 +#define BCM_88770_SUPPORT +#define BCM_88773 +#define BCM_88773_A1 +#define BCM_88773_SUPPORT +#define BCM_88774 +#define BCM_88774_A1 +#define BCM_88774_SUPPORT +#define BCM_88775 +#define BCM_88775_A1 +#define BCM_88775_SUPPORT +#define BCM_88776 +#define BCM_88776_A1 +#define BCM_88776_SUPPORT +#define BCM_88950 +#define BCM_88950_A0 +#define BCM_88950_A1 +#define BCM_88950_SUPPORT +#define BCM_88953 +#define BCM_88953_A1 +#define BCM_88953_SUPPORT +#define BCM_88954 +#define BCM_88954_A1 +#define BCM_88954_SUPPORT +#define BCM_88955 +#define BCM_88955_A1 +#define BCM_88955_SUPPORT +#define BCM_88956 +#define BCM_88956_A1 +#define BCM_88956_SUPPORT +#define BCM_LINKSCAN_LOCK_PER_UNIT +#define BCM_CMICM_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_IPROC_SUPPORT +#define PORTMOD_DNX_FABRIC_SUPPORT +#endif + +/* +*This flag is defined by the MCM release +*/ +#if defined(BCM_88790_A0) +#define BCM_88790 +#define BCM_SBUSDMA_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_CMICX_SUPPORT +#define PORTMOD_PM8X50_FABRIC_SUPPORT +#endif + +/* +*This flag is defined by the MCM release +*/ +#ifdef BCM_DNXF3_SUPPORT +#define BCM_88920 +#define BCM_SBUSDMA_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_CMICX_SUPPORT +#define PORTMOD_PM8X100_FABRIC_SUPPORT +#define BCM_CMICX_GEN2_SUPPORT +#endif + +#if defined(BCM_56150_A0) +#define BCM_56150 +#define BCM_56142 +#define BCM_56334 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_HURRICANE_SUPPORT +#define BCM_HURRICANE2_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#endif + +#if defined(BCM_53400_A0) +#define BCM_53400 +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_HURRICANE_SUPPORT +#define BCM_HURRICANE2_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define BCM_GREYHOUND_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#endif + +#if defined(BCM_56160_A0) +#define BCM_56160 +#define BCM_53400 +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_HURRICANE_SUPPORT +#define BCM_HURRICANE2_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_SWITCH_MATCH_SUPPORT +#define BCM_GREYHOUND_SUPPORT +#define BCM_HURRICANE3_SUPPORT +#endif + +#if defined(BCM_53540_A0) +#define BCM_53540 +#define BCM_56160 +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_HURRICANE_SUPPORT +#define BCM_HURRICANE2_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_GREYHOUND_SUPPORT +#define BCM_HURRICANE3_SUPPORT +#endif + +#if defined(BCM_53570_A0) || defined(BCM_53570_B0) +#define BCM_53570 +#define BCM_56160 +#define BCM_53400 +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_HURRICANE_SUPPORT +#define BCM_HURRICANE2_SUPPORT +#define BCM_CMICM_SUPPORT +#define BCM_CMICDV2_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define BCM_GREYHOUND_SUPPORT +#define BCM_HURRICANE3_SUPPORT +#define BCM_GREYHOUND2_SUPPORT +#define BCM_GLOBAL_METER_SUPPORT +#define BCM_GLOBAL_METER_V2_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define BCM_PREEMPTION_SUPPORT +#define BCM_SWITCH_MATCH_SUPPORT +#define BCM_TSN_SUPPORT +#define BCM_TSN_SR_SUPPORT +#define BCM_TAS_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#define BCM_DDR3_SUPPORT +#endif + +#if defined(BCM_56070_A0) +#define BCM_56070 +#define BCM_53570 +#define BCM_56160 +#define BCM_53400 +#define BCM_56304 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_ENDURO_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_HURRICANE_SUPPORT +#define BCM_HURRICANE2_SUPPORT +#define BCM_CMICX_SUPPORT +#define BCM_FIFODMA_SUPPORT +#define BCM_IPROC_SUPPORT +#define BCM_IPROC_DDR_SUPPORT +#define BCM_DDR3_SUPPORT +#define BCM_EXTND_SBUS_SUPPORT +#define BCM_SBUSDMA_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#define BCM_TIMESYNC_V3_SUPPORT +#define BCM_TIME_V3_SUPPORT +#define BCM_UC_MHOST_SUPPORT +#define BCM_GREYHOUND_SUPPORT +#define BCM_HURRICANE3_SUPPORT +#define BCM_GREYHOUND2_SUPPORT +#define BCM_GLOBAL_METER_SUPPORT +#define BCM_GLOBAL_METER_V2_SUPPORT +#define BCM_SWITCH_MATCH_SUPPORT +#define BCM_TSN_SUPPORT +#define BCM_TSN_SR_SUPPORT +#define BCM_TAS_SUPPORT +#define BCM_FIRELIGHT_SUPPORT +#define PORTMOD_PMNULL_SUPPORT +#define PORTMOD_PM4X10_SUPPORT +#define PORTMOD_PM4X25_SUPPORT +#define PORTMOD_PM4X10_QTC_SUPPORT +#endif + +/* + * Strata XGS + */ +#if defined(BCM_5673) || defined(BCM_5690) +#define BCM_XGS1_SWITCH_SUPPORT +#endif + +#if defined(BCM_5665) || defined(BCM_5695) || defined(BCM_5674) +#define BCM_XGS2_SWITCH_SUPPORT +#endif + +#if defined(BCM_56504) || \ + defined(BCM_56102) || defined(BCM_56304) || defined(BCM_56218) || \ + defined(BCM_56112) || defined(BCM_56314) || defined(BCM_56514) || \ + defined(BCM_56580) || defined(BCM_56700) || defined(BCM_56800) || \ + defined(BCM_56624) || defined(BCM_56224) || defined(BCM_56820) || \ + defined(BCM_53314) || defined(BCM_56680) || defined(BCM_56725) || \ + defined(BCM_56634) || defined(BCM_56524) || defined(BCM_56685) || \ + defined(BCM_56334) || defined(BCM_56840) || defined(BCM_56142) || \ + defined(BCM_56640) || defined(BCM_56440) || \ + defined(BCM_56850) || defined(BCM_56450) || defined(BCM_56340) || \ + defined(BCM_56260) || defined(BCM_56160) || defined(BCM_56270) || \ + defined(BCM_56150) || defined(BCM_53400) || defined(BCM_56960) || \ + defined(BCM_56870) || defined(BCM_56965) || defined(BCM_56970) || \ + defined(BCM_56980) || defined(BCM_53570) || defined(BCM_53540) || \ + defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56275) || \ + defined(BCM_56470) || defined(BCM_56070) || defined(BCM_53650) +#define BCM_XGS3_SWITCH_SUPPORT +#endif + +#if defined(BCM_5675) +#define BCM_XGS2_FABRIC_SUPPORT +#endif + +#if defined(BCM_56700) || defined(BCM_56701) || defined(BCM_56725) +#define BCM_XGS3_FABRIC_SUPPORT +#endif + +#if defined(BCM_XGS3_SWITCH_SUPPORT) +#define BCM_XGS_SWITCH_SUPPORT +#endif + +#if defined(BCM_XGS2_FABRIC_SUPPORT) +#define BCM_XGS12_FABRIC_SUPPORT +#endif + +#if defined(BCM_XGS12_FABRIC_SUPPORT) +#define BCM_XGS12_SUPPORT +#endif + +#if defined(BCM_XGS12_FABRIC_SUPPORT) || defined(BCM_XGS3_FABRIC_SUPPORT) +#define BCM_XGS_FABRIC_SUPPORT +#endif + +#if defined(BCM_XGS_SWITCH_SUPPORT) || defined(BCM_XGS_FABRIC_SUPPORT) +#define BCM_XGS_SUPPORT +#endif + +#if defined(BCM_XGS_SWITCH_SUPPORT) +#define BCM_SWITCH_SUPPORT +#endif + +#if defined(BCM_56960) || defined(BCM_56965) || defined(BCM_56970) || \ + defined(BCM_56980) +#define SOC_UNIQUE_ACC_TYPE_ACCESS +#endif + +/* Common XGS5 Port Module Support */ +#if defined(BCM_56450) || defined(BCM_56560) || defined(BCM_56860) || \ + defined(BCM_56870) || defined(BCM_56970) || defined(BCM_56370) || \ + defined(BCM_56770) || defined(BCM_56980) || defined(BCM_56275) || \ + defined(BCM_56470) +#define BCM_XGS5_SWITCH_PORT_SUPPORT +#endif + +/* + * RIOT + */ +#if defined(INCLUDE_L3) +#if defined(BCM_56860_A0) || defined (BCM_56560) || defined(BCM_56870_A0) || \ + defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56275) || \ + defined(BCM_56470) || defined(BCM_53650) +#define BCM_RIOT_SUPPORT +#endif +#endif +/* + * SwapToItself + */ +#if defined(INCLUDE_L3) +#if defined (BCM_56560) || defined (BCM_56970_A0) || defined(BCM_56870_A0) || \ + defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56470) +#define BCM_SWAP_TO_SELF_SUPPORT +#endif +#endif + /* + * Multi-level ECMP + */ +#if defined(INCLUDE_L3) +#if defined(BCM_56860_A0) || defined (BCM_56560) || defined(BCM_56870) || \ + defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56980) || \ + defined(BCM_56275) || defined(BCM_56470) || defined(BCM_53650) +#define BCM_MULTI_LEVEL_ECMP_SUPPORT +#endif +#endif + +/* + * Multi-Level Failover Support. + */ +#if defined(INCLUDE_L3) +#if defined(BCM_56560) +#define BCM_MULTI_LEVEL_FAILOVER_SUPPORT +#endif +#endif + +/* + * Special Label Enhancement Support. + */ +#if defined(INCLUDE_L3) +#if defined(BCM_56870) || defined(BCM_56370) || defined(BCM_56770) || \ + defined(BCM_56470) +#define BCM_SPECIAL_LABEL_SUPPORT +#endif +#endif + +/* + * L3_ECMP Protected write + */ +#if defined(INCLUDE_L3) +#if defined(BCM_56370) +#define SOC_L3_ECMP_PROTECTED_ACCESS_SUPPORT +#endif +#endif + +/* + * Packet-based rate limiting to CPU for HW only. + */ +#if defined(BCM_56150) || defined(BCM_53400) || defined(BCM_56160) || \ + defined(BCM_53540) || defined(BCM_53570) || defined(BCM_56070) +#define BCM_PACKET_RATE_LIMIT_HW_ONLY_SUPPORT +#endif + +/* + * Common Collector APIs support. + */ +#if defined(BCM_FLOWTRACKER_SUPPORT) || \ + defined(BCM_FLOWTRACKER_V2_SUPPORT) || \ + defined(BCM_FLOWTRACKER_V3_SUPPORT) || \ + defined(INCLUDE_FLOWTRACKER) || \ + defined(INCLUDE_IFA) || \ + defined(INCLUDE_TELEMETRY) +#define BCM_COLLECTOR_SUPPORT +#endif + +/* + * TimeSync Time Capture support. + */ +#if defined(BCM_56960_A0) || \ + defined(BCM_56970_A0) || \ + defined(BCM_56770_A0) || \ + defined(BCM_88690_A0) || \ + defined(BCM_88690_B0) || \ + defined(BCM_88690_B1) || \ + defined(BCM_56275_A0) || \ + defined(BCM_56980_A0) || defined(BCM_56980_A0) || \ + defined(BCM_53570_A0) || defined(BCM_53570_B0) || \ + defined(BCM_56070_A0) || \ + defined(BCM_88480_A0) || defined(BCM_88480_B0) || \ + defined(BCM_88800_A0) || defined(BCM_88800_A1) || defined(BCM_88800_B0) || \ + defined(BCM_88850_A0) || defined(BCM_88850_A1) || defined(BCM_88850_A2) || defined(BCM_88830_A0) || \ + defined(BCM_56370_A0) || defined(BCM_56370_A2) || defined(BCM_56375_A0) || defined(BCM_56375_A2) +#define BCM_TIMESYNC_TIME_CAPTURE_SUPPORT +#endif + +/* + * TimeSync nanosync support. + */ +#if defined(BCM_56275) || defined(BCM_56980) || defined(BCM_56670) || \ + defined(BCM_56070) || defined(BCM_56470) || defined(BCM_53650) +#define BCM_TIME_NANOSYNC_SUPPORT +#endif + + +/* + * Local Time of Day support. + */ +#if defined(BCM_56070) || defined(BCM_56270) || defined(BCM_56670) +#define BCM_TIME_LOCAL_TOD_SUPPORT +#endif + +/* + * PCS 1588 TS for TSC Falcon Gen 3. + */ +#if defined(BCM_56070) || defined(BCM_56470) +#define BCM_TSCF_GEN3_PCS_TIMESTAMP +#endif + +/* + * EA + */ + +#if defined(BCM_XGS3_SWITCH_SUPPORT) +#define BCM_FIELD_SUPPORT +#endif + +/* + * If any supported chip includes a Fast Filter Processor (FFP) + * or Field Processor (FP) + */ +#if defined(BCM_XGS1_SWITCH_SUPPORT) || defined(BCM_XGS2_SWITCH_SUPPORT) +#define BCM_FILTER_SUPPORT +#endif + +#if defined(INCLUDE_ACL) +#define BCM_ACL_SUPPORT +#endif + +/* + * CMIC + */ +#if defined(BCM_ESW_SUPPORT) || defined(BCM_SAND_SUPPORT) || defined(PORTMOD_SUPPORT) +#define BCM_CMIC_SUPPORT +#endif + +/* + * If any supported chip supports Higig2 + */ +#if defined(BCM_56580) || defined(BCM_56700) || defined(BCM_56800) || \ + defined(BCM_56218) || defined(BCM_56624) || defined(BCM_56224) || \ + defined(BCM_56820) || defined(BCM_56680) || defined(BCM_56725) || \ + defined(BCM_53314) || defined(BCM_56634) || defined(BCM_56524) || \ + defined(BCM_56685) || defined(BCM_56334) || \ + defined(BCM_56840) || defined(BCM_56142) || \ + defined(BCM_56640) || defined(BCM_56440) || defined(BCM_56850) || \ + defined(BCM_56450) || defined(BCM_56340) || defined(BCM_56150) || \ + defined(BCM_56260) || defined(BCM_56160) || defined(BCM_56270) || \ + defined(BCM_53400) || defined(BCM_56960) || \ + defined(BCM_56860) || defined(BCM_56965) || defined(BCM_56970) || \ + defined(BCM_56870) || defined(BCM_53570) || defined(BCM_56370) || \ + defined(BCM_56770) || defined(BCM_53540) || defined(BCM_56980) || \ + defined(BCM_56275) || defined(BCM_56470) || defined(BCM_56070) || \ + defined(BCM_53650) +#define BCM_HIGIG2_SUPPORT +#endif + +/* + * If any supported chip has GXPORTS + */ +#if defined(BCM_56580) || defined(BCM_56700) || defined(BCM_56800) || \ + defined(BCM_56624) || defined(BCM_56820) || defined(BCM_56680) || \ + defined(BCM_56725) || defined(BCM_56634) || defined(BCM_56524) || \ + defined(BCM_56685) || defined(BCM_56334) || \ + defined(BCM_56840) || defined(BCM_56142) || \ + defined(BCM_56640) || defined(BCM_56440) || defined(BCM_56850) || \ + defined(BCM_56450) || defined(BCM_56340) || defined(BCM_56150) || \ + defined(BCM_56260) || defined(BCM_56160) || defined(BCM_56270) || \ + defined(BCM_53400) || defined(BCM_56960) || defined(BCM_56965) || \ + defined(BCM_56970) || defined(BCM_53570) || defined(BCM_56980) || \ + defined(BCM_56070) +#define BCM_GXPORT_SUPPORT +#endif + +/* + * If any supported chip includes storm control (bandwidth rate) capability + */ +#if defined(BCM_56218) || defined(BCM_56224) || defined(BCM_53314) +#define BCM_BANDWIDTH_RATE_METER +#endif + +/* + * If any supported chip has BigMAC ports + */ +#if defined(BCM_XGS12_SUPPORT) || \ + defined(BCM_56504) || \ + defined(BCM_56102) || defined(BCM_56304) || defined(BCM_56112) || \ + defined(BCM_56314) || defined(BCM_56580) || defined(BCM_56700) || \ + defined(BCM_56800) || defined(BCM_56514) || defined(BCM_56624) || \ + defined(BCM_56680) || defined(BCM_56820) || defined(BCM_56725) || \ + defined(BCM_56334) +#define BCM_BIGMAC_SUPPORT +#endif + +/* + * If any supported chip has XMAC ports + */ +#if defined(BCM_56840) || defined(BCM_56640) || \ + defined(BCM_56440) || defined(BCM_56450) || defined(BCM_56340) +#define BCM_XMAC_SUPPORT +#endif + +/* + * If any supported chip has XLMAC ports + */ +#if defined(BCM_56850) || defined(BCM_56150) || defined(BCM_56960) || \ + defined(BCM_53400) || defined(BCM_56260) || defined(BCM_56160) || \ + defined(BCM_56270) || defined(BCM_56965) || defined(BCM_56970) || \ + defined(BCM_56870) || defined(BCM_56980) +#define BCM_XLMAC_SUPPORT +#endif + +/* + * If any supported chip has CLMAC ports + */ +#if defined(BCM_56960) || defined(BCM_56860) || defined(BCM_56560) || \ + defined(BCM_56870) || \ + defined(BCM_56965) || defined(BCM_56970) || defined(BCM_53570) || \ + defined(BCM_56980) || defined(BCM_56070) +#define BCM_CLMAC_SUPPORT +#endif + +/* + * If any supported chip has UniMAC ports + */ +#if defined(BCM_56224) || defined(BCM_56624) || defined(BCM_56820) || \ + defined(BCM_53314) || defined(BCM_56680) || defined(BCM_56725) || \ + defined(BCM_56634) || defined(BCM_56524) || \ + defined(BCM_56685) || defined(BCM_56334) || \ + defined(BCM_56840) || defined(BCM_56142) || \ + defined(BCM_56440) || defined(BCM_56450) || defined(BCM_56150) || \ + defined(BCM_53400) || defined(BCM_56260) || defined(BCM_56160) || \ + defined(BCM_56270) || defined(BCM_53570) || defined(BCM_53540) || \ + defined(BCM_56070) +#define BCM_UNIMAC_SUPPORT +#endif + +/* + * If any supported chip has CMAC ports + */ +#if defined(BCM_56640) || defined(BCM_56850) || \ + defined(BCM_56960) || defined(BCM_56965) || defined(BCM_56970) || \ + defined(BCM_56870) || defined(BCM_56980) +#define BCM_CMAC_SUPPORT +#endif + +/* + * If any supported chip has Unified ports + */ +#if defined(BCM_56640) || defined(BCM_56850) || defined(BCM_56340) || \ + defined(BCM_56960) || defined(BCM_56965) || \ + defined(BCM_56970) || defined(BCM_56870) || defined(BCM_56980) +#define BCM_UNIPORT_SUPPORT +#endif + +/* + * If any supported chip has ISM support + */ +#if defined(BCM_56640) || defined(BCM_56340) || defined(BCM_56850) || \ + defined(BCM_56960) || defined(BCM_56965) || defined(BCM_56870) || \ + defined(BCM_56970) || defined(BCM_56980) +#define BCM_ISM_SUPPORT +#endif + +/* + * If any supported chip has CMICM support + */ +#ifdef BCM_SBUSDMA_SUPPORT +#define BCM_CMICM_SUPPORT +#endif + +/* + * If any supported chip has instrumentation feature + */ +#if defined(BCM_56960) || defined(BCM_56965) || \ + defined(BCM_56870) || defined(BCM_56970) || defined(BCM_56980) || \ + defined(BCM_56770) || defined(BCM_56370) || defined(BCM_56470) +#define BCM_INSTRUMENTATION_SUPPORT +#endif + +/* + * If any supported chip includes an LED Processor + */ + +#if defined(BCM_5675) || defined(BCM_56504) || \ + defined(BCM_56102) || defined(BCM_56304) || \ + defined(BCM_56112) || defined(BCM_56314) || \ + defined(BCM_56580) || defined(BCM_56700) || \ + defined(BCM_56800) || defined(BCM_56218) || \ + defined(BCM_56514) || defined(BCM_56624) || \ + defined(BCM_56224) || defined(BCM_56820) || \ + defined(BCM_53314) || defined(BCM_56680) || \ + defined(BCM_56725) || defined(BCM_56634) || \ + defined(BCM_56524) || defined(BCM_56334) || \ + defined(BCM_56685) || \ + defined(BCM_56840) || defined(BCM_56142) || \ + defined(BCM_56640) || \ + defined(BCM_56440) || defined(BCM_56850) || \ + defined(BCM_56450) || defined(BCM_56340) || \ + defined(BCM_56150) || \ + defined(BCM_53400) || defined(BCM_56960) || \ + defined(BCM_56260) || defined(BCM_56160) || \ + defined(BCM_56270) || defined(BCM_56965) || \ + defined(BCM_56870) || \ + defined(BCM_56970) || defined(BCM_53570) || \ + defined(BCM_56980) || defined(BCM_53540) || \ + defined(BCM_56370) || defined(BCM_56770) || \ + defined(BCM_56275) || defined(BCM_56470) || \ + defined(BCM_56070) +#define BCM_LEDPROC_SUPPORT +#endif + +#if defined(BCM_53400) || defined(BCM_56340) || \ + defined(BCM_56150) || defined(BCM_56160) || \ + defined(BCM_56260) +#define BCM_AND28_SUPPORT +#endif + +#if defined(BCM_53570) +#define BCM_AND28_F4_SUPPORT +#endif + +#if defined(BCM_56275) +#define BCM_AND16_SUPPORT +#endif + +#if defined(BCM_88675) || defined(BCM_88680) || \ + defined(BCM_88470) || defined(BCM_88375) || \ + defined(BCM_88270) +#define BCM_DDRC28_SUPPORT +#endif + +#if defined(INCLUDE_ACL) +#define BCM_ACL_SUPPORT +#endif + +#if defined(BCM_XGS_SUPPORT) +#ifndef BCM_ESW_SUPPORT +#define BCM_ESW_SUPPORT +#endif +#endif + +#if defined(INCLUDE_RCPU) +#define BCM_RCPU_SUPPORT +#endif + +#if defined(INCLUDE_OOB_RCPU) +#define BCM_OOB_RCPU_SUPPORT +#endif + +/* MACSEC special definition for those switch device within bounded MACSEC supports. */ +#ifdef INCLUDE_MACSEC +/* Current MACSEC solution in SDK can be classified to two solutions. + * 1. PHY-MACSEC : MACSEC is bounded in a stand-along PHY chip. + * 2. Switch-MACSEC : MACSEC is bounded with switch device. + * - BCM_SWITCHMACSEC_SUPPORT is specified for this solution. + */ +#endif /* INCLUDE_MACSEC */ + +/* EDK support */ +#ifdef INCLUDE_EDK +#ifndef BCM_EDK_SUPPORT +#define BCM_EDK_SUPPORT +#endif +#endif + +/**************************************************************** + * + * This is a list of all known chips which may or may not be supported + * by a given image. + * + * Use soc_chip_supported() for which are supported + * CHANGE soc_chip_type_map if you change this + * + * See also socchip.h + * + * Enumerated types include: + * Unit numbers + * Chip type numbers (specific chip references w/ rev id) + * Chip group numbers (groups of chips, usually dropping revision + * number) + * + * All of the above are 0-based. + * + ****************************************************************/ + +typedef enum soc_chip_types_e { + SOC_CHIP_BCM5670_A0, + SOC_CHIP_BCM5673_A0, + SOC_CHIP_BCM5690_A0, + SOC_CHIP_BCM5665_A0, + SOC_CHIP_BCM5695_A0, + SOC_CHIP_BCM5675_A0, + SOC_CHIP_BCM5674_A0, + SOC_CHIP_BCM5665_B0, + SOC_CHIP_BCM56601_A0, + SOC_CHIP_BCM56601_B0, + SOC_CHIP_BCM56601_C0, + SOC_CHIP_BCM56602_A0, + SOC_CHIP_BCM56602_B0, + SOC_CHIP_BCM56602_C0, + SOC_CHIP_BCM56504_A0, + SOC_CHIP_BCM56504_B0, + SOC_CHIP_BCM56102_A0, + SOC_CHIP_BCM56304_B0, + SOC_CHIP_BCM56112_A0, + SOC_CHIP_BCM56314_A0, + SOC_CHIP_BCM5650_C0, + SOC_CHIP_BCM56800_A0, + SOC_CHIP_BCM56218_A0, + SOC_CHIP_BCM56514_A0, + SOC_CHIP_BCM56624_A0, + SOC_CHIP_BCM56624_B0, + SOC_CHIP_BCM56680_A0, + SOC_CHIP_BCM56680_B0, + SOC_CHIP_BCM56224_A0, + SOC_CHIP_BCM56224_B0, + SOC_CHIP_BCM53314_A0, + SOC_CHIP_BCM53324_A0, + SOC_CHIP_BCM56725_A0, + SOC_CHIP_BCM56820_A0, + SOC_CHIP_BCM56634_A0, + SOC_CHIP_BCM56634_B0, + SOC_CHIP_BCM56524_A0, + SOC_CHIP_BCM56524_B0, + SOC_CHIP_BCM56685_A0, + SOC_CHIP_BCM56685_B0, + SOC_CHIP_BCM56334_A0, + SOC_CHIP_BCM56334_B0, + SOC_CHIP_BCM56840_A0, + SOC_CHIP_BCM56840_B0, + SOC_CHIP_BCM56850_A0, + SOC_CHIP_BCM56960_A0, + SOC_CHIP_BCM56980_A0, + SOC_CHIP_BCM56980_B0, + SOC_CHIP_BCM56870_A0, + SOC_CHIP_BCM56873_A0, + SOC_CHIP_BCM56275_A0, + SOC_CHIP_BCM56370_A0, + SOC_CHIP_BCM56470_A0, + SOC_CHIP_BCM56770_A0, + SOC_CHIP_BCM56771_A0, + SOC_CHIP_BCM56970_A0, + SOC_CHIP_BCM56142_A0, + SOC_CHIP_BCM56150_A0, + SOC_CHIP_BCM88660_A0, + SOC_CHIP_BCM88675_A0, + SOC_CHIP_BCM88675_B0, + SOC_CHIP_BCM88375_A0, + SOC_CHIP_BCM88375_B0, + SOC_CHIP_BCM88680_A0, + SOC_CHIP_BCM88690_A0, + SOC_CHIP_BCM88690_B0, + SOC_CHIP_BCM88800_A0, + SOC_CHIP_BCM88800_A1, + SOC_CHIP_BCM88850_A0, + SOC_CHIP_BCM88830_A0, +#ifdef BCM_DNX3_SUPPORT + SOC_CHIP_BCM88860_A0, + SOC_CHIP_BCM88870_A0, +#endif + SOC_CHIP_BCM88480_A0, + SOC_CHIP_BCM88480_B0, + SOC_CHIP_BCM88480_B1, + SOC_CHIP_BCM88470_A0, + SOC_CHIP_BCM88470_B0, + SOC_CHIP_BCM88270_A0, + SOC_CHIP_BCM56640_A0, + SOC_CHIP_BCM56640_B0, + SOC_CHIP_BCM56340_A0, /* Helix4 */ + SOC_CHIP_BCM56440_A0, + SOC_CHIP_BCM56440_B0, + SOC_CHIP_BCM56450_A0, + SOC_CHIP_BCM56450_B0, + SOC_CHIP_BCM56450_B1, + SOC_CHIP_BCM56260_A0, /* Saber2 */ + SOC_CHIP_BCM56260_B0, /* Saber2 */ + SOC_CHIP_BCM56270_A0, /* Metrolite */ + SOC_CHIP_BCM56860_A0, /* Trident2 Plus */ + SOC_CHIP_BCM56560_A0, /* Apache */ + SOC_CHIP_BCM56560_B0, /* Apache */ + SOC_CHIP_BCM56670_A0, /* Monterey */ + SOC_CHIP_BCM56670_B0, /* Monterey */ + SOC_CHIP_BCM56670_C0, /* Monterey */ + SOC_CHIP_BCM53650_A0, /* Wolfhound3 Plus */ + SOC_CHIP_BCM88770_A1, + SOC_CHIP_BCM88773_A1, + SOC_CHIP_BCM88774_A1, + SOC_CHIP_BCM88775_A1, + SOC_CHIP_BCM88776_A1, + SOC_CHIP_BCM88950_A0, + SOC_CHIP_BCM88950_A1, + SOC_CHIP_BCM88953_A1, + SOC_CHIP_BCM88954_A1, + SOC_CHIP_BCM88955_A1, + SOC_CHIP_BCM88956_A1, + SOC_CHIP_BCM88790_A0, + SOC_CHIP_BCM88790_B0, +#ifdef BCM_DNXF3_SUPPORT + SOC_CHIP_BCM88920_A0, +#endif + SOC_CHIP_ACP, + SOC_CHIP_BCM53400_A0, + SOC_CHIP_BCM56160_A0, + SOC_CHIP_BCM53570_A0, + SOC_CHIP_BCM53570_B0, + SOC_CHIP_BCM88772_A1, + SOC_CHIP_BCM88952_A0, + SOC_CHIP_BCM88952_A1, + SOC_CHIP_BCM56965_A0, /* Tomahawk+ */ + SOC_CHIP_BCM56965_A1, /* Tomahawk+ */ + SOC_CHIP_BCM53540_A0, + SOC_CHIP_BCM56070_A0, +#if defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT) + SOC_CHIP_LTSW, +#endif + SOC_CHIP_TYPES_COUNT +} soc_chip_types; + +/**************************************************************** + * + * NB: Order of this array must match soc_chip_types_e above. + * + ****************************************************************/ +#ifdef BCM_DNX3_SUPPORT +#define SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL /* SOC_CHIP_BCM88860_A0 */ SOC_CHIP_BCM8886X,\ + /* SOC_CHIP_BCM88870_A0 */ SOC_CHIP_BCM8887X, +#else +#define SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL +#endif +#define SOC_CHIP_DNX_TYPE_MAP_INIT_ADDITIONAL +#ifdef BCM_DNXF3_SUPPORT +#define SOC_CHIP_DNXF_TYPE_MAP_INIT_ADDITIONAL /* SOC_CHIP_BCM88920_A0 */ SOC_CHIP_BCM8892X, +#else +#define SOC_CHIP_DNXF_TYPE_MAP_INIT_ADDITIONAL +#endif +#define SOC_CHIP_TYPE_MAP_INIT \ + /* SOC_CHIP_BCM5670_A0, */ SOC_CHIP_BCM5670, \ + /* SOC_CHIP_BCM5673_A0, */ SOC_CHIP_BCM5673, \ + /* SOC_CHIP_BCM5690_A0, */ SOC_CHIP_BCM5690, \ + /* SOC_CHIP_BCM5665_A0, */ SOC_CHIP_BCM5665, \ + /* SOC_CHIP_BCM5695_A0, */ SOC_CHIP_BCM5695, \ + /* SOC_CHIP_BCM5675_A0, */ SOC_CHIP_BCM5675, \ + /* SOC_CHIP_BCM5674_A0, */ SOC_CHIP_BCM5674, \ + /* SOC_CHIP_BCM5665_B0, */ SOC_CHIP_BCM5665, \ + /* SOC_CHIP_BCM56601_A0, */ SOC_CHIP_BCM56601, \ + /* SOC_CHIP_BCM56601_B0, */ SOC_CHIP_BCM56601, \ + /* SOC_CHIP_BCM56601_C0, */ SOC_CHIP_BCM56601, \ + /* SOC_CHIP_BCM56602_A0, */ SOC_CHIP_BCM56602, \ + /* SOC_CHIP_BCM56602_B0, */ SOC_CHIP_BCM56602, \ + /* SOC_CHIP_BCM56602_C0, */ SOC_CHIP_BCM56602, \ + /* SOC_CHIP_BCM56504_A0, */ SOC_CHIP_BCM56504, \ + /* SOC_CHIP_BCM56504_B0, */ SOC_CHIP_BCM56504, \ + /* SOC_CHIP_BCM56102_A0, */ SOC_CHIP_BCM56102, \ + /* SOC_CHIP_BCM56304_B0, */ SOC_CHIP_BCM56304, \ + /* SOC_CHIP_BCM56112_A0, */ SOC_CHIP_BCM56112, \ + /* SOC_CHIP_BCM56314_A0, */ SOC_CHIP_BCM56314, \ + /* SOC_CHIP_BCM5650_C0, */ SOC_CHIP_BCM5650, \ + /* SOC_CHIP_BCM56800_A0, */ SOC_CHIP_BCM56800, \ + /* SOC_CHIP_BCM56218_A0, */ SOC_CHIP_BCM56218, \ + /* SOC_CHIP_BCM56514_A0, */ SOC_CHIP_BCM56514, \ + /* SOC_CHIP_BCM56624_A0, */ SOC_CHIP_BCM56624, \ + /* SOC_CHIP_BCM56624_B0, */ SOC_CHIP_BCM56624, \ + /* SOC_CHIP_BCM56680_A0, */ SOC_CHIP_BCM56680, \ + /* SOC_CHIP_BCM56680_B0, */ SOC_CHIP_BCM56680, \ + /* SOC_CHIP_BCM56224_A0, */ SOC_CHIP_BCM56224, \ + /* SOC_CHIP_BCM56224_B0, */ SOC_CHIP_BCM56224, \ + /* SOC_CHIP_BCM53314_A0, */ SOC_CHIP_BCM53314, \ + /* SOC_CHIP_BCM53324_A0, */ SOC_CHIP_BCM53314, \ + /* SOC_CHIP_BCM56725_A0, */ SOC_CHIP_BCM56725, \ + /* SOC_CHIP_BCM56820_A0, */ SOC_CHIP_BCM56820, \ + /* SOC_CHIP_BCM56634_A0, */ SOC_CHIP_BCM56634, \ + /* SOC_CHIP_BCM56634_B0, */ SOC_CHIP_BCM56634, \ + /* SOC_CHIP_BCM56524_A0, */ SOC_CHIP_BCM56524, \ + /* SOC_CHIP_BCM56524_B0, */ SOC_CHIP_BCM56524, \ + /* SOC_CHIP_BCM56685_A0, */ SOC_CHIP_BCM56685, \ + /* SOC_CHIP_BCM56685_B0, */ SOC_CHIP_BCM56685, \ + /* SOC_CHIP_BCM56334_A0, */ SOC_CHIP_BCM56334, \ + /* SOC_CHIP_BCM56334_B0, */ SOC_CHIP_BCM56334, \ + /* SOC_CHIP_BCM56840_A0, */ SOC_CHIP_BCM56840, \ + /* SOC_CHIP_BCM56840_B0, */ SOC_CHIP_BCM56840, \ + /* SOC_CHIP_BCM56850_A0, */ SOC_CHIP_BCM56850, \ + /* SOC_CHIP_BCM56960_A0, */ SOC_CHIP_BCM56960, \ + /* SOC_CHIP_BCM56980_A0, */ SOC_CHIP_BCM56980, \ + /* SOC_CHIP_BCM56980_B0, */ SOC_CHIP_BCM56980, \ + /* SOC_CHIP_BCM56870_A0, */ SOC_CHIP_BCM56870, \ + /* SOC_CHIP_BCM56873_A0, */ SOC_CHIP_BCM56870, \ + /* SOC_CHIP_BCM56275_A0, */ SOC_CHIP_BCM56275, \ + /* SOC_CHIP_BCM56370_A0, */ SOC_CHIP_BCM56370, \ + /* SOC_CHIP_BCM56470_A0, */ SOC_CHIP_BCM56470, \ + /* SOC_CHIP_BCM56770_A0, */ SOC_CHIP_BCM56770, \ + /* SOC_CHIP_BCM56771_A0, */ SOC_CHIP_BCM56770, \ + /* SOC_CHIP_BCM56970_A0, */ SOC_CHIP_BCM56970, \ + /* SOC_CHIP_BCM56142_A0, */ SOC_CHIP_BCM56142, \ + /* SOC_CHIP_BCM56150_A0, */ SOC_CHIP_BCM56150, \ + /* SOC_CHIP_BCM88660_A0 */ SOC_CHIP_BCM88660, \ + /* SOC_CHIP_BCM88675_A0 */ SOC_CHIP_BCM88675, \ + /* SOC_CHIP_BCM88675_B0 */ SOC_CHIP_BCM88675, \ + /* SOC_CHIP_BCM88375_A0 */ SOC_CHIP_BCM88375, \ + /* SOC_CHIP_BCM88375_B0 */ SOC_CHIP_BCM88375, \ + /* SOC_CHIP_BCM88680_A0 */ SOC_CHIP_BCM88680, \ + /* SOC_CHIP_BCM88690_A0 */ SOC_CHIP_BCM8869X, \ + /* SOC_CHIP_BCM88690_B0 */ SOC_CHIP_BCM8869X, \ + /* SOC_CHIP_BCM88800_A0 */ SOC_CHIP_BCM8880X, \ + /* SOC_CHIP_BCM88800_A1 */ SOC_CHIP_BCM8880X, \ + /* SOC_CHIP_BCM88850_A0 */ SOC_CHIP_BCM8885X, \ + /* SOC_CHIP_BCM88830_A0 */ SOC_CHIP_BCM8883X, \ + SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL \ + SOC_CHIP_DNX_TYPE_MAP_INIT_ADDITIONAL \ + /* SOC_CHIP_BCM88480_A0 */ SOC_CHIP_BCM8848X, \ + /* SOC_CHIP_BCM88480_B0 */ SOC_CHIP_BCM8848X, \ + /* SOC_CHIP_BCM88480_B1 */ SOC_CHIP_BCM8848X, \ + /* SOC_CHIP_BCM88470_A0 */ SOC_CHIP_BCM88470, \ + /* SOC_CHIP_BCM88470_B0 */ SOC_CHIP_BCM88470, \ + /* SOC_CHIP_BCM88270_A0 */ SOC_CHIP_BCM88270, \ + /* SOC_CHIP_BCM56640_A0, */ SOC_CHIP_BCM56640, \ + /* SOC_CHIP_BCM56640_B0, */ SOC_CHIP_BCM56640, \ + /* SOC_CHIP_BCM56340_A0, */ SOC_CHIP_BCM56340, \ + /* SOC_CHIP_BCM56440_A0 */ SOC_CHIP_BCM56440, \ + /* SOC_CHIP_BCM56440_B0 */ SOC_CHIP_BCM56440, \ + /* SOC_CHIP_BCM56450_A0 */ SOC_CHIP_BCM56450, \ + /* SOC_CHIP_BCM56450_B0 */ SOC_CHIP_BCM56450, \ + /* SOC_CHIP_BCM56450_B1 */ SOC_CHIP_BCM56450, \ + /* SOC_CHIP_BCM56260_A0 */ SOC_CHIP_BCM56260, \ + /* SOC_CHIP_BCM56260_B0 */ SOC_CHIP_BCM56260, \ + /* SOC_CHIP_BCM56270_A0 */ SOC_CHIP_BCM56270, \ + /* SOC_CHIP_BCM56860_A0, */ SOC_CHIP_BCM56860, \ + /* SOC_CHIP_BCM56560_A0, */ SOC_CHIP_BCM56560, \ + /* SOC_CHIP_BCM56560_B0, */ SOC_CHIP_BCM56560, \ + /* SOC_CHIP_BCM56670_A0, */ SOC_CHIP_BCM56670, \ + /* SOC_CHIP_BCM56670_B0, */ SOC_CHIP_BCM56670, \ + /* SOC_CHIP_BCM56670_C0, */ SOC_CHIP_BCM56670, \ + /* SOC_CHIP_BCM53650_A0, */ SOC_CHIP_BCM53650, \ + /* SOC_CHIP_BCM88770_A1 */ SOC_CHIP_BCM88770, \ + /* SOC_CHIP_BCM88773_A1 */ SOC_CHIP_BCM88773, \ + /* SOC_CHIP_BCM88774_A1 */ SOC_CHIP_BCM88774, \ + /* SOC_CHIP_BCM88775_A1 */ SOC_CHIP_BCM88775, \ + /* SOC_CHIP_BCM88776_A1 */ SOC_CHIP_BCM88776, \ + /* SOC_CHIP_BCM88950_A0 */ SOC_CHIP_BCM88950, \ + /* SOC_CHIP_BCM88950_A1 */ SOC_CHIP_BCM88950, \ + /* SOC_CHIP_BCM88953_A1 */ SOC_CHIP_BCM88953, \ + /* SOC_CHIP_BCM88954_A1 */ SOC_CHIP_BCM88954, \ + /* SOC_CHIP_BCM88955_A1 */ SOC_CHIP_BCM88955, \ + /* SOC_CHIP_BCM88956_A1 */ SOC_CHIP_BCM88956, \ + /* SOC_CHIP_BCM88790_A0 */ SOC_CHIP_BCM8879X, \ + /* SOC_CHIP_BCM88790_B0 */ SOC_CHIP_BCM8879X, \ + SOC_CHIP_DNXF_TYPE_MAP_INIT_ADDITIONAL \ + /* SOC_CHIP_ACP */ SOC_CHIP_BCM88650ACP,\ + /* SOC_CHIP_BCM53400_A0 */ SOC_CHIP_BCM53400, \ + /* SOC_CHIP_BCM56160_A0 */ SOC_CHIP_BCM56160, \ + /* SOC_CHIP_BCM53570_A0 */ SOC_CHIP_BCM53570, \ + /* SOC_CHIP_BCM53570_B0 */ SOC_CHIP_BCM53570, \ + /* SOC_CHIP_BCM88772_A1 */ SOC_CHIP_BCM88772, \ + /* SOC_CHIP_BCM88952_A0 */ SOC_CHIP_BCM88952, \ + /* SOC_CHIP_BCM88952_A1 */ SOC_CHIP_BCM88952, \ + /* SOC_CHIP_BCM56965_A0, */ SOC_CHIP_BCM56965, \ + /* SOC_CHIP_BCM56965_A1, */ SOC_CHIP_BCM56965, \ + /* SOC_CHIP_BCM53540_A0, */ SOC_CHIP_BCM53540, \ + /* SOC_CHIP_BCM56070_A0, */ SOC_CHIP_BCM56070, + + + +#if defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT) +#define SOC_CHIP_TYPE_MAP_LTSW_INIT \ + /* SOC_CHIP_LTSW, */ SOC_CHIP_LTSW_GRP, +#endif + +#ifdef BCM_DNX3_SUPPORT +#define SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL "BCM88860_A0", \ + "BCM88870_A0", +#else +#define SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL +#endif +#define SOC_CHIP_DNX_TYPE_NAMES_INIT_ADDITIONAL +#ifdef BCM_DNXF3_SUPPORT +#define SOC_CHIP_DNXF_TYPE_NAMES_INIT_ADDITIONAL "BCM88920_A0", +#else +#define SOC_CHIP_DNXF_TYPE_NAMES_INIT_ADDITIONAL +#endif +#define SOC_CHIP_TYPE_NAMES_INIT \ + "BCM5670_A0", \ + "BCM5673_A0", \ + "BCM5690_A0", \ + "BCM5665_A0", \ + "BCM5695_A0", \ + "BCM5675_A0", \ + "BCM5674_A0", \ + "BCM5665_B0", \ + "BCM56601_A0", \ + "BCM56601_B0", \ + "BCM56601_C0", \ + "BCM56602_A0", \ + "BCM56602_B0", \ + "BCM56602_C0", \ + "BCM56504_A0", \ + "BCM56504_B0", \ + "BCM56102_A0", \ + "BCM56304_B0", \ + "BCM56112_A0", \ + "BCM56314_A0", \ + "BCM5650_C0", \ + "BCM56800_A0", \ + "BCM56218_A0", \ + "BCM56514_A0", \ + "BCM56624_A0", \ + "BCM56624_B0", \ + "BCM56680_A0", \ + "BCM56680_B0", \ + "BCM56224_A0", \ + "BCM56224_B0", \ + "BCM53314_A0", \ + "BCM53324_A0", \ + "BCM56725_A0", \ + "BCM56820_A0", \ + "BCM56634_A0", \ + "BCM56634_B0", \ + "BCM56524_A0", \ + "BCM56524_B0", \ + "BCM56685_A0", \ + "BCM56685_B0", \ + "BCM56334_A0", \ + "BCM56334_B0", \ + "BCM56840_A0", \ + "BCM56840_B0", \ + "BCM56850_A0", \ + "BCM56960_A0", \ + "BCM56980_A0", \ + "BCM56980_B0", \ + "BCM56870_A0", \ + "BCM56873_A0", \ + "BCM56275_A0", \ + "BCM56370_A0", \ + "BCM56470_A0", \ + "BCM56770_A0", \ + "BCM56771_A0", \ + "BCM56970_A0", \ + "BCM56142_A0", \ + "BCM56150_A0", \ + "BCM88660_A0", \ + "BCM88675_A0", \ + "BCM88675_B0", \ + "BCM88375_A0", \ + "BCM88375_B0", \ + "BCM88680_A0", \ + "BCM88690_A0", \ + "BCM88690_B0", \ + "BCM88800_A0", \ + "BCM88800_A1", \ + "BCM88850_A0", \ + "BCM88830_A0", \ + SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL \ + SOC_CHIP_DNX_TYPE_NAMES_INIT_ADDITIONAL \ + "BCM88480_A0", \ + "BCM88480_B0", \ + "BCM88480_B1", \ + "BCM88470_A0", \ + "BCM88470_B0", \ + "BCM88270_A0", \ + "BCM56640_A0", \ + "BCM56640_B0", \ + "BCM56340_A0", \ + "BCM56440_A0", \ + "BCM56440_B0", \ + "BCM56450_A0", \ + "BCM56450_B0", \ + "BCM56450_B1", \ + "BCM56260_A0", \ + "BCM56260_B0", \ + "BCM56270_A0", \ + "BCM56860_A0", \ + "BCM56560_A0", \ + "BCM56560_B0", \ + "BCM56670_A0", \ + "BCM56670_B0", \ + "BCM56670_C0", \ + "BCM53650_A0", \ + "BCM88770_A1", \ + "BCM88773_A1", \ + "BCM88774_A1", \ + "BCM88775_A1", \ + "BCM88776_A1", \ + "BCM88950_A0", \ + "BCM88950_A1", \ + "BCM88953_A1", \ + "BCM88954_A1", \ + "BCM88955_A1", \ + "BCM88956_A1", \ + "BCM88790_A0", \ + "BCM88790_B0", \ + SOC_CHIP_DNXF_TYPE_NAMES_INIT_ADDITIONAL \ + "ACP", \ + "BCM53400_A0", \ + "BCM56160_A0", \ + "BCM53570_A0", \ + "BCM53570_B0", \ + "BCM88772_A1", \ + "BCM88952_A0", \ + "BCM88952_A1", \ + "BCM56965_A0", \ + "BCM56965_A1", \ + "BCM53540_A0", \ + "BCM56070_A0", + + + + +#if defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT) +#define SOC_CHIP_TYPE_NAMES_LTSW_INIT \ + "LTSW", +#endif + +typedef enum soc_chip_groups_e { + /* Chip names w/o revision */ + SOC_CHIP_BCM5670, + SOC_CHIP_BCM5673, + SOC_CHIP_BCM5690, + SOC_CHIP_BCM5665, + SOC_CHIP_BCM5695, + SOC_CHIP_BCM5675, + SOC_CHIP_BCM5674, + SOC_CHIP_BCM56601, + SOC_CHIP_BCM56602, + SOC_CHIP_BCM56504, + SOC_CHIP_BCM56102, + SOC_CHIP_BCM56304, + SOC_CHIP_BCM5650, + SOC_CHIP_BCM56800, + SOC_CHIP_BCM56218, + SOC_CHIP_BCM56112, + SOC_CHIP_BCM56314, + SOC_CHIP_BCM56514, + SOC_CHIP_BCM56624, + SOC_CHIP_BCM56680, + SOC_CHIP_BCM56224, + SOC_CHIP_BCM53314, + SOC_CHIP_BCM56725, + SOC_CHIP_BCM56820, + SOC_CHIP_BCM56634, + SOC_CHIP_BCM56524, + SOC_CHIP_BCM56685, + SOC_CHIP_BCM56334, + SOC_CHIP_BCM56840, + SOC_CHIP_BCM56850, + SOC_CHIP_BCM56960, + SOC_CHIP_BCM56980, + SOC_CHIP_BCM56870, + SOC_CHIP_BCM56275, + SOC_CHIP_BCM56370, + SOC_CHIP_BCM56470, + SOC_CHIP_BCM56770, + SOC_CHIP_BCM56970, + SOC_CHIP_BCM56142, + SOC_CHIP_BCM56150, + SOC_CHIP_BCM88660, + SOC_CHIP_BCM88675, + SOC_CHIP_BCM88680, + SOC_CHIP_BCM8869X, + SOC_CHIP_BCM8880X, + SOC_CHIP_BCM8885X, + SOC_CHIP_BCM8883X, +#ifdef BCM_DNX3_SUPPORT + SOC_CHIP_BCM8886X, + SOC_CHIP_BCM8887X, +#endif + SOC_CHIP_BCM8848X, + SOC_CHIP_BCM88375, + SOC_CHIP_BCM88470, + SOC_CHIP_BCM88270, + SOC_CHIP_BCM56640, + SOC_CHIP_BCM56340, + SOC_CHIP_BCM56440, + SOC_CHIP_BCM56450, + SOC_CHIP_BCM56260, + SOC_CHIP_BCM56270, + SOC_CHIP_BCM56860, + SOC_CHIP_BCM56560, + SOC_CHIP_BCM56670, + SOC_CHIP_BCM53650, + SOC_CHIP_BCM88770, + SOC_CHIP_BCM88773, + SOC_CHIP_BCM88774, + SOC_CHIP_BCM88775, + SOC_CHIP_BCM88776, + SOC_CHIP_BCM88950, + SOC_CHIP_BCM88953, + SOC_CHIP_BCM88954, + SOC_CHIP_BCM88955, + SOC_CHIP_BCM88956, + SOC_CHIP_BCM8879X, +#ifdef BCM_DNXF3_SUPPORT + SOC_CHIP_BCM8892X, +#endif + SOC_CHIP_BCM88650ACP, + SOC_CHIP_BCM53400, + SOC_CHIP_BCM56160, + SOC_CHIP_BCM53570, + SOC_CHIP_BCM88772, + SOC_CHIP_BCM88952, + SOC_CHIP_BCM56965, + SOC_CHIP_BCM53540, + SOC_CHIP_BCM56070, +#if defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT) + SOC_CHIP_LTSW_GRP, +#endif + SOC_CHIP_GROUPS_COUNT +} soc_chip_groups_t; + +#ifdef BCM_DNX3_SUPPORT +#define SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL "BCM8886X", \ + "BCM8887X", +#else +#define SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL +#endif +#define SOC_CHIP_DNX_GROUP_NAMES_INIT_ADDITIONAL +#ifdef BCM_DNXF3_SUPPORT +#define SOC_CHIP_DNXF_GROUP_NAMES_INIT_ADDITIONAL "BCM8892X", +#else +#define SOC_CHIP_DNXF_GROUP_NAMES_INIT_ADDITIONAL +#endif +#define SOC_CHIP_GROUP_NAMES_INIT \ + "BCM5670", \ + "BCM5673", \ + "BCM5690", \ + "BCM5665", \ + "BCM5695", \ + "BCM5675", \ + "BCM5674", \ + "BCM56601", \ + "BCM56602", \ + "BCM56504", \ + "BCM56102", \ + "BCM56304", \ + "BCM5650", \ + "BCM56800", \ + "BCM56218", \ + "BCM56112", \ + "BCM56314", \ + "BCM56514", \ + "BCM56624", \ + "BCM56680", \ + "BCM56224", \ + "BCM53314", \ + "BCM56725", \ + "BCM56820", \ + "BCM56634", \ + "BCM56524", \ + "BCM56685", \ + "BCM56334", \ + "BCM56840", \ + "BCM56850", \ + "BCM56960", \ + "BCM56980", \ + "BCM56870", \ + "BCM56275", \ + "BCM56370", \ + "BCM56470", \ + "BCM56770", \ + "BCM56970", \ + "BCM56142", \ + "BCM56150", \ + "BCM88660", \ + "BCM88675", \ + "BCM88680", \ + "BCM8869X", \ + "BCM8880X", \ + "BCM8885X", \ + "BCM8883X", \ + SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL \ + SOC_CHIP_DNX_GROUP_NAMES_INIT_ADDITIONAL \ + "BCM8848X", \ + "BCM88375", \ + "BCM88470", \ + "BCM88270", \ + "BCM56640", \ + "BCM56340", \ + "BCM56440", \ + "BCM56450", \ + "BCM56260", \ + "BCM56270", \ + "BCM56860", \ + "BCM56560", \ + "BCM56670", \ + "BCM53650", \ + "BCM88770", \ + "BCM88773", \ + "BCM88774", \ + "BCM88775", \ + "BCM88776", \ + "BCM88950", \ + "BCM88953", \ + "BCM88954", \ + "BCM88955", \ + "BCM88956", \ + "BCM8879X", \ + SOC_CHIP_DNXF_GROUP_NAMES_INIT_ADDITIONAL \ + "SOC_CHIP_BCM88650ACP", \ + "BCM53400", \ + "BCM56160", \ + "BCM53570", \ + "BCM88772", \ + "BCM88952", \ + "BCM56965", \ + "BCM53540", \ + "BCM56070", + +#if defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT) +#define SOC_CHIP_GROUP_NAMES_LTSW_INIT \ + "LTSW", +#endif + +#if defined(BCM_TRIUMPH2_SUPPORT) || defined(BCM_TRIDENT_SUPPORT) +#define SER_TR_TEST_SUPPORT +#endif + +/* + * If you add anything here, check soc/common.c for arrays + * indexed by soc_regtype_t. + */ +typedef enum soc_regtype_t { + soc_schan_reg, /* Generic register read thru SCHAN */ + soc_genreg, /* General soc registers */ + soc_portreg, /* Port soc registers */ + soc_ppportreg, /* Packet-Processing-Port soc registers */ + soc_cosreg, /* COS soc registers */ + soc_pipereg, /* per pipe soc registers */ + soc_xpereg, /* per XPE soc registers */ + soc_slicereg, /* per slice soc registers */ + soc_layerreg, /* per layer soc registers */ + soc_itmreg, /* per layer soc registers */ + soc_ebreg, /* per layer soc registers */ + soc_cpureg, /* AKA PCI memory */ + soc_pci_cfg_reg, /* PCI configuration space register */ + soc_phy_reg, /* PHY register, access thru mii */ + soc_spi_reg, /* SPI relevant Registers*/ + soc_mcsreg, /* Microcontroller Subsystem - Indirect Access */ + soc_iprocreg, /* iProc Reg in AXI Address Space */ + soc_hostmem_w, /* word */ + soc_hostmem_h, /* half word */ + soc_hostmem_b, /* byte */ + soc_customreg, /* Custom Register */ + soc_invalidreg +} soc_regtype_t; + +#if defined(BCM_JERICHO_SUPPORT) || defined(BCM_SABER2_SUPPORT) || defined(BCM_QAX_SUPPORT) || defined(BCM_QUX_SUPPORT) +#define BCM_SAT_SUPPORT +#endif + +#if defined(BCM_QAX_SUPPORT) || defined(BCM_QUX_SUPPORT) +#define BCM_LB_SUPPORT +#endif + +/* All chips which builds on the Triumph baseline require SER support */ +#ifdef BCM_TRIUMPH_SUPPORT +#define BCM_SER_SUPPORT +#endif + +/* Current SER implementation relies on memscan thread */ +#ifdef BCM_SER_SUPPORT +#ifndef INCLUDE_MEM_SCAN +#define INCLUDE_MEM_SCAN +#endif +#endif + +#if defined(BCM_TRIDENT2_SUPPORT) +#define BCM_SRAM_SCAN_SUPPORT +#endif +#endif /* !_SOC_DEFS_H */ + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h new file mode 100644 index 000000000000..4db0a7076ecf --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h @@ -0,0 +1,2149 @@ +/* + * $Id:$ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + */ + +#ifndef _SOC_DEVIDS_H +#define _SOC_DEVIDS_H + + +#define BROADCOM_VENDOR_ID 0x14e4 + +#define BCM5690_DEVICE_ID 0x5690 +#define BCM5690_A0_REV_ID 1 +#define BCM5690_A1_REV_ID 2 +#define BCM5690_A2_REV_ID 3 + +#define BCM5691_DEVICE_ID 0x5691 +#define BCM5691_A0_REV_ID 1 +#define BCM5691_A1_REV_ID 2 +#define BCM5691_A2_REV_ID 3 + +#define BCM5692_DEVICE_ID 0x5692 +#define BCM5692_A0_REV_ID 1 +#define BCM5692_A1_REV_ID 2 +#define BCM5692_A2_REV_ID 3 + +#define BCM5693_DEVICE_ID 0x5693 +#define BCM5693_A0_REV_ID 1 +#define BCM5693_A1_REV_ID 2 +#define BCM5693_A2_REV_ID 3 + +#define BCM5695_DEVICE_ID 0x5695 +#define BCM5695_A0_REV_ID 1 +#define BCM5695_A1_REV_ID 2 +#define BCM5695_B0_REV_ID 0x11 + +#define BCM5696_DEVICE_ID 0x5696 +#define BCM5696_A0_REV_ID 1 +#define BCM5696_A1_REV_ID 2 +#define BCM5696_B0_REV_ID 0x11 + +#define BCM5697_DEVICE_ID 0x5697 +#define BCM5697_A0_REV_ID 1 +#define BCM5697_A1_REV_ID 2 +#define BCM5697_B0_REV_ID 0x11 + +#define BCM5698_DEVICE_ID 0x5698 +#define BCM5698_A0_REV_ID 1 +#define BCM5698_A1_REV_ID 2 +#define BCM5698_B0_REV_ID 0x11 + +#define BCM5670_DEVICE_ID 0x5670 +#define BCM5670_A0_REV_ID 1 +#define BCM5670_A1_REV_ID 2 + +#define BCM5671_DEVICE_ID 0x5671 +#define BCM5671_A0_REV_ID 1 +#define BCM5671_A1_REV_ID 2 +#define BCM5671_A2_REV_ID 3 + +#define BCM5675_DEVICE_ID 0x5675 +#define BCM5675_A0_REV_ID 1 +#define BCM5675_A1_REV_ID 2 + +#define BCM5676_DEVICE_ID 0x5676 +#define BCM5676_A0_REV_ID 1 +#define BCM5676_A1_REV_ID 2 + +#define BCM5673_DEVICE_ID 0x5673 +#define BCM5673_A0_REV_ID 1 +#define BCM5673_A1_REV_ID 2 +#define BCM5673_A2_REV_ID 3 + +#define BCM5674_DEVICE_ID 0x5674 +#define BCM5674_A0_REV_ID 1 + +#define BCM56100_DEVICE_ID 0xb100 +#define BCM56100_A0_REV_ID 1 +#define BCM56100_A1_REV_ID 2 +#define BCM56101_DEVICE_ID 0xb101 +#define BCM56101_A0_REV_ID 1 +#define BCM56101_A1_REV_ID 2 +#define BCM56102_DEVICE_ID 0xb102 +#define BCM56102_A0_REV_ID 1 +#define BCM56102_A1_REV_ID 2 +#define BCM56105_DEVICE_ID 0xb105 +#define BCM56105_A0_REV_ID 1 +#define BCM56105_A1_REV_ID 2 +#define BCM56106_DEVICE_ID 0xb106 +#define BCM56106_A0_REV_ID 1 +#define BCM56106_A1_REV_ID 2 +#define BCM56107_DEVICE_ID 0xb107 +#define BCM56107_A0_REV_ID 1 +#define BCM56107_A1_REV_ID 2 + +#define BCM56110_DEVICE_ID 0xb110 +#define BCM56110_A0_REV_ID 1 +#define BCM56111_DEVICE_ID 0xb111 +#define BCM56111_A0_REV_ID 1 +#define BCM56112_DEVICE_ID 0xb112 +#define BCM56112_A0_REV_ID 1 +#define BCM56115_DEVICE_ID 0xb115 +#define BCM56115_A0_REV_ID 1 +#define BCM56116_DEVICE_ID 0xb116 +#define BCM56116_A0_REV_ID 1 +#define BCM56117_DEVICE_ID 0xb117 +#define BCM56117_A0_REV_ID 1 + +#define BCM56300_DEVICE_ID 0xb300 +#define BCM56300_A0_REV_ID 1 +#define BCM56300_A1_REV_ID 2 +#define BCM56300_B0_REV_ID 0x11 +#define BCM56300_B1_REV_ID 0x12 +#define BCM56301_DEVICE_ID 0xb301 +#define BCM56301_A0_REV_ID 1 +#define BCM56301_A1_REV_ID 2 +#define BCM56301_B0_REV_ID 0x11 +#define BCM56301_B1_REV_ID 0x12 +#define BCM56302_DEVICE_ID 0xb302 +#define BCM56302_A0_REV_ID 1 +#define BCM56302_A1_REV_ID 2 +#define BCM56302_B0_REV_ID 0x11 +#define BCM56302_B1_REV_ID 0x12 +#define BCM56303_DEVICE_ID 0xb303 +#define BCM56303_A1_REV_ID 2 +#define BCM56303_A0_REV_ID 1 +#define BCM56303_B0_REV_ID 0x11 +#define BCM56303_B1_REV_ID 0x12 +#define BCM56304_DEVICE_ID 0xb304 +#define BCM56304_A0_REV_ID 1 +#define BCM56304_A1_REV_ID 2 +#define BCM56304_B0_REV_ID 0x11 +#define BCM56304_B1_REV_ID 0x12 +#define BCM56404_DEVICE_ID 0xb404 +#define BCM56404_A0_REV_ID 1 +#define BCM56404_A1_REV_ID 2 +#define BCM56305_DEVICE_ID 0xb305 +#define BCM56305_A0_REV_ID 1 +#define BCM56305_A1_REV_ID 2 +#define BCM56305_B0_REV_ID 0x11 +#define BCM56305_B1_REV_ID 0x12 +#define BCM56306_DEVICE_ID 0xb306 +#define BCM56306_A0_REV_ID 1 +#define BCM56306_A1_REV_ID 2 +#define BCM56306_B0_REV_ID 0x11 +#define BCM56306_B1_REV_ID 0x12 +#define BCM56307_DEVICE_ID 0xb307 +#define BCM56307_A0_REV_ID 1 +#define BCM56307_A1_REV_ID 2 +#define BCM56307_B0_REV_ID 0x11 +#define BCM56307_B1_REV_ID 0x12 +#define BCM56308_DEVICE_ID 0xb308 +#define BCM56308_A0_REV_ID 1 +#define BCM56308_A1_REV_ID 2 +#define BCM56308_B0_REV_ID 0x11 +#define BCM56308_B1_REV_ID 0x12 +#define BCM56309_DEVICE_ID 0xb309 +#define BCM56309_A0_REV_ID 1 +#define BCM56309_A1_REV_ID 2 +#define BCM56309_B0_REV_ID 0x11 +#define BCM56309_B1_REV_ID 0x12 + +#define BCM56310_DEVICE_ID 0xb310 +#define BCM56310_A0_REV_ID 1 +#define BCM56311_DEVICE_ID 0xb311 +#define BCM56311_A0_REV_ID 1 +#define BCM56312_DEVICE_ID 0xb312 +#define BCM56312_A0_REV_ID 1 +#define BCM56313_DEVICE_ID 0xb313 +#define BCM56313_A0_REV_ID 1 +#define BCM56314_DEVICE_ID 0xb314 +#define BCM56314_A0_REV_ID 1 +#define BCM56315_DEVICE_ID 0xb315 +#define BCM56315_A0_REV_ID 1 +#define BCM56316_DEVICE_ID 0xb316 +#define BCM56316_A0_REV_ID 1 +#define BCM56317_DEVICE_ID 0xb317 +#define BCM56317_A0_REV_ID 1 +#define BCM56318_DEVICE_ID 0xb318 +#define BCM56318_A0_REV_ID 1 +#define BCM56319_DEVICE_ID 0xb319 +#define BCM56319_A0_REV_ID 1 + +#ifndef EXCLUDE_BCM56324 +#define BCM56322_DEVICE_ID 0xb322 +#define BCM56322_A0_REV_ID 1 +#define BCM56324_DEVICE_ID 0xb324 +#define BCM56324_A0_REV_ID 1 +#endif + +#define BCM53300_DEVICE_ID 0xb006 +#define BCM53300_A0_REV_ID 0x11 +#define BCM53300_A1_REV_ID 0x12 +#define BCM53301_DEVICE_ID 0xb206 +#define BCM53301_A0_REV_ID 0x11 +#define BCM53301_A1_REV_ID 0x12 +#define BCM53302_DEVICE_ID 0xb008 +#define BCM53302_A0_REV_ID 0x11 +#define BCM53302_A1_REV_ID 0x12 + +#define BCM56500_DEVICE_ID 0xb500 +#define BCM56500_A0_REV_ID 1 +#define BCM56500_A1_REV_ID 2 +#define BCM56500_B0_REV_ID 0x11 +#define BCM56500_B1_REV_ID 0x12 +#define BCM56500_B2_REV_ID 0x13 +#define BCM56501_DEVICE_ID 0xb501 +#define BCM56501_A0_REV_ID 1 +#define BCM56501_A1_REV_ID 2 +#define BCM56501_B0_REV_ID 0x11 +#define BCM56501_B1_REV_ID 0x12 +#define BCM56501_B2_REV_ID 0x13 +#define BCM56502_DEVICE_ID 0xb502 +#define BCM56502_A0_REV_ID 1 +#define BCM56502_A1_REV_ID 2 +#define BCM56502_B0_REV_ID 0x11 +#define BCM56502_B1_REV_ID 0x12 +#define BCM56502_B2_REV_ID 0x13 +#define BCM56503_DEVICE_ID 0xb503 +#define BCM56503_A0_REV_ID 1 +#define BCM56503_A1_REV_ID 2 +#define BCM56503_B0_REV_ID 0x11 +#define BCM56503_B1_REV_ID 0x12 +#define BCM56503_B2_REV_ID 0x13 +#define BCM56504_DEVICE_ID 0xb504 +#define BCM56504_A0_REV_ID 1 +#define BCM56504_A1_REV_ID 2 +#define BCM56504_B0_REV_ID 0x11 +#define BCM56504_B1_REV_ID 0x12 +#define BCM56504_B2_REV_ID 0x13 +#define BCM56505_DEVICE_ID 0xb505 +#define BCM56505_A0_REV_ID 1 +#define BCM56505_A1_REV_ID 2 +#define BCM56505_B0_REV_ID 0x11 +#define BCM56505_B1_REV_ID 0x12 +#define BCM56505_B2_REV_ID 0x13 +#define BCM56506_DEVICE_ID 0xb506 +#define BCM56506_A0_REV_ID 1 +#define BCM56506_A1_REV_ID 2 +#define BCM56506_B0_REV_ID 0x11 +#define BCM56506_B1_REV_ID 0x12 +#define BCM56506_B2_REV_ID 0x13 +#define BCM56507_DEVICE_ID 0xb507 +#define BCM56507_A0_REV_ID 1 +#define BCM56507_A1_REV_ID 2 +#define BCM56507_B0_REV_ID 0x11 +#define BCM56507_B1_REV_ID 0x12 +#define BCM56507_B2_REV_ID 0x13 +#define BCM56508_DEVICE_ID 0xb508 +#define BCM56508_A0_REV_ID 1 +#define BCM56508_A1_REV_ID 2 +#define BCM56508_B0_REV_ID 0x11 +#define BCM56508_B1_REV_ID 0x12 +#define BCM56508_B2_REV_ID 0x13 +#define BCM56509_DEVICE_ID 0xb509 +#define BCM56509_A0_REV_ID 1 +#define BCM56509_A1_REV_ID 2 +#define BCM56509_B0_REV_ID 0x11 +#define BCM56509_B1_REV_ID 0x12 +#define BCM56509_B2_REV_ID 0x13 + +#define BCM56600_DEVICE_ID 0xb600 +#define BCM56600_A0_REV_ID 1 +#define BCM56600_B0_REV_ID 0x11 +#define BCM56600_C0_REV_ID 0x21 +#define BCM56601_DEVICE_ID 0xb601 +#define BCM56601_A0_REV_ID 1 +#define BCM56601_B0_REV_ID 0x11 +#define BCM56601_C0_REV_ID 0x21 +#define BCM56602_DEVICE_ID 0xb602 +#define BCM56602_A0_REV_ID 1 +#define BCM56602_B0_REV_ID 0x11 +#define BCM56602_C0_REV_ID 0x21 +#define BCM56603_DEVICE_ID 0xb603 +#define BCM56603_A0_REV_ID 1 +#define BCM56603_B0_REV_ID 0x11 +#define BCM56603_C0_REV_ID 0x21 +#define BCM56605_DEVICE_ID 0xb605 +#define BCM56605_A0_REV_ID 1 +#define BCM56605_B0_REV_ID 0x11 +#define BCM56605_C0_REV_ID 0x21 +#define BCM56606_DEVICE_ID 0xb606 +#define BCM56606_A0_REV_ID 1 +#define BCM56606_B0_REV_ID 0x11 +#define BCM56606_C0_REV_ID 0x21 +#define BCM56607_DEVICE_ID 0xb607 +#define BCM56607_A0_REV_ID 1 +#define BCM56607_B0_REV_ID 0x11 +#define BCM56607_C0_REV_ID 0x21 +#define BCM56608_DEVICE_ID 0xb608 +#define BCM56608_A0_REV_ID 1 +#define BCM56608_B0_REV_ID 0x11 +#define BCM56608_C0_REV_ID 0x21 + +#define BCM56580_DEVICE_ID 0xb580 +#define BCM56580_A0_REV_ID 1 + +#define BCM56700_DEVICE_ID 0xb700 +#define BCM56700_A0_REV_ID 1 +#define BCM56701_DEVICE_ID 0xb701 +#define BCM56701_A0_REV_ID 1 + +#define BCM56800_DEVICE_ID 0xb800 +#define BCM56800_A0_REV_ID 1 +#define BCM56801_DEVICE_ID 0xb801 +#define BCM56801_A0_REV_ID 1 +#define BCM56802_DEVICE_ID 0xb802 +#define BCM56802_A0_REV_ID 1 +#define BCM56803_DEVICE_ID 0xb803 +#define BCM56803_A0_REV_ID 1 + +#define BCM56224_DEVICE_ID 0xb224 +#define BCM56224_A0_REV_ID 1 +#define BCM56224_B0_REV_ID 0x11 +#define BCM56225_DEVICE_ID 0xb225 +#define BCM56225_A0_REV_ID 1 +#define BCM56225_B0_REV_ID 0x11 +#define BCM56226_DEVICE_ID 0xb226 +#define BCM56226_A0_REV_ID 1 +#define BCM56226_B0_REV_ID 0x11 +#define BCM56227_DEVICE_ID 0xb227 +#define BCM56227_A0_REV_ID 1 +#define BCM56227_B0_REV_ID 0x11 +#define BCM56228_DEVICE_ID 0xb228 +#define BCM56228_A0_REV_ID 1 +#define BCM56228_B0_REV_ID 0x11 +#define BCM56229_DEVICE_ID 0xb229 +#define BCM56229_A0_REV_ID 1 +#define BCM56229_B0_REV_ID 0x11 +#define BCM56024_DEVICE_ID 0xb024 +#define BCM56024_A0_REV_ID 1 +#define BCM56024_B0_REV_ID 0x11 +#define BCM56025_DEVICE_ID 0xb025 +#define BCM56025_A0_REV_ID 1 +#define BCM56025_B0_REV_ID 0x11 +#define BCM53724_DEVICE_ID 0xc724 +#define BCM53724_A0_REV_ID 1 +#define BCM53724_B0_REV_ID 0x11 +#define BCM53726_DEVICE_ID 0xc726 +#define BCM53726_A0_REV_ID 1 +#define BCM53726_B0_REV_ID 0x11 + +#define BCM53312_DEVICE_ID 0xc312 +#define BCM53312_A0_REV_ID 1 +#define BCM53312_B0_REV_ID 0x11 +#define BCM53313_DEVICE_ID 0xc313 +#define BCM53313_A0_REV_ID 1 +#define BCM53313_B0_REV_ID 0x11 +#define BCM53314_DEVICE_ID 0xc314 +#define BCM53314_A0_REV_ID 1 +#define BCM53314_B0_REV_ID 0x11 + +#define BCM53322_DEVICE_ID 0xc322 +#define BCM53322_A0_REV_ID 1 +#define BCM53323_DEVICE_ID 0xc323 +#define BCM53323_A0_REV_ID 1 +#define BCM53324_DEVICE_ID 0xc324 +#define BCM53324_A0_REV_ID 1 + + +#define BCM56218_DEVICE_ID 0xB218 +#define BCM56218_A0_REV_ID 1 +#define BCM56218_A1_REV_ID 2 +#define BCM56218_A2_REV_ID 3 +#define BCM56218X_DEVICE_ID 0xc710 +#define BCM56218X_A0_REV_ID 1 +#define BCM56218X_A1_REV_ID 2 +#define BCM56218X_A2_REV_ID 3 +#define BCM56219_DEVICE_ID 0xB219 +#define BCM56219_A0_REV_ID 1 +#define BCM56219_A1_REV_ID 2 +#define BCM56219_A2_REV_ID 3 +#define BCM56218R_DEVICE_ID 0xB21A +#define BCM56218R_A0_REV_ID 1 +#define BCM56218R_A1_REV_ID 2 +#define BCM56218R_A2_REV_ID 3 +#define BCM56219R_DEVICE_ID 0xB21B +#define BCM56219R_A0_REV_ID 1 +#define BCM56219R_A1_REV_ID 2 +#define BCM56219R_A2_REV_ID 3 +#define BCM56214_DEVICE_ID 0xB214 +#define BCM56214_A0_REV_ID 1 +#define BCM56214_A1_REV_ID 2 +#define BCM56214_A2_REV_ID 3 +#define BCM56215_DEVICE_ID 0xB215 +#define BCM56215_A0_REV_ID 1 +#define BCM56215_A1_REV_ID 2 +#define BCM56215_A2_REV_ID 3 +#define BCM56214R_DEVICE_ID 0xB21C +#define BCM56214R_A0_REV_ID 1 +#define BCM56214R_A1_REV_ID 2 +#define BCM56214R_A2_REV_ID 3 +#define BCM56215R_DEVICE_ID 0xB21D +#define BCM56215R_A0_REV_ID 1 +#define BCM56215R_A1_REV_ID 2 +#define BCM56215R_A2_REV_ID 3 +#define BCM56216_DEVICE_ID 0xB216 +#define BCM56216_A0_REV_ID 1 +#define BCM56216_A1_REV_ID 2 +#define BCM56216_A2_REV_ID 3 +#define BCM56217_DEVICE_ID 0xB217 +#define BCM56217_A0_REV_ID 1 +#define BCM56217_A1_REV_ID 2 +#define BCM56217_A2_REV_ID 3 +#define BCM56212_DEVICE_ID 0xB212 +#define BCM56212_A0_REV_ID 1 +#define BCM56212_A1_REV_ID 2 +#define BCM56212_A2_REV_ID 3 +#define BCM56213_DEVICE_ID 0xB213 +#define BCM56213_A0_REV_ID 1 +#define BCM56213_A1_REV_ID 2 +#define BCM56213_A2_REV_ID 3 +#define BCM53718_DEVICE_ID 0xC71A +#define BCM53718_A0_REV_ID 1 +#define BCM53718_A1_REV_ID 2 +#define BCM53718_A2_REV_ID 3 +#define BCM53714_DEVICE_ID 0xC71B +#define BCM53714_A0_REV_ID 1 +#define BCM53714_A1_REV_ID 2 +#define BCM53714_A2_REV_ID 3 +#define BCM53716_DEVICE_ID 0xC716 +#define BCM53716_A0_REV_ID 1 +#define BCM53716_A1_REV_ID 2 +#define BCM53716_A2_REV_ID 3 +#define BCM56018_DEVICE_ID 0xB018 +#define BCM56018_A0_REV_ID 1 +#define BCM56018_A1_REV_ID 2 +#define BCM56018_A2_REV_ID 3 +#define BCM56014_DEVICE_ID 0xB014 +#define BCM56014_A0_REV_ID 1 +#define BCM56014_A1_REV_ID 2 +#define BCM56014_A2_REV_ID 3 + +#define BCM56510_DEVICE_ID 0xb510 +#define BCM56510_A0_REV_ID 1 +#define BCM56511_DEVICE_ID 0xb511 +#define BCM56511_A0_REV_ID 1 +#define BCM56512_DEVICE_ID 0xb512 +#define BCM56512_A0_REV_ID 1 +#define BCM56513_DEVICE_ID 0xb513 +#define BCM56513_A0_REV_ID 1 +#define BCM56514_DEVICE_ID 0xb514 +#define BCM56514_A0_REV_ID 1 +#define BCM56516_DEVICE_ID 0xb516 +#define BCM56516_A0_REV_ID 1 +#define BCM56517_DEVICE_ID 0xb517 +#define BCM56517_A0_REV_ID 1 +#define BCM56518_DEVICE_ID 0xb518 +#define BCM56518_A0_REV_ID 1 +#define BCM56519_DEVICE_ID 0xb519 +#define BCM56519_A0_REV_ID 1 + +#define BCM56620_DEVICE_ID 0xb620 +#define BCM56620_A0_REV_ID 1 +#define BCM56620_A1_REV_ID 2 +#define BCM56620_B0_REV_ID 0x11 +#define BCM56620_B1_REV_ID 0x12 +#define BCM56620_B2_REV_ID 0x13 +#define BCM56624_DEVICE_ID 0xb624 +#define BCM56624_A0_REV_ID 1 +#define BCM56624_A1_REV_ID 2 +#define BCM56624_B0_REV_ID 0x11 +#define BCM56624_B1_REV_ID 0x12 +#define BCM56624_B2_REV_ID 0x13 +#define BCM56626_DEVICE_ID 0xb626 +#define BCM56626_A0_REV_ID 1 +#define BCM56626_A1_REV_ID 2 +#define BCM56626_B0_REV_ID 0x11 +#define BCM56626_B1_REV_ID 0x12 +#define BCM56626_B2_REV_ID 0x13 +#define BCM56628_DEVICE_ID 0xb628 +#define BCM56628_A0_REV_ID 1 +#define BCM56628_A1_REV_ID 2 +#define BCM56628_B0_REV_ID 0x11 +#define BCM56628_B1_REV_ID 0x12 +#define BCM56628_B2_REV_ID 0x13 +#define BCM56629_DEVICE_ID 0xb629 +#define BCM56629_A0_REV_ID 1 +#define BCM56629_A1_REV_ID 2 +#define BCM56629_B0_REV_ID 0x11 +#define BCM56629_B1_REV_ID 0x12 +#define BCM56629_B2_REV_ID 0x13 + +#define BCM56680_DEVICE_ID 0xb680 +#define BCM56680_A0_REV_ID 1 +#define BCM56680_A1_REV_ID 2 +#define BCM56680_B0_REV_ID 0x11 +#define BCM56680_B1_REV_ID 0x12 +#define BCM56680_B2_REV_ID 0x13 +#define BCM56684_DEVICE_ID 0xb684 +#define BCM56684_A0_REV_ID 1 +#define BCM56684_A1_REV_ID 2 +#define BCM56684_B0_REV_ID 0x11 +#define BCM56684_B1_REV_ID 0x12 +#define BCM56684_B2_REV_ID 0x13 +#define BCM56686_DEVICE_ID 0xb686 +#define BCM56686_B0_REV_ID 0x11 +#define BCM56686_B1_REV_ID 0x12 +#define BCM56686_B2_REV_ID 0x13 + +#define BCM56820_DEVICE_ID 0xb820 +#define BCM56820_A0_REV_ID 1 +#define BCM56820_B0_REV_ID 0x11 +#define BCM56821_DEVICE_ID 0xb821 +#define BCM56821_A0_REV_ID 1 +#define BCM56821_B0_REV_ID 0x11 +#define BCM56822_DEVICE_ID 0xb822 +#define BCM56822_A0_REV_ID 1 +#define BCM56822_B0_REV_ID 0x11 +#define BCM56823_DEVICE_ID 0xb823 +#define BCM56823_A0_REV_ID 1 +#define BCM56823_B0_REV_ID 0x11 +#define BCM56825_DEVICE_ID 0xb825 +#define BCM56825_B0_REV_ID 0x11 + +#define BCM56720_DEVICE_ID 0xb720 +#define BCM56720_A0_REV_ID 1 +#define BCM56720_B0_REV_ID 0x11 +#define BCM56721_DEVICE_ID 0xb721 +#define BCM56721_A0_REV_ID 1 +#define BCM56721_B0_REV_ID 0x11 + +#define BCM56725_DEVICE_ID 0xb725 +#define BCM56725_A0_REV_ID 1 +#define BCM56725_B0_REV_ID 0x11 + +#define BCM56630_DEVICE_ID 0xb630 +#define BCM56630_A0_REV_ID 1 +#define BCM56630_B0_REV_ID 0x11 +#define BCM56634_DEVICE_ID 0xb634 +#define BCM56634_A0_REV_ID 1 +#define BCM56634_B0_REV_ID 0x11 +#define BCM56636_DEVICE_ID 0xb636 +#define BCM56636_A0_REV_ID 1 +#define BCM56636_B0_REV_ID 0x11 +#define BCM56638_DEVICE_ID 0xb638 +#define BCM56638_A0_REV_ID 1 +#define BCM56638_B0_REV_ID 0x11 +#define BCM56639_DEVICE_ID 0xb639 +#define BCM56639_A0_REV_ID 1 +#define BCM56639_B0_REV_ID 0x11 + +#define BCM56685_DEVICE_ID 0xb685 +#define BCM56685_A0_REV_ID 1 +#define BCM56685_B0_REV_ID 0x11 +#define BCM56689_DEVICE_ID 0xb689 +#define BCM56689_A0_REV_ID 1 +#define BCM56689_B0_REV_ID 0x11 + +#define BCM56520_DEVICE_ID 0xb520 +#define BCM56520_A0_REV_ID 1 +#define BCM56520_B0_REV_ID 0x11 +#define BCM56521_DEVICE_ID 0xb521 +#define BCM56521_A0_REV_ID 1 +#define BCM56521_B0_REV_ID 0x11 +#define BCM56522_DEVICE_ID 0xb522 +#define BCM56522_A0_REV_ID 1 +#define BCM56522_B0_REV_ID 0x11 +#define BCM56524_DEVICE_ID 0xb524 +#define BCM56524_A0_REV_ID 1 +#define BCM56524_B0_REV_ID 0x11 +#define BCM56526_DEVICE_ID 0xb526 +#define BCM56526_A0_REV_ID 1 +#define BCM56526_B0_REV_ID 0x11 + +#define BCM56534_DEVICE_ID 0xb534 +#define BCM56534_B0_REV_ID 0x11 +#define BCM56538_DEVICE_ID 0xb538 +#define BCM56538_B0_REV_ID 0x11 + +#define BCM56331_DEVICE_ID 0xb331 +#define BCM56331_A0_REV_ID 1 +#define BCM56331_B0_REV_ID 0x11 +#define BCM56331_B1_REV_ID 0x12 +#define BCM56333_DEVICE_ID 0xb333 +#define BCM56333_A0_REV_ID 1 +#define BCM56333_B0_REV_ID 0x11 +#define BCM56333_B1_REV_ID 0x12 +#define BCM56334_DEVICE_ID 0xb334 +#define BCM56334_A0_REV_ID 1 +#define BCM56334_B0_REV_ID 0x11 +#define BCM56334_B1_REV_ID 0x12 +#define BCM56338_DEVICE_ID 0xb338 +#define BCM56338_A0_REV_ID 1 +#define BCM56338_B0_REV_ID 0x11 +#define BCM56338_B1_REV_ID 0x12 + +#define BCM56320_DEVICE_ID 0xb320 +#define BCM56320_A0_REV_ID 1 +#define BCM56320_B0_REV_ID 0x11 +#define BCM56320_B1_REV_ID 0x12 +#define BCM56321_DEVICE_ID 0xb321 +#define BCM56321_A0_REV_ID 1 +#define BCM56321_B0_REV_ID 0x11 +#define BCM56321_B1_REV_ID 0x12 + + +#define BCM56548H_DEVICE_ID 0xB54A +#define BCM56548H_A0_REV_ID 1 +#define BCM56548_DEVICE_ID 0xb548 +#define BCM56548_A0_REV_ID 1 +#define BCM56547_DEVICE_ID 0xb547 +#define BCM56547_A0_REV_ID 1 + +#define BCM56346_DEVICE_ID 0xb346 +#define BCM56346_A0_REV_ID 1 +#define BCM56345_DEVICE_ID 0xb345 +#define BCM56345_A0_REV_ID 1 +#define BCM56344_DEVICE_ID 0xb344 +#define BCM56344_A0_REV_ID 1 +#define BCM56342_DEVICE_ID 0xb342 +#define BCM56342_A0_REV_ID 1 +#define BCM56340_DEVICE_ID 0xb340 +#define BCM56340_A0_REV_ID 1 + +#define BCM56049_DEVICE_ID 0xb049 +#define BCM56049_A0_REV_ID 1 +#define BCM56048_DEVICE_ID 0xb048 +#define BCM56048_A0_REV_ID 1 +#define BCM56047_DEVICE_ID 0xb047 +#define BCM56047_A0_REV_ID 1 + +#define BCM56042_DEVICE_ID 0xb042 +#define BCM56042_A0_REV_ID 1 +#define BCM56041_DEVICE_ID 0xb041 +#define BCM56041_A0_REV_ID 1 +#define BCM56040_DEVICE_ID 0xb040 +#define BCM56040_A0_REV_ID 1 + +#define BCM56132_DEVICE_ID 0xb132 +#define BCM56132_A0_REV_ID 1 +#define BCM56132_B0_REV_ID 0x11 +#define BCM56132_B1_REV_ID 0x12 +#define BCM56134_DEVICE_ID 0xb134 +#define BCM56134_A0_REV_ID 1 +#define BCM56134_B0_REV_ID 0x11 +#define BCM56134_B1_REV_ID 0x12 + +#define BCM56230_DEVICE_ID 0xb230 +#define BCM56230_B1_REV_ID 0x12 +#define BCM56231_DEVICE_ID 0xb231 +#define BCM56231_B1_REV_ID 0x12 + +#define BCM56140_DEVICE_ID 0xb140 +#define BCM56140_A0_REV_ID 1 +#define BCM56142_DEVICE_ID 0xb142 +#define BCM56142_A0_REV_ID 1 +#define BCM56143_DEVICE_ID 0xb143 +#define BCM56143_A0_REV_ID 1 +#define BCM56144_DEVICE_ID 0xb144 +#define BCM56144_A0_REV_ID 1 +#define BCM56146_DEVICE_ID 0xb146 +#define BCM56146_A0_REV_ID 1 +#define BCM56147_DEVICE_ID 0xb147 +#define BCM56147_A0_REV_ID 1 +#define BCM56149_DEVICE_ID 0xb149 +#define BCM56149_A0_REV_ID 1 + +#define BCM56840_DEVICE_ID 0xb840 +#define BCM56840_A0_REV_ID 1 +#define BCM56840_A1_REV_ID 2 +#define BCM56840_A2_REV_ID 3 +#define BCM56840_A3_REV_ID 4 +#define BCM56840_A4_REV_ID 5 +#define BCM56840_B0_REV_ID 0x11 +#define BCM56840_B1_REV_ID 0x12 +#define BCM56841_DEVICE_ID 0xb841 +#define BCM56841_A0_REV_ID 1 +#define BCM56841_A1_REV_ID 2 +#define BCM56841_A2_REV_ID 3 +#define BCM56841_A3_REV_ID 4 +#define BCM56841_A4_REV_ID 5 +#define BCM56841_B0_REV_ID 0x11 +#define BCM56841_B1_REV_ID 0x12 +#define BCM56843_DEVICE_ID 0xb843 +#define BCM56843_A0_REV_ID 1 +#define BCM56843_A1_REV_ID 2 +#define BCM56843_A2_REV_ID 3 +#define BCM56843_A3_REV_ID 4 +#define BCM56843_A4_REV_ID 5 +#define BCM56843_B0_REV_ID 0x11 +#define BCM56843_B1_REV_ID 0x12 +#define BCM56845_DEVICE_ID 0xb845 +#define BCM56845_A0_REV_ID 1 +#define BCM56845_A1_REV_ID 2 +#define BCM56845_A2_REV_ID 3 +#define BCM56845_A3_REV_ID 4 +#define BCM56845_A4_REV_ID 5 +#define BCM56845_B0_REV_ID 0x11 +#define BCM56845_B1_REV_ID 0x12 + +#define BCM56743_DEVICE_ID 0xb743 +#define BCM56743_A0_REV_ID 1 +#define BCM56743_A1_REV_ID 2 +#define BCM56743_A2_REV_ID 3 +#define BCM56743_A3_REV_ID 4 +#define BCM56743_A4_REV_ID 5 +#define BCM56743_B0_REV_ID 0x11 +#define BCM56743_B1_REV_ID 0x12 +#define BCM56745_DEVICE_ID 0xb745 +#define BCM56745_A0_REV_ID 1 +#define BCM56745_A1_REV_ID 2 +#define BCM56745_A2_REV_ID 3 +#define BCM56745_A3_REV_ID 4 +#define BCM56745_A4_REV_ID 5 +#define BCM56745_B0_REV_ID 0x11 +#define BCM56745_B1_REV_ID 0x12 + +#define BCM56260_DEVICE_ID 0xb260 +#define BCM56260_A0_REV_ID 1 +#define BCM56260_B0_REV_ID 0x11 +#define BCM56261_DEVICE_ID 0xb261 +#define BCM56261_A0_REV_ID 1 +#define BCM56261_B0_REV_ID 0x11 +#define BCM56262_DEVICE_ID 0xb262 +#define BCM56262_A0_REV_ID 1 +#define BCM56262_B0_REV_ID 0x11 +#define BCM56263_DEVICE_ID 0xb263 +#define BCM56263_A0_REV_ID 1 +#define BCM56263_B0_REV_ID 0x11 + +#define BCM56265_DEVICE_ID 0xb265 +#define BCM56265_A0_REV_ID 1 +#define BCM56265_B0_REV_ID 0x11 +#define BCM56266_DEVICE_ID 0xb266 +#define BCM56266_A0_REV_ID 1 +#define BCM56266_B0_REV_ID 0x11 +#define BCM56267_DEVICE_ID 0xb267 +#define BCM56267_A0_REV_ID 1 +#define BCM56267_B0_REV_ID 0x11 +#define BCM56268_DEVICE_ID 0xb268 +#define BCM56268_A0_REV_ID 1 +#define BCM56268_B0_REV_ID 0x11 + +#define BCM56233_DEVICE_ID 0xb233 +#define BCM56233_B0_REV_ID 0x11 + +#define BCM56460_DEVICE_ID 0xb460 +#define BCM56460_A0_REV_ID 1 +#define BCM56460_B0_REV_ID 0x11 +#define BCM56461_DEVICE_ID 0xb461 +#define BCM56461_A0_REV_ID 1 +#define BCM56461_B0_REV_ID 0x11 +#define BCM56462_DEVICE_ID 0xb462 +#define BCM56462_A0_REV_ID 1 +#define BCM56462_B0_REV_ID 0x11 +#define BCM56463_DEVICE_ID 0xb463 +#define BCM56463_A0_REV_ID 1 +#define BCM56463_B0_REV_ID 0x11 + +#define BCM56465_DEVICE_ID 0xb465 +#define BCM56465_A0_REV_ID 1 +#define BCM56465_B0_REV_ID 0x11 +#define BCM56466_DEVICE_ID 0xb466 +#define BCM56466_A0_REV_ID 1 +#define BCM56466_B0_REV_ID 0x11 +#define BCM56467_DEVICE_ID 0xb467 +#define BCM56467_A0_REV_ID 1 +#define BCM56467_B0_REV_ID 0x11 +#define BCM56468_DEVICE_ID 0xb468 +#define BCM56468_A0_REV_ID 1 +#define BCM56468_B0_REV_ID 0x11 + +#define BCM56270_DEVICE_ID 0xb270 +#define BCM56270_A0_REV_ID 1 +#define BCM56271_DEVICE_ID 0xb271 +#define BCM56271_A0_REV_ID 1 +#define BCM56272_DEVICE_ID 0xb272 +#define BCM56272_A0_REV_ID 1 + +#define BCM53460_DEVICE_ID 0x8460 +#define BCM53460_A0_REV_ID 1 +#define BCM53461_DEVICE_ID 0x8461 +#define BCM53461_A0_REV_ID 1 + +#define BCM56842_DEVICE_ID 0xb842 +#define BCM56842_A0_REV_ID 1 +#define BCM56842_A1_REV_ID 2 +#define BCM56844_DEVICE_ID 0xb844 +#define BCM56844_A0_REV_ID 1 +#define BCM56844_A1_REV_ID 2 +#define BCM56846_DEVICE_ID 0xb846 +#define BCM56846_A0_REV_ID 1 +#define BCM56846_A1_REV_ID 2 +#define BCM56549_DEVICE_ID 0xb549 +#define BCM56549_A0_REV_ID 1 +#define BCM56549_A1_REV_ID 2 +#define BCM56053_DEVICE_ID 0xb053 +#define BCM56053_A0_REV_ID 1 +#define BCM56053_A1_REV_ID 2 +#define BCM56831_DEVICE_ID 0xb831 +#define BCM56831_A0_REV_ID 1 +#define BCM56831_A1_REV_ID 2 +#define BCM56835_DEVICE_ID 0xb835 +#define BCM56835_A0_REV_ID 1 +#define BCM56835_A1_REV_ID 2 +#define BCM56838_DEVICE_ID 0xb838 +#define BCM56838_A0_REV_ID 1 +#define BCM56838_A1_REV_ID 2 +#define BCM56847_DEVICE_ID 0xb847 +#define BCM56847_A0_REV_ID 1 +#define BCM56847_A1_REV_ID 2 +#define BCM56847_A2_REV_ID 3 +#define BCM56847_A3_REV_ID 4 +#define BCM56847_A4_REV_ID 5 +#define BCM56847_B0_REV_ID 0x11 +#define BCM56847_B1_REV_ID 0x12 +#define BCM56849_DEVICE_ID 0xb849 +#define BCM56849_A0_REV_ID 1 +#define BCM56849_A1_REV_ID 2 + +#define BCM56742_DEVICE_ID 0xb742 +#define BCM56742_A0_REV_ID 1 +#define BCM56742_A1_REV_ID 2 +#define BCM56742_A2_REV_ID 3 +#define BCM56744_DEVICE_ID 0xb744 +#define BCM56744_A0_REV_ID 1 +#define BCM56744_A1_REV_ID 2 +#define BCM56746_DEVICE_ID 0xb746 +#define BCM56746_A0_REV_ID 1 +#define BCM56746_A1_REV_ID 2 + + +#define BCM56640_DEVICE_ID 0xb640 +#define BCM56640_A0_REV_ID 1 +#define BCM56640_A1_REV_ID 2 +#define BCM56640_B0_REV_ID 0x11 +#define BCM56643_DEVICE_ID 0xb643 +#define BCM56643_A0_REV_ID 1 +#define BCM56643_A1_REV_ID 2 +#define BCM56643_B0_REV_ID 0x11 +#define BCM56644_DEVICE_ID 0xb644 +#define BCM56644_A0_REV_ID 1 +#define BCM56644_A1_REV_ID 2 +#define BCM56644_B0_REV_ID 0x11 +#define BCM56648_DEVICE_ID 0xb648 +#define BCM56648_A0_REV_ID 1 +#define BCM56648_A1_REV_ID 2 +#define BCM56648_B0_REV_ID 0x11 +#define BCM56649_DEVICE_ID 0xb649 +#define BCM56649_A0_REV_ID 1 +#define BCM56649_A1_REV_ID 2 +#define BCM56649_B0_REV_ID 0x11 + +#define BCM56540_DEVICE_ID 0xb540 +#define BCM56540_A0_REV_ID 1 +#define BCM56540_A1_REV_ID 2 +#define BCM56540_B0_REV_ID 0x11 +#define BCM56541_DEVICE_ID 0xb541 +#define BCM56541_A0_REV_ID 1 +#define BCM56541_A1_REV_ID 2 +#define BCM56541_B0_REV_ID 0x11 +#define BCM56542_DEVICE_ID 0xb542 +#define BCM56542_A0_REV_ID 1 +#define BCM56542_A1_REV_ID 2 +#define BCM56542_B0_REV_ID 0x11 +#define BCM56543_DEVICE_ID 0xb543 +#define BCM56543_A0_REV_ID 1 +#define BCM56543_A1_REV_ID 2 +#define BCM56543_B0_REV_ID 0x11 +#define BCM56544_DEVICE_ID 0xb544 +#define BCM56544_A0_REV_ID 1 +#define BCM56544_A1_REV_ID 2 +#define BCM56544_B0_REV_ID 0x11 + +#define BCM56545_DEVICE_ID 0xb545 +#define BCM56545_A0_REV_ID 1 +#define BCM56545_A1_REV_ID 2 +#define BCM56545_B0_REV_ID 0x11 +#define BCM56546_DEVICE_ID 0xb546 +#define BCM56546_A0_REV_ID 1 +#define BCM56546_A1_REV_ID 2 +#define BCM56546_B0_REV_ID 0x11 + +#define BCM56044_DEVICE_ID 0xb044 +#define BCM56044_B0_REV_ID 0x11 +#define BCM56045_DEVICE_ID 0xb045 +#define BCM56045_A0_REV_ID 1 +#define BCM56045_A1_REV_ID 2 +#define BCM56045_B0_REV_ID 0x11 +#define BCM56046_DEVICE_ID 0xb046 +#define BCM56046_A0_REV_ID 1 +#define BCM56046_A1_REV_ID 2 +#define BCM56046_B0_REV_ID 0x11 + + +#define BCM56440_DEVICE_ID 0xb440 +#define BCM56440_A0_REV_ID 1 +#define BCM56440_B0_REV_ID 0x11 +#define BCM56441_DEVICE_ID 0xb441 +#define BCM56441_A0_REV_ID 1 +#define BCM56441_B0_REV_ID 0x11 +#define BCM56442_DEVICE_ID 0xb442 +#define BCM56442_A0_REV_ID 1 +#define BCM56442_B0_REV_ID 0x11 +#define BCM56443_DEVICE_ID 0xb443 +#define BCM56443_A0_REV_ID 1 +#define BCM56443_B0_REV_ID 0x11 +#define BCM56445_DEVICE_ID 0xb445 +#define BCM56445_A0_REV_ID 1 +#define BCM56445_B0_REV_ID 0x11 +#define BCM56446_DEVICE_ID 0xb446 +#define BCM56446_A0_REV_ID 1 +#define BCM56446_B0_REV_ID 0x11 +#define BCM56447_DEVICE_ID 0xb447 +#define BCM56447_A0_REV_ID 1 +#define BCM56447_B0_REV_ID 0x11 +#define BCM56448_DEVICE_ID 0xb448 +#define BCM56448_A0_REV_ID 1 +#define BCM56448_B0_REV_ID 0x11 +#define BCM56449_DEVICE_ID 0xb449 +#define BCM56449_A0_REV_ID 1 +#define BCM56449_B0_REV_ID 0x11 +#define BCM56240_DEVICE_ID 0xb240 +#define BCM56240_A0_REV_ID 1 +#define BCM56240_B0_REV_ID 0x11 +#define BCM56241_DEVICE_ID 0xb241 +#define BCM56241_A0_REV_ID 1 +#define BCM56241_B0_REV_ID 0x11 +#define BCM56242_DEVICE_ID 0xb242 +#define BCM56242_A0_REV_ID 1 +#define BCM56242_B0_REV_ID 0x11 +#define BCM56243_DEVICE_ID 0xb243 +#define BCM56243_A0_REV_ID 1 +#define BCM56243_B0_REV_ID 0x11 +#define BCM56245_DEVICE_ID 0xb245 +#define BCM56245_A0_REV_ID 1 +#define BCM56245_B0_REV_ID 0x11 +#define BCM56246_DEVICE_ID 0xb246 +#define BCM56246_A0_REV_ID 1 +#define BCM56246_B0_REV_ID 0x11 +#define BCM55440_DEVICE_ID 0xa440 +#define BCM55440_A0_REV_ID 1 +#define BCM55440_B0_REV_ID 0x11 +#define BCM55441_DEVICE_ID 0xa441 +#define BCM55441_A0_REV_ID 1 +#define BCM55441_B0_REV_ID 0x11 + +#define BCM55450_DEVICE_ID 0xa450 +#define BCM55450_A0_REV_ID 1 +#define BCM55450_B0_REV_ID 0x11 +#define BCM55450_B1_REV_ID 0x12 + +#define BCM55455_DEVICE_ID 0xa455 +#define BCM55455_A0_REV_ID 1 +#define BCM55455_B0_REV_ID 0x11 +#define BCM55455_B1_REV_ID 0x12 + +#define BCM56248_DEVICE_ID 0xb248 +#define BCM56248_A0_REV_ID 1 +#define BCM56248_B0_REV_ID 0x11 +#define BCM56248_B1_REV_ID 0x12 + +#define BCM56450_DEVICE_ID 0xb450 +#define BCM56450_A0_REV_ID 1 +#define BCM56450_B0_REV_ID 0x11 +#define BCM56450_B1_REV_ID 0x12 + +#define BCM56452_DEVICE_ID 0xb452 +#define BCM56452_A0_REV_ID 1 +#define BCM56452_B0_REV_ID 0x11 +#define BCM56452_B1_REV_ID 0x12 + +#define BCM56454_DEVICE_ID 0xb454 +#define BCM56454_A0_REV_ID 1 +#define BCM56454_B0_REV_ID 0x11 +#define BCM56454_B1_REV_ID 0x12 + +#define BCM56455_DEVICE_ID 0xb455 +#define BCM56455_A0_REV_ID 1 +#define BCM56455_B0_REV_ID 0x11 +#define BCM56455_B1_REV_ID 0x12 + +#define BCM56456_DEVICE_ID 0xb456 +#define BCM56456_A0_REV_ID 1 +#define BCM56456_B0_REV_ID 0x11 +#define BCM56456_B1_REV_ID 0x12 + +#define BCM56457_DEVICE_ID 0xb457 +#define BCM56457_A0_REV_ID 1 +#define BCM56457_B0_REV_ID 0x11 +#define BCM56457_B1_REV_ID 0x12 + +#define BCM56458_DEVICE_ID 0xb458 +#define BCM56458_A0_REV_ID 1 +#define BCM56458_B0_REV_ID 0x11 +#define BCM56458_B1_REV_ID 0x12 + +#define BCM56850_DEVICE_ID 0xb850 +#define BCM56850_A0_REV_ID 1 +#define BCM56850_A1_REV_ID 2 +#define BCM56850_A2_REV_ID 3 +#define BCM56851_DEVICE_ID 0xb851 +#define BCM56851_A0_REV_ID 1 +#define BCM56851_A1_REV_ID 2 +#define BCM56851_A2_REV_ID 3 +#define BCM56852_DEVICE_ID 0xb852 +#define BCM56852_A0_REV_ID 1 +#define BCM56852_A1_REV_ID 2 +#define BCM56852_A2_REV_ID 3 +#define BCM56853_DEVICE_ID 0xb853 +#define BCM56853_A0_REV_ID 1 +#define BCM56853_A1_REV_ID 2 +#define BCM56853_A2_REV_ID 3 +#define BCM56854_DEVICE_ID 0xb854 +#define BCM56854_A0_REV_ID 1 +#define BCM56854_A1_REV_ID 2 +#define BCM56854_A2_REV_ID 3 +#define BCM56855_DEVICE_ID 0xb855 +#define BCM56855_A0_REV_ID 1 +#define BCM56855_A1_REV_ID 2 +#define BCM56855_A2_REV_ID 3 +#define BCM56834_DEVICE_ID 0xb834 +#define BCM56834_A0_REV_ID 1 +#define BCM56834_A1_REV_ID 2 +#define BCM56834_A2_REV_ID 3 + +#define BCM56860_DEVICE_ID 0xb860 +#define BCM56860_A0_REV_ID 1 +#define BCM56860_A1_REV_ID 2 +#define BCM56861_DEVICE_ID 0xb861 +#define BCM56861_A0_REV_ID 1 +#define BCM56861_A1_REV_ID 2 +#define BCM56862_DEVICE_ID 0xb862 +#define BCM56862_A0_REV_ID 1 +#define BCM56862_A1_REV_ID 2 +#define BCM56864_DEVICE_ID 0xb864 +#define BCM56864_A0_REV_ID 1 +#define BCM56864_A1_REV_ID 2 +#define BCM56865_DEVICE_ID 0xb865 +#define BCM56865_A0_REV_ID 1 +#define BCM56865_A1_REV_ID 2 +#define BCM56866_DEVICE_ID 0xb866 +#define BCM56866_A0_REV_ID 1 +#define BCM56866_A1_REV_ID 2 +#define BCM56867_DEVICE_ID 0xb867 +#define BCM56867_A0_REV_ID 1 +#define BCM56867_A1_REV_ID 2 +#define BCM56868_DEVICE_ID 0xb868 +#define BCM56868_A0_REV_ID 1 +#define BCM56868_A1_REV_ID 2 +#define BCM56832_DEVICE_ID 0xb832 +#define BCM56832_A0_REV_ID 1 +#define BCM56832_A1_REV_ID 2 +#define BCM56833_DEVICE_ID 0xb833 +#define BCM56833_A0_REV_ID 1 +#define BCM56833_A1_REV_ID 2 +#define BCM56836_DEVICE_ID 0xb836 +#define BCM56836_A0_REV_ID 1 +#define BCM56836_A1_REV_ID 2 + + +#define BCM56750_DEVICE_ID 0xb750 +#define BCM56750_A0_REV_ID 1 +#define BCM56750_A1_REV_ID 2 +#define BCM56750_A2_REV_ID 3 + +#define BCM56830_DEVICE_ID 0xb830 +#define BCM56830_A0_REV_ID 1 +#define BCM56830_A1_REV_ID 2 +#define BCM56830_A2_REV_ID 3 + +#define BCM56150_DEVICE_ID 0xb150 +#define BCM56150_A0_REV_ID 1 +#define BCM56151_DEVICE_ID 0xb151 +#define BCM56151_A0_REV_ID 1 +#define BCM56152_DEVICE_ID 0xb152 +#define BCM56152_A0_REV_ID 1 + +#define BCM53342_DEVICE_ID 0x8342 +#define BCM53342_A0_REV_ID 1 +#define BCM53343_DEVICE_ID 0x8343 +#define BCM53343_A0_REV_ID 1 +#define BCM53344_DEVICE_ID 0x8344 +#define BCM53344_A0_REV_ID 1 +#define BCM53346_DEVICE_ID 0x8346 +#define BCM53346_A0_REV_ID 1 +#define BCM53347_DEVICE_ID 0x8347 +#define BCM53347_A0_REV_ID 1 + +#define BCM53333_DEVICE_ID 0x8333 +#define BCM53333_A0_REV_ID 1 +#define BCM53334_DEVICE_ID 0x8334 +#define BCM53334_A0_REV_ID 1 + +#define BCM53393_DEVICE_ID 0x8393 +#define BCM53393_A0_REV_ID 1 +#define BCM53394_DEVICE_ID 0x8394 +#define BCM53394_A0_REV_ID 1 + +#define BCM53400_DEVICE_ID 0x8400 +#define BCM53400_A0_REV_ID 1 +#define BCM56060_DEVICE_ID 0xb060 +#define BCM56060_A0_REV_ID 1 +#define BCM56062_DEVICE_ID 0xb062 +#define BCM56062_A0_REV_ID 1 +#define BCM56063_DEVICE_ID 0xb063 +#define BCM56063_A0_REV_ID 1 +#define BCM56064_DEVICE_ID 0xb064 +#define BCM56064_A0_REV_ID 1 +#define BCM56065_DEVICE_ID 0xb065 +#define BCM56065_A0_REV_ID 1 +#define BCM56066_DEVICE_ID 0xb066 +#define BCM56066_A0_REV_ID 1 +#define BCM53401_DEVICE_ID 0x8401 +#define BCM53411_DEVICE_ID 0x8411 +#define BCM53401_A0_REV_ID 1 +#define BCM53402_DEVICE_ID 0x8402 +#define BCM53412_DEVICE_ID 0x8412 +#define BCM53402_A0_REV_ID 1 +#define BCM53403_DEVICE_ID 0x8403 +#define BCM53413_DEVICE_ID 0x8413 +#define BCM53403_A0_REV_ID 1 +#define BCM53404_DEVICE_ID 0x8404 +#define BCM53414_DEVICE_ID 0x8414 +#define BCM53404_A0_REV_ID 1 +#define BCM53405_DEVICE_ID 0x8405 +#define BCM53415_DEVICE_ID 0x8415 +#define BCM53405_A0_REV_ID 1 +#define BCM53406_DEVICE_ID 0x8406 +#define BCM53416_DEVICE_ID 0x8416 +#define BCM53406_A0_REV_ID 1 +#define BCM53408_DEVICE_ID 0x8408 +#define BCM53418_DEVICE_ID 0x8418 +#define BCM53408_A0_REV_ID 1 +#define BCM53365_DEVICE_ID 0x8365 +#define BCM53365_A0_REV_ID 1 +#define BCM53369_DEVICE_ID 0x8369 +#define BCM53369_A0_REV_ID 1 + +#define BCM53454_DEVICE_ID 0x8454 +#define BCM53455_DEVICE_ID 0x8455 +#define BCM53454_A0_REV_ID 1 +#define BCM53456_DEVICE_ID 0x8456 +#define BCM53457_DEVICE_ID 0x8457 +#define BCM53456_A0_REV_ID 1 + +#define BCM53422_DEVICE_ID 0x8422 +#define BCM53422_A0_REV_ID 1 +#define BCM53424_DEVICE_ID 0x8424 +#define BCM53424_A0_REV_ID 1 +#define BCM53426_DEVICE_ID 0x8426 +#define BCM53426_A0_REV_ID 1 + +#define BCM56960_DEVICE_ID 0xb960 +#define BCM56960_A0_REV_ID 1 +#define BCM56960_B0_REV_ID 0x11 +#define BCM56960_B1_REV_ID 0x12 +#define BCM56961_DEVICE_ID 0xb961 +#define BCM56961_A0_REV_ID 1 +#define BCM56961_B0_REV_ID 0x11 +#define BCM56961_B1_REV_ID 0x12 +#define BCM56962_DEVICE_ID 0xb962 +#define BCM56962_A0_REV_ID 1 +#define BCM56962_B0_REV_ID 0x11 +#define BCM56962_B1_REV_ID 0x12 +#define BCM56963_DEVICE_ID 0xb963 +#define BCM56963_A0_REV_ID 1 +#define BCM56963_B0_REV_ID 0x11 +#define BCM56963_B1_REV_ID 0x12 +#define BCM56930_DEVICE_ID 0xb930 +#define BCM56930_A0_REV_ID 1 +#define BCM56930_B0_REV_ID 0x11 +#define BCM56930_B1_REV_ID 0x12 +#define BCM56930_C0_REV_ID 0x21 +#define BCM56931_DEVICE_ID 0xb931 +#define BCM56931_A0_REV_ID 1 +#define BCM56931_B0_REV_ID 0x11 +#define BCM56931_C0_REV_ID 0x21 +#define BCM56935_DEVICE_ID 0xb935 +#define BCM56935_A0_REV_ID 1 +#define BCM56935_B0_REV_ID 0x11 +#define BCM56935_C0_REV_ID 0x21 +#define BCM56936_DEVICE_ID 0xb936 +#define BCM56936_A0_REV_ID 1 +#define BCM56936_B0_REV_ID 0x11 +#define BCM56936_C0_REV_ID 0x21 +#define BCM56939_DEVICE_ID 0xb939 +#define BCM56939_A0_REV_ID 1 +#define BCM56939_B0_REV_ID 0x11 +#define BCM56939_C0_REV_ID 0x21 + +#define BCM56168_DEVICE_ID 0xb168 +#define BCM56168_A0_REV_ID 1 +#define BCM56168_B0_REV_ID 0x11 +#define BCM56168_B1_REV_ID 0x12 +#define BCM56169_DEVICE_ID 0xb169 +#define BCM56169_A0_REV_ID 1 +#define BCM56169_B0_REV_ID 0x11 +#define BCM56169_B1_REV_ID 0x12 + +#define BCM56980_DEVICE_ID_MASK 0xFFF0 +#define BCM56980_DEVICE_ID 0xb980 +#define BCM56980_A0_REV_ID 1 +#define BCM56980_B0_REV_ID 0x11 +#define BCM56981_DEVICE_ID 0xb981 +#define BCM56981_A0_REV_ID 1 +#define BCM56981_B0_REV_ID 0x11 +#define BCM56982_DEVICE_ID 0xb982 +#define BCM56982_A0_REV_ID 1 +#define BCM56982_B0_REV_ID 0x11 +#define BCM56983_DEVICE_ID 0xb983 +#define BCM56983_A0_REV_ID 1 +#define BCM56983_B0_REV_ID 0x11 +#define BCM56984_DEVICE_ID 0xb984 +#define BCM56984_A0_REV_ID 1 +#define BCM56984_B0_REV_ID 0x11 + +#define BCM56968_DEVICE_ID 0xb968 +#define BCM56968_A0_REV_ID 1 +#define BCM56968_B0_REV_ID 0x11 +#define BCM56968_B1_REV_ID 0x12 + +#define BCM56160_DEVICE_ID 0xb160 +#define BCM56160_A0_REV_ID 1 +#define BCM56160_B0_REV_ID 0x11 +#define BCM56162_DEVICE_ID 0xb162 +#define BCM56162_A0_REV_ID 1 +#define BCM56162_B0_REV_ID 0x11 + +#define BCM56163_DEVICE_ID 0xb163 +#define BCM56163_A0_REV_ID 1 +#define BCM56163_B0_REV_ID 0x11 +#define BCM56164_DEVICE_ID 0xb164 +#define BCM56164_A0_REV_ID 1 +#define BCM56164_B0_REV_ID 0x11 +#define BCM56166_DEVICE_ID 0xb166 +#define BCM56166_A0_REV_ID 1 +#define BCM56166_B0_REV_ID 0x11 + +#define BCM56273_DEVICE_ID 0xb273 +#define BCM56273_A0_REV_ID 1 +#define BCM56273_A1_REV_ID 2 + +#define BCM56274_DEVICE_ID 0xb274 +#define BCM56274_A0_REV_ID 1 +#define BCM56274_A1_REV_ID 2 + +#define BCM56275_DEVICE_ID 0xb275 +#define BCM56275_A0_REV_ID 1 +#define BCM56275_A1_REV_ID 2 + +#define BCM56276_DEVICE_ID 0xb276 +#define BCM56276_A0_REV_ID 1 +#define BCM56276_A1_REV_ID 2 + +#define BCM56277_DEVICE_ID 0xb277 +#define BCM56277_A0_REV_ID 1 +#define BCM56277_A1_REV_ID 2 + +#define BCM56278_DEVICE_ID 0xb278 +#define BCM56278_A0_REV_ID 1 +#define BCM56278_A1_REV_ID 2 + +#define BCM56279_DEVICE_ID 0xb279 +#define BCM56279_A1_REV_ID 2 + +#define BCM56575_DEVICE_ID 0xb575 +#define BCM56575_A1_REV_ID 2 + +#define BCM56175_DEVICE_ID 0xb175 +#define BCM56175_A1_REV_ID 2 + +#define BCM56176_DEVICE_ID 0xb176 +#define BCM56176_A1_REV_ID 2 + +#define BCM53440_DEVICE_ID 0x8440 +#define BCM53440_A0_REV_ID 1 +#define BCM53440_B0_REV_ID 0x11 +#define BCM53442_DEVICE_ID 0x8442 +#define BCM53442_A0_REV_ID 1 +#define BCM53442_B0_REV_ID 0x11 +#define BCM53443_DEVICE_ID 0x8443 +#define BCM53443_A0_REV_ID 1 +#define BCM53443_B0_REV_ID 0x11 + +#define BCM53434_DEVICE_ID 0x8434 +#define BCM53434_A0_REV_ID 1 +#define BCM53434_B0_REV_ID 0x11 + +#define BCM56560_DEVICE_ID 0xb560 +#define BCM56560_A0_REV_ID 1 +#define BCM56560_B0_REV_ID 0x11 + +#define BCM56561_DEVICE_ID 0xb561 +#define BCM56561_A0_REV_ID 1 +#define BCM56561_B0_REV_ID 0x11 + +#define BCM56562_DEVICE_ID 0xb562 +#define BCM56562_A0_REV_ID 1 +#define BCM56562_B0_REV_ID 0x11 + +#define BCM56670_DEVICE_ID 0xb670 +#define BCM56670_A0_REV_ID 1 +#define BCM56670_B0_REV_ID 0x11 +#define BCM56670_C0_REV_ID 0x21 + + +#define BCM56671_DEVICE_ID 0xb671 +#define BCM56671_A0_REV_ID 1 +#define BCM56671_B0_REV_ID 0x11 +#define BCM56671_C0_REV_ID 0x21 + +#define BCM56672_DEVICE_ID 0xb672 +#define BCM56672_A0_REV_ID 1 +#define BCM56672_B0_REV_ID 0x11 +#define BCM56672_C0_REV_ID 0x21 + +#define BCM56675_DEVICE_ID 0xb675 +#define BCM56675_A0_REV_ID 1 +#define BCM56675_B0_REV_ID 0x11 +#define BCM56675_C0_REV_ID 0x21 + +#define BCM53650_DEVICE_ID 0x8650 +#define BCM53650_A0_REV_ID 1 +#define BCM53650_B0_REV_ID 0x11 +#define BCM53650_C0_REV_ID 0x21 + +#define BCM53651_DEVICE_ID 0x8651 +#define BCM53651_A0_REV_ID 1 +#define BCM53651_B0_REV_ID 0x11 +#define BCM53651_C0_REV_ID 0x21 + +#define BCM53652_DEVICE_ID 0x8652 +#define BCM53652_A0_REV_ID 1 +#define BCM53652_B0_REV_ID 0x11 +#define BCM53652_C0_REV_ID 0x21 + +#define BCM53653_DEVICE_ID 0x8653 +#define BCM53653_A0_REV_ID 1 +#define BCM53653_B0_REV_ID 0x11 +#define BCM53653_C0_REV_ID 0x21 + +#define BCM56565_DEVICE_ID 0xb565 +#define BCM56565_A0_REV_ID 1 +#define BCM56565_B0_REV_ID 0x11 + +#define BCM56566_DEVICE_ID 0xb566 +#define BCM56566_A0_REV_ID 1 +#define BCM56566_B0_REV_ID 0x11 + +#define BCM56567_DEVICE_ID 0xb567 +#define BCM56567_A0_REV_ID 1 +#define BCM56567_B0_REV_ID 0x11 + +#define BCM56568_DEVICE_ID 0xb568 +#define BCM56568_A0_REV_ID 1 +#define BCM56568_B0_REV_ID 0x11 + +#define BCM56760_DEVICE_ID 0xb760 +#define BCM56760_A0_REV_ID 1 +#define BCM56760_A1_REV_ID 2 +#define BCM56760_B0_REV_ID 0x11 + + +#define BCM56761_DEVICE_ID 0xb761 +#define BCM56761_A0_REV_ID 1 +#define BCM56761_A1_REV_ID 2 +#define BCM56761_B0_REV_ID 0x11 +#define BCM56761_B1_REV_ID 0x12 + +#define BCM56762_DEVICE_ID 0xb762 +#define BCM56762_A0_REV_ID 1 +#define BCM56762_B0_REV_ID 0x11 + +#define BCM56764_DEVICE_ID 0xb764 +#define BCM56764_A0_REV_ID 1 +#define BCM56764_B0_REV_ID 0x11 + +#define BCM56765_DEVICE_ID 0xb765 +#define BCM56765_A0_REV_ID 1 +#define BCM56765_B0_REV_ID 0x11 + +#define BCM56766_DEVICE_ID 0xb766 +#define BCM56766_A0_REV_ID 1 +#define BCM56766_B0_REV_ID 0x11 + +#define BCM56768_DEVICE_ID 0xb768 +#define BCM56768_A0_REV_ID 1 +#define BCM56768_B0_REV_ID 0x11 + +#define BCM56068_DEVICE_ID 0xb068 +#define BCM56068_A0_REV_ID 1 +#define BCM56068_B0_REV_ID 0x11 +#define BCM56068_B1_REV_ID 0x12 + +#define BCM56069_DEVICE_ID 0xb069 +#define BCM56069_A0_REV_ID 1 +#define BCM56069_B0_REV_ID 0x11 + +#define BCM56170_DEVICE_ID 0xb170 +#define BCM56170_A0_REV_ID 1 +#define BCM56170_B0_REV_ID 0x11 +#define BCM56172_DEVICE_ID 0xb172 +#define BCM56172_A0_REV_ID 1 +#define BCM56172_B0_REV_ID 0x11 +#define BCM56174_DEVICE_ID 0xb174 +#define BCM56174_A0_REV_ID 1 +#define BCM56174_B0_REV_ID 0x11 + +#define BCM53570_DEVICE_ID 0x8570 +#define BCM53570_A0_REV_ID 1 +#define BCM53570_B0_REV_ID 0x11 +#define BCM53575_DEVICE_ID 0x8575 +#define BCM53575_A0_REV_ID 1 +#define BCM53575_B0_REV_ID 0x11 + +#define BCM56070_DEVICE_ID 0xb070 +#define BCM56070_A0_REV_ID 1 +#define BCM56071_DEVICE_ID 0xb071 +#define BCM56071_A0_REV_ID 1 +#define BCM56072_DEVICE_ID 0xb072 +#define BCM56072_A0_REV_ID 1 + + +#define BCM56965_DEVICE_ID 0xb965 +#define BCM56965_A0_REV_ID 1 +#define BCM56965_A1_REV_ID 2 +#define BCM56969_DEVICE_ID 0xb969 +#define BCM56969_A0_REV_ID 1 +#define BCM56966_DEVICE_ID 0xb966 +#define BCM56966_A0_REV_ID 1 +#define BCM56967_DEVICE_ID 0xb967 +#define BCM56967_A0_REV_ID 1 + +#define BCM56970_DEVICE_ID 0xb970 +#define BCM56970_A0_REV_ID 1 +#define BCM56970_B0_REV_ID 0x11 +#define BCM56971_DEVICE_ID 0xb971 +#define BCM56971_A0_REV_ID 1 +#define BCM56971_B0_REV_ID 0x11 +#define BCM56972_DEVICE_ID 0xb972 +#define BCM56972_A0_REV_ID 1 +#define BCM56972_B0_REV_ID 0x11 +#define BCM56974_DEVICE_ID 0xb974 +#define BCM56974_A0_REV_ID 1 +#define BCM56974_B0_REV_ID 0x11 +#define BCM56975_DEVICE_ID 0xb975 +#define BCM56975_A0_REV_ID 1 +#define BCM56975_B0_REV_ID 0x11 + +#define BCM56870_DEVICE_ID 0xb870 +#define BCM56870_A0_REV_ID 1 +#define BCM56873_DEVICE_ID 0xb873 +#define BCM56873_A0_REV_ID 1 + +#define BCM56370_DEVICE_ID 0xb370 +#define BCM56370_A0_REV_ID 1 +#define BCM56370_A1_REV_ID 0x02 +#define BCM56370_A2_REV_ID 0x03 + +#define BCM56371_DEVICE_ID 0xb371 +#define BCM56371_A0_REV_ID 1 +#define BCM56371_A1_REV_ID 0x02 +#define BCM56371_A2_REV_ID 0x03 + +#define BCM56372_DEVICE_ID 0xb372 +#define BCM56372_A0_REV_ID 1 +#define BCM56372_A1_REV_ID 0x02 +#define BCM56372_A2_REV_ID 0x03 + +#define BCM56374_DEVICE_ID 0xb374 +#define BCM56374_A0_REV_ID 1 +#define BCM56374_A1_REV_ID 0x02 +#define BCM56374_A2_REV_ID 0x03 + +#define BCM56375_DEVICE_ID 0xb375 +#define BCM56375_A0_REV_ID 1 +#define BCM56375_A1_REV_ID 0x02 +#define BCM56375_A2_REV_ID 0x03 + +#define BCM56376_DEVICE_ID 0xb376 +#define BCM56376_A0_REV_ID 1 +#define BCM56376_A1_REV_ID 0x02 +#define BCM56376_A2_REV_ID 0x03 + +#define BCM56377_DEVICE_ID 0xb377 +#define BCM56377_A0_REV_ID 1 +#define BCM56377_A1_REV_ID 0x02 +#define BCM56377_A2_REV_ID 0x03 + +#define BCM56577_DEVICE_ID 0xb577 +#define BCM56577_A0_REV_ID 1 +#define BCM56577_A1_REV_ID 0x02 +#define BCM56577_A2_REV_ID 0x03 + +#define BCM56578_DEVICE_ID 0xb578 +#define BCM56578_A0_REV_ID 1 +#define BCM56578_A1_REV_ID 0x02 +#define BCM56578_A2_REV_ID 0x03 + +#define BCM56579_DEVICE_ID 0xb579 +#define BCM56579_A0_REV_ID 1 +#define BCM56579_A1_REV_ID 0x02 +#define BCM56579_A2_REV_ID 0x03 + +#define BCM56770_DEVICE_ID 0xb770 +#define BCM56770_A0_REV_ID 1 + +#define BCM56771_DEVICE_ID 0xb771 +#define BCM56771_A0_REV_ID 1 + +#define BCM56470_DEVICE_ID 0xb470 +#define BCM56470_A0_REV_ID 1 +#define BCM56471_DEVICE_ID 0xb471 +#define BCM56471_A0_REV_ID 1 +#define BCM56472_DEVICE_ID 0xb472 +#define BCM56472_A0_REV_ID 1 +#define BCM56475_DEVICE_ID 0xb475 +#define BCM56475_A0_REV_ID 1 +#define BCM56474_DEVICE_ID 0xb474 +#define BCM56474_A0_REV_ID 1 + + +#define BCM53540_DEVICE_ID 0x8540 +#define BCM53540_A0_REV_ID 1 +#define BCM53547_DEVICE_ID 0x8547 +#define BCM53547_A0_REV_ID 1 +#define BCM53548_DEVICE_ID 0x8548 +#define BCM53548_A0_REV_ID 1 +#define BCM53549_DEVICE_ID 0x8549 +#define BCM53549_A0_REV_ID 1 + +#define BCM53642_DEVICE_ID 0x8642 +#define BCM53642_A0_REV_ID 1 + +#define BCM5665_DEVICE_ID 0x5665 +#define BCM5665_A0_REV_ID 1 +#define BCM5665_B0_REV_ID 0x11 + + +#define BCM5655_DEVICE_ID 0x5655 +#define BCM5655_A0_REV_ID 1 +#define BCM5655_B0_REV_ID 0x11 + + +#define BCM5650_DEVICE_ID 0x5650 +#define BCM5650_A0_REV_ID 1 +#define BCM5650_B0_REV_ID 0x11 +#define BCM5650_C0_REV_ID 0x21 + +#define BROADCOM_PHYID_HIGH 0x0040 + +#define ARAD_DEVICE_ID 0x8650 +#define ARAD_A0_REV_ID 0x0000 +#define ARAD_B0_REV_ID 0x0011 +#define ARAD_B1_REV_ID 0x0012 +#define BCM88770_DEVICE_ID 0x8770 +#define BCM88770_A1_REV_ID 0x0002 +#define BCM88773_DEVICE_ID 0x8773 +#define BCM88773_A1_REV_ID 0x0002 +#define BCM88774_DEVICE_ID 0x8774 +#define BCM88774_A1_REV_ID 0x0002 +#define BCM88775_DEVICE_ID 0x8775 +#define BCM88775_A1_REV_ID 0x0002 +#define BCM88776_DEVICE_ID 0x8776 +#define BCM88776_A1_REV_ID 0x0002 +#define BCM88777_DEVICE_ID 0x8777 +#define BCM88777_A1_REV_ID 0x0002 +#define BCM88950_DEVICE_ID 0x8950 +#define BCM88950_A0_REV_ID 0x0001 +#define BCM88950_A1_REV_ID 0x0002 +#define BCM88953_DEVICE_ID 0x8953 +#define BCM88953_A1_REV_ID 0x0002 +#define BCM88954_DEVICE_ID 0x8954 +#define BCM88954_A1_REV_ID 0x0002 +#define BCM88955_DEVICE_ID 0x8955 +#define BCM88955_A1_REV_ID 0x0002 +#define BCM88956_DEVICE_ID 0x8956 +#define BCM88956_A1_REV_ID 0x0002 +#define DNXC_A0_REV_ID 0x0001 +#define DNXC_A1_REV_ID 0x0002 +#define DNXC_A2_REV_ID 0x0003 +#define DNXC_B0_REV_ID 0x0011 +#define DNXC_B1_REV_ID 0x0012 +#define DNXC_DEVID_FAMILY_MASK 0xfff0 +#define BCM88790_DEVICE_ID 0x8790 +#define BCM88790_A0_REV_ID DNXC_A0_REV_ID +#define BCM88790_B0_REV_ID DNXC_B0_REV_ID +#define BCM88791_DEVICE_ID 0x8791 +#define BCM88792_DEVICE_ID 0x8792 +#define BCM88793_DEVICE_ID 0x8793 +#define BCM88794_DEVICE_ID 0x8794 +#define BCM88795_DEVICE_ID 0x8795 +#define BCM88796_DEVICE_ID 0x8796 +#define BCM88797_DEVICE_ID 0x8797 +#define BCM88798_DEVICE_ID 0x8798 +#define BCM88799_DEVICE_ID 0x8799 +#define BCM8879A_DEVICE_ID 0x879A +#define BCM8879B_DEVICE_ID 0x879B +#define BCM8879C_DEVICE_ID 0x879C +#define BCM8879D_DEVICE_ID 0x879D +#define BCM8879E_DEVICE_ID 0x879E +#define BCM8879F_DEVICE_ID 0x879F +#ifdef BCM_DNXF3_SUPPORT +#define RAMON2_DEVICE_ID 0x8910 +#define BCM8891F_DEVICE_ID 0x891F +#define RAMON3_DEVICE_ID 0x8920 +#endif +#define ARADPLUS_DEVICE_ID 0x8660 +#define ARADPLUS_A0_REV_ID 0x0001 +#define BCM88660_DEVICE_ID ARADPLUS_DEVICE_ID +#define BCM88660_A0_REV_ID ARADPLUS_A0_REV_ID +#define JERICHO_DEVICE_ID 0x8675 +#define JERICHO_A0_REV_ID 0x0001 +#define JERICHO_B0_REV_ID 0x0011 +#define JERICHO_A1_REV_ID 0x0002 +#define BCM88670_DEVICE_ID 0x8670 +#define BCM88670_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88670_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88671_DEVICE_ID 0x8671 +#define BCM88671_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88671_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88671M_DEVICE_ID 0x867A +#define BCM88671M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88671M_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88670_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88671_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88671M_B0_REV_ID JERICHO_B0_REV_ID + +#define BCM88672_DEVICE_ID 0x8672 +#define BCM88672_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88672_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88672_B0_REV_ID JERICHO_B0_REV_ID + +#define BCM88673_DEVICE_ID 0x8673 +#define BCM88673_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88673_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88674_DEVICE_ID 0x8674 +#define BCM88674_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88674_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88675_DEVICE_ID JERICHO_DEVICE_ID +#define BCM88675_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88675_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88675M_DEVICE_ID 0x867B +#define BCM88675M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88675M_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88676_DEVICE_ID 0x8676 +#define BCM88676_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88676_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88676M_DEVICE_ID 0x867C +#define BCM88676M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88676M_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88677_DEVICE_ID 0x8677 +#define BCM88677_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88677_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88678_DEVICE_ID 0x8678 +#define BCM88678_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88678_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88679_DEVICE_ID 0x8679 +#define BCM88679_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88679_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88673_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88674_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88675_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88675M_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88676_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88676M_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88677_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88678_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88679_B0_REV_ID JERICHO_B0_REV_ID +#define QMX_DEVICE_ID 0x8375 +#define QMX_A0_REV_ID 0x0001 +#define QMX_B0_REV_ID 0x0011 +#define QMX_A1_REV_ID 0x0002 +#define BCM88370_DEVICE_ID 0x8370 +#define BCM88370_A0_REV_ID QMX_A0_REV_ID +#define BCM88370_A1_REV_ID QMX_A1_REV_ID +#define BCM88371_DEVICE_ID 0x8371 +#define BCM88371_A0_REV_ID QMX_A0_REV_ID +#define BCM88371_A1_REV_ID QMX_A1_REV_ID +#define BCM88371M_DEVICE_ID 0x837A +#define BCM88371M_A0_REV_ID QMX_A0_REV_ID +#define BCM88371M_A1_REV_ID QMX_A1_REV_ID +#define BCM88375_DEVICE_ID QMX_DEVICE_ID +#define BCM88375_A0_REV_ID QMX_A0_REV_ID +#define BCM88375_A1_REV_ID QMX_A1_REV_ID +#define BCM88376_DEVICE_ID 0x8376 +#define BCM88376_A0_REV_ID QMX_A0_REV_ID +#define BCM88376_A1_REV_ID QMX_A1_REV_ID +#define BCM88376M_DEVICE_ID 0x837B +#define BCM88376M_A0_REV_ID QMX_A0_REV_ID +#define BCM88376M_A1_REV_ID QMX_A1_REV_ID +#define BCM88377_DEVICE_ID 0x8377 +#define BCM88377_A0_REV_ID QMX_A0_REV_ID +#define BCM88377_A1_REV_ID QMX_A1_REV_ID +#define BCM88378_DEVICE_ID 0x8378 +#define BCM88378_A0_REV_ID QMX_A0_REV_ID +#define BCM88378_A1_REV_ID QMX_A1_REV_ID +#define BCM88379_DEVICE_ID 0x8379 +#define BCM88379_A0_REV_ID QMX_A0_REV_ID +#define BCM88379_A1_REV_ID QMX_A1_REV_ID + +#define BCM88370_B0_REV_ID QMX_B0_REV_ID +#define BCM88371_B0_REV_ID QMX_B0_REV_ID +#define BCM88371M_B0_REV_ID QMX_B0_REV_ID +#define BCM88375_B0_REV_ID QMX_B0_REV_ID +#define BCM88376_B0_REV_ID QMX_B0_REV_ID +#define BCM88376M_B0_REV_ID QMX_B0_REV_ID +#define BCM88377_B0_REV_ID QMX_B0_REV_ID +#define BCM88378_B0_REV_ID QMX_B0_REV_ID +#define BCM88379_B0_REV_ID QMX_B0_REV_ID + + +#define JERICHO_PLUS_DEVICE_ID 0x8680 +#define JERICHO_PLUS_A0_REV_ID 0x0001 +#define BCM88680_DEVICE_ID JERICHO_PLUS_DEVICE_ID +#define BCM88680_A0_REV_ID JERICHO_PLUS_A0_REV_ID +#define BCM88680_A1_REV_ID 0x0002 + + +#define BCM88681_DEVICE_ID 0x8681 +#define BCM88681_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88682_DEVICE_ID 0x8682 +#define BCM88682_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88683_DEVICE_ID 0x8683 +#define BCM88683_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88684_DEVICE_ID 0x8684 +#define BCM88684_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88685_DEVICE_ID 0x8685 +#define BCM88685_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88687_DEVICE_ID 0x8687 +#define BCM88687_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88380_DEVICE_ID 0x8380 +#define BCM88380_A0_REV_ID JERICHO_PLUS_A0_REV_ID +#define BCM88381_DEVICE_ID 0x8381 +#define BCM88381_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define JERICHO2_DEVICE_ID 0x8690 +#define JERICHO2_A0_REV_ID DNXC_A0_REV_ID +#define JERICHO2_B0_REV_ID DNXC_B0_REV_ID +#define JERICHO2_B1_REV_ID DNXC_B1_REV_ID +#define BCM88690_DEVICE_ID JERICHO2_DEVICE_ID +#define BCM88690_A0_REV_ID JERICHO2_A0_REV_ID +#define BCM88690_B0_REV_ID JERICHO2_B0_REV_ID +#define BCM88690_B1_REV_ID JERICHO2_B1_REV_ID +#define BCM88691_DEVICE_ID 0x8691 +#define BCM88692_DEVICE_ID 0x8692 +#define BCM88693_DEVICE_ID 0x8693 +#define BCM88694_DEVICE_ID 0x8694 +#define BCM88695_DEVICE_ID 0x8695 +#define BCM88696_DEVICE_ID 0x8696 +#define BCM88697_DEVICE_ID 0x8697 +#define BCM88698_DEVICE_ID 0x8698 +#define BCM88699_DEVICE_ID 0x8699 +#define BCM8869A_DEVICE_ID 0x869A +#define BCM8869B_DEVICE_ID 0x869B +#define BCM8869C_DEVICE_ID 0x869C +#define BCM8869D_DEVICE_ID 0x869D +#define BCM8869E_DEVICE_ID 0x869E +#define BCM8869F_DEVICE_ID 0x869F + +#define J2C_DEVICE_ID 0x8800 +#define J2C_2ND_DEVICE_ID 0x8820 +#define J2C_DEVID_FAMILY_MASK 0xffd0 +#define J2C_A0_REV_ID DNXC_A0_REV_ID +#define J2C_A1_REV_ID DNXC_A1_REV_ID +#define BCM88800_DEVICE_ID J2C_DEVICE_ID +#define BCM88820_DEVICE_ID J2C_2ND_DEVICE_ID +#define BCM88800_A0_REV_ID J2C_A0_REV_ID +#define BCM88800_A1_REV_ID J2C_A1_REV_ID +#define BCM88801_DEVICE_ID 0x8801 +#define BCM88802_DEVICE_ID 0x8802 +#define BCM88803_DEVICE_ID 0x8803 +#define BCM88804_DEVICE_ID 0x8804 +#define BCM88805_DEVICE_ID 0x8805 +#define BCM88806_DEVICE_ID 0x8806 +#define BCM88807_DEVICE_ID 0x8807 +#define BCM88808_DEVICE_ID 0x8808 +#define BCM88809_DEVICE_ID 0x8809 +#define BCM8880A_DEVICE_ID 0x880A +#define BCM8880B_DEVICE_ID 0x880B +#define BCM8880C_DEVICE_ID 0x880C +#define BCM8880D_DEVICE_ID 0x880D +#define BCM8880E_DEVICE_ID 0x880E +#define BCM8880F_DEVICE_ID 0x880F +#define BCM88821_DEVICE_ID 0x8821 +#define BCM88822_DEVICE_ID 0x8822 +#define BCM88823_DEVICE_ID 0x8823 +#define BCM88824_DEVICE_ID 0x8824 +#define BCM88825_DEVICE_ID 0x8825 +#define BCM88826_DEVICE_ID 0x8826 +#define BCM88827_DEVICE_ID 0x8827 +#define BCM88828_DEVICE_ID 0x8828 +#define BCM88829_DEVICE_ID 0x8829 +#define BCM8882A_DEVICE_ID 0x882A +#define BCM8882B_DEVICE_ID 0x882B +#define BCM8882C_DEVICE_ID 0x882C +#define BCM8882D_DEVICE_ID 0x882D +#define BCM8882E_DEVICE_ID 0x882E +#define BCM8882F_DEVICE_ID 0x882F + +#define J2P_DEVICE_ID 0x8850 +#define J2P_A0_REV_ID DNXC_A0_REV_ID +#define J2P_A1_REV_ID DNXC_A1_REV_ID +#define J2P_A2_REV_ID DNXC_A2_REV_ID +#define BCM88850_DEVICE_ID J2P_DEVICE_ID +#define BCM88850_A0_REV_ID J2P_A0_REV_ID +#define BCM88850_A1_REV_ID J2P_A1_REV_ID +#define BCM88850_A2_REV_ID J2P_A2_REV_ID +#define BCM88851_DEVICE_ID 0x8851 +#define BCM88852_DEVICE_ID 0x8852 +#define BCM88853_DEVICE_ID 0x8853 +#define BCM88854_DEVICE_ID 0x8854 +#define BCM88855_DEVICE_ID 0x8855 +#define BCM88856_DEVICE_ID 0x8856 +#define BCM88857_DEVICE_ID 0x8857 +#define BCM88858_DEVICE_ID 0x8858 +#define BCM88859_DEVICE_ID 0x8859 +#define BCM8885A_DEVICE_ID 0x885A +#define BCM8885B_DEVICE_ID 0x885B +#define BCM8885C_DEVICE_ID 0x885C +#define BCM8885D_DEVICE_ID 0x885D +#define BCM8885E_DEVICE_ID 0x885E +#define BCM8885F_DEVICE_ID 0x885F + +#define BCM88840_DEVICE_ID 0x8840 +#define BCM88841_DEVICE_ID 0x8841 +#define BCM88842_DEVICE_ID 0x8842 +#define BCM88843_DEVICE_ID 0x8843 +#define BCM88844_DEVICE_ID 0x8844 +#define BCM88845_DEVICE_ID 0x8845 +#define BCM88846_DEVICE_ID 0x8846 +#define BCM88847_DEVICE_ID 0x8847 +#define BCM88848_DEVICE_ID 0x8848 +#define BCM88849_DEVICE_ID 0x8849 +#define BCM8884A_DEVICE_ID 0x884A +#define BCM8884B_DEVICE_ID 0x884B +#define BCM8884C_DEVICE_ID 0x884C +#define BCM8884D_DEVICE_ID 0x884D +#define BCM8884E_DEVICE_ID 0x884E +#define BCM8884F_DEVICE_ID 0x884F + +#define J2X_DEVICE_ID 0x8830 +#define J2X_A0_REV_ID DNXC_A0_REV_ID +#define BCM88830_DEVICE_ID J2X_DEVICE_ID +#define BCM88830_A0_REV_ID J2X_A0_REV_ID +#define BCM88831_DEVICE_ID 0x8831 +#define BCM88832_DEVICE_ID 0x8832 +#define BCM88833_DEVICE_ID 0x8833 +#define BCM88834_DEVICE_ID 0x8834 +#define BCM88835_DEVICE_ID 0x8835 +#define BCM88836_DEVICE_ID 0x8836 +#define BCM88837_DEVICE_ID 0x8837 +#define BCM88838_DEVICE_ID 0x8838 +#define BCM88839_DEVICE_ID 0x8839 +#define BCM8883A_DEVICE_ID 0x883A +#define BCM8883B_DEVICE_ID 0x883B +#define BCM8883C_DEVICE_ID 0x883C +#define BCM8883D_DEVICE_ID 0x883D +#define BCM8883E_DEVICE_ID 0x883E +#define BCM8883F_DEVICE_ID 0x883F + +#ifdef BCM_DNX3_SUPPORT +#define JERICHO3_DEVICE_ID 0x8860 +#define Q3_DEVICE_ID_START 0x886a +#define Q3_DEVICE_ID_END 0x886f +#define J3AI_DEVICE_ID 0x8890 +#define Q3D_DEVICE_ID 0x8870 +#endif +#define Q2A_DEVICE_ID 0x8480 +#define Q2A_A0_REV_ID DNXC_A0_REV_ID +#define Q2A_B0_REV_ID DNXC_B0_REV_ID +#define Q2A_B1_REV_ID DNXC_B1_REV_ID +#define BCM88480_DEVICE_ID Q2A_DEVICE_ID +#define BCM88480_A0_REV_ID Q2A_A0_REV_ID +#define BCM88480_B0_REV_ID Q2A_B0_REV_ID +#define BCM88480_B1_REV_ID Q2A_B1_REV_ID +#define BCM88481_DEVICE_ID 0x8481 +#define BCM88482_DEVICE_ID 0x8482 +#define BCM88483_DEVICE_ID 0x8483 +#define BCM88484_DEVICE_ID 0x8484 +#define BCM88485_DEVICE_ID 0x8485 +#define BCM88486_DEVICE_ID 0x8486 +#define BCM88487_DEVICE_ID 0x8487 +#define BCM88488_DEVICE_ID 0x8488 +#define BCM88489_DEVICE_ID 0x8489 +#define BCM8848A_DEVICE_ID 0x848A +#define BCM8848B_DEVICE_ID 0x848B +#define BCM8848C_DEVICE_ID 0x848C +#define BCM8848D_DEVICE_ID 0x848D +#define BCM8848E_DEVICE_ID 0x848E +#define BCM8848F_DEVICE_ID 0x848F + +#define Q2U_DEVICE_ID 0x8280 +#define BCM88280_DEVICE_ID Q2U_DEVICE_ID +#define BCM88281_DEVICE_ID 0x8281 +#define BCM88282_DEVICE_ID 0x8282 +#define BCM88283_DEVICE_ID 0x8283 +#define BCM88284_DEVICE_ID 0x8284 +#define BCM88285_DEVICE_ID 0x8285 +#define BCM88286_DEVICE_ID 0x8286 +#define BCM88287_DEVICE_ID 0x8287 +#define BCM88288_DEVICE_ID 0x8288 +#define BCM88289_DEVICE_ID 0x8289 +#define BCM8828A_DEVICE_ID 0x828A +#define BCM8828B_DEVICE_ID 0x828B +#define BCM8828C_DEVICE_ID 0x828C +#define BCM8828D_DEVICE_ID 0x828D +#define BCM8828E_DEVICE_ID 0x828E +#define BCM8828F_DEVICE_ID 0x828F + +#define Q2N_DEVICE_ID 0x8290 +#define BCM88290_DEVICE_ID Q2N_DEVICE_ID +#define BCM88291_DEVICE_ID 0x8291 +#define BCM88292_DEVICE_ID 0x8292 +#define BCM88293_DEVICE_ID 0x8293 +#define BCM88294_DEVICE_ID 0x8294 +#define BCM88295_DEVICE_ID 0x8295 +#define BCM88296_DEVICE_ID 0x8296 +#define BCM88297_DEVICE_ID 0x8297 +#define BCM88298_DEVICE_ID 0x8298 +#define BCM88299_DEVICE_ID 0x8299 +#define BCM8829A_DEVICE_ID 0x829A +#define BCM8829B_DEVICE_ID 0x829B +#define BCM8829C_DEVICE_ID 0x829C +#define BCM8829D_DEVICE_ID 0x829D +#define BCM8829E_DEVICE_ID 0x829E +#define BCM8829F_DEVICE_ID 0x829F + +#define QAX_DEVICE_ID 0x8470 +#define QAX_A0_REV_ID 0x0001 +#define QAX_B0_REV_ID 0x0011 +#define BCM88470_DEVICE_ID QAX_DEVICE_ID +#define BCM88470_B0_REV_ID QAX_B0_REV_ID +#define BCM88470P_DEVICE_ID 0x847C +#define BCM88471_DEVICE_ID 0x8471 +#define BCM88473_DEVICE_ID 0x8473 +#define BCM88474_DEVICE_ID 0x8474 +#define BCM88474H_DEVICE_ID 0x847B +#define BCM88476_DEVICE_ID 0x8476 +#define BCM88477_DEVICE_ID 0x8477 + +#define BCM88479_DEVICE_ID 0x8479 + + + +#define BCM88470_A0_REV_ID QAX_A0_REV_ID + +#define QUX_DEVICE_ID 0x8270 +#define QUX_A0_REV_ID 0x0001 +#define QUX_A1_REV_ID 0x0002 +#define QUX_B0_REV_ID 0x0011 +#define BCM88270_DEVICE_ID QUX_DEVICE_ID +#define BCM88270_A0_REV_ID QUX_A0_REV_ID +#define BCM88270_A1_REV_ID QUX_A1_REV_ID +#define BCM88271_DEVICE_ID 0x8271 +#define BCM88272_DEVICE_ID 0x8272 +#define BCM88273_DEVICE_ID 0x8273 +#define BCM88274_DEVICE_ID 0x8274 +#define BCM88276_DEVICE_ID 0x8276 +#define BCM88278_DEVICE_ID 0x8278 +#define BCM88279_DEVICE_ID 0x8279 + +#define BCM88360_DEVICE_ID 0x8360 +#define BCM88360_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88361_DEVICE_ID 0x8361 +#define BCM88361_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88363_DEVICE_ID 0x8363 +#define BCM88363_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88460_DEVICE_ID 0x8460 +#define BCM88460_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88461_DEVICE_ID 0x8461 +#define BCM88461_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88560_DEVICE_ID 0x8560 +#define BCM88560_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88561_DEVICE_ID 0x8561 +#define BCM88561_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88562_DEVICE_ID 0x8562 +#define BCM88562_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88661_DEVICE_ID 0x8661 +#define BCM88661_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88664_DEVICE_ID 0x8664 +#define BCM88664_A0_REV_ID ARADPLUS_A0_REV_ID + + +#define BCM88350_DEVICE_ID 0x8350 +#define BCM88350_B1_REV_ID ARAD_B1_REV_ID +#define BCM88351_DEVICE_ID 0x8351 +#define BCM88351_B1_REV_ID ARAD_B1_REV_ID +#define BCM88450_DEVICE_ID 0x8450 +#define BCM88450_B1_REV_ID ARAD_B1_REV_ID +#define BCM88451_DEVICE_ID 0x8451 +#define BCM88451_B1_REV_ID ARAD_B1_REV_ID +#define BCM88550_DEVICE_ID 0x8550 +#define BCM88550_B1_REV_ID ARAD_B0_REV_ID +#define BCM88551_DEVICE_ID 0x8551 +#define BCM88551_B1_REV_ID ARAD_B1_REV_ID +#define BCM88552_DEVICE_ID 0x8552 +#define BCM88552_B1_REV_ID ARAD_B1_REV_ID + +#define BCM88772_DEVICE_ID 0x8772 +#define BCM88952_DEVICE_ID 0x8952 +#define BCM88772_A1_REV_ID 0x0002 +#define BCM88952_A0_REV_ID 0x0001 +#define BCM88952_A1_REV_ID 0x0002 + +#define PLX9056_DEVICE_ID 0x9056 + +#define BCM56890_DEVICE_ID 0xb890 +#define BCM56890_A0_REV_ID 0x0001 +#define BCM56891_DEVICE_ID 0xb891 +#define BCM56891_A0_REV_ID 0x0001 +#define BCM56892_DEVICE_ID 0xb892 +#define BCM56892_A0_REV_ID 0x0001 +#define BCM56895_DEVICE_ID 0xb895 +#define BCM56895_A0_REV_ID 0x0001 +#define BCM56896_DEVICE_ID 0xb896 +#define BCM56896_A0_REV_ID 0x0001 + +#define BCM56690_DEVICE_ID 0xb690 +#define BCM56690_A0_REV_ID 0x0001 +#define BCM56692_DEVICE_ID 0xb692 +#define BCM56692_A0_REV_ID 0x0001 + +#define BCM56880_DEVICE_ID 0xb880 +#define BCM56880_A0_REV_ID 0x0001 +#define BCM56880_B0_REV_ID 0x0011 +#define BCM56881_DEVICE_ID 0xb881 +#define BCM56881_A0_REV_ID 0x0001 +#define BCM56881_B0_REV_ID 0x0011 +#define BCM56883_DEVICE_ID 0xb883 +#define BCM56883_A0_REV_ID 0x0001 +#define BCM56883_B0_REV_ID 0x0011 + +#define BCM56780_DEVICE_ID 0xb780 +#define BCM56780_A0_REV_ID 0x0001 +#define BCM56782_DEVICE_ID 0xb782 +#define BCM56782_A0_REV_ID 0x0001 +#define BCM56782_A1_REV_ID 0x0002 +#define BCM56784_DEVICE_ID 0xb784 +#define BCM56784_A0_REV_ID 0x0001 +#define BCM56785_DEVICE_ID 0xb785 +#define BCM56785_A0_REV_ID 0x0001 +#define BCM56786_DEVICE_ID 0xb786 +#define BCM56786_A0_REV_ID 0x0001 +#define BCM56786_A1_REV_ID 0x0002 +#define BCM56787_DEVICE_ID 0xb787 +#define BCM56787_A0_REV_ID 0x0001 +#define BCM56787_A1_REV_ID 0x0002 +#define BCM56788_DEVICE_ID 0xb788 +#define BCM56788_A0_REV_ID 0x0001 +#define BCM56788_A1_REV_ID 0x0002 +#define BCM56789_DEVICE_ID 0xb789 +#define BCM56789_A0_REV_ID 0x0001 + +#define BCM56990_DEVICE_ID 0xb990 +#define BCM56990_A0_REV_ID 0x0001 + +#ifndef BCM56990_DEVICE_ID +#define BCM56990_DEVICE_ID 0xb990 +#define BCM56990_A0_REV_ID 0x0001 +#endif +#define BCM56990_B0_REV_ID 0x0011 +#define BCM56991_DEVICE_ID 0xb991 +#define BCM56991_B0_REV_ID 0x0011 +#define BCM56992_DEVICE_ID 0xb992 +#define BCM56992_B0_REV_ID 0x0011 +#define BCM56993_DEVICE_ID 0xb993 +#define BCM56993_B0_REV_ID 0x0011 + +#define BCM56996_DEVICE_ID 0xb996 +#define BCM56996_A0_REV_ID 0x0001 +#define BCM56997_DEVICE_ID 0xb997 +#define BCM56997_A0_REV_ID 0x0001 + +#ifndef BCM56996_DEVICE_ID +#define BCM56996_DEVICE_ID 0xb996 +#define BCM56996_A0_REV_ID 0x0001 +#define BCM56997_DEVICE_ID 0xb997 +#endif +#define BCM56996_B0_REV_ID 0x0011 +#define BCM56997_B0_REV_ID 0x0011 + +#define BCM56998_DEVICE_ID 0xb998 +#define BCM56998_A0_REV_ID 0x0001 + +#define BCM56999_DEVICE_ID 0xb999 +#define BCM56999_A0_REV_ID 0x0001 +#define BCM56999_B0_REV_ID 0x0011 +#define BCM56995_DEVICE_ID 0xb995 +#define BCM56995_A0_REV_ID 0x0001 +#define BCM56995_B0_REV_ID 0x0011 + +#define BCM78900_DEVICE_ID 0xf900 +#define BCM78900_B0_REV_ID 0x0011 + +#define BCM78902_DEVICE_ID 0xf902 +#define BCM78902_B0_REV_ID 0x0011 + +#define BCM78903_DEVICE_ID 0xf903 +#define BCM78903_B0_REV_ID 0x0011 + +#define BCM78905_DEVICE_ID 0xf905 +#define BCM78905_A0_REV_ID 0x0001 + +#define BCM56080_DEVICE_ID 0xb080 +#define BCM56080_A0_REV_ID 0x0001 +#define BCM56080_A1_REV_ID 0x0002 +#define BCM56081_DEVICE_ID 0xb081 +#define BCM56081_A0_REV_ID 0x0001 +#define BCM56081_A1_REV_ID 0x0002 +#define BCM56082_DEVICE_ID 0xb082 +#define BCM56082_A0_REV_ID 0x0001 +#define BCM56082_A1_REV_ID 0x0002 +#define BCM56083_DEVICE_ID 0xb083 +#define BCM56083_A0_REV_ID 0x0001 +#define BCM56083_A1_REV_ID 0x0002 +#define BCM56084_DEVICE_ID 0xb084 +#define BCM56084_A0_REV_ID 0x0001 +#define BCM56084_A1_REV_ID 0x0002 +#define BCM56085_DEVICE_ID 0xb085 +#define BCM56085_A0_REV_ID 0x0001 +#define BCM56085_A1_REV_ID 0x0002 + +#endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h new file mode 100644 index 000000000000..e204a84b2ec2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h @@ -0,0 +1,39 @@ +/* + * $Id:$ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: drv.h + * Purpose: Driver definitions + */ + +#ifndef _SOC_DRV_H_ +#define _SOC_DRV_H_ + +/* DCB Library */ +#include + +#endif /* _SOC_DRV_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h new file mode 100644 index 000000000000..31ae2947bfb3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h @@ -0,0 +1,30 @@ +/* + * $Id:$ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * Stub header file + */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h new file mode 100644 index 000000000000..6658c81efa84 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h @@ -0,0 +1,1021 @@ +/* + * $Id: higig.h,v 1.29 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: higig.h + */ + +#include +#include + +#ifndef _SOC_HIGIG_H +#define _SOC_HIGIG_H + +#if defined(BCM_XGS_SUPPORT) || defined(BCM_PETRA_SUPPORT) || defined(BCM_DNX_SUPPORT) + +/**************************************************************************** + * Higig Header Format + * + * On BCM5670/BCM5675 (Hercules/Hercules1.5), to send or receive packets + * on an HG port, the following HIGIG header is always prepended to + * an UNTAGGED ethernet frame. + * + * ANSI only permits signed or unsigned int for bit field type. This + * structure will only work for compilers for which uint32 is unsigned + * int, and which completely pack bit fields beginning at the MSbit for + * big-endian machines and at the LSbit for little-endian machines. + * + * NOTE: these structures already put the the individual bytes in memory + * in big endian order for both big- and little-endian machines, so no + * further swapping is required. + ***************************************************************************/ + +typedef union soc_higig_hdr_u { + struct { + uint8 bytes[12]; + } overlay0; + +#if defined(LE_HOST) + + struct { /* Byte # */ + uint32 start:8; /* 0 */ + uint32 hgi:8; /* 1 */ + uint32 vlan_id_hi:4; /* 2 */ + uint32 vlan_cfi:1; + uint32 vlan_pri:3; + uint32 vlan_id_lo:8; /* 3 */ + uint32 opcode:3; /* 4 */ + uint32 src_mod:5; + uint32 src_port:6; /* 5 */ + uint32 pfm:2; + uint32 cos:3; /* 6 */ + uint32 dst_port:5; + uint32 dst_mod:5; /* 7 */ + uint32 cng:1; + uint32 hdr_format:2; + uint32 mirror:1; /* 8 */ + uint32 mirror_done:1; + uint32 mirror_only:1; + uint32 ingress_tagged:1; + uint32 dst_tgid:3; + uint32 dst_t:1; + uint32 _rsvd1:8; /* 9 */ + uint32 _rsvd2:8; /* 10 */ + uint32 _rsvd3:8; /* 11 */ + } overlay1; + + struct { /* Byte # */ + uint32 _rsvd1:8; /* 0 */ + uint32 _rsvd2:8; /* 1 */ + uint32 _rsvd3:8; /* 2 */ + uint32 _rsvd4:8; /* 3 */ + uint32 _rsvd5:8; /* 4 */ + uint32 tgid:6; /* 5 */ + uint32 _rsvd6:2; + uint32 _rsvd7:3; /* 6 */ + uint32 l2mc_ptr_lo:5; + uint32 l2mc_ptr_hi:5; /* 7 */ + uint32 _rsvd8:3; + uint32 ctag_hi:8; /* 8 */ + uint32 ctag_lo:8; /* 9 */ + uint32 _rsvd9:8; /* 10 */ + uint32 _rsvd10:8; /* 11 */ + } overlay2; + + struct { /* Byte # */ + uint32 start:8; /* 0 */ + uint32 dst_mod_6:1; /* 1 */ + uint32 src_mod_6:1; + uint32 hdr_ext_len:3; + uint32 cng_hi:1; + uint32 hgi:2; + uint32 vlan_id_hi:4; /* 2 */ + uint32 vlan_cfi:1; + uint32 vlan_pri:3; + uint32 vlan_id_lo:8; /* 3 */ + uint32 opcode:3; /* 4 */ + uint32 src_mod:5; + uint32 src_port:6; /* 5 */ + uint32 pfm:2; + uint32 cos:3; /* 6 */ + uint32 dst_port:5; + uint32 dst_mod:5; /* 7 */ + uint32 cng:1; + uint32 hdr_format:2; + uint32 mirror:1; /* 8 */ + uint32 mirror_done:1; + uint32 mirror_only:1; + uint32 ingress_tagged:1; + uint32 dst_tgid:3; + uint32 dst_t:1; + uint32 vc_label_19_16:4; /* 9 */ + uint32 label_present:1; + uint32 l3:1; + uint32 dst_mod_5:1; + uint32 src_mod_5:1; + uint32 vc_label_15_8:8; /* 10 */ + uint32 vc_label_7_0:8; /* 11 */ + } hgp_overlay1; + + struct { /* Byte # */ + uint32 start:8; /* 0 */ + uint32 dst_mod_6:1; /* 1 */ + uint32 src_mod_6:1; + uint32 hdr_ext_len:3; + uint32 cng_hi:1; + uint32 hgi:2; + uint32 vlan_id_hi:4; /* 2 */ + uint32 vlan_cfi:1; + uint32 vlan_pri:3; + uint32 vlan_id_lo:8; /* 3 */ + uint32 opcode:3; /* 4 */ + uint32 src_mod:5; + uint32 src_port:6; /* 5 */ + uint32 pfm:2; + uint32 cos:3; /* 6 */ + uint32 dst_port:5; + uint32 dst_mod:5; /* 7 */ + uint32 cng:1; + uint32 hdr_format:2; + uint32 mirror:1; /* 8 */ + uint32 mirror_done:1; + uint32 mirror_only:1; + uint32 ingress_tagged:1; + uint32 lag_failover:1; + uint32 donot_learn:1; + uint32 donot_modify:1; + uint32 dst_t:1; + uint32 vc_label_19_16:4; /* 9 */ + uint32 label_present:1; + uint32 l3:1; + uint32 dst_mod_5:1; + uint32 src_mod_5:1; + uint32 vc_label_15_8:8; /* 10 */ + uint32 vc_label_7_0:8; /* 11 */ + } hgp_overlay2; + +#else /* !LE_HOST */ + + struct { /* Byte # */ + uint32 start:8; /* 0 */ + uint32 hgi:8; /* 1 */ + uint32 vlan_pri:3; /* 2 */ + uint32 vlan_cfi:1; + uint32 vlan_id_hi:4; + uint32 vlan_id_lo:8; /* 3 */ + uint32 src_mod:5; /* 4 */ + uint32 opcode:3; + uint32 pfm:2; /* 5 */ + uint32 src_port:6; + uint32 dst_port:5; /* 6 */ + uint32 cos:3; + uint32 hdr_format:2; /* 7 */ + uint32 cng:1; + uint32 dst_mod:5; + uint32 dst_t:1; /* 8 */ + uint32 dst_tgid:3; + uint32 ingress_tagged:1; + uint32 mirror_only:1; + uint32 mirror_done:1; + uint32 mirror:1; + uint32 _rsvd1:8; /* 9 */ + uint32 _rsvd2:8; /* 10 */ + uint32 _rsvd3:8; /* 11 */ + } overlay1; + + struct { /* Byte # */ + uint32 _rsvd1:8; /* 0 */ + uint32 _rsvd2:8; /* 1 */ + uint32 _rsvd3:8; /* 2 */ + uint32 _rsvd4:8; /* 3 */ + uint32 _rsvd5:8; /* 4 */ + uint32 _rsvd6:2; /* 5 */ + uint32 tgid:6; + uint32 l2mc_ptr_lo:5; /* 6 */ + uint32 _rsvd7:3; + uint32 _rsvd8:3; /* 7 */ + uint32 l2mc_ptr_hi:5; + uint32 ctag_hi:8; /* 8 */ + uint32 ctag_lo:8; /* 9 */ + uint32 _rsvd9:8; /* 10 */ + uint32 _rsvd10:8; /* 11 */ + } overlay2; + + struct { /* Byte # */ + uint32 start:8; /* 0 */ + uint32 hgi:2; /* 1 */ + uint32 cng_hi:1; + uint32 hdr_ext_len:3; + uint32 src_mod_6:1; + uint32 dst_mod_6:1; + uint32 vlan_pri:3; /* 2 */ + uint32 vlan_cfi:1; + uint32 vlan_id_hi:4; + uint32 vlan_id_lo:8; /* 3 */ + uint32 src_mod:5; /* 4 */ + uint32 opcode:3; + uint32 pfm:2; /* 5 */ + uint32 src_port:6; + uint32 dst_port:5; /* 6 */ + uint32 cos:3; + uint32 hdr_format:2; /* 7 */ + uint32 cng:1; + uint32 dst_mod:5; + uint32 dst_t:1; /* 8 */ + uint32 dst_tgid:3; + uint32 ingress_tagged:1; + uint32 mirror_only:1; + uint32 mirror_done:1; + uint32 mirror:1; + uint32 src_mod_5:1; /* 9 */ + uint32 dst_mod_5:1; + uint32 l3:1; + uint32 label_present:1; + uint32 vc_label_19_16:4; + uint32 vc_label_15_8:8; /* 10 */ + uint32 vc_label_7_0:8; /* 11 */ + } hgp_overlay1; + + struct { /* Byte # */ + uint32 start:8; /* 0 */ + uint32 hgi:2; /* 1 */ + uint32 cng_hi:1; + uint32 hdr_ext_len:3; + uint32 src_mod_6:1; + uint32 dst_mod_6:1; + uint32 vlan_pri:3; /* 2 */ + uint32 vlan_cfi:1; + uint32 vlan_id_hi:4; + uint32 vlan_id_lo:8; /* 3 */ + uint32 src_mod:5; /* 4 */ + uint32 opcode:3; + uint32 pfm:2; /* 5 */ + uint32 src_port:6; + uint32 dst_port:5; /* 6 */ + uint32 cos:3; + uint32 hdr_format:2; /* 7 */ + uint32 cng:1; + uint32 dst_mod:5; + uint32 dst_t:1; /* 8 */ + uint32 donot_modify:1; + uint32 donot_learn:1; + uint32 lag_failover:1; + uint32 ingress_tagged:1; + uint32 mirror_only:1; + uint32 mirror_done:1; + uint32 mirror:1; + uint32 src_mod_5:1; /* 9 */ + uint32 dst_mod_5:1; + uint32 l3:1; + uint32 label_present:1; + uint32 vc_label_19_16:4; + uint32 vc_label_15_8:8; /* 10 */ + uint32 vc_label_7_0:8; /* 11 */ + } hgp_overlay2; + +#endif /* !LE_HOST */ + +} soc_higig_hdr_t; + +#define SOC_HIGIG_HDR_SIZE ((int) sizeof(soc_higig_hdr_t)) + +/* + * Higig Header Field Manipulation + */ + +typedef enum { + /* NOTE: strings in soc_higig_field_names[] must match */ + HG_invalid = -1, + HG_start = 0, + HG_hgi, + HG_vlan_tag, /* aggregate of pri, cfi, and id */ + HG_vlan_pri, + HG_vlan_cfi, + HG_vlan_id, + HG_src_mod, + HG_opcode, + HG_pfm, + HG_src_port, + HG_dst_port, + HG_cos, + HG_hdr_format, + HG_cng, + HG_dst_mod, + HG_dst_t, + HG_dst_tgid, + HG_ingress_tagged, + HG_mirror_only, + HG_mirror_done, + HG_mirror, + HG_tgid, + HG_l2mc_ptr, + HG_ctag, + HG_hdr_ext_len, /* HG+ fields */ + HG_l3, + HG_donot_modify, + HG_donot_learn, + HG_lag_failover, + HG_label_present, + HG_vc_label, +#if defined(BCM_HIGIG2_SUPPORT) + HG_tc, /* HG2 fields */ + HG_mcst, + HG_mgid, + HG_lbid, + HG_dp, + HG_ehv, + HG_ppd_type, + HG_src_t, + HG_multipoint, + HG_fwd_type, + HG_dst_vp, + HG_src_vp, + HG_vni, + HG_data_container_type, + HG_data_container, + HG_preserve_dscp, + HG_preserve_dot1p, + HG_dst_type, + HG_src_type, + HG_deferred_drop, + HG_vxlt_done, + HG_deferred_change_pkt_pri, + HG_new_pkt_pri, + HG_deferred_change_dscp, + HG_new_dscp, + HG_label_overlay_type, + HG_protection_status, + HG_replication_id, + HG_ether_type, + HG_class_id, + HG_cn, + HG_sw_gen, +#endif /* BCM_HIGIG2_SUPPORT */ + HG_COUNT +} soc_higig_field_t; + +#if defined(BCM_HIGIG2_SUPPORT) +#define SOC_HIGIG2_FIELD_NAMES_INIT \ + "tc", /* HG2 fields */ \ + "mcst", \ + "mgid", \ + "lbid", \ + "dp", \ + "ehv", \ + "ppd_type", \ + "src_t", \ + "multipoint", \ + "fwd_type", \ + "dst_vp", \ + "src_vp", \ + "vni", \ + "data_container_type", \ + "data_container", \ + "preserve_dscp", \ + "preserve_dot1p", \ + "dst_type", \ + "src_type", \ + "deferred_drop", \ + "vxlt_done", \ + "deferred_change_pkt_pri", \ + "new_pkt_pri", \ + "deferred_change_dscp", \ + "new_dscp", \ + "label_overlay_type", \ + "protection_status", \ + "replication_id", \ + "ether_type", \ + "class_id", \ + "cn", \ + "sw_gen", +#else +#define SOC_HIGIG2_FIELD_NAMES_INIT +#endif /* BCM_HIGIG2_SUPPORT */ + +/* NOTE: strings must match soc_higig_field_t */ +#define SOC_HIGIG_FIELD_NAMES_INIT \ + "start", \ + "hgi", \ + "vlan_tag", \ + "vlan_pri", \ + "vlan_cfi", \ + "vlan_id", \ + "src_mod", \ + "opcode", \ + "pfm", \ + "src_port", \ + "dst_port", \ + "cos", \ + "hdr_format", \ + "cng", \ + "dst_mod", \ + "dst_t", \ + "dst_tgid", \ + "ingress_tagged", \ + "mirror_only", \ + "mirror_done", \ + "mirror", \ + "tgid", \ + "l2mc_ptr", \ + "ctag", \ + "hdr_ext_len", /* HG+ fields */ \ + "l3", \ + "donot_modify", \ + "donot_learn", \ + "lag_failover", \ + "label_present", \ + "vc_label", \ + SOC_HIGIG2_FIELD_NAMES_INIT \ + NULL + +#ifdef BCM_HIGIG2_SUPPORT + +#define SOC_HIGIG2_START 0xfc /* Higig2 Module Header for CMIC TX */ + +typedef union soc_higig2_hdr_u { + struct { + uint8 bytes[16]; + } overlay0; + +#if defined(LE_HOST) + + struct { /* Byte # */ + /* "Legacy" PPD Overlay 1 */ + uint32 start:8; /* 0 */ + uint32 tc:4; /* 1 */ + uint32 mcst:1; + uint32 _rsvd1:3; + uint32 dst_mod:8; /* 2 */ + uint32 dst_port:8; /* 3 */ + uint32 src_mod:8; /* 4 */ + uint32 src_port:8; /* 5 */ + uint32 lbid:8; /* 6 */ + uint32 ppd_type:3; /* 7 */ + uint32 _rsvd2:2; + uint32 ehv:1; + uint32 dp:2; + uint32 mirror:1; /* 8 */ + uint32 mirror_done:1; + uint32 mirror_only:1; + uint32 ingress_tagged:1; + uint32 lag_failover:1; + uint32 donot_learn:1; + uint32 donot_modify:1; + uint32 dst_t:1; + uint32 vc_label_19_16:4; /* 9 */ + uint32 label_present:1; + uint32 l3:1; + uint32 label_overlay_type:2; + uint32 vc_label_15_8:8; /* 10 */ + uint32 vc_label_7_0:8; /* 11 */ + uint32 vlan_id_hi:4; /* 12 */ + uint32 vlan_cfi:1; + uint32 vlan_pri:3; + uint32 vlan_id_lo:8; /* 13 */ + uint32 opcode:3; /* 14 */ + uint32 preserve_dot1p:1; + uint32 preserve_dscp:1; + uint32 src_t:1; + uint32 pfm:2; + uint32 _rsvd5:5; /* 15 */ + uint32 hdr_ext_len:3; + } ppd_overlay1; + + struct { /* Byte # */ + /* "Legacy" PPD Overlay 2 */ + uint32 start:8; /* 0 */ + uint32 tc:4; /* 1 */ + uint32 mcst:1; + uint32 _rsvd1:3; + uint32 dst_mod:8; /* 2 */ + uint32 dst_port:8; /* 3 */ + uint32 src_mod:8; /* 4 */ + uint32 src_port:8; /* 5 */ + uint32 lbid:8; /* 6 */ + uint32 ppd_type:3; /* 7 */ + uint32 _rsvd2:2; + uint32 ehv:1; + uint32 dp:2; + uint32 ctag_hi:8; /* 8 */ + uint32 ctag_lo:8; /* 9 */ + uint32 _rsvd3:8; /* 10 */ + uint32 _rsvd4:8; /* 11 */ + uint32 vlan_id_hi:4; /* 12 */ + uint32 vlan_cfi:1; + uint32 vlan_pri:3; + uint32 vlan_id_lo:8; /* 13 */ + uint32 opcode:3; /* 14 */ + uint32 _rsvd5:2; + uint32 src_t:1; + uint32 pfm:2; + uint32 _rsvd6:5; /* 15 */ + uint32 hdr_ext_len:3; + } ppd_overlay2; + + struct { /* Byte # */ + /* "Next Gen" PPD Overlay 3 */ + uint32 start:8; /* 0 */ + uint32 tc:4; /* 1 */ + uint32 mcst:1; + uint32 _rsvd1:3; + uint32 dst_mod:8; /* 2 */ + uint32 dst_port:8; /* 3 */ + uint32 src_mod:8; /* 4 */ + uint32 src_port:8; /* 5 */ + uint32 lbid:8; /* 6 */ + uint32 ppd_type:3; /* 7 */ + uint32 _rsvd2:2; + uint32 ehv:1; + uint32 dp:2; + uint32 vni_mid:2; /* 8 */ + uint32 fwd_type:5; + uint32 multipoint:1; + uint32 vni_low:8; /* 9 */ + uint32 dst_vp_high:8; /* 10 */ + uint32 dst_vp_low:8; /* 11 */ + uint32 src_vp_high:8; /* 12 */ + uint32 src_vp_low:8; /* 13 */ + uint32 opcode:3; /* 14 */ + uint32 protection_status:1; + uint32 lag_failover:1; + uint32 donot_learn:1; + uint32 donot_modify:1; + uint32 mirror:1; + uint32 source_type:1; /* 15 */ + uint32 dest_type:1; + uint32 preserve_dot1p:1; + uint32 preserve_dscp:1; + uint32 vni_high:4; + } ppd_overlay3; + + struct { /* Byte # */ + /* "Offload Engine" PPD Overlay 4 */ + uint32 start:8; /* 0 */ + uint32 tc:4; /* 1 */ + uint32 mcst:1; + uint32 _rsvd1:3; + uint32 dst_mod:8; /* 2 */ + uint32 dst_port:8; /* 3 */ + uint32 src_mod:8; /* 4 */ + uint32 src_port:8; /* 5 */ + uint32 lbid:8; /* 6 */ + uint32 ppd_type:3; /* 7 */ + uint32 _rsvd2:2; + uint32 ehv:1; + uint32 dp:2; + + union { + /* The data container has several sub-formats */ + struct { /* Byte # */ + /* Abstract data container */ + uint8 bytes[4]; /* 8-11 */ + } abstract; + + struct { /* Byte # */ + uint32 ctag_hi:8; /* 8 */ + uint32 ctag_lo:8; /* 9 */ + uint32 deferred_change_dscp:1; /* 10 */ + uint32 new_pkt_pri:3; + uint32 deferred_change_pkt_pri:1; + uint32 vxlt_done:2; + uint32 deferred_drop:1; + uint32 _rsvd1:2; /* 11 */ + uint32 new_dscp:6; + } offload_engine; + } data_container; + + uint32 src_vp_high:8; /* 12 */ + uint32 src_vp_low:8; /* 13 */ + uint32 opcode:3; /* 14 */ + uint32 source_type:1; + uint32 _rsvd3:1; + uint32 donot_learn:1; + uint32 preserve_dot1p:1; + uint32 preserve_dscp:1; + uint32 data_container_type:4; /* 15 */ + uint32 _rsvd4:4; + } ppd_overlay4; + +#else /* !LE_HOST */ + + struct { /* Byte # */ + /* "Legacy" PPD Overlay 1 */ + uint32 start:8; /* 0 */ + uint32 _rsvd1:3; /* 1 */ + uint32 mcst:1; + uint32 tc:4; + uint32 dst_mod:8; /* 2 */ + uint32 dst_port:8; /* 3 */ + uint32 src_mod:8; /* 4 */ + uint32 src_port:8; /* 5 */ + uint32 lbid:8; /* 6 */ + uint32 dp:2; /* 7 */ + uint32 ehv:1; + uint32 _rsvd2:2; + uint32 ppd_type:3; + uint32 dst_t:1; /* 8 */ + uint32 donot_modify:1; + uint32 donot_learn:1; + uint32 lag_failover:1; + uint32 ingress_tagged:1; + uint32 mirror_only:1; + uint32 mirror_done:1; + uint32 mirror:1; + uint32 label_overlay_type:2; /* 9 */ + uint32 l3:1; + uint32 label_present:1; + uint32 vc_label_19_16:4; + uint32 vc_label_15_8:8; /* 10 */ + uint32 vc_label_7_0:8; /* 11 */ + uint32 vlan_pri:3; /* 12 */ + uint32 vlan_cfi:1; + uint32 vlan_id_hi:4; + uint32 vlan_id_lo:8; /* 13 */ + uint32 pfm:2; /* 14 */ + uint32 src_t:1; + uint32 preserve_dscp:1; + uint32 preserve_dot1p:1; + uint32 opcode:3; + uint32 hdr_ext_len:3; /* 15 */ + uint32 _rsvd5:5; + } ppd_overlay1; + + struct { /* Byte # */ + /* "Legacy" PPD Overlay 2 */ + uint32 start:8; /* 0 */ + uint32 _rsvd1:3; /* 1 */ + uint32 mcst:1; + uint32 tc:4; + uint32 dst_mod:8; /* 2 */ + uint32 dst_port:8; /* 3 */ + uint32 src_mod:8; /* 4 */ + uint32 src_port:8; /* 5 */ + uint32 lbid:8; /* 6 */ + uint32 dp:2; /* 7 */ + uint32 ehv:1; + uint32 _rsvd2:2; + uint32 ppd_type:3; + uint32 ctag_hi:8; /* 8 */ + uint32 ctag_lo:8; /* 9 */ + uint32 _rsvd3:8; /* 10 */ + uint32 _rsvd4:8; /* 11 */ + uint32 vlan_pri:3; /* 12 */ + uint32 vlan_cfi:1; + uint32 vlan_id_hi:4; + uint32 vlan_id_lo:8; /* 13 */ + uint32 pfm:2; /* 14 */ + uint32 src_t:1; + uint32 _rsvd5:2; + uint32 opcode:3; + uint32 hdr_ext_len:3; /* 15 */ + uint32 _rsvd6:5; + } ppd_overlay2; + + struct { /* Byte # */ + /* "Next Gen" PPD Overlay 3 */ + uint32 start:8; /* 0 */ + uint32 _rsvd1:3; /* 1 */ + uint32 mcst:1; + uint32 tc:4; + uint32 dst_mod:8; /* 2 */ + uint32 dst_port:8; /* 3 */ + uint32 src_mod:8; /* 4 */ + uint32 src_port:8; /* 5 */ + uint32 lbid:8; /* 6 */ + uint32 dp:2; /* 7 */ + uint32 ehv:1; + uint32 _rsvd2:2; + uint32 ppd_type:3; + uint32 multipoint:1; /* 8 */ + uint32 fwd_type:5; + uint32 vni_mid:2; + uint32 vni_low:8; /* 9 */ + uint32 dst_vp_high:8; /* 10 */ + uint32 dst_vp_low:8; /* 11 */ + uint32 src_vp_high:8; /* 12 */ + uint32 src_vp_low:8; /* 13 */ + uint32 mirror:1; /* 14 */ + uint32 donot_modify:1; + uint32 donot_learn:1; + uint32 lag_failover:1; + uint32 protection_status:1; + uint32 opcode:3; + uint32 vni_high:4; /* 15 */ + uint32 preserve_dscp:1; + uint32 preserve_dot1p:1; + uint32 dest_type:1; + uint32 source_type:1; + } ppd_overlay3; + + struct { /* Byte # */ + /* "Offload Engine" PPD Overlay 4 */ + uint32 start:8; /* 0 */ + uint32 _rsvd1:3; /* 1 */ + uint32 mcst:1; + uint32 tc:4; + uint32 dst_mod:8; /* 2 */ + uint32 dst_port:8; /* 3 */ + uint32 src_mod:8; /* 4 */ + uint32 src_port:8; /* 5 */ + uint32 lbid:8; /* 6 */ + uint32 dp:2; /* 7 */ + uint32 ehv:1; + uint32 _rsvd2:2; + uint32 ppd_type:3; + + union { + /* The data container has several sub-formats */ + struct { /* Byte # */ + /* Abstract data container */ + uint8 bytes[4]; /* 8-11 */ + } abstract; + + struct { /* Byte # */ + uint32 ctag_hi:8; /* 8 */ + uint32 ctag_lo:8; /* 9 */ + uint32 deferred_drop:1; /* 10 */ + uint32 vxlt_done:2; + uint32 deferred_change_pkt_pri:1; + uint32 new_pkt_pri:3; + uint32 deferred_change_dscp:1; + uint32 new_dscp:6; /* 11 */ + uint32 _rsvd1:2; + } offload_engine; + } data_container; + + uint32 src_vp_high:8; /* 12 */ + uint32 src_vp_low:8; /* 13 */ + uint32 preserve_dscp:1; /* 14 */ + uint32 preserve_dot1p:1; + uint32 donot_learn:1; + uint32 _rsvd3:1; + uint32 source_type:1; + uint32 opcode:3; + uint32 _rsvd4:4; /* 15 */ + uint32 data_container_type:4; + } ppd_overlay4; +#endif /* !LE_HOST */ + +} soc_higig2_hdr_t; + +#define SOC_HIGIG2_LABEL_OVERLAY_TYPE_VC_LABEL 0 +#define SOC_HIGIG2_LABEL_OVERLAY_TYPE_SYSTEM_INGRESS_PORT 1 +#define SOC_HIGIG2_LABEL_OVERLAY_TYPE_MIRROR_CLASS_TAG 2 +#define SOC_HIGIG2_LABEL_OVERLAY_TYPE_QTAG 3 + +#define SOC_HIGIG2_HDR_SIZE ((int) sizeof(soc_higig2_hdr_t)) + +extern uint32 soc_higig2_field_get(int unit, soc_higig2_hdr_t *hg, + soc_higig_field_t field); +extern void soc_higig2_field_set(int unit, soc_higig2_hdr_t *hg, + soc_higig_field_t field, uint32 val); +extern void soc_higig2_dump(int unit, char *pfx, soc_higig2_hdr_t *hg); + + +typedef union soc_higig3_hdr_u { + struct { + uint8 bytes[16]; + } overlay0; +#if defined(LE_HOST) + struct { + uint32 ethertype_high:8; + uint32 ethertype_mirror_copy:1; + uint32 ethertype_reserved:1; + uint32 ethertype_exthdr:2; + uint32 ethertype_ver:2; + uint32 ethertype_low:2; + uint32 system_dest_high:7; + uint32 system_dest_type:1; + uint32 system_dest_low:8; + + uint32 system_source_high:7; + uint32 l3_routed:1; + uint32 system_source_low:8; + uint32 entropy:8; + uint32 tc:4; + uint32 cn:2; + uint32 cng:2; + + uint32 class_id_high:2; + uint32 flags:6; + uint32 class_id_low:8; + uint32 forwarding_domain_high:8; + uint32 forwarding_domain_low:8; + + uint32 svp_high:8; + uint32 svp_low:8; + uint32 dvp_or_l3_iif_high:8; + uint32 dvp_or_l3_iif_low:8; + } hg3_overlay; +#else + struct { + /* Word 0 */ + uint32 ethertype_high:8; + uint32 ethertype_low:2; + uint32 ethertype_ver:2; + uint32 ethertype_exthdr:2; + uint32 ethertype_reserved:1; + uint32 ethertype_mirror_copy:1; + uint32 system_dest_type:1; + uint32 system_dest_high:7; + uint32 system_dest_low:8; + + /* Word 1 */ + uint32 l3_routed:1; + uint32 system_source_high:7; + uint32 system_source_low:8; + uint32 entropy:8; + uint32 cng:2; + uint32 cn:2; + uint32 tc:4; + + /* Extension header Type 0 */ + /* Word 2 */ + uint32 flags:6; + uint32 class_id_high:2; + uint32 class_id_low:8; + uint32 forwarding_domain_high:8; + uint32 forwarding_domain_low:8; + + /* Word 3 */ + uint32 svp_high:8; + uint32 svp_low:8; + uint32 dvp_or_l3_iif_high:8; + uint32 dvp_or_l3_iif_low:8; + } hg3_overlay; +#endif /* LE_HOST */ +} soc_higig3_hdr_t; + + +#define SOC_HIGIG3_HDR_SIZE ((int) sizeof(soc_higig3_hdr_t)) +extern uint32 soc_higig3_field_get(int unit, soc_higig3_hdr_t *hg, + soc_higig_field_t field); +extern void soc_higig3_field_set(int unit, soc_higig3_hdr_t *hg, + soc_higig_field_t field, uint32 val); +extern void soc_higig3_dump(int unit, char *pfx, soc_higig3_hdr_t *hg); + +#endif /* BCM_HIGIG2_SUPPORT */ + +extern soc_higig_field_t soc_higig_name_to_field(int unit, char *name); +extern char *soc_higig_field_to_name(int unit, soc_higig_field_t f); + +extern uint32 soc_higig_field_get(int unit, soc_higig_hdr_t *hg, + soc_higig_field_t field); +extern void soc_higig_field_set(int unit, soc_higig_hdr_t *hg, + soc_higig_field_t field, uint32 val); + +extern void soc_higig_dump(int unit, char *pfx, soc_higig_hdr_t *hg); + +/* HIGIG Header field default values */ + +/* default SOP Symbol */ +#define SOC_HIGIG_START 0xfb /* Default Start for BIGMAC */ + +/* HGI */ +#define SOC_HIGIG_HGI 0x80 /* Default HGI */ +#define SOC_HIGIG_HGI_MASK 0xc0 /* HGI field mask */ + +/* Module header Op-Codes */ +#define SOC_HIGIG_OP_CPU 0x00 /* CPU Frame */ +#define SOC_HIGIG_OP_UC 0x01 /* Unicast Frame */ +#define SOC_HIGIG_OP_BC 0x02 /* Broadcast or DLF frame */ +#define SOC_HIGIG_OP_MC 0x03 /* Multicast Frame */ +#define SOC_HIGIG_OP_IPMC 0x04 /* IP Multicast Frame */ + +#define SOC_HIGIG_DST_MOD_CPU 0x00 + +/* Header Format */ +#define SOC_HIGIG_HDR_DEFAULT 0x00 +#define SOC_HIGIG_HDR_CLASS_TAG 0x01 +#define SOC_HIGIG_HDR_EXT_LEN 0x02 +#define SOC_HIGIG_HDR_RSVD2 0x03 + +#if defined(BCM_XGS_SUPPORT) + +/* XGS Frame format */ +typedef struct xgs_pkt_s { + soc_higig_hdr_t higig_hdr; + enet_hdr_t enet_hdr; +} xgs_pkt_t; + +/* Hercules Header modes */ +#define SOC_XGS_ENCAP_IEEE 0x00 /* Standard IEEE 802.3 (Default) */ +#define SOC_XGS_ENCAP_HIGIG 0x01 /* Broadcom HIGIG Format */ +#define SOC_XGS_ENCAP_ALLYR 0x02 /* BCM5632 compatible mode */ +#define SOC_XGS_ENCAP_RSVP 0x03 /* Reserved */ + +/**************************************************************************** + * BCM5632 Header Format + * When the MAC is in BCM5632 header mode, we prepend the following + * two words of data to a standard 802.3 Ethernet Frame. + * + * ANSI only permits signed or unsigned int for bit field type. This + * structure will only work for compilers for which uint32 is unsigned + * int, and which completely pack bit fields beginning at the MSbit for + * big-endian machines and at the LSbit for little-endian machines. + * + * NOTE: these structures already put the the individual bytes in memory + * in big endian order for both big- and little-endian machines, so no + * further swapping is required. + ****************************************************************************/ + +typedef union soc_bcm5632_hdr_u { + struct { + uint8 bytes[8]; + } overlay0; + +#if defined(LE_HOST) + + struct { /* Byte # */ + uint32 d_portid:6; /* 0 */ + uint32 _rsvd1:2; + uint32 _rsvd2:8; /* 1 */ + uint32 _rsvd3:8; /* 2 */ + uint32 _rsvd4:8; /* 3 */ + + uint32 start:8; /* 4 */ + uint32 length_hi:8; /* 5 */ + uint32 length_lo:8; /* 6 */ + uint32 s_portid:6; /* 7 */ + uint32 _rsvd5:2; + } overlay1; + +#else /* !LE_HOST */ + + struct { /* Byte # */ + uint32 _rsvd1:2; /* 0 */ + uint32 d_portid:6; + uint32 _rsvd2:8; /* 1 */ + uint32 _rsvd3:8; /* 2 */ + uint32 _rsvd4:8; /* 3 */ + + uint32 start:8; /* 4 */ + uint32 length_hi:8; /* 5 */ + uint32 length_lo:8; /* 6 */ + uint32 _rsvd5:2; /* 7 */ + uint32 s_portid:6; + } overlay1; + +#endif + +} soc_bcm5632_hdr_t; + +#define SOC_BCM5632_HDR_SIZE ((int) sizeof(soc_bcm5632_hdr_t)) + +/* BCM5632 Frame format */ +typedef struct b5632_pkt_s { + soc_bcm5632_hdr_t b5632_hdr; + enet_hdr_t enet_hdr; +} b5632_pkt_t; + +/* BCM5632 Header field default values */ + +/* HGI */ +#define SOC_BCM5632_HGI 0x00 /* Default HGI for BCM5632 */ + +#endif /* defined(BCM_XGS_SUPPORT) */ + + +#define SOC_HIGIG_HDR_MAX_MODID 0xFF +#define SOC_HIGIG_E2ECC_MAX_PORT_STATUS 64 + +/* E2ECC Header */ +typedef union soc_higig_e2ecc_hdr_u { + struct { + uint8 bytes[32]; + } overlay0; + + struct { + uint32 words[8]; + } overlay1; + +} soc_higig_e2ecc_hdr_t; + + +#endif /* defined(BCM_XGS_SUPPORT) || defined(BCM_PETRA_SUPPORT)*/ + +#endif /* !_SOC_HIGIG_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h new file mode 100644 index 000000000000..31ae2947bfb3 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h @@ -0,0 +1,30 @@ +/* + * $Id:$ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * Stub header file + */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h new file mode 100644 index 000000000000..cc9269710fa9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h @@ -0,0 +1,269 @@ +/* + * $Id: rx.h,v 1.16 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + */ + +#ifndef _SOC_RX_H +#define _SOC_RX_H + +#include + +#include + +/* + * PKT RX Packet Reasons; reason CPU received the packet. + * Notes: + * It is possible no reasons are set (directed to CPU from ARL + * for example), or multiple reasons may be set. + * + * See "include/shared/rx.h" for full description. + */ + +typedef enum soc_rx_reason_e { + socRxReasonInvalid = _SHR_RX_INVALID, + socRxReasonArp = _SHR_RX_ARP, + socRxReasonBpdu = _SHR_RX_BPDU, + socRxReasonBroadcast = _SHR_RX_BROADCAST, + socRxReasonClassBasedMove = _SHR_RX_CLASS_BASED_MOVE, + socRxReasonClassTagPackets = _SHR_RX_CLASS_TAG_PACKETS, + socRxReasonControl = _SHR_RX_CONTROL, + socRxReasonCpuLearn = _SHR_RX_CPU_LEARN, + socRxReasonDestLookupFail = _SHR_RX_DEST_LOOKUP_FAIL, + socRxReasonDhcp = _SHR_RX_DHCP, + socRxReasonDosAttack = _SHR_RX_DOS_ATTACK, + socRxReasonE2eHolIbp = _SHR_RX_E2E_HOL_IBP, + socRxReasonEncapHigigError = _SHR_RX_ENCAP_HIGIG_ERROR, + socRxReasonFilterMatch = _SHR_RX_FILTER_MATCH, + socRxReasonGreChecksum = _SHR_RX_GRE_CHECKSUM, + socRxReasonGreSourceRoute = _SHR_RX_GRE_SOURCE_ROUTE, + socRxReasonHigigControl = _SHR_RX_HIGIG_CONTROL, + socRxReasonHigigHdrError = _SHR_RX_HIGIG_HDR_ERROR, + socRxReasonIcmpRedirect = _SHR_RX_ICMP_REDIRECT, + socRxReasonIgmp = _SHR_RX_IGMP, + socRxReasonIngressFilter = _SHR_RX_INGRESS_FILTER, + socRxReasonIp = _SHR_RX_IP, + socRxReasonIpfixRateViolation = _SHR_RX_IPFIX_RATE_VIOLATION, + socRxReasonIpMcastMiss = _SHR_RX_IP_MCAST_MISS, + socRxReasonIpmcReserved = _SHR_RX_IPMC_RSVD, + socRxReasonIpOptionVersion = _SHR_RX_IP_OPTION_VERSION, + socRxReasonIpmc = _SHR_RX_IPMC, + socRxReasonL2Cpu = _SHR_RX_L2_CPU, + socRxReasonL2DestMiss = _SHR_RX_L2_DEST_MISS, + socRxReasonL2LearnLimit = _SHR_RX_L2_LEARN_LIMIT, + socRxReasonL2Move = _SHR_RX_L2_MOVE, + socRxReasonL2MtuFail = _SHR_RX_L2_MTU_FAIL, + socRxReasonL2NonUnicastMiss = _SHR_RX_L2_NON_UNICAST_MISS, + socRxReasonL2SourceMiss = _SHR_RX_L2_SOURCE_MISS, + socRxReasonL3AddrBindFail = _SHR_RX_L3_ADDR_BIND_FAIL, + socRxReasonL3DestMiss = _SHR_RX_L3_DEST_MISS, + socRxReasonL3HeaderError = _SHR_RX_L3_HEADER_ERROR, + socRxReasonL3MtuFail = _SHR_RX_L3_MTU_FAIL, + socRxReasonL3Slowpath = _SHR_RX_L3_SLOW_PATH, + socRxReasonL3SourceMiss = _SHR_RX_L3_SOURCE_MISS, + socRxReasonL3SourceMove = _SHR_RX_L3_SOUCE_MOVE, + socRxReasonMartianAddr = _SHR_RX_MARTIAN_ADDR, + socRxReasonMcastIdxError = _SHR_RX_MCAST_IDX_ERROR, + socRxReasonMcastMiss = _SHR_RX_MCAST_MISS, + socRxReasonMimServiceError = _SHR_RX_MIM_SERVICE_ERROR, + socRxReasonMplsCtrlWordError = _SHR_RX_MPLS_CTRL_WORD_ERROR, + socRxReasonMplsError = _SHR_RX_MPLS_ERROR, + socRxReasonMplsInvalidAction = _SHR_RX_MPLS_INVALID_ACTION, + socRxReasonMplsInvalidPayload = _SHR_RX_MPLS_INVALID_PAYLOAD, + socRxReasonMplsLabelMiss = _SHR_RX_MPLS_LABEL_MISS, + socRxReasonMplsSequenceNumber = _SHR_RX_MPLS_SEQUENCE_NUMBER, + socRxReasonMplsTtl = _SHR_RX_MPLS_TTL, + socRxReasonMulticast = _SHR_RX_MULTICAST, + socRxReasonNhop = _SHR_RX_NHOP, + socRxReasonOAMError = _SHR_RX_OAM_ERROR, + socRxReasonOAMSlowpath = _SHR_RX_OAM_SLOW_PATH, + socRxReasonOAMLMDM = _SHR_RX_OAM_LMDM, + socRxReasonParityError = _SHR_RX_PARITY_ERROR, + socRxReasonProtocol = _SHR_RX_PROTOCOL, + socRxReasonSampleDest = _SHR_RX_SAMPLE_DEST, + socRxReasonSampleSource = _SHR_RX_SAMPLE_SOURCE, + socRxReasonSharedVlanMismatch = _SHR_RX_SHARED_VLAN_MISMATCH, + socRxReasonSourceRoute = _SHR_RX_SOURCE_ROUTE, + socRxReasonTimeStamp = _SHR_RX_TIME_STAMP, + socRxReasonTtl = _SHR_RX_TTL, + socRxReasonTtl1 = _SHR_RX_TTL1, + socRxReasonTunnelError = _SHR_RX_TUNNEL_ERROR, + socRxReasonUdpChecksum = _SHR_RX_UDP_CHECKSUM, + socRxReasonUnknownVlan = _SHR_RX_UNKNOWN_VLAN, + socRxReasonUrpfFail = _SHR_RX_URPF_FAIL, + socRxReasonVcLabelMiss = _SHR_RX_VC_LABEL_MISS, + socRxReasonVlanFilterMatch = _SHR_RX_VLAN_FILTER_MATCH, + socRxReasonWlanClientError = _SHR_RX_WLAN_CLIENT_ERROR, + socRxReasonWlanSlowpath = _SHR_RX_WLAN_SLOW_PATH, + socRxReasonWlanDot1xDrop = _SHR_RX_WLAN_DOT1X_DROP, + socRxReasonExceptionFlood = _SHR_RX_EXCEPTION_FLOOD, + socRxReasonTimeSync = _SHR_RX_TIMESYNC, + socRxReasonEAVData = _SHR_RX_EAV_DATA, + socRxReasonSamePortBridge = _SHR_RX_SAME_PORT_BRIDGE, + socRxReasonSplitHorizon = _SHR_RX_SPLIT_HORIZON, + socRxReasonL4Error = _SHR_RX_L4_ERROR, + socRxReasonStp = _SHR_RX_STP, + socRxReasonEgressFilterRedirect = _SHR_RX_EGRESS_FILTER_REDIRECT, + socRxReasonFilterRedirect = _SHR_RX_FILTER_REDIRECT, + socRxReasonLoopback = _SHR_RX_LOOPBACK, + socRxReasonVlanTranslate = _SHR_RX_VLAN_TRANSLATE, + socRxReasonMmrp = _SHR_RX_MMRP, + socRxReasonSrp = _SHR_RX_SRP, + socRxReasonTunnelControl = _SHR_RX_TUNNEL_CONTROL, + socRxReasonL2Marked = _SHR_RX_L2_MARKED, + socRxReasonWlanSlowpathKeepalive = _SHR_RX_WLAN_SLOWPATH_KEEPALIVE, + socRxReasonStation = _SHR_RX_STATION, + socRxReasonNiv = _SHR_RX_NIV, + socRxReasonNivPrioDrop = _SHR_RX_NIV_PRIO_DROP, + socRxReasonNivInterfaceMiss = _SHR_RX_NIV_INTERFACE_MISS, + socRxReasonNivRpfFail = _SHR_RX_NIV_RPF_FAIL, + socRxReasonNivTagInvalid = _SHR_RX_NIV_TAG_INVALID, + socRxReasonNivTagDrop = _SHR_RX_NIV_TAG_DROP, + socRxReasonNivUntagDrop = _SHR_RX_NIV_UNTAG_DROP, + socRxReasonTrill = _SHR_RX_TRILL, + socRxReasonTrillInvalid = _SHR_RX_TRILL_INVALID, + socRxReasonTrillMiss = _SHR_RX_TRILL_MISS, + socRxReasonTrillRpfFail = _SHR_RX_TRILL_RPF_FAIL, + socRxReasonTrillSlowpath = _SHR_RX_TRILL_SLOWPATH, + socRxReasonTrillCoreIsIs = _SHR_RX_TRILL_CORE_IS_IS, + socRxReasonTrillTtl = _SHR_RX_TRILL_TTL, + socRxReasonTrillName = _SHR_RX_TRILL_NAME, + socRxReasonBfdSlowpath = _SHR_RX_BFD_SLOWPATH, + socRxReasonBfd = _SHR_RX_BFD, + socRxReasonMirror = _SHR_RX_MIRROR, + socRxReasonRegexAction = _SHR_RX_REGEX_ACTION, + socRxReasonFailoverDrop = _SHR_RX_FAILOVER_DROP, + socRxReasonWlanTunnelError = _SHR_RX_WLAN_TUNNEL_ERROR, + socRxReasonMplsReservedEntropyLabel = \ + _SHR_RX_MPLS_RESERVED_ENTROPY_LABEL, + socRxReasonCongestionCnmProxy = _SHR_RX_CONGESTION_CNM_PROXY, + socRxReasonCongestionCnmProxyError = _SHR_RX_CONGESTION_CNM_PROXY_ERROR, + socRxReasonCongestionCnm = _SHR_RX_CONGESTION_CNM, + socRxReasonMplsUnknownAch = _SHR_RX_MPLS_UNKNOWN_ACH, + socRxReasonMplsLookupsExceeded = _SHR_RX_MPLS_LOOKUPS_EXCEEDED, + socRxReasonMplsIllegalReservedLabel = \ + _SHR_RX_MPLS_ILLEGAL_RESERVED_LABEL, + socRxReasonMplsRouterAlertLabel = _SHR_RX_MPLS_ROUTER_ALERT_LABEL, + socRxReasonNivPrune = _SHR_RX_NIV_PRUNE, + socRxReasonVirtualPortPrune = _SHR_RX_VIRTUAL_PORT_PRUNE, + socRxReasonNonUnicastDrop = _SHR_RX_NON_UNICAST_DROP, + socRxReasonTrillPacketPortMismatch = _SHR_RX_TRILL_PACKET_PORT_MISMATCH, + socRxReasonRegexMatch = _SHR_RX_REGEX_MATCH, + socRxReasonWlanClientMove = _SHR_RX_WLAN_CLIENT_MOVE, + socRxReasonWlanSourcePortMiss = _SHR_RX_WLAN_SOURCE_PORT_MISS, + socRxReasonWlanClientSourceMiss = _SHR_RX_WLAN_CLIENT_SOURCE_MISS, + socRxReasonWlanClientDestMiss = _SHR_RX_WLAN_CLIENT_DEST_MISS, + socRxReasonWlanMtu = _SHR_RX_WLAN_MTU, + socRxReasonL2GreSipMiss = _SHR_RX_L2GRE_SIP_MISS, + socRxReasonL2GreVpnIdMiss = _SHR_RX_L2GRE_VPN_ID_MISS, + socRxReasonTimesyncUnknownVersion = _SHR_RX_TIMESYNC_UNKNOWN_VERSION, + socRxReasonVxlanSipMiss = _SHR_RX_VXLAN_SIP_MISS, + socRxReasonVxlanVpnIdMiss = _SHR_RX_VXLAN_VPN_ID_MISS, + socRxReasonFcoeZoneCheckFail = _SHR_RX_FCOE_ZONE_CHECK_FAIL, + socRxReasonIpmcInterfaceMismatch = _SHR_RX_IPMC_INTERFACE_MISMATCH, + socRxReasonNat = _SHR_RX_NAT, + socRxReasonTcpUdpNatMiss = _SHR_RX_TCP_UDP_NAT_MISS, + socRxReasonIcmpNatMiss = _SHR_RX_ICMP_NAT_MISS, + socRxReasonNatFragment = _SHR_RX_NAT_FRAGMENT, + socRxReasonNatMiss = _SHR_RX_NAT_MISS, + socRxReasonUnknownSubtendingPort = _SHR_RX_UNKNOWN_SUBTENTING_PORT, + socRxReasonLLTagAbsentDrop = _SHR_RX_LLTAG_ABSENT_DROP, + socRxReasonLLTagPresentDrop = _SHR_RX_LLTAG_PRESENT_DROP, + socRxReasonOAMCCMSlowPath = _SHR_RX_OAM_CCM_SLOWPATH, + socRxReasonOAMIncompleteOpcode = _SHR_RX_OAM_INCOMPLETE_OPCODE, + socRxReasonReserved0 = _SHR_RX_RESERVED_0, + socRxReasonOAMMplsLmDm = _SHR_RX_OAM_MPLS_LMDM, + socRxReasonSat = _SHR_RX_SAT, + socRxReasonSampleSourceFlex = _SHR_RX_SAMPLE_SOURCE_FLEX, + socRxReasonFlexSflow = _SHR_RX_FLEX_SFLOW, + socRxReasonVxltMiss = _SHR_RX_VXLT_MISS, + socRxReasonTunnelDecapEcnError = _SHR_RX_TUNNEL_DECAP_ECN_ERROR, + socRxReasonTunnelObjectValidationFail = _SHR_RX_TUNNEL_OBJECT_VALIDATION_FAIL, + socRxReasonL3Cpu = _SHR_RX_L3_CPU, + socRxReasonTunnelAdaptLookupMiss = _SHR_RX_TUNNEL_ADAPT_LOOKUP_MISS, + socRxReasonPacketFlowSelectMiss = _SHR_RX_PACKET_FLOW_SELECT_MISS, + socRxReasonProtectionDataDrop = _SHR_RX_PROTECTION_DATA_DROP, + socRxReasonPacketFlowSelect = _SHR_RX_PACKET_FLOW_SELECT, + socRxReasonOtherLookupMiss = _SHR_RX_OTHER_LOOKUP_MISS, + socRxReasonInvalidTpid = _SHR_RX_INVALID_TPID, + socRxReasonMplsControlPacket = _SHR_RX_MPLS_CONTROL_PACKET, + socRxReasonTunnelTtlError = _SHR_RX_TUNNEL_TTL_ERROR, + socRxReasonL2HeaderError = _SHR_RX_L2_HEADER_ERROR, + socRxReasonOtherLookupHit = _SHR_RX_OTHER_LOOKUP_HIT, + socRxReasonL2SrcLookupMiss = _SHR_RX_L2_SRC_LOOKUP_MISS, + socRxReasonL2SrcLookupHit = _SHR_RX_L2_SRC_LOOKUP_HIT, + socRxReasonL2DstLookupMiss = _SHR_RX_L2_DST_LOOKUP_MISS, + socRxReasonL2DstLookupHit = _SHR_RX_L2_DST_LOOKUP_HIT, + socRxReasonL3SrcRouteLookupMiss = _SHR_RX_L3_SRC_ROUTE_LOOKUP_MISS, + socRxReasonL3SrcHostLookupMiss = _SHR_RX_L3_SRC_HOST_LOOKUP_MISS, + socRxReasonL3SrcRouteLookupHit = _SHR_RX_L3_SRC_ROUTE_LOOKUP_HIT, + socRxReasonL3SrcHostLookupHit = _SHR_RX_L3_SRC_HOST_LOOKUP_HIT, + socRxReasonL3DstRouteLookupMiss = _SHR_RX_L3_DST_ROUTE_LOOKUP_MISS, + socRxReasonL3DstHostLookupMiss = _SHR_RX_L3_DST_HOST_LOOKUP_MISS, + socRxReasonL3DstRouteLookupHit = _SHR_RX_L3_DST_ROUTE_LOOKUP_HIT, + socRxReasonL3DstHostLookupHit = _SHR_RX_L3_DST_HOST_LOOKUP_HIT, + socRxReasonVlanTranslate1Lookup1Miss = _SHR_RX_VLAN_TRANSLATE1_LOOKUP1_MISS, + socRxReasonVlanTranslate1Lookup2Miss = _SHR_RX_VLAN_TRANSLATE1_LOOKUP2_MISS, + socRxReasonMplsLookup1Miss = _SHR_RX_MPLS_LOOKUP1_MISS, + socRxReasonMplsLookup2Miss = _SHR_RX_MPLS_LOOKUP2_MISS, + socRxReasonL3TunnelLookupMiss = _SHR_RX_L3_TUNNEL_LOOKUP_MISS, + socRxReasonVlanTranslate2Lookup1Miss = _SHR_RX_VLAN_TRANSLATE2_LOOKUP1_MISS, + socRxReasonVlanTranslate2Lookup2Miss = _SHR_RX_VLAN_TRANSLATE2_LOOKUP2_MISS, + socRxReasonL2StuFail = _SHR_RX_L2_STU_FAIL, + socReasonSrCounterExceeded = _SHR_RX_SR_COUNTER_EXCEEDED, + socRxReasonSrCopyToCpuBit0 = _SHR_RX_SR_COPY_TO_CPU_BIT0, + socRxReasonSrCopyToCpuBit1 = _SHR_RX_SR_COPY_TO_CPU_BIT1, + socRxReasonSrCopyToCpuBit2 = _SHR_RX_SR_COPY_TO_CPU_BIT2, + socRxReasonSrCopyToCpuBit3 = _SHR_RX_SR_COPY_TO_CPU_BIT3, + socRxReasonSrCopyToCpuBit4 = _SHR_RX_SR_COPY_TO_CPU_BIT4, + socRxReasonSrCopyToCpuBit5 = _SHR_RX_SR_COPY_TO_CPU_BIT5, + socRxReasonL3HeaderMismatch = _SHR_RX_L3_HEADER_MISMATCH, + socRxReasonEtrapMonitor = _SHR_RX_ETRAP_MONITOR, + socRxReasonDlbMonitor = _SHR_RX_DLB_MONITOR, + socRxReasonIntTurnAround = _SHR_RX_INT_TURNAROUND, + socRxReasonCount = _SHR_RX_REASON_COUNT /* MUST BE LAST */ +} soc_rx_reason_t; + + +/* + * Set of "reasons" (see socRxReason*) why a packet came to the CPU. + */ +typedef _shr_rx_reasons_t soc_rx_reasons_t; + +/* + * Macro to add a reason (socRxReason*) to a set of + * reasons (soc_rx_reasons_t) + */ +#define SOC_RX_REASON_SET(_reasons, _reason) \ + _SHR_RX_REASON_SET(_reasons, _reason) + +/* + * Macro to clear a set of reasons (soc_rx_reasons_t). + */ +#define SOC_RX_REASON_CLEAR_ALL(_reasons) \ + _SHR_RX_REASON_CLEAR_ALL(_reasons) + +#endif /* !_SOC_RX_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h new file mode 100644 index 000000000000..836eede1a56c --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h @@ -0,0 +1,247 @@ +/* + * $Id: type19.h,v 1.4 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: soc/shared/dcbformats/type19.h + * Purpose: Define dma control block (DCB) format for a type19 DCB + * used by the 56640 (Triumph3/Firebolt4) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE19_H +#define _SOC_SHARED_DCBFORMATS_TYPE19_H + +/* + * DMA Control Block - Type 19 + * Used on 5663x devices + * 16 words + */ +typedef struct { + uint32 addr; /* T19.0: physical address */ + /* T19.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, + c_stat:1, + c_hg:1, + c_reload:1, + c_sg:1, + c_chain:1, + c_count:16; +#endif /* LE_HOST */ + uint32 mh0; /* T19.2: Module Header word 0 */ + uint32 mh1; /* T19.3: Module Header word 1 */ + uint32 mh2; /* T19.4: Module Header word 2 */ + uint32 mh3; /* T19.5: Module Header word 3 */ +#ifdef LE_HOST + /* T19.6: RX Status 0 */ + uint32 :3, /* Reserved */ + mtp_index:5, /* MTP index */ + cpu_cos:6, /* COS queue for CPU packets */ + :2, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_pri:3; /* Inner priority */ + + /* T19.7 */ + uint32 reason_hi:16, /* CPU opcode (high bits) */ + pkt_len:14, /* Packet length */ + :2; /* Reserved */ + + /* T19.8 */ + uint32 reason; /* CPU opcode */ + + /* T19.9 */ + uint32 dscp:8, /* New DSCP */ + chg_tos:1, /* DSCP has been changed by HW */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + regen_crc:1, /* Packet modified and needs new CRC */ + :2, /* Reserved */ + outer_vid:12, /* Outer VLAN ID */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3; /* Outer priority */ + + /* T19.10 */ + uint32 timestamp; /* Timestamp */ + + /* T19.11 */ + uint32 cos:4, /* COS */ + higig_cos:5, /* Higig COS */ + vlan_cos:5, /* VLAN COS */ + shaping_cos_sel:2, /* Shaping COS Select */ + vfi:12, /* Internal VFI value */ + :4; /* Reserved */ + + /* T19.12 */ + uint32 srcport:8, /* Source port number */ + hgi:2, /* Higig Interface Format Indicator */ + itag_status:2, /* Ingress incoming tag status */ + otag_action:2, /* Ingress Outer tag action */ + itag_action:2, /* Ingress Inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + imirror:1, /* Ingress Mirroring */ + emirror:1, /* Egress Mirroring */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + :5; /* Reserved */ + + /* T19.13 */ + uint32 orig_dstport:6, /* Original dst port (EP redirection) */ + true_egr_mirror:1, /* True egress mirrored */ + egr_cpu_copy:1, /* True egress copy-to-CPU */ + oam_pkt:1, /* OAM packet */ + eh_tbl_idx:2, /* Extended Higig table select */ + eh_tag_type:2, /* Extended Higig tag type */ + eh_tm:1, /* Extended Higig traffic manager ctrl */ + eh_queue_tag:16, /* Extended Higig queue tag */ + :2; /* Reserved */ + + /* T19.14 */ + uint32 l3_intf:15, /* L3 Intf num / Next hop idx */ + :1, /* Reserved */ + match_rule:8, /* Matched FP rule */ + :8; /* Reserved */ + + /* T19.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers.*/ + dc:10, /* Don't Care */ + done:1; /* Descriptor Done */ +#else + /* T19.6: RX Status 0 */ + uint32 inner_pri:3, /* Inner priority */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :2, /* Reserved */ + cpu_cos:6, /* COS queue for CPU packets */ + mtp_index:5, /* MTP index */ + :3; /* Reserved */ + + /* T19.7 */ + uint32 :2, /* Reserved */ + pkt_len:14, /* Packet length */ + reason_hi:16; /* CPU opcode (high bits) */ + + /* T19.8 */ + uint32 reason; /* CPU opcode */ + + /* T19.9 */ + uint32 outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_vid:12, /* Outer VLAN ID */ + :2, /* Reserved */ + regen_crc:1, /* Packet modified and needs new CRC */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:8; /* New DSCP */ + + /* T19.10 */ + uint32 timestamp; /* Timestamp */ + + /* T19.11 */ + uint32 :4, /* Reserved */ + vfi:12, /* Internal VFI value */ + shaping_cos_sel:2, /* Shaping COS Select */ + vlan_cos:5, /* VLAN COS */ + higig_cos:5, /* Higig COS */ + cos:4; /* COS */ + + /* T19.12 */ + uint32 :5, /* Reserved */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + emirror:1, /* Egress Mirroring */ + imirror:1, /* Ingress Mirroring */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress Inner tag action */ + otag_action:2, /* Ingress Outer tag action */ + itag_status:2, /* Ingress incoming tag status */ + hgi:2, /* Higig Interface Format Indicator */ + srcport:8; /* Source port number */ + + /* T19.13 */ + uint32 :2, /* Reserved */ + eh_queue_tag:16, /* Extended Higig queue tag */ + eh_tm:1, /* Extended Higig traffic manager ctrl */ + eh_tag_type:2, /* Extended Higig tag type */ + eh_tbl_idx:2, /* Extended Higig table select */ + oam_pkt:1, /* OAM packet */ + egr_cpu_copy:1, /* True egress copy-to-CPU */ + true_egr_mirror:1, /* True egress mirrored */ + orig_dstport:6; /* Original dst port (EP redirection) */ + + /* T19.14 */ + uint32 :8, /* Reserved */ + match_rule:8, /* Matched FP rule */ + :1, /* Reserved */ + l3_intf:15; /* L3 Intf num / Next hop idx */ + + /* T19.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + dc:10, /* Don't Care */ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers. */ + pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb19_t; + +#endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h new file mode 100644 index 000000000000..4edcfbe62d68 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h @@ -0,0 +1,298 @@ +/* + * $Id: type23.h,v 1.6 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: soc/shared/dcbformats/type23.h + * Purpose: Define dma control block (DCB) format for a type23 DCB + * used by the 56640 (Triumph3/Firebolt4) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE23_H +#define _SOC_SHARED_DCBFORMATS_TYPE23_H + +/* + * DMA Control Block - Type 23 + * Used on 56640 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T23.0: physical address */ + /* T23.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + uint32 reason_hi; /* T23.2: CPU opcode (hi bits) */ + uint32 reason; /* T23.3: CPU opcode (low bits) */ +#ifdef LE_HOST + union { /* T23.4 */ + struct { + uint32 queue_num:16, /* Queue number for CPU packets */ + outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4; /* CPU opcode type */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + :26; /* Reserved */ + } overlay2; + } word4; + + /* T23.5 */ + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T23.4 */ + struct { + uint32 cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12, /* Outer VLAN ID */ + queue_num:16; /* Queue number for CPU packets */ + } overlay1; + struct { + uint32 :26, /* Reserved */ + cpu_cos:6; /* CPU COS */ + } overlay2; + } word4; + + /* T23.5 */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ +#endif + + uint32 mh0; /* T23.6: Module Header word 0 */ + uint32 mh1; /* T23.7: Module Header word 1 */ + uint32 mh2; /* T23.8: Module Header word 2 */ + uint32 mh3; /* T23.9: Module Header word 3 */ +#ifdef LE_HOST + /* T23.10 */ + uint32 inner_pri:3, /* Inner priority */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + regen_crc:1, /* Packet modified and needs new CRC */ + repl_nhi:19, /* Replication or Next Hop index */ + vfi_valid:1, /* Validates VFI field */ + :7; /* Reserved */ + + union { /* T23.11 */ + struct { + uint32 dscp:6, /* New DSCP (+ special pkt type:3) */ + chg_tos:1, /* DSCP has been changed by HW */ + vntag_action:2, /* VN tag action */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + decap_tunnel_type:5,/* Tunnel type that was decapsulated */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + :1; /* Reserved */ + } overlay1; + struct { + uint32 special_pkt_type:3, /* Special packet type (OAM, BFD) */ + :29; /* Reserved */ + } overlay2; + } word11; + + union { /* T23.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 vfi:14, /* VFI or FID */ + :18; /* Reserved */ + } overlay2; + } word12; + + /* T23.13 */ + uint32 itag_status:2, /* Ingress Inner tag status */ + otag_action:2, /* Ingress Outer tag action */ + itag_action:2, /* Ingress Inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + all_switch_drop:1, /* All switched copies dropped */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + special_pkt:1, /* Special Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + loopback_pkt_type:4, /* Loopback packet type */ + mtp_index:5, /* MTP index */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + union { /* T23.14 */ + struct { + uint32 timestamp_hi; /* Timestamp upper bits */ + } overlay1; + struct { + uint32 eh_seg_sel:3, /* HG2 EH seg sel */ + eh_tag_type:2, /* HG2 EH tag type */ + eh_tm:1, /* HG2 EH tm */ + eh_queue_tag: 16, /* HG2 EH queue tag */ + eh_tag_reserved:10; /* Reserved */ + } overlay2; + struct { + uint32 rx_bfd_session_index:11, /* Rx BFD pkt session ID */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + :11; /* Reserved */ + } overlay3; + } word14; + + /* T23.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers.*/ + :10, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T23.10 */ + uint32 :7, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + repl_nhi:19, /* Replication or Next Hop index */ + regen_crc:1, /* Packet modified and needs new CRC */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + inner_pri:3; /* Inner priority */ + + union { /* T23.11 */ + struct { + uint32 :1, /* Reserved */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + decap_tunnel_type:5,/* Tunnel type that was decapsulated */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + vntag_action:2, /* VN tag action */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP (+ special pkt type:3) */ + } overlay1; + struct { + uint32 :29, /* Reserved */ + special_pkt_type:3; /* Special packet type (OAM, BFD) */ + } overlay2; + } word11; + + union { /* T23.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 :18, /* Reserved */ + vfi:14; /* VFI or FID */ + } overlay2; + } word12; + + /* T23.13 */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* MTP index */ + loopback_pkt_type:4, /* Loopback packet type */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + special_pkt:1, /* Special Packet indicator */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + all_switch_drop:1, /* All switched copies dropped */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress Inner tag action */ + otag_action:2, /* Ingress Outer tag action */ + itag_status:2; /* Ingress Inner tag status */ + + union { /* T23.14 */ + struct { + uint32 timestamp_hi; /* Timestamp upper bits */ + } overlay1; + struct { + uint32 eh_tag_reserved:10, /* Reserved */ + eh_queue_tag: 16, /* HG2 EH queue tag */ + eh_tm:1, /* HG2 EH tm */ + eh_tag_type:2, /* HG2 EH tag type */ + eh_seg_sel:3; /* HG2 EH seg sel */ + } overlay2; + struct { + uint32 :11, /* Reserved */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_session_index:11; /* Rx BFD pkt session ID */ + } overlay3; + } word14; + + /* T23.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :10, /* Reserved */ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers. */ + pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb23_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h new file mode 100644 index 000000000000..52667f664e56 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h @@ -0,0 +1,280 @@ +/* + * $Id: type24.h,v 1.3 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: soc/shared/dcbformats/type24.h + * Purpose: Define dma control block (DCB) format for a type24 DCB + * used by the 56440 (Katana) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE24_H +#define _SOC_SHARED_DCBFORMATS_TYPE24_H + +/* + * DMA Control Block - Type 24 + * Used on 56440 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T24.0: physical address */ + /* T24.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + uint32 reason_hi; /* T24.2: CPU opcode (hi bits) */ + uint32 reason; /* T24.3: CPU opcode (low bits) */ +#ifdef LE_HOST + union { /* T24.4 */ + struct { + uint32 queue_num:16, /* Queue number for CPU packets */ + :4, /* Reserved */ + outer_vid:12; /* Outer VLAN ID */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + :26; /* Reserved */ + } overlay2; + } word4; + + /* T24.5 */ + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T24.4 */ + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + :4, /* Reserved */ + queue_num:16; /* Queue number for CPU packets */ + } overlay1; + struct { + uint32 :26, /* Reserved */ + cpu_cos:6; /* CPU COS */ + } overlay2; + } word4; + + /* T24.5 */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ +#endif + + uint32 mh0; /* T24.6: Module Header word 0 */ + uint32 mh1; /* T24.7: Module Header word 1 */ + uint32 mh2; /* T24.8: Module Header word 2 */ + uint32 mh3; /* T24.9: Module Header word 3 */ +#ifdef LE_HOST + /* T24.10 */ + uint32 inner_pri:3, /* Inner priority */ + :1, /* Reserved */ + regen_crc:1, /* Packet modified and needs new CRC */ + repl_nhi:19, /* Replication or Next Hop index */ + vfi_valid:1, /* Validates VFI field */ + :7; /* Reserved */ + + union { /* T24.11 */ + struct { + uint32 dscp:6, /* New DSCP (+ oam pkt type:3) */ + chg_tos:1, /* DSCP has been changed by HW */ + vntag_action:2, /* VN tag action */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + decap_tunnel_type:5,/* Tunnel type that was decapsulated */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + :1; /* Reserved */ + } overlay1; + struct { + uint32 special_pkt_type:3, /* Special packet type (OAM, BFD) */ + :29; /* Reserved */ + } overlay2; + } word11; + + /* T24.12 */ + uint32 timestamp; /* Timestamp (+ VFI:14) */ + + /* T24.13 */ + uint32 itag_status:2, /* Ingress Inner tag status */ + otag_action:2, /* Ingress Outer tag action */ + itag_action:2, /* Ingress Inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + all_switch_drop:1, /* All switched copies dropped */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + oam_pkt:1, /* OAM Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + loopback_pkt_type:4, /* Loopback packet type */ + mtp_index:5, /* MTP index */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + union { /* T24.14 */ + struct { + uint32 timestamp_hi; /* Timestamp upper bits */ + } overlay1; + struct { + uint32 eh_seg_sel:3, /* HG2 EH seg sel */ + eh_tag_type:2, /* HG2 EH tag type */ + eh_tm:1, /* HG2 EH tm */ + eh_queue_tag: 16, /* HG2 EH queue tag */ + eh_tag_reserved:10; /* Reserved */ + } overlay2; + struct { + uint32 rx_bfd_session_index:11, /* Rx BFD pkt session ID */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + :11; /* Reserved */ + } overlay3; + } word14; + + /* T24.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers.*/ + :10, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T24.10 */ + uint32 :7, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + repl_nhi:19, /* Replication or Next Hop index */ + regen_crc:1, /* Packet modified and needs new CRC */ + :1, /* Reserved */ + inner_pri:3; /* Inner priority */ + + + union { /* T24.11 */ + struct { + uint32 :1, /* Reserved */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + decap_tunnel_type:5,/* Tunnel type that was decapsulated */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + vntag_action:2, /* VN tag action */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP (+ oam pkt type:3) */ + } overlay1; + struct { + uint32 :29, /* Reserved */ + special_pkt_type:3; /* Special packet type (OAM, BFD) */ + } overlay2; + } word11; + + /* T24.12 */ + uint32 timestamp; /* Timestamp (+ VFI:14) */ + + /* T24.13 */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* MTP index */ + loopback_pkt_type:4, /* Loopback packet type */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + oam_pkt:1, /* OAM Packet indicator */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + all_switch_drop:1, /* All switched copies dropped */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress Inner tag action */ + otag_action:2, /* Ingress Outer tag action */ + itag_status:2; /* Ingress Inner tag status */ + + union { /* T24.14 */ + struct { + uint32 timestamp_hi; /* Timestamp upper bits */ + } overlay1; + struct { + uint32 eh_tag_reserved:10, /* Reserved */ + eh_queue_tag: 16, /* HG2 EH queue tag */ + eh_tm:1, /* HG2 EH tm */ + eh_tag_type:2, /* HG2 EH tag type */ + eh_seg_sel:3; /* HG2 EH seg sel */ + } overlay2; + struct { + uint32 :11, /* Reserved */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_session_index:11; /* Rx BFD pkt session ID */ + } overlay3; + } word14; + + /* T24.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :10, /* Reserved */ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers. */ + pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb24_t; +#endif + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h new file mode 100644 index 000000000000..2d9d70156ae4 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h @@ -0,0 +1,335 @@ +/* + * $Id: type26.h,v 1.5 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: soc/shared/dcbformats/type26.h + * Purpose: Define dma control block (DCB) format for a type26 DCB + * used by the 56850 (Trident2) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE26_H +#define _SOC_SHARED_DCBFORMATS_TYPE26_H + +/* + * DMA Control Block - Type 26 + * Used on 56850 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T26.0: physical address */ + /* T26.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + + /* T26.2 (word 12 in EP_TO_CPU_HDR) */ + uint32 reason_hi; /* CPU opcode (hi bits) */ + /* T26.3 (word 11 in EP_TO_CPU_HDR) */ + uint32 reason; /* CPU opcode (low bits) */ + +#ifdef LE_HOST + union { /* T26.4 (word 10 in EP_TO_CPU_HDR) */ + struct { + uint32 queue_num:12, /* Queue number for CPU packets */ + :4, /* Reserved */ + outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4; /* CPU opcode type */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + :10, /* Reserved */ + outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4; /* CPU opcode type */ + } overlay2; + } word4; + + /* T26.5 (word 9 in EP_TO_CPU_HDR) */ + uint32 srcport:7, /* Source port number */ + :1, /* Reserved */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T26.4 (word 10 in EP_TO_CPU_HDR) */ + struct { + uint32 cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12, /* Outer VLAN ID */ + :4, /* Reserved */ + queue_num:12; /* Queue number for CPU packets */ + } overlay1; + struct { + uint32 cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12, /* Outer VLAN ID */ + :10, /* Reserved */ + cpu_cos:6; /* CPU COS */ + } overlay2; + } word4; + + /* T26.5 (word 9 in EP_TO_CPU_HDR) */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + :1, /* Reserved */ + srcport:7; /* Source port number */ +#endif + + /* T26.6 (word 8 in EP_TO_CPU_HDR) */ + uint32 mh0; /* Module Header word 0 */ + /* T26.7 (word 7 in EP_TO_CPU_HDR) */ + uint32 mh1; /* Module Header word 1 */ + /* T26.8 (word 6 in EP_TO_CPU_HDR) */ + uint32 mh2; /* Module Header word 2 */ + /* T26.9 (word 5 in EP_TO_CPU_HDR) */ + uint32 mh3; /* Module Header word 3 */ + +#ifdef LE_HOST + /* T26.10 (word 4 in EP_TO_CPU_HDR) */ + uint32 inner_pri:3, /* Inner priority */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + regen_crc:1, /* Packet modified and needs new CRC */ + repl_nhi:17, /* Replication or Next Hop index */ + :2, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + :7; /* Reserved */ + + union { /* T26.11 (word 3 in EP_TO_CPU_HDR) */ + struct { + uint32 dscp:6, /* New DSCP */ + chg_tos:1, /* DSCP has been changed by HW */ + vntag_action:2, /* VN tag action */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + decap_tunnel_type:4,/* Tunnel type that was decapsulated */ + :1, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + mcq:1; /* Multicast queue */ + } overlay1; + struct { + uint32 special_pkt_type:3, /* Special packet type (OAM, BFD) */ + :29; /* Reserved */ + } overlay2; + } word11; + +#else + /* T26.10 (word 4 in EP_TO_CPU_HDR) */ + uint32 :7, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + :2, /* Reserved */ + repl_nhi:17, /* Replication or Next Hop index */ + regen_crc:1, /* Packet modified and needs new CRC */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + inner_pri:3; /* Inner priority */ + + union { /* T26.11 (word 3 in EP_TO_CPU_HDR) */ + struct { + uint32 mcq:1, /* Multicast queue */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :1, /* Reserved */ + decap_tunnel_type:4,/* Tunnel type that was decapsulated */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + vntag_action:2, /* VN tag action */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP */ + } overlay1; + struct { + uint32 :29, /* Reserved */ + special_pkt_type:3; /* Special packet type (OAM, BFD) */ + } overlay2; + } word11; + +#endif + /* T26.12 (word 2 in EP_TO_CPU_HDR) */ + uint32 timestamp; /* Timestamp */ + +#ifdef LE_HOST + /* T26.13 (word 1 in EP_TO_CPU_HDR) */ + uint32 tag_status:2, /* Ingress incoming tag status */ + otag_action:2, /* Ingress outer tag action */ + itag_action:2, /* Ingress inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + all_switch_drop:1, /* All switched copies dropped */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + special_pkt:1, /* Special Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + loopback_pkt_type:3, /* Loopback packet type */ + :1, /* Reserved */ + mtp_index:5, /* MTP index */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + union { /* T26.14 (word 0 in EP_TO_CPU_HDR) */ + uint32 timestamp_hi; /* Timestamp upper bits */ + struct { /* EH_TYPE_0 */ + uint32 eh_queue_tag:16, + :3, + eh_tag_type:2, + eh_seg_sel:3, + :3, + os1588_done:1, + eh_type:4; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 classid: 9, + l3_iif:14, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_queue_tag: 14, + classid:9, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay3; + struct { + uint32 rx_bfd_session_index:12, /* Rx BFD pkt session ID */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + :10; /* Reserved */ + } overlay4; + } word14; + + /* T26.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + pktdata_read_ecc_error:1, /* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers.*/ + :10, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T26.13 (word 1 in EP_TO_CPU_HDR) */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* MTP index */ + :1, /* Reserved */ + loopback_pkt_type:3, /* Loopback packet type */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + special_pkt:1, /* Special Packet indicator */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + all_switch_drop:1, /* All switched copies dropped */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress inner tag action */ + otag_action:2, /* Ingress outer tag action */ + tag_status:2; /* Ingress incoming tag status */ + + union { /* T26.14 (word 0 in EP_TO_CPU_HDR) */ + uint32 timestamp_hi; /* Timestamp upper bits */ + struct { /* EH_TYPE_0 */ + uint32 eh_type:4, + os1588_done:1, + :3, + eh_seg_sel:3, + eh_tag_type:2, + :3, + eh_queue_tag:16; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + l3_iif:14, + classid: 9; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + classid:9, + eh_queue_tag:14; + } overlay3; + struct { + uint32 :10, /* Reserved */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_session_index:12; /* Rx BFD pkt session ID */ + } overlay4; + } word14; + + /* T26.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :10, /* Reserved */ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers. */ + pktdata_read_ecc_error:1, /* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb26_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h new file mode 100644 index 000000000000..723d36613f0c --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h @@ -0,0 +1,339 @@ +/* + * $Id: type29.h,v 1.2 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: soc/shared/dcbformats/type29.h + * Purpose: Define dma control block (DCB) format for a type29 DCB + * used by the 56450 (Katana-2) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE29_H +#define _SOC_SHARED_DCBFORMATS_TYPE29_H + +/* + * DMA Control Block - Type 29 + * Used on 56450 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T29.0: physical address */ + /* T21.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + +#ifdef LE_HOST + union { /* T29.2 */ + struct { + uint32 reason_hi; /* CPU opcode (hi bits) */ + } overlay1; + struct { + uint32 reason_hi:18, + ma_ptr:13, /* OAM session pointer */ + :1; /* Reserved */ + } overlay2; + } word2; +#else + union { /* T29.2 */ + struct { + uint32 reason_hi; /* CPU opcode (hi bits) */ + } overlay1; + struct { + uint32 :1, /* Reserved */ + ma_ptr:13, /* OAM session pointer */ + reason_hi:18; + } overlay2; + } word2; +#endif + + uint32 reason; /* T29.3: CPU opcode (low bits) */ + +#ifdef LE_HOST + union { /* T29.4 */ + struct { + uint32 queue_num:16, /* Queue number for CPU packets */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + :26; /* Reserved */ + } overlay2; + struct { + uint32 queue_num:15, /* Queue number for CPU packets */ + olp_encap_oam_pkt:1,/* OLP encapsulated OAM packet */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay3; /* Overlay1 is not used in Saber2. + This is used instead */ + } word4; + + /* T29.5 */ + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T29.4 */ + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + queue_num:16; /* Queue number for CPU packets */ + } overlay1; + struct { + uint32 :26, /* Reserved */ + cpu_cos:6; /* CPU COS */ + } overlay2; + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + olp_encap_oam_pkt:1,/* OLP encapsulated OAM packet */ + queue_num:15; /* Queue number for CPU packets */ + } overlay3; /* Overlay1 is not used in Saber2. + This is used instead */ + } word4; + + /* T29.5 */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ +#endif + + uint32 mh0; /* T29.6: Module Header word 0 */ + uint32 mh1; /* T29.7: Module Header word 1 */ + uint32 mh2; /* T29.8: Module Header word 2 */ + uint32 mh3; /* T29.9: Module Header word 3 */ +#ifdef LE_HOST + /* T29.10 */ + uint32 inner_pri:3, /* Inner priority */ + regen_crc:1, /* Packet modified and needs new CRC */ + repl_nhi:19, /* Replication or Next Hop index */ + vfi_valid:1, /* Validates VFI field */ + orig_dest_pp_port:8; /* Original PP-destiantion-port */ + + union { /* T29.11 */ + struct { + uint32 dscp:6, /* New DSCP (+ oam pkt type:3) */ + chg_tos:1, /* DSCP has been changed by HW */ + vntag_action:2, /* VN tag action */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + decap_tunnel_type:5,/* Tunnel type that was decapsulated */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + ep_mirror:1; /* EP Redirected packet copied to CPU */ + } overlay1; + struct { + uint32 oam_command:4, /* Special packet type (OAM, BFD) */ + :28; /* Reserved */ + } overlay2; + } word11; + + union { /* T29.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 vfi:14, /* VFI or FID */ + :18; /* Reserved */ + } overlay2; + } word12; + + /* T29.13 */ + uint32 itag_status:2, /* Ingress Inner tag status */ + otag_action:2, /* Ingress Outer tag action */ + itag_action:2, /* Ingress Inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + all_switch_drop:1, /* All switched copies dropped */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + oam_pkt:1, /* OAM Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + loopback_pkt_type:4, /* Loopback packet type */ + mtp_index:5, /* MTP index */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + union { /* T29.14 */ + struct { + uint32 timestamp_hi; /* Timestamp upper bits */ + } overlay1; + struct { + uint32 eh_tag; /* Extension-Header TAG */ + } overlay2; + struct { + uint32 eh_queue_tag: 16, /* HG2 EH queue tag */ + eh_tag_type:2, /* HG2 EH tag type */ + eh_seg_sel:3, /* HG2 EH seg sel */ + :11; /* Reserved */ + } overlay3; + struct { + uint32 rx_bfd_session_index:13, /* Rx BFD pkt session ID */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + :9; /* Reserved */ + } overlay4; + } word14; + + /* T29.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers.*/ + :10, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T29.10 */ + uint32 orig_dest_pp_port:8, /* Original PP-destiantion-port */ + vfi_valid:1, /* Validates VFI field */ + repl_nhi:19, /* Replication or Next Hop index */ + regen_crc:1, /* Packet modified and needs new CRC */ + inner_pri:3; /* Inner priority */ + + union { /* T29.11 */ + struct { + uint32 ep_mirror:1, /* EP Redirected packet copied to CPU */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + decap_tunnel_type:5,/* Tunnel type that was decapsulated */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + vntag_action:2, /* VN tag action */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP (+ oam pkt type:3) */ + } overlay1; + struct { + uint32 :28, /* Reserved */ + oam_command:4; /* Special packet type (OAM, BFD) */ + } overlay2; + } word11; + + union { /* T29.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 :18, /* Reserved */ + vfi:14; /* VFI or FID */ + } overlay2; + } word12; + + /* T29.13 */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* MTP index */ + loopback_pkt_type:4, /* Loopback packet type */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + oam_pkt:1, /* OAM Packet indicator */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + all_switch_drop:1, /* All switched copies dropped */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress Inner tag action */ + otag_action:2, /* Ingress Outer tag action */ + itag_status:2; /* Ingress Inner tag status */ + + union { /* T29.14 */ + struct { + uint32 timestamp_hi; /* Timestamp upper bits */ + } overlay1; + struct { + uint32 eh_tag; /* Extension-Header TAG */ + } overlay2; + struct { + uint32 :11, /* Reserved */ + eh_seg_sel:3, /* HG2 EH seg sel */ + eh_tag_type:2, /* HG2 EH tag type */ + eh_queue_tag: 16; /* HG2 EH queue tag */ + } overlay3; + struct { + uint32 :9, /* Reserved */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_session_index:13; /* Rx BFD pkt session ID */ + } overlay4; + } word14; + + /* T29.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :10, /* Reserved */ + status_read_ecc_error:1, /* 2 bit ECC error while reading Status + from RX Status Buffers. */ + pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet + data from RX data Buffers.*/ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb29_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_IP_3 3 +#endif + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h new file mode 100644 index 000000000000..6a57b710b421 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h @@ -0,0 +1,251 @@ +/* + * $Id: type31.h,v 1.1.6.2 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: soc/shared/dcbformats/type31.h + * Purpose: Define dma control block (DCB) format for a type31 DCB + * used by the 53400 (Greyhound) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE31_H +#define _SOC_SHARED_DCBFORMATS_TYPE31_H + +/* + * DMA Control Block - Type 31 + * Used on 53400 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T31.0: physical address */ + /* T31.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + uint32 reason_hi; /* T31.2: CPU opcode (hi bits) */ + uint32 reason; /* T31.3: CPU opcode (low bits) */ +#ifdef LE_HOST + union { /* T31.4 */ + struct { + uint32 :16, /* Reserved */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + :26; /* Reserved */ + } overlay2; + } word4; + + /* T31.5 */ + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T31.4 */ + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + :16; /* Reserved */ + } overlay1; + struct { + uint32 :26, /* Reserved */ + cpu_cos:6; /* CPU COS */ + } overlay2; + } word4; + + /* T31.5 */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ +#endif + + uint32 mh0; /* T31.6: Module Header word 0 */ + uint32 mh1; /* T31.7: Module Header word 1 */ + uint32 mh2; /* T31.8: Module Header word 2 */ + uint32 mh3; /* T31.9: Module Header word 3 */ +#ifdef LE_HOST + /* T31.10 */ + uint32 inner_pri:3, /* Inner priority */ + regen_crc:1, /* Packet modified and needs new CRC */ + repl_nhi:12, /* Replication or Next Hop index */ + :5, /* reserved.*/ + shaping_cos_sel:2, /* */ + vfi_valid:1, /* Validates VFI field */ + em_mtp_index:4, /* em mirror-to-port index */ + oam_command:4; /* Special packet type (OAM, BFD) */ + + /* T31.11 */ + uint32 dscp:6, /* New DSCP (+ oam pkt type:3) */ + chg_tos:1, /* DSCP has been changed by HW */ + imirror:1, /* Ingress Mirroring PBE field*/ + emirror:1, /* Egress Mirroring, PBE field */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + :5, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + replicated:1; /* Replicated copy */ + + + + union { /* T29.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 vfi:14, /* VFI or FID */ + :18; /* Reserved */ + } overlay2; + } word12; + + /* T31.13 */ + uint32 itag_status:2, /* Ingress Inner tag status */ + otag_action:2, /* Ingress Outer tag action */ + itag_action:2, /* Ingress Inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + hg_lookup:1, /* Higig lookup */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + vntag_action:2, /* VNTAG/ETAG*/ + oam_pkt:1, /* OAM Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + cos:4, /* Port queue number */ + mtp_index:5, /* IM MTP index, PBE field */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + /* T31.14 */ + uint32 timestamp_hi; /* Timestamp upper bits */ + + /* T31.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + :12, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T31.10 */ + uint32 oam_command:4, /* Special packet type (OAM, BFD) */ + em_mtp_index:4, /* em mirror-to-port index */ + vfi_valid:1, /* Validates VFI field */ + shaping_cos_sel:2, /* */ + :5, /* reserved.*/ + repl_nhi:12, /* Replication or Next Hop index */ + regen_crc:1, /* Packet modified and needs new CRC */ + inner_pri:3; /* Inner priority */ + + /* T31.11 */ + uint32 replicated:1, /* Replicated copy */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :5, /* Reserved */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + emirror:1, /* Egress Mirroring, PBE field */ + imirror:1, /* Ingress Mirroring PBE field*/ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP (+ oam pkt type:3) */ + + union { /* T31.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 :18, /* Reserved */ + vfi:14; /* VFI or FID */ + } overlay2; + } word12; + + /* T31.13 */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* IM MTP index, PBE field */ + cos:4, /* Port queue number */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + oam_pkt:1, /* OAM Packet indicator */ + vntag_action:2, /* VNTAG/ETAG*/ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + hg_lookup:1, /* Higig lookup */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress Inner tag action */ + otag_action:2, /* Ingress Outer tag action */ + itag_status:2; /* Ingress Inner tag status */ + + + uint32 timestamp_hi; /* Timestamp upper bits */ + + /* T29.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :12, /* Reserved */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb31_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h new file mode 100644 index 000000000000..ec87c0e044f6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h @@ -0,0 +1,294 @@ +/* + * $Id: $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: soc/shared/dcbformats/type32.h + * Purpose: Define dma control block (DCB) format for a type32 DCB + * used by the 56960 (Tomahawk) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE32_H +#define _SOC_SHARED_DCBFORMATS_TYPE32_H + +/* + * DMA Control Block - Type 32 + * Used on 56960 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T31.0: physical address */ + /* T31.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + c_intr:2, /* Desc Intr Mode */ + :7; /* Don't care */ +#else + uint32 :7, /* Don't care */ + c_intr:2, /* Desc Intr Mode */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + + /* T31.2 (word 12 in EP_TO_CPU_HDR) */ + uint32 reason_hi; /* CPU opcode (hi bits) */ + /* T31.3 (word 11 in EP_TO_CPU_HDR) */ + uint32 reason; /* CPU opcode (low bits) */ + +#ifdef LE_HOST + /* T31.4 (word 10 in EP_TO_CPU_HDR) */ + uint32 cos:6, /* CPU COS or MMU COS */ + ucq:1, /* Unicast queue */ + :9, /* Reserved */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + + /* T31.5 (word 9 in EP_TO_CPU_HDR) */ + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + /* T31.4 (word 10 in EP_TO_CPU_HDR) */ + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + :9, /* Reserved */ + ucq:1, /* Unicast queue */ + cos:6; /* CPU COS or MMU COS */ + /* T31.5 (word 9 in EP_TO_CPU_HDR) */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ +#endif + + /* T31.6 (word 8 in EP_TO_CPU_HDR) */ + uint32 mh0; /* Module Header word 0 */ + /* T31.7 (word 7 in EP_TO_CPU_HDR) */ + uint32 mh1; /* Module Header word 1 */ + /* T31.8 (word 6 in EP_TO_CPU_HDR) */ + uint32 mh2; /* Module Header word 2 */ + /* T31.9 (word 5 in EP_TO_CPU_HDR) */ + uint32 mh3; /* Module Header word 3 */ + +#ifdef LE_HOST + /* T31.10 (word 4 in EP_TO_CPU_HDR) */ + uint32 inner_pri:3, /* Inner priority */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + regen_crc:1, /* Packet modified and needs new CRC */ + repl_nhi:17, /* Replication or Next Hop index */ + :2, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + :7; /* Reserved */ + + /* T31.11 (word 3 in EP_TO_CPU_HDR) */ + uint32 dscp:6, /* New DSCP */ + chg_tos:1, /* DSCP has been changed by HW */ + vntag_action:2, /* VN tag action */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + :1, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + :1; /* Reserved */ +#else + /* T31.10 (word 4 in EP_TO_CPU_HDR) */ + uint32 :7, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + :2, /* Reserved */ + repl_nhi:17, /* Replication or Next Hop index */ + regen_crc:1, /* Packet modified and needs new CRC */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + inner_pri:3; /* Inner priority */ + + /* T31.11 (word 3 in EP_TO_CPU_HDR) */ + uint32 :1, /* Reserved */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :1, /* Reserved */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + vntag_action:2, /* VN tag action */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP */ +#endif + /* T31.12 (word 2 in EP_TO_CPU_HDR) */ + uint32 timestamp; /* Timestamp */ + +#ifdef LE_HOST + /* T31.13 (word 1 in EP_TO_CPU_HDR) */ + uint32 tag_status:2, /* Ingress incoming tag status */ + otag_action:2, /* Ingress outer tag action */ + itag_action:2, /* Ingress inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + uc_switch_drop:1, /* Unicast switched copies dropped */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + special_pkt:1, /* Special Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + loopback_pkt_type:3, /* Loopback packet type */ + :1, /* Reserved */ + mtp_index:5, /* MTP index */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + union { /* T31.14 (word 0 in EP_TO_CPU_HDR) */ + uint32 timestamp_hi; /* Timestamp upper bits */ + struct { /* EH_TYPE_0 */ + uint32 eh_queue_tag:16, + :3, + eh_tag_type:2, + eh_seg_sel:3, + :3, + os1588_done:1, + eh_type:4; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 classid: 9, + l3_iif:14, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_queue_tag: 14, + classid:9, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay3; + struct { + uint32 rx_bfd_session_index:12, /* Rx BFD pkt session ID */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + :10; /* Reserved */ + } overlay4; + } word14; + + /* T31.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + :12, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T31.13 (word 1 in EP_TO_CPU_HDR) */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* MTP index */ + :1, /* Reserved */ + loopback_pkt_type:3, /* Loopback packet type */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + special_pkt:1, /* Special Packet indicator */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + uc_switch_drop:1, /* Unicast switched copies dropped */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress inner tag action */ + otag_action:2, /* Ingress outer tag action */ + tag_status:2; /* Ingress incoming tag status */ + + union { /* T31.14 (word 0 in EP_TO_CPU_HDR) */ + uint32 timestamp_hi; /* Timestamp upper bits */ + struct { /* EH_TYPE_0 */ + uint32 eh_type:4, + os1588_done:1, + :3, + eh_seg_sel:3, + eh_tag_type:2, + :3, + eh_queue_tag:16; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + l3_iif:14, + classid: 9; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + classid:9, + eh_queue_tag:14; + } overlay3; + struct { + uint32 :10, /* Reserved */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_session_index:12; /* Rx BFD pkt session ID */ + } overlay4; + } word14; + + /* T31.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :12, /* Reserved */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb32_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif /* _SOC_SHARED_DCBFOMATS_TYPE32_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h new file mode 100644 index 000000000000..dcf1dd930b76 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h @@ -0,0 +1,328 @@ +/* + * $Id$ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: soc/shared/dcbformats/type33.h + * Purpose: Define dma control block (DCB) format for a type33 DCB + * used by the 56860 (TD2+) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE33_H +#define _SOC_SHARED_DCBFORMATS_TYPE33_H + +/* + * DMA Control Block - Type 33 + * Used on 56860 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T33.0: physical address */ + /* T33.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + c_intr:2, /* Desc Intr Mode */ + :7; /* Don't care */ +#else + uint32 :7, /* Don't care */ + c_intr:2, /* Desc Intr Mode */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + + /* T33.2 (word 12 in EP_TO_CPU_HDR) */ + uint32 reason_hi; /* CPU opcode (hi bits) */ + /* T33.3 (word 11 in EP_TO_CPU_HDR) */ + uint32 reason; /* CPU opcode (low bits) */ + +#ifdef LE_HOST + union { /* T33.4 (word 10 in EP_TO_CPU_HDR) */ + struct { + uint32 queue_num:12, /* Queue number for CPU packets */ + :4, /* Reserved */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + :10, /* Reserved */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay2; + } word4; + + /* T33.5 (word 9 in EP_TO_CPU_HDR) */ + uint32 srcport:7, /* Source port number */ + :1, /* Reserved */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T33.4 (word 10 in EP_TO_CPU_HDR) */ + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + :4, /* Reserved */ + queue_num:12; /* Queue number for CPU packets */ + } overlay1; + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + :10, /* Reserved */ + cpu_cos:6; /* CPU COS */ + } overlay2; + } word4; + + /* T33.5 (word 9 in EP_TO_CPU_HDR) */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + :1, /* Reserved */ + srcport:7; /* Source port number */ +#endif + /* T33.6 (word 8 in EP_TO_CPU_HDR) */ + uint32 mh0; /* Module Header word 0 */ + /* T33.7 (word 7 in EP_TO_CPU_HDR) */ + uint32 mh1; /* Module Header word 1 */ + /* T33.8 (word 6 in EP_TO_CPU_HDR) */ + uint32 mh2; /* Module Header word 2 */ + /* T33.9 (word 5 in EP_TO_CPU_HDR) */ + uint32 mh3; /* Module Header word 3 */ + +#ifdef LE_HOST + /* T33.10 (word 4 in EP_TO_CPU_HDR) */ + uint32 inner_pri:3, /* Inner priority */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + regen_crc:1, /* Packet modified and needs new CRC */ + repl_nhi:17, /* Replication or Next Hop index */ + :2, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + :7; /* Reserved */ + + union { /* T33.11 (word 3 in EP_TO_CPU_HDR) */ + struct { + uint32 dscp:6, /* New DSCP */ + chg_tos:1, /* DSCP has been changed by HW */ + vntag_action:2, /* VN tag action */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + :1, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + mcq:1; /* Multicast queue */ + } overlay1; + + struct { + uint32 special_pkt_type:3, /* Special packet type (OAM, BFD) */ + :29; + } overlay2; + } word3; +#else + /* T33.10 (word 4 in EP_TO_CPU_HDR) */ + uint32 :7, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + :2, /* Reserved */ + repl_nhi:17, /* Replication or Next Hop index */ + regen_crc:1, /* Packet modified and needs new CRC */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + inner_pri:3; /* Inner priority */ + + union { /* T33.11 (word 3 in EP_TO_CPU_HDR) */ + struct { + uint32 mcq:1, /* Multicast queue */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :1, /* Reserved */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + vntag_action:2, /* VN tag action */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP */ + } overlay1; + + struct { + uint32 :29, + special_pkt_type:3; + } overlay2; + } word3; +#endif + /* T33.12 (word 2 in EP_TO_CPU_HDR) */ + uint32 timestamp; /* Timestamp */ + +#ifdef LE_HOST + /* T33.13 (word 1 in EP_TO_CPU_HDR) */ + uint32 tag_status:2, /* Ingress incoming tag status */ + otag_action:2, /* Ingress outer tag action */ + itag_action:2, /* Ingress inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + all_switch_drop:1, /* All switched copies dropped */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + special_pkt:1, /* Special Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + loopback_pkt_type:3, /* Loopback packet type */ + :1, /* Reserved */ + mtp_index:5, /* MTP index */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + union { /* T33.14 (word 0 in EP_TO_CPU_HDR) */ + uint32 timestamp_hi; /* Timestamp upper bits */ + struct { /* EH_TYPE_0 */ + uint32 eh_queue_tag:16, + :3, + eh_tag_type:2, + eh_seg_sel:3, + :3, + os1588_done:1, + eh_type:4; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 classid: 9, + l3_iif:14, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_queue_tag: 14, + classid:9, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay3; + struct { + uint32 rx_bfd_session_index:12, /* Rx BFD pkt session ID */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + :10; /* Reserved */ + } overlay4; + } word14; + + /* T33.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + :12, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T33.13 (word 1 in EP_TO_CPU_HDR) */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* MTP index */ + :1, /* Reserved */ + loopback_pkt_type:3, /* Loopback packet type */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + special_pkt:1, /* Special Packet indicator */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + all_switch_drop:1, /* All switched copies dropped */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress inner tag action */ + otag_action:2, /* Ingress outer tag action */ + tag_status:2; /* Ingress incoming tag status */ + + union { /* T33.14 (word 0 in EP_TO_CPU_HDR) */ + uint32 timestamp_hi; /* Timestamp upper bits */ + struct { /* EH_TYPE_0 */ + uint32 eh_type:4, + os1588_done:1, + :3, + eh_seg_sel:3, + eh_tag_type:2, + :3, + eh_queue_tag:16; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + l3_iif:14, + classid: 9; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + classid:9, + eh_queue_tag:14; + } overlay3; + struct { + uint32 :10, /* Reserved */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_session_index:12; /* Rx BFD pkt session ID */ + } overlay4; + } word14; + + /* T33.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :12, /* Reserved */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb33_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif /* _SOC_SHARED_DCBFOMATS_TYPE33_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h new file mode 100644 index 000000000000..1a8ff84f04c9 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h @@ -0,0 +1,251 @@ +/* + * $Id: $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: soc/shared/dcbformats/type34.h + * Purpose: Define dma control block (DCB) format for a type34 DCB + * used by the 56160 (Hurricane3) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE34_H +#define _SOC_SHARED_DCBFORMATS_TYPE34_H + +/* + * DMA Control Block - Type 34 + * Used on 56160 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T34.0: physical address */ + /* T34.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + uint32 reason_hi; /* T34.2: CPU opcode (hi bits) */ + uint32 reason; /* T34.3: CPU opcode (low bits) */ +#ifdef LE_HOST + union { /* T34.4 */ + struct { + uint32 :16, /* Reserved */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + regen_crc:1, /* Packet modified and needs new CRC */ + :25; /* Reserved */ + } overlay2; + } word4; + + /* T34.5 */ + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T34.4 */ + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + :16; /* Reserved */ + } overlay1; + struct { + uint32 :25, /* Reserved */ + regen_crc:1, /* Packet modified and needs new CRC */ + cpu_cos:6; /* CPU COS */ + } overlay2; + } word4; + + /* T34.5 */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ +#endif + + uint32 mh0; /* T34.6: Module Header word 0 */ + uint32 mh1; /* T34.7: Module Header word 1 */ + uint32 mh2; /* T34.8: Module Header word 2 */ + uint32 mh3; /* T34.9: Module Header word 3 */ +#ifdef LE_HOST + /* T34.10 */ + uint32 inner_pri:3, /* Inner priority */ + repl_nhi:13, /* Replication or Next Hop index */ + :5, /* reserved.*/ + shaping_cos_sel:2, /* */ + vfi_valid:1, /* Validates VFI field */ + em_mtp_index:4, /* em mirror-to-port index */ + oam_command:4; /* Special packet type (OAM, BFD) */ + + /* T34.11 */ + uint32 dscp:6, /* New DSCP (+ oam pkt type:3) */ + chg_tos:1, /* DSCP has been changed by HW */ + imirror:1, /* Ingress Mirroring PBE field*/ + emirror:1, /* Egress Mirroring, PBE field */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + :5, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + replicated:1; /* Replicated copy */ + + + + union { /* T34.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 vfi:14, /* VFI or FID */ + :18; /* Reserved */ + } overlay2; + } word12; + + /* T34.13 */ + uint32 itag_status:2, /* Ingress Inner tag status */ + otag_action:2, /* Ingress Outer tag action */ + itag_action:2, /* Ingress Inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + hg_lookup:1, /* Higig lookup */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + vntag_action:2, /* VNTAG/ETAG*/ + oam_pkt:1, /* OAM Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + cos:4, /* Port queue number */ + mtp_index:5, /* IM MTP index, PBE field */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + /* T34.14 */ + uint32 timestamp_hi; /* Timestamp upper bits */ + + /* T34.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + :12, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T34.10 */ + uint32 oam_command:4, /* Special packet type (OAM, BFD) */ + em_mtp_index:4, /* em mirror-to-port index */ + vfi_valid:1, /* Validates VFI field */ + shaping_cos_sel:2, /* */ + :5, /* reserved.*/ + repl_nhi:13, /* Replication or Next Hop index */ + inner_pri:3; /* Inner priority */ + + /* T34.11 */ + uint32 replicated:1, /* Replicated copy */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :5, /* Reserved */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + emirror:1, /* Egress Mirroring, PBE field */ + imirror:1, /* Ingress Mirroring PBE field*/ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP (+ oam pkt type:3) */ + + union { /* T34.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 :18, /* Reserved */ + vfi:14; /* VFI or FID */ + } overlay2; + } word12; + + /* T34.13 */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* IM MTP index, PBE field */ + cos:4, /* Port queue number */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + oam_pkt:1, /* OAM Packet indicator */ + vntag_action:2, /* VNTAG/ETAG*/ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + hg_lookup:1, /* Higig lookup */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress Inner tag action */ + otag_action:2, /* Ingress Outer tag action */ + itag_status:2; /* Ingress Inner tag status */ + + + uint32 timestamp_hi; /* Timestamp upper bits */ + + /* T34.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :12, /* Reserved */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb34_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h new file mode 100644 index 000000000000..b201ed2cc134 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h @@ -0,0 +1,328 @@ +/* + * $Id$ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: soc/shared/dcbformats/type35.h + * Purpose: Define dma control block (DCB) format for a type35 DCB + * used by the 56560 (APACHE) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE35_H +#define _SOC_SHARED_DCBFORMATS_TYPE35_H + +/* + * DMA Control Block - Type 35 + * Used on 56560 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T32.0: physical address */ + /* T32.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + + /* T32.2 (word 12 in EP_TO_CPU_HDR) */ + uint32 reason_hi; /* CPU opcode (hi bits) */ + /* T32.3 (word 11 in EP_TO_CPU_HDR) */ + uint32 reason; /* CPU opcode (low bits) */ + +#ifdef LE_HOST + union { /* T26.4 (word 10 in EP_TO_CPU_HDR) */ + struct { + uint32 queue_num:15, /* Queue number for CPU packets */ + ep_mirror:1, /* EP_MIRROR */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + :10, /* Reserved */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay2; + } word4; + + /* T26.5 (word 9 in EP_TO_CPU_HDR) */ + uint32 srcport:7, /* Source port number */ + :1, /* Reserved */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T26.4 (word 10 in EP_TO_CPU_HDR) */ + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + ep_mirror:1, /* EP_MIRROR */ + queue_num:15; /* Queue number for CPU packets */ + } overlay1; + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + :10, /* Reserved */ + cpu_cos:6; /* CPU COS */ + } overlay2; + } word4; + + /* T26.5 (word 9 in EP_TO_CPU_HDR) */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + :1, /* Reserved */ + srcport:7; /* Source port number */ +#endif + /* T32.6 (word 8 in EP_TO_CPU_HDR) */ + uint32 mh0; /* Module Header word 0 */ + /* T32.7 (word 7 in EP_TO_CPU_HDR) */ + uint32 mh1; /* Module Header word 1 */ + /* T32.8 (word 6 in EP_TO_CPU_HDR) */ + uint32 mh2; /* Module Header word 2 */ + /* T32.9 (word 5 in EP_TO_CPU_HDR) */ + uint32 mh3; /* Module Header word 3 */ + +#ifdef LE_HOST + /* T32.10 (word 4 in EP_TO_CPU_HDR) */ + uint32 inner_pri:3, /* Inner priority */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + regen_crc:1, /* Packet modified and needs new CRC */ + repl_nhi:17, /* Replication or Next Hop index */ + :2, /* Reserved */ + vfi_valid:1, /* Validates VFI field */ + olp_encap_oam_pkt:1, /* OLP encapsulated OAM packet */ + :6; /* Reserved */ + + union { /* T33.11 (word 3 in EP_TO_CPU_HDR) */ + struct { + uint32 dscp:6, /* New DSCP */ + chg_tos:1, /* DSCP has been changed by HW */ + vntag_action:2, /* VN tag action */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + :1, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + mcq:1; /* Multicast queue */ + } overlay1; + + struct { + uint32 special_pkt_type:3, /* Special packet type (OAM, BFD) */ + :29; + } overlay2; + } word3; +#else + /* T32.10 (word 4 in EP_TO_CPU_HDR) */ + uint32 :6, /* Reserved */ + olp_encap_oam_pkt:1, /* OLP encapsulated OAM packet */ + vfi_valid:1, /* Validates VFI field */ + :2, /* Reserved */ + repl_nhi:17, /* Replication or Next Hop index */ + regen_crc:1, /* Packet modified and needs new CRC */ + dvp_nhi_sel:1, /* DVP overlay indicator */ + inner_pri:3; /* Inner priority */ + + union { /* T33.11 (word 3 in EP_TO_CPU_HDR) */ + struct { + uint32 mcq:1, /* Multicast queue */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :1, /* Reserved */ + decap_tunnel_type:4, /* Tunnel type that was decapsulated */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + vntag_action:2, /* VN tag action */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP */ + } overlay1; + + struct { + uint32 :29, + special_pkt_type:3; + } overlay2; + } word3; +#endif + /* T32.12 (word 2 in EP_TO_CPU_HDR) */ + uint32 timestamp; /* Timestamp */ + +#ifdef LE_HOST + /* T32.13 (word 1 in EP_TO_CPU_HDR) */ + uint32 tag_status:2, /* Ingress incoming tag status */ + otag_action:2, /* Ingress outer tag action */ + itag_action:2, /* Ingress inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + all_switch_drop:1, /* All switched copies dropped */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + special_pkt:1, /* Special Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + loopback_pkt_type:3, /* Loopback packet type */ + :1, /* Reserved */ + mtp_index:5, /* MTP index */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + union { /* T32.14 (word 0 in EP_TO_CPU_HDR) */ + uint32 timestamp_hi; /* Timestamp upper bits */ + struct { /* EH_TYPE_0 */ + uint32 eh_queue_tag:16, + :3, + eh_tag_type:2, + eh_seg_sel:3, + :3, + os1588_done:1, + eh_type:4; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 classid: 9, + l3_iif:14, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_queue_tag: 14, + classid:9, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay3; + struct { + uint32 rx_bfd_session_index:12, /* Rx BFD pkt session ID */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + :10; /* Reserved */ + } overlay4; + } word14; + + /* T32.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + :12, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T32.13 (word 1 in EP_TO_CPU_HDR) */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* MTP index */ + :1, /* Reserved */ + loopback_pkt_type:3, /* Loopback packet type */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + special_pkt:1, /* Special Packet indicator */ + hg2_ext_hdr:1, /* Extended Higig2 header valid */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + all_switch_drop:1, /* All switched copies dropped */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress inner tag action */ + otag_action:2, /* Ingress outer tag action */ + tag_status:2; /* Ingress incoming tag status */ + + union { /* T32.14 (word 0 in EP_TO_CPU_HDR) */ + uint32 timestamp_hi; /* Timestamp upper bits */ + struct { /* EH_TYPE_0 */ + uint32 eh_type:4, + os1588_done:1, + :3, + eh_seg_sel:3, + eh_tag_type:2, + :3, + eh_queue_tag:16; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + l3_iif:14, + classid: 9; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + classid:9, + eh_queue_tag:14; + } overlay3; + struct { + uint32 :10, /* Reserved */ + rx_bfd_start_offset:8, /* Rx BFD pkt start offset */ + rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */ + rx_bfd_session_index:12; /* Rx BFD pkt session ID */ + } overlay4; + } word14; + + /* T32.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :12, /* Reserved */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb35_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif /* _SOC_SHARED_DCBFORMATS_TYPE35_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h new file mode 100644 index 000000000000..5c9b3b499f52 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h @@ -0,0 +1,358 @@ +/* + * $Id: $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: soc/shared/dcbformats/type36.h + * Purpose: Define dma control block (DCB) format for a type36 DCB + * used by the 56870 (Trident 3) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE36_H +#define _SOC_SHARED_DCBFORMATS_TYPE36_H + +/* + * DMA Control Block - Type 36 + * Used on 56870 devices + * 4 words + */ +typedef struct { + uint32 addr_lo; /* T36.0: physical address, lower 32 bits */ + uint32 addr_hi; /* T36.0: physical address, upper 32 bits */ + +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + :2, /* reserved */ + c_purge:1, /* Purge packet (TX) */ + c_intr:2, /* Desc Intr Mode */ + c_desc:4, /* descriptors remaining */ + c_desc_status:1, /* disable descriptor status write */ + :2; /* reserved */ +#else + uint32 :2, /* resered */ + c_desc_status:1, /* disable descriptor status write */ + c_desc:4, /* descriptors remaining */ + c_intr:2, /* Desc Intr Mode */ + c_purge:1, /* Purge packet (TX) */ + :2, /* reserved */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + +#ifdef LE_HOST + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + ecc_error:1, /* packet ECC Error (RX) */ + :11, /* Reserved */ + done:1; /* Descriptor Done */ +#else + uint32 done:1, /* Descriptor Done */ + :11, /* Reserved */ + ecc_error:1, /* Packet ECC Error (RX) */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb36_t; + +typedef struct { + uint32 mh0; /* Module Header word 0 */ + /* (word 14 in EP_TO_CPU_HDR) */ + uint32 mh1; /* Module Header word 1 */ + /* (word 13 in EP_TO_CPU_HDR) */ + uint32 mh2; /* Module Header word 2 */ + /* (word 12 in EP_TO_CPU_HDR) */ + uint32 mh3; /* Module Header word 3 */ + /* (word 11 in EP_TO_CPU_HDR) */ + + /* (word 10 in EP_TO_CPU_HDR) */ + /* word 9 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 reason_hi; /* CPU opcode (hi bits) */ + + /* (word 9 in EP_TO_CPU_HDR) */ + /* word 8 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 reason; /* CPU opcode (low bits) */ + +#ifdef LE_HOST + /* (word 8 in EP_TO_CPU_HDR) */ + /* word 7 in EP_TO_CPU_COMPOSITES_BUS */ + union { + struct { + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + cpu_cos:6, /* CPU COS*/ + ecn:2, /* New ECN value */ + chg_ecn:1, /* ECN changed */ + bfd_session_index_valid:1; /* Indicate a BFD terminated packet */ + } overlay1; + struct { + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + queue_num:6, /* MMU COS*/ + ecn:2, /* New ECN value */ + chg_ecn:1, /* ECN changed */ + bfd_session_index_valid:1; /* Indicate a BFD terminated packet */ + } overlay2; + } word8; + +#else + /* (word 8 in EP_TO_CPU_HDR) */ + /* word 7 in EP_TO_CPU_COMPOSITES_BUS */ + union { + struct { + uint32 bfd_session_index_valid:1, /* Indicate a BFD terminated packet */ + chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + cpu_cos:6, /* CPU COS*/ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ + } overlay1; + struct { + uint32 bfd_session_index_valid:1, /* Indicate a BFD terminated packet */ + chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + queue_num:6, /* MMU COS*/ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ + } overlay2; + } word8; +#endif + + +#ifdef LE_HOST + /* (word 7 in EP_TO_CPU_HDR) */ + /* word 6 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 nhi_a_hi:7, /* NEXT_HOP_INDEX_A (Underlay) */ + nhi_type:2, /* Type for NEXT_HOP_INDEX_A and B */ + match_rule:8, /* Matched FP rule */ + forwarding_type:2, /* Packet forwarding type */ + ucq:1, /* Unicast queue */ + outer_vid:12; /* Outer VLAN ID */ + + /* (word 6 in EP_TO_CPU_HDR) */ + /* word 5 in EP_TO_CPU_COMPOSITES_BUS */ + + union { + struct { + uint32 outer_pri:3, /* Outer priority */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_pri:3, /* Inner priority */ + nhi_b:16, /* NEXT_HOP_INDEX_B (Overlay) */ + nhi_a_lo:9; /* NEXT_HOP_INDEX_A (Underlay) */ + } overlay1; + struct { + uint32 outer_pri:3, /* Outer priority */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_pri:3, /* Inner priority */ + bfd_session_index:12, /* Indicates the Session ID for the Rx BFD packet */ + :4, /* Reserved */ + nhi_a_lo:9; /* NEXT_HOP_INDEX_A (Underlay) */ + } overlay2; + } word6; /* (word 5 in EP_TO_CPU_HDR) */ + /* word 4 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 mtp_index:5, /* MTP index */ + dscp:6, /* New DSCP */ + chg_tos:1, /* DSCP has been changed by HW */ + vntag_action:2, /* VN tag action */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + decap_tunnel_type:5, /* Tunnel type that was decapsulated */ + inner_vid:12; /* Inner VLAN ID */ + +#else + /* (word 7 in EP_TO_CPU_HDR) */ + /* word 6 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 outer_vid:12, /* Outer VLAN ID */ + ucq:1, /* Unicast queue */ + forwarding_type:2, /* Packet forwarding type */ + match_rule:8, /* Matched FP rule */ + nhi_type:2, /* Type for NEXT_HOP_INDEX_A and B */ + nhi_a_hi:7; /* NEXT_HOP_INDEX_A (Underlay) */ + + /* (word 6 in EP_TO_CPU_HDR) */ + /* word 5 in EP_TO_CPU_COMPOSITES_BUS */ + union { + struct { + uint32 nhi_a_lo:9, /* NEXT_HOP_INDEX_A (Underlay) */ + nhi_b:16, /* NEXT_HOP_INDEX_B (Overlay) */ + inner_pri:3, /* Inner priority */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + outer_pri:3; /* Outer priority */ + } overlay1; + struct { + uint32 nhi_a_lo:9, /* NEXT_HOP_INDEX_A (Underlay) */ + :4, /* Reserved */ + bfd_session_index:12, /* Indicates the Session ID for the Rx BFD packet */ + inner_pri:3, /* Inner priority */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + outer_pri:3; /* Outer priority */ + } overlay2; + + } word6; + /* (word 5 in EP_TO_CPU_HDR) */ + /* word 4 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 inner_vid:12, /* Inner VLAN ID */ + decap_tunnel_type:5, /* Tunnel type that was decapsulated */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + vntag_action:2, /* VN tag action */ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6, /* New DSCP */ + mtp_index:5; /* MTP index */ +#endif + + /* (word 4 in EP_TO_CPU_HDR) */ + /* word 3 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 timestamp; /* Timestamp */ + +#ifdef LE_HOST + /* (word 3 in EP_TO_CPU_HDR) */ + /* word 2 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 bpdu:1, /* BPDU Packet */ + :2, /* Reserved */ + hg_lookup_pkt:1, /* Higig Lookup Packet */ + vrf:12, /* VRF */ + timestamp_type:2, /* Timestamp type */ + l3_iif:14; /* L3 IIF */ + + /* (word 2 in EP_TO_CPU_HDR) */ + /* word 1 in EP_TO_CPU_COMPOSITES_BUS*/ + uint32 match_id_hi:18, /* Packet MATCH_ID upper bits*/ + otag_action:2, /* Ingress outer tag action */ + itag_action:2, /* Ingress inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + uc_switch_drop:1, /* Unicast switched copies dropped */ + src_hg:1, /* Source is Higig */ + forwarding_zone_id:3, /* Indicates packet was routed - UC or MC */ + l3only:1, /* L3 only IPMC packet */ + replicated:1, /* Replicated copy */ + do_not_change_ttl:1; /* Do not change TTL */ + + /* (word 1 in EP_TO_CPU_HDR) */ + /* word 0 in EP_TO_CPU_COMPOSITES_BUS*/ + uint32 match_id_lo; /* Packet MATCH_ID lower bits*/ + + union { /* (word 0 in EP_TO_CPU_HDR) */ + struct { /* EH_TYPE_0 */ + uint32 eh_queue_tag:16, + :3, + eh_tag_type:2, + eh_seg_sel:3, + :3, + os1588_done:1, + eh_type:4; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 classid: 9, + l3_iif:14, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_queue_tag: 14, + classid:9, + classid_type:4, + os1588_done:1, + eh_type:4; + } overlay3; + } word16; + +#else + /* (word 3 in EP_TO_CPU_HDR) */ + /* word 2 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 l3_iif:14, /* L3 IIF */ + timestamp_type:2, /* Timestamp type */ + vrf:12, /* VRF */ + hg_lookup_pkt:1, /* Higig Lookup Packet */ + :2, /* Reserved */ + bpdu:1; /* BPDU Packet */ + + /* (word 2 in EP_TO_CPU_HDR) */ + /* word 1 in EP_TO_CPU_COMPOSITES_BUS*/ + uint32 do_not_change_ttl:1, /* Do not change TTL */ + replicated:1, /* Replicated copy */ + l3only:1, /* L3 only IPMC packet */ + forwarding_zone_id:3, /* Indicates packet was routed - UC or MC */ + src_hg:1, /* Source is Higig */ + uc_switch_drop:1, /* Unicast switched copies dropped */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress inner tag action */ + otag_action:2, /* Ingress outer tag action */ + match_id_hi:18; /* Packet MATCH_ID upper bits*/ + + /* (word 1 in EP_TO_CPU_HDR) */ + /* word 0 in EP_TO_CPU_COMPOSITES_BUS*/ + uint32 match_id_lo; /* Packet MATCH_ID lower bits*/ + + union { /* (word 0 in EP_TO_CPU_HDR) */ + struct { /* EH_TYPE_0 */ + uint32 eh_type:4, + os1588_done:1, + :3, + eh_seg_sel:3, + eh_tag_type:2, + :3, + eh_queue_tag:16; + } overlay1; + struct { /* EH_TYPE_1 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + l3_iif:14, + classid: 9; + } overlay2; + struct { /* EH_TYPE 2 */ + uint32 eh_type:4, + os1588_done:1, + classid_type:4, + classid:9, + eh_queue_tag:14; + } overlay3; + } word16; +#endif + + uint32 rsvd; /* padding to get header to 16 words */ +} ep_to_cpu_hdr36_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif /* _SOC_SHARED_DCBFORMATS_TYPE36_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h new file mode 100644 index 000000000000..846c5f678d27 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h @@ -0,0 +1,251 @@ +/* + * $Id: $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: soc/shared/dcbformats/type37.h + * Purpose: Define dma control block (DCB) format for a type37 DCB + * used by the 53570 (Greyhound2) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE37_H +#define _SOC_SHARED_DCBFORMATS_TYPE37_H + +/* + * DMA Control Block - Type 37 + * Used on 53570 devices + * 16 words + */ +typedef struct { + uint32 addr; /* T37.0: physical address */ + /* T37.1: Control 0 */ +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + c_stat:1, /* Update stats (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_purge:1, /* Purge packet (TX) */ + :9; /* Don't care */ +#else + uint32 :9, /* Don't care */ + c_purge:1, /* Purge packet (TX) */ + c_pause:1, /* Pause packet (TX) */ + c_stat:1, /* Update stats (TX) */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + uint32 reason_hi; /* T37.2: CPU opcode (hi bits) */ + uint32 reason; /* T37.3: CPU opcode (low bits) */ +#ifdef LE_HOST + union { /* T37.4 */ + struct { + uint32 :16, /* Reserved */ + cpu_opcode_type:4, /* CPU opcode type */ + outer_vid:12; /* Outer VLAN ID */ + } overlay1; + struct { + uint32 cpu_cos:6, /* CPU COS */ + regen_crc:1, /* Packet modified and needs new CRC */ + :25; /* Reserved */ + } overlay2; + } word4; + + /* T37.5 */ + uint32 srcport:8, /* Source port number */ + pkt_len:14, /* Packet length */ + match_rule:8, /* Matched FP rule */ + hgi:2; /* Higig Interface Format Indicator */ +#else + union { /* T37.4 */ + struct { + uint32 outer_vid:12, /* Outer VLAN ID */ + cpu_opcode_type:4, /* CPU opcode type */ + :16; /* Reserved */ + } overlay1; + struct { + uint32 :25, /* Reserved */ + regen_crc:1, /* Packet modified and needs new CRC */ + cpu_cos:6; /* CPU COS */ + } overlay2; + } word4; + + /* T37.5 */ + uint32 hgi:2, /* Higig Interface Format Indicator */ + match_rule:8, /* Matched FP rule */ + pkt_len:14, /* Packet length */ + srcport:8; /* Source port number */ +#endif + + uint32 mh0; /* T37.6: Module Header word 0 */ + uint32 mh1; /* T37.7: Module Header word 1 */ + uint32 mh2; /* T37.8: Module Header word 2 */ + uint32 mh3; /* T37.9: Module Header word 3 */ +#ifdef LE_HOST + /* T37.10 */ + uint32 inner_pri:3, /* Inner priority */ + repl_nhi:13, /* Replication or Next Hop index */ + :5, /* reserved.*/ + shaping_cos_sel:2, /* */ + vfi_valid:1, /* Validates VFI field */ + em_mtp_index:4, /* em mirror-to-port index */ + oam_command:4; /* Special packet type (OAM, BFD) */ + + /* T37.11 */ + uint32 dscp:6, /* New DSCP (+ oam pkt type:3) */ + chg_tos:1, /* DSCP has been changed by HW */ + imirror:1, /* Ingress Mirroring PBE field*/ + emirror:1, /* Egress Mirroring, PBE field */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + outer_pri:3, /* Outer priority */ + :5, /* Reserved */ + inner_vid:12, /* Inner VLAN ID */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + replicated:1; /* Replicated copy */ + + + + union { /* T37.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 vfi:14, /* VFI or FID */ + :18; /* Reserved */ + } overlay2; + } word12; + + /* T37.13 */ + uint32 itag_status:2, /* Ingress Inner tag status */ + otag_action:2, /* Ingress Outer tag action */ + itag_action:2, /* Ingress Inner tag action */ + service_tag:1, /* SD tag present */ + switch_pkt:1, /* Switched packet */ + hg_lookup:1, /* Higig lookup */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + src_hg:1, /* Source is Higig */ + l3routed:1, /* Any IP routed packet */ + l3only:1, /* L3 only IPMC packet */ + vntag_action:2, /* VNTAG/ETAG*/ + oam_pkt:1, /* OAM Packet indicator */ + do_not_change_ttl:1, /* Do not change TTL */ + bpdu:1, /* BPDU Packet */ + timestamp_type:2, /* Timestamp type */ + cos:4, /* Port queue number */ + mtp_index:5, /* IM MTP index, PBE field */ + ecn:2, /* New ECN value */ + chg_ecn:1; /* ECN changed */ + + /* T37.14 */ + uint32 timestamp_hi; /* Timestamp upper bits */ + + /* T37.15: DMA Status 0 */ + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + :12, /* Reserved */ + done:1; /* Descriptor Done */ +#else + /* T37.10 */ + uint32 oam_command:4, /* Special packet type (OAM, BFD) */ + em_mtp_index:4, /* em mirror-to-port index */ + vfi_valid:1, /* Validates VFI field */ + shaping_cos_sel:2, /* */ + :5, /* reserved.*/ + repl_nhi:13, /* Replication or Next Hop index */ + inner_pri:3; /* Inner priority */ + + /* T37.11 */ + uint32 replicated:1, /* Replicated copy */ + inner_cfi:1, /* Inner Canoncial Format Indicator */ + inner_vid:12, /* Inner VLAN ID */ + :5, /* Reserved */ + outer_pri:3, /* Outer priority */ + outer_cfi:1, /* Outer Canoncial Format Indicator */ + emirror:1, /* Egress Mirroring, PBE field */ + imirror:1, /* Ingress Mirroring PBE field*/ + chg_tos:1, /* DSCP has been changed by HW */ + dscp:6; /* New DSCP (+ oam pkt type:3) */ + + union { /* T37.12 */ + struct { + uint32 timestamp; /* Timestamp */ + } overlay1; + struct { + uint32 :18, /* Reserved */ + vfi:14; /* VFI or FID */ + } overlay2; + } word12; + + /* T37.13 */ + uint32 chg_ecn:1, /* ECN changed */ + ecn:2, /* New ECN value */ + mtp_index:5, /* IM MTP index, PBE field */ + cos:4, /* Port queue number */ + timestamp_type:2, /* Timestamp type */ + bpdu:1, /* BPDU Packet */ + do_not_change_ttl:1, /* Do not change TTL */ + oam_pkt:1, /* OAM Packet indicator */ + vntag_action:2, /* VNTAG/ETAG*/ + l3only:1, /* L3 only IPMC packet */ + l3routed:1, /* Any IP routed packet */ + src_hg:1, /* Source is Higig */ + hg_type:1, /* 0: Higig+, 1: Higig2 */ + hg_lookup:1, /* Higig lookup */ + switch_pkt:1, /* Switched packet */ + service_tag:1, /* SD tag present */ + itag_action:2, /* Ingress Inner tag action */ + otag_action:2, /* Ingress Outer tag action */ + itag_status:2; /* Ingress Inner tag status */ + + + uint32 timestamp_hi; /* Timestamp upper bits */ + + /* T37.15: DMA Status 0 */ + uint32 done:1, /* Descriptor Done */ + :12, /* Reserved */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb37_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h new file mode 100644 index 000000000000..9399b9d28dc2 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h @@ -0,0 +1,288 @@ +/* + * $Id: $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: soc/shared/dcbformats/type38.h + * Purpose: Define dma control block (DCB) format for a type38 DCB + * used by the 56980 (Tomahawk 3) + * + * This file is shared between the SDK and the embedded applications. + */ + +#ifndef _SOC_SHARED_DCBFORMATS_TYPE38_H +#define _SOC_SHARED_DCBFORMATS_TYPE38_H + +/* + * DMA Control Block - Type 38 + * Used on 56980 devices + * 16 words + */ +/* Tomahawk 3 CMICX DCB */ +typedef struct { + uint32 addr_lo; /* T36.0: physical address, lower 32 bits */ + uint32 addr_hi; /* T36.0: physical address, upper 32 bits */ + +#ifdef LE_HOST + uint32 c_count:16, /* Requested byte count */ + c_chain:1, /* Chaining */ + c_sg:1, /* Scatter Gather */ + c_reload:1, /* Reload */ + c_hg:1, /* Higig (TX) */ + :2, /* reserved */ + c_purge:1, /* Purge packet (TX) */ + c_intr:2, /* Desc Intr Mode */ + c_desc:4, /* descriptors remaining */ + c_desc_status:1, /* disable descriptor status write */ + :2; /* reserved */ +#else + uint32 :2, /* resered */ + c_desc_status:1, /* disable descriptor status write */ + c_desc:4, /* descriptors remaining */ + c_intr:2, /* Desc Intr Mode */ + c_purge:1, /* Purge packet (TX) */ + :2, /* reserved */ + c_hg:1, /* Higig (TX) */ + c_reload:1, /* Reload */ + c_sg:1, /* Scatter Gather */ + c_chain:1, /* Chaining */ + c_count:16; /* Requested byte count */ +#endif /* LE_HOST */ + +#ifdef LE_HOST + uint32 count:16, /* Transferred byte count */ + end:1, /* End bit (RX) */ + start:1, /* Start bit (RX) */ + error:1, /* Cell Error (RX) */ + ecc_error:1, /* packet ECC Error (RX) */ + :11, /* Reserved */ + done:1; /* Descriptor Done */ +#else + uint32 done:1, /* Descriptor Done */ + :11, /* Reserved */ + ecc_error:1, /* Packet ECC Error (RX) */ + error:1, /* Cell Error (RX) */ + start:1, /* Start bit (RX) */ + end:1, /* End bit (RX) */ + count:16; /* Transferred byte count */ +#endif +} dcb38_t; + +/* EP_TO_CPU_HDR + * - MODULE_HDR [288:415] WORD9 - WORD12 + * - EP_TO_CPU_COMPOSITES_BUS [ 0:287] WORD0 - WORD8 + */ +typedef struct { + uint32 mh0; /* WORD12 in EP_TO_CPU_HDR */ + uint32 mh1; /* WORD11 in EP_TO_CPU_HDR */ + uint32 mh2; /* WORD10 in EP_TO_CPU_HDR */ + uint32 mh3; /* WORD9 in EP_TO_CPU_HDR */ + + /* WORD8 in EP_TO_CPU_HDR */ + /* WORD8 in EP_TO_CPU_COMPOSITES_BUS */ +#ifdef LE_HOST + uint32 timestamp_hi:16, /* TIMESTAMP_HI [256:271] 16 */ + timestamp_type:2, /* TIMESTAMP_TYPE [272:273] 2 */ + decap_tunnel_type:5, /* TUNNEL_DECAP_TYPE [274:278] 5 */ + uc_switch_drop:1, /* UC_SW_COPY_DROPPED [279:279] 1 */ + ucq:1, /* UNICAST_QUEUE [280:280] 1 */ + :7; /* RESERVED [281:287] 7 */ +#else + uint32 :7, /* RESERVED [281:287] 7 */ + ucq:1, /* UNICAST_QUEUE [280:280] 1 */ + uc_switch_drop:1, /* UC_SW_COPY_DROPPED [279:279] 1 */ + decap_tunnel_type:5, /* TUNNEL_DECAP_TYPE [274:278] 5 */ + timestamp_type:2, /* TIMESTAMP_TYPE [272:273] 2 */ + timestamp_hi:16; /* TIMESTAMP_HI [256:271] 16 */ +#endif + + /* WORD7 in EP_TO_CPU_HDR */ + /* WORD7 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 timestamp; /* TIMESTAMP [224:255] 32 */ + + /* WORD6 in EP_TO_CPU_HDR */ + /* WORD6 in EP_TO_CPU_COMPOSITES_BUS */ +#ifdef LE_HOST + uint32 :2, /* RESERVED [192:193] 2 */ + entropy_label:20, /* ENTROPY LABEL [194:213] 20 */ + special_pkt_indicator:1, /* SPECIAL_PACKET_INDICATOR [214:214] 1 */ + srcport:8, /* SRC_PORT_NUM [215:222] 8 */ + switch_pkt:1; /* SWITCH [223:223] 1 */ +#else + uint32 switch_pkt:1, /* SWITCH [223:223] 1 */ + srcport:8, /* SRC_PORT_NUM [215:222] 8 */ + special_pkt_indicator:1, /* SPECIAL_PACKET_INDICATOR [214:214] 1 */ + entropy_label:20, /* ENTROPY LABEL [194:213] 20 */ + :2; /* RESERVED [192:193] 2 */ +#endif + + /* WORD5 in EP_TO_CPU_HDR */ + /* WORD5 in EP_TO_CPU_COMPOSITES_BUS */ +#ifdef LE_HOST + uint32 pkt_len:14, /* PKT_LENGTH [160:173] 14 */ + regen_crc:1, /* REGEN_CRC [174:174] 1 */ + replication_or_nhi:17; /* REPLICATION_OR_NHOP_INDEX[175:191] 17 */ +#else + uint32 replication_or_nhi:17, /* REPLICATION_OR_NHOP_INDEX[175:191] 17 */ + regen_crc:1, /* REGEN_CRC [174:174] 1 */ + pkt_len:14; /* PKT_LENGTH [160:173] 14 */ +#endif + + /* WORD4 in EP_TO_CPU_HDR */ + /* WORD4 in EP_TO_CPU_COMPOSITES_BUS */ +#ifdef LE_HOST + uint32 loopback_pkt_type:3, /* LOOPBACK_PACKET_TYPE [128:130] 3 */ + match_rule:8, /* MATCHED_RULE [131:138] 8 */ + mtp_index:5, /* MTP_INDEX [139:143] 5 */ + outer_cfi:1, /* OUTER_CFI [144:144] 1 */ + outer_pri:3, /* OUTER_PRI [145:147] 3 */ + outer_vid:12; /* OUTER_VID [148:159] 12 */ +#else + uint32 outer_vid:12, /* OUTER_VID [148:159] 12 */ + outer_pri:3, /* OUTER_PRI [145:147] 3 */ + outer_cfi:1, /* OUTER_CFI [144:144] 1 */ + mtp_index:5, /* MTP_INDEX [139:143] 5 */ + match_rule:8, /* MATCHED_RULE [131:138] 8 */ + loopback_pkt_type:3; /* LOOPBACK_PACKET_TYPE [128:130] 3 */ +#endif + + /* WORD3 in EP_TO_CPU_HDR */ + /* WORD3 in EP_TO_CPU_COMPOSITES_BUS */ + union { +#ifdef LE_HOST + struct { + uint32 cpu_opcode_type:4, /* CPU_OPCODE_TYPE [ 96: 99] 4 */ + do_not_change_ttl:1, /* DO_NOT_CHANGE_TTL [100:100] 1 */ + dscp:6, /* DSCP [101:106] 6 */ + ecn:2, /* ECN [107:108] 2 */ + tag_status:2, /* INCOMING_TAG_STATUS [109:110] 2 */ + ing_l3_intf:13, /* ING_L3_INTF [111:123] 13 */ + otag_action:2, /* ING_OTAG_ACTION [124:125] 2 */ + ip_routed:1, /* IP_ROUTED [126:126] 1 */ + l3only:1; /* L3ONLY [127:127] 1 */ + } overlay1; + struct { + uint32 cpu_opcode_type:4, /* CPU_OPCODE_TYPE [ 96: 99] 4 */ + do_not_change_ttl:1, /* DO_NOT_CHANGE_TTL [100:100] 1 */ + special_pkt_type:3, /* SPECIAL_PACKET_TYPE [101:103] 3 */ + :3, /* RESERVED [104:106] 3 */ + ecn:2, /* ECN [107:108] 2 */ + tag_status:2, /* INCOMING_TAG_STATUS [109:110] 2 */ + ing_l3_intf:13, /* ING_L3_INTF [111:123] 13 */ + otag_action:2, /* ING_OTAG_ACTION [124:125] 2 */ + ip_routed:1, /* IP_ROUTED [126:126] 1 */ + l3only:1; /* L3ONLY [127:127] 1 */ + } overlay2; +#else + struct { + uint32 l3only:1, /* L3ONLY [127:127] 1 */ + ip_routed:1, /* IP_ROUTED [126:126] 1 */ + otag_action:2, /* ING_OTAG_ACTION [124:125] 2 */ + ing_l3_intf:13, /* ING_L3_INTF [111:123] 13 */ + tag_status:2, /* INCOMING_TAG_STATUS [109:110] 2 */ + ecn:2, /* ECN [107:108] 2 */ + dscp:6, /* DSCP [101:106] 6 */ + do_not_change_ttl:1, /* DO_NOT_CHANGE_TTL [100:100] 1 */ + cpu_opcode_type:4; /* CPU_OPCODE_TYPE [ 96: 99] 4 */ + } overlay1; + struct { + uint32 l3only:1, /* L3ONLY [127:127] 1 */ + ip_routed:1, /* IP_ROUTED [126:126] 1 */ + otag_action:2, /* ING_OTAG_ACTION [124:125] 2 */ + ing_l3_intf:13, /* ING_L3_INTF [111:123] 13 */ + tag_status:2, /* INCOMING_TAG_STATUS [109:110] 2 */ + ecn:2, /* ECN [107:108] 2 */ + :3, /* RESERVED [104:106] 3 */ + special_pkt_type:3, /* SPECIAL_PACKET_TYPE [101:103] 3 */ + do_not_change_ttl:1, /* DO_NOT_CHANGE_TTL [100:100] 1 */ + cpu_opcode_type:4; /* CPU_OPCODE_TYPE [ 96: 99] 4 */ + } overlay2; +#endif + } word3; + /* WORD2 in EP_TO_CPU_HDR */ + /* WORD2 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 reason_hi; /* CPU_OPCODE_HI [ 64: 95] 32 */ + + /* WORD1 in EP_TO_CPU_HDR */ + /* WORD1 in EP_TO_CPU_COMPOSITES_BUS */ + uint32 reason; /* CPU_OPCODE_LO [ 32: 63] 32 */ + + union { + /* WORD0 in EP_TO_CPU_HDR */ + /* WORD0 in EP_TO_CPU_COMPOSITES_BUS */ +#ifdef LE_HOST + struct { + uint32 rx_bfd_session_index:12, /* RX_BFD_SESSION_INDEX [ 0: 11] 12 */ + rx_bfd_start_offset_type:2, /* RX_BFD_START_OFFSET_TYPE [ 12: 13] 2 */ + rx_bfd_start_offset:8, /* RX_BFD_START_OFFSET [ 14: 21] 8 */ + queue_num:6, /* MMU_COS [ 22: 27] 6 */ + bpdu:1, /* BPDU [ 28: 28] 1 */ + chg_dscp:1, /* CHANGE_DSCP [ 29: 29] 1 */ + chg_ecn:1, /* CHANGE_ECN [ 30: 30] 1 */ + :1; /* RESERVED [ 31: 31] 1 */ + } overlay1; + struct { + uint32 i2e_classid:12, /* I2E_CLASSID [ 0: 11] 12 */ + i2e_classid_type:4, /* I2E_CLASSID_TYPE [ 12: 15] 4 */ + :6, /* RESERVED2 [ 16: 21] 6 */ + cpu_cos:6, /* CPU_COS [ 22: 27] 6 */ + bpdu:1, /* BPDU [ 28: 28] 1 */ + chg_dscp:1, /* CHANGE_DSCP [ 29: 29] 1 */ + chg_ecn:1, /* CHANGE_ECN [ 30: 30] 1 */ + :1; /* RESERVED [ 31: 31] 1 */ + } overlay2; +#else + struct { + uint32 :1, /* RESERVED [ 31: 31] 1 */ + chg_ecn:1, /* CHANGE_ECN [ 30: 30] 1 */ + chg_dscp:1, /* CHANGE_DSCP [ 29: 29] 1 */ + bpdu:1, /* BPDU [ 28: 28] 1 */ + queue_num:6, /* MMU_COS [ 22: 27] 6 */ + rx_bfd_start_offset:8, /* RX_BFD_START_OFFSET [ 14: 21] 8 */ + rx_bfd_start_offset_type:2, /* RX_BFD_START_OFFSET_TYPE [ 12: 13] 2 */ + rx_bfd_session_index:12; /* RX_BFD_SESSION_INDEX [ 0: 11] 12 */ + } overlay1; + struct { + uint32 :1, /* RESERVED [ 31: 31] 1 */ + chg_ecn:1, /* CHANGE_ECN [ 30: 30] 1 */ + chg_dscp:1, /* CHANGE_DSCP [ 29: 29] 1 */ + bpdu:1, /* BPDU [ 28: 28] 1 */ + cpu_cos:6, /* CPU_COS [ 22: 27] 6 */ + :6, /* RESERVED2 [ 16: 21] 6 */ + i2e_classid_type:4, /* I2E_CLASSID_TYPE [ 12: 15] 4 */ + i2e_classid:12; /* I2E_CLASSID [ 0: 11] 12 */ + } overlay2; +#endif + } word0; + uint32 rsvd; /* 4 byte padding to make it 56 bytes */ +} ep_to_cpu_hdr38_t; + +#define SOC_CPU_OPCODE_TYPE_IP_0 0 +#define SOC_CPU_OPCODE_TYPE_IP_1 1 +#define SOC_CPU_OPCODE_TYPE_EP 2 +#define SOC_CPU_OPCODE_TYPE_NLF 3 + +#endif /* _SOC_SHARED_DCBFORMATS_TYPE38_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h new file mode 100644 index 000000000000..4799553b81ab --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h @@ -0,0 +1,41 @@ +/* + * $Id:$ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: types.h + * Purpose: System-on-a-Chip data types + */ + +#ifndef _SOC_TYPES_H_ +#define _SOC_TYPES_H_ + +#include + +typedef uint32 soc_pbmp_t; +#define pbmp_t soc_pbmp_t + +#endif /* _SOC_TYPES_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile new file mode 100644 index 000000000000..02d411edecbb --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile @@ -0,0 +1,153 @@ +# $Id: Makefile,v 1.2 Broadcom SDK $ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# Makefile for DCB Library +# + +# General Compilation Flags +CC = $(CROSS_COMPILE)gcc +AR = $(CROSS_COMPILE)ar +CFLAGS = -c -Wall -Werror +ARFLAGS = cru + +# DCB Directory +ifndef DCBDIR +DCBDIR = $(SDK)/systems/linux/kernel/modules/dcb +endif + +# Build Directory +ifndef BLDDIR +BLDDIR = $(DCBDIR)/build +endif + +# Kernel Build +ifdef KADD_CFLAGS +CFLAGS += $(KADD_CFLAGS) +# Prevent false GCC warnings when compiling dcb.c +CFLAGS += -Wno-error=array-bounds +endif + +# Include Directories +INCDIR = -I$(DCBDIR)/include + +# Sources +SOURCES = \ + $(DCBDIR)/src/soc/common/dcb.c \ + $(DCBDIR)/src/appl/dcb/dcb_handler.c + +# Objects +OBJECTS=$(subst .c,.o,$(subst $(DCBDIR),$(BLDDIR),$(SOURCES))) +OBJECTSDIR = $(dir $(OBJECTS)) + +# Library +LIB = $(BLDDIR)/libdcb.a + + +# Compilation Flags +CFLAGS += $(INCDIR) + +DFLAGS = +DFLAGS += -DBCM_53400_A0 # GREYHOUND +DFLAGS += -DBCM_53570_A0 # GREYHOUND2 +DFLAGS += -DBCM_56150_A0 # HURRICANE2 +DFLAGS += -DBCM_56160_A0 # HURRICANE3 +DFLAGS += -DBCM_56340_A0 # HELIX4 +DFLAGS += -DBCM_56450_A0 # KATANA2 +DFLAGS += -DBCM_56560_A0 # APACHE +DFLAGS += -DBCM_56850_A0 # TRIDENT2 +DFLAGS += -DBCM_56860_A0 # TRIDENT2+ +DFLAGS += -DBCM_56870_A0 # TRIDENT3 +DFLAGS += -DBCM_56770_A0 # MAVERICK2 +DFLAGS += -DBCM_56370_A0 # HELIX5 +DFLAGS += -DBCM_56960_A0 # TOMAHAWK +DFLAGS += -DBCM_56970_A0 # TOMAHAWK2 +DFLAGS += -DBCM_56980_A0 # TOMAHAWK3 +# SONIC-79319 Start +DFLAGS += -DBCM_56470_A0 # FIREBOLT6 +DFLAGS += -DBCM_56275_A0 # HURRICANE4 +DFLAGS += -DBCM_56175_A0 # TRIDENT3-X1 +# SONIC-79319 End + +# +# Compiler Related Options +# + +# Define if pointers are 64 bits on your compiler; +# this is typically true ONLY for 64-bit processors. +# NOTE: This support works ONLY under conditions where the +# upper 32 bits for ALL pointers are ZERO. +#CFGFLAGS += -DPTRS_ARE_64BITS + +# Disable inlining of functions +#CFGFLAGS += -DCOMPILER_OVERRIDE_NO_INLINE + +# Disable use of const +#CFGFLAGS += -DCOMPILER_OVERRIDE_NO_CONST + +# Disable use of static functions +#CFGFLAGS += -DCOMPILER_OVERRIDE_NO_STATIC + + +# +# Rules +# +all: build_dir + $(MAKE) $(LIB) + +$(LIB): $(OBJECTS) + $(AR) $(ARFLAGS) $@ $^ + +define compile_rules +$(1): $(subst .o,.c,$(subst $(BLDDIR),$(DCBDIR),$(1))) + $(CC) $(CFLAGS) $(DFLAGS) $$< -o $$@ +endef + +$(foreach object,$(OBJECTS),$(eval $(call compile_rules,$(object)))) + +.PHONY: clean +clean: + rm -f $(OBJECTS) $(LIB) + +.PHONY: build_dir +build_dir: + mkdir -p $(BLDDIR) + mkdir -p $(OBJECTSDIR) + +.PHONY: print_vars +print_vars: + echo $(SOURCES) + echo $(OBJECTS) + +# +# +# Example +# +test: all $(DCBDIR)/src/appl/test/dcb_test.c + $(CC) -Wall -I$(DCBDIR)/include \ + $(DCBDIR)/src/appl/test/dcb_test.c $(LIB) \ + -o $(BLDDIR)/test.exe + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c new file mode 100644 index 000000000000..2fa8f7b9d653 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c @@ -0,0 +1,243 @@ +/* + * $Id:$ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: dcb.c + * Purpose: DCB Library + * + */ + +#include +#include +#include +#include +#include +#include + +soc_control_t soc_control; + +#define DEVICE_FAMILY(_dev) ((_dev) & 0xfff0) + +#if defined(BCM_TRIUMPH3_SUPPORT) || defined(BCM_KATANA_SUPPORT) || \ + defined(BCM_TRIDENT2_SUPPORT) +extern dcb_op_t dcb23_op; +#endif +#if defined(BCM_TRIDENT2_SUPPORT) +extern dcb_op_t dcb26_op; +#endif +#if defined(BCM_KATANA2_SUPPORT) +extern dcb_op_t dcb29_op; +#endif +#if defined(BCM_HURRICANE2_SUPPORT) +extern dcb_op_t dcb30_op; +#endif +#if defined(BCM_GREYHOUND_SUPPORT) +extern dcb_op_t dcb31_op; +#endif +#if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TOMAHAWK2_SUPPORT) +extern dcb_op_t dcb32_op; +#endif +#if defined(BCM_TRIDENT2PLUS_SUPPORT) +extern dcb_op_t dcb33_op; +#endif +#if defined(BCM_HURRICANE3_SUPPORT) +extern dcb_op_t dcb34_op; +#endif +#if defined(BCM_APACHE_SUPPORT) +extern dcb_op_t dcb35_op; +#endif +#if defined(BCM_TRIDENT3_SUPPORT) +extern dcb_op_t dcb36_op; +#endif +#if defined(BCM_GREYHOUND2_SUPPORT) +extern dcb_op_t dcb37_op; +#endif +#if defined(BCM_TOMAHAWK3_SUPPORT) +extern dcb_op_t dcb38_op; +#endif + +/* + * Function: + * _dcb_op_get + * Description: + * Get DCB operation structure for a given device type and revision ID. + * Parameters: + * dev_id - (IN) Device ID + * rev_id - (IN) Revision ID + * Return: + * !NULL Pointer to DCB operations object + * NULL Failure + */ +static dcb_op_t * +_dcb_op_get(uint16 dev_id, uint8 rev_id) +{ + switch(dev_id) { +#if defined(BCM_TRIUMPH3_SUPPORT) || defined(BCM_KATANA_SUPPORT) || \ + defined(BCM_TRIDENT2_SUPPORT) + case DEVICE_FAMILY(BCM56640_DEVICE_ID): /* Triumph 3 */ + case DEVICE_FAMILY(BCM56340_DEVICE_ID): /* Helix 4 */ + return &dcb23_op; + break; +#endif +#if defined(BCM_TRIDENT2_SUPPORT) + case DEVICE_FAMILY(BCM56850_DEVICE_ID): /* Trident 2 */ + return &dcb26_op; + break; +#endif +#if defined(BCM_KATANA2_SUPPORT) + case DEVICE_FAMILY(BCM56450_DEVICE_ID): /* Katana 2 */ + return &dcb29_op; + break; +#endif +#if defined(BCM_HURRICANE2_SUPPORT) + case DEVICE_FAMILY(BCM56150_DEVICE_ID): /* Hurricane 2 */ + return &dcb30_op; + break; +#endif +#if defined(BCM_GREYHOUND_SUPPORT) + case DEVICE_FAMILY(BCM53400_DEVICE_ID): /* Greyhound */ + return &dcb31_op; + break; +#endif +#if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TOMAHAWK2_SUPPORT) + case DEVICE_FAMILY(BCM56960_DEVICE_ID): /* Tomahawk */ + case DEVICE_FAMILY(BCM56970_DEVICE_ID): /* Tomahawk 2 */ + return &dcb32_op; + break; +#endif +#if defined(BCM_TRIDENT2PLUS_SUPPORT) + case DEVICE_FAMILY(BCM56860_DEVICE_ID): /* Trident 2 plus*/ + return &dcb33_op; + break; +#endif +#if defined(BCM_HURRICANE3_SUPPORT) + case DEVICE_FAMILY(BCM56160_DEVICE_ID): /* Hurricane 3 */ + return &dcb34_op; + break; +#endif +#if defined(BCM_APACHE_SUPPORT) + case DEVICE_FAMILY(BCM56560_DEVICE_ID): /* Apache */ + case DEVICE_FAMILY(BCM56760_DEVICE_ID): /* Maverick */ + return &dcb35_op; + break; +#endif +#if defined(BCM_TRIDENT3_SUPPORT) + case DEVICE_FAMILY(BCM56870_DEVICE_ID): /* Trident 3*/ + /* SONIC-79319 Start */ + case DEVICE_FAMILY(BCM56770_DEVICE_ID): /* Maverick 2*/ + case DEVICE_FAMILY(BCM56370_DEVICE_ID): /* Helix 5*/ + case DEVICE_FAMILY(BCM56470_DEVICE_ID): /* Firebolt 6*/ + case DEVICE_FAMILY(BCM56275_DEVICE_ID): /* Hurricane 4*/ + case DEVICE_FAMILY(BCM56175_DEVICE_ID): /* Trident3 X1*/ + /* SONIC-79319 End */ + return &dcb36_op; + break; +#endif +#if defined(BCM_GREYHOUND2_SUPPORT) + case DEVICE_FAMILY(BCM53570_DEVICE_ID): /* Greyhound 2 */ + return &dcb37_op; + break; +#endif +#if defined(BCM_TOMAHAWK3_SUPPORT) + case DEVICE_FAMILY(BCM56980_DEVICE_ID): /* Tomahawk 3 */ + return &dcb38_op; + break; +#endif + default: + return NULL; + break; + } + + return NULL; +} + +/* + * Function: + * _dcb_htonl + * Description: + * Returns the value in network byte order. + * Parameters: + * value - (IN) Value + * Return: + * Value in network byte order + */ +uint32 +_dcb_htonl(uint32 value) +{ + uint32 new_value; + uint8 *buf =(uint8 *)&new_value; + + buf[0] = (value >> 24) & 0xff; + buf[1] = (value >> 16) & 0xff; + buf[2] = (value >> 8) & 0xff; + buf[3] = value & 0xff; + + return new_value; +} + +/* + * Function: + * dcb_handle_init + * Description: + * Initialize a DCB library handle for a given device type and revision. + * It must be called before calling any of the macros. + * Parameters: + * handle - (IN/OUT) Pointer to DCB library handle for given device + * dev_id - (IN) Device ID + * rev_id - (IN) Revision ID + * Return: + * DCB_OK Success + * DCB_ERROR Failure + * Notes: + * Each device type and revision (in some) needs to have a unique + * DCB library handle associated with it. + */ +int +dcb_handle_init(dcb_handle_t *handle, uint16 dev_id, uint8 rev_id) +{ + dcb_op_t *dcb_op; + + if (handle == NULL) { + return DCB_ERROR; + } + + handle->dcb_op = NULL; + + /* Get DCB operations */ + /* First use given specific device ID */ + if ((dcb_op = _dcb_op_get(dev_id, rev_id)) == NULL) { + /* Try family device */ + if ((dcb_op = _dcb_op_get(DEVICE_FAMILY(dev_id), rev_id)) == NULL) { + return DCB_ERROR; + } + } + + handle->dcb_op = dcb_op; + + return DCB_OK; +} + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c new file mode 100644 index 000000000000..20f64e4f3ee6 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c @@ -0,0 +1,200 @@ +/* + * $Id:$ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: test.c + * Purpose: DCB Library Example + * + */ + +#include + +int dcb_example() +{ + int rv; + dcb_handle_t dcb_handle; + int device_id = 0xb820; + int rev_id = 0; + int dcb_type, dcb_size; + uint8 dcb_buffer[256]; + dcb_t *dcb = (dcb_t *)dcb_buffer; + int value; + int dt_mode; + int ingport_is_hg; + soc_rx_reasons_t reasons; + soc_rx_reason_t reason; + dcb_handle_t *dcb_null = NULL; + + /* Error condition */ + rv = dcb_handle_init(dcb_null, device_id, rev_id); + printf("Error check: null handle. dcb_handle_init = %d\n", rv); + + rv = dcb_handle_init(&dcb_handle, 0xffff, 0xff); + printf("Error check: invalid device. dcb_handle_init = %d\n", rv); + + /* Init DCB library */ + printf("\n\nEnter device ID in hex (e.g. b860 for Trident 2+): "); + scanf("%x", &device_id); + rv = dcb_handle_init(&dcb_handle, device_id, rev_id); + printf("For device ID 0x%04X, dcb_handle_init = %d\n", device_id, rv); + + if (rv != DCB_OK) { + return 1; + } + + /* Get DCB type */ + dcb_type = DCB_TYPE(&dcb_handle); + printf("DCB type %d\n", dcb_type); + + /* Get DCB size */ + dcb_size = DCB_SIZE(&dcb_handle); + printf("DCB size %d\n", dcb_size); + + DCB_INIT(&dcb_handle, dcb); + + printf("\n"); + DCB_REQCOUNT_SET(&dcb_handle, dcb, 5); + value = DCB_REQCOUNT_GET(&dcb_handle, dcb); + printf("DCB_REQCOUNT_GET %d\n", value); + + value = DCB_XFERCOUNT_GET(&dcb_handle, dcb); + printf("DCB_XFERCOUNT_GET %d\n", value); + + DCB_DONE_SET(&dcb_handle, dcb, 1); + printf("DCB_DONE_GET %d\n", DCB_DONE_GET(&dcb_handle, dcb)); + + DCB_SG_SET(&dcb_handle, dcb, 1); + printf("DCB_SG_GET %d\n", DCB_SG_GET(&dcb_handle, dcb)); + + DCB_CHAIN_SET(&dcb_handle, dcb, 1); + printf("DCB_CHAIN_GET %d\n", DCB_CHAIN_GET(&dcb_handle, dcb)); + + DCB_RELOAD_SET(&dcb_handle, dcb, 1); + printf("DCB_RELOAD_GET %d\n", DCB_RELOAD_GET(&dcb_handle, dcb)); + + printf("\n"); + DCB_TX_CRC_SET(&dcb_handle, dcb, 1); + DCB_TX_COS_SET(&dcb_handle, dcb, 4); + DCB_TX_DESTMOD_SET(&dcb_handle, dcb, 2); + DCB_TX_DESTPORT_SET(&dcb_handle, dcb, 8); + DCB_TX_OPCODE_SET(&dcb_handle, dcb, 3); + DCB_TX_SRCMOD_SET(&dcb_handle, dcb, 1); + DCB_TX_SRCPORT_SET(&dcb_handle, dcb, 7); + DCB_TX_PRIO_SET(&dcb_handle, dcb, 4); + DCB_TX_PFM_SET(&dcb_handle, dcb, 1); + + printf("\n"); + dt_mode = 0; + ingport_is_hg = 0; + value = DCB_RX_UNTAGGED_GET(&dcb_handle, dcb, dt_mode, ingport_is_hg); + printf("DCB_RX_UNTAGGED_GET 0x%x (%d)\n", value, value); + + dt_mode = 0; + ingport_is_hg = 1; + value = DCB_RX_UNTAGGED_GET(&dcb_handle, dcb, dt_mode, ingport_is_hg); + printf("DCB_RX_UNTAGGED_GET 0x%x (%d)\n", value, value); + + printf("\n"); + printf("DCB_RX_CRC_GET %d\n", DCB_RX_CRC_GET(&dcb_handle, dcb)); + printf("DCB_RX_COS_GET %d\n", DCB_RX_COS_GET(&dcb_handle, dcb)); + printf("DCB_RX_DESTMOD_GET %d\n", DCB_RX_DESTMOD_GET(&dcb_handle, dcb)); + printf("DCB_RX_DESTPORT_GET %d\n", DCB_RX_DESTPORT_GET(&dcb_handle, dcb)); + printf("DCB_RX_OPCODE_GET %d\n", DCB_RX_OPCODE_GET(&dcb_handle, dcb)); + + printf("\n"); + printf("DCB_RX_CLASSTAG_GET %d\n", DCB_RX_CLASSTAG_GET(&dcb_handle, dcb)); + printf("DCB_RX_MATCHRULE_GET %d\n", DCB_RX_MATCHRULE_GET(&dcb_handle, dcb)); + printf("DCB_RX_START_GET %d\n", DCB_RX_START_GET(&dcb_handle, dcb)); + printf("DCB_RX_END_GET %d\n", DCB_RX_END_GET(&dcb_handle, dcb)); + printf("DCB_RX_ERROR_GET %d\n", DCB_RX_ERROR_GET(&dcb_handle, dcb)); + printf("DCB_RX_PRIO_GET %d\n", DCB_RX_PRIO_GET(&dcb_handle, dcb)); + + printf("\n"); + printf("DCB_RX_REASON_GET 0x%x\n", DCB_RX_REASON_GET(&dcb_handle, dcb)); + printf("DCB_RX_REASON_HI_GET 0x%x\n", + DCB_RX_REASON_HI_GET(&dcb_handle, dcb)); + printf("DCB_RX_REASONS_GET\n"); + DCB_RX_REASONS_GET(&dcb_handle, dcb, &reasons); + _SHR_RX_REASON_ITER(reasons, reason) { + printf(" %d\n", reason); + } + printf("\n"); + printf("DCB_RX_INGPORT_GET %d\n", DCB_RX_INGPORT_GET(&dcb_handle, dcb)); + printf("DCB_RX_SRCPORT_GET %d\n", DCB_RX_SRCPORT_GET(&dcb_handle, dcb)); + printf("DCB_RX_SRCMOD_GET %d\n", DCB_RX_SRCMOD_GET(&dcb_handle, dcb)); + + printf("\n"); + printf("DCB_RX_MCAST_GET %d\n", DCB_RX_MCAST_GET(&dcb_handle, dcb)); + printf("DCB_RX_VCLABEL_GET %d\n", DCB_RX_VCLABEL_GET(&dcb_handle, dcb)); + printf("DCB_RX_MIRROR_GET %d\n", DCB_RX_MIRROR_GET(&dcb_handle, dcb)); + printf("DCB_RX_MATCHRULE_GET %d\n", DCB_RX_MATCHRULE_GET(&dcb_handle, dcb)); + printf("DCB_RX_TIMESTAMP_GET %d\n", DCB_RX_TIMESTAMP_GET(&dcb_handle, dcb)); + printf("DCB_RX_TIMESTAMP_UPPER_GET %d\n", + DCB_RX_TIMESTAMP_UPPER_GET(&dcb_handle, dcb)); + + printf("\n"); + DCB_HG_SET(&dcb_handle, dcb, 1); + printf("DCB_HG_GET %d\n", DCB_HG_GET(&dcb_handle, dcb)); + DCB_STAT_SET(&dcb_handle, dcb, 1); + printf("DCB_STAT_GET %d\n", DCB_STAT_GET(&dcb_handle, dcb)); + DCB_PURGE_SET(&dcb_handle, dcb, 1); + printf("DCB_PURGE_GET %d\n", DCB_PURGE_GET(&dcb_handle, dcb)); + + printf("\n"); + printf("DCB_MHP_GET 0x%lx\n", + (((uintptr_t)(DCB_MHP_GET(&dcb_handle, dcb))) & 0xffffffff)); + printf("DCB_RX_OUTER_VID_GET %d\n", + DCB_RX_OUTER_VID_GET(&dcb_handle, dcb)); + printf("DCB_RX_OUTER_PRI_GET %d\n", + DCB_RX_OUTER_PRI_GET(&dcb_handle, dcb)); + printf("DCB_RX_OUTER_CFI_GET %d\n", + DCB_RX_OUTER_CFI_GET(&dcb_handle, dcb)); + printf("DCB_RX_OUTER_TAG_ACTION_GET %d\n", + DCB_RX_OUTER_TAG_ACTION_GET(&dcb_handle, dcb)); + printf("DCB_RX_INNER_VID_GET %d\n", + DCB_RX_INNER_VID_GET(&dcb_handle, dcb)); + printf("DCB_RX_INNER_PRI_GET %d\n", + DCB_RX_INNER_PRI_GET(&dcb_handle, dcb)); + printf("DCB_RX_INNER_CFI_GET %d\n", + DCB_RX_INNER_CFI_GET(&dcb_handle, dcb)); + printf("DCB_RX_INNER_TAG_ACTION_GET %d\n", + DCB_RX_INNER_TAG_ACTION_GET(&dcb_handle, dcb)); + printf("DCB_RX_BPDU_GET %d\n", + DCB_RX_BPDU_GET(&dcb_handle, dcb)); + printf("DCB_RX_L3_INTF_GET %d\n",\ + DCB_RX_L3_INTF_GET(&dcb_handle, dcb)); + + return rv; +} + +int main() +{ + dcb_example(); + + return 0; +} + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c new file mode 100644 index 000000000000..4f767e415e8e --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c @@ -0,0 +1,4891 @@ +/* + * $Id$ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * File: dcb.c + * Purpose: DCB manipulation routines + * Provide a uniform means of manipulation of DMA control blocks + * that is independent of the actual DCB format used in any + * particular chip. + */ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#if defined(BCM_ESW_SUPPORT) + +#define GETHDRFUNCEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *h = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + return _expr; \ + } +#define GETHDRFUNCFIELD(_dt, _name, _field) \ + GETHDRFUNCEXPR(_dt, _name, h->_field) +#define GETHDRFUNCERR(_dt, _name) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + COMPILER_REFERENCE(hdr); \ + ep_to_cpu_hdr_funcerr(_dt, #_name "_get"); \ + return 0; \ + } +#define GETHDRFUNCNULL(_dt, _name) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + COMPILER_REFERENCE(hdr); \ + return 0; \ + } +#define GETHDRPTREXPR(_dt, _name, _expr) \ + static uint32 * ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *h = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + return _expr; \ + } +#define GETHDRPTRERR(_dt, _name) \ + static uint32 * ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + COMPILER_REFERENCE(hdr); \ + ep_to_cpu_hdr_funcerr(_dt, #_name "_get"); \ + return NULL; \ + } +#define GETHDRFUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *h = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + COMPILER_REFERENCE(unit); \ + return _expr; \ + } +#define GETHDRFUNCUNITFIELD(_dt, _name, _field) \ + GETHDRFUNCUNITEXPR(_dt, _name, h->_field) +#define GETHDRFUNCUNITERR(_dt, _name) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ + COMPILER_REFERENCE(unit); \ + COMPILER_REFERENCE(hdr); \ + ep_to_cpu_hdr_funcerr(_dt, #_name "_get"); \ + return 0; \ + } +#define SETHDRFUNCEXPR(_dt, _name, _arg, _expr) \ + static void ep_to_cpu_hdr##_dt##_##_name##_set(void *hdr, _arg) { \ + ep_to_cpu_hdr##_dt##_t *h = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + _expr; \ + } +#define SETHDRFUNCFIELD(_dt, _name, _field, _arg, _expr) \ + SETHDRFUNCEXPR(_dt, _name, _arg, h->_field = _expr) +#define SETHDRFUNCERR(_dt, _name, _type) \ + static void ep_to_cpu_hdr##_dt##_##_name##_set(void *hdr, _type val) { \ + COMPILER_REFERENCE(hdr); \ + COMPILER_REFERENCE(val); \ + ep_to_cpu_hdr_funcerr(_dt, #_name "_set"); \ + } +#define SETHDRFUNCNULL(_dt, _name) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_set(void *hdr, uint32 val) { \ + COMPILER_REFERENCE(hdr); \ + return 0; \ + } +#define SETHDRFUNCEXPRIGNORE(_dt, _name, _arg, _expr) \ + SETHDRFUNCEXPR(_dt, _name, _arg, COMPILER_REFERENCE(h)) +#if defined(LE_HOST) +#define GETHDRHGFUNCEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + uint32 hgh[3]; \ + soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; \ + hgh[0] = soc_htonl(hd->mh0); \ + hgh[1] = soc_htonl(hd->mh1); \ + hgh[2] = soc_htonl(hd->mh2); \ + return _expr; \ + } +#else +#define GETHDRHGFUNCEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hd->mh0; \ + return _expr; \ + } +#endif +#define GETHDRHGFUNCFIELD(_dt, _name, _field) \ + GETHDRHGFUNCEXPR(_dt, _name, h->hgp_overlay1._field) + +#if defined(LE_HOST) +#define GETHDRHG2FUNCEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + uint32 hgh[4]; \ + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; \ + hgh[0] = soc_htonl(hd->mh0); \ + hgh[1] = soc_htonl(hd->mh1); \ + hgh[2] = soc_htonl(hd->mh2); \ + hgh[3] = soc_htonl(hd->mh3); \ + return _expr; \ + } +#else +#define GETHDRHG2FUNCEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hd->mh0; \ + return _expr; \ + } +#endif +#define GETHDRHG2FUNCFIELD(_dt, _name, _field) \ + GETHDRHG2FUNCEXPR(_dt, _name, h->ppd_overlay1._field) + +#if defined(LE_HOST) +#define GETHDRHGFUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + uint32 hgh[3]; \ + soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; \ + COMPILER_REFERENCE(unit); \ + hgh[0] = soc_htonl(hd->mh0); \ + hgh[1] = soc_htonl(hd->mh1); \ + hgh[2] = soc_htonl(hd->mh2); \ + return _expr; \ + } +#else +#define GETHDRHGFUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)dcb; \ + soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hd->mh0; \ + COMPILER_REFERENCE(unit); \ + return _expr; \ + } +#endif + +#if defined(LE_HOST) +#define GETHDRHG2FUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + uint32 hgh[4]; \ + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; \ + COMPILER_REFERENCE(unit); \ + hgh[0] = soc_htonl(hd->mh0); \ + hgh[1] = soc_htonl(hd->mh1); \ + hgh[2] = soc_htonl(hd->mh2); \ + hgh[3] = soc_htonl(hd->mh3); \ + return _expr; \ + } +#else +#define GETHDRHG2FUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) { \ + ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr; \ + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hd->mh0; \ + COMPILER_REFERENCE(unit); \ + return _expr; \ + } +#endif + +/* + * Short cuts for generating dcb support functions. + * Most support functions are just setting or getting a field + * in the appropriate dcb structure or doing a simple expression + * based on a couple of fields. + * GETFUNCFIELD - get a field from DCB + * SETFUNCFIELD - set a field in DCB + * SETFUNCERR - dummy handler for field that does not exist for + * a descriptor type + * GETFUNCERR - dummy handler for field that does not exist for + * a descriptor type + */ +#define GETFUNCEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + return _expr; \ + } +#define GETFUNCFIELD(_dt, _name, _field) \ + GETFUNCEXPR(_dt, _name, d->_field) +#define GETFUNCERR(_dt, _name) \ + static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + COMPILER_REFERENCE(dcb); \ + dcb0_funcerr(_dt, #_name "_get"); \ + return 0; \ + } +#define GETFUNCNULL(_dt, _name) \ + static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + COMPILER_REFERENCE(dcb); \ + return 0; \ + } +#define GETPTREXPR(_dt, _name, _expr) \ + static uint32 * dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + return _expr; \ + } +#define GETPTRERR(_dt, _name) \ + static uint32 * dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + COMPILER_REFERENCE(dcb); \ + dcb0_funcerr(_dt, #_name "_get"); \ + return NULL; \ + } +#define GETFUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + COMPILER_REFERENCE(unit); \ + return _expr; \ + } +#define GETFUNCUNITFIELD(_dt, _name, _field) \ + GETFUNCUNITEXPR(_dt, _name, d->_field) +#define GETFUNCUNITERR(_dt, _name) \ + static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ + COMPILER_REFERENCE(unit); \ + COMPILER_REFERENCE(dcb); \ + dcb0_funcerr(_dt, #_name "_get"); \ + return 0; \ + } +#define SETFUNCEXPR(_dt, _name, _arg, _expr) \ + static void dcb##_dt##_##_name##_set(dcb_t *dcb, _arg) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + _expr; \ + } +#define SETFUNCFIELD(_dt, _name, _field, _arg, _expr) \ + SETFUNCEXPR(_dt, _name, _arg, d->_field = _expr) +#define SETFUNCERR(_dt, _name, _type) \ + static void dcb##_dt##_##_name##_set(dcb_t *dcb, _type val) { \ + COMPILER_REFERENCE(dcb); \ + COMPILER_REFERENCE(val); \ + dcb0_funcerr(_dt, #_name "_set"); \ + } +#define SETFUNCNULL(_dt, _name) \ + static uint32 dcb##_dt##_##_name##_set(dcb_t *dcb,uint32 val) { \ + COMPILER_REFERENCE(dcb); \ + return 0; \ + } +#define SETFUNCNULL2(_dt, _name) \ + static void dcb##_dt##_##_name##_set(dcb_t *dcb,uint32 val) { \ + COMPILER_REFERENCE(dcb); \ + } + +#define SETFUNCEXPRIGNORE(_dt, _name, _arg, _expr) \ + SETFUNCEXPR(_dt, _name, _arg, COMPILER_REFERENCE(d)) +#if defined(LE_HOST) +#define GETHGFUNCEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + uint32 hgh[3]; \ + soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; \ + hgh[0] = soc_htonl(d->mh0); \ + hgh[1] = soc_htonl(d->mh1); \ + hgh[2] = soc_htonl(d->mh2); \ + return _expr; \ + } +#else +#define GETHGFUNCEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + soc_higig_hdr_t *h = (soc_higig_hdr_t *)&d->mh0; \ + return _expr; \ + } +#endif +#define GETHGFUNCFIELD(_dt, _name, _field) \ + GETHGFUNCEXPR(_dt, _name, h->hgp_overlay1._field) + +#if defined(LE_HOST) +#define GETHG2FUNCEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + uint32 hgh[4]; \ + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; \ + hgh[0] = soc_htonl(d->mh0); \ + hgh[1] = soc_htonl(d->mh1); \ + hgh[2] = soc_htonl(d->mh2); \ + hgh[3] = soc_htonl(d->mh3); \ + return _expr; \ + } +#else +#define GETHG2FUNCEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&d->mh0; \ + return _expr; \ + } +#endif +#define GETHG2FUNCFIELD(_dt, _name, _field) \ + GETHG2FUNCEXPR(_dt, _name, h->ppd_overlay1._field) + +#if defined(LE_HOST) +#define GETHGFUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + uint32 hgh[3]; \ + soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0]; \ + COMPILER_REFERENCE(unit); \ + hgh[0] = soc_htonl(d->mh0); \ + hgh[1] = soc_htonl(d->mh1); \ + hgh[2] = soc_htonl(d->mh2); \ + return _expr; \ + } +#else +#define GETHGFUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + soc_higig_hdr_t *h = (soc_higig_hdr_t *)&d->mh0; \ + COMPILER_REFERENCE(unit); \ + return _expr; \ + } +#endif + +#if defined(LE_HOST) +#define GETHG2FUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + uint32 hgh[4]; \ + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; \ + COMPILER_REFERENCE(unit); \ + hgh[0] = soc_htonl(d->mh0); \ + hgh[1] = soc_htonl(d->mh1); \ + hgh[2] = soc_htonl(d->mh2); \ + hgh[3] = soc_htonl(d->mh3); \ + return _expr; \ + } +#else +#define GETHG2FUNCUNITEXPR(_dt, _name, _expr) \ + static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) { \ + dcb##_dt##_t *d = (dcb##_dt##_t *)dcb; \ + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&d->mh0; \ + COMPILER_REFERENCE(unit); \ + return _expr; \ + } +#endif + +/* + * This is a standard function used to generate a debug message whenever + * the code tries to access a field not present in the specific DCB + */ +static void +dcb0_funcerr(int dt, char *name) +{ + LOG_ERROR(BSL_LS_SOC_COMMON, + (BSL_META("ERROR: dcb%d_%s called\n"), dt, name)); +} + +/* the addr related functions are the same for all dcb types */ +static void +dcb0_addr_set(int unit, dcb_t *dcb, sal_vaddr_t addr) +{ + uint32 *d = (uint32 *)dcb; + + if (addr == 0) { + *d = 0; + } else { + *d = soc_cm_l2p(unit, (void *)addr); + } +} + +static sal_vaddr_t +dcb0_addr_get(int unit, dcb_t *dcb) +{ + uint32 *d = (uint32 *)dcb; + + if (*d == 0) { + return (sal_vaddr_t)0; + } else { + return (sal_vaddr_t)soc_cm_p2l(unit, *d); + } +} + +static sal_paddr_t +dcb0_paddr_get(dcb_t *dcb) +{ + uint32 *d = (uint32 *)dcb; + + return (sal_paddr_t)*d; +} + +/* + * Function: + * dcb0_rx_reason_map_get + * Purpose: + * Return the RX reason map for a series of DCB types. + * Parameters: + * dcb_op - DCB operations + * dcb - dma control block + * Returns: + * RX reason map pointer + * Notes: + * Function made global to resolve compiler link issue. + */ +soc_rx_reason_t * +dcb0_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb) +{ + COMPILER_REFERENCE(dcb); + + return dcb_op->rx_reason_maps[0]; +} + +/* + * Function: + * dcb0_rx_reasons_get + * Purpose: + * Map the hardware reason bits from 'dcb' into the set + * of "reasons". + * Parameters: + * dcb_op - DCB operations + * dcb - dma control block + * reasons - set of "reasons", socRxReason* + */ +static void +dcb0_rx_reasons_get(dcb_op_t *dcb_op, dcb_t *dcb, soc_rx_reasons_t *reasons) +{ + soc_rx_reason_t *map; + uint32 reason; + uint32 mask; + int i; + + SOC_RX_REASON_CLEAR_ALL(*reasons); + + map = dcb_op->rx_reason_map_get(dcb_op, dcb); + if (map == NULL) { + return; + } + + reason = dcb_op->rx_reason_get(dcb); + mask = 1; + for (i = 0; i < 32; i++) { + if ((mask & reason)) { + SOC_RX_REASON_SET(*reasons, map[i]); + } + mask <<= 1; + } + + reason = dcb_op->rx_reason_hi_get(dcb); + mask = 1; + for (i = 0; i < 32; i++) { + if ((mask & reason)) { + SOC_RX_REASON_SET(*reasons, map[i + 32]); + } + mask <<= 1; + } + + /* BPDU bit should be a reason, paste it in here */ + if (dcb_op->rx_bpdu_get(dcb)) { + SOC_RX_REASON_SET(*reasons, socRxReasonBpdu); + } + + return; +} + +#if defined(BCM_XGS3_SWITCH_SUPPORT) +/* + * DCB Type 9 Support + */ +GETFUNCFIELD(9, rx_l3_intf, l3_intf) +#endif /* BCM_XGS3_SWITCH_SUPPORT */ + +#if defined(BCM_TRIUMPH2_SUPPORT) +static void +dcb19_init(dcb_t *dcb) +{ + uint32 *d = (uint32 *)dcb; + + d[0] = d[1] = d[2] = d[3] = d[4] = 0; + d[5] = d[6] = d[7] = d[8] = d[9] = d[10] = 0; + d[11] = d[12] = d[13] = d[14] = d[15] = 0; +} + +static int +dcb19_addtx(dv_t *dv, sal_vaddr_t addr, uint32 count, + pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh) +{ + dcb19_t *d; /* DCB */ + uint32 *di; /* DCB integer pointer */ + uint32 paddr; /* Packet buffer physical address */ + int unaligned; + int unaligned_bytes; + uint8 *unaligned_buffer; + uint8 *aligned_buffer; + + d = (dcb19_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); + + if (addr) { + paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); + } else { + paddr = 0; + } + + if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) && + (d[-1].c_sg != 0) && + (d[-1].addr + d[-1].c_count) == paddr && + d[-1].c_count + count <= DCB_MAX_REQCOUNT) { + d[-1].c_count += count; + return dv->dv_cnt - dv->dv_vcnt; + } + + /* + * A few chip revisions do not support 128 byte PCI bursts + * correctly if the address is not word-aligned. In case + * we encounter an unaligned address, we consume an extra + * DCB to correct the alignment. + */ + do { + if (dv->dv_vcnt >= dv->dv_cnt) { + return SOC_E_FULL; + } + if (dv->dv_vcnt > 0) { /* chain off previous dcb */ + d[-1].c_chain = 1; + } + + di = (uint32 *)d; + di[0] = di[1] = di[2] = di[3] = di[4] = 0; + di[5] = di[6] = di[7] = di[8] = di[9] = di[10] = 0; + di[11] = di[12] = di[13] = di[14] = di[15] = 0; + + d->addr = paddr; + d->c_count = count; + d->c_sg = 1; + + d->c_stat = 1; + d->c_purge = SOC_DMA_PURGE_GET(flags); + if (SOC_DMA_HG_GET(flags)) { + soc_higig_hdr_t *mh = (soc_higig_hdr_t *)hgh; + if (mh->overlay1.start == SOC_HIGIG2_START) { + d->mh3 = soc_ntohl(hgh[3]); + } + d->c_hg = 1; + d->mh0 = soc_ntohl(hgh[0]); + d->mh1 = soc_ntohl(hgh[1]); + d->mh2 = soc_ntohl(hgh[2]); + d->mh3 = soc_ntohl(hgh[3]); + } + + unaligned = 0; + if (soc_feature(dv->dv_unit, soc_feature_pkt_tx_align)) { + if (paddr & 0x3) { + unaligned_bytes = 4 - (paddr & 0x3); + unaligned_buffer = (uint8 *)addr; + aligned_buffer = SOC_DV_TX_ALIGN(dv, dv->dv_vcnt); + aligned_buffer[0] = unaligned_buffer[0]; + aligned_buffer[1] = unaligned_buffer[1]; + aligned_buffer[2] = unaligned_buffer[2]; + d->addr = soc_cm_l2p(dv->dv_unit, aligned_buffer); + if (count > 3) { + d->c_count = unaligned_bytes; + paddr += unaligned_bytes; + count -= unaligned_bytes; + unaligned = 1; + } + } + } + + dv->dv_vcnt += 1; + + d = (dcb19_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); + + } while (unaligned); + + return dv->dv_cnt - dv->dv_vcnt; +} + +static int +dcb19_addrx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags) +{ + dcb19_t *d; /* DCB */ + uint32 *di; /* DCB integer pointer */ + + d = (dcb19_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); + + if (dv->dv_vcnt > 0) { /* chain off previous dcb */ + d[-1].c_chain = 1; + } + + di = (uint32 *)d; + di[0] = di[1] = di[2] = di[3] = di[4] = 0; + di[5] = di[6] = di[7] = di[8] = di[9] = di[10] = 0; + di[11] = di[12] = di[13] = di[14] = di[15] = 0; + + if (addr) { + d->addr = soc_cm_l2p(dv->dv_unit, (void *)addr); + } + d->c_count = count; + d->c_sg = 1; + + dv->dv_vcnt += 1; + return dv->dv_cnt - dv->dv_vcnt; +} + +static uint32 +dcb19_intrinfo(int unit, dcb_t *dcb, int tx, uint32 *count) +{ + dcb19_t *d = (dcb19_t *)dcb; /* DCB */ + uint32 f; /* SOC_DCB_INFO_* flags */ + + if (!d->done) { + return 0; + } + f = SOC_DCB_INFO_DONE; + if (tx) { + if (!d->c_sg) { + f |= SOC_DCB_INFO_PKTEND; + } + } else { + if (d->end) { + f |= SOC_DCB_INFO_PKTEND; + } + } + *count = d->count; + return f; +} + +static uint32 +dcb19_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) +{ + dcb19_t *d = (dcb19_t *)dcb; + + COMPILER_REFERENCE(dt_mode); + + return (ingport_is_hg ? + ((d->itag_status) ? 0 : 2) : + ((d->itag_status & 0x2) ? + ((d->itag_status & 0x1) ? 0 : 2) : + ((d->itag_status & 0x1) ? 1 : 3))); +} + +SETFUNCFIELD(19, reqcount, c_count, uint32 count, count) +GETFUNCFIELD(19, reqcount, c_count) +GETFUNCFIELD(19, xfercount, count) +/* addr_set, addr_get, paddr_get - Same as DCB 0 */ +SETFUNCFIELD(19, done, done, int val, val ? 1 : 0) +GETFUNCFIELD(19, done, done) +SETFUNCFIELD(19, sg, c_sg, int val, val ? 1 : 0) +GETFUNCFIELD(19, sg, c_sg) +SETFUNCFIELD(19, chain, c_chain, int val, val ? 1 : 0) +GETFUNCFIELD(19, chain, c_chain) +SETFUNCFIELD(19, reload, c_reload, int val, val ? 1 : 0) +GETFUNCFIELD(19, reload, c_reload) +SETFUNCERR(19, desc_intr, int) +GETFUNCERR(19, desc_intr) +SETFUNCERR(19, tx_l2pbm, pbmp_t) +SETFUNCERR(19, tx_utpbm, pbmp_t) +SETFUNCERR(19, tx_l3pbm, pbmp_t) +SETFUNCERR(19, tx_crc, int) +SETFUNCERR(19, tx_cos, int) +SETFUNCERR(19, tx_destmod, uint32) +SETFUNCERR(19, tx_destport, uint32) +SETFUNCERR(19, tx_opcode, uint32) +SETFUNCERR(19, tx_srcmod, uint32) +SETFUNCERR(19, tx_srcport, uint32) +SETFUNCERR(19, tx_prio, uint32) +SETFUNCERR(19, tx_pfm, uint32) +GETFUNCFIELD(19, rx_start, start) +GETFUNCFIELD(19, rx_end, end) +GETFUNCFIELD(19, rx_error, error) +GETFUNCFIELD(19, rx_cos, cpu_cos) +/* Fields extracted from MH/PBI */ +GETHG2FUNCFIELD(19, rx_destmod, dst_mod) +GETHG2FUNCFIELD(19, rx_destport, dst_port) +GETHG2FUNCFIELD(19, rx_srcmod, src_mod) +GETHG2FUNCFIELD(19, rx_srcport, src_port) +GETHG2FUNCFIELD(19, rx_opcode, opcode) +GETHG2FUNCFIELD(19, rx_prio, vlan_pri) /* outer_pri */ +GETHG2FUNCEXPR(19, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | + (h->ppd_overlay1.dst_port))) +GETHG2FUNCEXPR(19, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | + (h->ppd_overlay1.vc_label_15_8 << 8) | + (h->ppd_overlay1.vc_label_7_0))) +GETHG2FUNCEXPR(19, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : + (h->ppd_overlay2.ctag_hi << 8) | + (h->ppd_overlay2.ctag_lo))) +GETFUNCFIELD(19, rx_reason, reason) +GETFUNCFIELD(19, rx_reason_hi, reason_hi) +GETFUNCFIELD(19, rx_ingport, srcport) +GETFUNCEXPR(19, rx_mirror, ((d->imirror) | (d->emirror))) +SETFUNCFIELD(19, hg, c_hg, uint32 hg, hg) +GETFUNCFIELD(19, hg, c_hg) +SETFUNCFIELD(19, stat, c_stat, uint32 stat, stat) +GETFUNCFIELD(19, stat, c_stat) +SETFUNCFIELD(19, purge, c_purge, uint32 purge, purge) +GETFUNCFIELD(19, purge, c_purge) +GETPTREXPR(19, mhp, &(d->mh0)) +GETFUNCFIELD(19, outer_vid, outer_vid) +GETFUNCFIELD(19, outer_pri, outer_pri) +GETFUNCFIELD(19, outer_cfi, outer_cfi) +GETFUNCFIELD(19, rx_outer_tag_action, otag_action) +GETFUNCFIELD(19, inner_vid, inner_vid) +GETFUNCFIELD(19, inner_pri, inner_pri) +GETFUNCFIELD(19, inner_cfi, inner_cfi) +GETFUNCFIELD(19, rx_inner_tag_action, itag_action) +GETFUNCFIELD(19, rx_bpdu, bpdu) +GETFUNCNULL(19, rx_decap_tunnel) + +static uint32 dcb19_rx_crc_get(dcb_t *dcb) { + return 0; +} + +#endif /* BCM_TRIUMPH2_SUPPORT */ + +#if defined(BCM_ENDURO_SUPPORT) || defined(BCM_HURRICANE_SUPPORT) +/* + * DCB Type 20 Support + */ + +static soc_rx_reason_t +dcb20_rx_reason_map[] = { + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonL2SourceMiss, /* Offset 1 */ + socRxReasonL2DestMiss, /* Offset 2 */ + socRxReasonL2Move, /* Offset 3 */ + socRxReasonL2Cpu, /* Offset 4 */ + socRxReasonSampleSource, /* Offset 5 */ + socRxReasonSampleDest, /* Offset 6 */ + socRxReasonL3SourceMiss, /* Offset 7 */ + socRxReasonL3DestMiss, /* Offset 8 */ + socRxReasonL3SourceMove, /* Offset 9 */ + socRxReasonMcastMiss, /* Offset 10 */ + socRxReasonIpMcastMiss, /* Offset 11 */ + socRxReasonFilterMatch, /* Offset 12 */ + socRxReasonL3HeaderError, /* Offset 13 */ + socRxReasonProtocol, /* Offset 14 */ + socRxReasonDosAttack, /* Offset 15 */ + socRxReasonMartianAddr, /* Offset 16 */ + socRxReasonTunnelError, /* Offset 17 */ + socRxReasonL2MtuFail, /* Offset 18 */ + socRxReasonIcmpRedirect, /* Offset 19 */ + socRxReasonL3Slowpath, /* Offset 20 */ + socRxReasonParityError, /* Offset 21 */ + socRxReasonL3MtuFail, /* Offset 22 */ + socRxReasonHigigHdrError, /* Offset 23 */ + socRxReasonMcastIdxError, /* Offset 24 */ + socRxReasonVlanFilterMatch, /* Offset 25 */ + socRxReasonClassBasedMove, /* Offset 26 */ + socRxReasonL2LearnLimit, /* Offset 27 */ + socRxReasonMplsLabelMiss, /* Offset 28 */ + socRxReasonMplsInvalidAction, /* Offset 29 */ + socRxReasonMplsInvalidPayload, /* Offset 30 */ + socRxReasonMplsTtl, /* Offset 31 */ + socRxReasonMplsSequenceNumber, /* Offset 32 */ + socRxReasonL2NonUnicastMiss, /* Offset 33 */ + socRxReasonNhop, /* Offset 34 */ + socRxReasonMplsCtrlWordError, /* Offset 35 */ + socRxReasonTimeSync, /* Offset 36 */ + socRxReasonOAMSlowpath, /* Offset 37 */ + socRxReasonOAMError, /* Offset 38 */ + socRxReasonOAMLMDM, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static soc_rx_reason_t *dcb20_rx_reason_maps[] = { + dcb20_rx_reason_map, + NULL +}; + +GETFUNCFIELD(20, rx_matchrule, match_rule) +GETFUNCFIELD(20, rx_timestamp, timestamp) +GETFUNCFIELD(20, rx_timestamp_upper, timestamp_upper) +#endif /* BCM_ENDURO_SUPPORT || BCM_HURRICANE_SUPPORT */ + +#if defined(BCM_TRIDENT_SUPPORT) +/* + * DCB Type 21 Support + */ +/* From FORMAT NIV_CPU_OPCODE_ENCODING */ +static soc_rx_reason_t dcb21_rx_reason_niv_encoding_map[] = { + socRxReasonNiv, /* 0: NO_ERRORS + * Base field, must match the entries above */ + socRxReasonNivPrioDrop, /* 1:DOT1P_ADMITTANCE_DISCARD */ + socRxReasonNivInterfaceMiss, /* 2:VIF_LOOKUP_MISS */ + socRxReasonNivRpfFail, /* 3:RPF_LOOKUP_MISS */ + socRxReasonNivTagInvalid, /* 4:VNTAG_FORMAT_ERROR */ + socRxReasonNivTagDrop, /* 5:VNTAG_PRESENT_DROP */ + socRxReasonNivUntagDrop, /* 6:VNTAG_NOT_PRESENT_DROP */ + socRxReasonInvalid, /* Offset 7 */ + socRxReasonInvalid, /* Offset 8 */ + socRxReasonInvalid, /* Offset 9 */ + socRxReasonInvalid, /* Offset 10 */ + socRxReasonInvalid, /* Offset 11 */ + socRxReasonInvalid, /* Offset 12 */ + socRxReasonInvalid, /* Offset 13 */ + socRxReasonInvalid, /* Offset 14 */ + socRxReasonInvalid, /* Offset 15 */ + socRxReasonInvalid, /* Offset 16 */ + socRxReasonInvalid, /* Offset 17 */ + socRxReasonInvalid, /* Offset 18 */ + socRxReasonInvalid, /* Offset 19 */ + socRxReasonInvalid, /* Offset 20 */ + socRxReasonInvalid, /* Offset 21 */ + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static void +dcb21_rx_reasons_get(dcb_op_t *dcb_op, dcb_t *dcb, soc_rx_reasons_t *reasons) +{ + soc_rx_reason_t *map, *encoding_map; + uint32 opcode[2], encoding[3]; + uint32 bit_val; + int word_idx, bit_idx, opcode_idx, map_idx, word_count; + int enc_bit = 0; + + SOC_RX_REASON_CLEAR_ALL(*reasons); + + opcode[0] = dcb_op->rx_reason_get(dcb); + opcode[1] = dcb_op->rx_reason_hi_get(dcb); + word_count = 2; + sal_memset(encoding, 0, sizeof(encoding)); + map = dcb_op->rx_reason_map_get(dcb_op, dcb); + for (word_idx = 0; word_idx < word_count; word_idx++) { + for (bit_idx = 0; bit_idx < 32; bit_idx++) { + opcode_idx = word_idx * 32 + bit_idx; + bit_val = opcode[word_idx] & (1 << bit_idx) ? 1 : 0; + for (map_idx = 0; ; map_idx++) { + encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; + if (encoding_map == NULL) { + break; + } + if (map[opcode_idx] != encoding_map[0]) { + continue; + } + if (opcode_idx == 0 || map[opcode_idx - 1] != encoding_map[0]) { + enc_bit = 0; + } + encoding[map_idx] |= bit_val << enc_bit; + enc_bit++; + break; + } + if (encoding_map == NULL && bit_val) { + SOC_RX_REASON_SET(*reasons, map[opcode_idx]); + } + } + } + + for (map_idx = 0; ; map_idx++) { + encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; + if (encoding_map == NULL) { + break; + } + if (encoding[map_idx] != socRxReasonInvalid) { + SOC_RX_REASON_SET(*reasons, encoding_map[encoding[map_idx]]); + } + } + + /* BPDU bit should be a reason, paste it in here */ + if (dcb_op->rx_bpdu_get(dcb)) { + SOC_RX_REASON_SET(*reasons, socRxReasonBpdu); + } + + return; +} +#endif /* BCM_TRIDENT_SUPPORT */ + +#if defined(BCM_TRIUMPH3_SUPPORT) || defined(BCM_KATANA_SUPPORT) || \ + defined(BCM_TRIDENT2_SUPPORT) || defined(BCM_GREYHOUND_SUPPORT) +/* + * DCB Type 23 Support + */ +static soc_rx_reason_t +dcb23_rx_reason_map_ip_0[] = { /* IP Overlay 0 */ + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonL2SourceMiss, /* Offset 1 */ + socRxReasonL2DestMiss, /* Offset 2 */ + socRxReasonL2Move, /* Offset 3 */ + socRxReasonL2Cpu, /* Offset 4 */ + socRxReasonSampleSource, /* Offset 5 */ + socRxReasonSampleDest, /* Offset 6 */ + socRxReasonL3SourceMiss, /* Offset 7 */ + socRxReasonL3DestMiss, /* Offset 8 */ + socRxReasonL3SourceMove, /* Offset 9 */ + socRxReasonMcastMiss, /* Offset 10 */ + socRxReasonIpMcastMiss, /* Offset 11 */ + socRxReasonL3HeaderError, /* Offset 12 */ + socRxReasonProtocol, /* Offset 13 */ + socRxReasonDosAttack, /* Offset 14 */ + socRxReasonMartianAddr, /* Offset 15 */ + socRxReasonTunnelError, /* Offset 16 */ + socRxReasonMirror, /* Offset 17 */ + socRxReasonIcmpRedirect, /* Offset 18 */ + socRxReasonL3Slowpath, /* Offset 19 */ + socRxReasonL3MtuFail, /* Offset 20 */ + socRxReasonMcastIdxError, /* Offset 21 */ + socRxReasonVlanFilterMatch, /* Offset 22 */ + socRxReasonClassBasedMove, /* Offset 23 */ + socRxReasonL3AddrBindFail, /* Offset 24 */ + socRxReasonMplsLabelMiss, /* Offset 25 */ + socRxReasonMplsInvalidAction, /* Offset 26 */ + socRxReasonMplsInvalidPayload, /* Offset 27 */ + socRxReasonMplsTtl, /* Offset 28 */ + socRxReasonMplsSequenceNumber, /* Offset 29 */ + socRxReasonL2NonUnicastMiss, /* Offset 30 */ + socRxReasonNhop, /* Offset 31 */ + socRxReasonStation, /* Offset 32 */ + socRxReasonVlanTranslate, /* Offset 33 */ + socRxReasonTimeSync, /* Offset 34 */ + socRxReasonOAMSlowpath, /* Offset 35 */ + socRxReasonOAMError, /* Offset 36 */ + socRxReasonIpfixRateViolation, /* Offset 37 */ + socRxReasonL2LearnLimit, /* Offset 38 */ + socRxReasonEncapHigigError, /* Offset 39 */ + socRxReasonRegexMatch, /* Offset 40 */ + socRxReasonOAMLMDM, /* Offset 41 */ + socRxReasonBfd, /* Offset 42 */ + socRxReasonBfdSlowpath, /* Offset 43 */ + socRxReasonFailoverDrop, /* Offset 44 */ + socRxReasonTrillName, /* Offset 45 */ + socRxReasonTrillTtl, /* Offset 46 */ + socRxReasonTrillCoreIsIs, /* Offset 47 */ + socRxReasonTrillSlowpath, /* Offset 48 */ + socRxReasonTrillRpfFail, /* Offset 49 */ + socRxReasonTrillMiss, /* Offset 50 */ + socRxReasonTrillInvalid, /* Offset 51 */ + socRxReasonNivUntagDrop, /* Offset 52 */ + socRxReasonNivTagDrop, /* Offset 53 */ + socRxReasonNivTagInvalid, /* Offset 54 */ + socRxReasonNivRpfFail, /* Offset 55 */ + socRxReasonNivInterfaceMiss, /* Offset 56 */ + socRxReasonNivPrioDrop, /* Offset 57 */ + socRxReasonParityError, /* Offset 58 */ + socRxReasonHigigHdrError, /* Offset 59 */ + socRxReasonFilterMatch, /* Offset 60 */ + socRxReasonL2GreSipMiss, /* Offset 61 */ + socRxReasonL2GreVpnIdMiss, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static soc_rx_reason_t +dcb23_rx_reason_map_ip_1[] = { /* IP Overlay 1 */ + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonL2SourceMiss, /* Offset 1 */ + socRxReasonL2DestMiss, /* Offset 2 */ + socRxReasonL2Move, /* Offset 3 */ + socRxReasonL2Cpu, /* Offset 4 */ + socRxReasonSampleSource, /* Offset 5 */ + socRxReasonSampleDest, /* Offset 6 */ + socRxReasonL3SourceMiss, /* Offset 7 */ + socRxReasonL3DestMiss, /* Offset 8 */ + socRxReasonL3SourceMove, /* Offset 9 */ + socRxReasonMcastMiss, /* Offset 10 */ + socRxReasonIpMcastMiss, /* Offset 11 */ + socRxReasonL3HeaderError, /* Offset 12 */ + socRxReasonProtocol, /* Offset 13 */ + socRxReasonDosAttack, /* Offset 14 */ + socRxReasonMartianAddr, /* Offset 15 */ + socRxReasonTunnelError, /* Offset 16 */ + socRxReasonMirror, /* Offset 17 */ + socRxReasonIcmpRedirect, /* Offset 18 */ + socRxReasonL3Slowpath, /* Offset 19 */ + socRxReasonL3MtuFail, /* Offset 20 */ + socRxReasonMcastIdxError, /* Offset 21 */ + socRxReasonVlanFilterMatch, /* Offset 22 */ + socRxReasonClassBasedMove, /* Offset 23 */ + socRxReasonL3AddrBindFail, /* Offset 24 */ + socRxReasonMplsLabelMiss, /* Offset 25 */ + socRxReasonMplsInvalidAction, /* Offset 26 */ + socRxReasonMplsInvalidPayload, /* Offset 27 */ + socRxReasonMplsTtl, /* Offset 28 */ + socRxReasonMplsSequenceNumber, /* Offset 29 */ + socRxReasonL2NonUnicastMiss, /* Offset 30 */ + socRxReasonNhop, /* Offset 31 */ + socRxReasonStation, /* Offset 32 */ + socRxReasonVlanTranslate, /* Offset 33 */ + socRxReasonTimeSync, /* Offset 34 */ + socRxReasonOAMSlowpath, /* Offset 35 */ + socRxReasonOAMError, /* Offset 36 */ + socRxReasonIpfixRateViolation, /* Offset 37 */ + socRxReasonL2LearnLimit, /* Offset 38 */ + socRxReasonEncapHigigError, /* Offset 39 */ + socRxReasonRegexMatch, /* Offset 40 */ + socRxReasonOAMLMDM, /* Offset 41 */ + socRxReasonBfd, /* Offset 42 */ + socRxReasonBfdSlowpath, /* Offset 43 */ + socRxReasonFailoverDrop, /* Offset 44 */ + socRxReasonWlanSlowpathKeepalive, /* Offset 45 */ + socRxReasonWlanTunnelError, /* Offset 46 */ + socRxReasonWlanSlowpath, /* Offset 47 */ + socRxReasonWlanDot1xDrop, /* Offset 48 */ + socRxReasonMplsReservedEntropyLabel, /* Offset 49 */ + socRxReasonCongestionCnmProxy, /* Offset 50 */ + socRxReasonCongestionCnmProxyError, /* Offset 51 */ + socRxReasonCongestionCnm, /* Offset 52 */ + socRxReasonMplsUnknownAch, /* Offset 53 */ + socRxReasonMplsLookupsExceeded, /* Offset 54 */ + socRxReasonMplsIllegalReservedLabel, /* Offset 55 */ + socRxReasonMplsRouterAlertLabel, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonParityError, /* Offset 58 */ + socRxReasonHigigHdrError, /* Offset 59 */ + socRxReasonFilterMatch, /* Offset 60 */ + socRxReasonL2GreSipMiss, /* Offset 61 */ + socRxReasonL2GreVpnIdMiss, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static soc_rx_reason_t +dcb23_rx_reason_map_ep[] = { + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonStp, /* Offset 1 */ + socRxReasonVlanTranslate, /* Offset 2 new */ + socRxReasonTunnelError, /* Offset 3 */ + socRxReasonIpmc, /* Offset 4 */ + socRxReasonL3HeaderError, /* Offset 5 */ + socRxReasonTtl, /* Offset 6 */ + socRxReasonL2MtuFail, /* Offset 7 */ + socRxReasonHigigHdrError, /* Offset 8 */ + socRxReasonSplitHorizon, /* Offset 9 */ + socRxReasonNivPrune, /* Offset 10 */ + socRxReasonVirtualPortPrune, /* Offset 11 */ + socRxReasonFilterMatch, /* Offset 12 */ + socRxReasonNonUnicastDrop, /* Offset 13 */ + socRxReasonTrillPacketPortMismatch, /* Offset 14 */ + socRxReasonInvalid, /* Offset 15 */ + socRxReasonInvalid, /* Offset 16 */ + socRxReasonInvalid, /* Offset 17 */ + socRxReasonInvalid, /* Offset 18 */ + socRxReasonInvalid, /* Offset 19 */ + socRxReasonInvalid, /* Offset 20 */ + socRxReasonInvalid, /* Offset 21 */ + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static soc_rx_reason_t +dcb23_rx_reason_map_nlf[] = { + socRxReasonRegexAction, /* Offset 0 */ + socRxReasonWlanClientMove, /* Offset 1 */ + socRxReasonWlanSourcePortMiss, /* Offset 2 */ + socRxReasonWlanClientError, /* Offset 3 */ + socRxReasonWlanClientSourceMiss, /* Offset 4 */ + socRxReasonWlanClientDestMiss, /* Offset 5 */ + socRxReasonWlanMtu, /* Offset 6 */ + socRxReasonInvalid, /* Offset 7 */ + socRxReasonInvalid, /* Offset 8 */ + socRxReasonInvalid, /* Offset 9 */ + socRxReasonInvalid, /* Offset 10 */ + socRxReasonInvalid, /* Offset 11 */ + socRxReasonInvalid, /* Offset 12 */ + socRxReasonInvalid, /* Offset 13 */ + socRxReasonInvalid, /* Offset 14 */ + socRxReasonInvalid, /* Offset 15 */ + socRxReasonInvalid, /* Offset 16 */ + socRxReasonInvalid, /* Offset 17 */ + socRxReasonInvalid, /* Offset 18 */ + socRxReasonInvalid, /* Offset 19 */ + socRxReasonInvalid, /* Offset 20 */ + socRxReasonInvalid, /* Offset 21 */ + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static soc_rx_reason_t *dcb23_rx_reason_maps[] = { + dcb23_rx_reason_map_ip_0, + dcb23_rx_reason_map_ip_1, + dcb23_rx_reason_map_ep, + dcb23_rx_reason_map_nlf, + NULL +}; + + +/* + * Function: + * dcb23_rx_reason_map_get + * Purpose: + * Return the RX reason map for DCB 23 type. + * Parameters: + * dcb_op - DCB operations + * dcb - dma control block + * Returns: + * RX reason map pointer + */ +static soc_rx_reason_t * +dcb23_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb) +{ + soc_rx_reason_t *map = NULL; + dcb23_t *d = (dcb23_t *)dcb; + + switch (d->word4.overlay1.cpu_opcode_type) { + case SOC_CPU_OPCODE_TYPE_IP_0: + map = dcb23_rx_reason_map_ip_0; + break; + case SOC_CPU_OPCODE_TYPE_IP_1: + map = dcb23_rx_reason_map_ip_1; + break; + case SOC_CPU_OPCODE_TYPE_EP: + map = dcb23_rx_reason_map_ep; + break; + case SOC_CPU_OPCODE_TYPE_NLF: + map = dcb23_rx_reason_map_nlf; + break; + default: + /* Unknown reason type */ + break; + } + + return map; +} + +static _shr_rx_decap_tunnel_t dcb23_rx_decap_tunnel_map[] = { + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_ACCESS_SVP, + _SHR_RX_DECAP_MIM, + _SHR_RX_DECAP_WTP2AC, + _SHR_RX_DECAP_AC2AC, + _SHR_RX_DECAP_AMT, + _SHR_RX_DECAP_IP, + _SHR_RX_DECAP_TRILL, + _SHR_RX_DECAP_L2MPLS_1LABEL, + _SHR_RX_DECAP_L2MPLS_1LABELCW, + _SHR_RX_DECAP_L3MPLS_1LABEL, + _SHR_RX_DECAP_L3MPLS_1LABELCW, + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_L2GRE +}; +static uint32 dcb23_rx_decap_tunnel_get(dcb_t *dcb) { + dcb23_t *d = (dcb23_t *)dcb; + uint32 decap_tunnel_type = d->word11.overlay1.decap_tunnel_type; + /* Check for array bounds */ + if ( (decap_tunnel_type < + (sizeof (dcb23_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { + return (uint32)dcb23_rx_decap_tunnel_map[decap_tunnel_type]; + } + return (uint32)_SHR_RX_DECAP_NONE; +} + +static uint32 +dcb23_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) +{ + dcb23_t *d = (dcb23_t *)dcb; + uint32 hgh[4]; + soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0]; + COMPILER_REFERENCE(dt_mode); + + hgh[0] = soc_htonl(d->mh0); + hgh[1] = soc_htonl(d->mh1); + hgh[2] = soc_htonl(d->mh2); + hgh[3] = soc_htonl(d->mh3); + + return ((ingport_is_hg && + ((h->ppd_overlay1.ppd_type == 0) || + (h->ppd_overlay1.ppd_type == 1))) ? + ((d->itag_status) ? 0 : 2) : + ((d->itag_status & 0x2) ? + ((d->itag_status & 0x1) ? 0 : 2) : + ((d->itag_status & 0x1) ? 1 : 3))); + + +} + +GETFUNCFIELD(23, xfercount, count) +GETFUNCFIELD(23, rx_cos, word4.overlay1.queue_num) + +/* Fields extracted from MH/PBI */ +GETHG2FUNCFIELD(23, rx_destmod, dst_mod) +GETHG2FUNCFIELD(23, rx_destport, dst_port) +GETHG2FUNCFIELD(23, rx_srcmod, src_mod) +GETHG2FUNCFIELD(23, rx_srcport, src_port) +GETHG2FUNCFIELD(23, rx_opcode, opcode) +GETHG2FUNCFIELD(23, rx_prio, vlan_pri) /* outer_pri */ +GETHG2FUNCEXPR(23, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | + (h->ppd_overlay1.dst_port))) +GETHG2FUNCEXPR(23, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | + (h->ppd_overlay1.vc_label_15_8 << 8) | + (h->ppd_overlay1.vc_label_7_0))) +GETHG2FUNCEXPR(23, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : + (h->ppd_overlay2.ctag_hi << 8) | + (h->ppd_overlay2.ctag_lo))) +GETFUNCFIELD(23, rx_matchrule, match_rule) +GETFUNCFIELD(23, rx_reason, reason) +GETFUNCFIELD(23, rx_reason_hi, reason_hi) +GETFUNCFIELD(23, rx_ingport, srcport) +GETFUNCEXPR(23, rx_mirror, ((SOC_CPU_OPCODE_TYPE_IP_0 == + d->word4.overlay1.cpu_opcode_type) ? + (d->reason & (1 << 17)) : 0)) +GETFUNCFIELD(23, rx_timestamp, word12.overlay1.timestamp) +GETFUNCFIELD(23, rx_timestamp_upper, word14.overlay1.timestamp_hi) +GETPTREXPR(23, mhp, &(d->mh0)) +GETFUNCFIELD(23, outer_vid, word4.overlay1.outer_vid) +GETFUNCFIELD(23, outer_pri, word11.overlay1.outer_pri) +GETFUNCFIELD(23, outer_cfi, word11.overlay1.outer_cfi) +GETFUNCFIELD(23, rx_outer_tag_action, otag_action) +GETFUNCFIELD(23, inner_vid, word11.overlay1.inner_vid) +GETFUNCFIELD(23, inner_pri, inner_pri) +GETFUNCFIELD(23, inner_cfi, word11.overlay1.inner_cfi) +GETFUNCFIELD(23, rx_inner_tag_action, itag_action) +GETFUNCFIELD(23, rx_bpdu, bpdu) +GETFUNCEXPR(23, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) : + (((d->repl_nhi) & 0x40000) ? /* TR3 NHI */ + (((d->repl_nhi) & 0x3ffff) + _SHR_L3_EGRESS_IDX_MIN) : + ((d->repl_nhi) & 0x4000) ? /* HX4 NHI */ + (((d->repl_nhi) & 0x3fff) + _SHR_L3_EGRESS_IDX_MIN) : + (d->repl_nhi)))) +GETFUNCFIELD(23, rx_switch_drop, all_switch_drop) +GETFUNCNULL(23, olp_encap_oam_pkt) +GETFUNCNULL(23, read_ecc_error) +GETFUNCNULL(23, desc_remaining) +SETFUNCNULL(23, desc_remaining) +GETFUNCNULL(23, desc_status) +SETFUNCNULL(23, desc_status) + +dcb_op_t dcb23_op = { + 23, + sizeof(dcb23_t), + dcb23_rx_reason_maps, + dcb23_rx_reason_map_get, + dcb0_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb23_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb19_desc_intr_set, + dcb19_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb23_rx_untagged_get, + dcb19_rx_crc_get, + dcb23_rx_cos_get, + dcb23_rx_destmod_get, + dcb23_rx_destport_get, + dcb23_rx_opcode_get, + dcb23_rx_classtag_get, + dcb23_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb23_rx_prio_get, + dcb23_rx_reason_get, + dcb23_rx_reason_hi_get, + dcb23_rx_ingport_get, + dcb23_rx_srcport_get, + dcb23_rx_srcmod_get, + dcb23_rx_mcast_get, + dcb23_rx_vclabel_get, + dcb23_rx_mirror_get, + dcb23_rx_timestamp_get, + dcb23_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb23_mhp_get, + dcb23_outer_vid_get, + dcb23_outer_pri_get, + dcb23_outer_cfi_get, + dcb23_rx_outer_tag_action_get, + dcb23_inner_vid_get, + dcb23_inner_pri_get, + dcb23_inner_cfi_get, + dcb23_rx_inner_tag_action_get, + dcb23_rx_bpdu_get, + dcb23_rx_l3_intf_get, + dcb23_rx_decap_tunnel_get, + dcb23_rx_switch_drop_get, + dcb23_olp_encap_oam_pkt_get, + dcb23_read_ecc_error_get, + dcb23_desc_remaining_get, + dcb23_desc_remaining_set, + dcb23_desc_status_get, + dcb23_desc_status_set, + NULL, +}; +#endif /* BCM_TRIUMPH3_SUPPORT */ + +#if defined(BCM_TRIDENT2_SUPPORT) +/* + * DCB Type 26 Support + */ +/* From FORMAT CPU_OPCODES */ +static soc_rx_reason_t +dcb26_rx_reason_map[] = { + socRxReasonUnknownVlan, /* 0: CPU_UVLAN */ + socRxReasonL2SourceMiss, /* 1: CPU_SLF */ + socRxReasonL2DestMiss, /* 2: CPU_DLF */ + socRxReasonL2Move, /* 3: CPU_L2MOVE */ + socRxReasonL2Cpu, /* 4: CPU_L2CPU */ + socRxReasonSampleSource, /* 5: CPU_SFLOW_SRC */ + socRxReasonSampleDest, /* 6: CPU_SFLOW_DST */ + socRxReasonL3SourceMiss, /* 7: CPU_L3SRC_MISS */ + socRxReasonL3DestMiss, /* 8: CPU_L3DST_MISS */ + socRxReasonL3SourceMove, /* 9: CPU_L3SRC_MOVE */ + socRxReasonMcastMiss, /* 10: CPU_MC_MISS */ + socRxReasonIpMcastMiss, /* 11: CPU_IPMC_MISS */ + socRxReasonFilterMatch, /* 12: CPU_FFP */ + socRxReasonL3HeaderError, /* 13: CPU_L3HDR_ERR */ + socRxReasonProtocol, /* 14: CPU_PROTOCOL_PKT */ + socRxReasonDosAttack, /* 15: CPU_DOS_ATTACK */ + socRxReasonMartianAddr, /* 16: CPU_MARTIAN_ADDR */ + socRxReasonTunnelError, /* 17: CPU_TUNNEL_ERR */ + socRxReasonInvalid, /* 18: RESERVED_0 */ + socRxReasonIcmpRedirect, /* 19: ICMP_REDIRECT */ + socRxReasonL3Slowpath, /* 20: L3_SLOWPATH */ + socRxReasonParityError, /* 21: PARITY_ERROR */ + socRxReasonL3MtuFail, /* 22: L3_MTU_CHECK_FAIL */ + socRxReasonHigigHdrError, /* 23: HGHDR_ERROR */ + socRxReasonMcastIdxError, /* 24: MCIDX_ERROR */ + socRxReasonVlanFilterMatch, /* 25: VFP */ + socRxReasonClassBasedMove, /* 26: CBSM_PREVENTED */ + socRxReasonL3AddrBindFail, /* 27: MAC_BIND_FAIL */ + socRxReasonMplsLabelMiss, /* 28: MPLS_LABEL_MISS */ + socRxReasonMplsInvalidAction, /* 29: MPLS_INVALID_ACTION */ + socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */ + socRxReasonMplsTtl, /* 31: MPLS_TTL_CHECK_FAIL */ + socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */ + socRxReasonL2NonUnicastMiss, /* 33: PBT_NONUC_PKT */ + socRxReasonNhop, /* 34: L3_NEXT_HOP */ + socRxReasonMplsUnknownAch, /* 35: MPLS_UNKNOWN_ACH_ERROR */ + socRxReasonStation, /* 36: MY_STATION */ + socRxReasonNiv, /* 37: NIV_DROP_REASON_ENCODING */ + socRxReasonNiv, /* 38: -> */ + socRxReasonNiv, /* 39: 3-bit */ + socRxReasonVlanTranslate, /* 40: VXLT_MISS */ + socRxReasonTimeSync, /* 41: TIME_SYNC */ + socRxReasonOAMSlowpath, /* 42: OAM_SLOWPATH */ + socRxReasonOAMError, /* 43: OAM_ERROR */ + socRxReasonTrill, /* 44: TRILL_DROP_REASON_ENCODING */ + socRxReasonTrill, /* 45: -> */ + socRxReasonTrill, /* 46: 3-bit */ + socRxReasonL2GreSipMiss, /* 47: L2GRE_SIP_MISS */ + socRxReasonL2GreVpnIdMiss, /* 48: L2GRE_VPNID_MISS */ + socRxReasonBfdSlowpath, /* 49: BFD_SLOWPATH */ + socRxReasonBfd, /* 50: BFD_ERROR */ + socRxReasonOAMLMDM, /* 51: OAM_LMDM */ + socRxReasonCongestionCnm, /* 52: ICNM */ + socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */ + socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */ + socRxReasonCongestionCnmProxy, /* 55: QCN_CNM_PRP */ + socRxReasonCongestionCnmProxyError, /* 56: QCN_CNM_PRP_DLF */ + socRxReasonVxlanSipMiss, /* 57: VXLAN_SIP_MISS */ + socRxReasonVxlanVpnIdMiss, /* 58: VXLAN_VN_ID_MISS */ + socRxReasonFcoeZoneCheckFail, /* 59: FCOE_ZONE_CHECK_FAIL */ + socRxReasonNat, /* 60: NAT_DROP_REASON_ENCODING */ + socRxReasonNat, /* 61: -> */ + socRxReasonNat, /* 62: 3-bit */ + socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */ +}; +/* From FORMAT TRILL_CPU_OPCODE_ENCODING */ +static soc_rx_reason_t dcb26_rx_reason_trill_encoding_map[] = { + socRxReasonTrill, /* 0:NO_ERRORS + * Base field, must match the entries above */ + socRxReasonTrillInvalid, /* 1:TRILL_HDR_ERROR */ + socRxReasonTrillMiss, /* 2:TRILL_LOOKUP_MISS */ + socRxReasonTrillRpfFail, /* 3:TRILL_RPF_CHECK_FAIL */ + socRxReasonTrillSlowpath, /* 4:TRILL_SLOWPATH */ + socRxReasonTrillCoreIsIs, /* 5:TRILL_CORE_IS_IS_PKT */ + socRxReasonTrillTtl, /* 6:TRILL_HOP_COUNT_CHECK_FAIL */ + socRxReasonTrillName, /* 7:NICKNAME_TABLE_COPYTOCPU */ + socRxReasonInvalid, /* Offset 8 */ + socRxReasonInvalid, /* Offset 9 */ + socRxReasonInvalid, /* Offset 10 */ + socRxReasonInvalid, /* Offset 11 */ + socRxReasonInvalid, /* Offset 12 */ + socRxReasonInvalid, /* Offset 13 */ + socRxReasonInvalid, /* Offset 14 */ + socRxReasonInvalid, /* Offset 15 */ + socRxReasonInvalid, /* Offset 16 */ + socRxReasonInvalid, /* Offset 17 */ + socRxReasonInvalid, /* Offset 18 */ + socRxReasonInvalid, /* Offset 19 */ + socRxReasonInvalid, /* Offset 20 */ + socRxReasonInvalid, /* Offset 21 */ + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; +/* From FORMAT NAT_CPU_OPCODE_ENCODING */ +static soc_rx_reason_t dcb26_rx_reason_nat_encoding_map[] = { + socRxReasonNat, /* 0:NOP + * Base field, must match the entries above */ + socRxReasonTcpUdpNatMiss, /* 1:NORMAL */ + socRxReasonIcmpNatMiss, /* 2:ICMP */ + socRxReasonNatFragment, /* 3:FRAGMEMT */ + socRxReasonNatMiss, /* 4:OTHER */ + socRxReasonInvalid, /* Offset 5 */ + socRxReasonInvalid, /* Offset 6 */ + socRxReasonInvalid, /* Offset 7 */ + socRxReasonInvalid, /* Offset 8 */ + socRxReasonInvalid, /* Offset 9 */ + socRxReasonInvalid, /* Offset 10 */ + socRxReasonInvalid, /* Offset 11 */ + socRxReasonInvalid, /* Offset 12 */ + socRxReasonInvalid, /* Offset 13 */ + socRxReasonInvalid, /* Offset 14 */ + socRxReasonInvalid, /* Offset 15 */ + socRxReasonInvalid, /* Offset 16 */ + socRxReasonInvalid, /* Offset 17 */ + socRxReasonInvalid, /* Offset 18 */ + socRxReasonInvalid, /* Offset 19 */ + socRxReasonInvalid, /* Offset 20 */ + socRxReasonInvalid, /* Offset 21 */ + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; +static soc_rx_reason_t *dcb26_rx_reason_maps[] = { + dcb26_rx_reason_map, + dcb21_rx_reason_niv_encoding_map, + dcb26_rx_reason_trill_encoding_map, + dcb26_rx_reason_nat_encoding_map, + NULL +}; + +static _shr_rx_decap_tunnel_t dcb26_rx_decap_tunnel_map[] = { + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_ACCESS_SVP, + _SHR_RX_DECAP_MIM, + _SHR_RX_DECAP_L2GRE, + _SHR_RX_DECAP_VXLAN, + _SHR_RX_DECAP_AMT, + _SHR_RX_DECAP_IP, + _SHR_RX_DECAP_TRILL, + _SHR_RX_DECAP_L2MPLS_1LABEL, + _SHR_RX_DECAP_L2MPLS_2LABEL, + _SHR_RX_DECAP_L2MPLS_1LABELCW, + _SHR_RX_DECAP_L2MPLS_2LABELCW, + _SHR_RX_DECAP_L3MPLS_1LABEL, + _SHR_RX_DECAP_L3MPLS_2LABEL, + _SHR_RX_DECAP_L3MPLS_1LABELCW, + _SHR_RX_DECAP_L3MPLS_2LABELCW +}; +static uint32 dcb26_rx_decap_tunnel_get(dcb_t *dcb) { + dcb26_t *d = (dcb26_t *)dcb; + /* Check for array bounds */ + if ( (d->word11.overlay1.decap_tunnel_type < + (sizeof (dcb26_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { + return (uint32)dcb26_rx_decap_tunnel_map[d->word11.overlay1.decap_tunnel_type]; + } + return (uint32)_SHR_RX_DECAP_NONE; +} +static uint32 +dcb26_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) +{ + dcb26_t *d = (dcb26_t *)dcb; + + COMPILER_REFERENCE(dt_mode); + + return (ingport_is_hg ? + ((d->tag_status) ? 0 : 2) : + ((d->tag_status & 0x2) ? + ((d->tag_status & 0x1) ? 0 : 2) : + ((d->tag_status & 0x1) ? 1 : 3))); +} + +static uint32 +dcb26_rx_reason_get(dcb_t *dcb) +{ + dcb26_t *d = (dcb26_t *)dcb; + + return (d->switch_pkt) ? (d->reason) : 0; +} + +static uint32 +dcb26_rx_reason_hi_get(dcb_t *dcb) +{ + dcb26_t *d = (dcb26_t *)dcb; + + return (d->switch_pkt) ? (d->reason_hi) : 0; +} + +GETFUNCFIELD(26, xfercount, count) +GETFUNCFIELD(26, rx_cos, word4.overlay2.cpu_cos) + +/* Fields extracted from MH/PBI */ +GETHG2FUNCFIELD(26, rx_destmod, dst_mod) +GETHG2FUNCFIELD(26, rx_destport, dst_port) +GETHG2FUNCFIELD(26, rx_srcmod, src_mod) +GETHG2FUNCFIELD(26, rx_srcport, src_port) +GETHG2FUNCFIELD(26, rx_opcode, opcode) +GETHG2FUNCFIELD(26, rx_prio, vlan_pri) /* outer_pri */ +GETHG2FUNCEXPR(26, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | + (h->ppd_overlay1.dst_port))) +GETHG2FUNCEXPR(26, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | + (h->ppd_overlay1.vc_label_15_8 << 8) | + (h->ppd_overlay1.vc_label_7_0))) +GETHG2FUNCEXPR(26, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : + (h->ppd_overlay2.ctag_hi << 8) | + (h->ppd_overlay2.ctag_lo))) +GETFUNCFIELD(26, rx_matchrule, match_rule) +GETFUNCFIELD(26, rx_ingport, srcport) +GETFUNCFIELD(26, rx_timestamp, timestamp) +GETFUNCFIELD(26, rx_timestamp_upper, word14.timestamp_hi) +GETPTREXPR(26, mhp, &(d->mh0)) +GETFUNCFIELD(26, outer_vid, word4.overlay1.outer_vid) +GETFUNCFIELD(26, outer_pri, word11.overlay1.outer_pri) +GETFUNCFIELD(26, outer_cfi, word11.overlay1.outer_cfi) +GETFUNCFIELD(26, inner_vid, word11.overlay1.inner_vid) +GETFUNCFIELD(26, inner_pri, inner_pri) +GETFUNCFIELD(26, inner_cfi, word11.overlay1.inner_cfi) +GETFUNCFIELD(26, rx_bpdu, bpdu) +GETFUNCEXPR(26, rx_l3_intf, + (((d->repl_nhi) & 0xffff) + _SHR_L3_EGRESS_IDX_MIN)) + +dcb_op_t dcb26_op = { + 26, + sizeof(dcb26_t), + dcb26_rx_reason_maps, + dcb0_rx_reason_map_get, + dcb21_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb26_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb19_desc_intr_set, + dcb19_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb26_rx_untagged_get, + dcb19_rx_crc_get, + dcb26_rx_cos_get, + dcb26_rx_destmod_get, + dcb26_rx_destport_get, + dcb26_rx_opcode_get, + dcb26_rx_classtag_get, + dcb26_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb26_rx_prio_get, + dcb26_rx_reason_get, + dcb26_rx_reason_hi_get, + dcb26_rx_ingport_get, + dcb26_rx_srcport_get, + dcb26_rx_srcmod_get, + dcb26_rx_mcast_get, + dcb26_rx_vclabel_get, + dcb23_rx_mirror_get, + dcb26_rx_timestamp_get, + dcb26_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb26_mhp_get, + dcb26_outer_vid_get, + dcb26_outer_pri_get, + dcb26_outer_cfi_get, + dcb23_rx_outer_tag_action_get, + dcb26_inner_vid_get, + dcb26_inner_pri_get, + dcb26_inner_cfi_get, + dcb23_rx_inner_tag_action_get, + dcb26_rx_bpdu_get, + dcb26_rx_l3_intf_get, + dcb26_rx_decap_tunnel_get, + dcb23_rx_switch_drop_get, + dcb23_olp_encap_oam_pkt_get, + dcb23_read_ecc_error_get, + dcb23_desc_remaining_get, + dcb23_desc_remaining_set, + dcb23_desc_status_get, + dcb23_desc_status_set, + NULL, +}; +#endif /* BCM_TRIDENT2_SUPPORT */ + +#if defined(BCM_KATANA2_SUPPORT) +/* + * DCB Type 29 Support + */ +static soc_rx_reason_t +dcb29_rx_reason_map_ip_0[] = { /* IP Overlay 0 */ + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonL2SourceMiss, /* Offset 1 */ + socRxReasonL2DestMiss, /* Offset 2 */ + socRxReasonL2Move, /* Offset 3 */ + socRxReasonL2Cpu, /* Offset 4 */ + socRxReasonSampleSource, /* Offset 5 */ + socRxReasonSampleDest, /* Offset 6 */ + socRxReasonL3SourceMiss, /* Offset 7 */ + socRxReasonL3DestMiss, /* Offset 8 */ + socRxReasonL3SourceMove, /* Offset 9 */ + socRxReasonMcastMiss, /* Offset 10 */ + socRxReasonIpMcastMiss, /* Offset 11 */ + socRxReasonFilterMatch, /* Offset 12 */ + socRxReasonL3HeaderError, /* Offset 13 */ + socRxReasonProtocol, /* Offset 14 */ + socRxReasonDosAttack, /* Offset 15 */ + socRxReasonMartianAddr, /* Offset 16 */ + socRxReasonTunnelError, /* Offset 17 */ + socRxReasonMirror, /* Offset 18 */ + socRxReasonIcmpRedirect, /* Offset 19 */ + socRxReasonL3Slowpath, /* Offset 20 */ + socRxReasonParityError, /* Offset 21 */ + socRxReasonL3MtuFail, /* Offset 22 */ + socRxReasonHigigHdrError, /* Offset 23 */ + socRxReasonMcastIdxError, /* Offset 24 */ + socRxReasonVlanFilterMatch, /* Offset 25 */ + socRxReasonClassBasedMove, /* Offset 26 */ + socRxReasonL3AddrBindFail, /* Offset 27 */ + socRxReasonMplsLabelMiss, /* Offset 28 */ + socRxReasonMplsInvalidAction, /* Offset 29 */ + socRxReasonMplsInvalidPayload, /* Offset 30 */ + socRxReasonMplsTtl, /* Offset 31 */ + socRxReasonMplsSequenceNumber, /* Offset 32 */ + socRxReasonL2NonUnicastMiss, /* Offset 33 */ + socRxReasonNhop, /* Offset 34 */ + socRxReasonBfdSlowpath, /* Offset 35 */ + socRxReasonStation, /* Offset 36 */ + socRxReasonVlanTranslate, /* Offset 37 */ + socRxReasonTimeSync, /* Offset 38 */ + socRxReasonL2LearnLimit, /* Offset 39 */ + socRxReasonBfd, /* Offset 40 */ + socRxReasonFailoverDrop, /* Offset 41 */ + socRxReasonUnknownSubtendingPort, /* Offset 42 */ + socRxReasonMplsReservedEntropyLabel, /* Offset 43 */ + socRxReasonLLTagAbsentDrop, /* Offset 44 */ + socRxReasonLLTagPresentDrop, /* Offset 45 */ + socRxReasonMplsLookupsExceeded, /* Offset 46 */ + socRxReasonMplsIllegalReservedLabel, /* Offset 47 */ + socRxReasonMplsRouterAlertLabel, /* Offset 48 */ + socRxReasonMplsUnknownAch, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static soc_rx_reason_t +dcb29_rx_reason_map_ip_1[] = { /* IP Overlay 1 */ + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonL2SourceMiss, /* Offset 1 */ + socRxReasonL2DestMiss, /* Offset 2 */ + socRxReasonL2Move, /* Offset 3 */ + socRxReasonL2Cpu, /* Offset 4 */ + socRxReasonSampleSource, /* Offset 5 */ + socRxReasonSampleDest, /* Offset 6 */ + socRxReasonL3SourceMiss, /* Offset 7 */ + socRxReasonL3DestMiss, /* Offset 8 */ + socRxReasonL3SourceMove, /* Offset 9 */ + socRxReasonMcastMiss, /* Offset 10 */ + socRxReasonIpMcastMiss, /* Offset 11 */ + socRxReasonFilterMatch, /* Offset 12 */ + socRxReasonL3HeaderError, /* Offset 13 */ + socRxReasonProtocol, /* Offset 14 */ + socRxReasonDosAttack, /* Offset 15 */ + socRxReasonMartianAddr, /* Offset 16 */ + socRxReasonTunnelError, /* Offset 17 */ + socRxReasonMirror, /* Offset 18 */ + socRxReasonIcmpRedirect, /* Offset 19 */ + socRxReasonL3Slowpath, /* Offset 20 */ + socRxReasonParityError, /* Offset 21 */ + socRxReasonL3MtuFail, /* Offset 22 */ + socRxReasonHigigHdrError, /* Offset 23 */ + socRxReasonMcastIdxError, /* Offset 24 */ + socRxReasonVlanFilterMatch, /* Offset 25 */ + socRxReasonClassBasedMove, /* Offset 26 */ + socRxReasonL3AddrBindFail, /* Offset 27 */ + socRxReasonMplsLabelMiss, /* Offset 28 */ + socRxReasonMplsInvalidAction, /* Offset 29 */ + socRxReasonMplsInvalidPayload, /* Offset 30 */ + socRxReasonMplsTtl, /* Offset 31 */ + socRxReasonMplsSequenceNumber, /* Offset 32 */ + socRxReasonL2NonUnicastMiss, /* Offset 33 */ + socRxReasonNhop, /* Offset 34 */ + socRxReasonBfdSlowpath, /* Offset 35 */ + socRxReasonStation, /* Offset 36 */ + socRxReasonVlanTranslate, /* Offset 37 */ + socRxReasonTimeSync, /* Offset 38 */ + socRxReasonL2LearnLimit, /* Offset 39 */ + socRxReasonBfd, /* Offset 40 */ + socRxReasonFailoverDrop, /* Offset 41 */ + socRxReasonOAMSlowpath, /* Offset 42 */ + socRxReasonOAMError, /* Offset 43 */ + socRxReasonOAMLMDM, /* Offset 44 */ + socRxReasonOAMCCMSlowPath, /* Offset 45 */ + socRxReasonOAMIncompleteOpcode,/* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonSat, /* Offset 48 */ + socRxReasonOAMMplsLmDm, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; +static soc_rx_reason_t +dcb29_rx_reason_map_ip_3[] = { /* IP Overlay 3 */ + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonL2SourceMiss, /* Offset 1 */ + socRxReasonL2DestMiss, /* Offset 2 */ + socRxReasonL2Move, /* Offset 3 */ + socRxReasonL2Cpu, /* Offset 4 */ + socRxReasonSampleSource, /* Offset 5 */ + socRxReasonSampleDest, /* Offset 6 */ + socRxReasonL3SourceMiss, /* Offset 7 */ + socRxReasonL3DestMiss, /* Offset 8 */ + socRxReasonL3SourceMove, /* Offset 9 */ + socRxReasonMcastMiss, /* Offset 10 */ + socRxReasonIpMcastMiss, /* Offset 11 */ + socRxReasonFilterMatch, /* Offset 12 */ + socRxReasonL3HeaderError, /* Offset 13 */ + socRxReasonProtocol, /* Offset 14 */ + socRxReasonDosAttack, /* Offset 15 */ + socRxReasonMartianAddr, /* Offset 16 */ + socRxReasonTunnelError, /* Offset 17 */ + socRxReasonMirror, /* Offset 18 */ + socRxReasonIcmpRedirect, /* Offset 19 */ + socRxReasonL3Slowpath, /* Offset 20 */ + socRxReasonParityError, /* Offset 21 */ + socRxReasonL3MtuFail, /* Offset 22 */ + socRxReasonHigigHdrError, /* Offset 23 */ + socRxReasonMcastIdxError, /* Offset 24 */ + socRxReasonVlanFilterMatch, /* Offset 25 */ + socRxReasonClassBasedMove, /* Offset 26 */ + socRxReasonL3AddrBindFail, /* Offset 27 */ + socRxReasonMplsLabelMiss, /* Offset 28 */ + socRxReasonMplsInvalidAction, /* Offset 29 */ + socRxReasonMplsInvalidPayload, /* Offset 30 */ + socRxReasonMplsTtl, /* Offset 31 */ + socRxReasonMplsSequenceNumber, /* Offset 32 */ + socRxReasonL2NonUnicastMiss, /* Offset 33 */ + socRxReasonNhop, /* Offset 34 */ + socRxReasonBfdSlowpath, /* Offset 35 */ + socRxReasonStation, /* Offset 36 */ + socRxReasonVlanTranslate, /* Offset 37 */ + socRxReasonTimeSync, /* Offset 38 */ + socRxReasonL2LearnLimit, /* Offset 39 */ + socRxReasonBfd, /* Offset 40 */ + socRxReasonFailoverDrop, /* Offset 41 */ + socRxReasonNivUntagDrop, /* Offset 42 */ + socRxReasonNivTagDrop, /* Offset 43 */ + socRxReasonNivTagInvalid, /* Offset 44 */ + socRxReasonNivRpfFail, /* Offset 45 */ + socRxReasonNivInterfaceMiss, /* Offset 46 */ + socRxReasonNivPrioDrop, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ + }; +static soc_rx_reason_t +dcb29_rx_reason_map_ep[] = { + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonStp, /* Offset 1 */ + socRxReasonVlanTranslate, /* Offset 2 new */ + socRxReasonTunnelError, /* Offset 3 */ + socRxReasonIpmc, /* Offset 4 */ + socRxReasonL3HeaderError, /* Offset 5 */ + socRxReasonTtl, /* Offset 6 */ + socRxReasonL2MtuFail, /* Offset 7 */ + socRxReasonHigigHdrError, /* Offset 8 */ + socRxReasonSplitHorizon, /* Offset 9 */ + socRxReasonNivPrune, /* Offset 10 */ + socRxReasonVirtualPortPrune, /* Offset 11 */ + socRxReasonFilterMatch, /* Offset 12 */ + socRxReasonNonUnicastDrop, /* Offset 13 */ + socRxReasonTrillPacketPortMismatch, /* Offset 14 */ + socRxReasonOAMError, /* Offset 15 */ + socRxReasonOAMLMDM, /* Offset 16 */ + socRxReasonOAMCCMSlowPath, /* Offset 17 */ + socRxReasonOAMSlowpath, /* Offset 18 */ + socRxReasonInvalid, /* Offset 19 */ + socRxReasonInvalid, /* Offset 20 */ + socRxReasonInvalid, /* Offset 21 */ + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + + +static soc_rx_reason_t *dcb29_rx_reason_maps[] = { + dcb29_rx_reason_map_ip_0, + dcb29_rx_reason_map_ip_1, + dcb29_rx_reason_map_ip_3, + dcb29_rx_reason_map_ep, + NULL +}; +/* + * Function: + * dcb29_rx_reason_map_get + * Purpose: + * Return the RX reason map for DCB 23 type. + * Parameters: + * dcb_op - DCB operations + * dcb - dma control block + * Returns: + * RX reason map pointer + */ +static soc_rx_reason_t * +dcb29_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb) +{ + soc_rx_reason_t *map = NULL; + dcb29_t *d = (dcb29_t *)dcb; + + switch (d->word4.overlay1.cpu_opcode_type) { + case SOC_CPU_OPCODE_TYPE_IP_0: + map = dcb29_rx_reason_map_ip_0; + break; + case SOC_CPU_OPCODE_TYPE_IP_1: + map = dcb29_rx_reason_map_ip_1; + break; + case SOC_CPU_OPCODE_TYPE_IP_3: + map = dcb29_rx_reason_map_ip_3; + break; + case SOC_CPU_OPCODE_TYPE_EP: + map = dcb29_rx_reason_map_ep; + break; + default: + /* Unknown reason type */ + break; + } + + return map; +} + +static _shr_rx_decap_tunnel_t dcb29_rx_decap_tunnel_map[] = { + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_ACCESS_SVP, + _SHR_RX_DECAP_MIM, + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_IP, + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_L2MPLS_1LABEL, + _SHR_RX_DECAP_L2MPLS_1LABELCW, + _SHR_RX_DECAP_L3MPLS_1LABEL, + _SHR_RX_DECAP_L3MPLS_1LABELCW, +}; +static uint32 dcb29_rx_decap_tunnel_get(dcb_t *dcb) { + dcb29_t *d = (dcb29_t *)dcb; + uint32 decap_tunnel_type = d->word11.overlay1.decap_tunnel_type; + /* Check for array bounds */ + if ( (decap_tunnel_type < + (sizeof (dcb29_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { + return (uint32)dcb29_rx_decap_tunnel_map[decap_tunnel_type]; + } + return (uint32)_SHR_RX_DECAP_NONE; +} + +GETFUNCEXPR(29, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) : + (((d->repl_nhi) & 0x3fff) + + _SHR_L3_EGRESS_IDX_MIN))) + +GETFUNCFIELD(29, outer_vid, word4.overlay1.outer_vid) +GETFUNCFIELD(29, olp_encap_oam_pkt, word4.overlay3.olp_encap_oam_pkt) +GETFUNCNULL(29, read_ecc_error) +GETFUNCNULL(29, desc_remaining) +SETFUNCNULL(29, desc_remaining) +GETFUNCNULL(29, desc_status) +SETFUNCNULL(29, desc_status) + +dcb_op_t dcb29_op = { + 29, + sizeof(dcb29_t), + dcb29_rx_reason_maps, + dcb29_rx_reason_map_get, + dcb0_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb23_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb19_desc_intr_set, + dcb19_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb23_rx_untagged_get, + dcb19_rx_crc_get, + dcb23_rx_cos_get, + dcb23_rx_destmod_get, + dcb23_rx_destport_get, + dcb23_rx_opcode_get, + dcb23_rx_classtag_get, + dcb23_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb23_rx_prio_get, + dcb23_rx_reason_get, + dcb23_rx_reason_hi_get, + dcb23_rx_ingport_get, + dcb23_rx_srcport_get, + dcb23_rx_srcmod_get, + dcb23_rx_mcast_get, + dcb23_rx_vclabel_get, + dcb23_rx_mirror_get, + dcb23_rx_timestamp_get, + dcb23_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb23_mhp_get, + dcb29_outer_vid_get, + dcb23_outer_pri_get, + dcb23_outer_cfi_get, + dcb23_rx_outer_tag_action_get, + dcb23_inner_vid_get, + dcb23_inner_pri_get, + dcb23_inner_cfi_get, + dcb23_rx_inner_tag_action_get, + dcb23_rx_bpdu_get, + dcb29_rx_l3_intf_get, + dcb29_rx_decap_tunnel_get, + dcb23_rx_switch_drop_get, + dcb29_olp_encap_oam_pkt_get, + dcb29_read_ecc_error_get, + dcb29_desc_remaining_get, + dcb29_desc_remaining_set, + dcb29_desc_status_get, + dcb29_desc_status_set, + NULL, +}; +#endif /* BCM_KATANA2_SUPPORT */ + +#if defined(BCM_HURRICANE2_SUPPORT) +GETFUNCNULL(30, rx_switch_drop) +GETFUNCNULL(30, olp_encap_oam_pkt) +GETFUNCNULL(30, read_ecc_error) +GETFUNCNULL(30, desc_remaining) +SETFUNCNULL(30, desc_remaining) +GETFUNCNULL(30, desc_status) +SETFUNCNULL(30, desc_status) + +dcb_op_t dcb30_op = { + 30, + sizeof(dcb20_t), + dcb20_rx_reason_maps, + dcb0_rx_reason_map_get, + dcb0_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb19_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb19_desc_intr_set, + dcb19_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb19_rx_untagged_get, + dcb19_rx_crc_get, + dcb19_rx_cos_get, + dcb19_rx_destmod_get, + dcb19_rx_destport_get, + dcb19_rx_opcode_get, + dcb19_rx_classtag_get, + dcb20_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb19_rx_prio_get, + dcb19_rx_reason_get, + dcb19_rx_reason_hi_get, + dcb19_rx_ingport_get, + dcb19_rx_srcport_get, + dcb19_rx_srcmod_get, + dcb19_rx_mcast_get, + dcb19_rx_vclabel_get, + dcb19_rx_mirror_get, + dcb20_rx_timestamp_get, + dcb20_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb19_mhp_get, + dcb19_outer_vid_get, + dcb19_outer_pri_get, + dcb19_outer_cfi_get, + dcb19_rx_outer_tag_action_get, + dcb19_inner_vid_get, + dcb19_inner_pri_get, + dcb19_inner_cfi_get, + dcb19_rx_inner_tag_action_get, + dcb19_rx_bpdu_get, + dcb9_rx_l3_intf_get, + dcb19_rx_decap_tunnel_get, + dcb30_rx_switch_drop_get, + dcb30_olp_encap_oam_pkt_get, + dcb30_read_ecc_error_get, + dcb30_desc_remaining_get, + dcb30_desc_remaining_set, + dcb30_desc_status_get, + dcb30_desc_status_set, + NULL, +}; +#endif /* BCM_HURRICANE2_SUPPORT */ + +#if defined(BCM_GREYHOUND_SUPPORT) +/* + * DCB Type 31 Support + */ +static soc_rx_reason_t +dcb31_rx_reason_map[] = { + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonL2SourceMiss, /* Offset 1 */ + socRxReasonL2DestMiss, /* Offset 2 */ + socRxReasonL2Move, /* Offset 3 */ + socRxReasonL2Cpu, /* Offset 4 */ + socRxReasonSampleSource, /* Offset 5 */ + socRxReasonSampleDest, /* Offset 6 */ + socRxReasonL3SourceMiss, /* Offset 7 */ + socRxReasonL3DestMiss, /* Offset 8 */ + socRxReasonL3SourceMove, /* Offset 9 */ + socRxReasonMcastMiss, /* Offset 10 */ + socRxReasonIpMcastMiss, /* Offset 11 */ + socRxReasonFilterMatch, /* Offset 12 */ + socRxReasonL3HeaderError, /* Offset 13 */ + socRxReasonProtocol, /* Offset 14 */ + socRxReasonDosAttack, /* Offset 15 */ + socRxReasonMartianAddr, /* Offset 16 */ + socRxReasonTunnelError, /* Offset 17 */ + socRxReasonL2MtuFail, /* Offset 18 */ + socRxReasonIcmpRedirect, /* Offset 19 */ + socRxReasonL3Slowpath, /* Offset 20 */ + socRxReasonParityError, /* Offset 21 */ + socRxReasonL3MtuFail, /* Offset 22 */ + socRxReasonHigigHdrError, /* Offset 23 */ + socRxReasonMcastIdxError, /* Offset 24 */ + socRxReasonVlanFilterMatch, /* Offset 25 */ + socRxReasonClassBasedMove, /* Offset 26 */ + socRxReasonL2LearnLimit, /* Offset 27 */ + socRxReasonMplsLabelMiss, /* Offset 28 */ + socRxReasonMplsInvalidAction, /* Offset 29 */ + socRxReasonMplsInvalidPayload, /* Offset 30 */ + socRxReasonMplsTtl, /* Offset 31 */ + socRxReasonMplsSequenceNumber, /* Offset 32 */ + socRxReasonL2NonUnicastMiss, /* Offset 33 */ + socRxReasonNhop, /* Offset 34 */ + socRxReasonMplsCtrlWordError, /* Offset 35 */ + socRxReasonTimeSync, /* Offset 36 */ + socRxReasonOAMSlowpath, /* Offset 37 */ + socRxReasonOAMError, /* Offset 38 */ + socRxReasonOAMLMDM, /* Offset 39 */ + socRxReasonL3AddrBindFail, /* Offset 40 */ + socRxReasonVlanTranslate, /* Offset 41 */ + socRxReasonNiv, /* Offset 42 */ + socRxReasonNiv, /* Offset 43 */ + socRxReasonNiv, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; +static soc_rx_reason_t *dcb31_rx_reason_maps[] = { + dcb31_rx_reason_map, + NULL +}; + +static uint32 +dcb31_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg) +{ + dcb31_t *d = (dcb31_t *)dcb; + + COMPILER_REFERENCE(dt_mode); + + return (ingport_is_hg ? + ((d->itag_status) ? 0 : 2) : + ((d->itag_status & 0x2) ? + ((d->itag_status & 0x1) ? 0 : 2) : + ((d->itag_status & 0x1) ? 1 : 3))); +} + +GETFUNCEXPR(31, rx_mirror, ((d->imirror) | (d->emirror))) + +GETFUNCFIELD(31, rx_cos, word4.overlay2.cpu_cos) +GETFUNCFIELD(31, outer_vid, word4.overlay1.outer_vid) +GETFUNCFIELD(31, outer_pri, outer_pri) +GETFUNCFIELD(31, outer_cfi, outer_cfi) +GETFUNCFIELD(31, rx_outer_tag_action, otag_action) +GETFUNCFIELD(31, inner_vid, inner_vid) +GETFUNCFIELD(31, inner_pri, inner_pri) +GETFUNCFIELD(31, inner_cfi, inner_cfi) +GETFUNCFIELD(31, rx_inner_tag_action, itag_action) +GETFUNCFIELD(31, rx_bpdu, bpdu) + +GETFUNCFIELD(31, rx_timestamp_upper, timestamp_hi) +GETFUNCEXPR(31, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) : + (((d->repl_nhi) & 0x3ff) + _SHR_L3_EGRESS_IDX_MIN))) +GETFUNCNULL(31, rx_switch_drop) +GETFUNCNULL(31, olp_encap_oam_pkt) +GETFUNCNULL(31, read_ecc_error) +GETFUNCNULL(31, desc_remaining) +SETFUNCNULL(31, desc_remaining) +GETFUNCNULL(31, desc_status) +SETFUNCNULL(31, desc_status) + +dcb_op_t dcb31_op = { + 31, + sizeof(dcb31_t), + dcb31_rx_reason_maps, + dcb0_rx_reason_map_get, + dcb0_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb19_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb19_desc_intr_set, + dcb19_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb31_rx_untagged_get, + dcb19_rx_crc_get, + dcb31_rx_cos_get, + dcb23_rx_destmod_get, + dcb23_rx_destport_get, + dcb23_rx_opcode_get, + dcb23_rx_classtag_get, + dcb23_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb23_rx_prio_get, + dcb23_rx_reason_get, + dcb23_rx_reason_hi_get, + dcb23_rx_ingport_get, + dcb23_rx_srcport_get, + dcb23_rx_srcmod_get, + dcb23_rx_mcast_get, + dcb23_rx_vclabel_get, + dcb31_rx_mirror_get, + dcb23_rx_timestamp_get, + dcb31_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb23_mhp_get, + dcb31_outer_vid_get, + dcb31_outer_pri_get, + dcb31_outer_cfi_get, + dcb31_rx_outer_tag_action_get, + dcb31_inner_vid_get, + dcb31_inner_pri_get, + dcb31_inner_cfi_get, + dcb31_rx_inner_tag_action_get, + dcb31_rx_bpdu_get, + dcb31_rx_l3_intf_get, + dcb19_rx_decap_tunnel_get, + dcb31_rx_switch_drop_get, + dcb31_olp_encap_oam_pkt_get, + dcb31_read_ecc_error_get, + dcb31_desc_remaining_get, + dcb31_desc_remaining_set, + dcb31_desc_status_get, + dcb31_desc_status_set, + NULL, +}; +#endif /* BCM_GREYHOUND_SUPPORT */ + +#if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TOMAHAWK2_SUPPORT) +static uint32 +dcb32_rx_hg2_ext_eh_type_get(dcb_t *dcb) +{ + uint32 eh_type = 0; + dcb32_t *d = (dcb32_t *)dcb; + + if (d->hg2_ext_hdr) { + switch (d->word14.overlay1.eh_type) { + case 0: + eh_type = d->word14.overlay1.eh_queue_tag; + break; + default: + break; + } + } + return eh_type; +} + +/* + * DCB Type 32 Support + */ +/* From FORMAT CPU_OPCODES */ +static soc_rx_reason_t +dcb32_rx_reason_map[] = { + socRxReasonUnknownVlan, /* 0: CPU_UVLAN */ + socRxReasonL2SourceMiss, /* 1: CPU_SLF */ + socRxReasonL2DestMiss, /* 2: CPU_DLF */ + socRxReasonL2Move, /* 3: CPU_L2MOVE */ + socRxReasonL2Cpu, /* 4: CPU_L2CPU */ + socRxReasonSampleSource, /* 5: CPU_SFLOW_SRC */ + socRxReasonSampleDest, /* 6: CPU_SFLOW_DST */ + socRxReasonL3SourceMiss, /* 7: CPU_L3SRC_MISS */ + socRxReasonL3DestMiss, /* 8: CPU_L3DST_MISS */ + socRxReasonL3SourceMove, /* 9: CPU_L3SRC_MOVE */ + socRxReasonMcastMiss, /* 10: CPU_MC_MISS */ + socRxReasonIpMcastMiss, /* 11: CPU_IPMC_MISS */ + socRxReasonFilterMatch, /* 12: CPU_FFP */ + socRxReasonL3HeaderError, /* 13: CPU_L3HDR_ERR */ + socRxReasonProtocol, /* 14: CPU_PROTOCOL_PKT */ + socRxReasonDosAttack, /* 15: CPU_DOS_ATTACK */ + socRxReasonMartianAddr, /* 16: CPU_MARTIAN_ADDR */ + socRxReasonTunnelError, /* 17: CPU_TUNNEL_ERR */ + socRxReasonSampleSourceFlex, /* 18: CPU_SFLOW_FLEX */ + socRxReasonIcmpRedirect, /* 19: ICMP_REDIRECT */ + socRxReasonL3Slowpath, /* 20: L3_SLOWPATH */ + socRxReasonParityError, /* 21: PARITY_ERROR */ + socRxReasonL3MtuFail, /* 22: L3_MTU_CHECK_FAIL */ + socRxReasonHigigHdrError, /* 23: HGHDR_ERROR */ + socRxReasonMcastIdxError, /* 24: MCIDX_ERROR */ + socRxReasonVlanFilterMatch, /* 25: VFP */ + socRxReasonClassBasedMove, /* 26: CBSM_PREVENTED */ + socRxReasonL3AddrBindFail, /* 27: MAC_BIND_FAIL */ + socRxReasonMplsLabelMiss, /* 28: MPLS_LABEL_MISS */ + socRxReasonMplsInvalidAction, /* 29: MPLS_INVALID_ACTION */ + socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */ + socRxReasonMplsTtl, /* 31: MPLS_TTL_CHECK_FAIL */ + socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */ + socRxReasonL2NonUnicastMiss, /* 33: PBT_NONUC_PKT */ + socRxReasonNhop, /* 34: L3_NEXT_HOP */ + socRxReasonMplsUnknownAch, /* 35: MPLS_UNKNOWN_ACH_ERROR */ + socRxReasonStation, /* 36: MY_STATION */ + socRxReasonNiv, /* 37: NIV_DROP_REASON_ENCODING */ + socRxReasonNiv, /* 38: -> */ + socRxReasonNiv, /* 39: 3-bit */ + socRxReasonVlanTranslate, /* 40: XLT_MISS */ + socRxReasonTimeSync, /* 41: TIME_SYNC */ + socRxReasonOAMSlowpath, /* 42: OAM_SLOWPATH */ + socRxReasonOAMError, /* 43: OAM_ERROR */ + socRxReasonTrill, /* 44: TRILL_DROP_REASON_ENCODING */ + socRxReasonTrill, /* 45: -> */ + socRxReasonTrill, /* 46: 3-bit */ + socRxReasonL2GreSipMiss, /* 47: L2GRE_SIP_MISS */ + socRxReasonL2GreVpnIdMiss, /* 48: L2GRE_VPNID_MISS */ + socRxReasonBfdSlowpath, /* 49: BFD_SLOWPATH */ + socRxReasonBfd, /* 50: BFD_ERROR */ +#if 1 + socRxReasonInvalid, /* 51: NOT DEFINED */ +#endif + socRxReasonCongestionCnm, /* 52: ICNM */ + socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */ + socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */ + socRxReasonCongestionCnmProxy, /* 55: QCN_CNM_PRP */ + socRxReasonCongestionCnmProxyError, /* 56: QCN_CNM_PRP_DLF */ + socRxReasonVxlanSipMiss, /* 57: VXLAN_SIP_MISS */ + socRxReasonVxlanVpnIdMiss, /* 58: VXLAN_VN_ID_MISS */ + socRxReasonFcoeZoneCheckFail, /* 59: FCOE_ZONE_CHECK_FAIL */ + socRxReasonNat, /* 60: NAT_DROP_REASON_ENCODING */ + socRxReasonNat, /* 61: -> */ + socRxReasonNat, /* 62: 3-bit */ + socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */ +}; + +static soc_rx_reason_t *dcb32_rx_reason_maps[] = { + dcb32_rx_reason_map, + dcb21_rx_reason_niv_encoding_map, + dcb26_rx_reason_trill_encoding_map, + dcb26_rx_reason_nat_encoding_map, + NULL +}; + +static _shr_rx_decap_tunnel_t dcb32_rx_decap_tunnel_map[] = { + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_ACCESS_SVP, + _SHR_RX_DECAP_MIM, + _SHR_RX_DECAP_L2GRE, + _SHR_RX_DECAP_VXLAN, + _SHR_RX_DECAP_AMT, + _SHR_RX_DECAP_IP, + _SHR_RX_DECAP_TRILL, + _SHR_RX_DECAP_L2MPLS_1LABEL, + _SHR_RX_DECAP_L2MPLS_2LABEL, + _SHR_RX_DECAP_L2MPLS_1LABELCW, + _SHR_RX_DECAP_L2MPLS_2LABELCW, + _SHR_RX_DECAP_L3MPLS_1LABEL, + _SHR_RX_DECAP_L3MPLS_2LABEL, + _SHR_RX_DECAP_L3MPLS_1LABELCW, + _SHR_RX_DECAP_L3MPLS_2LABELCW +}; +static uint32 dcb32_rx_decap_tunnel_get(dcb_t *dcb) { + dcb32_t *d = (dcb32_t *)dcb; + /* Check for array bounds */ + if ( (d->decap_tunnel_type < + (sizeof (dcb32_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { + return (uint32)dcb32_rx_decap_tunnel_map[d->decap_tunnel_type]; + } + return (uint32)_SHR_RX_DECAP_NONE; +} + +/* Fields extracted from MH/PBI */ +GETFUNCFIELD(32, rx_ingport, srcport) + +GETFUNCFIELD(32, rx_cos, cos) +GETFUNCEXPR(32, rx_mirror, ((SOC_CPU_OPCODE_TYPE_IP_0 == d->cpu_opcode_type) ? + (d->reason & (1 << 17)) : 0)) +GETFUNCFIELD(32, outer_vid, outer_vid) +GETFUNCFIELD(32, rx_switch_drop, uc_switch_drop) +GETFUNCNULL(32, olp_encap_oam_pkt) +GETFUNCNULL(32, read_ecc_error) +GETFUNCNULL(32, desc_remaining) +SETFUNCNULL(32, desc_remaining) +GETFUNCNULL(32, desc_status) +SETFUNCNULL(32, desc_status) + +static void +dcb32_desc_intr_set(dcb_t * dcb, int val) +{ + dcb32_t * d = (dcb32_t *)dcb; + + d->c_intr = val; + return; +} + +static uint32 +dcb32_desc_intr_get(dcb_t * dcb) +{ + dcb32_t * d = (dcb32_t *)dcb; + return (d->c_intr); +} + +/* + * DCB Type 32 Support + */ +dcb_op_t dcb32_op = { + 32, + sizeof(dcb32_t), + dcb32_rx_reason_maps, + dcb0_rx_reason_map_get, + dcb21_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb26_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb32_desc_intr_set, + dcb32_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb26_rx_untagged_get, + dcb19_rx_crc_get, + dcb32_rx_cos_get, + dcb26_rx_destmod_get, + dcb26_rx_destport_get, + dcb26_rx_opcode_get, + dcb26_rx_classtag_get, + dcb26_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb26_rx_prio_get, + dcb26_rx_reason_get, + dcb26_rx_reason_hi_get, + dcb32_rx_ingport_get, + dcb26_rx_srcport_get, + dcb26_rx_srcmod_get, + dcb26_rx_mcast_get, + dcb26_rx_vclabel_get, + dcb32_rx_mirror_get, + dcb26_rx_timestamp_get, + dcb26_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb26_mhp_get, + dcb32_outer_vid_get, + dcb26_outer_pri_get, + dcb26_outer_cfi_get, + dcb23_rx_outer_tag_action_get, + dcb26_inner_vid_get, + dcb26_inner_pri_get, + dcb26_inner_cfi_get, + dcb23_rx_inner_tag_action_get, + dcb26_rx_bpdu_get, + dcb26_rx_l3_intf_get, + dcb32_rx_decap_tunnel_get, + dcb32_rx_switch_drop_get, + dcb32_olp_encap_oam_pkt_get, + dcb32_read_ecc_error_get, + dcb32_desc_remaining_get, + dcb32_desc_remaining_set, + dcb32_desc_status_get, + dcb32_desc_status_set, + dcb32_rx_hg2_ext_eh_type_get, +}; +#endif /* BCM_TOMAHAWK_SUPPORT */ + +#if defined(BCM_TRIDENT2PLUS_SUPPORT) +/* + * DCB Type 33 Support + */ +/* From FORMAT CPU_OPCODES */ +static soc_rx_reason_t +dcb33_rx_reason_map[] = { + socRxReasonUnknownVlan, /* 0: CPU_UVLAN */ + socRxReasonL2SourceMiss, /* 1: CPU_SLF */ + socRxReasonL2DestMiss, /* 2: CPU_DLF */ + socRxReasonL2Move, /* 3: CPU_L2MOVE */ + socRxReasonL2Cpu, /* 4: CPU_L2CPU */ + socRxReasonSampleSource, /* 5: CPU_SFLOW_SRC */ + socRxReasonSampleDest, /* 6: CPU_SFLOW_DST */ + socRxReasonL3SourceMiss, /* 7: CPU_L3SRC_MISS */ + socRxReasonL3DestMiss, /* 8: CPU_L3DST_MISS */ + socRxReasonL3SourceMove, /* 9: CPU_L3SRC_MOVE */ + socRxReasonMcastMiss, /* 10: CPU_MC_MISS */ + socRxReasonIpMcastMiss, /* 11: CPU_IPMC_MISS */ + socRxReasonFilterMatch, /* 12: CPU_FFP */ + socRxReasonL3HeaderError, /* 13: CPU_L3HDR_ERR */ + socRxReasonProtocol, /* 14: CPU_PROTOCOL_PKT */ + socRxReasonDosAttack, /* 15: CPU_DOS_ATTACK */ + socRxReasonMartianAddr, /* 16: CPU_MARTIAN_ADDR */ + socRxReasonTunnelError, /* 17: CPU_TUNNEL_ERR */ + socRxReasonFailoverDrop, /* 18: FAILOVER_DROP */ + socRxReasonIcmpRedirect, /* 19: ICMP_REDIRECT */ + socRxReasonL3Slowpath, /* 20: L3_SLOWPATH */ + socRxReasonParityError, /* 21: PARITY_ERROR */ + socRxReasonL3MtuFail, /* 22: L3_MTU_CHECK_FAIL */ + socRxReasonHigigHdrError, /* 23: HGHDR_ERROR */ + socRxReasonMcastIdxError, /* 24: MCIDX_ERROR */ + socRxReasonVlanFilterMatch, /* 25: VFP */ + socRxReasonClassBasedMove, /* 26: CBSM_PREVENTED */ + socRxReasonL3AddrBindFail, /* 27: MAC_BIND_FAIL */ + socRxReasonMplsLabelMiss, /* 28: MPLS_LABEL_MISS */ + socRxReasonMplsInvalidAction, /* 29: MPLS_INVALID_ACTION */ + socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */ + socRxReasonMplsTtl, /* 31: MPLS_TTL_CHECK_FAIL */ + socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */ + socRxReasonL2NonUnicastMiss, /* 33: PBT_NONUC_PKT */ + socRxReasonNhop, /* 34: L3_NEXT_HOP */ + socRxReasonMplsUnknownAch, /* 35: MPLS_UNKNOWN_ACH_ERROR */ + socRxReasonStation, /* 36: MY_STATION */ + socRxReasonNiv, /* 37: NIV_DROP_REASON_ENCODING */ + socRxReasonNiv, /* 38: -> */ + socRxReasonNiv, /* 39: 3-bit */ + socRxReasonVlanTranslate, /* 40: VXLT_MISS */ + socRxReasonTimeSync, /* 41: TIME_SYNC */ + socRxReasonOAMSlowpath, /* 42: OAM_SLOWPATH */ + socRxReasonOAMError, /* 43: OAM_ERROR */ + socRxReasonTrill, /* 44: TRILL_DROP_REASON_ENCODING */ + socRxReasonTrill, /* 45: -> */ + socRxReasonTrill, /* 46: 3-bit */ + socRxReasonL2GreSipMiss, /* 47: L2GRE_SIP_MISS */ + socRxReasonL2GreVpnIdMiss, /* 48: L2GRE_VPNID_MISS */ + socRxReasonBfdSlowpath, /* 49: BFD_SLOWPATH */ + socRxReasonBfd, /* 50: BFD_ERROR */ + socRxReasonOAMLMDM, /* 51: OAM_LMDM */ + socRxReasonCongestionCnm, /* 52: ICNM */ + socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */ + socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */ + socRxReasonCongestionCnmProxy, /* 55: QCN_CNM_PRP */ + socRxReasonCongestionCnmProxyError, /* 56: QCN_CNM_PRP_DLF */ + socRxReasonVxlanSipMiss, /* 57: VXLAN_SIP_MISS */ + socRxReasonVxlanVpnIdMiss, /* 58: VXLAN_VN_ID_MISS */ + socRxReasonFcoeZoneCheckFail, /* 59: FCOE_ZONE_CHECK_FAIL */ + socRxReasonNat, /* 60: NAT_DROP_REASON_ENCODING */ + socRxReasonNat, /* 61: -> */ + socRxReasonNat, /* 62: 3-bit */ + socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */ +}; + +/* From FORMAT NIV_CPU_OPCODE_ENCODING */ +static soc_rx_reason_t dcb33_rx_reason_niv_encoding_map[] = { + socRxReasonNiv, /* 0: NO_ERRORS + * Base field, must match the entries above */ + socRxReasonNivPrioDrop, /* 1:DOT1P_ADMITTANCE_DISCARD */ + socRxReasonNivInterfaceMiss, /* 2:VIF_LOOKUP_MISS */ + socRxReasonNivRpfFail, /* 3:RPF_LOOKUP_MISS */ + socRxReasonNivTagInvalid, /* 4:VNTAG_FORMAT_ERROR */ + socRxReasonNivTagDrop, /* 5:VNTAG_PRESENT_DROP */ + socRxReasonNivUntagDrop, /* 6:VNTAG_NOT_PRESENT_DROP */ + socRxReasonUnknownSubtendingPort /* 7:UNKOWN SUBTENDING PORT */ +}; + +/* From FORMAT NAT_CPU_OPCODE_ENCODING */ +static soc_rx_reason_t dcb33_rx_reason_nat_encoding_map[] = { + socRxReasonNat, /* 0:NOP + * Base field, must match the entries above */ + socRxReasonTcpUdpNatMiss, /* 1:NORMAL */ + socRxReasonIcmpNatMiss, /* 2:ICMP */ + socRxReasonNatFragment, /* 3:FRAGMEMT */ + socRxReasonNatMiss, /* 4:OTHER */ + socRxReasonInvalid, /* 5:NOT DEFINED */ + socRxReasonInvalid, /* 6:NOT DEFINED */ +#if 1 + socRxReasonInvalid /* 7:NOT DEFINED */ +#endif +}; + +static soc_rx_reason_t *dcb33_rx_reason_maps[] = { + dcb33_rx_reason_map, + dcb33_rx_reason_niv_encoding_map, + dcb26_rx_reason_trill_encoding_map, + dcb33_rx_reason_nat_encoding_map, + NULL +}; + +static _shr_rx_decap_tunnel_t dcb33_rx_decap_tunnel_map[] = { + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_ACCESS_SVP, + _SHR_RX_DECAP_MIM, + _SHR_RX_DECAP_L2GRE, + _SHR_RX_DECAP_VXLAN, + _SHR_RX_DECAP_AMT, + _SHR_RX_DECAP_IP, + _SHR_RX_DECAP_TRILL, + _SHR_RX_DECAP_MPLS_1LABELCW, + _SHR_RX_DECAP_MPLS_2LABELCW, + _SHR_RX_DECAP_MPLS_1LABEL, + _SHR_RX_DECAP_MPLS_2LABEL, + _SHR_RX_DECAP_L3MPLS_1LABEL, + _SHR_RX_DECAP_L3MPLS_2LABEL, + _SHR_RX_DECAP_L3MPLS_1LABELCW, + _SHR_RX_DECAP_L3MPLS_2LABELCW +}; +static uint32 dcb33_rx_decap_tunnel_get(dcb_t *dcb) { + dcb33_t *d = (dcb33_t *)dcb; + /* Check for array bounds */ + if ( (d->word3.overlay1.decap_tunnel_type < + (sizeof (dcb33_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { + return (uint32)dcb33_rx_decap_tunnel_map[d->word3.overlay1.decap_tunnel_type]; + } + return (uint32)_SHR_RX_DECAP_NONE; +} +GETFUNCFIELD(33, outer_vid, word4.overlay1.outer_vid) + +static void +dcb33_desc_intr_set(dcb_t * dcb, int val) +{ + dcb33_t * d = (dcb33_t *)dcb; + + d->c_intr = val; + return; +} + +static uint32 +dcb33_desc_intr_get(dcb_t * dcb) +{ + dcb33_t * d = (dcb33_t *)dcb; + return (d->c_intr); +} + +dcb_op_t dcb33_op = { + 33, + sizeof(dcb33_t), + dcb33_rx_reason_maps, + dcb0_rx_reason_map_get, + dcb21_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb26_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb33_desc_intr_set, + dcb33_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb26_rx_untagged_get, + dcb19_rx_crc_get, + dcb26_rx_cos_get, + dcb26_rx_destmod_get, + dcb26_rx_destport_get, + dcb26_rx_opcode_get, + dcb26_rx_classtag_get, + dcb26_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb26_rx_prio_get, + dcb26_rx_reason_get, + dcb26_rx_reason_hi_get, + dcb26_rx_ingport_get, + dcb26_rx_srcport_get, + dcb26_rx_srcmod_get, + dcb26_rx_mcast_get, + dcb26_rx_vclabel_get, + dcb23_rx_mirror_get, + dcb26_rx_timestamp_get, + dcb26_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb26_mhp_get, + dcb33_outer_vid_get, + dcb26_outer_pri_get, + dcb26_outer_cfi_get, + dcb23_rx_outer_tag_action_get, + dcb26_inner_vid_get, + dcb26_inner_pri_get, + dcb26_inner_cfi_get, + dcb23_rx_inner_tag_action_get, + dcb26_rx_bpdu_get, + dcb26_rx_l3_intf_get, + dcb33_rx_decap_tunnel_get, + dcb23_rx_switch_drop_get, + dcb23_olp_encap_oam_pkt_get, + dcb23_read_ecc_error_get, + dcb23_desc_remaining_get, + dcb23_desc_remaining_set, + dcb23_desc_status_get, + dcb23_desc_status_set, + NULL, +}; +#endif /* BCM_TRIDENT2PLUS_SUPPORT */ + + +#ifdef BCM_APACHE_SUPPORT + +/* From FORMAT CPU_OPCODES */ +static soc_rx_reason_t +dcb35_rx_reason_map_ip[] = { + socRxReasonUnknownVlan, /* 0: CPU_UVLAN */ + socRxReasonL2SourceMiss, /* 1: CPU_SLF */ + socRxReasonL2DestMiss, /* 2: CPU_DLF */ + socRxReasonL2Move, /* 3: CPU_L2MOVE */ + socRxReasonL2Cpu, /* 4: CPU_L2CPU */ + socRxReasonSampleSource, /* 5: CPU_SFLOW_SRC */ + socRxReasonSampleDest, /* 6: CPU_SFLOW_DST */ + socRxReasonL3SourceMiss, /* 7: CPU_L3SRC_MISS */ + socRxReasonL3DestMiss, /* 8: CPU_L3DST_MISS */ + socRxReasonL3SourceMove, /* 9: CPU_L3SRC_MOVE */ + socRxReasonMcastMiss, /* 10: CPU_MC_MISS */ + socRxReasonIpMcastMiss, /* 11: CPU_IPMC_MISS */ + socRxReasonFilterMatch, /* 12: CPU_FFP */ + socRxReasonL3HeaderError, /* 13: CPU_L3HDR_ERR */ + socRxReasonProtocol, /* 14: CPU_PROTOCOL_PKT */ + socRxReasonDosAttack, /* 15: CPU_DOS_ATTACK */ + socRxReasonMartianAddr, /* 16: CPU_MARTIAN_ADDR */ + socRxReasonTunnelError, /* 17: CPU_TUNNEL_ERR */ + socRxReasonFailoverDrop, /* 18: FAILOVER_DROP */ + socRxReasonIcmpRedirect, /* 19: ICMP_REDIRECT */ + socRxReasonL3Slowpath, /* 20: L3_SLOWPATH */ + socRxReasonParityError, /* 21: PARITY_ERROR */ + socRxReasonL3MtuFail, /* 22: L3_MTU_CHECK_FAIL */ + socRxReasonHigigHdrError, /* 23: HGHDR_ERROR */ + socRxReasonMcastIdxError, /* 24: MCIDX_ERROR */ + socRxReasonVlanFilterMatch, /* 25: VFP */ + socRxReasonClassBasedMove, /* 26: CBSM_PREVENTED */ + socRxReasonL3AddrBindFail, /* 27: MAC_BIND_FAIL */ + socRxReasonMplsLabelMiss, /* 28: MPLS_LABEL_MISS */ + socRxReasonMplsInvalidAction, /* 29: MPLS_INVALID_ACTION */ + socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */ + socRxReasonMplsTtl, /* 31: MPLS_TTL_CHECK_FAIL */ + socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */ + socRxReasonL2NonUnicastMiss, /* 33: PBT_NONUC_PKT */ + socRxReasonNhop, /* 34: L3_NEXT_HOP */ + socRxReasonMplsUnknownAch, /* 35: MPLS_UNKNOWN_ACH_ERROR */ + socRxReasonStation, /* 36: MY_STATION */ + socRxReasonNiv, /* 37: NIV_DROP_REASON_ENCODING */ + socRxReasonNiv, /* 38: -> */ + socRxReasonNiv, /* 39: 3-bit */ + socRxReasonVlanTranslate, /* 40: VXLT_MISS */ + socRxReasonTimeSync, /* 41: TIME_SYNC */ + socRxReasonOAMSlowpath, /* 42: OAM_SLOWPATH */ + socRxReasonMplsLookupsExceeded,/* 43: MPLS_OUT_OF_LOOKUPS */ + socRxReasonTrill, /* 44: TRILL_DROP_REASON_ENCODING */ + socRxReasonTrill, /* 45: -> */ + socRxReasonTrill, /* 46: 3-bit */ + socRxReasonL2GreSipMiss, /* 47: L2GRE_SIP_MISS */ + socRxReasonL2GreVpnIdMiss, /* 48: L2GRE_VPNID_MISS */ + socRxReasonBfdSlowpath, /* 49: BFD_SLOWPATH */ + socRxReasonBfd, /* 50: BFD_ERROR */ + socRxReasonMplsReservedEntropyLabel,/* 51: ENTROPY_LABEL_IN_UNALLOWED_RANGE */ + socRxReasonCongestionCnm, /* 52: ICNM */ + socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */ + socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */ + socRxReasonCongestionCnmProxy, /* 55: QCN_CNM_PRP */ + socRxReasonCongestionCnmProxyError, /* 56: QCN_CNM_PRP_DLF */ + socRxReasonVxlanSipMiss, /* 57: VXLAN_SIP_MISS */ + socRxReasonVxlanVpnIdMiss, /* 58: VXLAN_VN_ID_MISS */ + socRxReasonFcoeZoneCheckFail, /* 59: FCOE_ZONE_CHECK_FAIL */ + socRxReasonNat, /* 60: NAT_DROP_REASON_ENCODING */ + socRxReasonNat, /* 61: -> */ + socRxReasonNat, /* 62: 3-bit */ + socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */ +}; + +/* From format EP_CPU_OPCODES */ +static soc_rx_reason_t +dcb35_rx_reason_map_ep[] = { + socRxReasonSplitHorizon, /* 0: CPUE_PRUNE */ + socRxReasonNivPrune, /* 1: CPUE_NIV_DISCARD */ + socRxReasonVirtualPortPrune, /* 2: CPUE_SPLIT_HORIZON */ + socRxReasonHigigHdrError, /* 3: CPUE_HIGIG */ + socRxReasonTrillPacketPortMismatch, /* 4: CPUE_TRILL */ + socRxReasonL2MtuFail, /* 5: CPUE_MTU */ + socRxReasonInvalid, /* 6: CPUE_PKT_SMALL_OR_BIG */ + socRxReasonUnknownVlan, /* 7: CPUE_VLAN */ + socRxReasonStp, /* 8: CPUE_STG */ + socRxReasonVlanTranslate, /* 9: CPUE_VXLT */ + socRxReasonNonUnicastDrop, /* 10: CPUE_MULTI_DEST */ + socRxReasonInvalid, /* 11: CPUE_CNM */ + socRxReasonInvalid, /* 12: CPUE_FCOE */ + socRxReasonInvalid, /* 13: CPUE_CFI */ + socRxReasonTtl, /* 14: CPUE_TTL_DROP */ + socRxReasonIpmc, /* 15: CPUE_L3ERR */ + socRxReasonTunnelError, /* 16: CPUE_TUNNEL */ + socRxReasonFilterMatch, /* 17: CPUE_EFP */ + socRxReasonInvalid, /* 18: CPUE_PROT */ + socRxReasonInvalid, /* 19: CPUE_1588 */ + socRxReasonInvalid, /* 20: CPUE_COMPOSITE_ERROR */ + socRxReasonInvalid, /* 21: EP_DROP_ORIG */ + + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static soc_rx_reason_t *dcb35_rx_reason_maps[4][5] = { + { /* IP_0 */ + dcb35_rx_reason_map_ip, + dcb33_rx_reason_niv_encoding_map, + dcb26_rx_reason_trill_encoding_map, + dcb33_rx_reason_nat_encoding_map, + NULL + }, + {NULL}, /* Index 1 is invalid */ + { /* EP */ + dcb35_rx_reason_map_ep, + NULL + }, + {NULL} /* Index 3 is invalid */ +}; + + +/* + * Function: + * dcb35_rx_reason_map_get + * Purpose: + * Return the RX reason map for DCB 35 type. + * Parameters: + * dcb_op - DCB operations + * dcb - dma control block + * Returns: + * RX reason map pointer + */ +static soc_rx_reason_t * +dcb35_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb) +{ + soc_rx_reason_t *map = NULL; + dcb35_t * d = (dcb35_t *)dcb; + + map = dcb35_rx_reason_maps[(d->word4.overlay1.cpu_opcode_type)][0]; + + return map; +} + +static _shr_rx_decap_tunnel_t dcb35_rx_decap_tunnel_map[] = { + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_ACCESS_SVP, + _SHR_RX_DECAP_MIM, + _SHR_RX_DECAP_L2GRE, + _SHR_RX_DECAP_VXLAN, + _SHR_RX_DECAP_AMT, + _SHR_RX_DECAP_IP, + _SHR_RX_DECAP_TRILL, + _SHR_RX_DECAP_MPLS_1LABELCW, + _SHR_RX_DECAP_MPLS_2LABELCW, + _SHR_RX_DECAP_MPLS_3LABELCW, + _SHR_RX_DECAP_MPLS_3LABEL_ENTROPYCW, + _SHR_RX_DECAP_MPLS_1LABEL, + _SHR_RX_DECAP_MPLS_2LABEL, + _SHR_RX_DECAP_MPLS_3LABEL, + _SHR_RX_DECAP_MPLS_3LABEL_ENTROPY +}; +static uint32 dcb35_rx_decap_tunnel_get(dcb_t *dcb) { + dcb35_t *d = (dcb35_t *)dcb; + /* Check for array bounds */ + if ( (d->word3.overlay1.decap_tunnel_type < + (sizeof (dcb35_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { + return (uint32)dcb35_rx_decap_tunnel_map[d->word3.overlay1.decap_tunnel_type]; + } + return (uint32)_SHR_RX_DECAP_NONE; +} + +GETFUNCFIELD(35, olp_encap_oam_pkt, olp_encap_oam_pkt) +GETFUNCNULL(35, read_ecc_error) +GETFUNCNULL(35, desc_remaining) +SETFUNCNULL(35, desc_remaining) +GETFUNCNULL(35, desc_status) +SETFUNCNULL(35, desc_status) + +dcb_op_t dcb35_op = { + 35, + sizeof(dcb35_t), + dcb35_rx_reason_maps[0], + dcb35_rx_reason_map_get, + dcb21_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb26_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb33_desc_intr_set, + dcb33_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb26_rx_untagged_get, + dcb19_rx_crc_get, + dcb26_rx_cos_get, + dcb26_rx_destmod_get, + dcb26_rx_destport_get, + dcb26_rx_opcode_get, + dcb26_rx_classtag_get, + dcb26_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb26_rx_prio_get, + dcb26_rx_reason_get, + dcb26_rx_reason_hi_get, + dcb26_rx_ingport_get, + dcb26_rx_srcport_get, + dcb26_rx_srcmod_get, + dcb26_rx_mcast_get, + dcb26_rx_vclabel_get, + dcb23_rx_mirror_get, + dcb26_rx_timestamp_get, + dcb26_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb26_mhp_get, + dcb33_outer_vid_get, + dcb26_outer_pri_get, + dcb26_outer_cfi_get, + dcb23_rx_outer_tag_action_get, + dcb26_inner_vid_get, + dcb26_inner_pri_get, + dcb26_inner_cfi_get, + dcb23_rx_inner_tag_action_get, + dcb26_rx_bpdu_get, + dcb26_rx_l3_intf_get, + dcb35_rx_decap_tunnel_get, + dcb23_rx_switch_drop_get, + dcb35_olp_encap_oam_pkt_get, + dcb35_read_ecc_error_get, + dcb35_desc_remaining_get, + dcb35_desc_remaining_set, + dcb35_desc_status_get, + dcb35_desc_status_set, + NULL, +}; +#endif /* BCM_APACHE_SUPPORT */ + +#if defined(BCM_TRIDENT3_SUPPORT) +SETFUNCFIELD(36, reqcount, c_count, uint32 count, count) +GETFUNCFIELD(36, reqcount, c_count) +GETFUNCFIELD(36, xfercount, count) +SETFUNCFIELD(36, done, done, int val, val ? 1 : 0) +GETFUNCFIELD(36, done, done) +SETFUNCFIELD(36, sg, c_sg, int val, val ? 1 : 0) +GETFUNCFIELD(36, sg, c_sg) +SETFUNCFIELD(36, chain, c_chain, int val, val ? 1 : 0) +GETFUNCFIELD(36, chain, c_chain) +SETFUNCFIELD(36, reload, c_reload, int val, val ? 1 : 0) +GETFUNCFIELD(36, reload, c_reload) +GETFUNCFIELD(36, rx_start, start) +GETFUNCFIELD(36, rx_end, end) +GETFUNCFIELD(36, rx_error, error) +SETFUNCFIELD(36, hg, c_hg, uint32 hg, hg) +GETFUNCFIELD(36, hg, c_hg) +SETFUNCFIELD(36, purge, c_purge, uint32 purge, purge) +GETFUNCFIELD(36, purge, c_purge) +GETFUNCFIELD(36, read_ecc_error, ecc_error) +GETFUNCFIELD(36, desc_status, c_desc_status) +GETFUNCFIELD(36, desc_intr, c_intr) +GETFUNCFIELD(36, desc_remaining, c_desc) + +GETHDRFUNCFIELD(36, rx_timestamp, timestamp) +GETHDRFUNCNULL(36, rx_timestamp_upper) +GETHDRPTREXPR(36, mhp, &(h->mh0)) +GETHDRFUNCFIELD(36, outer_vid, outer_vid) +GETHDRFUNCFIELD(36, outer_pri, word6.overlay1.outer_pri) +GETHDRFUNCFIELD(36, outer_cfi, outer_cfi) +GETHDRFUNCFIELD(36, rx_outer_tag_action, otag_action) +GETHDRFUNCFIELD(36, inner_vid, inner_vid) +GETHDRFUNCFIELD(36, inner_pri, word6.overlay1.inner_pri) +GETHDRFUNCFIELD(36, inner_cfi, word6.overlay1.inner_cfi) +GETHDRFUNCFIELD(36, rx_inner_tag_action, itag_action) +GETHDRFUNCFIELD(36, rx_bpdu, bpdu) +GETHDRFUNCFIELD(36, rx_decap_tunnel, decap_tunnel_type) + +static uint32 ep_to_cpu_hdr36_rx_crc_get(void *hdr) { + return 0; +} + +static uint32 +ep_to_cpu_hdr36_rx_untagged_get(void *hdr, int dt_mode, int ingport_is_hg) +{ +/*FIXME: tag_status (itag_status) field is removed*/ + return 0; +} + +static void +ep_to_cpu_hdr36_rx_reasons_get(dcb_op_t *dcb_op, void *hdr, soc_rx_reasons_t *reasons) +{ + soc_rx_reason_t *map, *encoding_map; + uint32 opcode[2], encoding[3]; + uint32 bit_val; + int word_idx, bit_idx, opcode_idx, map_idx, word_count; + int enc_bit = 0; + + SOC_RX_REASON_CLEAR_ALL(*reasons); + + opcode[0] = dcb_op->rx_reason_get(hdr); + opcode[1] = dcb_op->rx_reason_hi_get(hdr); + word_count = 2; + sal_memset(encoding, 0, sizeof(encoding)); + map = dcb_op->rx_reason_maps[0]; + for (word_idx = 0; word_idx < word_count; word_idx++) { + for (bit_idx = 0; bit_idx < 32; bit_idx++) { + opcode_idx = word_idx * 32 + bit_idx; + bit_val = opcode[word_idx] & (1 << bit_idx) ? 1 : 0; + for (map_idx = 0; ; map_idx++) { + encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; + if (encoding_map == NULL) { + break; + } + if (map[opcode_idx] != encoding_map[0]) { + continue; + } + if (opcode_idx == 0 || map[opcode_idx - 1] != encoding_map[0]) { + enc_bit = 0; + } + encoding[map_idx] |= bit_val << enc_bit; + enc_bit++; + break; + } + if (encoding_map == NULL && bit_val) { + SOC_RX_REASON_SET(*reasons, map[opcode_idx]); + } + } + } + + for (map_idx = 0; ; map_idx++) { + encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; + if (encoding_map == NULL) { + break; + } + if (encoding[map_idx] != socRxReasonInvalid) { + SOC_RX_REASON_SET(*reasons, encoding_map[encoding[map_idx]]); + } + } + + /* BPDU bit should be a reason, paste it in here */ + if (dcb_op->rx_bpdu_get(hdr)) { + SOC_RX_REASON_SET(*reasons, socRxReasonBpdu); + } + + return; +} + + +GETHDRFUNCFIELD(36, rx_cos, word8.overlay1.cpu_cos) +GETHDRHG2FUNCFIELD(36, rx_destmod, dst_mod) +GETHDRHG2FUNCFIELD(36, rx_destport, dst_port) + +GETHDRHG2FUNCFIELD(36, rx_opcode, opcode) +GETHDRHG2FUNCEXPR(36, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : + (h->ppd_overlay2.ctag_hi << 8) | + (h->ppd_overlay2.ctag_lo))) +GETHDRFUNCFIELD(36, rx_matchrule, match_rule) +GETHDRHG2FUNCFIELD(36, rx_prio, vlan_pri) /* outer_pri */ + +static uint32 +ep_to_cpu_hdr36_rx_reason_get(void *hdr) +{ + ep_to_cpu_hdr36_t *h = (ep_to_cpu_hdr36_t *)hdr; + + return (h->switch_pkt) ? (h->reason) : 0; +} + +static uint32 +ep_to_cpu_hdr36_rx_reason_hi_get(void *hdr) +{ + ep_to_cpu_hdr36_t *h = (ep_to_cpu_hdr36_t *)hdr; + + return (h->switch_pkt) ? (h->reason_hi) : 0; +} + +GETHDRFUNCFIELD(36, rx_ingport, word8.overlay1.srcport) +GETHDRHG2FUNCFIELD(36, rx_srcport, src_port) +GETHDRHG2FUNCFIELD(36, rx_srcmod, src_mod) +GETHDRHG2FUNCEXPR(36, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | + (h->ppd_overlay1.dst_port))) +GETHDRHG2FUNCEXPR(36, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | + (h->ppd_overlay1.vc_label_15_8 << 8) | + (h->ppd_overlay1.vc_label_7_0))) +GETHDRFUNCEXPR(36, rx_mirror, ((h->switch_pkt) ? 0:1)) + +GETHDRFUNCEXPR(36, rx_l3_intf, h->word6.overlay1.nhi_b ? \ + (h->word6.overlay1.nhi_b + _SHR_L3_EGRESS_IDX_MIN): \ + (((h->nhi_a_hi << 8) | h->word6.overlay1.nhi_a_lo) + _SHR_L3_EGRESS_IDX_MIN)) +GETHDRFUNCNULL(36, rx_switch_drop) +GETHDRFUNCNULL(36, olp_encap_oam_pkt) + +#if 0 +/* FIXME: Keep it for now, maybe useful later */ +static void +ep_to_cpu_hdr_funcerr(int dt, char *name) +{ + LOG_ERROR(BSL_LS_SOC_COMMON, + (BSL_META("ERROR: ep_to_cpu_hdr%d_%s called\n"), dt, name)); +} +#endif + +static void +dcb36_init(dcb_t *dcb) +{ + uint32 *d = (uint32 *)dcb; + + d[0] = d[1] = d[2] = d[3] = 0; +} + +static int +dcb36_add_rx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags) +{ + dcb36_t *d; /* DCB */ + uint32 *di; /* DCB integer pointer */ + sal_paddr_t paddr; + + d = (dcb36_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); + + if (dv->dv_vcnt > 0) { /* chain off previous dcb */ + d[-1].c_chain = 1; + } + + di = (uint32 *)d; + di[0] = di[1] = di[2] = di[3] = 0; + + if (addr) { + paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); + d->addr_lo = PTR_TO_INT(paddr); + d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr)); + } + + d->c_count = count; + d->c_sg = 1; + + dv->dv_vcnt += 1; + return dv->dv_cnt - dv->dv_vcnt; +} + +static int +dcb36_add_tx(dv_t *dv, sal_vaddr_t addr, uint32 count, + pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh) +{ + dcb36_t *d; /* DCB */ + uint32 *di; /* DCB integer pointer */ + sal_paddr_t paddr = 0; /* Packet buffer physical address */ + + d = (dcb36_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); + + if (addr) + paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); + + if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) && + (d[-1].c_sg != 0) && + ((d[-1].addr_lo + d[-1].c_count) == paddr) && + (d[-1].c_count + count <= DCB_MAX_REQCOUNT)) { + d[-1].c_count += count; + return dv->dv_cnt - dv->dv_vcnt; + } + + if (dv->dv_vcnt >= dv->dv_cnt) { + return SOC_E_FULL; + } + if (dv->dv_vcnt > 0) { /* chain off previous dcb */ + d[-1].c_chain = 1; + } + + di = (uint32 *)d; + di[0] = di[1] = di[2] = di[3] = 0; + + d->addr_lo = PTR_TO_INT(paddr); + d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr)); + d->c_count = count; + d->c_sg = 1; + + d->c_purge = SOC_DMA_PURGE_GET(flags); + + if (SOC_DMA_HG_GET(flags)) { + d->c_hg = 1; + } + + dv->dv_vcnt += 1; + + return dv->dv_cnt - dv->dv_vcnt; +} + +static uint32 +dcb36_intr_info(int unit, dcb_t *dcb, int tx, uint32 *count) +{ + dcb36_t *d = (dcb36_t *)dcb; /* DCB */ + uint32 f; /* SOC_DCB_INFO_* flags */ + + if (!d->done) { + return 0; + } + + f = SOC_DCB_INFO_DONE; + if (tx) { + if (!d->c_sg) { + f |= SOC_DCB_INFO_PKTEND; + } + } else { + if (d->end) { + f |= SOC_DCB_INFO_PKTEND; + } + } + + *count = d->count; + return f; +} + +/* the addr related functions are the same for all dcb types */ +static void +dcb36_addr_set(int unit, dcb_t *dcb, sal_vaddr_t addr) +{ + dcb36_t *d = (dcb36_t *)dcb; /* DCB */ + sal_paddr_t paddr; + + if (addr == 0) { + d->addr_lo = 0; + d->addr_hi = 0; + } else { + paddr = soc_cm_l2p(unit, (void *)addr); + d->addr_lo = PTR_TO_INT(paddr); + d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr)); + } +} + +static sal_vaddr_t +dcb36_addr_get(int unit, dcb_t *dcb) +{ + dcb36_t *d = (dcb36_t *)dcb; /* DCB */ + sal_paddr_t paddr; + +#if defined(COMPILER_OVERRIDE_NO_LONGLONG) || defined(__PEDANTIC__) + paddr = d->addr_lo; +#else + paddr = (((uint64)(d->addr_hi & ~(0x10000000)) << 32) | d->addr_lo); +#endif + + return (sal_vaddr_t)soc_cm_p2l(unit, paddr); +} + +static sal_paddr_t +dcb36_paddr_get(dcb_t *dcb) +{ + uint32 *d = (uint32 *)dcb; + + return (sal_paddr_t)*d; +} + +static void +dcb36_desc_intr_set(dcb_t * dcb, int val) +{ + dcb36_t * d = (dcb36_t *)dcb; + + d->c_intr = val; + return; +} + +static uint32 +dcb36_desc_status_set(dcb_t * dcb, uint32 val) +{ + dcb36_t * d = (dcb36_t *)dcb; + + d->c_desc_status = val; + return 0; +} + +static uint32 +dcb36_desc_remaining_set(dcb_t * dcb, uint32 val) +{ + dcb36_t * d = (dcb36_t *)dcb; + + d->c_desc = val; + return 0; +} + +/* + * DCB Type 36 Support + */ +/* From FORMAT CPU_OPCODES */ +static soc_rx_reason_t +dcb36_rx_reason_map[] = { + socRxReasonFilterMatch, /* 0: CPU_FFP */ + socRxReasonVlanFilterMatch, /* 1: VFP */ + socRxReasonSampleSourceFlex, /* 2: CPU_SFLOW_FLEX */ + socRxReasonSampleSource, /* 3: CPU_SFLOW_SRC */ + socRxReasonSampleDest, /* 4: CPU_SFLOW_DST */ + socRxReasonL2Move, /* 5: CPU_L2MOVE */ + socRxReasonL2Cpu, /* 6: CPU_L2CPU */ + socRxReasonL3SourceMiss, /* 7: CPU_L3SRC_MISS */ + socRxReasonL3DestMiss, /* 8: CPU_L3DST_MISS */ + socRxReasonL3SourceMove, /* 9: CPU_L3SRC_MOVE */ + socRxReasonMcastMiss, /* 10: CPU_MC_MISS */ + socRxReasonIpMcastMiss, /* 11: CPU_IPMC_MISS */ + socRxReasonUnknownVlan, /* 12: CPU_UVLAN */ + socRxReasonL3HeaderError, /* 13: CPU_L3HDR_ERR */ + socRxReasonProtocol, /* 14: CPU_PROTOCOL_PKT */ + socRxReasonDosAttack, /* 15: CPU_DOS_ATTACK */ + socRxReasonMartianAddr, /* 16: CPU_MARTIAN_ADDR */ + socRxReasonTunnelError, /* 17: CPU_TUNNEL_ERR */ + socRxReasonL2DestMiss, /* 18: CPU_DLF */ + socRxReasonIcmpRedirect, /* 19: ICMP_REDIRECT */ + socRxReasonL3Slowpath, /* 20: L3_SLOWPATH */ + socRxReasonParityError, /* 21: PARITY_ERROR */ + socRxReasonL3MtuFail, /* 22: L3_MTU_CHECK_FAIL */ + socRxReasonHigigHdrError, /* 23: HGHDR_ERROR */ + socRxReasonMcastIdxError, /* 24: MCIDX_ERROR */ + socRxReasonL2SourceMiss, /* 25: CPU_SLF */ + socRxReasonClassBasedMove, /* 26: CBSM_PREVENTED */ + socRxReasonL3AddrBindFail, /* 27: MAC_BIND_FAIL */ + socRxReasonMplsLabelMiss, /* 28: MPLS_LABEL_MISS */ + socRxReasonMplsInvalidAction, /* 29: MPLS_INVALID_ACTION */ + socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */ + socRxReasonTunnelObjectValidationFail, /* 31: TUNNEL_OBJECT_VALIDATION_FAIL */ + socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */ + socRxReasonL2NonUnicastMiss, /* 33: PBT_NONUC_PKT */ + socRxReasonNhop, /* 34: L3_NEXT_HOP */ + socRxReasonL3Cpu, /* 35: CPU_L3CPU */ + socRxReasonStation, /* 36: MY_STATION */ + socRxReasonNivPrioDrop, /* 37: DOT1P_ADMITTANCE_DISCARD */ + socRxReasonNivRpfFail, /* 38: RPF_LOOKUP_MISS */ + socRxReasonUnknownSubtendingPort, /* 39: UNKOWN SUBTENDING PORT */ + socRxReasonTunnelAdaptLookupMiss, /* 40: TUNNEL_ADAPT_LOOKUP_MISS_DROP */ + socRxReasonTimeSync, /* 41: TIME_SYNC */ + socRxReasonPacketFlowSelectMiss, /* 42: PKT_FLOW_SELECT_MISS */ + socRxReasonTunnelDecapEcnError,/* 43: TUNNEL_DECAP_ECN_ERROR (new) */ + socRxReasonFailoverDrop, /* 44: PROTECTION_DATA_DROP */ + socRxReasonPacketFlowSelect, /* 45: PKT_FLOW_SELECT */ + socRxReasonOtherLookupMiss, /* 46: CPU_FORWARDING_OTHER */ + socRxReasonInvalidTpid, /* 47: INVALID_TPID */ + socRxReasonMplsControlPacket, /* 48: MPLS_CONTROL_PKT */ + socRxReasonTunnelError, /* 49: TUNNEL_ERROR */ + socRxReasonTunnelTtlError, /* 50: TUNNEL_TTL_ERR */ +#if 1 + socRxReasonInvalid, /* 51:NOT DEFINED */ +#endif + socRxReasonCongestionCnm, /* 52: ICNM */ + socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */ + socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */ + socRxReasonL3HeaderError, /* 55: L3_HEADER_ERROR */ + socRxReasonL2HeaderError, /* 56: L2_HDR_ERROR */ + socRxReasonTtl1, /* 57: TTL1 */ + socRxReasonTtl, /* 58: TTL */ + socRxReasonFcoeZoneCheckFail, /* 59: FCOE_ZONE_CHECK_FAIL */ + socRxReasonNat, /* 60: NAT_DROP_REASON_ENCODING */ + socRxReasonNat, /* 61: -> */ + socRxReasonNat, /* 62: 3-bit */ + socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */ +}; + +static soc_rx_reason_t *dcb36_rx_reason_maps[] = { + dcb36_rx_reason_map, + dcb26_rx_reason_nat_encoding_map, + NULL +}; + +SETFUNCERR(36, tx_l2pbm, pbmp_t) +SETFUNCERR(36, tx_utpbm, pbmp_t) +SETFUNCERR(36, tx_l3pbm, pbmp_t) +SETFUNCERR(36, tx_crc, int) +SETFUNCERR(36, tx_cos, int) +SETFUNCERR(36, tx_destmod, uint32) +SETFUNCERR(36, tx_destport, uint32) +SETFUNCERR(36, tx_opcode, uint32) +SETFUNCERR(36, tx_srcmod, uint32) +SETFUNCERR(36, tx_srcport, uint32) +SETFUNCERR(36, tx_prio, uint32) +SETFUNCERR(36, tx_pfm, uint32) + +GETFUNCNULL(36, stat) +SETFUNCNULL2(36, stat) + +dcb_op_t dcb36_op = { + 36, + sizeof(dcb36_t), + dcb36_rx_reason_maps, + dcb0_rx_reason_map_get, + ep_to_cpu_hdr36_rx_reasons_get, + dcb36_init, + dcb36_add_tx, + dcb36_add_rx, + dcb36_intr_info, + dcb36_reqcount_set, + dcb36_reqcount_get, + dcb36_xfercount_get, + dcb36_addr_set, + dcb36_addr_get, + dcb36_paddr_get, + dcb36_done_set, + dcb36_done_get, + dcb36_sg_set, + dcb36_sg_get, + dcb36_chain_set, + dcb36_chain_get, + dcb36_reload_set, + dcb36_reload_get, + dcb36_desc_intr_set, + dcb36_desc_intr_get, + dcb36_tx_l2pbm_set, + dcb36_tx_utpbm_set, + dcb36_tx_l3pbm_set, + dcb36_tx_crc_set, + dcb36_tx_cos_set, + dcb36_tx_destmod_set, + dcb36_tx_destport_set, + dcb36_tx_opcode_set, + dcb36_tx_srcmod_set, + dcb36_tx_srcport_set, + dcb36_tx_prio_set, + dcb36_tx_pfm_set, + ep_to_cpu_hdr36_rx_untagged_get, + ep_to_cpu_hdr36_rx_crc_get, + ep_to_cpu_hdr36_rx_cos_get, + ep_to_cpu_hdr36_rx_destmod_get, + ep_to_cpu_hdr36_rx_destport_get, + ep_to_cpu_hdr36_rx_opcode_get, + ep_to_cpu_hdr36_rx_classtag_get, + ep_to_cpu_hdr36_rx_matchrule_get, + dcb36_rx_start_get, + dcb36_rx_end_get, + dcb36_rx_error_get, + ep_to_cpu_hdr36_rx_prio_get, + ep_to_cpu_hdr36_rx_reason_get, + ep_to_cpu_hdr36_rx_reason_hi_get, + ep_to_cpu_hdr36_rx_ingport_get, + ep_to_cpu_hdr36_rx_srcport_get, + ep_to_cpu_hdr36_rx_srcmod_get, + ep_to_cpu_hdr36_rx_mcast_get, + ep_to_cpu_hdr36_rx_vclabel_get, + ep_to_cpu_hdr36_rx_mirror_get, + ep_to_cpu_hdr36_rx_timestamp_get, + ep_to_cpu_hdr36_rx_timestamp_upper_get, + dcb36_hg_set, + dcb36_hg_get, + dcb36_stat_set, + dcb36_stat_get, + dcb36_purge_set, + dcb36_purge_get, + ep_to_cpu_hdr36_mhp_get, + ep_to_cpu_hdr36_outer_vid_get, + ep_to_cpu_hdr36_outer_pri_get, + ep_to_cpu_hdr36_outer_cfi_get, + ep_to_cpu_hdr36_rx_outer_tag_action_get, + ep_to_cpu_hdr36_inner_vid_get, + ep_to_cpu_hdr36_inner_pri_get, + ep_to_cpu_hdr36_inner_cfi_get, + ep_to_cpu_hdr36_rx_inner_tag_action_get, + ep_to_cpu_hdr36_rx_bpdu_get, + ep_to_cpu_hdr36_rx_l3_intf_get, + ep_to_cpu_hdr36_rx_decap_tunnel_get, + ep_to_cpu_hdr36_rx_switch_drop_get, + ep_to_cpu_hdr36_olp_encap_oam_pkt_get, + dcb36_read_ecc_error_get, + dcb36_desc_remaining_get, + dcb36_desc_remaining_set, + dcb36_desc_status_get, + dcb36_desc_status_set, + NULL, +}; +#endif /* BCM_TRIDENT3_SUPPORT */ + +#if defined(BCM_HURRICANE3_SUPPORT) +/* + * DCB Type 34 Support + */ +GETFUNCEXPR(34, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) : + (((d->repl_nhi) & 0x7ff) + _SHR_L3_EGRESS_IDX_MIN))) + +dcb_op_t dcb34_op = { + 34, + sizeof(dcb34_t), + dcb31_rx_reason_maps, + dcb0_rx_reason_map_get, + dcb0_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb19_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb19_desc_intr_set, + dcb19_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb31_rx_untagged_get, + dcb19_rx_crc_get, + dcb31_rx_cos_get, + dcb23_rx_destmod_get, + dcb23_rx_destport_get, + dcb23_rx_opcode_get, + dcb23_rx_classtag_get, + dcb23_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb23_rx_prio_get, + dcb23_rx_reason_get, + dcb23_rx_reason_hi_get, + dcb23_rx_ingport_get, + dcb23_rx_srcport_get, + dcb23_rx_srcmod_get, + dcb23_rx_mcast_get, + dcb23_rx_vclabel_get, + dcb31_rx_mirror_get, + dcb23_rx_timestamp_get, + dcb31_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb23_mhp_get, + dcb31_outer_vid_get, + dcb31_outer_pri_get, + dcb31_outer_cfi_get, + dcb31_rx_outer_tag_action_get, + dcb31_inner_vid_get, + dcb31_inner_pri_get, + dcb31_inner_cfi_get, + dcb31_rx_inner_tag_action_get, + dcb31_rx_bpdu_get, + dcb34_rx_l3_intf_get, + dcb19_rx_decap_tunnel_get, + dcb31_rx_switch_drop_get, + dcb23_olp_encap_oam_pkt_get, + dcb23_read_ecc_error_get, + dcb23_desc_remaining_get, + dcb23_desc_remaining_set, + dcb23_desc_status_get, + dcb23_desc_status_set, + NULL, +}; +#endif /* BCM_HURRICANE3_SUPPORT */ + +#if defined(BCM_GREYHOUND2_SUPPORT) +/* + * DCB Type 37 Support + */ +/* From FORMAT CPU_OPCODES */ +static soc_rx_reason_t +dcb37_rx_reason_map[] = { + socRxReasonUnknownVlan, /* Offset 0 */ + socRxReasonL2SourceMiss, /* Offset 1 */ + socRxReasonL2DestMiss, /* Offset 2 */ + socRxReasonL2Move, /* Offset 3 */ + socRxReasonL2Cpu, /* Offset 4 */ + socRxReasonSampleSource, /* Offset 5 */ + socRxReasonSampleDest, /* Offset 6 */ + socRxReasonL3SourceMiss, /* Offset 7 */ + socRxReasonL3DestMiss, /* Offset 8 */ + socRxReasonL3SourceMove, /* Offset 9 */ + socRxReasonMcastMiss, /* Offset 10 */ + socRxReasonIpMcastMiss, /* Offset 11 */ + socRxReasonFilterMatch, /* Offset 12 */ + socRxReasonL3HeaderError, /* Offset 13 */ + socRxReasonProtocol, /* Offset 14 */ + socRxReasonDosAttack, /* Offset 15 */ + socRxReasonMartianAddr, /* Offset 16 */ + socRxReasonTunnelError, /* Offset 17 */ + socRxReasonL2MtuFail, /* Offset 18 */ + socRxReasonIcmpRedirect, /* Offset 19 */ + socRxReasonL3Slowpath, /* Offset 20 */ + socRxReasonParityError, /* Offset 21 */ + socRxReasonL3MtuFail, /* Offset 22 */ + socRxReasonHigigHdrError, /* Offset 23 */ + socRxReasonMcastIdxError, /* Offset 24 */ + socRxReasonVlanFilterMatch, /* Offset 25 */ + socRxReasonClassBasedMove, /* Offset 26 */ + socRxReasonL2LearnLimit, /* Offset 27 */ + socRxReasonMplsLabelMiss, /* Offset 28 */ + socRxReasonMplsInvalidAction, /* Offset 29 */ + socRxReasonMplsInvalidPayload, /* Offset 30 */ + socRxReasonMplsTtl, /* Offset 31 */ + socRxReasonMplsSequenceNumber, /* Offset 32 */ + socRxReasonL2NonUnicastMiss, /* Offset 33 */ + socRxReasonNhop, /* Offset 34 */ + socRxReasonMplsCtrlWordError, /* Offset 35 */ + socRxReasonTimeSync, /* Offset 36 */ + socRxReasonOAMSlowpath, /* Offset 37 */ + socRxReasonOAMError, /* Offset 38 */ + socRxReasonOAMLMDM, /* Offset 39 */ + socRxReasonL3AddrBindFail, /* Offset 40 */ + socRxReasonVlanTranslate, /* Offset 41 */ + socRxReasonNiv, /* Offset 42 */ + socRxReasonNiv, /* Offset 43 */ + socRxReasonNiv, /* Offset 44 */ + socRxReasonStation, /* Offset 45 */ + socRxReasonL2StuFail, /* Offset 46 */ + socReasonSrCounterExceeded, /* Offset 47 */ + socRxReasonSrCopyToCpuBit0, /* Offset 48 */ + socRxReasonSrCopyToCpuBit1, /* Offset 49 */ + socRxReasonSrCopyToCpuBit2, /* Offset 50 */ + socRxReasonSrCopyToCpuBit3, /* Offset 51 */ + socRxReasonSrCopyToCpuBit4, /* Offset 52 */ + socRxReasonSrCopyToCpuBit5, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; +static soc_rx_reason_t *dcb37_rx_reason_maps[] = { + dcb37_rx_reason_map, + NULL +}; + +GETFUNCEXPR(37, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) : + (((d->repl_nhi) & 0x7ff) + _SHR_L3_EGRESS_IDX_MIN))) +GETFUNCNULL(37, read_ecc_error) +GETFUNCNULL(37, desc_remaining) +SETFUNCNULL(37, desc_remaining) +GETFUNCNULL(37, desc_status) +SETFUNCNULL(37, desc_status) + +dcb_op_t dcb37_op = { + 37, + sizeof(dcb37_t), + dcb37_rx_reason_maps, + dcb0_rx_reason_map_get, + dcb0_rx_reasons_get, + dcb19_init, + dcb19_addtx, + dcb19_addrx, + dcb19_intrinfo, + dcb19_reqcount_set, + dcb19_reqcount_get, + dcb19_xfercount_get, + dcb0_addr_set, + dcb0_addr_get, + dcb0_paddr_get, + dcb19_done_set, + dcb19_done_get, + dcb19_sg_set, + dcb19_sg_get, + dcb19_chain_set, + dcb19_chain_get, + dcb19_reload_set, + dcb19_reload_get, + dcb19_desc_intr_set, + dcb19_desc_intr_get, + dcb19_tx_l2pbm_set, + dcb19_tx_utpbm_set, + dcb19_tx_l3pbm_set, + dcb19_tx_crc_set, + dcb19_tx_cos_set, + dcb19_tx_destmod_set, + dcb19_tx_destport_set, + dcb19_tx_opcode_set, + dcb19_tx_srcmod_set, + dcb19_tx_srcport_set, + dcb19_tx_prio_set, + dcb19_tx_pfm_set, + dcb31_rx_untagged_get, + dcb19_rx_crc_get, + dcb31_rx_cos_get, + dcb23_rx_destmod_get, + dcb23_rx_destport_get, + dcb23_rx_opcode_get, + dcb23_rx_classtag_get, + dcb23_rx_matchrule_get, + dcb19_rx_start_get, + dcb19_rx_end_get, + dcb19_rx_error_get, + dcb23_rx_prio_get, + dcb23_rx_reason_get, + dcb23_rx_reason_hi_get, + dcb23_rx_ingport_get, + dcb23_rx_srcport_get, + dcb23_rx_srcmod_get, + dcb23_rx_mcast_get, + dcb23_rx_vclabel_get, + dcb31_rx_mirror_get, + dcb23_rx_timestamp_get, + dcb31_rx_timestamp_upper_get, + dcb19_hg_set, + dcb19_hg_get, + dcb19_stat_set, + dcb19_stat_get, + dcb19_purge_set, + dcb19_purge_get, + dcb23_mhp_get, + dcb31_outer_vid_get, + dcb31_outer_pri_get, + dcb31_outer_cfi_get, + dcb31_rx_outer_tag_action_get, + dcb31_inner_vid_get, + dcb31_inner_pri_get, + dcb31_inner_cfi_get, + dcb31_rx_inner_tag_action_get, + dcb31_rx_bpdu_get, + dcb37_rx_l3_intf_get, + dcb19_rx_decap_tunnel_get, + dcb31_rx_switch_drop_get, + dcb23_olp_encap_oam_pkt_get, + dcb37_read_ecc_error_get, + dcb37_desc_remaining_get, + dcb37_desc_remaining_set, + dcb37_desc_status_get, + dcb37_desc_status_set, + NULL, +}; +#endif /* BCM_GREYHOUND2_SUPPORT */ + +#if defined(BCM_TOMAHAWK3_SUPPORT) +SETFUNCFIELD(38, reqcount, c_count, uint32 count, count) +GETFUNCFIELD(38, reqcount, c_count) +GETFUNCFIELD(38, xfercount, count) +SETFUNCFIELD(38, done, done, int val, val ? 1 : 0) +GETFUNCFIELD(38, done, done) +SETFUNCFIELD(38, sg, c_sg, int val, val ? 1 : 0) +GETFUNCFIELD(38, sg, c_sg) +SETFUNCFIELD(38, chain, c_chain, int val, val ? 1 : 0) +GETFUNCFIELD(38, chain, c_chain) +SETFUNCFIELD(38, reload, c_reload, int val, val ? 1 : 0) +GETFUNCFIELD(38, reload, c_reload) +GETFUNCFIELD(38, rx_start, start) +GETFUNCFIELD(38, rx_end, end) +GETFUNCFIELD(38, rx_error, error) +SETFUNCFIELD(38, hg, c_hg, uint32 hg, hg) +GETFUNCFIELD(38, hg, c_hg) +SETFUNCFIELD(38, purge, c_purge, uint32 purge, purge) +GETFUNCFIELD(38, purge, c_purge) +GETFUNCFIELD(38, read_ecc_error, ecc_error) +GETFUNCFIELD(38, desc_status, c_desc_status) +GETFUNCFIELD(38, desc_intr, c_intr) +GETFUNCFIELD(38, desc_remaining, c_desc) + +GETHDRFUNCFIELD(38, rx_timestamp, timestamp) +GETHDRFUNCFIELD(38, rx_timestamp_upper, timestamp_hi) +GETHDRPTREXPR(38, mhp, &(h->mh0)) +GETHDRFUNCFIELD(38, outer_vid, outer_vid) +GETHDRFUNCFIELD(38, outer_pri, outer_pri) +GETHDRFUNCFIELD(38, outer_cfi, outer_cfi) +GETHDRFUNCFIELD(38, rx_outer_tag_action, word3.overlay1.otag_action) +GETHDRFUNCNULL(38, inner_vid) +GETHDRFUNCNULL(38, inner_pri) +GETHDRFUNCNULL(38, inner_cfi) +GETHDRFUNCNULL(38, rx_inner_tag_action) +GETHDRFUNCFIELD(38, rx_bpdu, word0.overlay1.bpdu) + +static uint32 ep_to_cpu_hdr38_rx_crc_get(void *hdr) { + return 0; +} + +static uint32 +ep_to_cpu_hdr38_rx_untagged_get(void *hdr, int dt_mode, int ingport_is_hg) +{ + ep_to_cpu_hdr38_t *h = (ep_to_cpu_hdr38_t *)hdr; + uint32 tag_status = h->word3.overlay1.tag_status; + + COMPILER_REFERENCE(dt_mode); + /* We have a case where though the number of bits for the + * tag status is 2, we support only 2 states + * 0 = untagged + * 1 = single outer-tag + */ + return (ingport_is_hg ? + ((tag_status) ? 0 : 2) : + ((tag_status) ? 2 : 3)); +} + +static void +ep_to_cpu_hdr38_rx_reasons_get(dcb_op_t *dcb_op, void *hdr, soc_rx_reasons_t *reasons) +{ + soc_rx_reason_t *map, *encoding_map; + uint32 opcode[2], encoding[3]; + uint32 bit_val; + int word_idx, bit_idx, opcode_idx, map_idx, word_count; + int enc_bit = 0; + + SOC_RX_REASON_CLEAR_ALL(*reasons); + + opcode[0] = dcb_op->rx_reason_get(hdr); + opcode[1] = dcb_op->rx_reason_hi_get(hdr); + word_count = 2; + sal_memset(encoding, 0, sizeof(encoding)); + map = dcb_op->rx_reason_maps[0]; + for (word_idx = 0; word_idx < word_count; word_idx++) { + for (bit_idx = 0; bit_idx < 32; bit_idx++) { + opcode_idx = word_idx * 32 + bit_idx; + bit_val = opcode[word_idx] & (1 << bit_idx) ? 1 : 0; + for (map_idx = 0; ; map_idx++) { + encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; + if (encoding_map == NULL) { + break; + } + if (map[opcode_idx] != encoding_map[0]) { + continue; + } + if (opcode_idx == 0 || map[opcode_idx - 1] != encoding_map[0]) { + enc_bit = 0; + } + encoding[map_idx] |= bit_val << enc_bit; + enc_bit++; + break; + } + if (encoding_map == NULL && bit_val) { + SOC_RX_REASON_SET(*reasons, map[opcode_idx]); + } + } + } + + for (map_idx = 0; ; map_idx++) { + encoding_map = dcb_op->rx_reason_maps[1 + map_idx]; + if (encoding_map == NULL) { + break; + } + if (encoding[map_idx] != socRxReasonInvalid) { + SOC_RX_REASON_SET(*reasons, encoding_map[encoding[map_idx]]); + } + } + + /* BPDU bit should be a reason, paste it in here */ + if (dcb_op->rx_bpdu_get(hdr)) { + SOC_RX_REASON_SET(*reasons, socRxReasonBpdu); + } + + return; +} + +GETHDRFUNCFIELD(38, rx_cos, word0.overlay2.cpu_cos) +GETHDRHG2FUNCFIELD(38, rx_destmod, dst_mod) +GETHDRHG2FUNCFIELD(38, rx_destport, dst_port) + +GETHDRHG2FUNCFIELD(38, rx_opcode, opcode) +GETHDRHG2FUNCEXPR(38, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 : + (h->ppd_overlay2.ctag_hi << 8) | + (h->ppd_overlay2.ctag_lo))) +GETHDRFUNCFIELD(38, rx_matchrule, match_rule) +GETHDRHG2FUNCFIELD(38, rx_prio, vlan_pri) /* outer_pri */ + +static uint32 +ep_to_cpu_hdr38_rx_reason_get(void *hdr) +{ + ep_to_cpu_hdr38_t *h = (ep_to_cpu_hdr38_t *)hdr; + + return (h->switch_pkt) ? (h->reason) : 0; +} + +static uint32 +ep_to_cpu_hdr38_rx_reason_hi_get(void *hdr) +{ + ep_to_cpu_hdr38_t *h = (ep_to_cpu_hdr38_t *)hdr; + + return (h->switch_pkt) ? (h->reason_hi) : 0; +} + +GETHDRFUNCFIELD(38, rx_ingport, srcport) +GETHDRHG2FUNCFIELD(38, rx_srcport, src_port) +GETHDRHG2FUNCFIELD(38, rx_srcmod, src_mod) +GETHDRHG2FUNCEXPR(38, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) | + (h->ppd_overlay1.dst_port))) +GETHDRHG2FUNCEXPR(38, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) | + (h->ppd_overlay1.vc_label_15_8 << 8) | + (h->ppd_overlay1.vc_label_7_0))) +GETHDRFUNCEXPR(38, rx_mirror, ((SOC_CPU_OPCODE_TYPE_IP_0 == + h->word3.overlay1.cpu_opcode_type) ? + (h->reason & (1 << 17)) : 0)) + +static _shr_rx_decap_tunnel_t dcb38_rx_decap_tunnel_map[] = { + _SHR_RX_DECAP_NONE, + _SHR_RX_DECAP_IP, + _SHR_RX_DECAP_L2MPLS_1LABEL, + _SHR_RX_DECAP_L2MPLS_2LABEL, + _SHR_RX_DECAP_MPLS_3LABEL, + _SHR_RX_DECAP_L3MPLS_1LABEL, + _SHR_RX_DECAP_L3MPLS_2LABEL, + _SHR_RX_DECAP_MPLS_3LABEL +}; + +static uint32 ep_to_cpu_hdr38_rx_decap_tunnel_get(void *hdr) { + ep_to_cpu_hdr38_t *h = (ep_to_cpu_hdr38_t *)hdr; + /* Check for array bounds */ + if ( (h->decap_tunnel_type < + (sizeof (dcb38_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) { + return (uint32)dcb38_rx_decap_tunnel_map[h->decap_tunnel_type]; + } + return (uint32)_SHR_RX_DECAP_NONE; +} +GETHDRFUNCFIELD(38, rx_l3_intf, word3.overlay1.ing_l3_intf) +GETHDRFUNCNULL(38, rx_switch_drop) +GETHDRFUNCNULL(38, olp_encap_oam_pkt) + +static void +dcb38_init(dcb_t *dcb) +{ + uint32 *d = (uint32 *)dcb; + + d[0] = d[1] = d[2] = d[3] = 0; +} + +static int +dcb38_add_rx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags) +{ + dcb38_t *d; /* DCB */ + uint32 *di; /* DCB integer pointer */ + sal_paddr_t paddr; + + if(!addr) + return SOC_E_PARAM; + + d = (dcb38_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); + + if (dv->dv_vcnt > 0) { /* chain off previous dcb */ + d[-1].c_chain = 1; + } + + di = (uint32 *)d; + di[0] = di[1] = di[2] = di[3] = 0; + + if (addr) { + paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); + d->addr_lo = PTR_TO_INT(paddr); + d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr)); + } + + d->c_count = count; + d->c_sg = 1; + + dv->dv_vcnt += 1; + return dv->dv_cnt - dv->dv_vcnt; +} + +static int +dcb38_add_tx(dv_t *dv, sal_vaddr_t addr, uint32 count, + pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh) +{ + dcb38_t *d; /* DCB */ + uint32 *di; /* DCB integer pointer */ + sal_paddr_t paddr; /* Packet buffer physical address */ + + if(!addr) + return SOC_E_PARAM; + + d = (dcb38_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt); + + if (addr) + paddr = soc_cm_l2p(dv->dv_unit, (void *)addr); + + if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) && + (d[-1].c_sg != 0) && + ((d[-1].addr_lo + d[-1].c_count) == paddr) && + (d[-1].c_count + count <= DCB_MAX_REQCOUNT)) { + d[-1].c_count += count; + return dv->dv_cnt - dv->dv_vcnt; + } + + if (dv->dv_vcnt >= dv->dv_cnt) { + return SOC_E_FULL; + } + if (dv->dv_vcnt > 0) { /* chain off previous dcb */ + d[-1].c_chain = 1; + } + + di = (uint32 *)d; + di[0] = di[1] = di[2] = di[3] = 0; + + d->addr_lo = PTR_TO_INT(paddr); + d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr)); + d->c_count = count; + d->c_sg = 1; + + d->c_purge = SOC_DMA_PURGE_GET(flags); + + if (SOC_DMA_HG_GET(flags)) { + d->c_hg = 1; + } + + dv->dv_vcnt += 1; + + return dv->dv_cnt - dv->dv_vcnt; +} + +static uint32 +dcb38_intr_info(int unit, dcb_t *dcb, int tx, uint32 *count) +{ + dcb38_t *d = (dcb38_t *)dcb; /* DCB */ + uint32 f; /* SOC_DCB_INFO_* flags */ + + if (!d->done) { + return 0; + } + + f = SOC_DCB_INFO_DONE; + if (tx) { + if (!d->c_sg) { + f |= SOC_DCB_INFO_PKTEND; + } + } else { + if (d->end) { + f |= SOC_DCB_INFO_PKTEND; + } + } + + *count = d->count; + return f; +} + +/* the addr related functions are the same for all dcb types */ +static void +dcb38_addr_set(int unit, dcb_t *dcb, sal_vaddr_t addr) +{ + dcb38_t *d = (dcb38_t *)dcb; /* DCB */ + sal_paddr_t paddr; + + if (addr == 0) { + d->addr_lo = 0; + d->addr_hi = 0; + } else { + paddr = soc_cm_l2p(unit, (void *)addr); + d->addr_lo = PTR_TO_INT(paddr); + d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr)); + } +} + +static sal_vaddr_t +dcb38_addr_get(int unit, dcb_t *dcb) +{ + dcb38_t *d = (dcb38_t *)dcb; /* DCB */ + sal_paddr_t paddr; + +#if defined(COMPILER_OVERRIDE_NO_LONGLONG) || defined(__PEDANTIC__) + paddr = d->addr_lo; +#else + paddr = (((uint64)(d->addr_hi & ~(0x10000000)) << 32) | d->addr_lo); +#endif + + return (sal_vaddr_t)soc_cm_p2l(unit, paddr); +} + +static sal_paddr_t +dcb38_paddr_get(dcb_t *dcb) +{ + uint32 *d = (uint32 *)dcb; + + return (sal_paddr_t)*d; +} + +static void +dcb38_desc_intr_set(dcb_t * dcb, int val) +{ + dcb38_t * d = (dcb38_t *)dcb; + + d->c_intr = val; + return; +} + +static uint32 +dcb38_desc_status_set(dcb_t * dcb, uint32 val) +{ + dcb38_t * d = (dcb38_t *)dcb; + + d->c_desc_status = val; + return 0; +} + +static uint32 +dcb38_desc_remaining_set(dcb_t * dcb, uint32 val) +{ + dcb38_t * d = (dcb38_t *)dcb; + + d->c_desc = val; + return 0; +} + +/* + * DCB Type 38 Support + */ +/* From FORMAT CPU_OPCODES */ +static soc_rx_reason_t +dcb38_rx_reason_map[] = { + socRxReasonUnknownVlan, /* 0: CPU_UVLAN */ + socRxReasonL2SourceMiss, /* 1: CPU_SLF */ + socRxReasonL2DestMiss, /* 2: CPU_DLF */ + socRxReasonL2Move, /* 3: CPU_L2MOVE */ + socRxReasonL2Cpu, /* 4: CPU_L2CPU */ + socRxReasonL3SourceMiss, /* 5: CPU_L3SRC_MISS */ + socRxReasonL3DestMiss, /* 6: CPU_L3DST_MISS */ + socRxReasonL3SourceMove, /* 7: CPU_L3SRC_MOVE */ + socRxReasonMcastMiss, /* 8: CPU_MC_MISS */ + socRxReasonIpMcastMiss, /* 9: CPU_IPMC_MISS */ + socRxReasonFilterMatch, /* 10: CPU_FFP */ + socRxReasonL3HeaderError, /* 11: CPU_L3HDR_ERR */ + socRxReasonProtocol, /* 12: CPU_PROTOCOL_PKT */ + socRxReasonDosAttack, /* 13: CPU_DOS_ATTACK */ + socRxReasonMartianAddr, /* 14: CPU_MARTIAN_ADDR */ + socRxReasonTunnelError, /* 15: CPU_TUNNEL_ERR */ + socRxReasonSampleSourceFlex, /* 16: CPU_SFLOW_FLEX */ + socRxReasonSampleSourceFlex, /* 17: CPU_SFLOW_FLEX */ + socRxReasonIcmpRedirect, /* 18: ICMP_REDIRECT */ + socRxReasonL3Slowpath, /* 19: L3_SLOWPATH */ + socRxReasonParityError, /* 20: PARITY_ERROR */ + socRxReasonL3MtuFail, /* 21: L3_MTU_CHECK_FAIL */ + socRxReasonMcastIdxError, /* 22: MCIDX_ERROR */ + socRxReasonVlanFilterMatch, /* 23: VFP */ + socRxReasonMplsError, /* 24: MPLS_LABEL_MISS */ + socRxReasonMplsError, /* 25: MPLS_INVALID_ACTION */ + socRxReasonMplsError, /* 26: MPLS_INVALID_PAYLOAD */ + socRxReasonL2NonUnicastMiss, /* 27: PBT_NONUC_PKT */ + socRxReasonNhop, /* 28: L3_NEXT_HOP */ + socRxReasonStation, /* 29: MY_STATION */ + socRxReasonTimeSync, /* 30: TIME_SYNC */ + socRxReasonTunnelDecapEcnError,/* 31: TUNNEL_DECAP_ECN_ERROR (new) */ + socRxReasonBfdSlowpath, /* 32: BFD SLOWPATH */ + socRxReasonBfd, /* 33: BFD_ERROR */ +#if 1 + socRxReasonInvalid, /* 34:NOT DEFINED */ +#endif + socRxReasonMplsUnknownAch, /* 35: MPLS_UNKNOWN_ACH_ERROR */ + socRxReasonMplsRouterAlertLabel, /* 36: MPLS_ALERT_LABEL */ + socRxReasonIpmcInterfaceMismatch, /* 37: CPU_IPMC_INTERFACE_MISMATCH */ + socRxReasonDlbMonitor, /* 38: DLB_MONITOR */ + socRxReasonIntTurnAround, /* 39: INBAND_TELEMETRY */ + socRxReasonEtrapMonitor, /* 40: ETRAP_MONITOR */ + socRxReasonInvalid, /* 41: Reserved */ + socRxReasonInvalid, /* 42: Reserved */ + socRxReasonInvalid, /* 43: Reserved */ + socRxReasonInvalid, /* 44: Reserved */ + socRxReasonInvalid, /* 45: Reserved */ + socRxReasonInvalid, /* 46: Reserved */ + socRxReasonInvalid, /* 47: Reserved */ + socRxReasonInvalid, /* 48: Reserved */ + socRxReasonInvalid, /* 49: Reserved */ + socRxReasonInvalid, /* 50: Reserved */ + socRxReasonInvalid, /* 51: Reserved */ + socRxReasonInvalid, /* 52: Reserved */ + socRxReasonInvalid, /* 53: Reserved */ + socRxReasonInvalid, /* 54: Reserved */ + socRxReasonInvalid, /* 55: Reserved */ + socRxReasonInvalid, /* 56: Reserved */ + socRxReasonInvalid, /* 57: Reserved */ + socRxReasonInvalid, /* 58: Reserved */ + socRxReasonInvalid, /* 59: Reserved */ + socRxReasonInvalid, /* 60: Reserved */ + socRxReasonInvalid, /* 61: Reserved */ + socRxReasonInvalid, /* 62: Reserved */ + socRxReasonInvalid /* 63: Reserved */ +}; + +/* From CPU_SFLOW encoding from TH3 regsfile */ +static soc_rx_reason_t dcb38_rx_reason_cpu_sflow_encoding_map[] = { + socRxReasonSampleSourceFlex, /* 0: NO_ERRORS + * Basefield, must match the entries above */ + socRxReasonSampleSourceFlex, /* 1: CPU_SFLOW_FLEX */ + socRxReasonSampleDest, /* 2: CPU_SFLOW_DST */ + socRxReasonSampleSource, /* 3: CPU_SFLOW_SRC */ + socRxReasonInvalid, /* Offset 4 */ + socRxReasonInvalid, /* Offset 5 */ + socRxReasonInvalid, /* Offset 6 */ + socRxReasonInvalid, /* Offset 7 */ + socRxReasonInvalid, /* Offset 8 */ + socRxReasonInvalid, /* Offset 9 */ + socRxReasonInvalid, /* Offset 10 */ + socRxReasonInvalid, /* Offset 11 */ + socRxReasonInvalid, /* Offset 12 */ + socRxReasonInvalid, /* Offset 13 */ + socRxReasonInvalid, /* Offset 14 */ + socRxReasonInvalid, /* Offset 15 */ + socRxReasonInvalid, /* Offset 16 */ + socRxReasonInvalid, /* Offset 17 */ + socRxReasonInvalid, /* Offset 18 */ + socRxReasonInvalid, /* Offset 19 */ + socRxReasonInvalid, /* Offset 20 */ + socRxReasonInvalid, /* Offset 21 */ + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +/* From MPLS_PROC_ERROR encoding in TH3 regsfile */ +static soc_rx_reason_t dcb38_rx_reason_mpls_proc_err_encoding_map[] = { + socRxReasonMplsError, /* 0: NO_ERRORS + * Basefield, must match the entries above */ + socRxReasonMplsInvalidPayload, /* 1: Invalid Payload */ + socRxReasonMplsInvalidAction, /* 2: Invalid Action */ + socRxReasonMplsLabelMiss, /* 3: Lookup Label Miss */ + socRxReasonMplsTtl, /* 4: TTL Check Fail */ + socRxReasonInvalid, /* Offset 5 */ + socRxReasonInvalid, /* Offset 6 */ + socRxReasonInvalid, /* Offset 7 */ + socRxReasonInvalid, /* Offset 8 */ + socRxReasonInvalid, /* Offset 9 */ + socRxReasonInvalid, /* Offset 10 */ + socRxReasonInvalid, /* Offset 11 */ + socRxReasonInvalid, /* Offset 12 */ + socRxReasonInvalid, /* Offset 13 */ + socRxReasonInvalid, /* Offset 14 */ + socRxReasonInvalid, /* Offset 15 */ + socRxReasonInvalid, /* Offset 16 */ + socRxReasonInvalid, /* Offset 17 */ + socRxReasonInvalid, /* Offset 18 */ + socRxReasonInvalid, /* Offset 19 */ + socRxReasonInvalid, /* Offset 20 */ + socRxReasonInvalid, /* Offset 21 */ + socRxReasonInvalid, /* Offset 22 */ + socRxReasonInvalid, /* Offset 23 */ + socRxReasonInvalid, /* Offset 24 */ + socRxReasonInvalid, /* Offset 25 */ + socRxReasonInvalid, /* Offset 26 */ + socRxReasonInvalid, /* Offset 27 */ + socRxReasonInvalid, /* Offset 28 */ + socRxReasonInvalid, /* Offset 29 */ + socRxReasonInvalid, /* Offset 30 */ + socRxReasonInvalid, /* Offset 31 */ + socRxReasonInvalid, /* Offset 32 */ + socRxReasonInvalid, /* Offset 33 */ + socRxReasonInvalid, /* Offset 34 */ + socRxReasonInvalid, /* Offset 35 */ + socRxReasonInvalid, /* Offset 36 */ + socRxReasonInvalid, /* Offset 37 */ + socRxReasonInvalid, /* Offset 38 */ + socRxReasonInvalid, /* Offset 39 */ + socRxReasonInvalid, /* Offset 40 */ + socRxReasonInvalid, /* Offset 41 */ + socRxReasonInvalid, /* Offset 42 */ + socRxReasonInvalid, /* Offset 43 */ + socRxReasonInvalid, /* Offset 44 */ + socRxReasonInvalid, /* Offset 45 */ + socRxReasonInvalid, /* Offset 46 */ + socRxReasonInvalid, /* Offset 47 */ + socRxReasonInvalid, /* Offset 48 */ + socRxReasonInvalid, /* Offset 49 */ + socRxReasonInvalid, /* Offset 50 */ + socRxReasonInvalid, /* Offset 51 */ + socRxReasonInvalid, /* Offset 52 */ + socRxReasonInvalid, /* Offset 53 */ + socRxReasonInvalid, /* Offset 54 */ + socRxReasonInvalid, /* Offset 55 */ + socRxReasonInvalid, /* Offset 56 */ + socRxReasonInvalid, /* Offset 57 */ + socRxReasonInvalid, /* Offset 58 */ + socRxReasonInvalid, /* Offset 59 */ + socRxReasonInvalid, /* Offset 60 */ + socRxReasonInvalid, /* Offset 61 */ + socRxReasonInvalid, /* Offset 62 */ + socRxReasonInvalid /* Offset 63 */ +}; + +static soc_rx_reason_t *dcb38_rx_reason_maps[] = { + dcb38_rx_reason_map, + dcb38_rx_reason_cpu_sflow_encoding_map, + dcb38_rx_reason_mpls_proc_err_encoding_map, + NULL +}; + +SETFUNCERR(38, tx_l2pbm, pbmp_t) +SETFUNCERR(38, tx_utpbm, pbmp_t) +SETFUNCERR(38, tx_l3pbm, pbmp_t) +SETFUNCERR(38, tx_crc, int) +SETFUNCERR(38, tx_cos, int) +SETFUNCERR(38, tx_destmod, uint32) +SETFUNCERR(38, tx_destport, uint32) +SETFUNCERR(38, tx_opcode, uint32) +SETFUNCERR(38, tx_srcmod, uint32) +SETFUNCERR(38, tx_srcport, uint32) +SETFUNCERR(38, tx_prio, uint32) +SETFUNCERR(38, tx_pfm, uint32) + +GETFUNCNULL(38, stat) +SETFUNCNULL2(38, stat) + +dcb_op_t dcb38_op = { + 38, + sizeof(dcb38_t), + dcb38_rx_reason_maps, + dcb0_rx_reason_map_get, + ep_to_cpu_hdr38_rx_reasons_get, + dcb38_init, + dcb38_add_tx, + dcb38_add_rx, + dcb38_intr_info, + dcb38_reqcount_set, + dcb38_reqcount_get, + dcb38_xfercount_get, + dcb38_addr_set, + dcb38_addr_get, + dcb38_paddr_get, + dcb38_done_set, + dcb38_done_get, + dcb38_sg_set, + dcb38_sg_get, + dcb38_chain_set, + dcb38_chain_get, + dcb38_reload_set, + dcb38_reload_get, + dcb38_desc_intr_set, + dcb38_desc_intr_get, + dcb38_tx_l2pbm_set, + dcb38_tx_utpbm_set, + dcb38_tx_l3pbm_set, + dcb38_tx_crc_set, + dcb38_tx_cos_set, + dcb38_tx_destmod_set, + dcb38_tx_destport_set, + dcb38_tx_opcode_set, + dcb38_tx_srcmod_set, + dcb38_tx_srcport_set, + dcb38_tx_prio_set, + dcb38_tx_pfm_set, + ep_to_cpu_hdr38_rx_untagged_get, + ep_to_cpu_hdr38_rx_crc_get, + ep_to_cpu_hdr38_rx_cos_get, + ep_to_cpu_hdr38_rx_destmod_get, + ep_to_cpu_hdr38_rx_destport_get, + ep_to_cpu_hdr38_rx_opcode_get, + ep_to_cpu_hdr38_rx_classtag_get, + ep_to_cpu_hdr38_rx_matchrule_get, + dcb38_rx_start_get, + dcb38_rx_end_get, + dcb38_rx_error_get, + ep_to_cpu_hdr38_rx_prio_get, + ep_to_cpu_hdr38_rx_reason_get, + ep_to_cpu_hdr38_rx_reason_hi_get, + ep_to_cpu_hdr38_rx_ingport_get, + ep_to_cpu_hdr38_rx_srcport_get, + ep_to_cpu_hdr38_rx_srcmod_get, + ep_to_cpu_hdr38_rx_mcast_get, + ep_to_cpu_hdr38_rx_vclabel_get, + ep_to_cpu_hdr38_rx_mirror_get, + ep_to_cpu_hdr38_rx_timestamp_get, + ep_to_cpu_hdr38_rx_timestamp_upper_get, + dcb38_hg_set, + dcb38_hg_get, + dcb38_stat_set, + dcb38_stat_get, + dcb38_purge_set, + dcb38_purge_get, + ep_to_cpu_hdr38_mhp_get, + ep_to_cpu_hdr38_outer_vid_get, + ep_to_cpu_hdr38_outer_pri_get, + ep_to_cpu_hdr38_outer_cfi_get, + ep_to_cpu_hdr38_rx_outer_tag_action_get, + ep_to_cpu_hdr38_inner_vid_get, + ep_to_cpu_hdr38_inner_pri_get, + ep_to_cpu_hdr38_inner_cfi_get, + ep_to_cpu_hdr38_rx_inner_tag_action_get, + ep_to_cpu_hdr38_rx_bpdu_get, + ep_to_cpu_hdr38_rx_l3_intf_get, + ep_to_cpu_hdr38_rx_decap_tunnel_get, + ep_to_cpu_hdr38_rx_switch_drop_get, + ep_to_cpu_hdr38_olp_encap_oam_pkt_get, + dcb38_read_ecc_error_get, + dcb38_desc_remaining_get, + dcb38_desc_remaining_set, + dcb38_desc_status_get, + dcb38_desc_status_set, + NULL, +}; +#endif /* BCM_TOMAHAWK3_SUPPORT */ + +#endif /* defined(BCM_ESW_SUPPORT) */ + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile new file mode 100644 index 000000000000..46e907c4ac57 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile @@ -0,0 +1,96 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.3 Broadcom SDK $ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +LOCALDIR = systems/linux/kernel/modules/genl-packet + +include ${SDK}/make/Make.config + +LIBS = + +CFLAGS += -I${SDK}/systems/linux/kernel/modules/include/kernel + +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := genl-packet +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +# BCM Network Device + +ifeq (1,$(NO_PRECOMPILED_MODULE)) +# { +# +# These are the objects which need to be compiled, in the kernel, to +# created the module object file. +# +SRCS_COMPOSING = genl-packet.c +OBJECTS_COMPOSING = genl-packet.o +# +# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/linux/kernel/modules/genl-packet/kernel_module' +# is not created and all action is done in systems/linux/kernel/modules/genl-packet +# + +build: $(KMODULE) + +$(KMODULE): $(SRCS_COMPOSING) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + rm -f $(BLDDIR)/*.c + rm -f $(BLDDIR)/*.o + rm -f $(BLDDIR)/*.ko + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/Makefile + cp ./*.c $(BLDDIR)/ + MOD_OBJS=$(OBJECTS_COMPOSING) MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR) $(THIS_MOD_NAME).ko LOC_BLDDIR=$(BLDDIR) LOC_SRCDIR=$(PWD) +# } +else +# { +build: $(MODULE) $(KMODULE) +# +# This is for the compilation of the 'precompiled' object. We keep it +# here for compatibility. +# +$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ + +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko +# } +endif + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. + +include ${SDK}/make/Make.depend + +clean:: + $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o + $(RM) $(BOBJS) $(MODULE) + +.PHONY: build + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/genl-packet.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/genl-packet.c new file mode 100644 index 000000000000..141edc6d7603 --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/genl-packet.c @@ -0,0 +1,118 @@ +/* + * net/genl-packet/genl-packet.c - Netlink channel for general packetIO + * Copyright (c) 2021 Google, based on psample.c (originally written by + * Yotam Gigi ) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include + +#define GENL_PACKET_MAX_PACKET_SIZE 0xffff + +/* multicast groups */ +enum genl_packet_multicast_groups { + GENL_PACKET_MCGRP_PACKET, +}; + +static const struct genl_multicast_group genl_packet_mcgrps[] = { + [GENL_PACKET_MCGRP_PACKET] = { .name = GENL_PACKET_MCGRP_NAME }, +}; + +static struct genl_family genl_packet_family = { + .name = GENL_PACKET_NAME, + .version = GENL_PACKET_VERSION, + .maxattr = GENL_PACKET_ATTR_MAX, + .netnsok = true, + .module = THIS_MODULE, + .mcgrps = genl_packet_mcgrps, + .n_mcgrps = ARRAY_SIZE(genl_packet_mcgrps), +}; + +void genl_packet_send_packet(struct net *net, struct sk_buff *skb, + int in_ifindex, int out_ifindex, unsigned int context) +{ + struct sk_buff *nl_skb; + int data_len; + int meta_len; + void *data; + int ret; + + /* Metalength is sum of netlink message sizes of in_ifindex + out_ifindex + + * context */ + meta_len = nla_total_size(sizeof(s16)) + + nla_total_size(sizeof(s16)) + + nla_total_size(sizeof(u32)); + + data_len = skb->len; + if (meta_len + nla_total_size(data_len) > GENL_PACKET_MAX_PACKET_SIZE) + data_len = GENL_PACKET_MAX_PACKET_SIZE - meta_len - NLA_HDRLEN + - NLA_ALIGNTO; + if (data_len <= 0) + return; + + nl_skb = genlmsg_new(meta_len + nla_total_size(data_len), GFP_ATOMIC); + if (unlikely(!nl_skb)) + return; + + data = genlmsg_put(nl_skb, 0, 0, &genl_packet_family, 0, + GENL_PACKET_CMD_PACKET); + if (unlikely(!data)) + goto error; + + ret = nla_put_s16(nl_skb, GENL_PACKET_ATTR_IIFINDEX, in_ifindex); + if (unlikely(ret < 0)) + goto error; + + ret = nla_put_s16(nl_skb, GENL_PACKET_ATTR_OIFINDEX, out_ifindex); + if (unlikely(ret < 0)) + goto error; + + ret = nla_put_u32(nl_skb, GENL_PACKET_ATTR_CONTEXT, context); + if (unlikely(ret < 0)) + goto error; + + if (data_len > 0) { + int nla_len = nla_total_size(data_len); + struct nlattr *nla; + + nla = (struct nlattr *)skb_put(nl_skb, nla_len); + nla->nla_type = GENL_PACKET_ATTR_DATA; + nla->nla_len = nla_attr_size(data_len); + + if (skb_copy_bits(skb, 0, nla_data(nla), data_len)) + goto error; + } + + genlmsg_end(nl_skb, data); + genlmsg_multicast_netns(&genl_packet_family, net, nl_skb, 0, + GENL_PACKET_MCGRP_PACKET, GFP_ATOMIC); + + return; +error: + pr_err_ratelimited("Could not create genl_packet message\n"); + nlmsg_free(nl_skb); +} +EXPORT_SYMBOL_GPL(genl_packet_send_packet); + +static int __init genl_packet_module_init(void) +{ + return genl_register_family(&genl_packet_family); +} + +static void __exit genl_packet_module_exit(void) +{ + genl_unregister_family(&genl_packet_family); +} + +module_init(genl_packet_module_init); +module_exit(genl_packet_module_exit); + +MODULE_AUTHOR("Google"); +MODULE_DESCRIPTION("netlink channel for genl_packet"); +MODULE_LICENSE("GPL v2"); diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h index 003495364853..849470d8c5f7 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: bcm-knet.h,v 1.4 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: bcm-knet.h,v 1.4 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * */ #ifndef __LINUX_BCM_KNET_H__ #define __LINUX_BCM_KNET_H__ @@ -50,8 +47,6 @@ typedef struct { * Call-back interfaces for other Linux kernel drivers. */ #include -#include -#include typedef struct { uint32 netif_user_data; @@ -67,6 +62,9 @@ typedef struct { typedef struct sk_buff * (*knet_skb_cb_f)(struct sk_buff *skb, int dev_no, void *meta); +typedef int +(*knet_netif_cb_f)(struct net_device *dev, int dev_no, kcom_netif_t *netif); + typedef int (*knet_filter_cb_f)(uint8_t *pkt, int size, int dev_no, void *meta, int chan, kcom_filter_t *filter); @@ -92,6 +90,9 @@ typedef int typedef int (*knet_hw_tstamp_ioctl_cmd_cb_f)(kcom_msg_clock_cmd_t *kmsg, int len, int dcb_type); +typedef int +(*knet_hw_tstamp_ptp_transport_get_cb_f)(uint8_t *pkt); + extern int bkn_rx_skb_cb_register(knet_skb_cb_f rx_cb); @@ -104,9 +105,24 @@ bkn_tx_skb_cb_register(knet_skb_cb_f tx_cb); extern int bkn_tx_skb_cb_unregister(knet_skb_cb_f tx_cb); +extern int +bkn_netif_create_cb_register(knet_netif_cb_f netif_cb); + +extern int +bkn_netif_create_cb_unregister(knet_netif_cb_f netif_cb); + +extern int +bkn_netif_destroy_cb_register(knet_netif_cb_f netif_cb); + +extern int +bkn_netif_destroy_cb_unregister(knet_netif_cb_f netif_cb); + extern int bkn_filter_cb_register(knet_filter_cb_f filter_cb); +extern int +bkn_filter_cb_register_by_name(knet_filter_cb_f filter_cb, char *filter_name); + extern int bkn_filter_cb_unregister(knet_filter_cb_f filter_cb); @@ -157,31 +173,16 @@ bkn_hw_tstamp_ioctl_cmd_cb_register(knet_hw_tstamp_ioctl_cmd_cb_f hw_tstamp_ioct extern int bkn_hw_tstamp_ioctl_cmd_cb_unregister(knet_hw_tstamp_ioctl_cmd_cb_f hw_tstamp_ioctl_cmd_cb); -typedef struct { - uint8 cmic_type; - uint8 dcb_type; - uint8 dcb_size; - uint8 pkt_hdr_size; - uint32 cdma_channels; -} knet_hw_info_t; - -extern int -bkn_hw_info_get(int unit, knet_hw_info_t *hw_info); - -typedef int -(*knet_netif_cb_f)(int unit, kcom_netif_t *netif, struct net_device *dev); extern int -bkn_netif_create_cb_register(knet_netif_cb_f netif_cb); +bkn_hw_tstamp_ptp_transport_get_cb_register(knet_hw_tstamp_ptp_transport_get_cb_f hw_tstamp_ptp_transport_get_cb); extern int -bkn_netif_create_cb_unregister(knet_netif_cb_f netif_cb); +bkn_hw_tstamp_ptp_transport_get_cb_unregister(knet_hw_tstamp_ptp_transport_get_cb_f hw_tstamp_ptp_transport_get_cb); extern int -bkn_netif_destroy_cb_register(knet_netif_cb_f netif_cb); +bkn_hw_device_get(int dev_no, uint16_t *dev_id, uint8_t *rev_id); -extern int -bkn_netif_destroy_cb_unregister(knet_netif_cb_f netif_cb); #endif #endif /* __LINUX_BCM_KNET_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h index a9db097f3062..66fd0211edf3 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: gmodule.h,v 1.9 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: gmodule.h,v 1.9 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * */ #ifndef __COMMON_LINUX_KRN_GMODULE_H__ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/README b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/README new file mode 100644 index 000000000000..95678d22b7dc --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/README @@ -0,0 +1,8 @@ +This directory is mainly for the header files which are planned +for upstreaming to the mainline kernels. +The header files can be placed in the simulated kernel include path +created in this directory. + +The directory (include/kernel) can be added to the include path (-I) +when compiling the associated source files such that the standard Linux path +can be used in the source files. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/net/genl-packet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/net/genl-packet.h new file mode 100644 index 000000000000..48db3895db3e --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/net/genl-packet.h @@ -0,0 +1,9 @@ +#ifndef __NET_GENL_PACKET_H +#define __NET_GENL_PACKET_H + +#include + +extern void genl_packet_send_packet(struct net *net, struct sk_buff *skb, + int in_ifindex, int out_ifindex, unsigned int context); + +#endif /* __NET_GENL_PACKET_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/uapi/linux/genl-packet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/uapi/linux/genl-packet.h new file mode 100644 index 000000000000..9945118a4e4f --- /dev/null +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/uapi/linux/genl-packet.h @@ -0,0 +1,25 @@ +#ifndef __UAPI_GENL_PACKET_H +#define __UAPI_GENL_PACKET_H + +enum { + /* packet metadata */ + GENL_PACKET_ATTR_IIFINDEX, + GENL_PACKET_ATTR_OIFINDEX, + GENL_PACKET_ATTR_CONTEXT, + GENL_PACKET_ATTR_DATA, + + __GENL_PACKET_ATTR_MAX +}; + +enum genl_packet_command { + GENL_PACKET_CMD_PACKET, +}; + +/* Can be overridden at runtime by module option */ +#define GENL_PACKET_ATTR_MAX (__GENL_PACKET_ATTR_MAX - 1) + +#define GENL_PACKET_MCGRP_NAME "packets" +#define GENL_PACKET_NAME "genl_packet" +#define GENL_PACKET_VERSION 1 + +#endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h index 7a749a40a9dd..cf117eb65872 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: lkm.h,v 1.22 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: lkm.h,v 1.22 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * */ #ifndef __COMMON_LINUX_KRN_LKM_H__ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile index 79223a372d47..c8d629ac1d47 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile @@ -1,33 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.3 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # LOCALDIR = systems/linux/kernel/modules/knet-cb @@ -35,6 +32,18 @@ include ${SDK}/make/Make.config LIBS = $(LIBDIR)/libkern.a +ifeq (1,$(BUILD_DCBLIB)) +ifndef DCBDIR +DCBDIR = $(SDK)/systems/linux/kernel/modules/dcb +# $(error 'The $$DCBDIR variable is not set') +endif +ifeq (1,$(NO_PRECOMPILED_MODULE)) +$(error 'DCB_LIB build is not supported if NO_PRECOMPILED_MODULE=1') +endif +LIBS += $(LIBDIR)/libdcb.a +CFLAGS += -DDCBLIB_SUPPORT -I$(DCBDIR)/include +endif + KERNEL_MODULE_DIR = kernel_module THIS_MOD_NAME := linux-knet-cb @@ -85,6 +94,11 @@ build: $(MODULE) $(KMODULE) # This is for the compilation of the 'precompiled' object. We keep it # here for compatibility. # +$(LIBDIR)/libdcb.a: + $(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) \ + KADD_CFLAGS="-I${SDK}/systems/linux/kernel/modules/include $(KFLAGS) -D$(ENDIAN)" \ + CROSS_COMPILE=$(CROSS_COMPILE) + $(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ @@ -104,5 +118,8 @@ include ${SDK}/make/Make.depend clean:: $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o $(RM) $(BOBJS) $(MODULE) +ifeq (1,$(BUILD_DCBLIB)) + $(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) clean +endif .PHONY: build diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c index 89428e072f6e..4aebc6a0df2e 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c @@ -45,11 +45,6 @@ #include #include -/* Enable sflow sampling using psample */ -#ifdef PSAMPLE_SUPPORT -#include "psample-cb.h" -#endif - MODULE_AUTHOR("Broadcom Corporation"); MODULE_DESCRIPTION("Broadcom Linux KNET Call-Back Driver"); MODULE_LICENSE("GPL"); @@ -343,7 +338,8 @@ knet_filter_cb(uint8_t * pkt, int size, int dev_no, void *meta, } static int -knet_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev) +/*knet_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev)*/ +knet_netif_create_cb(struct net_device *dev, int unit, kcom_netif_t *netif) { int retv = 0; #ifdef PSAMPLE_SUPPORT @@ -353,7 +349,8 @@ knet_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev) } static int -knet_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev) +/*knet_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev)*/ +knet_netif_destroy_cb(struct net_device *dev, int unit, kcom_netif_t *netif) { int retv = 0; #ifdef PSAMPLE_SUPPORT @@ -361,41 +358,7 @@ knet_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev) #endif return retv; } -#else -static int -knet_filter_cb(uint8_t * pkt, int size, int dev_no, void *meta, - int chan, kcom_filter_t *kf) -{ - /* check for filter callback handler */ -#ifdef PSAMPLE_SUPPORT - if (strncmp(kf->desc, PSAMPLE_CB_NAME, KCOM_FILTER_DESC_MAX) == 0) { - return psample_filter_cb (pkt, size, dev_no, meta, chan, kf); - } -#endif - return strip_tag_filter_cb (pkt, size, dev_no, meta, chan, kf); -} - -static int -knet_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev) -{ - int retv = 0; -#ifdef PSAMPLE_SUPPORT - retv = psample_netif_create_cb(unit, netif, dev); #endif - return retv; -} - -static int -knet_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev) -{ - int retv = 0; -#ifdef PSAMPLE_SUPPORT - retv = psample_netif_destroy_cb(unit, netif, dev); -#endif - return retv; -} -#endif - /* * Get statistics. * % cat /proc/linux-knet-cb @@ -423,13 +386,6 @@ _cleanup(void) bkn_tx_skb_cb_unregister(strip_tag_tx_cb); } - bkn_filter_cb_unregister(knet_filter_cb); - bkn_netif_create_cb_unregister(knet_netif_create_cb); - bkn_netif_destroy_cb_unregister(knet_netif_destroy_cb); - -#ifdef PSAMPLE_SUPPORT - psample_cleanup(); -#endif return 0; } @@ -445,13 +401,6 @@ _init(void) bkn_tx_skb_cb_register(strip_tag_tx_cb); } -#ifdef PSAMPLE_SUPPORT - psample_init(); -#endif - bkn_filter_cb_register(knet_filter_cb); - bkn_netif_create_cb_register(knet_netif_create_cb); - bkn_netif_destroy_cb_register(knet_netif_destroy_cb); - return 0; } diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.h deleted file mode 100644 index 40408819ef74..000000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Copyright 2017 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - */ -/* - * $Id: psample_cb.h $ - * $Copyright: (c) 2019 Broadcom Corp. - * All Rights Reserved.$ - */ -#ifndef __PSAMPLE_CB_H__ -#define __PSAMPLE_CB_H__ - -#include -#include -#include - -#define PSAMPLE_CB_NAME "psample" - -extern int -psample_init(void); - -extern int -psample_cleanup(void); - -extern int -psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta, - int chan, kcom_filter_t *kf); - -/* psample data per interface */ -typedef struct { - struct list_head list; - struct net_device *dev; - uint16 id; - uint16 port; - uint16 vlan; - uint16 qnum; - uint32 sample_rate; - uint32 sample_size; -} psample_netif_t; - -extern int -psample_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev); - -extern int -psample_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev); - -#endif /* __PSAMPLE_CB_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile index 966f639f6983..b5106a586be9 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile @@ -1,33 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.2 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # LOCALDIR = systems/linux/kernel/modules/shared diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c index fd43ee5bd726..db80d3d3afb7 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: gmodule.c,v 1.20 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: gmodule.c,v 1.20 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * * * Generic Linux Module Framework * diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c index 089d47c8c0ad..683928cde1a1 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c +++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c @@ -1,5 +1,6 @@ /* - * Copyright 2007-2020 Broadcom Inc. All rights reserved. + * $Id: ksal.c,v 1.1 Broadcom SDK $ + * $Copyright: 2007-2023 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -22,12 +23,8 @@ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license * * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa - */ -/* - * $Id: ksal.c,v 1.1 Broadcom SDK $ - * $Copyright: (c) 2005 Broadcom Corp. - * All Rights Reserved.$ + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * */ #include @@ -45,6 +42,13 @@ #include #endif #include +/* Check if system has ktime_get_ts64() */ +#ifndef LINUX_HAS_MONOTONIC_TIME +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,17,0) +#include +#define LINUX_HAS_MONOTONIC_TIME +#endif +#endif #if defined(MAX_USER_RT_PRIO) || defined(MAX_RT_PRIO) /* Assume 2.6 scheduler */ @@ -191,21 +195,15 @@ sal_sem_give(sal_sem_t b) uint32 sal_time_usecs(void) { -#if !defined(SAI_FIXUP) - struct timeval ltv; - do_gettimeofday(<v); - return (ltv.tv_sec * SECOND_USEC + ltv.tv_usec); -#else -#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,0) - /* ktime_to_us and ktime_get_real_ns return 64-bit integets, but this */ - /* function is returning a 32-bit integer. This should be fine until 2038. */ - return ktime_to_us(ktime_get_real_ns()); +#ifdef LINUX_HAS_MONOTONIC_TIME + struct timespec64 ts; + ktime_get_ts64(&ts); + return (ts.tv_sec * SECOND_USEC + ts.tv_nsec / 1000); #else struct timeval ltv; do_gettimeofday(<v); return (ltv.tv_sec * SECOND_USEC + ltv.tv_usec); #endif -#endif } void diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile index fe1b6fd08cea..333ddc27ac0d 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile @@ -1,33 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.4 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # SDK :=$(shell if [ -n "$$SDK" ] ; then\ @@ -49,7 +46,6 @@ $(error Please run this in a tree) endif export SDK - override-target=linux-$(platform) ifeq ($(LINUX_MAKE_SHARED_LIB),1) @@ -94,17 +90,26 @@ ifeq ($(DEST_DIR),) DEST_DIR=${BLDDIR} endif -KERNEL_BDE_LOCAL :=linux-kernel-bde.$(KOBJ) -KERNEL_BDE :=$(DEST_DIR)/$(KERNEL_BDE_LOCAL) +KERNEL_BDE_LOCAL := linux-kernel-bde.$(KOBJ) +KERNEL_BDE := $(DEST_DIR)/$(KERNEL_BDE_LOCAL) -USER_BDE_LOCAL :=linux-user-bde.$(KOBJ) -USER_BDE=$(DEST_DIR)/$(USER_BDE_LOCAL) +USER_BDE_LOCAL := linux-user-bde.$(KOBJ) +USER_BDE := $(DEST_DIR)/$(USER_BDE_LOCAL) KNET_CB_LOCAL := linux-knet-cb.$(KOBJ) KNET_CB := $(DEST_DIR)/$(KNET_CB_LOCAL) -BCM_KNET_LOCAL :=linux-bcm-knet.$(KOBJ) -BCM_KNET=$(DEST_DIR)/$(BCM_KNET_LOCAL) +GENL_PACKET_LOCAL := genl-packet.$(KOBJ) +GENL_PACKET := $(DEST_DIR)/$(GENL_PACKET_LOCAL) +ifndef BUILD_GENL_PACKET +export BUILD_GENL_PACKET = 0 +endif + +BCM_GENL_LOCAL := linux-bcm-genl.$(KOBJ) +BCM_GENL := $(DEST_DIR)/$(BCM_GENL_LOCAL) + +BCM_KNET_LOCAL := linux-bcm-knet.$(KOBJ) +BCM_KNET := $(DEST_DIR)/$(BCM_KNET_LOCAL) ifeq (,$(findstring DELIVER,$(MAKECMDGOALS))) .DEFAULT_GOAL := all @@ -126,6 +131,7 @@ endif ifeq ($(BUILD_KNET),1) # Kernel network support all_targets += $(BCM_KNET) +knet_subdirs = bcm-knet ifeq ($(NO_LOCAL_TARGETS),) LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(BCM_KNET_LOCAL)) @@ -134,6 +140,7 @@ endif ifdef BUILD_KNET_CB all_targets += $(KNET_CB) +knet_subdirs += knet-cb ifeq ($(NO_LOCAL_TARGETS),) LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(KNET_CB_LOCAL)) @@ -141,6 +148,26 @@ all_targets +=$(LOCAL_TARGETS) endif endif +export BUILD_BCM_GENL=1 +ifeq ($(BUILD_BCM_GENL),1) +ifeq ($(BUILD_GENL_PACKET),1) +all_targets += $(GENL_PACKET) +knet_subdirs += genl-packet + +ifeq ($(NO_LOCAL_TARGETS),) +LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(GENL_PACKET_LOCAL)) +all_targets +=$(LOCAL_TARGETS) +endif +endif +all_targets += $(BCM_GENL) +knet_subdirs += bcm-genl + +ifeq ($(NO_LOCAL_TARGETS),) +LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(BCM_GENL_LOCAL)) +all_targets +=$(LOCAL_TARGETS) +endif +endif + ifdef BUILD_PSAMPLE ADD_TO_CFLAGS += -DPSAMPLE_SUPPORT endif @@ -161,9 +188,6 @@ endif # User BDE libraries ADD_TO_CFLAGS += -I$(SDK)/systems/bde/linux/include -# Use raw IOCTL for KNET -ADD_TO_CFLAGS += -DPROXY_SUPPORT=0 - CFLAGS += $(ADD_TO_CFLAGS) #SAI_FIXUP @@ -173,27 +197,46 @@ kernel_modules: $(MAKE) -C $(SDK)/systems/bde/linux/kernel kernel_version=$(kernel_version) $(MAKE) -C $(SDK)/systems/bde/linux/user/kernel kernel_version=$(kernel_version) ifeq ($(BUILD_KNET),1) - $(MAKE) -C $(SDK)/systems/linux/kernel/modules kernel_version=$(kernel_version) \ - subdirs="shared bcm-knet" override-target=linux-$(platform) CFLAGS="$(CFLAGS)" -ifdef BUILD_KNET_CB - $(MAKE) -C $(SDK)/systems/linux/kernel/modules kernel_version=$(kernel_version) \ - subdirs="knet-cb" override-target=linux-$(platform) CFLAGS="$(CFLAGS)" + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared kernel_version=$(kernel_version) \ + override-target=linux-$(platform) + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-knet kernel_version=$(kernel_version) \ + override-target=linux-$(platform) +ifneq (,$(filter knet-cb,$(knet_subdirs))) + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/knet-cb kernel_version=$(kernel_version) \ + override-target=linux-$(platform) +endif +ifneq (,$(filter bcm-genl,$(knet_subdirs))) +ifneq (,$(filter genl-packet,$(knet_subdirs))) + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/genl-packet kernel_version=$(kernel_version) \ + override-target=linux-$(platform) +endif + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-genl kernel_version=$(kernel_version) \ + override-target=linux-$(platform) endif endif -$(KERNEL_BDE): $(KERN_BLDROOT)/linux-kernel-bde.$(KOBJ) +$(KERNEL_BDE): $(KERN_BLDROOT)/$(KERNEL_BDE_LOCAL) mkdir -p $(@D) $(OBJCOPY) --strip-debug $< $@ -$(USER_BDE): $(KERN_BLDROOT)/linux-user-bde.$(KOBJ) +$(USER_BDE): $(KERN_BLDROOT)/$(USER_BDE_LOCAL) + $(OBJCOPY) --strip-debug $< $@ + +$(BCM_KNET): $(KERN_BLDROOT)/$(BCM_KNET_LOCAL) $(OBJCOPY) --strip-debug $< $@ -$(BCM_KNET): $(KERN_BLDROOT)/linux-bcm-knet.$(KOBJ) +$(KNET_CB): $(KERN_BLDROOT)/$(KNET_CB_LOCAL) $(OBJCOPY) --strip-debug $< $@ -$(KNET_CB): $(KERN_BLDROOT)/linux-knet-cb.$(KOBJ) +$(GENL_PACKET): $(KERN_BLDROOT)/$(GENL_PACKET_LOCAL) $(OBJCOPY) --strip-debug $< $@ +$(BCM_GENL): $(KERN_BLDROOT)/$(BCM_GENL_LOCAL) + $(OBJCOPY) --strip-debug $< $@ + +$(KERN_BLDROOT)/%.$(KOBJ): kernel_modules + @echo Force execution of kernel_modules target > /dev/null + ifeq ($(NO_LOCAL_TARGETS),) $(foreach targ,$(LOCAL_TARGETS),$(eval $(call LOCAL_TARGET_DEF,$(targ)))) endif @@ -202,14 +245,16 @@ clean:: $(MAKE) -C $(SDK)/systems/bde/linux/kernel $@ $(MAKE) -C $(SDK)/systems/bde/linux/user/kernel $@ $(MAKE) -C $(SDK)/systems/linux/kernel/modules \ - subdirs="shared bcm-knet knet-cb" \ + subdirs="shared $(knet_subdirs)" \ override-target=linux-$(platform) $@ $(RM) $(KERNEL_BDE) $(USER_BDE) - $(RM) $(BCM_KNET) $(KNET_CB) - $(RM) $(KERN_BLDROOT)/linux-kernel-bde.$(KOBJ) - $(RM) $(KERN_BLDROOT)/linux-user-bde.$(KOBJ) - $(RM) $(KERN_BLDROOT)/linux-bcm-knet.$(KOBJ) - $(RM) $(KERN_BLDROOT)/linux-knet-cb.$(KOBJ) + $(RM) $(BCM_KNET) $(KNET_CB) $(GENL_PACKET) $(BCM_GENL) + $(RM) $(KERN_BLDROOT)/$(KERNEL_BDE_LOCAL) + $(RM) $(KERN_BLDROOT)/$(USER_BDE_LOCAL) + $(RM) $(KERN_BLDROOT)/$(BCM_KNET_LOCAL) + $(RM) $(KERN_BLDROOT)/$(KNET_CB_LOCAL) + $(RM) $(KERN_BLDROOT)/$(GENL_PACKET_LOCAL) + $(RM) $(KERN_BLDROOT)/$(BCM_GENL_LOCAL) $(RM) $(LOCAL_TARGETS) distclean:: clean diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile index 921ce62ebaf0..8b75c6e43742 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile @@ -1,33 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 0.1 Broadcom SDK $ -# $Copyright: (c) 2015 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # # This make job requires the following environment variables to be set: diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile index b874340ddec2..0f4a40a16aaa 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile @@ -1,33 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.7 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # # This make job requires the following environment variables to be set: diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile index 2b724be3202f..195345051c34 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile @@ -1,33 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.7 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # # This make job requires the following environment variables to be set: diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile index 7f2c7bc6e247..cc5a6455603d 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile @@ -1,33 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.7 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # # This make job requires the following environment variables to be set: @@ -55,7 +52,7 @@ endif export SDK -override kernel_version=5_4 +override kernel_version=5_10 platform=iproc IPROC_BUILD=1 diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile index 3f0a819d86f0..163dd916c7c4 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile @@ -1,33 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.7 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # # This make job requires the following environment variables to be set: @@ -55,7 +52,7 @@ endif export SDK -override kernel_version=5_4 +override kernel_version=5_10 platform=iproc_64 IPROC_BUILD=1 diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile index 6ef360156572..ac8c81722ba7 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile @@ -1,33 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 0.1 Broadcom SDK $ -# $Copyright: (c) 2015 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # # This make job requires the following environment variables to be set: diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile index 78c2c0cb1702..e952ca23591e 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile @@ -1,33 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 1.2 Broadcom SDK $ -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# SDK :=$(shell if [ -n "$$SDK" ] ; then\ echo $$SDK;\ diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile index a5b0dadf8e6e..c5b2b6205f28 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile +++ b/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile @@ -1,33 +1,30 @@ -# -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# # -*- Makefile -*- # $Id: Makefile,v 0.1 Broadcom SDK $ -# $Copyright: (c) 2015 Broadcom Corp. -# All Rights Reserved.$ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# # # This make job requires the following environment variables to be set: diff --git a/platform/broadcom/saibcm-modules/tools/mktool.pl b/platform/broadcom/saibcm-modules/tools/mktool.pl index 518ab25535c3..75e411e8c819 100644 --- a/platform/broadcom/saibcm-modules/tools/mktool.pl +++ b/platform/broadcom/saibcm-modules/tools/mktool.pl @@ -1,36 +1,33 @@ # -# Copyright 2007-2020 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa -# -# # mktool.pl # # $Id: mktool.pl,v 1.5 Broadcom SDK $ # -# $Copyright: (c) 2005 Broadcom Corp. -# All Rights Reserved. $ +# $Copyright: 2007-2023 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# use File::Path; use File::Find; diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control b/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control index c02a84f9f75a..5ead58f70dda 100644 --- a/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control +++ b/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control @@ -7,20 +7,20 @@ Standards-Version: 3.9.3 Package: sonic-platform-alphanetworks-snh60a0-320fv2 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: sonic-platform-alphanetworks-snh60b0-640f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: sonic-platform-alphanetworks-snj60d0-320f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: sonic-platform-alphanetworks-bes2348t Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista index af03fbd9f672..522eb5cca9de 160000 --- a/platform/broadcom/sonic-platform-modules-arista +++ b/platform/broadcom/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit af03fbd9f67260ba764c833aaaa65b2ff07762d7 +Subproject commit 522eb5cca9de7ddd6b96c5a361913855ad5d8e34 diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/control b/platform/broadcom/sonic-platform-modules-cel/debian/control index 0dd6eb76e00e..f2b3b4ee32cc 100644 --- a/platform/broadcom/sonic-platform-modules-cel/debian/control +++ b/platform/broadcom/sonic-platform-modules-cel/debian/control @@ -7,26 +7,26 @@ Standards-Version: 3.9.3 Package: platform-modules-dx010 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-haliburton Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-seastone2 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as led, sfp Package: platform-modules-silverstone Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as led, sfp. Package: platform-modules-belgite Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as led, sfp diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/control b/platform/broadcom/sonic-platform-modules-dell/debian/control index ad88ade6833a..d9ae20c997fe 100644 --- a/platform/broadcom/sonic-platform-modules-dell/debian/control +++ b/platform/broadcom/sonic-platform-modules-dell/debian/control @@ -7,70 +7,70 @@ Standards-Version: 3.9.3 Package: platform-modules-s6000 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-z9100 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-s6100 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-z9264f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-s5212f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-s5224f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-s5232f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-s5248f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-n3248te Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-z9332f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-z9432f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-n3248pxe Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-e3224f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-s5296f Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/broadcom/sonic-platform-modules-dell/n3248te/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-dell/n3248te/sonic_platform/component.py index c69d5ef34ea0..800f895d0fb0 100644 --- a/platform/broadcom/sonic-platform-modules-dell/n3248te/sonic_platform/component.py +++ b/platform/broadcom/sonic-platform-modules-dell/n3248te/sonic_platform/component.py @@ -16,7 +16,7 @@ except ImportError as e: raise ImportError(str(e) + "- required module not found") def get_bios_version(): - return subprocess.check_output(['dmidecode', '-s', 'system-version']).strip().decode() + return subprocess.check_output(['cat', '/sys/class/dmi/id/bios_version']).strip().decode() def get_cpld_version(cpld): mjr_ver_path = '/sys/devices/platform/dell-n3248te-cpld.0/' + cpld + '_mjr_ver' diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/track_reboot_reason.sh b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/track_reboot_reason.sh index 5dbb3e4c9e90..d6b768ff783e 100755 --- a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/track_reboot_reason.sh +++ b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/track_reboot_reason.sh @@ -5,7 +5,6 @@ reboot_file_found=false smf_dir_missing=0 nvram_missing=0 -REBOOT_CAUSE_FILE=/host/reboot-cause/reboot-cause.txt REBOOT_REASON_FILE=/host/reboot-cause/platform/reboot_reason BIOS_VERSION_FILE=/host/reboot-cause/platform/bios_minor_version SMF_MSS_VERSION_FILE=/sys/devices/platform/SMF.512/hwmon/*/smf_firmware_ver @@ -134,20 +133,6 @@ _is_watchdog_reset(){ return } -_is_unknown_reset(){ - if [[ -f $REBOOT_CAUSE_FILE ]]; then - if [[ $1 = 0 ]]; then - echo "Unknown software reboot" > $REBOOT_CAUSE_FILE - return - fi - curr_poweron_reason=$(cat $SMF_POWERON_REASON) - curr_reset_reason=$SMF_RESET - mb_poweron_reason=$(cat $MAILBOX_POWERON_REASON) - echo "Unknown POR: $curr_poweron_reason RST: $curr_reset_reason MBR: $mb_poweron_reason" > $REBOOT_CAUSE_FILE - fi - -} - _is_software_reboot(){ SMF_STATUS=`io_rd_wr.py --set --val 06 --offset 210; io_rd_wr.py --set --val 0B --offset 211; io_rd_wr.py --get --offset 212` SMF_STATUS=$(echo "$SMF_STATUS" | awk '{print $NF}') @@ -206,7 +191,6 @@ update_mailbox_register(){ elif [[ $SMF_RESET = "33" ]]; then echo 0xdd > $MAILBOX_POWERON_REASON else - echo "Unknown software reboot" > $REBOOT_CAUSE_FILE echo 0x99 > $MAILBOX_POWERON_REASON fi @@ -227,7 +211,6 @@ update_mailbox_register(){ elif [[ $reason = "cc" ]]; then _is_software_reboot else - _is_unknown_reset $is_thermal_reboot echo 0x99 > $MAILBOX_POWERON_REASON fi fi diff --git a/platform/broadcom/sonic-platform-modules-nokia b/platform/broadcom/sonic-platform-modules-nokia index 87915b72714d..a04cc6b2291a 160000 --- a/platform/broadcom/sonic-platform-modules-nokia +++ b/platform/broadcom/sonic-platform-modules-nokia @@ -1 +1 @@ -Subproject commit 87915b72714d4f76f3ff1359fea730385235954b +Subproject commit a04cc6b2291ad23ae26ad45dfcaed2715dde05b3 diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog b/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog index 029c0374df67..f6a51fb47237 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog @@ -1,3 +1,10 @@ +sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low + + * Add support for S9301-32D + * Add support for S9301-32DB + + -- ufispace Mon, 06 May 2024 17:54:25 +0800 + sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low * Add support for S6301-56ST diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/control b/platform/broadcom/sonic-platform-modules-ufispace/debian/control index 798179f6e394..2c39dd2f4850 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/debian/control +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/control @@ -6,9 +6,17 @@ Build-Depends: debhelper (>= 9), bzip2 Standards-Version: 1.0.0 Package: sonic-platform-ufispace-s9300-32d -Architecture: amd64 +Architecture: amd64 Description: This package contains s9300-32d platform driver utility for SONiC project. +Package: sonic-platform-ufispace-s9301-32d +Architecture: amd64 +Description: This package contains s9301-32d platform driver utility for SONiC project. + +Package: sonic-platform-ufispace-s9301-32db +Architecture: amd64 +Description: This package contains s9301-32db platform driver utility for SONiC project. + Package: sonic-platform-ufispace-s9110-32x Architecture: amd64 Description: This package contains s9110-32x platform driver utility for SONiC project. @@ -23,4 +31,4 @@ Description: This package contains s7801-54xs platform driver utility for SONiC Package: sonic-platform-ufispace-s6301-56st Architecture: amd64 -Description: This package contains s6301-56st platform driver utility for SONiC project. \ No newline at end of file +Description: This package contains s6301-56st platform driver utility for SONiC project. diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/rules b/platform/broadcom/sonic-platform-modules-ufispace/debian/rules index d36b48dbc53c..092bbb5bbc89 100755 --- a/platform/broadcom/sonic-platform-modules-ufispace/debian/rules +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/rules @@ -19,7 +19,9 @@ PACKAGE_PRE_NAME := sonic-platform-ufispace KVERSION ?= $(shell uname -r) KERNEL_SRC := /lib/modules/$(KVERSION) MOD_SRC_DIR:= $(shell pwd) -MODULE_DIRS:= s9300-32d +MODULE_DIRS := s9300-32d +MODULE_DIRS += s9301-32d +MODULE_DIRS += s9301-32db MODULE_DIRS += s9110-32x MODULE_DIRS += s8901-54xc MODULE_DIRS += s7801-54xs diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9300-32d.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9300-32d.prerm new file mode 100644 index 000000000000..f9fe8c017ab0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9300-32d.prerm @@ -0,0 +1,2 @@ +systemctl stop pddf-platform-init.service +systemctl disable pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.install new file mode 100644 index 000000000000..fa71db5eccfd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.install @@ -0,0 +1 @@ +s9301-32d/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s9301_32d-r0/pddf diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.postinst new file mode 100644 index 000000000000..01666039ca26 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.prerm new file mode 100644 index 000000000000..f9fe8c017ab0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.prerm @@ -0,0 +1,2 @@ +systemctl stop pddf-platform-init.service +systemctl disable pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.install new file mode 100644 index 000000000000..64349db9aab6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.install @@ -0,0 +1 @@ +s9301-32db/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s9301_32db-r0/pddf diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.postinst new file mode 100644 index 000000000000..01666039ca26 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.prerm new file mode 100644 index 000000000000..f9fe8c017ab0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.prerm @@ -0,0 +1,2 @@ +systemctl stop pddf-platform-init.service +systemctl disable pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/Makefile index 7c2273d0063b..e27865a9be3d 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/Makefile +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/Makefile @@ -1,5 +1,5 @@ -MODULE_NAME = x86-64-ufispace-s6301-56st-sys-eeprom.o x86-64-ufispace-s6301-56st-lpc.o +MODULE_NAME = x86-64-ufispace-s6301-56st-sys-eeprom.o x86-64-ufispace-s6301-56st-lpc.o pddf_custom_psu.o obj-m := $(MODULE_NAME) CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/pddf_custom_psu.c b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/pddf_custom_psu.c new file mode 100644 index 000000000000..b71f0b90b0cf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/pddf_custom_psu.c @@ -0,0 +1,124 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_psu_defs.h" + +#define PSU_REG_VOUT_MODE 0x20 +#define PSU_REG_READ_VOUT 0x8b + +ssize_t pddf_show_custom_psu_v_out(struct device *dev, struct device_attribute *da, char *buf); +extern PSU_SYSFS_ATTR_DATA access_psu_v_out; + +static int two_complement_to_int(u16 data, u8 valid_bit, int mask) +{ + u16 valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static u8 psu_get_vout_mode(struct i2c_client *client) +{ + u8 status = 0, retry = 10; + uint8_t offset = PSU_REG_VOUT_MODE; + + while (retry) { + status = i2c_smbus_read_byte_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + printk(KERN_ERR "%s: Get PSU Vout mode failed\n", __func__); + return 0; + } + else + { + /*printk(KERN_ERR "%s: vout_mode reg value 0x%x\n", __func__, status);*/ + return status; + } +} + +static u16 psu_get_v_out(struct i2c_client *client) +{ + u16 status = 0, retry = 10; + uint8_t offset = PSU_REG_READ_VOUT; + + while (retry) { + status = i2c_smbus_read_word_data((struct i2c_client *)client, offset); + if (unlikely(status < 0)) { + msleep(60); + retry--; + continue; + } + break; + } + + if (status < 0) + { + printk(KERN_ERR "%s: Get PSU Vout failed\n", __func__); + return 0; + } + else + { + /*printk(KERN_ERR "%s: vout reg value 0x%x\n", __func__, status);*/ + return status; + } +} + +ssize_t pddf_show_custom_psu_v_out(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int exponent, mantissa; + int multiplier = 1000; + + u16 value = psu_get_v_out(client); + u8 vout_mode = psu_get_vout_mode(client); + + if ((vout_mode >> 5) == 0) + exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f); + else + { + /*printk(KERN_ERR "%s: Only support linear mode for vout mode\n", __func__);*/ + exponent = 0; + } + mantissa = value; + if (exponent >= 0) + return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier); + else + return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent)); +} + +static int __init pddf_custom_psu_init(void) +{ + access_psu_v_out.show = pddf_show_custom_psu_v_out; + access_psu_v_out.do_get = NULL; + return 0; +} + +static void __exit pddf_custom_psu_exit(void) +{ + return; +} + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("pddf custom psu api"); +MODULE_LICENSE("GPL"); + +module_init(pddf_custom_psu_init); +module_exit(pddf_custom_psu_exit); + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c index 9b42c8f2b88f..5858d989af50 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include #include #include @@ -44,6 +44,7 @@ #define REG_BASE_CPU 0x600 #define REG_BASE_MB 0x700 +#define REG_BASE_EC 0xe000 //MB CPLD #define REG_MB_BRD_ID_0 (REG_BASE_MB + 0x00) @@ -59,6 +60,10 @@ #define REG_MB_SYS_LED_STATUS_1 (REG_BASE_MB + 0x82) #define REG_MB_SYS_LED_STATUS_2 (REG_BASE_MB + 0x83) #define REG_MB_SYS_LED_STATUS_3 (REG_BASE_MB + 0x84) +#define REG_MB_POWER_EN (REG_BASE_MB + 0x95) +//EC +#define REG_EC_SEL (REG_BASE_EC + 0x394) +#define REG_EC_PSU_RST (REG_BASE_EC + 0x392) #define MASK_ALL (0xFF) @@ -94,6 +99,9 @@ enum lpc_sysfs_attributes { ATT_MB_LED_LNK, ATT_MB_LED_PWR0, ATT_MB_LED_PWR1, + ATT_MB_POWER_EN, + //EC + ATT_EC_PSU_RESET, //BSP ATT_BSP_VERSION, ATT_BSP_DEBUG, @@ -477,6 +485,10 @@ static ssize_t read_lpc_callback(struct device *dev, mask = 0xF; base = BASE_HEX; break; + case ATT_MB_POWER_EN: + reg = REG_MB_POWER_EN; + base = BASE_HEX; + break; //BSP case ATT_BSP_REG_VALUE: if (kstrtou16(bsp_reg, 0, ®) < 0) @@ -511,6 +523,9 @@ static ssize_t write_lpc_callback(struct device *dev, reg = REG_MB_SYS_LED_CTRL_1; mask = 0xF; break; + case ATT_MB_POWER_EN: + reg = REG_MB_POWER_EN; + break; default: return -EINVAL; } @@ -557,18 +572,18 @@ static ssize_t write_bsp_callback(struct device *dev, switch (attr->index) { case ATT_BSP_VERSION: str = bsp_version; - str_len = sizeof(str); + str_len = sizeof(bsp_version); break; case ATT_BSP_DEBUG: str = bsp_debug; - str_len = sizeof(str); + str_len = sizeof(bsp_debug); break; case ATT_BSP_REG: if(kstrtou16(buf, 0, ®) < 0) return -EINVAL; str = bsp_reg; - str_len = sizeof(str); + str_len = sizeof(bsp_reg); break; default: return -EINVAL; @@ -621,6 +636,41 @@ static ssize_t read_gpio_max_callback(struct device *dev, return -1; } +/* set psu_reset register value */ +static ssize_t write_ec_psu_reset(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + u8 val = 0; + u8 reg_val = 0; + static int psu_reset_flag = 0; + + if (kstrtou8(buf, 0, &val) < 0) + return -EINVAL; + + if (psu_reset_flag == 0) { + if (val == 0) { + mutex_lock(&lpc_data->access_lock); + psu_reset_flag = 1; + reg_val = 0x1; + outb(reg_val, REG_EC_SEL); + BSP_LOG_W("reg=0x%04x, reg_val=0x%02x", REG_EC_SEL, reg_val); + reg_val = 0x21; + outb(reg_val, REG_EC_PSU_RST); + BSP_LOG_W("reg=0x%04x, reg_val=0x%02x", REG_EC_PSU_RST, reg_val); + psu_reset_flag = 0; + mutex_unlock(&lpc_data->access_lock); + } else { + return -EINVAL; + } + } else { + printk(KERN_INFO "PSU is resetting... (ignore)\n"); + mutex_lock(&lpc_data->access_lock); + mutex_unlock(&lpc_data->access_lock); + } + + return count; +} + //SENSOR_DEVICE_ATTR - MB static SENSOR_DEVICE_ATTR(board_id_0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0); static SENSOR_DEVICE_ATTR(board_id_1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1); @@ -644,7 +694,9 @@ static SENSOR_DEVICE_ATTR(led_fan, S_IRUGO, read_lpc_callback, NULL, A static SENSOR_DEVICE_ATTR(led_lnk, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_LNK); static SENSOR_DEVICE_ATTR(led_pwr1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_PWR1); static SENSOR_DEVICE_ATTR(led_pwr0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_PWR0); - +static SENSOR_DEVICE_ATTR(power_en, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_POWER_EN); +//SENSOR_DEVICE_ATTR - EC +static SENSOR_DEVICE_ATTR(psu_reset, S_IRUGO | S_IWUSR, NULL, write_ec_psu_reset, ATT_EC_PSU_RESET); //SENSOR_DEVICE_ATTR - BSP static SENSOR_DEVICE_ATTR(bsp_version , S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION); static SENSOR_DEVICE_ATTR(bsp_debug , S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG); @@ -659,25 +711,31 @@ static struct attribute *mb_cpld_attrs[] = { &sensor_dev_attr_board_id_0.dev_attr.attr, &sensor_dev_attr_board_id_1.dev_attr.attr, &sensor_dev_attr_mb_cpld_1_version.dev_attr.attr, - &sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr, - &sensor_dev_attr_board_sku_id.dev_attr.attr, - &sensor_dev_attr_board_hw_id.dev_attr.attr, - &sensor_dev_attr_board_id_type.dev_attr.attr, - &sensor_dev_attr_board_build_id.dev_attr.attr, - &sensor_dev_attr_board_deph_id.dev_attr.attr, - &sensor_dev_attr_board_ext_id.dev_attr.attr, - &sensor_dev_attr_mux_reset.dev_attr.attr, - &sensor_dev_attr_fan_status.dev_attr.attr, - &sensor_dev_attr_psu_status.dev_attr.attr, - &sensor_dev_attr_port_led_clear.dev_attr.attr, - &sensor_dev_attr_led_sys.dev_attr.attr, - &sensor_dev_attr_led_id.dev_attr.attr, - &sensor_dev_attr_led_poe.dev_attr.attr, - &sensor_dev_attr_led_spd.dev_attr.attr, - &sensor_dev_attr_led_fan.dev_attr.attr, - &sensor_dev_attr_led_lnk.dev_attr.attr, - &sensor_dev_attr_led_pwr0.dev_attr.attr, - &sensor_dev_attr_led_pwr1.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr, + &sensor_dev_attr_board_sku_id.dev_attr.attr, + &sensor_dev_attr_board_hw_id.dev_attr.attr, + &sensor_dev_attr_board_id_type.dev_attr.attr, + &sensor_dev_attr_board_build_id.dev_attr.attr, + &sensor_dev_attr_board_deph_id.dev_attr.attr, + &sensor_dev_attr_board_ext_id.dev_attr.attr, + &sensor_dev_attr_mux_reset.dev_attr.attr, + &sensor_dev_attr_fan_status.dev_attr.attr, + &sensor_dev_attr_psu_status.dev_attr.attr, + &sensor_dev_attr_port_led_clear.dev_attr.attr, + &sensor_dev_attr_led_sys.dev_attr.attr, + &sensor_dev_attr_led_id.dev_attr.attr, + &sensor_dev_attr_led_poe.dev_attr.attr, + &sensor_dev_attr_led_spd.dev_attr.attr, + &sensor_dev_attr_led_fan.dev_attr.attr, + &sensor_dev_attr_led_lnk.dev_attr.attr, + &sensor_dev_attr_led_pwr0.dev_attr.attr, + &sensor_dev_attr_led_pwr1.dev_attr.attr, + &sensor_dev_attr_power_en.dev_attr.attr, + NULL, +}; + +static struct attribute *ec_attrs[] = { + &sensor_dev_attr_psu_reset.dev_attr.attr, NULL, }; @@ -697,6 +755,11 @@ static struct attribute_group mb_cpld_attr_grp = { .attrs = mb_cpld_attrs, }; +static struct attribute_group ec_attr_grp = { + .name = "ec", + .attrs = ec_attrs, +}; + static struct attribute_group bsp_attr_grp = { .name = "bsp", .attrs = bsp_attrs, @@ -717,7 +780,7 @@ static struct platform_device lpc_dev = { static int lpc_drv_probe(struct platform_device *pdev) { - int i = 0, grp_num = 2; + int i = 0, grp_num = 3; int err[5] = {0}; struct attribute_group *grp; @@ -734,6 +797,9 @@ static int lpc_drv_probe(struct platform_device *pdev) grp = &mb_cpld_attr_grp; break; case 1: + grp = &ec_attr_grp; + break; + case 2: grp = &bsp_attr_grp; break; default: @@ -758,6 +824,9 @@ static int lpc_drv_probe(struct platform_device *pdev) grp = &mb_cpld_attr_grp; break; case 1: + grp = &ec_attr_grp; + break; + case 2: grp = &bsp_attr_grp; break; default: @@ -779,6 +848,7 @@ static int lpc_drv_probe(struct platform_device *pdev) static int lpc_drv_remove(struct platform_device *pdev) { sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &ec_attr_grp); sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp); return 0; @@ -798,18 +868,18 @@ int lpc_init(void) err = platform_driver_register(&lpc_drv); if(err) { - printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", + printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", __func__, __LINE__, err); - return err; + return err; } err = platform_device_register(&lpc_dev); if(err) { - printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", + printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", __func__, __LINE__, err); - platform_driver_unregister(&lpc_drv); - return err; + platform_driver_unregister(&lpc_drv); + return err; } return err; diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-sys-eeprom.c index 5c6dec193ef6..f1d0bbc45087 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-sys-eeprom.c +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-sys-eeprom.c @@ -27,6 +27,9 @@ #include #include #include +#include + +#define _memset(s, c, n) memset(s, c, n) /* Addresses to scan */ static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, @@ -220,7 +223,7 @@ static int sys_eeprom_probe(struct i2c_client *client, #ifdef __STDC_LIB_EXT1__ memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); #else - memset(data->data, 0xff, EEPROM_SIZE); + _memset(data->data, 0xff, EEPROM_SIZE); #endif i2c_set_clientdata(client, data); @@ -240,12 +243,19 @@ static int sys_eeprom_probe(struct i2c_client *client, return err; } -static int sys_eeprom_remove(struct i2c_client *client) +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +sys_eeprom_remove(struct i2c_client *client) { sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); kfree(i2c_get_clientdata(client)); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) return 0; +#endif } static const struct i2c_device_id sys_eeprom_id[] = { diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/chassis.py index ab3e44f74432..585ecdbe197c 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/chassis.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/chassis.py @@ -39,7 +39,7 @@ def get_name(self): Returns: string: The name of the chassis """ - return device_info.get_platform() + return self._eeprom.platform_name_str() def initizalize_system_led(self): return True @@ -175,26 +175,7 @@ def get_sfp(self, index): except IndexError: sys.stderr.write("SFP index {} out of range (1-{})\n".format( index, len(self._sfp_list))) - return sfp - - def set_system_led(self, led_device_name, color): - """ - Sets the color of an System LED device - Args: - led_device_name: a pre-defined LED device name list used in pddf-device.json. - color: A string representing the color with which to set a LED - Returns: - bool: True if the LED state is set successfully, False if not - """ - - if led_device_name in self.plugin_data['LED']['capability']['rw']: - result, msg = self.pddf_obj.set_system_led_color(led_device_name, color) - if not result and msg: - print(msg) - return (result) - else: - print("Not Support") - return False + return sfp def get_reboot_cause(self): """ @@ -217,4 +198,15 @@ def get_reboot_cause(self): except IOError: sw_reboot_cause = "Unknown" - return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) \ No newline at end of file + return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + + return self.get_serial() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan.py index 2eadfd0a465a..6685e8c8961a 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan.py @@ -19,6 +19,25 @@ def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, i # Provide the functions/variables below for which implementation is to be overwritten # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + def get_max_speed(self): + """ + Retrieves the max speed + + Returns: + An Integer, the max speed + """ + if self.is_psu_fan: + psu_fru = PsuFru(self.fans_psu_index) + max_speed = int(self.plugin_data['PSU']['valmap']['PSU_FAN_MAX_SPEED']) + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == psu_fru.mfr_id and dev['Name'] == psu_fru.model: + max_speed = int(self.plugin_data['PSU']['valmap'][dev['MaxSpd']]) + break + else: + max_speed = int(self.plugin_data['FAN']['FAN_MAX_SPEED']) + + return max_speed + def get_speed(self): """ Retrieves the speed of fan as a percentage of full speed @@ -28,15 +47,12 @@ def get_speed(self): to 100 (full speed) """ speed_percentage = 0 - if self.is_psu_fan: - max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED']) - else: - max_speed = int(self.plugin_data['FAN']['FAN_MAX_SPEED']) + max_speed = self.get_max_speed() speed = int(self.get_speed_rpm()) - speed_percentage = round((speed*100)/max_speed) + return min(speed_percentage, 100) def get_speed_rpm(self): @@ -63,7 +79,7 @@ def get_speed_rpm(self): ucd_path = "/sys/bus/i2c/devices/5-0034/hwmon/" if os.path.exists(ucd_path): hwmon_dir = os.listdir(ucd_path) - with open("{}/{}/temp{}_input".format(ucd_path, hwmon_dir[0], self.fantray_index), "rb") as f: + with open("{}/{}/fan{}_input".format(ucd_path, hwmon_dir[0], self.fantray_index), "rb") as f: rpm_speed = int(f.read().strip()) return rpm_speed @@ -81,7 +97,7 @@ def get_direction(self): if psu_fru.mfr_id == "not available": return direction for dev in self.plugin_data['PSU']['psu_support_list']: - if dev['Mfr_id'] == psu_fru.mfr_id and dev['Model'] == psu_fru.model: + if dev['Manufacturer'] == psu_fru.mfr_id and dev['Name'] == psu_fru.model: dir = dev['Dir'] break else: @@ -98,34 +114,6 @@ def get_direction(self): return dir - def get_presence(self): - """ - Retrieves the presence of the device - Returns: - bool: True if device is present, False if not - """ - presence = False - if self.is_psu_fan: - attr = "psu_present" - device = "PSU{}".format(self.fans_psu_index) - else: - attr = "fan{}_present".format(self.fantray_index) - device = "FAN-CTRL" - - output = self.pddf_obj.get_attr_name_output(device, attr) - if not output: - return presence - - - mode = output['mode'] - val = output['status'].strip() - vmap = self.plugin_data['FAN']['present'][mode]['valmap'] - - if val in vmap: - presence = vmap[val] - - return presence - def get_target_speed(self): """ Retrieves the target (expected) speed of the fan diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu.py index 008aa600cdf8..fff8de4aa953 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu.py @@ -10,23 +10,12 @@ class Psu(PddfPsu): """PDDF Platform-Specific PSU class""" - - PLATFORM_PSU_CAPACITY = 750 def __init__(self, index, pddf_data=None, pddf_plugin_data=None): PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) self.psu_fru = PsuFru(self.psu_index) # Provide the functions/variables below for which implementation is to be overwritten - def get_maximum_supplied_power(self): - """ - Retrieves the maximum supplied power by PSU (or PSU capacity) - Returns: - A float number, the maximum power output in Watts. - e.g. 1200.1 - """ - return float(self.PLATFORM_PSU_CAPACITY) - def get_power(self): """ Retrieves current energy supplied by PSU @@ -65,3 +54,34 @@ def get_serial(self): string: Serial number of device """ return self.psu_fru.serial.rstrip() + + def get_capacity(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return self.get_maximum_supplied_power() + + def get_type(self): + """ + Gets the type of the PSU + + Returns: + A string, the type of PSU (AC/DC) + """ + mfr = self.get_mfr_id() + model = self.get_model() + ptype = self.plugin_data['PSU']['valmap']['DEFAULT_TYPE'] + + if mfr and model : + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == mfr and dev['Name'] == model: + ptype = dev['Type'] + break + + + return ptype + + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_pre_driver_install.sh deleted file mode 100755 index 187943061e6c..000000000000 --- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_pre_driver_install.sh +++ /dev/null @@ -1,11 +0,0 @@ -#!/bin/bash -#rmmod gpio_ich -if [ ! -f /tmp/._pddf_pre_driver_init_completion ]; then - # make sure igb/i40e init in correct order - rmmod i2c-i801 - rmmod i2c_ismt - modprobe -r i2c-i801 - modprobe -r i2c_ismt - date > /tmp/._pddf_pre_driver_init_completion -fi -echo "PDDF driver pre-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_sysstatus_module.c index b50bb428000a..d68f85670a10 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_sysstatus_module.c +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_sysstatus_module.c @@ -1,6 +1,6 @@ /* * Copyright 2019 Broadcom. - * The term ��Broadcom�� refers to Broadcom Inc. and/or its subsidiaries. + * The term "Broadcom" refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -33,6 +33,7 @@ #include "../../../../pddf/i2c/modules/include/pddf_client_defs.h" #include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h" +#define _memset(s, c, n) memset(s, c, n) SYSSTATUS_DATA sysstatus_data = {0}; @@ -142,8 +143,9 @@ ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, cha if (sysstatus_addr_attrs==NULL ) { - printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname); + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); status = 0; + return sprintf(buf, "0x%x\n", status); } else { @@ -173,7 +175,7 @@ ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, co if (sysstatus_addr_attrs==NULL) { - printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname); + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); return -EINVAL; } else @@ -207,7 +209,7 @@ static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da #ifdef __STDC_LIB_EXT1__ memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); #else - memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); + _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); #endif return count; diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.c index 0cefcb8aac5f..28dfdce93abd 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.c +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.c @@ -31,6 +31,7 @@ #include #include #include +#include #include "x86-64-ufispace-s7801-54xs-cpld.h" #ifdef DEBUG @@ -1050,7 +1051,7 @@ static ssize_t write_bsp_callback(struct device *dev, switch (attr->index) { case BSP_DEBUG: str = bsp_debug; - str_len = sizeof(str); + str_len = sizeof(bsp_debug); ret = write_bsp(buf, str, str_len, count); if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { @@ -1332,7 +1333,12 @@ static int cpld_probe(struct i2c_client *client, } /* cpld drvier remove */ -static int cpld_remove(struct i2c_client *client) +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +cpld_remove(struct i2c_client *client) { struct cpld_data *data = i2c_get_clientdata(client); @@ -1346,7 +1352,9 @@ static int cpld_remove(struct i2c_client *client) } cpld_remove_client(client); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) return 0; +#endif } static int s7801_54xs_cpld_read_internal(struct i2c_client *client, u8 reg) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-sys-eeprom.c index f9f7728deb3d..f2f27cb0ae5b 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-sys-eeprom.c +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-sys-eeprom.c @@ -27,6 +27,9 @@ #include #include #include +#include + +#define _memset(s, c, n) memset(s, c, n) /* Addresses to scan */ static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, @@ -220,7 +223,7 @@ static int sys_eeprom_probe(struct i2c_client *client, #ifdef __STDC_LIB_EXT1__ memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); #else - memset(data->data, 0xff, EEPROM_SIZE); + _memset(data->data, 0xff, EEPROM_SIZE); #endif i2c_set_clientdata(client, data); mutex_init(&data->update_lock); @@ -239,12 +242,19 @@ static int sys_eeprom_probe(struct i2c_client *client, return err; } -static int sys_eeprom_remove(struct i2c_client *client) +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +sys_eeprom_remove(struct i2c_client *client) { sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); kfree(i2c_get_clientdata(client)); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) return 0; +#endif } static const struct i2c_device_id sys_eeprom_id[] = { diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/chassis.py index 085f2af2ff85..0b02f9a834c2 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/chassis.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/chassis.py @@ -191,3 +191,14 @@ def get_reboot_cause(self): sw_reboot_cause = "Unknown" return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + + return self.get_serial() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/component.py index 1c583079f8c2..d5d8d8226fd8 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/component.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/component.py @@ -18,9 +18,7 @@ } BMC_CMDS = { - "VER1": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f1", - "VER2": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f2", - "VER3": "echo $((`ipmitool mc info | grep 'Aux Firmware Rev Info' -A 2 | sed -n '2p'` + 0))", + "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'", } BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" @@ -69,17 +67,11 @@ def _get_cpld_version(self): def _get_bmc_version(self): # Retrieves the BMC firmware version - bmc_ver = dict() - for ver in BMC_CMDS: - status, value = subprocess.getstatusoutput(BMC_CMDS[ver]) - if not status: - bmc_ver[ver] = int(value.rstrip()) - else: - return None - - bmc_version = "{}.{}.{}".format(bmc_ver["VER1"], bmc_ver["VER2"], bmc_ver["VER3"]) - - return bmc_version + status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"]) + if not status: + return value + else: + return None def get_name(self): """ diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/psu.py index 38b32412d024..cae583254015 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/psu.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/psu.py @@ -36,3 +36,32 @@ def get_power(self): # power is returned in micro watts return round(float(self.get_voltage()*self.get_current()), 2) + + def get_capacity(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return self.get_maximum_supplied_power() + + def get_type(self): + """ + Gets the type of the PSU + + Returns: + A string, the type of PSU (AC/DC) + """ + mfr = self.get_mfr_id() + model = self.get_model() + ptype = self.plugin_data['PSU']['valmap']['DEFAULT_TYPE'] + + if mfr and model : + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == mfr and dev['Name'] == model: + ptype = dev['Type'] + break + + + return ptype \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_device_create.sh index 4a55252ea936..c6fe10aba368 100755 --- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_device_create.sh +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_device_create.sh @@ -6,7 +6,7 @@ timeout 3 ipmitool mc watchdog off pddf_ledutil setstatusled SYNC_LED off pddf_ledutil setstatusled SYS_LED off -pddf_ledutil setstatusled ID_LED off +pddf_ledutil setstatusled LOC_LED off #set status led to green to indicate platform init done curr_led=$(pddf_ledutil getstatusled SYS_LED) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_pre_driver_install.sh deleted file mode 100755 index 9ada6c235c48..000000000000 --- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_pre_driver_install.sh +++ /dev/null @@ -1,8 +0,0 @@ -#!/bin/bash -#rmmod gpio_ich -if [ ! -f /tmp/._pddf_pre_driver_init_completion ]; then - rmmod i2c_i801 - rmmod i2c_ismt - date > /tmp/._pddf_pre_driver_init_completion -fi -echo "PDDF driver pre-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pre_pddf_init.sh b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pre_pddf_init.sh deleted file mode 100755 index 63a2e205808e..000000000000 --- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pre_pddf_init.sh +++ /dev/null @@ -1,5 +0,0 @@ -#!/bin/bash -#rmmod gpio_ich -modprobe -rq i2c_i801 -modprobe -rq i2c_smbus -echo "Pre PDDF init steps completed successully" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_sysstatus_module.c index b50bb428000a..d68f85670a10 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_sysstatus_module.c +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_sysstatus_module.c @@ -1,6 +1,6 @@ /* * Copyright 2019 Broadcom. - * The term ��Broadcom�� refers to Broadcom Inc. and/or its subsidiaries. + * The term "Broadcom" refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -33,6 +33,7 @@ #include "../../../../pddf/i2c/modules/include/pddf_client_defs.h" #include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h" +#define _memset(s, c, n) memset(s, c, n) SYSSTATUS_DATA sysstatus_data = {0}; @@ -142,8 +143,9 @@ ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, cha if (sysstatus_addr_attrs==NULL ) { - printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname); + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); status = 0; + return sprintf(buf, "0x%x\n", status); } else { @@ -173,7 +175,7 @@ ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, co if (sysstatus_addr_attrs==NULL) { - printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname); + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); return -EINVAL; } else @@ -207,7 +209,7 @@ static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da #ifdef __STDC_LIB_EXT1__ memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); #else - memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); + _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); #endif return count; diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.c index 63eec91d4819..cff824efdb19 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.c +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.c @@ -31,6 +31,7 @@ #include #include #include +#include #include "x86-64-ufispace-s8901-54xc-cpld.h" #ifdef DEBUG @@ -1050,7 +1051,7 @@ static ssize_t write_bsp_callback(struct device *dev, switch (attr->index) { case BSP_DEBUG: str = bsp_debug; - str_len = sizeof(str); + str_len = sizeof(bsp_debug); ret = write_bsp(buf, str, str_len, count); if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { @@ -1332,7 +1333,12 @@ static int cpld_probe(struct i2c_client *client, } /* cpld drvier remove */ -static int cpld_remove(struct i2c_client *client) +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +cpld_remove(struct i2c_client *client) { struct cpld_data *data = i2c_get_clientdata(client); @@ -1346,7 +1352,9 @@ static int cpld_remove(struct i2c_client *client) } cpld_remove_client(client); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) return 0; +#endif } static int s8901_54xc_cpld_read_internal(struct i2c_client *client, u8 reg) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-sys-eeprom.c index f9f7728deb3d..f2f27cb0ae5b 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-sys-eeprom.c +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-sys-eeprom.c @@ -27,6 +27,9 @@ #include #include #include +#include + +#define _memset(s, c, n) memset(s, c, n) /* Addresses to scan */ static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, @@ -220,7 +223,7 @@ static int sys_eeprom_probe(struct i2c_client *client, #ifdef __STDC_LIB_EXT1__ memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); #else - memset(data->data, 0xff, EEPROM_SIZE); + _memset(data->data, 0xff, EEPROM_SIZE); #endif i2c_set_clientdata(client, data); mutex_init(&data->update_lock); @@ -239,12 +242,19 @@ static int sys_eeprom_probe(struct i2c_client *client, return err; } -static int sys_eeprom_remove(struct i2c_client *client) +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +sys_eeprom_remove(struct i2c_client *client) { sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); kfree(i2c_get_clientdata(client)); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) return 0; +#endif } static const struct i2c_device_id sys_eeprom_id[] = { diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/chassis.py index 085f2af2ff85..0b02f9a834c2 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/chassis.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/chassis.py @@ -191,3 +191,14 @@ def get_reboot_cause(self): sw_reboot_cause = "Unknown" return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + + return self.get_serial() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/component.py index 1c583079f8c2..d5d8d8226fd8 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/component.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/component.py @@ -18,9 +18,7 @@ } BMC_CMDS = { - "VER1": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f1", - "VER2": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f2", - "VER3": "echo $((`ipmitool mc info | grep 'Aux Firmware Rev Info' -A 2 | sed -n '2p'` + 0))", + "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'", } BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" @@ -69,17 +67,11 @@ def _get_cpld_version(self): def _get_bmc_version(self): # Retrieves the BMC firmware version - bmc_ver = dict() - for ver in BMC_CMDS: - status, value = subprocess.getstatusoutput(BMC_CMDS[ver]) - if not status: - bmc_ver[ver] = int(value.rstrip()) - else: - return None - - bmc_version = "{}.{}.{}".format(bmc_ver["VER1"], bmc_ver["VER2"], bmc_ver["VER3"]) - - return bmc_version + status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"]) + if not status: + return value + else: + return None def get_name(self): """ diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/psu.py index 38b32412d024..cae583254015 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/psu.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/psu.py @@ -36,3 +36,32 @@ def get_power(self): # power is returned in micro watts return round(float(self.get_voltage()*self.get_current()), 2) + + def get_capacity(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return self.get_maximum_supplied_power() + + def get_type(self): + """ + Gets the type of the PSU + + Returns: + A string, the type of PSU (AC/DC) + """ + mfr = self.get_mfr_id() + model = self.get_model() + ptype = self.plugin_data['PSU']['valmap']['DEFAULT_TYPE'] + + if mfr and model : + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == mfr and dev['Name'] == model: + ptype = dev['Type'] + break + + + return ptype \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_device_create.sh index 4a55252ea936..c6fe10aba368 100755 --- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_device_create.sh +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_device_create.sh @@ -6,7 +6,7 @@ timeout 3 ipmitool mc watchdog off pddf_ledutil setstatusled SYNC_LED off pddf_ledutil setstatusled SYS_LED off -pddf_ledutil setstatusled ID_LED off +pddf_ledutil setstatusled LOC_LED off #set status led to green to indicate platform init done curr_led=$(pddf_ledutil getstatusled SYS_LED) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_pre_driver_install.sh deleted file mode 100755 index 9ada6c235c48..000000000000 --- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_pre_driver_install.sh +++ /dev/null @@ -1,8 +0,0 @@ -#!/bin/bash -#rmmod gpio_ich -if [ ! -f /tmp/._pddf_pre_driver_init_completion ]; then - rmmod i2c_i801 - rmmod i2c_ismt - date > /tmp/._pddf_pre_driver_init_completion -fi -echo "PDDF driver pre-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pre_pddf_init.sh b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pre_pddf_init.sh deleted file mode 100755 index 63a2e205808e..000000000000 --- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pre_pddf_init.sh +++ /dev/null @@ -1,5 +0,0 @@ -#!/bin/bash -#rmmod gpio_ich -modprobe -rq i2c_i801 -modprobe -rq i2c_smbus -echo "Pre PDDF init steps completed successully" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/pddf_custom_sysstatus_module.c index 35a032f4277e..ace5c9d8cbe0 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/pddf_custom_sysstatus_module.c +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/pddf_custom_sysstatus_module.c @@ -1,6 +1,6 @@ /* * Copyright 2019 Broadcom. - * The term ��Broadcom�� refers to Broadcom Inc. and/or its subsidiaries. + * The term "Broadcom" refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -33,6 +33,7 @@ #include "../../../../pddf/i2c/modules/include/pddf_client_defs.h" #include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h" +#define _memset(s, c, n) memset(s, c, n) SYSSTATUS_DATA sysstatus_data = {0}; @@ -140,8 +141,9 @@ ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, cha if (sysstatus_addr_attrs==NULL ) { - printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname); + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); status = 0; + return sprintf(buf, "0x%x\n", status); } else { @@ -171,7 +173,7 @@ ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, co if (sysstatus_addr_attrs==NULL) { - printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname); + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); return -EINVAL; } else @@ -205,7 +207,7 @@ static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da #ifdef __STDC_LIB_EXT1__ memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); #else - memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); + _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); #endif return count; diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.c index af54108ee1b3..9d0d359ea118 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.c +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.c @@ -31,6 +31,7 @@ #include #include #include +#include #include "x86-64-ufispace-s9110-32x-cpld.h" #if !defined(SENSOR_DEVICE_ATTR_RO) @@ -863,7 +864,7 @@ static ssize_t bsp_callback_store(struct device *dev, switch (attr->index) { case BSP_DEBUG: str = bsp_debug; - str_len = sizeof(str); + str_len = sizeof(bsp_debug); ret = bsp_write(buf, str, str_len, count); if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { @@ -1272,8 +1273,6 @@ static int cpld_probe(struct i2c_client *client, if (INVALID(ret, cpld1, cpld2)) { dev_info(&client->dev, "cpld id %d(device) not valid\n", ret); - //status = -EPERM; - //goto exit; } data->index = dev_id->driver_data; @@ -1317,7 +1316,12 @@ static int cpld_probe(struct i2c_client *client, } /* cpld drvier remove */ -static int cpld_remove(struct i2c_client *client) +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +cpld_remove(struct i2c_client *client) { struct cpld_data *data = i2c_get_clientdata(client); @@ -1331,7 +1335,9 @@ static int cpld_remove(struct i2c_client *client) } cpld_remove_client(client); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) return 0; +#endif } #if 0 /* FIXME */ diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-sys-eeprom.c index 976ba05052e7..c0b3ac20f0f1 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-sys-eeprom.c +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-sys-eeprom.c @@ -27,6 +27,9 @@ #include #include #include +#include + +#define _memset(s, c, n) memset(s, c, n) /* Addresses to scan */ static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, @@ -220,7 +223,7 @@ static int sys_eeprom_probe(struct i2c_client *client, #ifdef __STDC_LIB_EXT1__ memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); #else - memset(data->data, 0xff, EEPROM_SIZE); + _memset(data->data, 0xff, EEPROM_SIZE); #endif i2c_set_clientdata(client, data); mutex_init(&data->update_lock); @@ -239,12 +242,19 @@ static int sys_eeprom_probe(struct i2c_client *client, return err; } -static int sys_eeprom_remove(struct i2c_client *client) +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +sys_eeprom_remove(struct i2c_client *client) { sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); kfree(i2c_get_clientdata(client)); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) return 0; +#endif } static const struct i2c_device_id sys_eeprom_id[] = { diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/chassis.py index 530332cf1506..78a3d9d4106a 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/chassis.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/chassis.py @@ -189,3 +189,14 @@ def get_reboot_cause(self): sw_reboot_cause = "Unknown" return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + + return self.get_serial() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/component.py index 1c583079f8c2..d5d8d8226fd8 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/component.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/component.py @@ -18,9 +18,7 @@ } BMC_CMDS = { - "VER1": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f1", - "VER2": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f2", - "VER3": "echo $((`ipmitool mc info | grep 'Aux Firmware Rev Info' -A 2 | sed -n '2p'` + 0))", + "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'", } BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" @@ -69,17 +67,11 @@ def _get_cpld_version(self): def _get_bmc_version(self): # Retrieves the BMC firmware version - bmc_ver = dict() - for ver in BMC_CMDS: - status, value = subprocess.getstatusoutput(BMC_CMDS[ver]) - if not status: - bmc_ver[ver] = int(value.rstrip()) - else: - return None - - bmc_version = "{}.{}.{}".format(bmc_ver["VER1"], bmc_ver["VER2"], bmc_ver["VER3"]) - - return bmc_version + status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"]) + if not status: + return value + else: + return None def get_name(self): """ diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan.py index c38ebdedea5b..3705fae2bf7c 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan.py @@ -108,7 +108,6 @@ def get_presence(self): if not output: return False - mode = output['mode'] presence = output['status'].rstrip() vmap = self.plugin_data['FAN']['present'][mode]['valmap'] diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/psu.py index 4f7e843361d4..091926788328 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/psu.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/psu.py @@ -35,4 +35,33 @@ def get_maximum_supplied_power(self): A float number, the maximum power output in Watts. e.g. 1200.1 """ - return float(self.PLATFORM_PSU_CAPACITY) \ No newline at end of file + return float(self.PLATFORM_PSU_CAPACITY) + + def get_capacity(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return self.get_maximum_supplied_power() + + def get_type(self): + """ + Gets the type of the PSU + + Returns: + A string, the type of PSU (AC/DC) + """ + mfr = self.get_mfr_id() + model = self.get_model() + ptype = self.plugin_data['PSU']['valmap']['DEFAULT_TYPE'] + + if mfr and model : + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == mfr and dev['Name'] == model: + ptype = dev['Type'] + break + + + return ptype \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_device_create.sh index 47076d99c4ca..f38d420267d2 100755 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_device_create.sh +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_device_create.sh @@ -5,7 +5,7 @@ echo "Disable BMC watchdog" timeout 3 ipmitool mc watchdog off pddf_ledutil setstatusled SYS_LED off -pddf_ledutil setstatusled ID_LED off +pddf_ledutil setstatusled LOC_LED off curr_led=$(pddf_ledutil getstatusled SYS_LED) pddf_ledutil setstatusled SYS_LED green diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_driver_install.sh deleted file mode 100755 index 187943061e6c..000000000000 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_driver_install.sh +++ /dev/null @@ -1,11 +0,0 @@ -#!/bin/bash -#rmmod gpio_ich -if [ ! -f /tmp/._pddf_pre_driver_init_completion ]; then - # make sure igb/i40e init in correct order - rmmod i2c-i801 - rmmod i2c_ismt - modprobe -r i2c-i801 - modprobe -r i2c_ismt - date > /tmp/._pddf_pre_driver_init_completion -fi -echo "PDDF driver pre-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/pddf_custom_sysstatus_module.c index 7a0b03a70d65..b61219c0088d 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/pddf_custom_sysstatus_module.c +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/pddf_custom_sysstatus_module.c @@ -1,6 +1,6 @@ /* * Copyright 2019 Broadcom. - * The term ¡§Broadcom¡¨ refers to Broadcom Inc. and/or its subsidiaries. + * The term "Broadcom" refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -33,6 +33,7 @@ #include "../../../../pddf/i2c/modules/include/pddf_client_defs.h" #include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h" +#define _memset(s, c, n) memset(s, c, n) SYSSTATUS_DATA sysstatus_data = {0}; @@ -132,7 +133,7 @@ ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, cha if (sysstatus_addr_attrs==NULL ) { - printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname); + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); status = 0; } else @@ -163,7 +164,7 @@ ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, co if (sysstatus_addr_attrs==NULL) { - printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname); + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); return -EINVAL; } else @@ -196,7 +197,7 @@ static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da #ifdef __STDC_LIB_EXT1__ memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr), 0, sizeof(pdata->sysstatus_addr_attr)); #else - memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); + _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); #endif return count; diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.c index 39f6694140e2..3ff229710d9d 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.c +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.c @@ -1,1638 +1,1646 @@ -/* - * A i2c cpld driver for the ufispace_s9300_32d - * - * Copyright (C) 2017-2019 UfiSpace Technology Corporation. - * Jason Tsai - * - * Based on ad7414.c - * Copyright 2006 Stefan Roese , DENX Software Engineering - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "x86-64-ufispace-s9300-32d-cpld.h" - -#ifdef DEBUG -#define DEBUG_PRINT(fmt, args...) \ - printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ - __FILE__, __func__, __LINE__, ##args) -#else -#define DEBUG_PRINT(fmt, args...) -#endif - -#define BSP_LOG_R(fmt, args...) \ - _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ - __FILE__, __func__, __LINE__, ##args) -#define BSP_LOG_W(fmt, args...) \ - _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ - __FILE__, __func__, __LINE__, ##args) - -#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ -{ \ - mutex_lock(lock); \ - ret = i2c_smbus_read_byte_data(i2c_client, reg); \ - mutex_unlock(lock); \ - BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \ -} -#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ -{ \ - mutex_lock(lock); \ - ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ - mutex_unlock(lock); \ - BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \ -} - -/* CPLD sysfs attributes index */ -enum s9300_cpld_sysfs_attributes { - /* CPLD1 */ - CPLD_ACCESS_REG, - CPLD_REGISTER_VAL, - CPLD_SKU_ID, - CPLD_HW_REV, - CPLD_DEPH_REV, - CPLD_BUILD_REV, - CPLD_ID_TYPE, - CPLD_MAJOR_VER, - CPLD_MINOR_VER, - CPLD_BUILD_VER, - CPLD_VERION_H, - CPLD_ID, - CPLD_MAC_INTR, - CPLD_10G_PHY_INTR, - CPLD_CPLD_FRU_INTR, - CPLD_THERMAL_ALERT_INTR, - CPLD_MISC_INTR, - CPLD_SYSTEM_INTR, - CPLD_MAC_INTR_MASK, - CPLD_10G_PHY_INTR_MASK, - CPLD_CPLD_FRU_INTR_MASK, - CPLD_THERMAL_ALERT_INTR_MASK, - CPLD_MISC_INTR_MASK, - CPLD_MAC_INTR_EVENT, - CPLD_10G_PHY_INTR_EVENT, - CPLD_CPLD_FRU_INTR_EVENT, - CPLD_THERMAL_ALERT_INTR_EVENT, - CPLD_MISC_INTR_EVENT, - CPLD_MAC_RST, - CPLD_10G_PHY_RST, - CPLD_BMC_RST, - CPLD_USB_RST, - CPLD_MUX_RST, - CPLD_MISC_RST, - CPLD_BMC_WATCHDOG, - CPLD_DAU_BD_PRES, - CPLD_PSU_STATUS, - CPLD_SYS_PW_STATUS, - CPLD_MISC, - CPLD_MUX_CTRL, - CPLD_MAC_QSFP_SEL_CTRL, - CPLD_SYS_LED_CTRL_1, - CPLD_SYS_LED_CTRL_2, - CPLD_BEACON_LED_CTRL, - CPLD_PORT_LED_CLR_CTRL, - CPLD_EVENT_DETECT_CTRL, - /* CPLD2 */ - CPLD_QSFPDD_MOD_INT_G0, - CPLD_QSFPDD_MOD_INT_G1, - CPLD_QSFPDD_MOD_INT_G2, - CPLD_QSFPDD_MOD_INT_G3, - CPLD_QSFPDD_PRES_G0, - CPLD_QSFPDD_PRES_G1, - CPLD_QSFPDD_PRES_G2, - CPLD_QSFPDD_PRES_G3, - CPLD_QSFPDD_FUSE_INT_G0, - CPLD_QSFPDD_FUSE_INT_G1, - CPLD_QSFPDD_FUSE_INT_G2, - CPLD_QSFPDD_FUSE_INT_G3, - CPLD_SFP_TXFAULT, - CPLD_SFP_ABS, - CPLD_SFP_RXLOS, - CPLD_QSFPDD_MOD_INT_MASK_G0, - CPLD_QSFPDD_MOD_INT_MASK_G1, - CPLD_QSFPDD_MOD_INT_MASK_G2, - CPLD_QSFPDD_MOD_INT_MASK_G3, - CPLD_QSFPDD_PRES_MASK_G0, - CPLD_QSFPDD_PRES_MASK_G1, - CPLD_QSFPDD_PRES_MASK_G2, - CPLD_QSFPDD_PRES_MASK_G3, - CPLD_QSFPDD_FUSE_INT_MASK_G0, - CPLD_QSFPDD_FUSE_INT_MASK_G1, - CPLD_QSFPDD_FUSE_INT_MASK_G2, - CPLD_QSFPDD_FUSE_INT_MASK_G3, - CPLD_SFP_TXFAULT_MASK, - CPLD_SFP_ABS_MASK, - CPLD_SFP_RXLOS_MASK, - CPLD_QSFPDD_MOD_INT_EVENT_G0, - CPLD_QSFPDD_MOD_INT_EVENT_G1, - CPLD_QSFPDD_MOD_INT_EVENT_G2, - CPLD_QSFPDD_MOD_INT_EVENT_G3, - CPLD_QSFPDD_PRES_EVENT_G0, - CPLD_QSFPDD_PRES_EVENT_G1, - CPLD_QSFPDD_PRES_EVENT_G2, - CPLD_QSFPDD_PRES_EVENT_G3, - CPLD_QSFPDD_FUSE_INT_EVENT_G0, - CPLD_QSFPDD_FUSE_INT_EVENT_G1, - CPLD_QSFPDD_FUSE_INT_EVENT_G2, - CPLD_QSFPDD_FUSE_INT_EVENT_G3, - CPLD_SFP_TXFAULT_EVENT, - CPLD_SFP_ABS_EVENT, - CPLD_SFP_RXLOS_EVENT, - CPLD_QSFPDD_RESET_CTRL_G0, - CPLD_QSFPDD_RESET_CTRL_G1, - CPLD_QSFPDD_RESET_CTRL_G2, - CPLD_QSFPDD_RESET_CTRL_G3, - CPLD_QSFPDD_LP_MODE_G0, - CPLD_QSFPDD_LP_MODE_G1, - CPLD_QSFPDD_LP_MODE_G2, - CPLD_QSFPDD_LP_MODE_G3, - CPLD_SFP_TX_DIS, - CPLD_SFP_RS, - CPLD_SFP_TS, - CPLD_PORT_INT_STATUS, - - //BSP DEBUG - BSP_DEBUG -}; - -enum bsp_log_types { - LOG_NONE, - LOG_RW, - LOG_READ, - LOG_WRITE -}; - -enum bsp_log_ctrl { - LOG_DISABLE, - LOG_ENABLE -}; - -/* CPLD sysfs attributes hook functions */ -static ssize_t read_access_register(struct device *dev, - struct device_attribute *da, char *buf); -static ssize_t write_access_register(struct device *dev, - struct device_attribute *da, const char *buf, size_t count); -static ssize_t read_register_value(struct device *dev, - struct device_attribute *da, char *buf); -static ssize_t write_register_value(struct device *dev, - struct device_attribute *da, const char *buf, size_t count); -static ssize_t read_hw_rev_cb(struct device *dev, - struct device_attribute *da, char *buf); -static ssize_t read_cpld_version_cb(struct device *dev, - struct device_attribute *da, char *buf); -static ssize_t read_cpld_callback(struct device *dev, - struct device_attribute *da, char *buf); -static ssize_t write_cpld_callback(struct device *dev, - struct device_attribute *da, const char *buf, size_t count); -static ssize_t read_cpld_version_h_cb(struct device *dev, - struct device_attribute *da, char *buf); -// cpld access api -static ssize_t read_cpld_reg(struct device *dev, char *buf, u8 reg); -static ssize_t write_cpld_reg(struct device *dev, const char *buf, size_t count, u8 reg); -static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno); -static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val); -// bsp debug api -static ssize_t read_bsp(char *buf, char *str); -static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count); -static ssize_t read_bsp_callback(struct device *dev, - struct device_attribute *da, char *buf); -static ssize_t write_bsp_callback(struct device *dev, - struct device_attribute *da, const char *buf, size_t count); - -static LIST_HEAD(cpld_client_list); /* client list for cpld */ -static struct mutex list_lock; /* mutex for client list */ - -struct cpld_client_node { - struct i2c_client *client; - struct list_head list; -}; - -struct cpld_data { - int index; /* CPLD index */ - struct mutex access_lock; /* mutex for cpld access */ - u8 access_reg; /* register to access */ -}; - -/* CPLD device id and data */ -static const struct i2c_device_id s9300_cpld_id[] = { - { "s9300_32d_cpld1", cpld1 }, - { "s9300_32d_cpld2", cpld2 }, - { "s9300_32d_cpld3", cpld3 }, - {} -}; - -char bsp_debug[2]="0"; -u8 enable_log_read=LOG_DISABLE; -u8 enable_log_write=LOG_DISABLE; - -/* Addresses scanned for s9300_cpld */ -static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, 0x32, I2C_CLIENT_END }; - -/* define all support register access of cpld in attribute */ -/* CPLD1 */ -static SENSOR_DEVICE_ATTR(cpld_access_register, S_IWUSR | S_IRUGO, \ - read_access_register, write_access_register, CPLD_ACCESS_REG); -static SENSOR_DEVICE_ATTR(cpld_register_value, S_IWUSR | S_IRUGO, \ - read_register_value, write_register_value, CPLD_REGISTER_VAL); -static SENSOR_DEVICE_ATTR(cpld_sku_id, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_SKU_ID); -static SENSOR_DEVICE_ATTR(cpld_hw_rev, S_IRUGO, \ - read_hw_rev_cb, NULL, CPLD_HW_REV); -static SENSOR_DEVICE_ATTR(cpld_deph_rev, S_IRUGO, \ - read_hw_rev_cb, NULL, CPLD_DEPH_REV); -static SENSOR_DEVICE_ATTR(cpld_build_rev, S_IRUGO, \ - read_hw_rev_cb, NULL, CPLD_BUILD_REV); -static SENSOR_DEVICE_ATTR(cpld_id_type, S_IRUGO, \ - read_hw_rev_cb, NULL, CPLD_ID_TYPE); -static SENSOR_DEVICE_ATTR(cpld_major_ver, S_IRUGO, \ - read_cpld_version_cb, NULL, CPLD_MAJOR_VER); -static SENSOR_DEVICE_ATTR(cpld_minor_ver, S_IRUGO, \ - read_cpld_version_cb, NULL, CPLD_MINOR_VER); -static SENSOR_DEVICE_ATTR(cpld_build_ver, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_BUILD_VER); -static SENSOR_DEVICE_ATTR(cpld_version_h, S_IRUGO, \ - read_cpld_version_h_cb, NULL, CPLD_VERION_H); -static SENSOR_DEVICE_ATTR(cpld_id, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_ID); -static SENSOR_DEVICE_ATTR(cpld_mac_intr, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_MAC_INTR); -static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_10G_PHY_INTR); -static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR); -static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR); -static SENSOR_DEVICE_ATTR(cpld_misc_intr, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_MISC_INTR); -static SENSOR_DEVICE_ATTR(cpld_system_intr, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_SYSTEM_INTR); -static SENSOR_DEVICE_ATTR(cpld_mac_intr_mask, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_MAC_INTR_MASK); -static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_mask, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_INTR_MASK); -static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_mask, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_CPLD_FRU_INTR_MASK); -static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_mask, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_THERMAL_ALERT_INTR_MASK); -static SENSOR_DEVICE_ATTR(cpld_misc_intr_mask, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_MISC_INTR_MASK); -static SENSOR_DEVICE_ATTR(cpld_mac_intr_event, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_MAC_INTR_EVENT); -static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_event, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_10G_PHY_INTR_EVENT); -static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_event, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR_EVENT); -static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_event, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR_EVENT); -static SENSOR_DEVICE_ATTR(cpld_misc_intr_event, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_MISC_INTR_EVENT); -static SENSOR_DEVICE_ATTR(cpld_mac_rst, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_MAC_RST); -static SENSOR_DEVICE_ATTR(cpld_10g_phy_rst, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_RST); -static SENSOR_DEVICE_ATTR(cpld_bmc_rst, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_BMC_RST); -static SENSOR_DEVICE_ATTR(cpld_usb_rst, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_USB_RST); -static SENSOR_DEVICE_ATTR(cpld_mux_rst, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_MUX_RST); -static SENSOR_DEVICE_ATTR(cpld_misc_rst, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_MISC_RST); -static SENSOR_DEVICE_ATTR(cpld_bmc_watchdog, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_BMC_WATCHDOG); -static SENSOR_DEVICE_ATTR(cpld_dau_bd_pres, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_DAU_BD_PRES); -static SENSOR_DEVICE_ATTR(cpld_psu_status, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_PSU_STATUS); -static SENSOR_DEVICE_ATTR(cpld_sys_pw_status, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_SYS_PW_STATUS); -static SENSOR_DEVICE_ATTR(cpld_misc, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_MISC); -static SENSOR_DEVICE_ATTR(cpld_mux_ctrl, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_MUX_CTRL); -static SENSOR_DEVICE_ATTR(cpld_mac_qsfp_sel_ctrl, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_MAC_QSFP_SEL_CTRL); -static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_1, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_1); -static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_2, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_2); -static SENSOR_DEVICE_ATTR(cpld_beacon_led_ctrl, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_BEACON_LED_CTRL); -static SENSOR_DEVICE_ATTR(cpld_port_led_clr_ctrl, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_PORT_LED_CLR_CTRL); -static SENSOR_DEVICE_ATTR(cpld_event_detect_ctrl, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_EVENT_DETECT_CTRL); -/* CPLD2 */ -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g0, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G0); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g1, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G1); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g2, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G2); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g3, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G3); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g0, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G0); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g1, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G1); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g2, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G2); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g3, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G3); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g0, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G0); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g1, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G1); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g2, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G2); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g3, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G3); -static SENSOR_DEVICE_ATTR(cpld_sfp_txfault, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_SFP_TXFAULT); -static SENSOR_DEVICE_ATTR(cpld_sfp_abs, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_SFP_ABS); -static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_SFP_RXLOS); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g0, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G0); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g1, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G1); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g2, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G2); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g3, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G3); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g0, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G0); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g1, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G1); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g2, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G2); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g3, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G3); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g0, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G0); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g1, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G1); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g2, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G2); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g3, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G3); -static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_mask, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_SFP_TXFAULT_MASK); -static SENSOR_DEVICE_ATTR(cpld_sfp_abs_mask, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_SFP_ABS_MASK); -static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_mask, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_SFP_RXLOS_MASK); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g0, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G0); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g1, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G1); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g2, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G2); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g3, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G3); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g0, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G0); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g1, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G1); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g2, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G2); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g3, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G3); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g0, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G0); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g1, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G1); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g2, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G2); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g3, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G3); -static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_event, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_SFP_TXFAULT_EVENT); -static SENSOR_DEVICE_ATTR(cpld_sfp_abs_event, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_SFP_ABS_EVENT); -static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_event, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_SFP_RXLOS_EVENT); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g0, \ - S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, \ - CPLD_QSFPDD_RESET_CTRL_G0); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g1, \ - S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, \ - CPLD_QSFPDD_RESET_CTRL_G1); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g2, \ - S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, \ - CPLD_QSFPDD_RESET_CTRL_G2); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g3, \ - S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, \ - CPLD_QSFPDD_RESET_CTRL_G3); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g0, \ - S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, \ - CPLD_QSFPDD_LP_MODE_G0); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g1, \ - S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, \ - CPLD_QSFPDD_LP_MODE_G1); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g2, \ - S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, \ - CPLD_QSFPDD_LP_MODE_G2); -static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g3, \ - S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, \ - CPLD_QSFPDD_LP_MODE_G3); -static SENSOR_DEVICE_ATTR(cpld_sfp_tx_dis, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_SFP_TX_DIS); -static SENSOR_DEVICE_ATTR(cpld_sfp_rs, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_SFP_RS); -static SENSOR_DEVICE_ATTR(cpld_sfp_ts, S_IWUSR | S_IRUGO, \ - read_cpld_callback, write_cpld_callback, CPLD_SFP_TS); -static SENSOR_DEVICE_ATTR(cpld_port_int_status, S_IRUGO, \ - read_cpld_callback, NULL, CPLD_PORT_INT_STATUS); -//BSP DEBUG -static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, \ - read_bsp_callback, write_bsp_callback, BSP_DEBUG); - -/* define support attributes of cpldx , total 3 */ -/* cpld 1 */ -static struct attribute *s9300_cpld1_attributes[] = { - &sensor_dev_attr_cpld_access_register.dev_attr.attr, - &sensor_dev_attr_cpld_register_value.dev_attr.attr, - &sensor_dev_attr_cpld_sku_id.dev_attr.attr, - &sensor_dev_attr_cpld_hw_rev.dev_attr.attr, - &sensor_dev_attr_cpld_deph_rev.dev_attr.attr, - &sensor_dev_attr_cpld_build_rev.dev_attr.attr, - &sensor_dev_attr_cpld_id_type.dev_attr.attr, - &sensor_dev_attr_cpld_major_ver.dev_attr.attr, - &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, - &sensor_dev_attr_cpld_build_ver.dev_attr.attr, - &sensor_dev_attr_cpld_version_h.dev_attr.attr, - &sensor_dev_attr_cpld_id.dev_attr.attr, - &sensor_dev_attr_cpld_mac_intr.dev_attr.attr, - &sensor_dev_attr_cpld_10g_phy_intr.dev_attr.attr, - &sensor_dev_attr_cpld_cpld_fru_intr.dev_attr.attr, - &sensor_dev_attr_cpld_thermal_alert_intr.dev_attr.attr, - &sensor_dev_attr_cpld_misc_intr.dev_attr.attr, - &sensor_dev_attr_cpld_system_intr.dev_attr.attr, - &sensor_dev_attr_cpld_mac_intr_mask.dev_attr.attr, - &sensor_dev_attr_cpld_10g_phy_intr_mask.dev_attr.attr, - &sensor_dev_attr_cpld_cpld_fru_intr_mask.dev_attr.attr, - &sensor_dev_attr_cpld_thermal_alert_intr_mask.dev_attr.attr, - &sensor_dev_attr_cpld_misc_intr_mask.dev_attr.attr, - &sensor_dev_attr_cpld_mac_intr_event.dev_attr.attr, - &sensor_dev_attr_cpld_10g_phy_intr_event.dev_attr.attr, - &sensor_dev_attr_cpld_cpld_fru_intr_event.dev_attr.attr, - &sensor_dev_attr_cpld_thermal_alert_intr_event.dev_attr.attr, - &sensor_dev_attr_cpld_misc_intr_event.dev_attr.attr, - &sensor_dev_attr_cpld_mac_rst.dev_attr.attr, - &sensor_dev_attr_cpld_10g_phy_rst.dev_attr.attr, - &sensor_dev_attr_cpld_bmc_rst.dev_attr.attr, - &sensor_dev_attr_cpld_usb_rst.dev_attr.attr, - &sensor_dev_attr_cpld_mux_rst.dev_attr.attr, - &sensor_dev_attr_cpld_misc_rst.dev_attr.attr, - &sensor_dev_attr_cpld_bmc_watchdog.dev_attr.attr, - &sensor_dev_attr_cpld_dau_bd_pres.dev_attr.attr, - &sensor_dev_attr_cpld_psu_status.dev_attr.attr, - &sensor_dev_attr_cpld_sys_pw_status.dev_attr.attr, - &sensor_dev_attr_cpld_misc.dev_attr.attr, - &sensor_dev_attr_cpld_mux_ctrl.dev_attr.attr, - &sensor_dev_attr_cpld_mac_qsfp_sel_ctrl.dev_attr.attr, - &sensor_dev_attr_cpld_sys_led_ctrl_1.dev_attr.attr, - &sensor_dev_attr_cpld_sys_led_ctrl_2.dev_attr.attr, - &sensor_dev_attr_cpld_beacon_led_ctrl.dev_attr.attr, - &sensor_dev_attr_cpld_port_led_clr_ctrl.dev_attr.attr, - &sensor_dev_attr_cpld_event_detect_ctrl.dev_attr.attr, - &sensor_dev_attr_bsp_debug.dev_attr.attr, - NULL -}; - -/* cpld 2 */ -static struct attribute *s9300_cpld2_attributes[] = { - &sensor_dev_attr_cpld_access_register.dev_attr.attr, - &sensor_dev_attr_cpld_register_value.dev_attr.attr, - &sensor_dev_attr_cpld_major_ver.dev_attr.attr, - &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, - &sensor_dev_attr_cpld_build_ver.dev_attr.attr, - &sensor_dev_attr_cpld_version_h.dev_attr.attr, - &sensor_dev_attr_cpld_id.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_mod_int_g0.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_mod_int_g1.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_mod_int_g2.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_mod_int_g3.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_pres_g0.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_pres_g1.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_pres_g2.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_pres_g3.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_fuse_int_g0.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_fuse_int_g1.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_fuse_int_g2.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_fuse_int_g3.dev_attr.attr, - &sensor_dev_attr_cpld_sfp_txfault.dev_attr.attr, - &sensor_dev_attr_cpld_sfp_abs.dev_attr.attr, - &sensor_dev_attr_cpld_sfp_rxlos.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g0.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g1.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g2.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g3.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_pres_mask_g0.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_pres_mask_g1.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_pres_mask_g2.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_pres_mask_g3.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g0.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g1.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g2.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g3.dev_attr.attr, - &sensor_dev_attr_cpld_sfp_txfault_mask.dev_attr.attr, - &sensor_dev_attr_cpld_sfp_abs_mask.dev_attr.attr, - &sensor_dev_attr_cpld_sfp_rxlos_mask.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g0.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g1.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g2.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g3.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_pres_event_g0.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_pres_event_g1.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_pres_event_g2.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_pres_event_g3.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g0.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g1.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g2.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g3.dev_attr.attr, - &sensor_dev_attr_cpld_sfp_txfault_event.dev_attr.attr, - &sensor_dev_attr_cpld_sfp_abs_event.dev_attr.attr, - &sensor_dev_attr_cpld_sfp_rxlos_event.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g0.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g1.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g2.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g3.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_lp_mode_g0.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_lp_mode_g1.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_lp_mode_g2.dev_attr.attr, - &sensor_dev_attr_cpld_qsfpdd_lp_mode_g3.dev_attr.attr, - &sensor_dev_attr_cpld_sfp_tx_dis.dev_attr.attr, - &sensor_dev_attr_cpld_sfp_rs.dev_attr.attr, - &sensor_dev_attr_cpld_sfp_ts.dev_attr.attr, - &sensor_dev_attr_cpld_port_int_status.dev_attr.attr, - NULL -}; - -/* cpld 3 */ -static struct attribute *s9300_cpld3_attributes[] = { - &sensor_dev_attr_cpld_access_register.dev_attr.attr, - &sensor_dev_attr_cpld_register_value.dev_attr.attr, - &sensor_dev_attr_cpld_major_ver.dev_attr.attr, - &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, - &sensor_dev_attr_cpld_build_ver.dev_attr.attr, - &sensor_dev_attr_cpld_version_h.dev_attr.attr, - &sensor_dev_attr_cpld_id.dev_attr.attr, - NULL -}; - -/* cpld 1 attributes group */ -static const struct attribute_group s9300_cpld1_group = { - .attrs = s9300_cpld1_attributes, -}; -/* cpld 2 attributes group */ -static const struct attribute_group s9300_cpld2_group = { - .attrs = s9300_cpld2_attributes, -}; -/* cpld 3 attributes group */ -static const struct attribute_group s9300_cpld3_group = { - .attrs = s9300_cpld3_attributes, -}; - -static int _bsp_log(u8 log_type, char *fmt, ...) -{ - if ((log_type==LOG_READ && enable_log_read) || - (log_type==LOG_WRITE && enable_log_write)) { - va_list args; - int r; - - va_start(args, fmt); - r = vprintk(fmt, args); - va_end(args); - - return r; - } else { - return 0; - } -} - -static int _config_bsp_log(u8 log_type) -{ - switch(log_type) { - case LOG_NONE: - enable_log_read = LOG_DISABLE; - enable_log_write = LOG_DISABLE; - break; - case LOG_RW: - enable_log_read = LOG_ENABLE; - enable_log_write = LOG_ENABLE; - break; - case LOG_READ: - enable_log_read = LOG_ENABLE; - enable_log_write = LOG_DISABLE; - break; - case LOG_WRITE: - enable_log_read = LOG_DISABLE; - enable_log_write = LOG_ENABLE; - break; - default: - return -EINVAL; - } - return 0; -} - -/* get bsp value */ -static ssize_t read_bsp(char *buf, char *str) -{ - ssize_t len=0; - - len=sprintf(buf, "%s", str); - BSP_LOG_R("reg_val=%s", str); - - return len; -} - -/* set bsp value */ -static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) -{ - snprintf(str, str_len, "%s", buf); - BSP_LOG_W("reg_val=%s", str); - - return count; -} - -/* get bsp parameter value */ -static ssize_t read_bsp_callback(struct device *dev, - struct device_attribute *da, char *buf) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - int str_len=0; - char *str=NULL; - - switch (attr->index) { - case BSP_DEBUG: - str = bsp_debug; - str_len = sizeof(bsp_debug); - break; - default: - return -EINVAL; - } - return read_bsp(buf, str); -} - -/* set bsp parameter value */ -static ssize_t write_bsp_callback(struct device *dev, - struct device_attribute *da, const char *buf, size_t count) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - int str_len=0; - char *str=NULL; - ssize_t ret = 0; - u8 bsp_debug_u8 = 0; - - switch (attr->index) { - case BSP_DEBUG: - str = bsp_debug; - str_len = sizeof(str); - ret = write_bsp(buf, str, str_len, count); - - if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { - return -EINVAL; - } else if (_config_bsp_log(bsp_debug_u8) < 0) { - return -EINVAL; - } - return ret; - default: - return -EINVAL; - } - return 0; -} - -/* read access register from cpld data */ -static ssize_t read_access_register(struct device *dev, - struct device_attribute *da, - char *buf) -{ - struct i2c_client *client = to_i2c_client(dev); - struct cpld_data *data = i2c_get_clientdata(client); - u8 reg = data->access_reg; - - return sprintf(buf, "0x%x\n", reg); -} - -/* write access register to cpld data */ -static ssize_t write_access_register(struct device *dev, - struct device_attribute *da, - const char *buf, - size_t count) -{ - struct i2c_client *client = to_i2c_client(dev); - struct cpld_data *data = i2c_get_clientdata(client); - u8 reg; - - if (kstrtou8(buf, 0, ®) < 0) - return -EINVAL; - - data->access_reg = reg; - return count; -} - -/* read the value of access register in cpld data */ -static ssize_t read_register_value(struct device *dev, - struct device_attribute *da, - char *buf) -{ - struct i2c_client *client = to_i2c_client(dev); - struct cpld_data *data = i2c_get_clientdata(client); - u8 reg = data->access_reg; - int reg_val; - - I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); - - if (reg_val < 0) - return reg_val; - - return sprintf(buf, "0x%x\n", reg_val); -} - -/* wrtie the value to access register in cpld data */ -static ssize_t write_register_value(struct device *dev, - struct device_attribute *da, - const char *buf, - size_t count) -{ - struct i2c_client *client = to_i2c_client(dev); - struct cpld_data *data = i2c_get_clientdata(client); - int ret = -EIO; - u8 reg = data->access_reg; - u8 reg_val; - - if (kstrtou8(buf, 0, ®_val) < 0) - return -EINVAL; - - I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, reg_val); - - if (unlikely(ret < 0)) { - dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret); - return ret; - } - - return count; -} - -/* get cpld register value */ -static ssize_t read_cpld_reg(struct device *dev, - char *buf, - u8 reg) -{ - int reg_val; - - if (read_cpld_reg_raw_int(dev, reg, ®_val)) - return sprintf(buf, "0x%02x\n", reg_val); - else - return reg_val; -} - -static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val) -{ - struct i2c_client *client = to_i2c_client(dev); - struct cpld_data *data = i2c_get_clientdata(client); - I2C_READ_BYTE_DATA(*val, &data->access_lock, client, reg); - if (unlikely(*val < 0)) { - dev_err(dev, "read_cpld_reg_raw_int() error, return=%d\n", *val); - return false; - } - return true; -} - -static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno) -{ - int reg_val; - - if (read_cpld_reg_raw_int(dev, reg, ®_val)) { - *val = (u8)reg_val; - return true; - } else { - *errno = reg_val; - return false; - } -} - -/* handle read for attributes */ -static ssize_t read_cpld_callback(struct device *dev, - struct device_attribute *da, char *buf) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - u8 reg = 0; - - switch (attr->index) { - case CPLD_SKU_ID: - reg = CPLD_SKU_ID_REG; - break; - case CPLD_ID: - reg = CPLD_ID_REG; - break; - case CPLD_BUILD_VER: - reg = CPLD_BUILD_VER_REG; - break; - case CPLD_MAC_INTR: - reg = CPLD_MAC_INTR_REG; - break; - case CPLD_10G_PHY_INTR: - reg = CPLD_10G_PHY_INTR_REG; - break; - case CPLD_CPLD_FRU_INTR: - reg = CPLD_CPLD_FRU_INTR_REG; - break; - case CPLD_THERMAL_ALERT_INTR: - reg = CPLD_THERMAL_ALERT_INTR_REG; - break; - case CPLD_MISC_INTR: - reg = CPLD_MISC_INTR_REG; - break; - case CPLD_SYSTEM_INTR: - reg = CPLD_SYSTEM_INTR_REG; - break; - case CPLD_MAC_INTR_MASK: - reg = CPLD_MAC_INTR_MASK_REG; - break; - case CPLD_10G_PHY_INTR_MASK: - reg = CPLD_10G_PHY_INTR_MASK_REG; - break; - case CPLD_CPLD_FRU_INTR_MASK: - reg = CPLD_CPLD_FRU_INTR_MASK_REG; - break; - case CPLD_THERMAL_ALERT_INTR_MASK: - reg = CPLD_THERMAL_ALERT_INTR_MASK_REG; - break; - case CPLD_MISC_INTR_MASK: - reg = CPLD_MISC_INTR_MASK_REG; - break; - case CPLD_MAC_INTR_EVENT: - reg = CPLD_MAC_INTR_EVENT_REG; - break; - case CPLD_10G_PHY_INTR_EVENT: - reg = CPLD_10G_PHY_INTR_EVENT_REG; - break; - case CPLD_CPLD_FRU_INTR_EVENT: - reg = CPLD_CPLD_FRU_INTR_EVENT_REG; - break; - case CPLD_THERMAL_ALERT_INTR_EVENT: - reg = CPLD_THERMAL_ALERT_INTR_EVENT_REG; - break; - case CPLD_MISC_INTR_EVENT: - reg = CPLD_MISC_INTR_EVENT_REG; - break; - case CPLD_MAC_RST: - reg = CPLD_MAC_RST_REG; - break; - case CPLD_10G_PHY_RST: - reg = CPLD_10G_PHY_RST_REG; - break; - case CPLD_BMC_RST: - reg = CPLD_BMC_RST_REG; - break; - case CPLD_USB_RST: - reg = CPLD_USB_RST_REG; - break; - case CPLD_MUX_RST: - reg = CPLD_MUX_RST_REG; - break; - case CPLD_MISC_RST: - reg = CPLD_MISC_RST_REG; - break; - case CPLD_BMC_WATCHDOG: - reg = CPLD_BMC_WATCHDOG_REG; - break; - case CPLD_DAU_BD_PRES: - reg = CPLD_DAU_BD_PRES_REG; - break; - case CPLD_PSU_STATUS: - reg = CPLD_PSU_STATUS_REG; - break; - case CPLD_SYS_PW_STATUS: - reg = CPLD_SYS_PW_STATUS_REG; - break; - case CPLD_MISC: - reg = CPLD_MISC_REG; - break; - case CPLD_MUX_CTRL: - reg = CPLD_MUX_CTRL_REG; - break; - case CPLD_MAC_QSFP_SEL_CTRL: - reg = CPLD_MAC_QSFP_SEL_CTRL_REG; - break; - case CPLD_SYS_LED_CTRL_1: - reg = CPLD_SYS_LED_CTRL_1_REG; - break; - case CPLD_SYS_LED_CTRL_2: - reg = CPLD_SYS_LED_CTRL_2_REG; - break; - case CPLD_BEACON_LED_CTRL: - reg = CPLD_BEACON_LED_CTRL_REG; - break; - case CPLD_PORT_LED_CLR_CTRL: - reg = CPLD_PORT_LED_CLR_CTRL_REG; - break; - case CPLD_EVENT_DETECT_CTRL: - reg = CPLD_EVENT_DETECT_CTRL_REG; - break; - case CPLD_QSFPDD_MOD_INT_G0: - reg = CPLD_QSFPDD_MOD_INT_G0_REG; - break; - case CPLD_QSFPDD_MOD_INT_G1: - reg = CPLD_QSFPDD_MOD_INT_G1_REG; - break; - case CPLD_QSFPDD_MOD_INT_G2: - reg = CPLD_QSFPDD_MOD_INT_G2_REG; - break; - case CPLD_QSFPDD_MOD_INT_G3: - reg = CPLD_QSFPDD_MOD_INT_G3_REG; - break; - case CPLD_QSFPDD_PRES_G0: - reg = CPLD_QSFPDD_PRES_G0_REG; - break; - case CPLD_QSFPDD_PRES_G1: - reg = CPLD_QSFPDD_PRES_G1_REG; - break; - case CPLD_QSFPDD_PRES_G2: - reg = CPLD_QSFPDD_PRES_G2_REG; - break; - case CPLD_QSFPDD_PRES_G3: - reg = CPLD_QSFPDD_PRES_G3_REG; - break; - case CPLD_QSFPDD_FUSE_INT_G0: - reg = CPLD_QSFPDD_FUSE_INT_G0_REG; - break; - case CPLD_QSFPDD_FUSE_INT_G1: - reg = CPLD_QSFPDD_FUSE_INT_G1_REG; - break; - case CPLD_QSFPDD_FUSE_INT_G2: - reg = CPLD_QSFPDD_FUSE_INT_G2_REG; - break; - case CPLD_QSFPDD_FUSE_INT_G3: - reg = CPLD_QSFPDD_FUSE_INT_G3_REG; - break; - case CPLD_SFP_TXFAULT: - reg = CPLD_SFP_TXFAULT_REG; - break; - case CPLD_SFP_ABS: - reg = CPLD_SFP_ABS_REG; - break; - case CPLD_SFP_RXLOS: - reg = CPLD_SFP_RXLOS_REG; - break; - case CPLD_QSFPDD_MOD_INT_MASK_G0: - reg = CPLD_QSFPDD_MOD_INT_MASK_G0_REG; - break; - case CPLD_QSFPDD_MOD_INT_MASK_G1: - reg = CPLD_QSFPDD_MOD_INT_MASK_G1_REG; - break; - case CPLD_QSFPDD_MOD_INT_MASK_G2: - reg = CPLD_QSFPDD_MOD_INT_MASK_G2_REG; - break; - case CPLD_QSFPDD_MOD_INT_MASK_G3: - reg = CPLD_QSFPDD_MOD_INT_MASK_G3_REG; - break; - case CPLD_QSFPDD_PRES_MASK_G0: - reg = CPLD_QSFPDD_PRES_MASK_G0_REG; - break; - case CPLD_QSFPDD_PRES_MASK_G1: - reg = CPLD_QSFPDD_PRES_MASK_G1_REG; - break; - case CPLD_QSFPDD_PRES_MASK_G2: - reg = CPLD_QSFPDD_PRES_MASK_G2_REG; - break; - case CPLD_QSFPDD_PRES_MASK_G3: - reg = CPLD_QSFPDD_PRES_MASK_G3_REG; - break; - case CPLD_QSFPDD_FUSE_INT_MASK_G0: - reg = CPLD_QSFPDD_FUSE_INT_MASK_G0_REG; - break; - case CPLD_QSFPDD_FUSE_INT_MASK_G1: - reg = CPLD_QSFPDD_FUSE_INT_MASK_G1_REG; - break; - case CPLD_QSFPDD_FUSE_INT_MASK_G2: - reg = CPLD_QSFPDD_FUSE_INT_MASK_G2_REG; - break; - case CPLD_QSFPDD_FUSE_INT_MASK_G3: - reg = CPLD_QSFPDD_FUSE_INT_MASK_G3_REG; - break; - case CPLD_SFP_TXFAULT_MASK: - reg = CPLD_SFP_TXFAULT_MASK_REG; - break; - case CPLD_SFP_ABS_MASK: - reg = CPLD_SFP_ABS_MASK_REG; - break; - case CPLD_SFP_RXLOS_MASK: - reg = CPLD_SFP_RXLOS_MASK_REG; - break; - case CPLD_QSFPDD_MOD_INT_EVENT_G0: - reg = CPLD_QSFPDD_MOD_INT_EVENT_G0_REG; - break; - case CPLD_QSFPDD_MOD_INT_EVENT_G1: - reg = CPLD_QSFPDD_MOD_INT_EVENT_G1_REG; - break; - case CPLD_QSFPDD_MOD_INT_EVENT_G2: - reg = CPLD_QSFPDD_MOD_INT_EVENT_G2_REG; - break; - case CPLD_QSFPDD_MOD_INT_EVENT_G3: - reg = CPLD_QSFPDD_MOD_INT_EVENT_G3_REG; - break; - case CPLD_QSFPDD_PRES_EVENT_G0: - reg = CPLD_QSFPDD_PRES_EVENT_G0_REG; - break; - case CPLD_QSFPDD_PRES_EVENT_G1: - reg = CPLD_QSFPDD_PRES_EVENT_G1_REG; - break; - case CPLD_QSFPDD_PRES_EVENT_G2: - reg = CPLD_QSFPDD_PRES_EVENT_G2_REG; - break; - case CPLD_QSFPDD_PRES_EVENT_G3: - reg = CPLD_QSFPDD_PRES_EVENT_G3_REG; - break; - case CPLD_QSFPDD_FUSE_INT_EVENT_G0: - reg = CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG; - break; - case CPLD_QSFPDD_FUSE_INT_EVENT_G1: - reg = CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG; - break; - case CPLD_QSFPDD_FUSE_INT_EVENT_G2: - reg = CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG; - break; - case CPLD_QSFPDD_FUSE_INT_EVENT_G3: - reg = CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG; - break; - case CPLD_SFP_TXFAULT_EVENT: - reg = CPLD_SFP_TXFAULT_EVENT_REG; - break; - case CPLD_SFP_ABS_EVENT: - reg = CPLD_SFP_ABS_EVENT_REG; - break; - case CPLD_SFP_RXLOS_EVENT: - reg = CPLD_SFP_RXLOS_EVENT_REG; - break; - case CPLD_QSFPDD_RESET_CTRL_G0: - reg = CPLD_QSFPDD_RESET_CTRL_G0_REG; - break; - case CPLD_QSFPDD_RESET_CTRL_G1: - reg = CPLD_QSFPDD_RESET_CTRL_G1_REG; - break; - case CPLD_QSFPDD_RESET_CTRL_G2: - reg = CPLD_QSFPDD_RESET_CTRL_G2_REG; - break; - case CPLD_QSFPDD_RESET_CTRL_G3: - reg = CPLD_QSFPDD_RESET_CTRL_G3_REG; - break; - case CPLD_QSFPDD_LP_MODE_G0: - reg = CPLD_QSFPDD_LP_MODE_G0_REG; - break; - case CPLD_QSFPDD_LP_MODE_G1: - reg = CPLD_QSFPDD_LP_MODE_G1_REG; - break; - case CPLD_QSFPDD_LP_MODE_G2: - reg = CPLD_QSFPDD_LP_MODE_G2_REG; - break; - case CPLD_QSFPDD_LP_MODE_G3: - reg = CPLD_QSFPDD_LP_MODE_G3_REG; - break; - case CPLD_SFP_TX_DIS: - reg = CPLD_SFP_TX_DIS_REG; - break; - case CPLD_SFP_RS: - reg = CPLD_SFP_RS_REG; - break; - case CPLD_SFP_TS: - reg = CPLD_SFP_TS_REG; - break; - case CPLD_PORT_INT_STATUS: - reg = CPLD_PORT_INT_STATUS_REG; - break; - default: - return -EINVAL; - } - return read_cpld_reg(dev, buf, reg); -} - -/* handle read for hw_rev attributes */ -static ssize_t read_hw_rev_cb(struct device *dev, - struct device_attribute *da, char *buf) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - u8 reg = CPLD_HW_REV_REG; - u8 reg_val = 0; - int errno = 0; - u8 res; - - if (!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) - return errno; - - switch (attr->index) { - case CPLD_HW_REV: - HW_REV_GET(reg_val, res); - break; - case CPLD_DEPH_REV: - DEPH_REV_GET(reg_val, res); - break; - case CPLD_BUILD_REV: - BUILD_REV_GET(reg_val, res); - break; - case CPLD_ID_TYPE: - ID_TYPE_GET(reg_val, res); - break; - default: - return -EINVAL; - } - return sprintf(buf, "0x%02x\n", res); -} - -/* handle read for cpld_version attributes */ -static ssize_t read_cpld_version_cb(struct device *dev, - struct device_attribute *da, char *buf) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - u8 reg = CPLD_VERSION_REG; - u8 reg_val = 0; - int errno = 0; - u8 res; - - if (!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) - return errno; - - switch (attr->index) { - case CPLD_MAJOR_VER: - CPLD_MAJOR_VERSION_GET(reg_val, res); - break; - case CPLD_MINOR_VER: - CPLD_MINOR_VERSION_GET(reg_val, res); - break; - default: - return -EINVAL; - } - return sprintf(buf, "0x%02x\n", res); -} - -/* handle read human-readable string for cpld_version attributes */ -static ssize_t read_cpld_version_h_cb(struct device *dev, - struct device_attribute *da, char *buf) -{ - u8 reg = CPLD_VERSION_REG; - u8 reg_val = 0; - int errno = 0; - u8 major, minor, build; - - //get major/minor register value - if(!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) - return errno; - CPLD_MAJOR_VERSION_GET(reg_val, major); - CPLD_MINOR_VERSION_GET(reg_val, minor); - - //get build register value - reg = CPLD_BUILD_VER_REG; - if(!read_cpld_reg_raw_byte(dev, reg, &build, &errno)) - return errno; - - //version string format : xx.xx.xxx - return sprintf(buf, "%d.%02d.%03d\n", major, minor, build); -} - -/* handle write for attributes */ -static ssize_t write_cpld_callback(struct device *dev, - struct device_attribute *da, const char *buf, size_t count) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - u8 reg = 0; - - switch (attr->index) { - case CPLD_MAC_INTR_MASK: - reg = CPLD_MAC_INTR_MASK_REG; - break; - case CPLD_10G_PHY_INTR_MASK: - reg = CPLD_10G_PHY_INTR_MASK_REG; - break; - case CPLD_CPLD_FRU_INTR_MASK: - reg = CPLD_CPLD_FRU_INTR_MASK_REG; - break; - case CPLD_THERMAL_ALERT_INTR_MASK: - reg = CPLD_THERMAL_ALERT_INTR_MASK_REG; - break; - case CPLD_MISC_INTR_MASK: - reg = CPLD_MISC_INTR_MASK_REG; - break; - case CPLD_MAC_RST: - reg = CPLD_MAC_RST_REG; - break; - case CPLD_10G_PHY_RST: - reg = CPLD_10G_PHY_RST_REG; - break; - case CPLD_BMC_RST: - reg = CPLD_BMC_RST_REG; - break; - case CPLD_USB_RST: - reg = CPLD_USB_RST_REG; - break; - case CPLD_MUX_RST: - reg = CPLD_MUX_RST_REG; - break; - case CPLD_MISC_RST: - reg = CPLD_MISC_RST_REG; - break; - case CPLD_BMC_WATCHDOG: - reg = CPLD_BMC_WATCHDOG_REG; - break; - case CPLD_MUX_CTRL: - reg = CPLD_MUX_CTRL_REG; - break; - case CPLD_MAC_QSFP_SEL_CTRL: - reg = CPLD_MAC_QSFP_SEL_CTRL_REG; - break; - case CPLD_BEACON_LED_CTRL: - reg = CPLD_BEACON_LED_CTRL_REG; - break; - case CPLD_PORT_LED_CLR_CTRL: - reg = CPLD_PORT_LED_CLR_CTRL_REG; - break; - case CPLD_EVENT_DETECT_CTRL: - reg = CPLD_EVENT_DETECT_CTRL_REG; - break; - case CPLD_QSFPDD_MOD_INT_MASK_G0: - reg = CPLD_QSFPDD_MOD_INT_MASK_G0_REG; - break; - case CPLD_QSFPDD_MOD_INT_MASK_G1: - reg = CPLD_QSFPDD_MOD_INT_MASK_G1_REG; - break; - case CPLD_QSFPDD_MOD_INT_MASK_G2: - reg = CPLD_QSFPDD_MOD_INT_MASK_G2_REG; - break; - case CPLD_QSFPDD_MOD_INT_MASK_G3: - reg = CPLD_QSFPDD_MOD_INT_MASK_G3_REG; - break; - case CPLD_QSFPDD_PRES_MASK_G0: - reg = CPLD_QSFPDD_PRES_MASK_G0_REG; - break; - case CPLD_QSFPDD_PRES_MASK_G1: - reg = CPLD_QSFPDD_PRES_MASK_G1_REG; - break; - case CPLD_QSFPDD_PRES_MASK_G2: - reg = CPLD_QSFPDD_PRES_MASK_G2_REG; - break; - case CPLD_QSFPDD_PRES_MASK_G3: - reg = CPLD_QSFPDD_PRES_MASK_G3_REG; - break; - case CPLD_QSFPDD_FUSE_INT_MASK_G0: - reg = CPLD_QSFPDD_FUSE_INT_MASK_G0_REG; - break; - case CPLD_QSFPDD_FUSE_INT_MASK_G1: - reg = CPLD_QSFPDD_FUSE_INT_MASK_G1_REG; - break; - case CPLD_QSFPDD_FUSE_INT_MASK_G2: - reg = CPLD_QSFPDD_FUSE_INT_MASK_G2_REG; - break; - case CPLD_QSFPDD_FUSE_INT_MASK_G3: - reg = CPLD_QSFPDD_FUSE_INT_MASK_G3_REG; - break; - case CPLD_SFP_TXFAULT_MASK: - reg = CPLD_SFP_TXFAULT_MASK_REG; - break; - case CPLD_SFP_ABS_MASK: - reg = CPLD_SFP_ABS_MASK_REG; - break; - case CPLD_SFP_RXLOS_MASK: - reg = CPLD_SFP_RXLOS_MASK_REG; - break; - case CPLD_QSFPDD_RESET_CTRL_G0: - reg = CPLD_QSFPDD_RESET_CTRL_G0_REG; - break; - case CPLD_QSFPDD_RESET_CTRL_G1: - reg = CPLD_QSFPDD_RESET_CTRL_G1_REG; - break; - case CPLD_QSFPDD_RESET_CTRL_G2: - reg = CPLD_QSFPDD_RESET_CTRL_G2_REG; - break; - case CPLD_QSFPDD_RESET_CTRL_G3: - reg = CPLD_QSFPDD_RESET_CTRL_G3_REG; - break; - case CPLD_QSFPDD_LP_MODE_G0: - reg = CPLD_QSFPDD_LP_MODE_G0_REG; - break; - case CPLD_QSFPDD_LP_MODE_G1: - reg = CPLD_QSFPDD_LP_MODE_G1_REG; - break; - case CPLD_QSFPDD_LP_MODE_G2: - reg = CPLD_QSFPDD_LP_MODE_G2_REG; - break; - case CPLD_QSFPDD_LP_MODE_G3: - reg = CPLD_QSFPDD_LP_MODE_G3_REG; - break; - case CPLD_SFP_TX_DIS: - reg = CPLD_SFP_TX_DIS_REG; - break; - case CPLD_SFP_RS: - reg = CPLD_SFP_RS_REG; - break; - case CPLD_SFP_TS: - reg = CPLD_SFP_TS_REG; - break; - default: - return -EINVAL; - } - return write_cpld_reg(dev, buf, count, reg); -} - -/* set cpld register value */ -static ssize_t write_cpld_reg(struct device *dev, - const char *buf, - size_t count, - u8 reg) -{ - struct i2c_client *client = to_i2c_client(dev); - struct cpld_data *data = i2c_get_clientdata(client); - u8 reg_val; - int ret; - - if (kstrtou8(buf, 0, ®_val) < 0) - return -EINVAL; - - I2C_WRITE_BYTE_DATA(ret, &data->access_lock, - client, reg, reg_val); - - if (unlikely(ret < 0)) { - dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret); - return ret; - } - - return count; -} - -/* add valid cpld client to list */ -static void s9300_cpld_add_client(struct i2c_client *client) -{ - struct cpld_client_node *node = NULL; - - node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); - if (!node) { - dev_info(&client->dev, - "Can't allocate cpld_client_node for index %d\n", - client->addr); - return; - } - - node->client = client; - - mutex_lock(&list_lock); - list_add(&node->list, &cpld_client_list); - mutex_unlock(&list_lock); -} - -/* remove exist cpld client in list */ -static void s9300_cpld_remove_client(struct i2c_client *client) -{ - struct list_head *list_node = NULL; - struct cpld_client_node *cpld_node = NULL; - int found = 0; - - mutex_lock(&list_lock); - list_for_each(list_node, &cpld_client_list) { - cpld_node = list_entry(list_node, - struct cpld_client_node, list); - - if (cpld_node->client == client) { - found = 1; - break; - } - } - - if (found) { - list_del(list_node); - kfree(cpld_node); - } - mutex_unlock(&list_lock); -} - -/* cpld drvier probe */ -static int s9300_cpld_probe(struct i2c_client *client, - const struct i2c_device_id *dev_id) -{ - int status; - struct cpld_data *data = NULL; - int ret = -EPERM; - int idx; - - data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); - if (!data) - return -ENOMEM; - - /* init cpld data for client */ - i2c_set_clientdata(client, data); - mutex_init(&data->access_lock); - - if (!i2c_check_functionality(client->adapter, - I2C_FUNC_SMBUS_BYTE_DATA)) { - dev_info(&client->dev, - "i2c_check_functionality failed (0x%x)\n", - client->addr); - status = -EIO; - goto exit; - } - - /* get cpld id from device */ - ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG); - - if (ret < 0) { - dev_info(&client->dev, - "fail to get cpld id (0x%x) at addr (0x%x)\n", - CPLD_ID_REG, client->addr); - status = -EIO; - goto exit; - } - - CPLD_ID_ID_GET(ret, idx); - - if (INVALID(idx, cpld1, cpld3)) { - dev_info(&client->dev, - "cpld id %d(device) not valid\n", idx); - //status = -EPERM; - //goto exit; - } - - data->index = dev_id->driver_data; - - /* register sysfs hooks for different cpld group */ - dev_info(&client->dev, "probe cpld with index %d\n", data->index); - switch (data->index) { - case cpld1: - status = sysfs_create_group(&client->dev.kobj, - &s9300_cpld1_group); - break; - case cpld2: - status = sysfs_create_group(&client->dev.kobj, - &s9300_cpld2_group); - break; - case cpld3: - status = sysfs_create_group(&client->dev.kobj, - &s9300_cpld3_group); - break; - default: - status = -EINVAL; - } - - if (status) - goto exit; - - dev_info(&client->dev, "chip found\n"); - - /* add probe chip to client list */ - s9300_cpld_add_client(client); - - return 0; -exit: - switch (data->index) { - case cpld1: - sysfs_remove_group(&client->dev.kobj, &s9300_cpld1_group); - break; - case cpld2: - sysfs_remove_group(&client->dev.kobj, &s9300_cpld2_group); - break; - case cpld3: - sysfs_remove_group(&client->dev.kobj, &s9300_cpld3_group); - break; - default: - break; - } - return status; -} - -/* cpld drvier remove */ -static int s9300_cpld_remove(struct i2c_client *client) -{ - struct cpld_data *data = i2c_get_clientdata(client); - - switch (data->index) { - case cpld1: - sysfs_remove_group(&client->dev.kobj, &s9300_cpld1_group); - break; - case cpld2: - sysfs_remove_group(&client->dev.kobj, &s9300_cpld2_group); - break; - case cpld3: - sysfs_remove_group(&client->dev.kobj, &s9300_cpld3_group); - break; - } - - s9300_cpld_remove_client(client); - return 0; -} - -MODULE_DEVICE_TABLE(i2c, s9300_cpld_id); - -static struct i2c_driver s9300_cpld_driver = { - .class = I2C_CLASS_HWMON, - .driver = { - .name = "x86_64_ufispace_s9300_32d_cpld", - }, - .probe = s9300_cpld_probe, - .remove = s9300_cpld_remove, - .id_table = s9300_cpld_id, - .address_list = cpld_i2c_addr, -}; - -/* provide cpld register read */ -/* cpld_idx indicate the index of cpld device */ -int s9300_cpld_read(u8 cpld_idx, - u8 reg) -{ - struct list_head *list_node = NULL; - struct cpld_client_node *cpld_node = NULL; - int ret = -EPERM; - struct cpld_data *data; - - list_for_each(list_node, &cpld_client_list) { - cpld_node = list_entry(list_node, - struct cpld_client_node, list); - data = i2c_get_clientdata(cpld_node->client); - if (data->index == cpld_idx) { - DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x", - cpld_idx, reg); - I2C_READ_BYTE_DATA(ret, &data->access_lock, - cpld_node->client, reg); - DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x = 0x%02x", - cpld_idx, reg, ret); - break; - } - } - - return ret; -} -EXPORT_SYMBOL(s9300_cpld_read); - -/* provide cpld register write */ -/* cpld_idx indicate the index of cpld device */ -int s9300_cpld_write(u8 cpld_idx, - u8 reg, - u8 value) -{ - struct list_head *list_node = NULL; - struct cpld_client_node *cpld_node = NULL; - int ret = -EIO; - struct cpld_data *data; - - list_for_each(list_node, &cpld_client_list) { - cpld_node = list_entry(list_node, - struct cpld_client_node, list); - data = i2c_get_clientdata(cpld_node->client); - - if (data->index == cpld_idx) { - I2C_WRITE_BYTE_DATA(ret, &data->access_lock, - cpld_node->client, - reg, value); - DEBUG_PRINT("cpld_idx=%d, write reg 0x%02x val 0x%02x, ret=%d", - cpld_idx, reg, value, ret); - break; - } - } - - return ret; -} -EXPORT_SYMBOL(s9300_cpld_write); - -static int __init s9300_cpld_init(void) -{ - mutex_init(&list_lock); - return i2c_add_driver(&s9300_cpld_driver); -} - -static void __exit s9300_cpld_exit(void) -{ - i2c_del_driver(&s9300_cpld_driver); -} - -MODULE_AUTHOR("Leo Lin "); -MODULE_DESCRIPTION("x86_64_ufispace_s9300_cpld driver"); -MODULE_LICENSE("GPL"); - -module_init(s9300_cpld_init); -module_exit(s9300_cpld_exit); +/* + * A i2c cpld driver for the ufispace_s9300_32d + * + * Copyright (C) 2017-2019 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "x86-64-ufispace-s9300-32d-cpld.h" + +#ifdef DEBUG +#define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#else +#define DEBUG_PRINT(fmt, args...) +#endif + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ + BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \ +} +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ + BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \ +} + +/* CPLD sysfs attributes index */ +enum s9300_cpld_sysfs_attributes { + /* CPLD1 */ + CPLD_ACCESS_REG, + CPLD_REGISTER_VAL, + CPLD_SKU_ID, + CPLD_HW_REV, + CPLD_DEPH_REV, + CPLD_BUILD_REV, + CPLD_ID_TYPE, + CPLD_MAJOR_VER, + CPLD_MINOR_VER, + CPLD_BUILD_VER, + CPLD_VERION_H, + CPLD_ID, + CPLD_MAC_INTR, + CPLD_10G_PHY_INTR, + CPLD_CPLD_FRU_INTR, + CPLD_THERMAL_ALERT_INTR, + CPLD_MISC_INTR, + CPLD_SYSTEM_INTR, + CPLD_MAC_INTR_MASK, + CPLD_10G_PHY_INTR_MASK, + CPLD_CPLD_FRU_INTR_MASK, + CPLD_THERMAL_ALERT_INTR_MASK, + CPLD_MISC_INTR_MASK, + CPLD_MAC_INTR_EVENT, + CPLD_10G_PHY_INTR_EVENT, + CPLD_CPLD_FRU_INTR_EVENT, + CPLD_THERMAL_ALERT_INTR_EVENT, + CPLD_MISC_INTR_EVENT, + CPLD_MAC_RST, + CPLD_10G_PHY_RST, + CPLD_BMC_RST, + CPLD_USB_RST, + CPLD_MUX_RST, + CPLD_MISC_RST, + CPLD_BMC_WATCHDOG, + CPLD_DAU_BD_PRES, + CPLD_PSU_STATUS, + CPLD_SYS_PW_STATUS, + CPLD_MISC, + CPLD_MUX_CTRL, + CPLD_MAC_QSFP_SEL_CTRL, + CPLD_SYS_LED_CTRL_1, + CPLD_SYS_LED_CTRL_2, + CPLD_BEACON_LED_CTRL, + CPLD_PORT_LED_CLR_CTRL, + CPLD_EVENT_DETECT_CTRL, + /* CPLD2 */ + CPLD_QSFPDD_MOD_INT_G0, + CPLD_QSFPDD_MOD_INT_G1, + CPLD_QSFPDD_MOD_INT_G2, + CPLD_QSFPDD_MOD_INT_G3, + CPLD_QSFPDD_PRES_G0, + CPLD_QSFPDD_PRES_G1, + CPLD_QSFPDD_PRES_G2, + CPLD_QSFPDD_PRES_G3, + CPLD_QSFPDD_FUSE_INT_G0, + CPLD_QSFPDD_FUSE_INT_G1, + CPLD_QSFPDD_FUSE_INT_G2, + CPLD_QSFPDD_FUSE_INT_G3, + CPLD_SFP_TXFAULT, + CPLD_SFP_ABS, + CPLD_SFP_RXLOS, + CPLD_QSFPDD_MOD_INT_MASK_G0, + CPLD_QSFPDD_MOD_INT_MASK_G1, + CPLD_QSFPDD_MOD_INT_MASK_G2, + CPLD_QSFPDD_MOD_INT_MASK_G3, + CPLD_QSFPDD_PRES_MASK_G0, + CPLD_QSFPDD_PRES_MASK_G1, + CPLD_QSFPDD_PRES_MASK_G2, + CPLD_QSFPDD_PRES_MASK_G3, + CPLD_QSFPDD_FUSE_INT_MASK_G0, + CPLD_QSFPDD_FUSE_INT_MASK_G1, + CPLD_QSFPDD_FUSE_INT_MASK_G2, + CPLD_QSFPDD_FUSE_INT_MASK_G3, + CPLD_SFP_TXFAULT_MASK, + CPLD_SFP_ABS_MASK, + CPLD_SFP_RXLOS_MASK, + CPLD_QSFPDD_MOD_INT_EVENT_G0, + CPLD_QSFPDD_MOD_INT_EVENT_G1, + CPLD_QSFPDD_MOD_INT_EVENT_G2, + CPLD_QSFPDD_MOD_INT_EVENT_G3, + CPLD_QSFPDD_PRES_EVENT_G0, + CPLD_QSFPDD_PRES_EVENT_G1, + CPLD_QSFPDD_PRES_EVENT_G2, + CPLD_QSFPDD_PRES_EVENT_G3, + CPLD_QSFPDD_FUSE_INT_EVENT_G0, + CPLD_QSFPDD_FUSE_INT_EVENT_G1, + CPLD_QSFPDD_FUSE_INT_EVENT_G2, + CPLD_QSFPDD_FUSE_INT_EVENT_G3, + CPLD_SFP_TXFAULT_EVENT, + CPLD_SFP_ABS_EVENT, + CPLD_SFP_RXLOS_EVENT, + CPLD_QSFPDD_RESET_CTRL_G0, + CPLD_QSFPDD_RESET_CTRL_G1, + CPLD_QSFPDD_RESET_CTRL_G2, + CPLD_QSFPDD_RESET_CTRL_G3, + CPLD_QSFPDD_LP_MODE_G0, + CPLD_QSFPDD_LP_MODE_G1, + CPLD_QSFPDD_LP_MODE_G2, + CPLD_QSFPDD_LP_MODE_G3, + CPLD_SFP_TX_DIS, + CPLD_SFP_RS, + CPLD_SFP_TS, + CPLD_PORT_INT_STATUS, + + //BSP DEBUG + BSP_DEBUG +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_hw_rev_cb(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_cpld_version_cb(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_cpld_version_h_cb(struct device *dev, + struct device_attribute *da, char *buf); +// cpld access api +static ssize_t read_cpld_reg(struct device *dev, char *buf, u8 reg); +static ssize_t write_cpld_reg(struct device *dev, const char *buf, size_t count, u8 reg); +static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno); +static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val); +// bsp debug api +static ssize_t read_bsp(char *buf, char *str); +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count); +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +/* CPLD device id and data */ +static const struct i2c_device_id s9300_cpld_id[] = { + { "s9300_32d_cpld1", cpld1 }, + { "s9300_32d_cpld2", cpld2 }, + { "s9300_32d_cpld3", cpld3 }, + {} +}; + +char bsp_debug[2]="0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; + +/* Addresses scanned for s9300_cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, 0x32, I2C_CLIENT_END }; + +/* define all support register access of cpld in attribute */ +/* CPLD1 */ +static SENSOR_DEVICE_ATTR(cpld_access_register, S_IWUSR | S_IRUGO, \ + read_access_register, write_access_register, CPLD_ACCESS_REG); +static SENSOR_DEVICE_ATTR(cpld_register_value, S_IWUSR | S_IRUGO, \ + read_register_value, write_register_value, CPLD_REGISTER_VAL); +static SENSOR_DEVICE_ATTR(cpld_sku_id, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SKU_ID); +static SENSOR_DEVICE_ATTR(cpld_hw_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_HW_REV); +static SENSOR_DEVICE_ATTR(cpld_deph_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_DEPH_REV); +static SENSOR_DEVICE_ATTR(cpld_build_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_BUILD_REV); +static SENSOR_DEVICE_ATTR(cpld_id_type, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_ID_TYPE); +static SENSOR_DEVICE_ATTR(cpld_major_ver, S_IRUGO, \ + read_cpld_version_cb, NULL, CPLD_MAJOR_VER); +static SENSOR_DEVICE_ATTR(cpld_minor_ver, S_IRUGO, \ + read_cpld_version_cb, NULL, CPLD_MINOR_VER); +static SENSOR_DEVICE_ATTR(cpld_build_ver, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_BUILD_VER); +static SENSOR_DEVICE_ATTR(cpld_version_h, S_IRUGO, \ + read_cpld_version_h_cb, NULL, CPLD_VERION_H); +static SENSOR_DEVICE_ATTR(cpld_id, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_ID); +static SENSOR_DEVICE_ATTR(cpld_mac_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MAC_INTR); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_10G_PHY_INTR); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR); +static SENSOR_DEVICE_ATTR(cpld_misc_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC_INTR); +static SENSOR_DEVICE_ATTR(cpld_system_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYSTEM_INTR); +static SENSOR_DEVICE_ATTR(cpld_mac_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_CPLD_FRU_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_THERMAL_ALERT_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_misc_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MISC_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_mac_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MAC_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_10G_PHY_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_misc_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_mac_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_RST); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_RST); +static SENSOR_DEVICE_ATTR(cpld_bmc_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BMC_RST); +static SENSOR_DEVICE_ATTR(cpld_usb_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_USB_RST); +static SENSOR_DEVICE_ATTR(cpld_mux_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MUX_RST); +static SENSOR_DEVICE_ATTR(cpld_misc_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MISC_RST); +static SENSOR_DEVICE_ATTR(cpld_bmc_watchdog, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BMC_WATCHDOG); +static SENSOR_DEVICE_ATTR(cpld_dau_bd_pres, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_DAU_BD_PRES); +static SENSOR_DEVICE_ATTR(cpld_psu_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_PSU_STATUS); +static SENSOR_DEVICE_ATTR(cpld_sys_pw_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_PW_STATUS); +static SENSOR_DEVICE_ATTR(cpld_misc, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC); +static SENSOR_DEVICE_ATTR(cpld_mux_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MUX_CTRL); +static SENSOR_DEVICE_ATTR(cpld_mac_qsfp_sel_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_QSFP_SEL_CTRL); +static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_1); +static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_2); +static SENSOR_DEVICE_ATTR(cpld_beacon_led_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BEACON_LED_CTRL); +static SENSOR_DEVICE_ATTR(cpld_port_led_clr_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_PORT_LED_CLR_CTRL); +static SENSOR_DEVICE_ATTR(cpld_event_detect_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_EVENT_DETECT_CTRL); +/* CPLD2 */ +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G3); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_TXFAULT); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_ABS); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_RXLOS); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g3, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g3, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g3, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G3); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TXFAULT_MASK); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_ABS_MASK); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_RXLOS_MASK); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G3); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_TXFAULT_EVENT); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_ABS_EVENT); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_RXLOS_EVENT); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g0, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g1, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g2, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g3, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g0, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g1, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g2, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g3, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE_G3); +static SENSOR_DEVICE_ATTR(cpld_sfp_tx_dis, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TX_DIS); +static SENSOR_DEVICE_ATTR(cpld_sfp_rs, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_RS); +static SENSOR_DEVICE_ATTR(cpld_sfp_ts, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TS); +static SENSOR_DEVICE_ATTR(cpld_port_int_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_PORT_INT_STATUS); +//BSP DEBUG +static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, \ + read_bsp_callback, write_bsp_callback, BSP_DEBUG); + +/* define support attributes of cpldx , total 3 */ +/* cpld 1 */ +static struct attribute *s9300_cpld1_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_sku_id.dev_attr.attr, + &sensor_dev_attr_cpld_hw_rev.dev_attr.attr, + &sensor_dev_attr_cpld_deph_rev.dev_attr.attr, + &sensor_dev_attr_cpld_build_rev.dev_attr.attr, + &sensor_dev_attr_cpld_id_type.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr.dev_attr.attr, + &sensor_dev_attr_cpld_system_intr.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_mac_rst.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_rst.dev_attr.attr, + &sensor_dev_attr_cpld_bmc_rst.dev_attr.attr, + &sensor_dev_attr_cpld_usb_rst.dev_attr.attr, + &sensor_dev_attr_cpld_mux_rst.dev_attr.attr, + &sensor_dev_attr_cpld_misc_rst.dev_attr.attr, + &sensor_dev_attr_cpld_bmc_watchdog.dev_attr.attr, + &sensor_dev_attr_cpld_dau_bd_pres.dev_attr.attr, + &sensor_dev_attr_cpld_psu_status.dev_attr.attr, + &sensor_dev_attr_cpld_sys_pw_status.dev_attr.attr, + &sensor_dev_attr_cpld_misc.dev_attr.attr, + &sensor_dev_attr_cpld_mux_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_mac_qsfp_sel_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_sys_led_ctrl_1.dev_attr.attr, + &sensor_dev_attr_cpld_sys_led_ctrl_2.dev_attr.attr, + &sensor_dev_attr_cpld_beacon_led_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_port_led_clr_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_event_detect_ctrl.dev_attr.attr, + &sensor_dev_attr_bsp_debug.dev_attr.attr, + NULL +}; + +/* cpld 2 */ +static struct attribute *s9300_cpld2_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_g3.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g3.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault_mask.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs_mask.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos_mask.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g3.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault_event.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs_event.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos_event.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode_g3.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_tx_dis.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rs.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_ts.dev_attr.attr, + &sensor_dev_attr_cpld_port_int_status.dev_attr.attr, + NULL +}; + +/* cpld 3 */ +static struct attribute *s9300_cpld3_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group s9300_cpld1_group = { + .attrs = s9300_cpld1_attributes, +}; +/* cpld 2 attributes group */ +static const struct attribute_group s9300_cpld2_group = { + .attrs = s9300_cpld2_attributes, +}; +/* cpld 3 attributes group */ +static const struct attribute_group s9300_cpld3_group = { + .attrs = s9300_cpld3_attributes, +}; + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write)) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + len=sprintf(buf, "%s", str); + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + snprintf(str, str_len, "%s", buf); + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + ssize_t ret = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + ret = write_bsp(buf, str, str_len, count); + + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + return ret; + default: + return -EINVAL; + } + return 0; +} + +/* read access register from cpld data */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + + return sprintf(buf, "0x%x\n", reg); +} + +/* write access register to cpld data */ +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + + if (kstrtou8(buf, 0, ®) < 0) + return -EINVAL; + + data->access_reg = reg; + return count; +} + +/* read the value of access register in cpld data */ +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if (reg_val < 0) + return reg_val; + + return sprintf(buf, "0x%x\n", reg_val); +} + +/* wrtie the value to access register in cpld data */ +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int ret = -EIO; + u8 reg = data->access_reg; + u8 reg_val; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, reg_val); + + if (unlikely(ret < 0)) { + dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* get cpld register value */ +static ssize_t read_cpld_reg(struct device *dev, + char *buf, + u8 reg) +{ + int reg_val; + + if (read_cpld_reg_raw_int(dev, reg, ®_val)) + return sprintf(buf, "0x%02x\n", reg_val); + else + return reg_val; +} + +static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + I2C_READ_BYTE_DATA(*val, &data->access_lock, client, reg); + if (unlikely(*val < 0)) { + dev_err(dev, "read_cpld_reg_raw_int() error, return=%d\n", *val); + return false; + } + return true; +} + +static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno) +{ + int reg_val; + + if (read_cpld_reg_raw_int(dev, reg, ®_val)) { + *val = (u8)reg_val; + return true; + } else { + *errno = reg_val; + return false; + } +} + +/* handle read for attributes */ +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + + switch (attr->index) { + case CPLD_SKU_ID: + reg = CPLD_SKU_ID_REG; + break; + case CPLD_ID: + reg = CPLD_ID_REG; + break; + case CPLD_BUILD_VER: + reg = CPLD_BUILD_VER_REG; + break; + case CPLD_MAC_INTR: + reg = CPLD_MAC_INTR_REG; + break; + case CPLD_10G_PHY_INTR: + reg = CPLD_10G_PHY_INTR_REG; + break; + case CPLD_CPLD_FRU_INTR: + reg = CPLD_CPLD_FRU_INTR_REG; + break; + case CPLD_THERMAL_ALERT_INTR: + reg = CPLD_THERMAL_ALERT_INTR_REG; + break; + case CPLD_MISC_INTR: + reg = CPLD_MISC_INTR_REG; + break; + case CPLD_SYSTEM_INTR: + reg = CPLD_SYSTEM_INTR_REG; + break; + case CPLD_MAC_INTR_MASK: + reg = CPLD_MAC_INTR_MASK_REG; + break; + case CPLD_10G_PHY_INTR_MASK: + reg = CPLD_10G_PHY_INTR_MASK_REG; + break; + case CPLD_CPLD_FRU_INTR_MASK: + reg = CPLD_CPLD_FRU_INTR_MASK_REG; + break; + case CPLD_THERMAL_ALERT_INTR_MASK: + reg = CPLD_THERMAL_ALERT_INTR_MASK_REG; + break; + case CPLD_MISC_INTR_MASK: + reg = CPLD_MISC_INTR_MASK_REG; + break; + case CPLD_MAC_INTR_EVENT: + reg = CPLD_MAC_INTR_EVENT_REG; + break; + case CPLD_10G_PHY_INTR_EVENT: + reg = CPLD_10G_PHY_INTR_EVENT_REG; + break; + case CPLD_CPLD_FRU_INTR_EVENT: + reg = CPLD_CPLD_FRU_INTR_EVENT_REG; + break; + case CPLD_THERMAL_ALERT_INTR_EVENT: + reg = CPLD_THERMAL_ALERT_INTR_EVENT_REG; + break; + case CPLD_MISC_INTR_EVENT: + reg = CPLD_MISC_INTR_EVENT_REG; + break; + case CPLD_MAC_RST: + reg = CPLD_MAC_RST_REG; + break; + case CPLD_10G_PHY_RST: + reg = CPLD_10G_PHY_RST_REG; + break; + case CPLD_BMC_RST: + reg = CPLD_BMC_RST_REG; + break; + case CPLD_USB_RST: + reg = CPLD_USB_RST_REG; + break; + case CPLD_MUX_RST: + reg = CPLD_MUX_RST_REG; + break; + case CPLD_MISC_RST: + reg = CPLD_MISC_RST_REG; + break; + case CPLD_BMC_WATCHDOG: + reg = CPLD_BMC_WATCHDOG_REG; + break; + case CPLD_DAU_BD_PRES: + reg = CPLD_DAU_BD_PRES_REG; + break; + case CPLD_PSU_STATUS: + reg = CPLD_PSU_STATUS_REG; + break; + case CPLD_SYS_PW_STATUS: + reg = CPLD_SYS_PW_STATUS_REG; + break; + case CPLD_MISC: + reg = CPLD_MISC_REG; + break; + case CPLD_MUX_CTRL: + reg = CPLD_MUX_CTRL_REG; + break; + case CPLD_MAC_QSFP_SEL_CTRL: + reg = CPLD_MAC_QSFP_SEL_CTRL_REG; + break; + case CPLD_SYS_LED_CTRL_1: + reg = CPLD_SYS_LED_CTRL_1_REG; + break; + case CPLD_SYS_LED_CTRL_2: + reg = CPLD_SYS_LED_CTRL_2_REG; + break; + case CPLD_BEACON_LED_CTRL: + reg = CPLD_BEACON_LED_CTRL_REG; + break; + case CPLD_PORT_LED_CLR_CTRL: + reg = CPLD_PORT_LED_CLR_CTRL_REG; + break; + case CPLD_EVENT_DETECT_CTRL: + reg = CPLD_EVENT_DETECT_CTRL_REG; + break; + case CPLD_QSFPDD_MOD_INT_G0: + reg = CPLD_QSFPDD_MOD_INT_G0_REG; + break; + case CPLD_QSFPDD_MOD_INT_G1: + reg = CPLD_QSFPDD_MOD_INT_G1_REG; + break; + case CPLD_QSFPDD_MOD_INT_G2: + reg = CPLD_QSFPDD_MOD_INT_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_G3: + reg = CPLD_QSFPDD_MOD_INT_G3_REG; + break; + case CPLD_QSFPDD_PRES_G0: + reg = CPLD_QSFPDD_PRES_G0_REG; + break; + case CPLD_QSFPDD_PRES_G1: + reg = CPLD_QSFPDD_PRES_G1_REG; + break; + case CPLD_QSFPDD_PRES_G2: + reg = CPLD_QSFPDD_PRES_G2_REG; + break; + case CPLD_QSFPDD_PRES_G3: + reg = CPLD_QSFPDD_PRES_G3_REG; + break; + case CPLD_QSFPDD_FUSE_INT_G0: + reg = CPLD_QSFPDD_FUSE_INT_G0_REG; + break; + case CPLD_QSFPDD_FUSE_INT_G1: + reg = CPLD_QSFPDD_FUSE_INT_G1_REG; + break; + case CPLD_QSFPDD_FUSE_INT_G2: + reg = CPLD_QSFPDD_FUSE_INT_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_G3: + reg = CPLD_QSFPDD_FUSE_INT_G3_REG; + break; + case CPLD_SFP_TXFAULT: + reg = CPLD_SFP_TXFAULT_REG; + break; + case CPLD_SFP_ABS: + reg = CPLD_SFP_ABS_REG; + break; + case CPLD_SFP_RXLOS: + reg = CPLD_SFP_RXLOS_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G0: + reg = CPLD_QSFPDD_MOD_INT_MASK_G0_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G1: + reg = CPLD_QSFPDD_MOD_INT_MASK_G1_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G2: + reg = CPLD_QSFPDD_MOD_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G3: + reg = CPLD_QSFPDD_MOD_INT_MASK_G3_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G0: + reg = CPLD_QSFPDD_PRES_MASK_G0_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G1: + reg = CPLD_QSFPDD_PRES_MASK_G1_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G2: + reg = CPLD_QSFPDD_PRES_MASK_G2_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G3: + reg = CPLD_QSFPDD_PRES_MASK_G3_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G0: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G0_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G1: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G1_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G2: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G3: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G3_REG; + break; + case CPLD_SFP_TXFAULT_MASK: + reg = CPLD_SFP_TXFAULT_MASK_REG; + break; + case CPLD_SFP_ABS_MASK: + reg = CPLD_SFP_ABS_MASK_REG; + break; + case CPLD_SFP_RXLOS_MASK: + reg = CPLD_SFP_RXLOS_MASK_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT_G0: + reg = CPLD_QSFPDD_MOD_INT_EVENT_G0_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT_G1: + reg = CPLD_QSFPDD_MOD_INT_EVENT_G1_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT_G2: + reg = CPLD_QSFPDD_MOD_INT_EVENT_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT_G3: + reg = CPLD_QSFPDD_MOD_INT_EVENT_G3_REG; + break; + case CPLD_QSFPDD_PRES_EVENT_G0: + reg = CPLD_QSFPDD_PRES_EVENT_G0_REG; + break; + case CPLD_QSFPDD_PRES_EVENT_G1: + reg = CPLD_QSFPDD_PRES_EVENT_G1_REG; + break; + case CPLD_QSFPDD_PRES_EVENT_G2: + reg = CPLD_QSFPDD_PRES_EVENT_G2_REG; + break; + case CPLD_QSFPDD_PRES_EVENT_G3: + reg = CPLD_QSFPDD_PRES_EVENT_G3_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT_G0: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT_G1: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT_G2: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT_G3: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG; + break; + case CPLD_SFP_TXFAULT_EVENT: + reg = CPLD_SFP_TXFAULT_EVENT_REG; + break; + case CPLD_SFP_ABS_EVENT: + reg = CPLD_SFP_ABS_EVENT_REG; + break; + case CPLD_SFP_RXLOS_EVENT: + reg = CPLD_SFP_RXLOS_EVENT_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G0: + reg = CPLD_QSFPDD_RESET_CTRL_G0_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G1: + reg = CPLD_QSFPDD_RESET_CTRL_G1_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G2: + reg = CPLD_QSFPDD_RESET_CTRL_G2_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G3: + reg = CPLD_QSFPDD_RESET_CTRL_G3_REG; + break; + case CPLD_QSFPDD_LP_MODE_G0: + reg = CPLD_QSFPDD_LP_MODE_G0_REG; + break; + case CPLD_QSFPDD_LP_MODE_G1: + reg = CPLD_QSFPDD_LP_MODE_G1_REG; + break; + case CPLD_QSFPDD_LP_MODE_G2: + reg = CPLD_QSFPDD_LP_MODE_G2_REG; + break; + case CPLD_QSFPDD_LP_MODE_G3: + reg = CPLD_QSFPDD_LP_MODE_G3_REG; + break; + case CPLD_SFP_TX_DIS: + reg = CPLD_SFP_TX_DIS_REG; + break; + case CPLD_SFP_RS: + reg = CPLD_SFP_RS_REG; + break; + case CPLD_SFP_TS: + reg = CPLD_SFP_TS_REG; + break; + case CPLD_PORT_INT_STATUS: + reg = CPLD_PORT_INT_STATUS_REG; + break; + default: + return -EINVAL; + } + return read_cpld_reg(dev, buf, reg); +} + +/* handle read for hw_rev attributes */ +static ssize_t read_hw_rev_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = CPLD_HW_REV_REG; + u8 reg_val = 0; + int errno = 0; + u8 res; + + if (!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + + switch (attr->index) { + case CPLD_HW_REV: + HW_REV_GET(reg_val, res); + break; + case CPLD_DEPH_REV: + DEPH_REV_GET(reg_val, res); + break; + case CPLD_BUILD_REV: + BUILD_REV_GET(reg_val, res); + break; + case CPLD_ID_TYPE: + ID_TYPE_GET(reg_val, res); + break; + default: + return -EINVAL; + } + return sprintf(buf, "0x%02x\n", res); +} + +/* handle read for cpld_version attributes */ +static ssize_t read_cpld_version_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = CPLD_VERSION_REG; + u8 reg_val = 0; + int errno = 0; + u8 res; + + if (!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + + switch (attr->index) { + case CPLD_MAJOR_VER: + CPLD_MAJOR_VERSION_GET(reg_val, res); + break; + case CPLD_MINOR_VER: + CPLD_MINOR_VERSION_GET(reg_val, res); + break; + default: + return -EINVAL; + } + return sprintf(buf, "0x%02x\n", res); +} + +/* handle read human-readable string for cpld_version attributes */ +static ssize_t read_cpld_version_h_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + u8 reg = CPLD_VERSION_REG; + u8 reg_val = 0; + int errno = 0; + u8 major, minor, build; + + //get major/minor register value + if(!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + CPLD_MAJOR_VERSION_GET(reg_val, major); + CPLD_MINOR_VERSION_GET(reg_val, minor); + + //get build register value + reg = CPLD_BUILD_VER_REG; + if(!read_cpld_reg_raw_byte(dev, reg, &build, &errno)) + return errno; + + //version string format : xx.xx.xxx + return sprintf(buf, "%d.%02d.%03d\n", major, minor, build); +} + +/* handle write for attributes */ +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + + switch (attr->index) { + case CPLD_MAC_INTR_MASK: + reg = CPLD_MAC_INTR_MASK_REG; + break; + case CPLD_10G_PHY_INTR_MASK: + reg = CPLD_10G_PHY_INTR_MASK_REG; + break; + case CPLD_CPLD_FRU_INTR_MASK: + reg = CPLD_CPLD_FRU_INTR_MASK_REG; + break; + case CPLD_THERMAL_ALERT_INTR_MASK: + reg = CPLD_THERMAL_ALERT_INTR_MASK_REG; + break; + case CPLD_MISC_INTR_MASK: + reg = CPLD_MISC_INTR_MASK_REG; + break; + case CPLD_MAC_RST: + reg = CPLD_MAC_RST_REG; + break; + case CPLD_10G_PHY_RST: + reg = CPLD_10G_PHY_RST_REG; + break; + case CPLD_BMC_RST: + reg = CPLD_BMC_RST_REG; + break; + case CPLD_USB_RST: + reg = CPLD_USB_RST_REG; + break; + case CPLD_MUX_RST: + reg = CPLD_MUX_RST_REG; + break; + case CPLD_MISC_RST: + reg = CPLD_MISC_RST_REG; + break; + case CPLD_BMC_WATCHDOG: + reg = CPLD_BMC_WATCHDOG_REG; + break; + case CPLD_MUX_CTRL: + reg = CPLD_MUX_CTRL_REG; + break; + case CPLD_MAC_QSFP_SEL_CTRL: + reg = CPLD_MAC_QSFP_SEL_CTRL_REG; + break; + case CPLD_BEACON_LED_CTRL: + reg = CPLD_BEACON_LED_CTRL_REG; + break; + case CPLD_PORT_LED_CLR_CTRL: + reg = CPLD_PORT_LED_CLR_CTRL_REG; + break; + case CPLD_EVENT_DETECT_CTRL: + reg = CPLD_EVENT_DETECT_CTRL_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G0: + reg = CPLD_QSFPDD_MOD_INT_MASK_G0_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G1: + reg = CPLD_QSFPDD_MOD_INT_MASK_G1_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G2: + reg = CPLD_QSFPDD_MOD_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G3: + reg = CPLD_QSFPDD_MOD_INT_MASK_G3_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G0: + reg = CPLD_QSFPDD_PRES_MASK_G0_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G1: + reg = CPLD_QSFPDD_PRES_MASK_G1_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G2: + reg = CPLD_QSFPDD_PRES_MASK_G2_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G3: + reg = CPLD_QSFPDD_PRES_MASK_G3_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G0: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G0_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G1: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G1_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G2: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G3: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G3_REG; + break; + case CPLD_SFP_TXFAULT_MASK: + reg = CPLD_SFP_TXFAULT_MASK_REG; + break; + case CPLD_SFP_ABS_MASK: + reg = CPLD_SFP_ABS_MASK_REG; + break; + case CPLD_SFP_RXLOS_MASK: + reg = CPLD_SFP_RXLOS_MASK_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G0: + reg = CPLD_QSFPDD_RESET_CTRL_G0_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G1: + reg = CPLD_QSFPDD_RESET_CTRL_G1_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G2: + reg = CPLD_QSFPDD_RESET_CTRL_G2_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G3: + reg = CPLD_QSFPDD_RESET_CTRL_G3_REG; + break; + case CPLD_QSFPDD_LP_MODE_G0: + reg = CPLD_QSFPDD_LP_MODE_G0_REG; + break; + case CPLD_QSFPDD_LP_MODE_G1: + reg = CPLD_QSFPDD_LP_MODE_G1_REG; + break; + case CPLD_QSFPDD_LP_MODE_G2: + reg = CPLD_QSFPDD_LP_MODE_G2_REG; + break; + case CPLD_QSFPDD_LP_MODE_G3: + reg = CPLD_QSFPDD_LP_MODE_G3_REG; + break; + case CPLD_SFP_TX_DIS: + reg = CPLD_SFP_TX_DIS_REG; + break; + case CPLD_SFP_RS: + reg = CPLD_SFP_RS_REG; + break; + case CPLD_SFP_TS: + reg = CPLD_SFP_TS_REG; + break; + default: + return -EINVAL; + } + return write_cpld_reg(dev, buf, count, reg); +} + +/* set cpld register value */ +static ssize_t write_cpld_reg(struct device *dev, + const char *buf, + size_t count, + u8 reg) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + + if (unlikely(ret < 0)) { + dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* add valid cpld client to list */ +static void s9300_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if (!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void s9300_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int s9300_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + int ret = -EPERM; + int idx; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + /* get cpld id from device */ + ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG); + + if (ret < 0) { + dev_info(&client->dev, + "fail to get cpld id (0x%x) at addr (0x%x)\n", + CPLD_ID_REG, client->addr); + status = -EIO; + goto exit; + } + + CPLD_ID_ID_GET(ret, idx); + + if (INVALID(idx, cpld1, cpld3)) { + dev_info(&client->dev, + "cpld id %d(device) not valid\n", idx); + //status = -EPERM; + //goto exit; + } + + data->index = dev_id->driver_data; + + /* register sysfs hooks for different cpld group */ + dev_info(&client->dev, "probe cpld with index %d\n", data->index); + switch (data->index) { + case cpld1: + status = sysfs_create_group(&client->dev.kobj, + &s9300_cpld1_group); + break; + case cpld2: + status = sysfs_create_group(&client->dev.kobj, + &s9300_cpld2_group); + break; + case cpld3: + status = sysfs_create_group(&client->dev.kobj, + &s9300_cpld3_group); + break; + default: + status = -EINVAL; + } + + if (status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + s9300_cpld_add_client(client); + + return 0; +exit: + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &s9300_cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &s9300_cpld2_group); + break; + case cpld3: + sysfs_remove_group(&client->dev.kobj, &s9300_cpld3_group); + break; + default: + break; + } + return status; +} + +/* cpld drvier remove */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +s9300_cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &s9300_cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &s9300_cpld2_group); + break; + case cpld3: + sysfs_remove_group(&client->dev.kobj, &s9300_cpld3_group); + break; + } + + s9300_cpld_remove_client(client); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +MODULE_DEVICE_TABLE(i2c, s9300_cpld_id); + +static struct i2c_driver s9300_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "x86_64_ufispace_s9300_32d_cpld", + }, + .probe = s9300_cpld_probe, + .remove = s9300_cpld_remove, + .id_table = s9300_cpld_id, + .address_list = cpld_i2c_addr, +}; + +/* provide cpld register read */ +/* cpld_idx indicate the index of cpld device */ +int s9300_cpld_read(u8 cpld_idx, + u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + struct cpld_data *data; + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + data = i2c_get_clientdata(cpld_node->client); + if (data->index == cpld_idx) { + DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x", + cpld_idx, reg); + I2C_READ_BYTE_DATA(ret, &data->access_lock, + cpld_node->client, reg); + DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x = 0x%02x", + cpld_idx, reg, ret); + break; + } + } + + return ret; +} +EXPORT_SYMBOL(s9300_cpld_read); + +/* provide cpld register write */ +/* cpld_idx indicate the index of cpld device */ +int s9300_cpld_write(u8 cpld_idx, + u8 reg, + u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + struct cpld_data *data; + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + data = i2c_get_clientdata(cpld_node->client); + + if (data->index == cpld_idx) { + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + cpld_node->client, + reg, value); + DEBUG_PRINT("cpld_idx=%d, write reg 0x%02x val 0x%02x, ret=%d", + cpld_idx, reg, value, ret); + break; + } + } + + return ret; +} +EXPORT_SYMBOL(s9300_cpld_write); + +static int __init s9300_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&s9300_cpld_driver); +} + +static void __exit s9300_cpld_exit(void) +{ + i2c_del_driver(&s9300_cpld_driver); +} + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("x86_64_ufispace_s9300_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(s9300_cpld_init); +module_exit(s9300_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.h b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.h index d135e476e8cd..e2fd7e44a7fc 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.h +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.h @@ -1,251 +1,251 @@ -/* header file for i2c cpld driver of ufispace_s9300_32d - * - * Copyright (C) 2017 UfiSpace Technology Corporation. - * Leo Lin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef UFISPACE_S9300_I2C_CPLD_H -#define UFISPACE_S9300_I2C_CPLD_H - -/* CPLD device index value */ -enum cpld_id { - cpld1, - cpld2, - cpld3, -}; - -enum LED_BLINK { - NOBLINK, - BLINK, -}; - -enum LED_BLINK_SPEED { - BLINK_1X, // 0.5hz - BLINK_4X, // 2hz -}; - -enum LED_STATUS { - OFF, - ON, -}; - -enum LED_YELLOW { - YELLOW_OFF, - YELLOW_ON, -}; - -enum LED_GREEN { - GREEN_OFF, - GREEN_ON, -}; - -/* QSFPDD port number */ -#define QSFPDD_MAX_PORT_NUM 32 -#define QSFPDD_MIN_PORT_NUM 1 - -/* SFP+ port number */ -#define SFP_MAX_PORT_NUM 4 -#define SFP_MIN_PORT_NUM 1 - - -/* CPLD registers */ -/* CPLD 1 */ -#define CPLD_SKU_ID_REG 0x00 -#define CPLD_HW_REV_REG 0x01 -#define CPLD_VERSION_REG 0x02 -#define CPLD_ID_REG 0x03 -#define CPLD_BUILD_VER_REG 0x04 -// Interrupt status -#define CPLD_MAC_INTR_REG 0x10 -#define CPLD_10G_PHY_INTR_REG 0x13 -#define CPLD_CPLD_FRU_INTR_REG 0x14 -#define CPLD_THERMAL_ALERT_INTR_REG 0x16 -#define CPLD_MISC_INTR_REG 0x1B -#define CPLD_SYSTEM_INTR_REG 0x1D -// Interrupt mask -#define CPLD_MAC_INTR_MASK_REG 0x20 -#define CPLD_10G_PHY_INTR_MASK_REG 0x23 -#define CPLD_CPLD_FRU_INTR_MASK_REG 0x24 -#define CPLD_THERMAL_ALERT_INTR_MASK_REG 0x26 -#define CPLD_MISC_INTR_MASK_REG 0x2B -// Interrupt event -#define CPLD_MAC_INTR_EVENT_REG 0x30 -#define CPLD_10G_PHY_INTR_EVENT_REG 0x33 -#define CPLD_CPLD_FRU_INTR_EVENT_REG 0x14 -#define CPLD_THERMAL_ALERT_INTR_EVENT_REG 0x16 -#define CPLD_MISC_INTR_EVENT_REG 0x1B -// Reset ctrl -#define CPLD_MAC_RST_REG 0x40 -#define CPLD_10G_PHY_RST_REG 0x42 -#define CPLD_BMC_RST_REG 0x43 -#define CPLD_USB_RST_REG 0x44 -#define CPLD_MUX_RST_REG 0x46 -#define CPLD_MISC_RST_REG 0x48 -#define CPLD_BMC_WATCHDOG_REG 0x4D -// Sys status -#define CPLD_DAU_BD_PRES_REG 0x50 -#define CPLD_PSU_STATUS_REG 0x51 -#define CPLD_SYS_PW_STATUS_REG 0x52 -#define CPLD_MISC_REG 0x5B -// Mux ctrl -#define CPLD_MUX_CTRL_REG 0x5C -#define CPLD_MAC_QSFP_SEL_CTRL_REG 0x5F -// Led ctrl -#define CPLD_SYS_LED_CTRL_1_REG 0x80 -#define CPLD_SYS_LED_CTRL_2_REG 0x81 -#define CPLD_BEACON_LED_CTRL_REG 0x84 -#define CPLD_PORT_LED_CLR_CTRL_REG 0x85 -// Event Detect Ctrl -#define CPLD_EVENT_DETECT_CTRL_REG 0x5D - -/* CPLD 2 */ -/* G0 - port 0 ~ 7 - G1 - port 8 ~ 15 - G2 - port 16 ~ 23 - G3 - port 24 ~ 31 - */ -// Interrupt status -#define CPLD_QSFPDD_MOD_INT_G0_REG 0x10 -#define CPLD_QSFPDD_MOD_INT_G1_REG 0x11 -#define CPLD_QSFPDD_MOD_INT_G2_REG 0x12 -#define CPLD_QSFPDD_MOD_INT_G3_REG 0x13 -#define CPLD_QSFPDD_PRES_G0_REG 0x14 -#define CPLD_QSFPDD_PRES_G1_REG 0x15 -#define CPLD_QSFPDD_PRES_G2_REG 0x16 -#define CPLD_QSFPDD_PRES_G3_REG 0x17 -#define CPLD_QSFPDD_FUSE_INT_G0_REG 0x18 -#define CPLD_QSFPDD_FUSE_INT_G1_REG 0x19 -#define CPLD_QSFPDD_FUSE_INT_G2_REG 0x1A -#define CPLD_QSFPDD_FUSE_INT_G3_REG 0x1B -#define CPLD_SFP_TXFAULT_REG 0x1D -#define CPLD_SFP_ABS_REG 0x1E -#define CPLD_SFP_RXLOS_REG 0x1F -// Interrupt mask -#define CPLD_QSFPDD_MOD_INT_MASK_G0_REG 0x20 -#define CPLD_QSFPDD_MOD_INT_MASK_G1_REG 0x21 -#define CPLD_QSFPDD_MOD_INT_MASK_G2_REG 0x22 -#define CPLD_QSFPDD_MOD_INT_MASK_G3_REG 0x23 -#define CPLD_QSFPDD_PRES_MASK_G0_REG 0x24 -#define CPLD_QSFPDD_PRES_MASK_G1_REG 0x25 -#define CPLD_QSFPDD_PRES_MASK_G2_REG 0x26 -#define CPLD_QSFPDD_PRES_MASK_G3_REG 0x27 -#define CPLD_QSFPDD_FUSE_INT_MASK_G0_REG 0x28 -#define CPLD_QSFPDD_FUSE_INT_MASK_G1_REG 0x29 -#define CPLD_QSFPDD_FUSE_INT_MASK_G2_REG 0x2A -#define CPLD_QSFPDD_FUSE_INT_MASK_G3_REG 0x2B -#define CPLD_SFP_TXFAULT_MASK_REG 0x2D -#define CPLD_SFP_ABS_MASK_REG 0x2E -#define CPLD_SFP_RXLOS_MASK_REG 0x2F -// Interrupt event -#define CPLD_QSFPDD_MOD_INT_EVENT_G0_REG 0x30 -#define CPLD_QSFPDD_MOD_INT_EVENT_G1_REG 0x31 -#define CPLD_QSFPDD_MOD_INT_EVENT_G2_REG 0x32 -#define CPLD_QSFPDD_MOD_INT_EVENT_G3_REG 0x33 -#define CPLD_QSFPDD_PRES_EVENT_G0_REG 0x34 -#define CPLD_QSFPDD_PRES_EVENT_G1_REG 0x35 -#define CPLD_QSFPDD_PRES_EVENT_G2_REG 0x36 -#define CPLD_QSFPDD_PRES_EVENT_G3_REG 0x37 -#define CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG 0x38 -#define CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG 0x39 -#define CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG 0x3A -#define CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG 0x3B -#define CPLD_SFP_TXFAULT_EVENT_REG 0x3D -#define CPLD_SFP_ABS_EVENT_REG 0x3E -#define CPLD_SFP_RXLOS_EVENT_REG 0x3F -// Port ctrl -#define CPLD_QSFPDD_RESET_CTRL_G0_REG 0x40 -#define CPLD_QSFPDD_RESET_CTRL_G1_REG 0x41 -#define CPLD_QSFPDD_RESET_CTRL_G2_REG 0x42 -#define CPLD_QSFPDD_RESET_CTRL_G3_REG 0x43 -#define CPLD_QSFPDD_LP_MODE_G0_REG 0x44 -#define CPLD_QSFPDD_LP_MODE_G1_REG 0x45 -#define CPLD_QSFPDD_LP_MODE_G2_REG 0x46 -#define CPLD_QSFPDD_LP_MODE_G3_REG 0x47 -#define CPLD_SFP_TX_DIS_REG 0x55 -#define CPLD_SFP_RS_REG 0x56 -#define CPLD_SFP_TS_REG 0x57 -// Port status -#define CPLD_PORT_INT_STATUS_REG 0x58 - - -/* bit field structure for register value */ -struct cpld_reg_sku_id_t { - u8 model_id:8; -}; - -struct cpld_reg_hw_rev_t { - u8 hw_rev:2; - u8 deph_rev:1; - u8 build_rev:3; - u8 reserved:1; - u8 id_type:1; -}; - -struct cpld_reg_version_t { - u8 minor:6; - u8 major:2; -}; - -struct cpld_reg_id_t { - u8 id:3; - u8 release:5; -}; - -struct cpld_reg_beacon_led_ctrl_t { - u8 reserve:5; - u8 speed:1; - u8 blink:1; - u8 onoff:1; -}; - -/* common manipulation */ -#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) -#define READ_BIT(val, bit) ((0u == (val & (1<bf_name) -#define READ_BF_1(bf_struct, val, bf_name, bf_value) \ - bf_struct bf; \ - bf.data = val; \ - bf_value = bf.bf_name -#define HW_REV_GET(val, res) \ - READ_BF(cpld_reg_hw_rev_t, val, hw_rev, res) -#define DEPH_REV_GET(val, res) \ - READ_BF(cpld_reg_hw_rev_t, val, deph_rev, res) -#define BUILD_REV_GET(val, res) \ - READ_BF(cpld_reg_hw_rev_t, val, build_rev, res) -#define ID_TYPE_GET(val, res) \ - READ_BF(cpld_reg_hw_rev_t, val, id_type, res) -#define CPLD_MAJOR_VERSION_GET(val, res) \ - READ_BF(cpld_reg_version_t, val, major, res) -#define CPLD_MINOR_VERSION_GET(val, res) \ - READ_BF(cpld_reg_version_t, val, minor, res) -#define CPLD_ID_ID_GET(val, res) \ - READ_BF(cpld_reg_id_t, val, id, res) - -/* CPLD access functions */ -extern int s9300_cpld_read(u8 cpld_idx, u8 reg); -extern int s9300_cpld_write(u8 cpld_idx, u8 reg, u8 value); - -#endif - +/* header file for i2c cpld driver of ufispace_s9300_32d + * + * Copyright (C) 2017 UfiSpace Technology Corporation. + * Leo Lin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef UFISPACE_S9300_I2C_CPLD_H +#define UFISPACE_S9300_I2C_CPLD_H + +/* CPLD device index value */ +enum cpld_id { + cpld1, + cpld2, + cpld3, +}; + +enum LED_BLINK { + NOBLINK, + BLINK, +}; + +enum LED_BLINK_SPEED { + BLINK_1X, // 0.5hz + BLINK_4X, // 2hz +}; + +enum LED_STATUS { + OFF, + ON, +}; + +enum LED_YELLOW { + YELLOW_OFF, + YELLOW_ON, +}; + +enum LED_GREEN { + GREEN_OFF, + GREEN_ON, +}; + +/* QSFPDD port number */ +#define QSFPDD_MAX_PORT_NUM 32 +#define QSFPDD_MIN_PORT_NUM 1 + +/* SFP+ port number */ +#define SFP_MAX_PORT_NUM 4 +#define SFP_MIN_PORT_NUM 1 + + +/* CPLD registers */ +/* CPLD 1 */ +#define CPLD_SKU_ID_REG 0x00 +#define CPLD_HW_REV_REG 0x01 +#define CPLD_VERSION_REG 0x02 +#define CPLD_ID_REG 0x03 +#define CPLD_BUILD_VER_REG 0x04 +// Interrupt status +#define CPLD_MAC_INTR_REG 0x10 +#define CPLD_10G_PHY_INTR_REG 0x13 +#define CPLD_CPLD_FRU_INTR_REG 0x14 +#define CPLD_THERMAL_ALERT_INTR_REG 0x16 +#define CPLD_MISC_INTR_REG 0x1B +#define CPLD_SYSTEM_INTR_REG 0x1D +// Interrupt mask +#define CPLD_MAC_INTR_MASK_REG 0x20 +#define CPLD_10G_PHY_INTR_MASK_REG 0x23 +#define CPLD_CPLD_FRU_INTR_MASK_REG 0x24 +#define CPLD_THERMAL_ALERT_INTR_MASK_REG 0x26 +#define CPLD_MISC_INTR_MASK_REG 0x2B +// Interrupt event +#define CPLD_MAC_INTR_EVENT_REG 0x30 +#define CPLD_10G_PHY_INTR_EVENT_REG 0x33 +#define CPLD_CPLD_FRU_INTR_EVENT_REG 0x14 +#define CPLD_THERMAL_ALERT_INTR_EVENT_REG 0x16 +#define CPLD_MISC_INTR_EVENT_REG 0x1B +// Reset ctrl +#define CPLD_MAC_RST_REG 0x40 +#define CPLD_10G_PHY_RST_REG 0x42 +#define CPLD_BMC_RST_REG 0x43 +#define CPLD_USB_RST_REG 0x44 +#define CPLD_MUX_RST_REG 0x46 +#define CPLD_MISC_RST_REG 0x48 +#define CPLD_BMC_WATCHDOG_REG 0x4D +// Sys status +#define CPLD_DAU_BD_PRES_REG 0x50 +#define CPLD_PSU_STATUS_REG 0x51 +#define CPLD_SYS_PW_STATUS_REG 0x52 +#define CPLD_MISC_REG 0x5B +// Mux ctrl +#define CPLD_MUX_CTRL_REG 0x5C +#define CPLD_MAC_QSFP_SEL_CTRL_REG 0x5F +// Led ctrl +#define CPLD_SYS_LED_CTRL_1_REG 0x80 +#define CPLD_SYS_LED_CTRL_2_REG 0x81 +#define CPLD_BEACON_LED_CTRL_REG 0x84 +#define CPLD_PORT_LED_CLR_CTRL_REG 0x85 +// Event Detect Ctrl +#define CPLD_EVENT_DETECT_CTRL_REG 0x5D + +/* CPLD 2 */ +/* G0 - port 0 ~ 7 + G1 - port 8 ~ 15 + G2 - port 16 ~ 23 + G3 - port 24 ~ 31 + */ +// Interrupt status +#define CPLD_QSFPDD_MOD_INT_G0_REG 0x10 +#define CPLD_QSFPDD_MOD_INT_G1_REG 0x11 +#define CPLD_QSFPDD_MOD_INT_G2_REG 0x12 +#define CPLD_QSFPDD_MOD_INT_G3_REG 0x13 +#define CPLD_QSFPDD_PRES_G0_REG 0x14 +#define CPLD_QSFPDD_PRES_G1_REG 0x15 +#define CPLD_QSFPDD_PRES_G2_REG 0x16 +#define CPLD_QSFPDD_PRES_G3_REG 0x17 +#define CPLD_QSFPDD_FUSE_INT_G0_REG 0x18 +#define CPLD_QSFPDD_FUSE_INT_G1_REG 0x19 +#define CPLD_QSFPDD_FUSE_INT_G2_REG 0x1A +#define CPLD_QSFPDD_FUSE_INT_G3_REG 0x1B +#define CPLD_SFP_TXFAULT_REG 0x1D +#define CPLD_SFP_ABS_REG 0x1E +#define CPLD_SFP_RXLOS_REG 0x1F +// Interrupt mask +#define CPLD_QSFPDD_MOD_INT_MASK_G0_REG 0x20 +#define CPLD_QSFPDD_MOD_INT_MASK_G1_REG 0x21 +#define CPLD_QSFPDD_MOD_INT_MASK_G2_REG 0x22 +#define CPLD_QSFPDD_MOD_INT_MASK_G3_REG 0x23 +#define CPLD_QSFPDD_PRES_MASK_G0_REG 0x24 +#define CPLD_QSFPDD_PRES_MASK_G1_REG 0x25 +#define CPLD_QSFPDD_PRES_MASK_G2_REG 0x26 +#define CPLD_QSFPDD_PRES_MASK_G3_REG 0x27 +#define CPLD_QSFPDD_FUSE_INT_MASK_G0_REG 0x28 +#define CPLD_QSFPDD_FUSE_INT_MASK_G1_REG 0x29 +#define CPLD_QSFPDD_FUSE_INT_MASK_G2_REG 0x2A +#define CPLD_QSFPDD_FUSE_INT_MASK_G3_REG 0x2B +#define CPLD_SFP_TXFAULT_MASK_REG 0x2D +#define CPLD_SFP_ABS_MASK_REG 0x2E +#define CPLD_SFP_RXLOS_MASK_REG 0x2F +// Interrupt event +#define CPLD_QSFPDD_MOD_INT_EVENT_G0_REG 0x30 +#define CPLD_QSFPDD_MOD_INT_EVENT_G1_REG 0x31 +#define CPLD_QSFPDD_MOD_INT_EVENT_G2_REG 0x32 +#define CPLD_QSFPDD_MOD_INT_EVENT_G3_REG 0x33 +#define CPLD_QSFPDD_PRES_EVENT_G0_REG 0x34 +#define CPLD_QSFPDD_PRES_EVENT_G1_REG 0x35 +#define CPLD_QSFPDD_PRES_EVENT_G2_REG 0x36 +#define CPLD_QSFPDD_PRES_EVENT_G3_REG 0x37 +#define CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG 0x38 +#define CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG 0x39 +#define CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG 0x3A +#define CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG 0x3B +#define CPLD_SFP_TXFAULT_EVENT_REG 0x3D +#define CPLD_SFP_ABS_EVENT_REG 0x3E +#define CPLD_SFP_RXLOS_EVENT_REG 0x3F +// Port ctrl +#define CPLD_QSFPDD_RESET_CTRL_G0_REG 0x40 +#define CPLD_QSFPDD_RESET_CTRL_G1_REG 0x41 +#define CPLD_QSFPDD_RESET_CTRL_G2_REG 0x42 +#define CPLD_QSFPDD_RESET_CTRL_G3_REG 0x43 +#define CPLD_QSFPDD_LP_MODE_G0_REG 0x44 +#define CPLD_QSFPDD_LP_MODE_G1_REG 0x45 +#define CPLD_QSFPDD_LP_MODE_G2_REG 0x46 +#define CPLD_QSFPDD_LP_MODE_G3_REG 0x47 +#define CPLD_SFP_TX_DIS_REG 0x55 +#define CPLD_SFP_RS_REG 0x56 +#define CPLD_SFP_TS_REG 0x57 +// Port status +#define CPLD_PORT_INT_STATUS_REG 0x58 + + +/* bit field structure for register value */ +struct cpld_reg_sku_id_t { + u8 model_id:8; +}; + +struct cpld_reg_hw_rev_t { + u8 hw_rev:2; + u8 deph_rev:1; + u8 build_rev:3; + u8 reserved:1; + u8 id_type:1; +}; + +struct cpld_reg_version_t { + u8 minor:6; + u8 major:2; +}; + +struct cpld_reg_id_t { + u8 id:3; + u8 release:5; +}; + +struct cpld_reg_beacon_led_ctrl_t { + u8 reserve:5; + u8 speed:1; + u8 blink:1; + u8 onoff:1; +}; + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) +#define READ_BIT(val, bit) ((0u == (val & (1<bf_name) +#define READ_BF_1(bf_struct, val, bf_name, bf_value) \ + bf_struct bf; \ + bf.data = val; \ + bf_value = bf.bf_name +#define HW_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, hw_rev, res) +#define DEPH_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, deph_rev, res) +#define BUILD_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, build_rev, res) +#define ID_TYPE_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, id_type, res) +#define CPLD_MAJOR_VERSION_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, major, res) +#define CPLD_MINOR_VERSION_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, minor, res) +#define CPLD_ID_ID_GET(val, res) \ + READ_BF(cpld_reg_id_t, val, id, res) + +/* CPLD access functions */ +extern int s9300_cpld_read(u8 cpld_idx, u8 reg); +extern int s9300_cpld_write(u8 cpld_idx, u8 reg, u8 value); + +#endif + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-lpc.c index a00d8320221b..d227f631748b 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-lpc.c +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-lpc.c @@ -1,816 +1,850 @@ -/* - * A lpc driver for the ufispace_s9300_32d - * - * Copyright (C) 2017-2020 UfiSpace Technology Corporation. - * Jason Tsai - * - * Based on ad7414.c - * Copyright 2006 Stefan Roese , DENX Software Engineering - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#include -#include -#include -#include -#include - -#define BSP_LOG_R(fmt, args...) \ - _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ - __FILE__, __func__, __LINE__, ##args) -#define BSP_LOG_W(fmt, args...) \ - _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ - __FILE__, __func__, __LINE__, ##args) - -#define DRIVER_NAME "x86_64_ufispace_s9300_32d_lpc" -#define CPU_BDE 0 -#define CPU_SKY 1 -#define CPU_TYPE CPU_SKY - -/* LPC registers */ - -#define REG_BASE_CPU 0x600 - -#if CPU_TYPE == CPU_SKY -#define REG_BASE_MB 0xE00 -#define REG_BASE_I2C_ALERT 0x700 -#else -#define REG_BASE_MB 0x700 -#define REG_BASE_I2C_ALERT 0xF000 -#endif - -//CPU CPLD -#define REG_CPU_CPLD_VERSION (REG_BASE_CPU + 0x00) -#define REG_CPU_STATUS_0 (REG_BASE_CPU + 0x01) -#define REG_CPU_STATUS_1 (REG_BASE_CPU + 0x02) -#define REG_CPU_CTRL_0 (REG_BASE_CPU + 0x03) -#define REG_CPU_CTRL_1 (REG_BASE_CPU + 0x04) -#define REG_CPU_CPLD_BUILD (REG_BASE_CPU + 0xE0) - -//MB CPLD -//TBD, need to change after CPLD spec release -#define REG_MB_BRD_ID_0 (REG_BASE_MB + 0x00) -#define REG_MB_BRD_ID_1 (REG_BASE_MB + 0x01) -#define REG_MB_CPLD_VERSION (REG_BASE_MB + 0x02) -#define REG_MB_CPLD_BUILD (REG_BASE_MB + 0x04) -#define REG_MB_MUX_RESET (REG_BASE_MB + 0x46) -#define REG_MB_MUX_CTRL (REG_BASE_MB + 0x5c) - -//I2C Alert -#if CPU_TYPE == CPU_SKY -#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x80) -#else -#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x00) -#define REG_ALERT_DISABLE (REG_BASE_I2C_ALERT + 0x11) -#endif - -#define MASK_ALL (0xFF) -#define LPC_MDELAY (5) - -/* LPC sysfs attributes index */ -enum lpc_sysfs_attributes { - //CPU CPLD - ATT_CPU_CPLD_VERSION, - ATT_CPU_CPLD_VERSION_H, - ATT_CPU_BIOS_BOOT_ROM, - ATT_CPU_BIOS_BOOT_CFG, - ATT_CPU_CPLD_BUILD, - //MB CPLD - ATT_MB_BRD_ID_0, - ATT_MB_BRD_ID_1, - ATT_MB_CPLD_1_VERSION, - ATT_MB_CPLD_1_VERSION_H, - ATT_MB_CPLD_1_BUILD, - ATT_MB_MUX_CTRL, - ATT_MB_MUX_RESET, - ATT_MB_BRD_SKU_ID, - ATT_MB_BRD_HW_ID, - ATT_MB_BRD_ID_TYPE, - ATT_MB_BRD_BUILD_ID, - ATT_MB_BRD_DEPH_ID, - //I2C Alert - ATT_ALERT_STATUS, -#if CPU_TYPE == CPU_BDE - ATT_ALERT_DISABLE, -#endif - //BSP - ATT_BSP_VERSION, - ATT_BSP_DEBUG, - ATT_BSP_REG, - ATT_MAX -}; - -enum bsp_log_types { - LOG_NONE, - LOG_RW, - LOG_READ, - LOG_WRITE -}; - -enum bsp_log_ctrl { - LOG_DISABLE, - LOG_ENABLE -}; - -struct lpc_data_s { - struct mutex access_lock; -}; - -struct lpc_data_s *lpc_data; -char bsp_version[16]=""; -char bsp_debug[2]="0"; -char bsp_reg[8]="0x0"; -u8 enable_log_read=LOG_DISABLE; -u8 enable_log_write=LOG_DISABLE; - -/* reg shift */ -static u8 _shift(u8 mask) -{ - int i=0, mask_one=1; - - for(i=0; i<8; ++i) { - if ((mask & mask_one) == 1) - return i; - else - mask >>= 1; - } - - return -1; -} - -/* reg mask and shift */ -static u8 _mask_shift(u8 val, u8 mask) -{ - int shift=0; - - shift = _shift(mask); - - return (val & mask) >> shift; -} - -static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val) -{ - if (bit_val == 0) - reg_val = reg_val & ~(1 << bit); - else - reg_val = reg_val | (1 << bit); - return reg_val; -} - -static int _bsp_log(u8 log_type, char *fmt, ...) -{ - if ((log_type==LOG_READ && enable_log_read) || - (log_type==LOG_WRITE && enable_log_write)) { - va_list args; - int r; - - va_start(args, fmt); - r = vprintk(fmt, args); - va_end(args); - - return r; - } else { - return 0; - } -} - -static int _config_bsp_log(u8 log_type) -{ - switch(log_type) { - case LOG_NONE: - enable_log_read = LOG_DISABLE; - enable_log_write = LOG_DISABLE; - break; - case LOG_RW: - enable_log_read = LOG_ENABLE; - enable_log_write = LOG_ENABLE; - break; - case LOG_READ: - enable_log_read = LOG_ENABLE; - enable_log_write = LOG_DISABLE; - break; - case LOG_WRITE: - enable_log_read = LOG_DISABLE; - enable_log_write = LOG_ENABLE; - break; - default: - return -EINVAL; - } - return 0; -} - -/* get lpc register value */ -static u8 _read_lpc_reg(u16 reg, u8 mask) -{ - u8 reg_val; - - mutex_lock(&lpc_data->access_lock); - reg_val=_mask_shift(inb(reg), mask); - mutex_unlock(&lpc_data->access_lock); - - BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); - - return reg_val; -} - -/* get lpc register value */ -static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf) -{ - u8 reg_val; - int len=0; - - reg_val = _read_lpc_reg(reg, mask); - len=sprintf(buf,"0x%x\n", reg_val); - - return len; -} - -/* set lpc register value */ -static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count) -{ - u8 reg_val, reg_val_now, shift; - - if (kstrtou8(buf, 0, ®_val) < 0) - return -EINVAL; - - //apply SINGLE BIT operation if mask is specified, multiple bits are not supported - if (mask != MASK_ALL) { - reg_val_now = _read_lpc_reg(reg, 0x0); - shift = _shift(mask); - reg_val = _bit_operation(reg_val_now, shift, reg_val); - } - - mutex_lock(&lpc_data->access_lock); - - outb(reg_val, reg); - mdelay(LPC_MDELAY); - - mutex_unlock(&lpc_data->access_lock); - - BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val); - - return count; -} - -/* get bsp value */ -static ssize_t read_bsp(char *buf, char *str) -{ - ssize_t len=0; - - mutex_lock(&lpc_data->access_lock); - len=sprintf(buf, "%s", str); - mutex_unlock(&lpc_data->access_lock); - - BSP_LOG_R("reg_val=%s", str); - - return len; -} - -/* set bsp value */ -static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) -{ - mutex_lock(&lpc_data->access_lock); - snprintf(str, str_len, "%s", buf); - mutex_unlock(&lpc_data->access_lock); - - BSP_LOG_W("reg_val=%s", str); - - return count; -} - -/* get cpu cpld version in human readable format */ -static ssize_t read_cpu_cpld_version_h(struct device *dev, - struct device_attribute *da, char *buf) -{ - ssize_t len=0; - u16 reg = REG_CPU_CPLD_VERSION; - u8 mask = MASK_ALL; - u8 mask_major = 0b11000000; - u8 mask_minor = 0b00111111; - u8 reg_val; - u8 major, minor, build; - - mutex_lock(&lpc_data->access_lock); - reg_val = _mask_shift(inb(reg), mask); - major = _mask_shift(reg_val, mask_major); - minor = _mask_shift(reg_val, mask_minor); - reg = REG_CPU_CPLD_BUILD; - build = _mask_shift(inb(reg), mask); - len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build); - mutex_unlock(&lpc_data->access_lock); - - BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); - - return len; -} - -/* get mb cpld version in human readable format */ -static ssize_t read_mb_cpld_1_version_h(struct device *dev, - struct device_attribute *da, char *buf) -{ - ssize_t len=0; - u16 reg = REG_MB_CPLD_VERSION; - u8 mask = MASK_ALL; - u8 mask_major = 0b11000000; - u8 mask_minor = 0b00111111; - u8 reg_val; - u8 major, minor, build; - - mutex_lock(&lpc_data->access_lock); - reg_val = _mask_shift(inb(reg), mask); - major = _mask_shift(reg_val, mask_major); - minor = _mask_shift(reg_val, mask_minor); - reg = REG_MB_CPLD_BUILD; - build = _mask_shift(inb(reg), mask); - len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build); - mutex_unlock(&lpc_data->access_lock); - - BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); - - return len; -} - -/* get mux_reset register value */ -static ssize_t read_mux_reset_callback(struct device *dev, - struct device_attribute *da, char *buf) -{ - int len = 0; - u16 reg = REG_MB_MUX_RESET; - u8 mask = 0b00011111; - u8 reg_val; - - mutex_lock(&lpc_data->access_lock); - reg_val=_mask_shift(inb(reg), mask); - BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); - len=sprintf(buf, "%d\n", reg_val); - mutex_unlock(&lpc_data->access_lock); - - return len; -} - -/* set mux_reset register value */ -static ssize_t write_mux_reset_callback(struct device *dev, - struct device_attribute *da, const char *buf, size_t count) -{ - u8 val = 0; - u16 reg = REG_MB_MUX_RESET; - u8 reg_val = 0; - u8 mask = 0b00011111; - static int mux_reset_flag = 0; - - if (kstrtou8(buf, 0, &val) < 0) - return -EINVAL; - - if (mux_reset_flag == 0) { - if (val == 0) { - mutex_lock(&lpc_data->access_lock); - mux_reset_flag = 1; - BSP_LOG_W("i2c mux reset is triggered..."); - - reg_val = inb(reg); - outb((reg_val & ~mask), reg); - mdelay(LPC_MDELAY); - BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val & ~mask); - mdelay(500); - outb((reg_val | mask), reg); - mdelay(LPC_MDELAY); - BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val | mask); - mdelay(500); - mux_reset_flag = 0; - mutex_unlock(&lpc_data->access_lock); - } else { - return -EINVAL; - } - } else { - BSP_LOG_W("i2c mux is resetting... (ignore)"); - mutex_lock(&lpc_data->access_lock); - mutex_unlock(&lpc_data->access_lock); - } - - return count; -} - -/* get lpc register value */ -static ssize_t read_lpc_callback(struct device *dev, - struct device_attribute *da, char *buf) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - u16 reg = 0; - u8 mask = MASK_ALL; - - switch (attr->index) { - //CPU CPLD - case ATT_CPU_CPLD_VERSION: - reg = REG_CPU_CPLD_VERSION; - break; - case ATT_CPU_BIOS_BOOT_ROM: - reg = REG_CPU_STATUS_1; - mask = 0x80; - break; - case ATT_CPU_BIOS_BOOT_CFG: - reg = REG_CPU_CTRL_1; - mask = 0x80; - break; - case ATT_CPU_CPLD_BUILD: - reg = REG_CPU_CPLD_BUILD; - break; - //MB CPLD - case ATT_MB_BRD_ID_0: - reg = REG_MB_BRD_ID_0; - break; - case ATT_MB_BRD_ID_1: - reg = REG_MB_BRD_ID_1; - break; - case ATT_MB_CPLD_1_VERSION: - reg = REG_MB_CPLD_VERSION; - break; - case ATT_MB_CPLD_1_BUILD: - reg = REG_MB_CPLD_BUILD; - break; - case ATT_MB_BRD_SKU_ID: - reg = REG_MB_BRD_ID_0; - mask = 0xFF; - break; - case ATT_MB_BRD_HW_ID: - reg = REG_MB_BRD_ID_1; - mask = 0x03; - break; - case ATT_MB_BRD_ID_TYPE: - reg = REG_MB_BRD_ID_1; - mask = 0x80; - break; - case ATT_MB_BRD_BUILD_ID: - reg = REG_MB_BRD_ID_1; - mask = 0x38; - break; - case ATT_MB_BRD_DEPH_ID: - reg = REG_MB_BRD_ID_1; - mask = 0x04; - break; - case ATT_MB_MUX_CTRL: - reg = REG_MB_MUX_CTRL; - break; - //I2C Alert - case ATT_ALERT_STATUS: - reg = REG_ALERT_STATUS; - mask = 0x20; - break; -#if CPU_TYPE == CPU_BDE - case ATT_ALERT_DISABLE: - reg = REG_ALERT_DISABLE; - mask = 0x04; - break; -#endif - //BSP - case ATT_BSP_REG: - if (kstrtou16(bsp_reg, 0, ®) < 0) - return -EINVAL; - break; - default: - return -EINVAL; - } - return read_lpc_reg(reg, mask, buf); -} - -/* set lpc register value */ -static ssize_t write_lpc_callback(struct device *dev, - struct device_attribute *da, const char *buf, size_t count) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - u16 reg = 0; - u8 mask = MASK_ALL; - - switch (attr->index) { - case ATT_MB_MUX_CTRL: - reg = REG_MB_MUX_CTRL; - break; - default: - return -EINVAL; - } - return write_lpc_reg(reg, mask, buf, count); -} - -/* get bsp parameter value */ -static ssize_t read_bsp_callback(struct device *dev, - struct device_attribute *da, char *buf) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - int str_len=0; - char *str=NULL; - - switch (attr->index) { - case ATT_BSP_VERSION: - str = bsp_version; - str_len = sizeof(bsp_version); - break; - case ATT_BSP_DEBUG: - str = bsp_debug; - str_len = sizeof(bsp_debug); - break; - case ATT_BSP_REG: - str = bsp_reg; - str_len = sizeof(bsp_reg); - break; - default: - return -EINVAL; - } - return read_bsp(buf, str); -} - -/* set bsp parameter value */ -static ssize_t write_bsp_callback(struct device *dev, - struct device_attribute *da, const char *buf, size_t count) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - int str_len=0; - char *str=NULL; - u16 reg = 0; - u8 bsp_debug_u8 = 0; - - switch (attr->index) { - case ATT_BSP_VERSION: - str = bsp_version; - str_len = sizeof(str); - break; - case ATT_BSP_DEBUG: - str = bsp_debug; - str_len = sizeof(str); - break; - case ATT_BSP_REG: - if (kstrtou16(buf, 0, ®) < 0) - return -EINVAL; - - str = bsp_reg; - str_len = sizeof(str); - break; - default: - return -EINVAL; - } - - if (attr->index == ATT_BSP_DEBUG) { - if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { - return -EINVAL; - } else if (_config_bsp_log(bsp_debug_u8) < 0) { - return -EINVAL; - } - } - - return write_bsp(buf, str, str_len, count); -} - -//SENSOR_DEVICE_ATTR - CPU -static SENSOR_DEVICE_ATTR(cpu_cpld_version, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_VERSION); -static SENSOR_DEVICE_ATTR(cpu_cpld_version_h, S_IRUGO, read_cpu_cpld_version_h, NULL, ATT_CPU_CPLD_VERSION_H); -static SENSOR_DEVICE_ATTR(boot_rom, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM); -static SENSOR_DEVICE_ATTR(boot_cfg, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG); -static SENSOR_DEVICE_ATTR(cpu_cpld_build, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD); -//SENSOR_DEVICE_ATTR - MB -static SENSOR_DEVICE_ATTR(board_id_0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0); -static SENSOR_DEVICE_ATTR(board_id_1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1); -static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION); -static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H); -static SENSOR_DEVICE_ATTR(mb_cpld_1_build, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD); -static SENSOR_DEVICE_ATTR(mux_ctrl, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL); -static SENSOR_DEVICE_ATTR(mux_reset, S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET); -static SENSOR_DEVICE_ATTR(board_sku_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID); -static SENSOR_DEVICE_ATTR(board_hw_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID); -static SENSOR_DEVICE_ATTR(board_id_type, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE); -static SENSOR_DEVICE_ATTR(board_build_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID); -static SENSOR_DEVICE_ATTR(board_deph_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID); -//SENSOR_DEVICE_ATTR - I2C Alert -static SENSOR_DEVICE_ATTR(alert_status, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS); -#if CPU_TYPE == CPU_BDE -static SENSOR_DEVICE_ATTR(alert_disable, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE); -#endif -//SENSOR_DEVICE_ATTR - BSP -static SENSOR_DEVICE_ATTR(bsp_version, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION); -static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG); -static SENSOR_DEVICE_ATTR(bsp_reg, S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG); - -static struct attribute *cpu_cpld_attrs[] = { - &sensor_dev_attr_cpu_cpld_version.dev_attr.attr, - &sensor_dev_attr_cpu_cpld_version_h.dev_attr.attr, - &sensor_dev_attr_cpu_cpld_build.dev_attr.attr, - NULL, -}; - -static struct attribute *mb_cpld_attrs[] = { - &sensor_dev_attr_board_id_0.dev_attr.attr, - &sensor_dev_attr_board_id_1.dev_attr.attr, - &sensor_dev_attr_mb_cpld_1_version.dev_attr.attr, - &sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr, - &sensor_dev_attr_mb_cpld_1_build.dev_attr.attr, - &sensor_dev_attr_board_sku_id.dev_attr.attr, - &sensor_dev_attr_board_hw_id.dev_attr.attr, - &sensor_dev_attr_board_id_type.dev_attr.attr, - &sensor_dev_attr_board_build_id.dev_attr.attr, - &sensor_dev_attr_board_deph_id.dev_attr.attr, - &sensor_dev_attr_mux_ctrl.dev_attr.attr, - &sensor_dev_attr_mux_reset.dev_attr.attr, - NULL, -}; - -static struct attribute *bios_attrs[] = { - &sensor_dev_attr_boot_rom.dev_attr.attr, - &sensor_dev_attr_boot_cfg.dev_attr.attr, - NULL, -}; - -static struct attribute *i2c_alert_attrs[] = { - &sensor_dev_attr_alert_status.dev_attr.attr, -#if CPU_TYPE == CPU_BDE - &sensor_dev_attr_alert_disable.dev_attr.attr, -#endif - NULL, -}; - -static struct attribute *bsp_attrs[] = { - &sensor_dev_attr_bsp_version.dev_attr.attr, - &sensor_dev_attr_bsp_debug.dev_attr.attr, - &sensor_dev_attr_bsp_reg.dev_attr.attr, - NULL, -}; - -static struct attribute_group cpu_cpld_attr_grp = { - .name = "cpu_cpld", - .attrs = cpu_cpld_attrs, -}; - -static struct attribute_group mb_cpld_attr_grp = { - .name = "mb_cpld", - .attrs = mb_cpld_attrs, -}; - -static struct attribute_group bios_attr_grp = { - .name = "bios", - .attrs = bios_attrs, -}; - -static struct attribute_group i2c_alert_attr_grp = { - .name = "i2c_alert", - .attrs = i2c_alert_attrs, -}; - -static struct attribute_group bsp_attr_grp = { - .name = "bsp", - .attrs = bsp_attrs, -}; - -static void lpc_dev_release( struct device * dev) -{ - return; -} - -static struct platform_device lpc_dev = { - .name = DRIVER_NAME, - .id = -1, - .dev = { - .release = lpc_dev_release, - } -}; - -static int lpc_drv_probe(struct platform_device *pdev) -{ - int i = 0, grp_num = 5; - int err[5] = {0}; - struct attribute_group *grp; - - lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s), - GFP_KERNEL); - if (!lpc_data) - return -ENOMEM; - - mutex_init(&lpc_data->access_lock); - - for (i=0; idev.kobj, grp); - if (err[i]) { - printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name); - goto exit; - } else { - continue; - } - } - - return 0; - -exit: - for (i=0; idev.kobj, grp); - if (!err[i]) { - //remove previous successful cases - continue; - } else { - //remove first failed case, then return - return err[i]; - } - } - return 0; -} - -static int lpc_drv_remove(struct platform_device *pdev) -{ - sysfs_remove_group(&pdev->dev.kobj, &cpu_cpld_attr_grp); - sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp); - sysfs_remove_group(&pdev->dev.kobj, &bios_attr_grp); - sysfs_remove_group(&pdev->dev.kobj, &i2c_alert_attr_grp); - sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp); - - return 0; -} - -static struct platform_driver lpc_drv = { - .probe = lpc_drv_probe, - .remove = __exit_p(lpc_drv_remove), - .driver = { - .name = DRIVER_NAME, - }, -}; - -int lpc_init(void) -{ - int err = 0; - - err = platform_driver_register(&lpc_drv); - if (err) { - printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", - __func__, __LINE__, err); - - return err; - } - - err = platform_device_register(&lpc_dev); - if (err) { - printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", - __func__, __LINE__, err); - platform_driver_unregister(&lpc_drv); - return err; - } - - return err; -} - -void lpc_exit(void) -{ - platform_driver_unregister(&lpc_drv); - platform_device_unregister(&lpc_dev); -} - -MODULE_AUTHOR("Leo Lin "); -MODULE_DESCRIPTION("x86_64_ufispace_s9300_32d_lpc driver"); -MODULE_LICENSE("GPL"); - -module_init(lpc_init); -module_exit(lpc_exit); +/* + * A lpc driver for the ufispace_s9300_32d + * + * Copyright (C) 2017-2020 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) + +#define DRIVER_NAME "x86_64_ufispace_s9300_32d_lpc" +#define CPU_BDE 0 +#define CPU_SKY 1 +#define CPU_TYPE CPU_SKY + +/* LPC registers */ + +#define REG_BASE_CPU 0x600 + +#if CPU_TYPE == CPU_SKY +#define REG_BASE_MB 0xE00 +#define REG_BASE_I2C_ALERT 0x700 +#else +#define REG_BASE_MB 0x700 +#define REG_BASE_I2C_ALERT 0xF000 +#endif + +//CPU CPLD +#define REG_CPU_CPLD_VERSION (REG_BASE_CPU + 0x00) +#define REG_CPU_STATUS_0 (REG_BASE_CPU + 0x01) +#define REG_CPU_STATUS_1 (REG_BASE_CPU + 0x02) +#define REG_CPU_CTRL_0 (REG_BASE_CPU + 0x03) +#define REG_CPU_CTRL_1 (REG_BASE_CPU + 0x04) +#define REG_CPU_CPLD_BUILD (REG_BASE_CPU + 0xE0) + +//MB CPLD +//TBD, need to change after CPLD spec release +#define REG_MB_BRD_ID_0 (REG_BASE_MB + 0x00) +#define REG_MB_BRD_ID_1 (REG_BASE_MB + 0x01) +#define REG_MB_CPLD_VERSION (REG_BASE_MB + 0x02) +#define REG_MB_CPLD_BUILD (REG_BASE_MB + 0x04) +#define REG_MB_MUX_RESET (REG_BASE_MB + 0x46) +#define REG_MB_MUX_CTRL (REG_BASE_MB + 0x5c) + +//I2C Alert +#if CPU_TYPE == CPU_SKY +#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x80) +#else +#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x00) +#define REG_ALERT_DISABLE (REG_BASE_I2C_ALERT + 0x11) +#endif + +#define MASK_ALL (0xFF) +#define LPC_MDELAY (5) + +/* LPC sysfs attributes index */ +enum lpc_sysfs_attributes { + //CPU CPLD + ATT_CPU_CPLD_VERSION, + ATT_CPU_CPLD_VERSION_H, + ATT_CPU_BIOS_BOOT_ROM, + ATT_CPU_BIOS_BOOT_CFG, + ATT_CPU_CPLD_BUILD, + //MB CPLD + ATT_MB_BRD_ID_0, + ATT_MB_BRD_ID_1, + ATT_MB_CPLD_1_VERSION, + ATT_MB_CPLD_1_VERSION_H, + ATT_MB_CPLD_1_BUILD, + ATT_MB_MUX_CTRL, + ATT_MB_MUX_RESET, + ATT_MB_BRD_SKU_ID, + ATT_MB_BRD_HW_ID, + ATT_MB_BRD_ID_TYPE, + ATT_MB_BRD_BUILD_ID, + ATT_MB_BRD_DEPH_ID, + //I2C Alert + ATT_ALERT_STATUS, +#if CPU_TYPE == CPU_BDE + ATT_ALERT_DISABLE, +#endif + //BSP + ATT_BSP_VERSION, + ATT_BSP_DEBUG, + ATT_BSP_PR_INFO, + ATT_BSP_PR_ERR, + ATT_BSP_REG, + ATT_MAX +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE, + LOG_SYS +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +struct lpc_data_s { + struct mutex access_lock; +}; + +struct lpc_data_s *lpc_data; +char bsp_version[16]=""; +char bsp_debug[2]="0"; +char bsp_reg[8]="0x0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; +u8 enable_log_sys=LOG_ENABLE; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if ((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val) +{ + if (bit_val == 0) + reg_val = reg_val & ~(1 << bit); + else + reg_val = reg_val | (1 << bit); + return reg_val; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write) || + (log_type==LOG_SYS && enable_log_sys) ) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get lpc register value */ +static u8 _read_lpc_reg(u16 reg, u8 mask) +{ + u8 reg_val; + + mutex_lock(&lpc_data->access_lock); + reg_val=_mask_shift(inb(reg), mask); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return reg_val; +} + +/* get lpc register value */ +static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf) +{ + u8 reg_val; + int len=0; + + reg_val = _read_lpc_reg(reg, mask); + len=sprintf(buf,"0x%x\n", reg_val); + + return len; +} + +/* set lpc register value */ +static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count) +{ + u8 reg_val, reg_val_now, shift; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + //apply SINGLE BIT operation if mask is specified, multiple bits are not supported + if (mask != MASK_ALL) { + reg_val_now = _read_lpc_reg(reg, 0x0); + shift = _shift(mask); + reg_val = _bit_operation(reg_val_now, shift, reg_val); + } + + mutex_lock(&lpc_data->access_lock); + + outb(reg_val, reg); + mdelay(LPC_MDELAY); + + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return count; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + mutex_lock(&lpc_data->access_lock); + len=sprintf(buf, "%s", str); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + mutex_lock(&lpc_data->access_lock); + snprintf(str, str_len, "%s", buf); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get cpu cpld version in human readable format */ +static ssize_t read_cpu_cpld_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u16 reg = REG_CPU_CPLD_VERSION; + u8 mask = MASK_ALL; + u8 mask_major = 0b11000000; + u8 mask_minor = 0b00111111; + u8 reg_val; + u8 major, minor, build; + + mutex_lock(&lpc_data->access_lock); + reg_val = _mask_shift(inb(reg), mask); + major = _mask_shift(reg_val, mask_major); + minor = _mask_shift(reg_val, mask_minor); + reg = REG_CPU_CPLD_BUILD; + build = _mask_shift(inb(reg), mask); + len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return len; +} + +/* get mb cpld version in human readable format */ +static ssize_t read_mb_cpld_1_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u16 reg = REG_MB_CPLD_VERSION; + u8 mask = MASK_ALL; + u8 mask_major = 0b11000000; + u8 mask_minor = 0b00111111; + u8 reg_val; + u8 major, minor, build; + + mutex_lock(&lpc_data->access_lock); + reg_val = _mask_shift(inb(reg), mask); + major = _mask_shift(reg_val, mask_major); + minor = _mask_shift(reg_val, mask_minor); + reg = REG_MB_CPLD_BUILD; + build = _mask_shift(inb(reg), mask); + len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return len; +} + +/* get mux_reset register value */ +static ssize_t read_mux_reset_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + int len = 0; + u16 reg = REG_MB_MUX_RESET; + u8 mask = 0b00011111; + u8 reg_val; + + mutex_lock(&lpc_data->access_lock); + reg_val=_mask_shift(inb(reg), mask); + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + len=sprintf(buf, "%d\n", reg_val); + mutex_unlock(&lpc_data->access_lock); + + return len; +} + +/* set mux_reset register value */ +static ssize_t write_mux_reset_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + u8 val = 0; + u16 reg = REG_MB_MUX_RESET; + u8 reg_val = 0; + u8 mask = 0b00011111; + static int mux_reset_flag = 0; + + if (kstrtou8(buf, 0, &val) < 0) + return -EINVAL; + + if (mux_reset_flag == 0) { + if (val == 0) { + mutex_lock(&lpc_data->access_lock); + mux_reset_flag = 1; + BSP_LOG_W("i2c mux reset is triggered..."); + + reg_val = inb(reg); + outb((reg_val & ~mask), reg); + mdelay(LPC_MDELAY); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val & ~mask); + mdelay(500); + outb((reg_val | mask), reg); + mdelay(LPC_MDELAY); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val | mask); + mdelay(500); + mux_reset_flag = 0; + mutex_unlock(&lpc_data->access_lock); + } else { + return -EINVAL; + } + } else { + BSP_LOG_W("i2c mux is resetting... (ignore)"); + mutex_lock(&lpc_data->access_lock); + mutex_unlock(&lpc_data->access_lock); + } + + return count; +} + +/* get lpc register value */ +static ssize_t read_lpc_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + + switch (attr->index) { + //CPU CPLD + case ATT_CPU_CPLD_VERSION: + reg = REG_CPU_CPLD_VERSION; + break; + case ATT_CPU_BIOS_BOOT_ROM: + reg = REG_CPU_STATUS_1; + mask = 0x80; + break; + case ATT_CPU_BIOS_BOOT_CFG: + reg = REG_CPU_CTRL_1; + mask = 0x80; + break; + case ATT_CPU_CPLD_BUILD: + reg = REG_CPU_CPLD_BUILD; + break; + //MB CPLD + case ATT_MB_BRD_ID_0: + reg = REG_MB_BRD_ID_0; + break; + case ATT_MB_BRD_ID_1: + reg = REG_MB_BRD_ID_1; + break; + case ATT_MB_CPLD_1_VERSION: + reg = REG_MB_CPLD_VERSION; + break; + case ATT_MB_CPLD_1_BUILD: + reg = REG_MB_CPLD_BUILD; + break; + case ATT_MB_BRD_SKU_ID: + reg = REG_MB_BRD_ID_0; + mask = 0xFF; + break; + case ATT_MB_BRD_HW_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x03; + break; + case ATT_MB_BRD_ID_TYPE: + reg = REG_MB_BRD_ID_1; + mask = 0x80; + break; + case ATT_MB_BRD_BUILD_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x38; + break; + case ATT_MB_BRD_DEPH_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x04; + break; + case ATT_MB_MUX_CTRL: + reg = REG_MB_MUX_CTRL; + break; + //I2C Alert + case ATT_ALERT_STATUS: + reg = REG_ALERT_STATUS; + mask = 0x20; + break; +#if CPU_TYPE == CPU_BDE + case ATT_ALERT_DISABLE: + reg = REG_ALERT_DISABLE; + mask = 0x04; + break; +#endif + //BSP + case ATT_BSP_REG: + if (kstrtou16(bsp_reg, 0, ®) < 0) + return -EINVAL; + break; + default: + return -EINVAL; + } + return read_lpc_reg(reg, mask, buf); +} + +/* set lpc register value */ +static ssize_t write_lpc_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + + switch (attr->index) { + case ATT_MB_MUX_CTRL: + reg = REG_MB_MUX_CTRL; + break; + default: + return -EINVAL; + } + return write_lpc_reg(reg, mask, buf, count); +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + u16 reg = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + if (kstrtou16(buf, 0, ®) < 0) + return -EINVAL; + + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + + if (attr->index == ATT_BSP_DEBUG) { + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + } + + return write_bsp(buf, str, str_len, count); +} + +static ssize_t write_bsp_pr_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len = strlen(buf); + + if(str_len <= 0) + return str_len; + + switch (attr->index) { + case ATT_BSP_PR_INFO: + BSP_PR(KERN_INFO, "%s", buf); + break; + case ATT_BSP_PR_ERR: + BSP_PR(KERN_ERR, "%s", buf); + break; + default: + return -EINVAL; + } + + return str_len; +} + +//SENSOR_DEVICE_ATTR - CPU +static SENSOR_DEVICE_ATTR(cpu_cpld_version, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_VERSION); +static SENSOR_DEVICE_ATTR(cpu_cpld_version_h, S_IRUGO, read_cpu_cpld_version_h, NULL, ATT_CPU_CPLD_VERSION_H); +static SENSOR_DEVICE_ATTR(boot_rom, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM); +static SENSOR_DEVICE_ATTR(boot_cfg, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG); +static SENSOR_DEVICE_ATTR(cpu_cpld_build, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD); +//SENSOR_DEVICE_ATTR - MB +static SENSOR_DEVICE_ATTR(board_id_0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0); +static SENSOR_DEVICE_ATTR(board_id_1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1); +static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION); +static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H); +static SENSOR_DEVICE_ATTR(mb_cpld_1_build, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD); +static SENSOR_DEVICE_ATTR(mux_ctrl, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL); +static SENSOR_DEVICE_ATTR(mux_reset, S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET); +static SENSOR_DEVICE_ATTR(board_sku_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID); +static SENSOR_DEVICE_ATTR(board_hw_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID); +static SENSOR_DEVICE_ATTR(board_id_type, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE); +static SENSOR_DEVICE_ATTR(board_build_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID); +static SENSOR_DEVICE_ATTR(board_deph_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID); +//SENSOR_DEVICE_ATTR - I2C Alert +static SENSOR_DEVICE_ATTR(alert_status, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS); +#if CPU_TYPE == CPU_BDE +static SENSOR_DEVICE_ATTR(alert_disable, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE); +#endif +//SENSOR_DEVICE_ATTR - BSP +static SENSOR_DEVICE_ATTR(bsp_version, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION); +static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG); +static SENSOR_DEVICE_ATTR(bsp_pr_info, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_INFO); +static SENSOR_DEVICE_ATTR(bsp_pr_err, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_ERR); +static SENSOR_DEVICE_ATTR(bsp_reg, S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG); + +static struct attribute *cpu_cpld_attrs[] = { + &sensor_dev_attr_cpu_cpld_version.dev_attr.attr, + &sensor_dev_attr_cpu_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpu_cpld_build.dev_attr.attr, + NULL, +}; + +static struct attribute *mb_cpld_attrs[] = { + &sensor_dev_attr_board_id_0.dev_attr.attr, + &sensor_dev_attr_board_id_1.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_build.dev_attr.attr, + &sensor_dev_attr_board_sku_id.dev_attr.attr, + &sensor_dev_attr_board_hw_id.dev_attr.attr, + &sensor_dev_attr_board_id_type.dev_attr.attr, + &sensor_dev_attr_board_build_id.dev_attr.attr, + &sensor_dev_attr_board_deph_id.dev_attr.attr, + &sensor_dev_attr_mux_ctrl.dev_attr.attr, + &sensor_dev_attr_mux_reset.dev_attr.attr, + NULL, +}; + +static struct attribute *bios_attrs[] = { + &sensor_dev_attr_boot_rom.dev_attr.attr, + &sensor_dev_attr_boot_cfg.dev_attr.attr, + NULL, +}; + +static struct attribute *i2c_alert_attrs[] = { + &sensor_dev_attr_alert_status.dev_attr.attr, +#if CPU_TYPE == CPU_BDE + &sensor_dev_attr_alert_disable.dev_attr.attr, +#endif + NULL, +}; + +static struct attribute *bsp_attrs[] = { + &sensor_dev_attr_bsp_version.dev_attr.attr, + &sensor_dev_attr_bsp_debug.dev_attr.attr, + &sensor_dev_attr_bsp_pr_info.dev_attr.attr, + &sensor_dev_attr_bsp_pr_err.dev_attr.attr, + &sensor_dev_attr_bsp_reg.dev_attr.attr, + NULL, +}; + +static struct attribute_group cpu_cpld_attr_grp = { + .name = "cpu_cpld", + .attrs = cpu_cpld_attrs, +}; + +static struct attribute_group mb_cpld_attr_grp = { + .name = "mb_cpld", + .attrs = mb_cpld_attrs, +}; + +static struct attribute_group bios_attr_grp = { + .name = "bios", + .attrs = bios_attrs, +}; + +static struct attribute_group i2c_alert_attr_grp = { + .name = "i2c_alert", + .attrs = i2c_alert_attrs, +}; + +static struct attribute_group bsp_attr_grp = { + .name = "bsp", + .attrs = bsp_attrs, +}; + +static void lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .dev = { + .release = lpc_dev_release, + } +}; + +static int lpc_drv_probe(struct platform_device *pdev) +{ + int i = 0, grp_num = 5; + int err[5] = {0}; + struct attribute_group *grp; + + lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s), + GFP_KERNEL); + if (!lpc_data) + return -ENOMEM; + + mutex_init(&lpc_data->access_lock); + + for (i=0; idev.kobj, grp); + if (err[i]) { + printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name); + goto exit; + } else { + continue; + } + } + + return 0; + +exit: + for (i=0; idev.kobj, grp); + if (!err[i]) { + //remove previous successful cases + continue; + } else { + //remove first failed case, then return + return err[i]; + } + } + return 0; +} + +static int lpc_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &cpu_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bios_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &i2c_alert_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp); + + return 0; +} + +static struct platform_driver lpc_drv = { + .probe = lpc_drv_probe, + .remove = __exit_p(lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int lpc_init(void) +{ + int err = 0; + + err = platform_driver_register(&lpc_drv); + if (err) { + printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", + __func__, __LINE__, err); + + return err; + } + + err = platform_device_register(&lpc_dev); + if (err) { + printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", + __func__, __LINE__, err); + platform_driver_unregister(&lpc_drv); + return err; + } + + return err; +} + +void lpc_exit(void) +{ + platform_driver_unregister(&lpc_drv); + platform_device_unregister(&lpc_dev); +} + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("x86_64_ufispace_s9300_32d_lpc driver"); +MODULE_LICENSE("GPL"); + +module_init(lpc_init); +module_exit(lpc_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-sys-eeprom.c index 225a8c50d636..fae50d0b0e46 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-sys-eeprom.c +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-sys-eeprom.c @@ -1,273 +1,283 @@ -/* - * Copyright (C) 1998, 1999 Frodo Looijaard and - * Philip Edelbrock - * Copyright (C) 2003 Greg Kroah-Hartman - * Copyright (C) 2003 IBM Corp. - * Copyright (C) 2004 Jean Delvare - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* enable dev_dbg print out */ -//#define DEBUG - -#define __STDC_WANT_LIB_EXT1__ 1 -#include -#include -#include -#include -#include -#include -#include - -/* Addresses to scan */ -static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, - 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; - -/* Size of EEPROM in bytes */ -#define EEPROM_SIZE 512 - -#define SLICE_BITS (6) -#define SLICE_SIZE (1 << SLICE_BITS) -#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) - -/* Each client has this additional data */ -struct eeprom_data { - struct mutex update_lock; - u8 valid; /* bitfield, bit!=0 if slice is valid */ - unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ - u8 data[EEPROM_SIZE]; /* Register values */ -}; - - -static void sys_eeprom_update_client(struct i2c_client *client, u8 slice) -{ - struct eeprom_data *data = i2c_get_clientdata(client); - int i, j; - int ret; - int addr; - - mutex_lock(&data->update_lock); - - if (!(data->valid & (1 << slice)) || - time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { - dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); - - addr = slice << SLICE_BITS; - - ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); - /* select the eeprom address */ - if (ret < 0) { - dev_err(&client->dev, "address set failed\n"); - goto exit; - } - - if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { - goto exit; - } - - for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { - for (j = i; j < (i+SLICE_SIZE); j++) { - int res; - - res = i2c_smbus_read_byte(client); - if (res < 0) { - goto exit; - } - - data->data[j] = res & 0xFF; - } - } - - data->last_updated[slice] = jiffies; - data->valid |= (1 << slice); - } -exit: - mutex_unlock(&data->update_lock); -} - -static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj, - struct bin_attribute *bin_attr, - char *buf, loff_t off, size_t count) -{ - struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); - struct eeprom_data *data = i2c_get_clientdata(client); - u8 slice; - - if (off > EEPROM_SIZE) { - return 0; - } - if (off + count > EEPROM_SIZE) { - count = EEPROM_SIZE - off; - } - if (count == 0) { - return 0; - } - - /* Only refresh slices which contain requested bytes */ - for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { - sys_eeprom_update_client(client, slice); - } - - memcpy(buf, &data->data[off], count); - - return count; -} - -static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj, - struct bin_attribute *bin_attr, - char *buf, loff_t off, size_t count) -{ - struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); - struct eeprom_data *data = i2c_get_clientdata(client); - int ret; - int i; - u8 cmd; - u16 value16; - - dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count); - - if (off > EEPROM_SIZE) { - return 0; - } - if (off + count > EEPROM_SIZE) { - count = EEPROM_SIZE - off; - } - if (count == 0) { - return 0; - } - - mutex_lock(&data->update_lock); - - for(i=0; i < count; i++) { - /* write command */ - cmd = (off >> 8) & 0xff; - value16 = off & 0xff; - value16 |= buf[i] << 8; - ret = i2c_smbus_write_word_data(client, cmd, value16); - - if (ret < 0) { - dev_err(&client->dev, "write address failed at %d \n", (int)off); - goto exit; - } - - off++; - - /* need to wait for write complete */ - udelay(10000); - } -exit: - mutex_unlock(&data->update_lock); - /* force to update client when reading */ - for(i=0; i < SLICE_NUM; i++) { - data->last_updated[i] = 0; - } - - return count; -} - -static struct bin_attribute sys_eeprom_attr = { - .attr = { - .name = "eeprom", - .mode = S_IRUGO | S_IWUSR, - }, - .size = EEPROM_SIZE, - .read = sys_eeprom_read, - .write = sys_eeprom_write, -}; - -/* Return 0 if detection is successful, -ENODEV otherwise */ -static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) -{ - struct i2c_adapter *adapter = client->adapter; - - /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all - addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline - attaching to addresses >= 0x56 on DDC buses */ - if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { - return -ENODEV; - } - - if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) - && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { - return -ENODEV; - } - - strlcpy(info->type, "eeprom", I2C_NAME_SIZE); - - return 0; -} - -static int sys_eeprom_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - struct eeprom_data *data; - int err; - - if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { - err = -ENOMEM; - goto exit; - } - -#ifdef __STDC_LIB_EXT1__ - memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); -#else - memset(data->data, 0xff, EEPROM_SIZE); -#endif - - i2c_set_clientdata(client, data); - mutex_init(&data->update_lock); - - /* create the sysfs eeprom file */ - err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr); - if (err) { - goto exit_kfree; - } - - return 0; - -exit_kfree: - kfree(data); -exit: - return err; -} - -static int sys_eeprom_remove(struct i2c_client *client) -{ - sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); - kfree(i2c_get_clientdata(client)); - - return 0; -} - -static const struct i2c_device_id sys_eeprom_id[] = { - { "sys_eeprom", 0 }, - { } -}; - -static struct i2c_driver sys_eeprom_driver = { - .driver = { - .name = "sys_eeprom", - }, - .probe = sys_eeprom_probe, - .remove = sys_eeprom_remove, - .id_table = sys_eeprom_id, - - .class = I2C_CLASS_DDC | I2C_CLASS_SPD, - .detect = sys_eeprom_detect, - .address_list = normal_i2c, -}; - -module_i2c_driver(sys_eeprom_driver); - -MODULE_AUTHOR("Wade "); -MODULE_DESCRIPTION("UfiSpace Mother Board EEPROM driver"); -MODULE_LICENSE("GPL"); +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include + +#define _memset(s, c, n) memset(s, c, n) + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void sys_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + sys_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute sys_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = sys_eeprom_read, + .write = sys_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int sys_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); +#else + _memset(data->data, 0xff, EEPROM_SIZE); +#endif + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +sys_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); + kfree(i2c_get_clientdata(client)); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +static const struct i2c_device_id sys_eeprom_id[] = { + { "sys_eeprom", 0 }, + { } +}; + +static struct i2c_driver sys_eeprom_driver = { + .driver = { + .name = "sys_eeprom", + }, + .probe = sys_eeprom_probe, + .remove = sys_eeprom_remove, + .id_table = sys_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = sys_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(sys_eeprom_driver); + +MODULE_AUTHOR("Wade "); +MODULE_DESCRIPTION("UfiSpace Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/chassis.py index 267add0756d1..3f02f73daa8a 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/chassis.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/chassis.py @@ -9,6 +9,7 @@ try: import time from sonic_platform_pddf_base.pddf_chassis import PddfChassis + from sonic_py_common import device_info except ImportError as e: raise ImportError(str(e) + "- required module not found") @@ -174,4 +175,15 @@ def get_reboot_cause(self): except IOError: sw_reboot_cause = "Unknown" - return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) \ No newline at end of file + return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + + return self.get_serial() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/component.py index f3346725c667..b94a10d616d6 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/component.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/component.py @@ -18,9 +18,7 @@ } BMC_CMDS = { - "VER1": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f1", - "VER2": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f2", - "VER3": "echo $((`ipmitool mc info | grep 'Aux Firmware Rev Info' -A 2 | sed -n '2p'` + 0))", + "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'", } BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" @@ -83,17 +81,11 @@ def _get_cpld_version(self): def _get_bmc_version(self): # Retrieves the BMC firmware version - bmc_ver = dict() - for ver in BMC_CMDS: - status, value = subprocess.getstatusoutput(BMC_CMDS[ver]) - if not status: - bmc_ver[ver] = int(value.rstrip()) - else: - return None - - bmc_version = "{}.{}.{}".format(bmc_ver["VER1"], bmc_ver["VER2"], bmc_ver["VER3"]) - - return bmc_version + status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"]) + if not status: + return value + else: + return None def get_name(self): """ diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/fan.py index 6b99493ecb41..a2ef7be03721 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/fan.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/fan.py @@ -135,7 +135,11 @@ def get_presence(self): mode = output['mode'] val = output['status'].strip() - vmap = self.plugin_data['FAN']['present'][mode]['valmap'] + + if self.is_psu_fan: + vmap = self.plugin_data['PSU']['psu_present'][mode]['valmap'] + else: + vmap = self.plugin_data['FAN']['present'][mode]['valmap'] if val in vmap: presence = vmap[val] diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/psu.py index 29319e424b4d..3e213415f314 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/psu.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/psu.py @@ -10,7 +10,7 @@ class Psu(PddfPsu): """PDDF Platform-Specific PSU class""" - PLATFORM_PSU_CAPACITY = 2000 + PLATFORM_PSU_CAPACITY = 1300 def __init__(self, index, pddf_data=None, pddf_plugin_data=None): PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) @@ -36,3 +36,21 @@ def get_power(self): # power is returned in micro watts return round(float(self.get_voltage()*self.get_current()), 2) + + def get_capacity(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return self.get_maximum_supplied_power() + + def get_type(self): + """ + Gets the type of the PSU + + Returns: + A string, the type of PSU (AC/DC) + """ + return self.plugin_data['PSU']['DEFAULT_TYPE'] \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/sfp.py index d9b6e491bef4..c7919482f69c 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/sfp.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/sfp.py @@ -13,5 +13,19 @@ class Sfp(PddfSfp): def __init__(self, index, pddf_data=None, pddf_plugin_data=None): PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.index = index # Provide the functions/variables below for which implementation is to be overwritten + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + + return self.SFP_STATUS_OK diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_post_device_create.sh index 69e75aeef28d..e4de7ae3669e 100755 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_post_device_create.sh +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_post_device_create.sh @@ -1,3 +1,6 @@ #!/bin/bash +#disable bmc watchdog +timeout 3 ipmitool mc watchdog off + echo 1 > /sys/kernel/pddf/devices/sysstatus/sysstatus_data/port_led_clr_ctrl echo "PDDF device post-create completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_pre_driver_install.sh deleted file mode 100755 index 52bcb3962ea3..000000000000 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_pre_driver_install.sh +++ /dev/null @@ -1,11 +0,0 @@ -#!/bin/bash -#rmmod gpio_ich -if [ ! -f /tmp/._pddf_pre_driver_init_completion ]; then - # make sure igb/i40e init in correct order - rmmod i40e - rmmod igb - modprobe igb - modprobe i40e - date > /tmp/._pddf_pre_driver_init_completion -fi -echo "PDDF driver pre-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/Makefile new file mode 100644 index 000000000000..0f44e14f033b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/Makefile @@ -0,0 +1,6 @@ + +MODULE_NAME = x86-64-ufispace-s9301-32d-cpld.o x86-64-ufispace-s9301-32d-sys-eeprom.o x86-64-ufispace-s9301-32d-lpc.o pddf_custom_sysstatus_module.o +obj-m := $(MODULE_NAME) + +CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include +KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/pddf_custom_sysstatus_module.c new file mode 100644 index 000000000000..b61219c0088d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/pddf_custom_sysstatus_module.c @@ -0,0 +1,266 @@ +/* + * Copyright 2019 Broadcom. + * The term "Broadcom" refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module for system status registers + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h" + +#define _memset(s, c, n) memset(s, c, n) + +SYSSTATUS_DATA sysstatus_data = {0}; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf); +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + + +PDDF_DATA_ATTR(attr_name, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_CHAR, 32, + (void*)&sysstatus_data.sysstatus_addr_attr.aname, NULL); +PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.devaddr , NULL); +PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.offset, NULL); +PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.mask , NULL); +PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.len , NULL); +PDDF_DATA_ATTR(attr_ops, S_IWUSR, NULL, do_attr_operation, PDDF_CHAR, 8, (void*)&sysstatus_data, NULL); + + + +static struct attribute *sysstatus_addr_attributes[] = { + &attr_attr_name.dev_attr.attr, + &attr_attr_devaddr.dev_attr.attr, + &attr_attr_offset.dev_attr.attr, + &attr_attr_mask.dev_attr.attr, + &attr_attr_len.dev_attr.attr, + &attr_attr_ops.dev_attr.attr, + NULL +}; + +PDDF_DATA_ATTR(board_info, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld3_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(mac_reset, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(mux_reset, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(psu_status, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_0, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_1, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(beacon_led, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(port_led_clr_ctrl, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); + +static struct attribute *sysstatus_data_attributes[] = { + &attr_board_info.dev_attr.attr, + &attr_cpld1_version.dev_attr.attr, + &attr_cpld2_version.dev_attr.attr, + &attr_cpld3_version.dev_attr.attr, + &attr_mac_reset.dev_attr.attr, + &attr_mux_reset.dev_attr.attr, + &attr_psu_status.dev_attr.attr, + &attr_system_led_0.dev_attr.attr, + &attr_system_led_1.dev_attr.attr, + &attr_beacon_led.dev_attr.attr, + &attr_port_led_clr_ctrl.dev_attr.attr, + NULL +}; + + +static const struct attribute_group pddf_sysstatus_addr_group = { + .attrs = sysstatus_addr_attributes, +}; + + +static const struct attribute_group pddf_sysstatus_data_group = { + .attrs = sysstatus_data_attributes, +}; + + +static struct kobject *sysstatus_addr_kobj; +static struct kobject *sysstatus_data_kobj; + + + +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf) +{ + + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + + } + } + + if (sysstatus_addr_attrs==NULL ) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); + status = 0; + } + else + { + status = board_i2c_cpld_read( sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset); + } + + return sprintf(buf, "0x%x\n", (status&sysstatus_addr_attrs->mask)); + +} + +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + u8 reg_val; + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + } + } + + if (sysstatus_addr_attrs==NULL) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); + return -EINVAL; + } + else + { + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + status = board_i2c_cpld_write(sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset, reg_val); + + if (status!=0) + { + printk(KERN_DEBUG "store_sysstatus_data() %s failed, status=%d\n",data->sysstatus_addr_attrs[i].aname, status); + return status; + } + } + + return count; +} + + + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + PDDF_ATTR *ptr = (PDDF_ATTR *)da; + SYSSTATUS_DATA *pdata = (SYSSTATUS_DATA *)(ptr->addr); + + pdata->sysstatus_addr_attrs[pdata->len] = pdata->sysstatus_addr_attr; + pdata->len++; + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Populating the data for %s\n", __FUNCTION__, pdata->sysstatus_addr_attr.aname); +#ifdef __STDC_LIB_EXT1__ + memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr), 0, sizeof(pdata->sysstatus_addr_attr)); +#else + _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#endif + + return count; +} + + + + +int __init sysstatus_data_init(void) +{ + struct kobject *device_kobj; + int ret = 0; + + + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. init\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + sysstatus_addr_kobj = kobject_create_and_add("sysstatus", device_kobj); + if(!sysstatus_addr_kobj) + return -ENOMEM; + + sysstatus_data_kobj = kobject_create_and_add("sysstatus_data", sysstatus_addr_kobj); + if(!sysstatus_data_kobj) + return -ENOMEM; + + + ret = sysfs_create_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + if (ret) + { + kobject_put(sysstatus_addr_kobj); + return ret; + } + + ret = sysfs_create_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + if (ret) + { + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + return ret; + } + + + return ret; +} + +void __exit sysstatus_data_exit(void) +{ + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. exit\n"); + sysfs_remove_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Removed the kobjects for 'SYSSTATUS'\n",__FUNCTION__); + return; +} + +module_init(sysstatus_data_init); +module_exit(sysstatus_data_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("SYSSTATUS platform data"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.c new file mode 100644 index 000000000000..39e85e880b86 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.c @@ -0,0 +1,1646 @@ +/* + * A i2c cpld driver for the ufispace_s9301_32d + * + * Copyright (C) 2017-2019 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "x86-64-ufispace-s9301-32d-cpld.h" + +#ifdef DEBUG +#define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#else +#define DEBUG_PRINT(fmt, args...) +#endif + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ + BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \ +} +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ + BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \ +} + +/* CPLD sysfs attributes index */ +enum s9301_cpld_sysfs_attributes { + /* CPLD1 */ + CPLD_ACCESS_REG, + CPLD_REGISTER_VAL, + CPLD_SKU_ID, + CPLD_HW_REV, + CPLD_DEPH_REV, + CPLD_BUILD_REV, + CPLD_ID_TYPE, + CPLD_MAJOR_VER, + CPLD_MINOR_VER, + CPLD_BUILD_VER, + CPLD_VERION_H, + CPLD_ID, + CPLD_MAC_INTR, + CPLD_10G_PHY_INTR, + CPLD_CPLD_FRU_INTR, + CPLD_THERMAL_ALERT_INTR, + CPLD_MISC_INTR, + CPLD_SYSTEM_INTR, + CPLD_MAC_INTR_MASK, + CPLD_10G_PHY_INTR_MASK, + CPLD_CPLD_FRU_INTR_MASK, + CPLD_THERMAL_ALERT_INTR_MASK, + CPLD_MISC_INTR_MASK, + CPLD_MAC_INTR_EVENT, + CPLD_10G_PHY_INTR_EVENT, + CPLD_CPLD_FRU_INTR_EVENT, + CPLD_THERMAL_ALERT_INTR_EVENT, + CPLD_MISC_INTR_EVENT, + CPLD_MAC_RST, + CPLD_10G_PHY_RST, + CPLD_BMC_RST, + CPLD_USB_RST, + CPLD_MUX_RST, + CPLD_MISC_RST, + CPLD_BMC_WATCHDOG, + CPLD_DAU_BD_PRES, + CPLD_PSU_STATUS, + CPLD_SYS_PW_STATUS, + CPLD_MISC, + CPLD_MUX_CTRL, + CPLD_MAC_QSFP_SEL_CTRL, + CPLD_SYS_LED_CTRL_1, + CPLD_SYS_LED_CTRL_2, + CPLD_BEACON_LED_CTRL, + CPLD_PORT_LED_CLR_CTRL, + CPLD_EVENT_DETECT_CTRL, + /* CPLD2 */ + CPLD_QSFPDD_MOD_INT_G0, + CPLD_QSFPDD_MOD_INT_G1, + CPLD_QSFPDD_MOD_INT_G2, + CPLD_QSFPDD_MOD_INT_G3, + CPLD_QSFPDD_PRES_G0, + CPLD_QSFPDD_PRES_G1, + CPLD_QSFPDD_PRES_G2, + CPLD_QSFPDD_PRES_G3, + CPLD_QSFPDD_FUSE_INT_G0, + CPLD_QSFPDD_FUSE_INT_G1, + CPLD_QSFPDD_FUSE_INT_G2, + CPLD_QSFPDD_FUSE_INT_G3, + CPLD_SFP_TXFAULT, + CPLD_SFP_ABS, + CPLD_SFP_RXLOS, + CPLD_QSFPDD_MOD_INT_MASK_G0, + CPLD_QSFPDD_MOD_INT_MASK_G1, + CPLD_QSFPDD_MOD_INT_MASK_G2, + CPLD_QSFPDD_MOD_INT_MASK_G3, + CPLD_QSFPDD_PRES_MASK_G0, + CPLD_QSFPDD_PRES_MASK_G1, + CPLD_QSFPDD_PRES_MASK_G2, + CPLD_QSFPDD_PRES_MASK_G3, + CPLD_QSFPDD_FUSE_INT_MASK_G0, + CPLD_QSFPDD_FUSE_INT_MASK_G1, + CPLD_QSFPDD_FUSE_INT_MASK_G2, + CPLD_QSFPDD_FUSE_INT_MASK_G3, + CPLD_SFP_TXFAULT_MASK, + CPLD_SFP_ABS_MASK, + CPLD_SFP_RXLOS_MASK, + CPLD_QSFPDD_MOD_INT_EVENT_G0, + CPLD_QSFPDD_MOD_INT_EVENT_G1, + CPLD_QSFPDD_MOD_INT_EVENT_G2, + CPLD_QSFPDD_MOD_INT_EVENT_G3, + CPLD_QSFPDD_PRES_EVENT_G0, + CPLD_QSFPDD_PRES_EVENT_G1, + CPLD_QSFPDD_PRES_EVENT_G2, + CPLD_QSFPDD_PRES_EVENT_G3, + CPLD_QSFPDD_FUSE_INT_EVENT_G0, + CPLD_QSFPDD_FUSE_INT_EVENT_G1, + CPLD_QSFPDD_FUSE_INT_EVENT_G2, + CPLD_QSFPDD_FUSE_INT_EVENT_G3, + CPLD_SFP_TXFAULT_EVENT, + CPLD_SFP_ABS_EVENT, + CPLD_SFP_RXLOS_EVENT, + CPLD_QSFPDD_RESET_CTRL_G0, + CPLD_QSFPDD_RESET_CTRL_G1, + CPLD_QSFPDD_RESET_CTRL_G2, + CPLD_QSFPDD_RESET_CTRL_G3, + CPLD_QSFPDD_LP_MODE_G0, + CPLD_QSFPDD_LP_MODE_G1, + CPLD_QSFPDD_LP_MODE_G2, + CPLD_QSFPDD_LP_MODE_G3, + CPLD_SFP_TX_DIS, + CPLD_SFP_RS, + CPLD_SFP_TS, + CPLD_PORT_INT_STATUS, + + //BSP DEBUG + BSP_DEBUG +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_hw_rev_cb(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_cpld_version_cb(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_cpld_version_h_cb(struct device *dev, + struct device_attribute *da, char *buf); +// cpld access api +static ssize_t read_cpld_reg(struct device *dev, char *buf, u8 reg); +static ssize_t write_cpld_reg(struct device *dev, const char *buf, size_t count, u8 reg); +static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno); +static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val); +// bsp debug api +static ssize_t read_bsp(char *buf, char *str); +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count); +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +/* CPLD device id and data */ +static const struct i2c_device_id s9301_cpld_id[] = { + { "s9301_32d_cpld1", cpld1 }, + { "s9301_32d_cpld2", cpld2 }, + { "s9301_32d_cpld3", cpld3 }, + {} +}; + +char bsp_debug[2]="0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; + +/* Addresses scanned for s9301_cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, 0x32, I2C_CLIENT_END }; + +/* define all support register access of cpld in attribute */ +/* CPLD1 */ +static SENSOR_DEVICE_ATTR(cpld_access_register, S_IWUSR | S_IRUGO, \ + read_access_register, write_access_register, CPLD_ACCESS_REG); +static SENSOR_DEVICE_ATTR(cpld_register_value, S_IWUSR | S_IRUGO, \ + read_register_value, write_register_value, CPLD_REGISTER_VAL); +static SENSOR_DEVICE_ATTR(cpld_sku_id, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SKU_ID); +static SENSOR_DEVICE_ATTR(cpld_hw_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_HW_REV); +static SENSOR_DEVICE_ATTR(cpld_deph_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_DEPH_REV); +static SENSOR_DEVICE_ATTR(cpld_build_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_BUILD_REV); +static SENSOR_DEVICE_ATTR(cpld_id_type, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_ID_TYPE); +static SENSOR_DEVICE_ATTR(cpld_major_ver, S_IRUGO, \ + read_cpld_version_cb, NULL, CPLD_MAJOR_VER); +static SENSOR_DEVICE_ATTR(cpld_minor_ver, S_IRUGO, \ + read_cpld_version_cb, NULL, CPLD_MINOR_VER); +static SENSOR_DEVICE_ATTR(cpld_build_ver, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_BUILD_VER); +static SENSOR_DEVICE_ATTR(cpld_version_h, S_IRUGO, \ + read_cpld_version_h_cb, NULL, CPLD_VERION_H); +static SENSOR_DEVICE_ATTR(cpld_id, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_ID); +static SENSOR_DEVICE_ATTR(cpld_mac_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MAC_INTR); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_10G_PHY_INTR); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR); +static SENSOR_DEVICE_ATTR(cpld_misc_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC_INTR); +static SENSOR_DEVICE_ATTR(cpld_system_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYSTEM_INTR); +static SENSOR_DEVICE_ATTR(cpld_mac_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_CPLD_FRU_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_THERMAL_ALERT_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_misc_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MISC_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_mac_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MAC_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_10G_PHY_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_misc_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_mac_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_RST); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_RST); +static SENSOR_DEVICE_ATTR(cpld_bmc_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BMC_RST); +static SENSOR_DEVICE_ATTR(cpld_usb_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_USB_RST); +static SENSOR_DEVICE_ATTR(cpld_mux_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MUX_RST); +static SENSOR_DEVICE_ATTR(cpld_misc_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MISC_RST); +static SENSOR_DEVICE_ATTR(cpld_bmc_watchdog, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BMC_WATCHDOG); +static SENSOR_DEVICE_ATTR(cpld_dau_bd_pres, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_DAU_BD_PRES); +static SENSOR_DEVICE_ATTR(cpld_psu_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_PSU_STATUS); +static SENSOR_DEVICE_ATTR(cpld_sys_pw_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_PW_STATUS); +static SENSOR_DEVICE_ATTR(cpld_misc, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC); +static SENSOR_DEVICE_ATTR(cpld_mux_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MUX_CTRL); +static SENSOR_DEVICE_ATTR(cpld_mac_qsfp_sel_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_QSFP_SEL_CTRL); +static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_1); +static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_2); +static SENSOR_DEVICE_ATTR(cpld_beacon_led_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BEACON_LED_CTRL); +static SENSOR_DEVICE_ATTR(cpld_port_led_clr_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_PORT_LED_CLR_CTRL); +static SENSOR_DEVICE_ATTR(cpld_event_detect_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_EVENT_DETECT_CTRL); +/* CPLD2 */ +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G3); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_TXFAULT); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_ABS); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_RXLOS); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g3, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g3, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g3, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G3); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TXFAULT_MASK); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_ABS_MASK); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_RXLOS_MASK); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g3, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G3); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_TXFAULT_EVENT); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_ABS_EVENT); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_RXLOS_EVENT); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g0, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g1, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g2, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g3, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL_G3); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g0, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g1, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g2, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g3, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE_G3); +static SENSOR_DEVICE_ATTR(cpld_sfp_tx_dis, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TX_DIS); +static SENSOR_DEVICE_ATTR(cpld_sfp_rs, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_RS); +static SENSOR_DEVICE_ATTR(cpld_sfp_ts, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TS); +static SENSOR_DEVICE_ATTR(cpld_port_int_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_PORT_INT_STATUS); +//BSP DEBUG +static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, \ + read_bsp_callback, write_bsp_callback, BSP_DEBUG); + +/* define support attributes of cpldx , total 3 */ +/* cpld 1 */ +static struct attribute *s9301_cpld1_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_sku_id.dev_attr.attr, + &sensor_dev_attr_cpld_hw_rev.dev_attr.attr, + &sensor_dev_attr_cpld_deph_rev.dev_attr.attr, + &sensor_dev_attr_cpld_build_rev.dev_attr.attr, + &sensor_dev_attr_cpld_id_type.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr.dev_attr.attr, + &sensor_dev_attr_cpld_system_intr.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_mac_rst.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_rst.dev_attr.attr, + &sensor_dev_attr_cpld_bmc_rst.dev_attr.attr, + &sensor_dev_attr_cpld_usb_rst.dev_attr.attr, + &sensor_dev_attr_cpld_mux_rst.dev_attr.attr, + &sensor_dev_attr_cpld_misc_rst.dev_attr.attr, + &sensor_dev_attr_cpld_bmc_watchdog.dev_attr.attr, + &sensor_dev_attr_cpld_dau_bd_pres.dev_attr.attr, + &sensor_dev_attr_cpld_psu_status.dev_attr.attr, + &sensor_dev_attr_cpld_sys_pw_status.dev_attr.attr, + &sensor_dev_attr_cpld_misc.dev_attr.attr, + &sensor_dev_attr_cpld_mux_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_mac_qsfp_sel_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_sys_led_ctrl_1.dev_attr.attr, + &sensor_dev_attr_cpld_sys_led_ctrl_2.dev_attr.attr, + &sensor_dev_attr_cpld_beacon_led_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_port_led_clr_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_event_detect_ctrl.dev_attr.attr, + &sensor_dev_attr_bsp_debug.dev_attr.attr, + NULL +}; + +/* cpld 2 */ +static struct attribute *s9301_cpld2_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_g3.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g3.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault_mask.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs_mask.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos_mask.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g3.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault_event.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs_event.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos_event.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g3.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode_g3.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_tx_dis.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rs.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_ts.dev_attr.attr, + &sensor_dev_attr_cpld_port_int_status.dev_attr.attr, + NULL +}; + +/* cpld 3 */ +static struct attribute *s9301_cpld3_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group s9301_cpld1_group = { + .attrs = s9301_cpld1_attributes, +}; +/* cpld 2 attributes group */ +static const struct attribute_group s9301_cpld2_group = { + .attrs = s9301_cpld2_attributes, +}; +/* cpld 3 attributes group */ +static const struct attribute_group s9301_cpld3_group = { + .attrs = s9301_cpld3_attributes, +}; + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write)) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + len=sprintf(buf, "%s", str); + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + snprintf(str, str_len, "%s", buf); + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + ssize_t ret = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + ret = write_bsp(buf, str, str_len, count); + + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + return ret; + default: + return -EINVAL; + } + return 0; +} + +/* read access register from cpld data */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + + return sprintf(buf, "0x%x\n", reg); +} + +/* write access register to cpld data */ +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + + if (kstrtou8(buf, 0, ®) < 0) + return -EINVAL; + + data->access_reg = reg; + return count; +} + +/* read the value of access register in cpld data */ +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if (reg_val < 0) + return reg_val; + + return sprintf(buf, "0x%x\n", reg_val); +} + +/* wrtie the value to access register in cpld data */ +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int ret = -EIO; + u8 reg = data->access_reg; + u8 reg_val; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, reg_val); + + if (unlikely(ret < 0)) { + dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* get cpld register value */ +static ssize_t read_cpld_reg(struct device *dev, + char *buf, + u8 reg) +{ + int reg_val; + + if (read_cpld_reg_raw_int(dev, reg, ®_val)) + return sprintf(buf, "0x%02x\n", reg_val); + else + return reg_val; +} + +static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + I2C_READ_BYTE_DATA(*val, &data->access_lock, client, reg); + if (unlikely(*val < 0)) { + dev_err(dev, "read_cpld_reg_raw_int() error, return=%d\n", *val); + return false; + } + return true; +} + +static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno) +{ + int reg_val; + + if (read_cpld_reg_raw_int(dev, reg, ®_val)) { + *val = (u8)reg_val; + return true; + } else { + *errno = reg_val; + return false; + } +} + +/* handle read for attributes */ +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + + switch (attr->index) { + case CPLD_SKU_ID: + reg = CPLD_SKU_ID_REG; + break; + case CPLD_ID: + reg = CPLD_ID_REG; + break; + case CPLD_BUILD_VER: + reg = CPLD_BUILD_VER_REG; + break; + case CPLD_MAC_INTR: + reg = CPLD_MAC_INTR_REG; + break; + case CPLD_10G_PHY_INTR: + reg = CPLD_10G_PHY_INTR_REG; + break; + case CPLD_CPLD_FRU_INTR: + reg = CPLD_CPLD_FRU_INTR_REG; + break; + case CPLD_THERMAL_ALERT_INTR: + reg = CPLD_THERMAL_ALERT_INTR_REG; + break; + case CPLD_MISC_INTR: + reg = CPLD_MISC_INTR_REG; + break; + case CPLD_SYSTEM_INTR: + reg = CPLD_SYSTEM_INTR_REG; + break; + case CPLD_MAC_INTR_MASK: + reg = CPLD_MAC_INTR_MASK_REG; + break; + case CPLD_10G_PHY_INTR_MASK: + reg = CPLD_10G_PHY_INTR_MASK_REG; + break; + case CPLD_CPLD_FRU_INTR_MASK: + reg = CPLD_CPLD_FRU_INTR_MASK_REG; + break; + case CPLD_THERMAL_ALERT_INTR_MASK: + reg = CPLD_THERMAL_ALERT_INTR_MASK_REG; + break; + case CPLD_MISC_INTR_MASK: + reg = CPLD_MISC_INTR_MASK_REG; + break; + case CPLD_MAC_INTR_EVENT: + reg = CPLD_MAC_INTR_EVENT_REG; + break; + case CPLD_10G_PHY_INTR_EVENT: + reg = CPLD_10G_PHY_INTR_EVENT_REG; + break; + case CPLD_CPLD_FRU_INTR_EVENT: + reg = CPLD_CPLD_FRU_INTR_EVENT_REG; + break; + case CPLD_THERMAL_ALERT_INTR_EVENT: + reg = CPLD_THERMAL_ALERT_INTR_EVENT_REG; + break; + case CPLD_MISC_INTR_EVENT: + reg = CPLD_MISC_INTR_EVENT_REG; + break; + case CPLD_MAC_RST: + reg = CPLD_MAC_RST_REG; + break; + case CPLD_10G_PHY_RST: + reg = CPLD_10G_PHY_RST_REG; + break; + case CPLD_BMC_RST: + reg = CPLD_BMC_RST_REG; + break; + case CPLD_USB_RST: + reg = CPLD_USB_RST_REG; + break; + case CPLD_MUX_RST: + reg = CPLD_MUX_RST_REG; + break; + case CPLD_MISC_RST: + reg = CPLD_MISC_RST_REG; + break; + case CPLD_BMC_WATCHDOG: + reg = CPLD_BMC_WATCHDOG_REG; + break; + case CPLD_DAU_BD_PRES: + reg = CPLD_DAU_BD_PRES_REG; + break; + case CPLD_PSU_STATUS: + reg = CPLD_PSU_STATUS_REG; + break; + case CPLD_SYS_PW_STATUS: + reg = CPLD_SYS_PW_STATUS_REG; + break; + case CPLD_MISC: + reg = CPLD_MISC_REG; + break; + case CPLD_MUX_CTRL: + reg = CPLD_MUX_CTRL_REG; + break; + case CPLD_MAC_QSFP_SEL_CTRL: + reg = CPLD_MAC_QSFP_SEL_CTRL_REG; + break; + case CPLD_SYS_LED_CTRL_1: + reg = CPLD_SYS_LED_CTRL_1_REG; + break; + case CPLD_SYS_LED_CTRL_2: + reg = CPLD_SYS_LED_CTRL_2_REG; + break; + case CPLD_BEACON_LED_CTRL: + reg = CPLD_BEACON_LED_CTRL_REG; + break; + case CPLD_PORT_LED_CLR_CTRL: + reg = CPLD_PORT_LED_CLR_CTRL_REG; + break; + case CPLD_EVENT_DETECT_CTRL: + reg = CPLD_EVENT_DETECT_CTRL_REG; + break; + case CPLD_QSFPDD_MOD_INT_G0: + reg = CPLD_QSFPDD_MOD_INT_G0_REG; + break; + case CPLD_QSFPDD_MOD_INT_G1: + reg = CPLD_QSFPDD_MOD_INT_G1_REG; + break; + case CPLD_QSFPDD_MOD_INT_G2: + reg = CPLD_QSFPDD_MOD_INT_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_G3: + reg = CPLD_QSFPDD_MOD_INT_G3_REG; + break; + case CPLD_QSFPDD_PRES_G0: + reg = CPLD_QSFPDD_PRES_G0_REG; + break; + case CPLD_QSFPDD_PRES_G1: + reg = CPLD_QSFPDD_PRES_G1_REG; + break; + case CPLD_QSFPDD_PRES_G2: + reg = CPLD_QSFPDD_PRES_G2_REG; + break; + case CPLD_QSFPDD_PRES_G3: + reg = CPLD_QSFPDD_PRES_G3_REG; + break; + case CPLD_QSFPDD_FUSE_INT_G0: + reg = CPLD_QSFPDD_FUSE_INT_G0_REG; + break; + case CPLD_QSFPDD_FUSE_INT_G1: + reg = CPLD_QSFPDD_FUSE_INT_G1_REG; + break; + case CPLD_QSFPDD_FUSE_INT_G2: + reg = CPLD_QSFPDD_FUSE_INT_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_G3: + reg = CPLD_QSFPDD_FUSE_INT_G3_REG; + break; + case CPLD_SFP_TXFAULT: + reg = CPLD_SFP_TXFAULT_REG; + break; + case CPLD_SFP_ABS: + reg = CPLD_SFP_ABS_REG; + break; + case CPLD_SFP_RXLOS: + reg = CPLD_SFP_RXLOS_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G0: + reg = CPLD_QSFPDD_MOD_INT_MASK_G0_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G1: + reg = CPLD_QSFPDD_MOD_INT_MASK_G1_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G2: + reg = CPLD_QSFPDD_MOD_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G3: + reg = CPLD_QSFPDD_MOD_INT_MASK_G3_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G0: + reg = CPLD_QSFPDD_PRES_MASK_G0_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G1: + reg = CPLD_QSFPDD_PRES_MASK_G1_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G2: + reg = CPLD_QSFPDD_PRES_MASK_G2_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G3: + reg = CPLD_QSFPDD_PRES_MASK_G3_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G0: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G0_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G1: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G1_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G2: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G3: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G3_REG; + break; + case CPLD_SFP_TXFAULT_MASK: + reg = CPLD_SFP_TXFAULT_MASK_REG; + break; + case CPLD_SFP_ABS_MASK: + reg = CPLD_SFP_ABS_MASK_REG; + break; + case CPLD_SFP_RXLOS_MASK: + reg = CPLD_SFP_RXLOS_MASK_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT_G0: + reg = CPLD_QSFPDD_MOD_INT_EVENT_G0_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT_G1: + reg = CPLD_QSFPDD_MOD_INT_EVENT_G1_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT_G2: + reg = CPLD_QSFPDD_MOD_INT_EVENT_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT_G3: + reg = CPLD_QSFPDD_MOD_INT_EVENT_G3_REG; + break; + case CPLD_QSFPDD_PRES_EVENT_G0: + reg = CPLD_QSFPDD_PRES_EVENT_G0_REG; + break; + case CPLD_QSFPDD_PRES_EVENT_G1: + reg = CPLD_QSFPDD_PRES_EVENT_G1_REG; + break; + case CPLD_QSFPDD_PRES_EVENT_G2: + reg = CPLD_QSFPDD_PRES_EVENT_G2_REG; + break; + case CPLD_QSFPDD_PRES_EVENT_G3: + reg = CPLD_QSFPDD_PRES_EVENT_G3_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT_G0: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT_G1: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT_G2: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT_G3: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG; + break; + case CPLD_SFP_TXFAULT_EVENT: + reg = CPLD_SFP_TXFAULT_EVENT_REG; + break; + case CPLD_SFP_ABS_EVENT: + reg = CPLD_SFP_ABS_EVENT_REG; + break; + case CPLD_SFP_RXLOS_EVENT: + reg = CPLD_SFP_RXLOS_EVENT_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G0: + reg = CPLD_QSFPDD_RESET_CTRL_G0_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G1: + reg = CPLD_QSFPDD_RESET_CTRL_G1_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G2: + reg = CPLD_QSFPDD_RESET_CTRL_G2_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G3: + reg = CPLD_QSFPDD_RESET_CTRL_G3_REG; + break; + case CPLD_QSFPDD_LP_MODE_G0: + reg = CPLD_QSFPDD_LP_MODE_G0_REG; + break; + case CPLD_QSFPDD_LP_MODE_G1: + reg = CPLD_QSFPDD_LP_MODE_G1_REG; + break; + case CPLD_QSFPDD_LP_MODE_G2: + reg = CPLD_QSFPDD_LP_MODE_G2_REG; + break; + case CPLD_QSFPDD_LP_MODE_G3: + reg = CPLD_QSFPDD_LP_MODE_G3_REG; + break; + case CPLD_SFP_TX_DIS: + reg = CPLD_SFP_TX_DIS_REG; + break; + case CPLD_SFP_RS: + reg = CPLD_SFP_RS_REG; + break; + case CPLD_SFP_TS: + reg = CPLD_SFP_TS_REG; + break; + case CPLD_PORT_INT_STATUS: + reg = CPLD_PORT_INT_STATUS_REG; + break; + default: + return -EINVAL; + } + return read_cpld_reg(dev, buf, reg); +} + +/* handle read for hw_rev attributes */ +static ssize_t read_hw_rev_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = CPLD_HW_REV_REG; + u8 reg_val = 0; + int errno = 0; + u8 res; + + if (!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + + switch (attr->index) { + case CPLD_HW_REV: + HW_REV_GET(reg_val, res); + break; + case CPLD_DEPH_REV: + DEPH_REV_GET(reg_val, res); + break; + case CPLD_BUILD_REV: + BUILD_REV_GET(reg_val, res); + break; + case CPLD_ID_TYPE: + ID_TYPE_GET(reg_val, res); + break; + default: + return -EINVAL; + } + return sprintf(buf, "0x%02x\n", res); +} + +/* handle read for cpld_version attributes */ +static ssize_t read_cpld_version_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = CPLD_VERSION_REG; + u8 reg_val = 0; + int errno = 0; + u8 res; + + if (!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + + switch (attr->index) { + case CPLD_MAJOR_VER: + CPLD_MAJOR_VERSION_GET(reg_val, res); + break; + case CPLD_MINOR_VER: + CPLD_MINOR_VERSION_GET(reg_val, res); + break; + default: + return -EINVAL; + } + return sprintf(buf, "0x%02x\n", res); +} + +/* handle read human-readable string for cpld_version attributes */ +static ssize_t read_cpld_version_h_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + u8 reg = CPLD_VERSION_REG; + u8 reg_val = 0; + int errno = 0; + u8 major, minor, build; + + //get major/minor register value + if(!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + CPLD_MAJOR_VERSION_GET(reg_val, major); + CPLD_MINOR_VERSION_GET(reg_val, minor); + + //get build register value + reg = CPLD_BUILD_VER_REG; + if(!read_cpld_reg_raw_byte(dev, reg, &build, &errno)) + return errno; + + //version string format : xx.xx.xxx + return sprintf(buf, "%d.%02d.%03d\n", major, minor, build); +} + +/* handle write for attributes */ +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + + switch (attr->index) { + case CPLD_MAC_INTR_MASK: + reg = CPLD_MAC_INTR_MASK_REG; + break; + case CPLD_10G_PHY_INTR_MASK: + reg = CPLD_10G_PHY_INTR_MASK_REG; + break; + case CPLD_CPLD_FRU_INTR_MASK: + reg = CPLD_CPLD_FRU_INTR_MASK_REG; + break; + case CPLD_THERMAL_ALERT_INTR_MASK: + reg = CPLD_THERMAL_ALERT_INTR_MASK_REG; + break; + case CPLD_MISC_INTR_MASK: + reg = CPLD_MISC_INTR_MASK_REG; + break; + case CPLD_MAC_RST: + reg = CPLD_MAC_RST_REG; + break; + case CPLD_10G_PHY_RST: + reg = CPLD_10G_PHY_RST_REG; + break; + case CPLD_BMC_RST: + reg = CPLD_BMC_RST_REG; + break; + case CPLD_USB_RST: + reg = CPLD_USB_RST_REG; + break; + case CPLD_MUX_RST: + reg = CPLD_MUX_RST_REG; + break; + case CPLD_MISC_RST: + reg = CPLD_MISC_RST_REG; + break; + case CPLD_BMC_WATCHDOG: + reg = CPLD_BMC_WATCHDOG_REG; + break; + case CPLD_MUX_CTRL: + reg = CPLD_MUX_CTRL_REG; + break; + case CPLD_MAC_QSFP_SEL_CTRL: + reg = CPLD_MAC_QSFP_SEL_CTRL_REG; + break; + case CPLD_BEACON_LED_CTRL: + reg = CPLD_BEACON_LED_CTRL_REG; + break; + case CPLD_PORT_LED_CLR_CTRL: + reg = CPLD_PORT_LED_CLR_CTRL_REG; + break; + case CPLD_EVENT_DETECT_CTRL: + reg = CPLD_EVENT_DETECT_CTRL_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G0: + reg = CPLD_QSFPDD_MOD_INT_MASK_G0_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G1: + reg = CPLD_QSFPDD_MOD_INT_MASK_G1_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G2: + reg = CPLD_QSFPDD_MOD_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK_G3: + reg = CPLD_QSFPDD_MOD_INT_MASK_G3_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G0: + reg = CPLD_QSFPDD_PRES_MASK_G0_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G1: + reg = CPLD_QSFPDD_PRES_MASK_G1_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G2: + reg = CPLD_QSFPDD_PRES_MASK_G2_REG; + break; + case CPLD_QSFPDD_PRES_MASK_G3: + reg = CPLD_QSFPDD_PRES_MASK_G3_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G0: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G0_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G1: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G1_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G2: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK_G3: + reg = CPLD_QSFPDD_FUSE_INT_MASK_G3_REG; + break; + case CPLD_SFP_TXFAULT_MASK: + reg = CPLD_SFP_TXFAULT_MASK_REG; + break; + case CPLD_SFP_ABS_MASK: + reg = CPLD_SFP_ABS_MASK_REG; + break; + case CPLD_SFP_RXLOS_MASK: + reg = CPLD_SFP_RXLOS_MASK_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G0: + reg = CPLD_QSFPDD_RESET_CTRL_G0_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G1: + reg = CPLD_QSFPDD_RESET_CTRL_G1_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G2: + reg = CPLD_QSFPDD_RESET_CTRL_G2_REG; + break; + case CPLD_QSFPDD_RESET_CTRL_G3: + reg = CPLD_QSFPDD_RESET_CTRL_G3_REG; + break; + case CPLD_QSFPDD_LP_MODE_G0: + reg = CPLD_QSFPDD_LP_MODE_G0_REG; + break; + case CPLD_QSFPDD_LP_MODE_G1: + reg = CPLD_QSFPDD_LP_MODE_G1_REG; + break; + case CPLD_QSFPDD_LP_MODE_G2: + reg = CPLD_QSFPDD_LP_MODE_G2_REG; + break; + case CPLD_QSFPDD_LP_MODE_G3: + reg = CPLD_QSFPDD_LP_MODE_G3_REG; + break; + case CPLD_SFP_TX_DIS: + reg = CPLD_SFP_TX_DIS_REG; + break; + case CPLD_SFP_RS: + reg = CPLD_SFP_RS_REG; + break; + case CPLD_SFP_TS: + reg = CPLD_SFP_TS_REG; + break; + default: + return -EINVAL; + } + return write_cpld_reg(dev, buf, count, reg); +} + +/* set cpld register value */ +static ssize_t write_cpld_reg(struct device *dev, + const char *buf, + size_t count, + u8 reg) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg_val; + int ret; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + + if (unlikely(ret < 0)) { + dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* add valid cpld client to list */ +static void s9301_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if (!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void s9301_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int s9301_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + int ret = -EPERM; + int idx; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + /* get cpld id from device */ + ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG); + + if (ret < 0) { + dev_info(&client->dev, + "fail to get cpld id (0x%x) at addr (0x%x)\n", + CPLD_ID_REG, client->addr); + status = -EIO; + goto exit; + } + + CPLD_ID_ID_GET(ret, idx); + + if (INVALID(idx, cpld1, cpld3)) { + dev_info(&client->dev, + "cpld id %d(device) not valid\n", idx); + //status = -EPERM; + //goto exit; + } + + data->index = dev_id->driver_data; + + /* register sysfs hooks for different cpld group */ + dev_info(&client->dev, "probe cpld with index %d\n", data->index); + switch (data->index) { + case cpld1: + status = sysfs_create_group(&client->dev.kobj, + &s9301_cpld1_group); + break; + case cpld2: + status = sysfs_create_group(&client->dev.kobj, + &s9301_cpld2_group); + break; + case cpld3: + status = sysfs_create_group(&client->dev.kobj, + &s9301_cpld3_group); + break; + default: + status = -EINVAL; + } + + if (status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + s9301_cpld_add_client(client); + + return 0; +exit: + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld2_group); + break; + case cpld3: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld3_group); + break; + default: + break; + } + return status; +} + +/* cpld drvier remove */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +s9301_cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld2_group); + break; + case cpld3: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld3_group); + break; + } + + s9301_cpld_remove_client(client); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +MODULE_DEVICE_TABLE(i2c, s9301_cpld_id); + +static struct i2c_driver s9301_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "x86_64_ufispace_s9301_32d_cpld", + }, + .probe = s9301_cpld_probe, + .remove = s9301_cpld_remove, + .id_table = s9301_cpld_id, + .address_list = cpld_i2c_addr, +}; + +/* provide cpld register read */ +/* cpld_idx indicate the index of cpld device */ +int s9301_cpld_read(u8 cpld_idx, + u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + struct cpld_data *data; + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + data = i2c_get_clientdata(cpld_node->client); + if (data->index == cpld_idx) { + DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x", + cpld_idx, reg); + I2C_READ_BYTE_DATA(ret, &data->access_lock, + cpld_node->client, reg); + DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x = 0x%02x", + cpld_idx, reg, ret); + break; + } + } + + return ret; +} +EXPORT_SYMBOL(s9301_cpld_read); + +/* provide cpld register write */ +/* cpld_idx indicate the index of cpld device */ +int s9301_cpld_write(u8 cpld_idx, + u8 reg, + u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + struct cpld_data *data; + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + data = i2c_get_clientdata(cpld_node->client); + + if (data->index == cpld_idx) { + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + cpld_node->client, + reg, value); + DEBUG_PRINT("cpld_idx=%d, write reg 0x%02x val 0x%02x, ret=%d", + cpld_idx, reg, value, ret); + break; + } + } + + return ret; +} +EXPORT_SYMBOL(s9301_cpld_write); + +static int __init s9301_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&s9301_cpld_driver); +} + +static void __exit s9301_cpld_exit(void) +{ + i2c_del_driver(&s9301_cpld_driver); +} + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("x86_64_ufispace_s9301_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(s9301_cpld_init); +module_exit(s9301_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.h b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.h new file mode 100644 index 000000000000..9eca44006455 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.h @@ -0,0 +1,251 @@ +/* header file for i2c cpld driver of ufispace_s9301_32d + * + * Copyright (C) 2017 UfiSpace Technology Corporation. + * Leo Lin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef UFISPACE_S9301_I2C_CPLD_H +#define UFISPACE_S9301_I2C_CPLD_H + +/* CPLD device index value */ +enum cpld_id { + cpld1, + cpld2, + cpld3, +}; + +enum LED_BLINK { + NOBLINK, + BLINK, +}; + +enum LED_BLINK_SPEED { + BLINK_1X, // 0.5hz + BLINK_4X, // 2hz +}; + +enum LED_STATUS { + OFF, + ON, +}; + +enum LED_YELLOW { + YELLOW_OFF, + YELLOW_ON, +}; + +enum LED_GREEN { + GREEN_OFF, + GREEN_ON, +}; + +/* QSFPDD port number */ +#define QSFPDD_MAX_PORT_NUM 32 +#define QSFPDD_MIN_PORT_NUM 1 + +/* SFP+ port number */ +#define SFP_MAX_PORT_NUM 4 +#define SFP_MIN_PORT_NUM 1 + + +/* CPLD registers */ +/* CPLD 1 */ +#define CPLD_SKU_ID_REG 0x00 +#define CPLD_HW_REV_REG 0x01 +#define CPLD_VERSION_REG 0x02 +#define CPLD_ID_REG 0x03 +#define CPLD_BUILD_VER_REG 0x04 +// Interrupt status +#define CPLD_MAC_INTR_REG 0x10 +#define CPLD_10G_PHY_INTR_REG 0x13 +#define CPLD_CPLD_FRU_INTR_REG 0x14 +#define CPLD_THERMAL_ALERT_INTR_REG 0x16 +#define CPLD_MISC_INTR_REG 0x1B +#define CPLD_SYSTEM_INTR_REG 0x1D +// Interrupt mask +#define CPLD_MAC_INTR_MASK_REG 0x20 +#define CPLD_10G_PHY_INTR_MASK_REG 0x23 +#define CPLD_CPLD_FRU_INTR_MASK_REG 0x24 +#define CPLD_THERMAL_ALERT_INTR_MASK_REG 0x26 +#define CPLD_MISC_INTR_MASK_REG 0x2B +// Interrupt event +#define CPLD_MAC_INTR_EVENT_REG 0x30 +#define CPLD_10G_PHY_INTR_EVENT_REG 0x33 +#define CPLD_CPLD_FRU_INTR_EVENT_REG 0x14 +#define CPLD_THERMAL_ALERT_INTR_EVENT_REG 0x16 +#define CPLD_MISC_INTR_EVENT_REG 0x1B +// Reset ctrl +#define CPLD_MAC_RST_REG 0x40 +#define CPLD_10G_PHY_RST_REG 0x42 +#define CPLD_BMC_RST_REG 0x43 +#define CPLD_USB_RST_REG 0x44 +#define CPLD_MUX_RST_REG 0x46 +#define CPLD_MISC_RST_REG 0x48 +#define CPLD_BMC_WATCHDOG_REG 0x4D +// Sys status +#define CPLD_DAU_BD_PRES_REG 0x50 +#define CPLD_PSU_STATUS_REG 0x51 +#define CPLD_SYS_PW_STATUS_REG 0x52 +#define CPLD_MISC_REG 0x5B +// Mux ctrl +#define CPLD_MUX_CTRL_REG 0x5C +#define CPLD_MAC_QSFP_SEL_CTRL_REG 0x5F +// Led ctrl +#define CPLD_SYS_LED_CTRL_1_REG 0x80 +#define CPLD_SYS_LED_CTRL_2_REG 0x81 +#define CPLD_BEACON_LED_CTRL_REG 0x84 +#define CPLD_PORT_LED_CLR_CTRL_REG 0x85 +// Event Detect Ctrl +#define CPLD_EVENT_DETECT_CTRL_REG 0x5D + +/* CPLD 2 */ +/* G0 - port 0 ~ 7 + G1 - port 8 ~ 15 + G2 - port 16 ~ 23 + G3 - port 24 ~ 31 + */ +// Interrupt status +#define CPLD_QSFPDD_MOD_INT_G0_REG 0x10 +#define CPLD_QSFPDD_MOD_INT_G1_REG 0x11 +#define CPLD_QSFPDD_MOD_INT_G2_REG 0x12 +#define CPLD_QSFPDD_MOD_INT_G3_REG 0x13 +#define CPLD_QSFPDD_PRES_G0_REG 0x14 +#define CPLD_QSFPDD_PRES_G1_REG 0x15 +#define CPLD_QSFPDD_PRES_G2_REG 0x16 +#define CPLD_QSFPDD_PRES_G3_REG 0x17 +#define CPLD_QSFPDD_FUSE_INT_G0_REG 0x18 +#define CPLD_QSFPDD_FUSE_INT_G1_REG 0x19 +#define CPLD_QSFPDD_FUSE_INT_G2_REG 0x1A +#define CPLD_QSFPDD_FUSE_INT_G3_REG 0x1B +#define CPLD_SFP_TXFAULT_REG 0x1D +#define CPLD_SFP_ABS_REG 0x1E +#define CPLD_SFP_RXLOS_REG 0x1F +// Interrupt mask +#define CPLD_QSFPDD_MOD_INT_MASK_G0_REG 0x20 +#define CPLD_QSFPDD_MOD_INT_MASK_G1_REG 0x21 +#define CPLD_QSFPDD_MOD_INT_MASK_G2_REG 0x22 +#define CPLD_QSFPDD_MOD_INT_MASK_G3_REG 0x23 +#define CPLD_QSFPDD_PRES_MASK_G0_REG 0x24 +#define CPLD_QSFPDD_PRES_MASK_G1_REG 0x25 +#define CPLD_QSFPDD_PRES_MASK_G2_REG 0x26 +#define CPLD_QSFPDD_PRES_MASK_G3_REG 0x27 +#define CPLD_QSFPDD_FUSE_INT_MASK_G0_REG 0x28 +#define CPLD_QSFPDD_FUSE_INT_MASK_G1_REG 0x29 +#define CPLD_QSFPDD_FUSE_INT_MASK_G2_REG 0x2A +#define CPLD_QSFPDD_FUSE_INT_MASK_G3_REG 0x2B +#define CPLD_SFP_TXFAULT_MASK_REG 0x2D +#define CPLD_SFP_ABS_MASK_REG 0x2E +#define CPLD_SFP_RXLOS_MASK_REG 0x2F +// Interrupt event +#define CPLD_QSFPDD_MOD_INT_EVENT_G0_REG 0x30 +#define CPLD_QSFPDD_MOD_INT_EVENT_G1_REG 0x31 +#define CPLD_QSFPDD_MOD_INT_EVENT_G2_REG 0x32 +#define CPLD_QSFPDD_MOD_INT_EVENT_G3_REG 0x33 +#define CPLD_QSFPDD_PRES_EVENT_G0_REG 0x34 +#define CPLD_QSFPDD_PRES_EVENT_G1_REG 0x35 +#define CPLD_QSFPDD_PRES_EVENT_G2_REG 0x36 +#define CPLD_QSFPDD_PRES_EVENT_G3_REG 0x37 +#define CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG 0x38 +#define CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG 0x39 +#define CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG 0x3A +#define CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG 0x3B +#define CPLD_SFP_TXFAULT_EVENT_REG 0x3D +#define CPLD_SFP_ABS_EVENT_REG 0x3E +#define CPLD_SFP_RXLOS_EVENT_REG 0x3F +// Port ctrl +#define CPLD_QSFPDD_RESET_CTRL_G0_REG 0x40 +#define CPLD_QSFPDD_RESET_CTRL_G1_REG 0x41 +#define CPLD_QSFPDD_RESET_CTRL_G2_REG 0x42 +#define CPLD_QSFPDD_RESET_CTRL_G3_REG 0x43 +#define CPLD_QSFPDD_LP_MODE_G0_REG 0x44 +#define CPLD_QSFPDD_LP_MODE_G1_REG 0x45 +#define CPLD_QSFPDD_LP_MODE_G2_REG 0x46 +#define CPLD_QSFPDD_LP_MODE_G3_REG 0x47 +#define CPLD_SFP_TX_DIS_REG 0x55 +#define CPLD_SFP_RS_REG 0x56 +#define CPLD_SFP_TS_REG 0x57 +// Port status +#define CPLD_PORT_INT_STATUS_REG 0x58 + + +/* bit field structure for register value */ +struct cpld_reg_sku_id_t { + u8 model_id:8; +}; + +struct cpld_reg_hw_rev_t { + u8 hw_rev:2; + u8 deph_rev:1; + u8 build_rev:3; + u8 reserved:1; + u8 id_type:1; +}; + +struct cpld_reg_version_t { + u8 minor:6; + u8 major:2; +}; + +struct cpld_reg_id_t { + u8 id:3; + u8 release:5; +}; + +struct cpld_reg_beacon_led_ctrl_t { + u8 reserve:5; + u8 speed:1; + u8 blink:1; + u8 onoff:1; +}; + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) +#define READ_BIT(val, bit) ((0u == (val & (1<bf_name) +#define READ_BF_1(bf_struct, val, bf_name, bf_value) \ + bf_struct bf; \ + bf.data = val; \ + bf_value = bf.bf_name +#define HW_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, hw_rev, res) +#define DEPH_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, deph_rev, res) +#define BUILD_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, build_rev, res) +#define ID_TYPE_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, id_type, res) +#define CPLD_MAJOR_VERSION_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, major, res) +#define CPLD_MINOR_VERSION_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, minor, res) +#define CPLD_ID_ID_GET(val, res) \ + READ_BF(cpld_reg_id_t, val, id, res) + +/* CPLD access functions */ +extern int s9301_cpld_read(u8 cpld_idx, u8 reg); +extern int s9301_cpld_write(u8 cpld_idx, u8 reg, u8 value); + +#endif + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-lpc.c new file mode 100644 index 000000000000..23245ebc96ec --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-lpc.c @@ -0,0 +1,850 @@ +/* + * A lpc driver for the ufispace_s9301_32d + * + * Copyright (C) 2017-2020 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) + +#define DRIVER_NAME "x86_64_ufispace_s9301_32d_lpc" +#define CPU_BDE 0 +#define CPU_SKY 1 +#define CPU_TYPE CPU_SKY + +/* LPC registers */ + +#define REG_BASE_CPU 0x600 + +#if CPU_TYPE == CPU_SKY +#define REG_BASE_MB 0xE00 +#define REG_BASE_I2C_ALERT 0x700 +#else +#define REG_BASE_MB 0x700 +#define REG_BASE_I2C_ALERT 0xF000 +#endif + +//CPU CPLD +#define REG_CPU_CPLD_VERSION (REG_BASE_CPU + 0x00) +#define REG_CPU_STATUS_0 (REG_BASE_CPU + 0x01) +#define REG_CPU_STATUS_1 (REG_BASE_CPU + 0x02) +#define REG_CPU_CTRL_0 (REG_BASE_CPU + 0x03) +#define REG_CPU_CTRL_1 (REG_BASE_CPU + 0x04) +#define REG_CPU_CPLD_BUILD (REG_BASE_CPU + 0xE0) + +//MB CPLD +//TBD, need to change after CPLD spec release +#define REG_MB_BRD_ID_0 (REG_BASE_MB + 0x00) +#define REG_MB_BRD_ID_1 (REG_BASE_MB + 0x01) +#define REG_MB_CPLD_VERSION (REG_BASE_MB + 0x02) +#define REG_MB_CPLD_BUILD (REG_BASE_MB + 0x04) +#define REG_MB_MUX_RESET (REG_BASE_MB + 0x46) +#define REG_MB_MUX_CTRL (REG_BASE_MB + 0x5c) + +//I2C Alert +#if CPU_TYPE == CPU_SKY +#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x80) +#else +#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x00) +#define REG_ALERT_DISABLE (REG_BASE_I2C_ALERT + 0x11) +#endif + +#define MASK_ALL (0xFF) +#define LPC_MDELAY (5) + +/* LPC sysfs attributes index */ +enum lpc_sysfs_attributes { + //CPU CPLD + ATT_CPU_CPLD_VERSION, + ATT_CPU_CPLD_VERSION_H, + ATT_CPU_BIOS_BOOT_ROM, + ATT_CPU_BIOS_BOOT_CFG, + ATT_CPU_CPLD_BUILD, + //MB CPLD + ATT_MB_BRD_ID_0, + ATT_MB_BRD_ID_1, + ATT_MB_CPLD_1_VERSION, + ATT_MB_CPLD_1_VERSION_H, + ATT_MB_CPLD_1_BUILD, + ATT_MB_MUX_CTRL, + ATT_MB_MUX_RESET, + ATT_MB_BRD_SKU_ID, + ATT_MB_BRD_HW_ID, + ATT_MB_BRD_ID_TYPE, + ATT_MB_BRD_BUILD_ID, + ATT_MB_BRD_DEPH_ID, + //I2C Alert + ATT_ALERT_STATUS, +#if CPU_TYPE == CPU_BDE + ATT_ALERT_DISABLE, +#endif + //BSP + ATT_BSP_VERSION, + ATT_BSP_DEBUG, + ATT_BSP_PR_INFO, + ATT_BSP_PR_ERR, + ATT_BSP_REG, + ATT_MAX +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE, + LOG_SYS +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +struct lpc_data_s { + struct mutex access_lock; +}; + +struct lpc_data_s *lpc_data; +char bsp_version[16]=""; +char bsp_debug[2]="0"; +char bsp_reg[8]="0x0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; +u8 enable_log_sys=LOG_ENABLE; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if ((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val) +{ + if (bit_val == 0) + reg_val = reg_val & ~(1 << bit); + else + reg_val = reg_val | (1 << bit); + return reg_val; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write) || + (log_type==LOG_SYS && enable_log_sys) ) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get lpc register value */ +static u8 _read_lpc_reg(u16 reg, u8 mask) +{ + u8 reg_val; + + mutex_lock(&lpc_data->access_lock); + reg_val=_mask_shift(inb(reg), mask); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return reg_val; +} + +/* get lpc register value */ +static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf) +{ + u8 reg_val; + int len=0; + + reg_val = _read_lpc_reg(reg, mask); + len=sprintf(buf,"0x%x\n", reg_val); + + return len; +} + +/* set lpc register value */ +static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count) +{ + u8 reg_val, reg_val_now, shift; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + //apply SINGLE BIT operation if mask is specified, multiple bits are not supported + if (mask != MASK_ALL) { + reg_val_now = _read_lpc_reg(reg, 0x0); + shift = _shift(mask); + reg_val = _bit_operation(reg_val_now, shift, reg_val); + } + + mutex_lock(&lpc_data->access_lock); + + outb(reg_val, reg); + mdelay(LPC_MDELAY); + + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return count; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + mutex_lock(&lpc_data->access_lock); + len=sprintf(buf, "%s", str); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + mutex_lock(&lpc_data->access_lock); + snprintf(str, str_len, "%s", buf); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get cpu cpld version in human readable format */ +static ssize_t read_cpu_cpld_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u16 reg = REG_CPU_CPLD_VERSION; + u8 mask = MASK_ALL; + u8 mask_major = 0b11000000; + u8 mask_minor = 0b00111111; + u8 reg_val; + u8 major, minor, build; + + mutex_lock(&lpc_data->access_lock); + reg_val = _mask_shift(inb(reg), mask); + major = _mask_shift(reg_val, mask_major); + minor = _mask_shift(reg_val, mask_minor); + reg = REG_CPU_CPLD_BUILD; + build = _mask_shift(inb(reg), mask); + len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return len; +} + +/* get mb cpld version in human readable format */ +static ssize_t read_mb_cpld_1_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u16 reg = REG_MB_CPLD_VERSION; + u8 mask = MASK_ALL; + u8 mask_major = 0b11000000; + u8 mask_minor = 0b00111111; + u8 reg_val; + u8 major, minor, build; + + mutex_lock(&lpc_data->access_lock); + reg_val = _mask_shift(inb(reg), mask); + major = _mask_shift(reg_val, mask_major); + minor = _mask_shift(reg_val, mask_minor); + reg = REG_MB_CPLD_BUILD; + build = _mask_shift(inb(reg), mask); + len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return len; +} + +/* get mux_reset register value */ +static ssize_t read_mux_reset_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + int len = 0; + u16 reg = REG_MB_MUX_RESET; + u8 mask = 0b00011111; + u8 reg_val; + + mutex_lock(&lpc_data->access_lock); + reg_val=_mask_shift(inb(reg), mask); + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + len=sprintf(buf, "%d\n", reg_val); + mutex_unlock(&lpc_data->access_lock); + + return len; +} + +/* set mux_reset register value */ +static ssize_t write_mux_reset_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + u8 val = 0; + u16 reg = REG_MB_MUX_RESET; + u8 reg_val = 0; + u8 mask = 0b00011111; + static int mux_reset_flag = 0; + + if (kstrtou8(buf, 0, &val) < 0) + return -EINVAL; + + if (mux_reset_flag == 0) { + if (val == 0) { + mutex_lock(&lpc_data->access_lock); + mux_reset_flag = 1; + BSP_LOG_W("i2c mux reset is triggered..."); + + reg_val = inb(reg); + outb((reg_val & ~mask), reg); + mdelay(LPC_MDELAY); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val & ~mask); + mdelay(500); + outb((reg_val | mask), reg); + mdelay(LPC_MDELAY); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val | mask); + mdelay(500); + mux_reset_flag = 0; + mutex_unlock(&lpc_data->access_lock); + } else { + return -EINVAL; + } + } else { + BSP_LOG_W("i2c mux is resetting... (ignore)"); + mutex_lock(&lpc_data->access_lock); + mutex_unlock(&lpc_data->access_lock); + } + + return count; +} + +/* get lpc register value */ +static ssize_t read_lpc_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + + switch (attr->index) { + //CPU CPLD + case ATT_CPU_CPLD_VERSION: + reg = REG_CPU_CPLD_VERSION; + break; + case ATT_CPU_BIOS_BOOT_ROM: + reg = REG_CPU_STATUS_1; + mask = 0x80; + break; + case ATT_CPU_BIOS_BOOT_CFG: + reg = REG_CPU_CTRL_1; + mask = 0x80; + break; + case ATT_CPU_CPLD_BUILD: + reg = REG_CPU_CPLD_BUILD; + break; + //MB CPLD + case ATT_MB_BRD_ID_0: + reg = REG_MB_BRD_ID_0; + break; + case ATT_MB_BRD_ID_1: + reg = REG_MB_BRD_ID_1; + break; + case ATT_MB_CPLD_1_VERSION: + reg = REG_MB_CPLD_VERSION; + break; + case ATT_MB_CPLD_1_BUILD: + reg = REG_MB_CPLD_BUILD; + break; + case ATT_MB_BRD_SKU_ID: + reg = REG_MB_BRD_ID_0; + mask = 0xFF; + break; + case ATT_MB_BRD_HW_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x03; + break; + case ATT_MB_BRD_ID_TYPE: + reg = REG_MB_BRD_ID_1; + mask = 0x80; + break; + case ATT_MB_BRD_BUILD_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x38; + break; + case ATT_MB_BRD_DEPH_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x04; + break; + case ATT_MB_MUX_CTRL: + reg = REG_MB_MUX_CTRL; + break; + //I2C Alert + case ATT_ALERT_STATUS: + reg = REG_ALERT_STATUS; + mask = 0x20; + break; +#if CPU_TYPE == CPU_BDE + case ATT_ALERT_DISABLE: + reg = REG_ALERT_DISABLE; + mask = 0x04; + break; +#endif + //BSP + case ATT_BSP_REG: + if (kstrtou16(bsp_reg, 0, ®) < 0) + return -EINVAL; + break; + default: + return -EINVAL; + } + return read_lpc_reg(reg, mask, buf); +} + +/* set lpc register value */ +static ssize_t write_lpc_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + + switch (attr->index) { + case ATT_MB_MUX_CTRL: + reg = REG_MB_MUX_CTRL; + break; + default: + return -EINVAL; + } + return write_lpc_reg(reg, mask, buf, count); +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + u16 reg = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + if (kstrtou16(buf, 0, ®) < 0) + return -EINVAL; + + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + + if (attr->index == ATT_BSP_DEBUG) { + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + } + + return write_bsp(buf, str, str_len, count); +} + +static ssize_t write_bsp_pr_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len = strlen(buf); + + if(str_len <= 0) + return str_len; + + switch (attr->index) { + case ATT_BSP_PR_INFO: + BSP_PR(KERN_INFO, "%s", buf); + break; + case ATT_BSP_PR_ERR: + BSP_PR(KERN_ERR, "%s", buf); + break; + default: + return -EINVAL; + } + + return str_len; +} + +//SENSOR_DEVICE_ATTR - CPU +static SENSOR_DEVICE_ATTR(cpu_cpld_version, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_VERSION); +static SENSOR_DEVICE_ATTR(cpu_cpld_version_h, S_IRUGO, read_cpu_cpld_version_h, NULL, ATT_CPU_CPLD_VERSION_H); +static SENSOR_DEVICE_ATTR(boot_rom, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM); +static SENSOR_DEVICE_ATTR(boot_cfg, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG); +static SENSOR_DEVICE_ATTR(cpu_cpld_build, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD); +//SENSOR_DEVICE_ATTR - MB +static SENSOR_DEVICE_ATTR(board_id_0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0); +static SENSOR_DEVICE_ATTR(board_id_1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1); +static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION); +static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H); +static SENSOR_DEVICE_ATTR(mb_cpld_1_build, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD); +static SENSOR_DEVICE_ATTR(mux_ctrl, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL); +static SENSOR_DEVICE_ATTR(mux_reset, S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET); +static SENSOR_DEVICE_ATTR(board_sku_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID); +static SENSOR_DEVICE_ATTR(board_hw_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID); +static SENSOR_DEVICE_ATTR(board_id_type, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE); +static SENSOR_DEVICE_ATTR(board_build_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID); +static SENSOR_DEVICE_ATTR(board_deph_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID); +//SENSOR_DEVICE_ATTR - I2C Alert +static SENSOR_DEVICE_ATTR(alert_status, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS); +#if CPU_TYPE == CPU_BDE +static SENSOR_DEVICE_ATTR(alert_disable, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE); +#endif +//SENSOR_DEVICE_ATTR - BSP +static SENSOR_DEVICE_ATTR(bsp_version, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION); +static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG); +static SENSOR_DEVICE_ATTR(bsp_pr_info, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_INFO); +static SENSOR_DEVICE_ATTR(bsp_pr_err, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_ERR); +static SENSOR_DEVICE_ATTR(bsp_reg, S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG); + +static struct attribute *cpu_cpld_attrs[] = { + &sensor_dev_attr_cpu_cpld_version.dev_attr.attr, + &sensor_dev_attr_cpu_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpu_cpld_build.dev_attr.attr, + NULL, +}; + +static struct attribute *mb_cpld_attrs[] = { + &sensor_dev_attr_board_id_0.dev_attr.attr, + &sensor_dev_attr_board_id_1.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_build.dev_attr.attr, + &sensor_dev_attr_board_sku_id.dev_attr.attr, + &sensor_dev_attr_board_hw_id.dev_attr.attr, + &sensor_dev_attr_board_id_type.dev_attr.attr, + &sensor_dev_attr_board_build_id.dev_attr.attr, + &sensor_dev_attr_board_deph_id.dev_attr.attr, + &sensor_dev_attr_mux_ctrl.dev_attr.attr, + &sensor_dev_attr_mux_reset.dev_attr.attr, + NULL, +}; + +static struct attribute *bios_attrs[] = { + &sensor_dev_attr_boot_rom.dev_attr.attr, + &sensor_dev_attr_boot_cfg.dev_attr.attr, + NULL, +}; + +static struct attribute *i2c_alert_attrs[] = { + &sensor_dev_attr_alert_status.dev_attr.attr, +#if CPU_TYPE == CPU_BDE + &sensor_dev_attr_alert_disable.dev_attr.attr, +#endif + NULL, +}; + +static struct attribute *bsp_attrs[] = { + &sensor_dev_attr_bsp_version.dev_attr.attr, + &sensor_dev_attr_bsp_debug.dev_attr.attr, + &sensor_dev_attr_bsp_pr_info.dev_attr.attr, + &sensor_dev_attr_bsp_pr_err.dev_attr.attr, + &sensor_dev_attr_bsp_reg.dev_attr.attr, + NULL, +}; + +static struct attribute_group cpu_cpld_attr_grp = { + .name = "cpu_cpld", + .attrs = cpu_cpld_attrs, +}; + +static struct attribute_group mb_cpld_attr_grp = { + .name = "mb_cpld", + .attrs = mb_cpld_attrs, +}; + +static struct attribute_group bios_attr_grp = { + .name = "bios", + .attrs = bios_attrs, +}; + +static struct attribute_group i2c_alert_attr_grp = { + .name = "i2c_alert", + .attrs = i2c_alert_attrs, +}; + +static struct attribute_group bsp_attr_grp = { + .name = "bsp", + .attrs = bsp_attrs, +}; + +static void lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .dev = { + .release = lpc_dev_release, + } +}; + +static int lpc_drv_probe(struct platform_device *pdev) +{ + int i = 0, grp_num = 5; + int err[5] = {0}; + struct attribute_group *grp; + + lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s), + GFP_KERNEL); + if (!lpc_data) + return -ENOMEM; + + mutex_init(&lpc_data->access_lock); + + for (i=0; idev.kobj, grp); + if (err[i]) { + printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name); + goto exit; + } else { + continue; + } + } + + return 0; + +exit: + for (i=0; idev.kobj, grp); + if (!err[i]) { + //remove previous successful cases + continue; + } else { + //remove first failed case, then return + return err[i]; + } + } + return 0; +} + +static int lpc_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &cpu_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bios_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &i2c_alert_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp); + + return 0; +} + +static struct platform_driver lpc_drv = { + .probe = lpc_drv_probe, + .remove = __exit_p(lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int lpc_init(void) +{ + int err = 0; + + err = platform_driver_register(&lpc_drv); + if (err) { + printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", + __func__, __LINE__, err); + + return err; + } + + err = platform_device_register(&lpc_dev); + if (err) { + printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", + __func__, __LINE__, err); + platform_driver_unregister(&lpc_drv); + return err; + } + + return err; +} + +void lpc_exit(void) +{ + platform_driver_unregister(&lpc_drv); + platform_device_unregister(&lpc_dev); +} + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("x86_64_ufispace_s9301_32d_lpc driver"); +MODULE_LICENSE("GPL"); + +module_init(lpc_init); +module_exit(lpc_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-sys-eeprom.c new file mode 100644 index 000000000000..3fa3ae4c9681 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-sys-eeprom.c @@ -0,0 +1,283 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include + +#define _memset(s, c, n) memset(s, c, n) + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void sys_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + sys_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute sys_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = sys_eeprom_read, + .write = sys_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int sys_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); +#else + _memset(data->data, 0xff, EEPROM_SIZE); +#endif + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +sys_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); + kfree(i2c_get_clientdata(client)); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +static const struct i2c_device_id sys_eeprom_id[] = { + { "sys_eeprom", 0 }, + { } +}; + +static struct i2c_driver sys_eeprom_driver = { + .driver = { + .name = "sys_eeprom", + }, + .probe = sys_eeprom_probe, + .remove = sys_eeprom_remove, + .id_table = sys_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = sys_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(sys_eeprom_driver); + +MODULE_AUTHOR("Wade "); +MODULE_DESCRIPTION("UfiSpace Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/service/pddf-platform-init.service new file mode 120000 index 000000000000..0fd9f25b6c5e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/service/pddf-platform-init.service @@ -0,0 +1 @@ +../../../../pddf/i2c/service/pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/__init__.py new file mode 100644 index 000000000000..593867d31c9d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"] +from . import platform + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/chassis.py new file mode 100644 index 000000000000..6c77e2424b89 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/chassis.py @@ -0,0 +1,189 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import time + from sonic_platform_pddf_base.pddf_chassis import PddfChassis + from sonic_py_common import device_info +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_COMPONENT = 5 + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + + port_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._initialize_components() + + def _initialize_components(self): + from sonic_platform.component import Component + for index in range(NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + return self._eeprom.platform_name_str() + + def initizalize_system_led(self): + return True + + def get_status_led(self): + return self.get_system_led("SYS_LED") + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + -------------------------------------------------------------------- + Ex. 'sfp':{'11':'0', '12':'1'}, + Indicates that: + sfp 11 has been removed, sfp 12 has been inserted. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + + change_event_dict = {"sfp": {}} + + start_time = time.time() + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_change_event:Invalid timeout value", timeout) + return False, change_event_dict + + end_time = start_time + timeout + if start_time > end_time: + print( + "get_change_event:" "time wrap / invalid timeout value", + timeout, + ) + return False, change_event_dict # Time wrap or possibly incorrect timeout + try: + while timeout >= 0: + # check for sfp + sfp_change_dict = self.get_transceiver_change_event() + + if sfp_change_dict: + change_event_dict["sfp"] = sfp_change_dict + return True, change_event_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, change_event_dict + except Exception as e: + print(e) + print("get_change_event: Should not reach here.") + return False, change_event_dict + + def get_transceiver_change_event(self, timeout=0): + current_port_dict = {} + ret_dict = {} + + # Check for OIR events and return ret_dict + for index in range(self.platform_inventory['num_ports']): + if self._sfp_list[index].get_presence(): + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['inserted'] + else: + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['removed'] + + if len(self.port_dict) == 0: # first time + self.port_dict = current_port_dict + return {} + + if current_port_dict == self.port_dict: + return {} + + # Update reg value + for index, status in current_port_dict.items(): + if self.port_dict[index] != status: + ret_dict[index] = status + #ret_dict[str(index)] = status + self.port_dict = current_port_dict + for index, status in ret_dict.items(): + if int(status) == 1: + pass + #self._sfp_list[int(index)].check_sfp_optoe_type() + return ret_dict + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file'] + + try: + with open(reboot_cause_path, 'r', errors='replace') as fd: + data = fd.read() + sw_reboot_cause = data.strip() + except IOError: + sw_reboot_cause = "Unknown" + + return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + + return self.get_serial() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/component.py new file mode 100644 index 000000000000..b94a10d616d6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/component.py @@ -0,0 +1,131 @@ +############################################################################# +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +try: + import subprocess + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +CPLD_SYSFS = { + "CPLD1": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld1_version", + "CPLD2": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_version", + "CPLD3": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_version", +} + +BMC_CMDS = { + "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'", +} + +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" +COMPONENT_LIST= [ + ("CPLD1", "CPLD 1"), + ("CPLD2", "CPLD 2"), + ("CPLD3", "CPLD 3"), + ("BIOS", "Basic Input/Output System"), + ("BMC", "BMC"), + +] + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index=0): + self.index = component_index + self.name = self.get_name() + + def _run_command(self, command): + # Run bash command and print output to stdout + try: + process = subprocess.Popen( + shlex.split(command), stdout=subprocess.PIPE) + while True: + output = process.stdout.readline() + if output == '' and process.poll() is not None: + break + rc = process.poll() + if rc != 0: + return False + except Exception: + return False + return True + + def _get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def _get_cpld_version(self): + # Retrieves the CPLD firmware version + cpld_version = dict() + for cpld_name in CPLD_SYSFS: + cmd = "cat {}".format(CPLD_SYSFS[cpld_name]) + status, value = subprocess.getstatusoutput(cmd) + if not status: + cpld_version_raw = value.rstrip() + cpld_version_int = int(cpld_version_raw,16) + cpld_version[cpld_name] = "{}.{:02d}".format(cpld_version_int >> 6, + cpld_version_int & 0b00111111) + + return cpld_version + + def _get_bmc_version(self): + # Retrieves the BMC firmware version + status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"]) + if not status: + return value + else: + return None + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][0] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_LIST[self.index][1] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self._get_bios_version() + elif "CPLD" in self.name: + cpld_version = self._get_cpld_version() + fw_version = cpld_version.get(self.name) + elif self.name == "BMC": + fw_version = self._get_bmc_version() + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/eeprom.py new file mode 100644 index 000000000000..90ab1c779a48 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(PddfEeprom): + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def platform_name_str(self): + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan.py new file mode 100644 index 000000000000..3082de54a140 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan.py @@ -0,0 +1,172 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed_percentage = 0 + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED']) + else: + if self.fan_index == 1: + pos = "f" + max_speed = int(self.plugin_data['FAN']['FAN_F_MAX_SPEED']) + else: + pos = "r" + max_speed = int(self.plugin_data['FAN']['FAN_R_MAX_SPEED']) + attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return speed_percentage + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return speed_percentage + else: + speed = int(float(output['status'])) + + speed_percentage = round((speed*100)/max_speed) + + return min(speed_percentage, 100) + + def get_speed_rpm(self): + """ + Retrieves the speed of fan in RPM + + Returns: + An integer, Speed of fan in RPM + """ + rpm_speed = 0 + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + else: + if self.fan_index == 1: + pos = "f" + else: + pos = "r" + attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + + if output is None: + return rpm_speed + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return rpm_speed + else: + rpm_speed = int(float(output['status'])) + + return rpm_speed + + def get_direction(self): + """ + Retrieves the direction of fan + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = self.FAN_DIRECTION_INTAKE + if self.is_psu_fan: + attr = "psu_fan{}_dir".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + else: + attr = "fan{}_dir".format(self.fantray_index) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return direction + + mode = output['mode'] + val = output['status'].strip() + vmap = self.plugin_data['FAN']['direction'][mode]['valmap'] + + if val in vmap: + direction = vmap[val] + + return direction + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + presence = False + if self.is_psu_fan: + attr = "psu_present" + device = "PSU{}".format(self.fans_psu_index) + else: + attr = "fan{}_present".format(self.fantray_index) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return presence + + + mode = output['mode'] + val = output['status'].strip() + + if self.is_psu_fan: + vmap = self.plugin_data['PSU']['psu_present'][mode]['valmap'] + else: + vmap = self.plugin_data['FAN']['present'][mode]['valmap'] + + if val in vmap: + presence = vmap[val] + + return presence + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + return self.get_speed() + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + + print("Setting Fan speed is not allowed") + return False + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..3b9bb607f632 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan_drawer.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/platform.py similarity index 58% rename from platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/watchdog.py rename to platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/platform.py index 88660b1a1faa..406b1179ae1b 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/watchdog.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/platform.py @@ -1,23 +1,25 @@ #!/usr/bin/env python ############################################################################# -# -# Module contains an implementation of platform specific watchdog API's +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information # ############################################################################# + try: - from sonic_platform_pddf_base.pddf_watchdog import PddfWatchdog + from sonic_platform_pddf_base.pddf_platform import PddfPlatform except ImportError as e: raise ImportError(str(e) + "- required module not found") -class Watchdog(PddfWatchdog): + +class Platform(PddfPlatform): """ - PDDF Platform-specific Chassis class + PDDF Platform-Specific Platform Class """ def __init__(self): - PddfWatchdog.__init__(self) - self.timeout= 180 + PddfPlatform.__init__(self) # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/psu.py new file mode 100644 index 000000000000..3e213415f314 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/psu.py @@ -0,0 +1,56 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + PLATFORM_PSU_CAPACITY = 1300 + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return float(self.PLATFORM_PSU_CAPACITY) + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + + # power is returned in micro watts + return round(float(self.get_voltage()*self.get_current()), 2) + + def get_capacity(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return self.get_maximum_supplied_power() + + def get_type(self): + """ + Gets the type of the PSU + + Returns: + A string, the type of PSU (AC/DC) + """ + return self.plugin_data['PSU']['DEFAULT_TYPE'] \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/sfp.py new file mode 100644 index 000000000000..c7919482f69c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/sfp.py @@ -0,0 +1,31 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_sfp import PddfSfp +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.index = index + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + + return self.SFP_STATUS_OK diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/thermal.py new file mode 100644 index 000000000000..77d6ec7ae886 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/thermal.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform_setup.py new file mode 100644 index 000000000000..3661c84a0cd6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform_setup.py @@ -0,0 +1,27 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on ufispace platform', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Leo Lin', + maintainer_email='leo.yt.lin@ufispace.com', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_device_create.sh new file mode 100755 index 000000000000..e4de7ae3669e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_device_create.sh @@ -0,0 +1,6 @@ +#!/bin/bash +#disable bmc watchdog +timeout 3 ipmitool mc watchdog off + +echo 1 > /sys/kernel/pddf/devices/sysstatus/sysstatus_data/port_led_clr_ctrl +echo "PDDF device post-create completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_driver_install.sh new file mode 100755 index 000000000000..ed2559977e42 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_driver_install.sh @@ -0,0 +1,2 @@ +#!/bin/bash +echo "PDDF driver post-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_switch_svc.py new file mode 100755 index 000000000000..3be0d61b5a4b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_switch_svc.py @@ -0,0 +1,86 @@ +#!/usr/bin/env python +# Script to stop and start the respective platforms default services. +# This will be used while switching the pddf->non-pddf mode and vice versa +import commands + +def check_pddf_support(): + return True + +def stop_platform_svc(): + + ''' + status, output = commands.getstatusoutput("systemctl stop s9301-32d-platform-monitor-fan.service") + if status: + print "Stop s9301-32d-platform-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s9301-32d-platform-monitor-psu.service") + if status: + print "Stop s9301-32d-platform-psu.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s9301-32d-platform-monitor.service") + if status: + print "Stop s9301-32d-platform-init.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl disable s9301-32d-platform-monitor.service") + if status: + print "Disable s9301-32d-platform-monitor.service failed %d"%status + return False + ''' + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit") + if status: + print "platform_utility.py deinit command failed %d"%status + return False + + # HACK , stop the pddf-platform-init service if it is active + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service along with other platform serives failed %d"%status + return False + + return True + +def start_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init") + if status: + print "platform_utility.py init command failed %d"%status + return False + + ''' + status, output = commands.getstatusoutput("systemctl enable s9301-32d-platform-monitor.service") + if status: + print "Enable s9301-32d-platform-monitor.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl start s9301-32d-platform-monitor-fan.service") + if status: + print "Start s9301-32d-platform-monitor-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl start s9301-32d-platform-monitor-psu.service") + if status: + print "Start s9301-32d-platform-monitor-psu.service failed %d"%status + return False + ''' + return True + +def start_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service") + if status: + print "Start pddf-platform-init.service failed %d"%status + return False + + return True + +def stop_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service failed %d"%status + return False + + return True + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/Makefile new file mode 100644 index 000000000000..2f8a4deb8bfe --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/Makefile @@ -0,0 +1,6 @@ + +MODULE_NAME = x86-64-ufispace-s9301-32db-cpld.o x86-64-ufispace-s9301-32db-sys-eeprom.o x86-64-ufispace-s9301-32db-lpc.o pddf_custom_sysstatus_module.o +obj-m := $(MODULE_NAME) + +CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include +KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/pddf_custom_sysstatus_module.c new file mode 100644 index 000000000000..b61219c0088d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/pddf_custom_sysstatus_module.c @@ -0,0 +1,266 @@ +/* + * Copyright 2019 Broadcom. + * The term "Broadcom" refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module for system status registers + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h" + +#define _memset(s, c, n) memset(s, c, n) + +SYSSTATUS_DATA sysstatus_data = {0}; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf); +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + + +PDDF_DATA_ATTR(attr_name, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_CHAR, 32, + (void*)&sysstatus_data.sysstatus_addr_attr.aname, NULL); +PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.devaddr , NULL); +PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.offset, NULL); +PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.mask , NULL); +PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.len , NULL); +PDDF_DATA_ATTR(attr_ops, S_IWUSR, NULL, do_attr_operation, PDDF_CHAR, 8, (void*)&sysstatus_data, NULL); + + + +static struct attribute *sysstatus_addr_attributes[] = { + &attr_attr_name.dev_attr.attr, + &attr_attr_devaddr.dev_attr.attr, + &attr_attr_offset.dev_attr.attr, + &attr_attr_mask.dev_attr.attr, + &attr_attr_len.dev_attr.attr, + &attr_attr_ops.dev_attr.attr, + NULL +}; + +PDDF_DATA_ATTR(board_info, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld3_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(mac_reset, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(mux_reset, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(psu_status, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_0, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_1, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(beacon_led, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(port_led_clr_ctrl, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); + +static struct attribute *sysstatus_data_attributes[] = { + &attr_board_info.dev_attr.attr, + &attr_cpld1_version.dev_attr.attr, + &attr_cpld2_version.dev_attr.attr, + &attr_cpld3_version.dev_attr.attr, + &attr_mac_reset.dev_attr.attr, + &attr_mux_reset.dev_attr.attr, + &attr_psu_status.dev_attr.attr, + &attr_system_led_0.dev_attr.attr, + &attr_system_led_1.dev_attr.attr, + &attr_beacon_led.dev_attr.attr, + &attr_port_led_clr_ctrl.dev_attr.attr, + NULL +}; + + +static const struct attribute_group pddf_sysstatus_addr_group = { + .attrs = sysstatus_addr_attributes, +}; + + +static const struct attribute_group pddf_sysstatus_data_group = { + .attrs = sysstatus_data_attributes, +}; + + +static struct kobject *sysstatus_addr_kobj; +static struct kobject *sysstatus_data_kobj; + + + +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf) +{ + + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + + } + } + + if (sysstatus_addr_attrs==NULL ) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); + status = 0; + } + else + { + status = board_i2c_cpld_read( sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset); + } + + return sprintf(buf, "0x%x\n", (status&sysstatus_addr_attrs->mask)); + +} + +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + u8 reg_val; + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + } + } + + if (sysstatus_addr_attrs==NULL) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name); + return -EINVAL; + } + else + { + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + status = board_i2c_cpld_write(sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset, reg_val); + + if (status!=0) + { + printk(KERN_DEBUG "store_sysstatus_data() %s failed, status=%d\n",data->sysstatus_addr_attrs[i].aname, status); + return status; + } + } + + return count; +} + + + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + PDDF_ATTR *ptr = (PDDF_ATTR *)da; + SYSSTATUS_DATA *pdata = (SYSSTATUS_DATA *)(ptr->addr); + + pdata->sysstatus_addr_attrs[pdata->len] = pdata->sysstatus_addr_attr; + pdata->len++; + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Populating the data for %s\n", __FUNCTION__, pdata->sysstatus_addr_attr.aname); +#ifdef __STDC_LIB_EXT1__ + memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr), 0, sizeof(pdata->sysstatus_addr_attr)); +#else + _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#endif + + return count; +} + + + + +int __init sysstatus_data_init(void) +{ + struct kobject *device_kobj; + int ret = 0; + + + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. init\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + sysstatus_addr_kobj = kobject_create_and_add("sysstatus", device_kobj); + if(!sysstatus_addr_kobj) + return -ENOMEM; + + sysstatus_data_kobj = kobject_create_and_add("sysstatus_data", sysstatus_addr_kobj); + if(!sysstatus_data_kobj) + return -ENOMEM; + + + ret = sysfs_create_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + if (ret) + { + kobject_put(sysstatus_addr_kobj); + return ret; + } + + ret = sysfs_create_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + if (ret) + { + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + return ret; + } + + + return ret; +} + +void __exit sysstatus_data_exit(void) +{ + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. exit\n"); + sysfs_remove_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Removed the kobjects for 'SYSSTATUS'\n",__FUNCTION__); + return; +} + +module_init(sysstatus_data_init); +module_exit(sysstatus_data_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("SYSSTATUS platform data"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.c new file mode 100644 index 000000000000..e18e1f39cb4e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.c @@ -0,0 +1,1656 @@ +/* + * A i2c cpld driver for the ufispace_s9301_32db + * + * Copyright (C) 2017-2019 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "x86-64-ufispace-s9301-32db-cpld.h" + +#ifdef DEBUG +#define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#else +#define DEBUG_PRINT(fmt, args...) +#endif + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ + BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \ +} +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ + BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \ +} + +/* CPLD sysfs attributes index */ +enum s9301_cpld_sysfs_attributes { + /* CPLD1 */ + CPLD_ACCESS_REG, + CPLD_REGISTER_VAL, + CPLD_SKU_ID, + CPLD_HW_REV, + CPLD_DEPH_REV, + CPLD_BUILD_REV, + CPLD_ID_TYPE, + CPLD_MAJOR_VER, + CPLD_MINOR_VER, + CPLD_BUILD_VER, + CPLD_VERION_H, + CPLD_ID, + CPLD_MAC_INTR, + CPLD_10G_PHY_INTR, + CPLD_CPLD_FRU_INTR, + CPLD_THERMAL_ALERT_INTR, + CPLD_MISC_INTR, + CPLD_SYSTEM_INTR, + CPLD_MAC_INTR_MASK, + CPLD_10G_PHY_INTR_MASK, + CPLD_CPLD_FRU_INTR_MASK, + CPLD_THERMAL_ALERT_INTR_MASK, + CPLD_MISC_INTR_MASK, + CPLD_MAC_INTR_EVENT, + CPLD_10G_PHY_INTR_EVENT, + CPLD_CPLD_FRU_INTR_EVENT, + CPLD_THERMAL_ALERT_INTR_EVENT, + CPLD_MISC_INTR_EVENT, + CPLD_MAC_RST, + CPLD_10G_PHY_RST, + CPLD_BMC_RST, + CPLD_USB_RST, + CPLD_MUX_RST, + CPLD_MISC_RST, + CPLD_BMC_WATCHDOG, + CPLD_DAU_BD_PRES, + CPLD_PSU_STATUS, + CPLD_SYS_PW_STATUS, + CPLD_MISC, + CPLD_MUX_CTRL, + CPLD_10GMUX_SEL, + CPLD_MAC_QSFP_SEL_CTRL, + CPLD_SYS_LED_CTRL_1, + CPLD_SYS_LED_CTRL_2, + CPLD_BEACON_LED_CTRL, + CPLD_PORT_LED_CLR_CTRL, + CPLD_EVENT_DETECT_CTRL, + /* CPLD2 */ + CPLD_QSFP56_MOD_INT_G0, + CPLD_QSFP56_MOD_INT_G1, + CPLD_QSFP56_MOD_INT_G2, + CPLD_QSFPDD_MOD_INT, + CPLD_QSFP56_PRES_G0, + CPLD_QSFP56_PRES_G1, + CPLD_QSFP56_PRES_G2, + CPLD_QSFPDD_PRES, + CPLD_QSFP56_FUSE_INT_G0, + CPLD_QSFP56_FUSE_INT_G1, + CPLD_QSFP56_FUSE_INT_G2, + CPLD_QSFPDD_FUSE_INT, + CPLD_SFP_TXFAULT, + CPLD_SFP_ABS, + CPLD_SFP_RXLOS, + CPLD_QSFP56_MOD_INT_MASK_G0, + CPLD_QSFP56_MOD_INT_MASK_G1, + CPLD_QSFP56_MOD_INT_MASK_G2, + CPLD_QSFPDD_MOD_INT_MASK, + CPLD_QSFP56_PRES_MASK_G0, + CPLD_QSFP56_PRES_MASK_G1, + CPLD_QSFP56_PRES_MASK_G2, + CPLD_QSFPDD_PRES_MASK, + CPLD_QSFP56_FUSE_INT_MASK_G0, + CPLD_QSFP56_FUSE_INT_MASK_G1, + CPLD_QSFP56_FUSE_INT_MASK_G2, + CPLD_QSFPDD_FUSE_INT_MASK, + CPLD_SFP_TXFAULT_MASK, + CPLD_SFP_ABS_MASK, + CPLD_SFP_RXLOS_MASK, + CPLD_QSFP56_MOD_INT_EVENT_G0, + CPLD_QSFP56_MOD_INT_EVENT_G1, + CPLD_QSFP56_MOD_INT_EVENT_G2, + CPLD_QSFPDD_MOD_INT_EVENT, + CPLD_QSFP56_PRES_EVENT_G0, + CPLD_QSFP56_PRES_EVENT_G1, + CPLD_QSFP56_PRES_EVENT_G2, + CPLD_QSFPDD_PRES_EVENT, + CPLD_QSFP56_FUSE_INT_EVENT_G0, + CPLD_QSFP56_FUSE_INT_EVENT_G1, + CPLD_QSFP56_FUSE_INT_EVENT_G2, + CPLD_QSFPDD_FUSE_INT_EVENT, + CPLD_SFP_TXFAULT_EVENT, + CPLD_SFP_ABS_EVENT, + CPLD_SFP_RXLOS_EVENT, + CPLD_QSFP56_RESET_CTRL_G0, + CPLD_QSFP56_RESET_CTRL_G1, + CPLD_QSFP56_RESET_CTRL_G2, + CPLD_QSFPDD_RESET_CTRL, + CPLD_QSFP56_LP_MODE_G0, + CPLD_QSFP56_LP_MODE_G1, + CPLD_QSFP56_LP_MODE_G2, + CPLD_QSFPDD_LP_MODE, + CPLD_SFP_TX_DIS, + CPLD_SFP_RS, + CPLD_SFP_TS, + CPLD_PORT_INT_STATUS, + + //BSP DEBUG + BSP_DEBUG +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_hw_rev_cb(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_cpld_version_cb(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_cpld_version_h_cb(struct device *dev, + struct device_attribute *da, char *buf); +// cpld access api +static ssize_t read_cpld_reg(struct device *dev, char *buf, u8 reg); +static ssize_t write_cpld_reg(struct device *dev, const char *buf, size_t count, u8 reg); +static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno); +static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val); +// bsp debug api +static ssize_t read_bsp(char *buf, char *str); +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count); +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +/* CPLD device id and data */ +static const struct i2c_device_id s9301_cpld_id[] = { + { "s9301_32db_cpld1", cpld1 }, + { "s9301_32db_cpld2", cpld2 }, + { "s9301_32db_cpld3", cpld3 }, + {} +}; + +char bsp_debug[2]="0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; + +/* Addresses scanned for s9301_cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, 0x32, I2C_CLIENT_END }; + +/* define all support register access of cpld in attribute */ +/* CPLD1 */ +static SENSOR_DEVICE_ATTR(cpld_access_register, S_IWUSR | S_IRUGO, \ + read_access_register, write_access_register, CPLD_ACCESS_REG); +static SENSOR_DEVICE_ATTR(cpld_register_value, S_IWUSR | S_IRUGO, \ + read_register_value, write_register_value, CPLD_REGISTER_VAL); +static SENSOR_DEVICE_ATTR(cpld_sku_id, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SKU_ID); +static SENSOR_DEVICE_ATTR(cpld_hw_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_HW_REV); +static SENSOR_DEVICE_ATTR(cpld_deph_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_DEPH_REV); +static SENSOR_DEVICE_ATTR(cpld_build_rev, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_BUILD_REV); +static SENSOR_DEVICE_ATTR(cpld_id_type, S_IRUGO, \ + read_hw_rev_cb, NULL, CPLD_ID_TYPE); +static SENSOR_DEVICE_ATTR(cpld_major_ver, S_IRUGO, \ + read_cpld_version_cb, NULL, CPLD_MAJOR_VER); +static SENSOR_DEVICE_ATTR(cpld_minor_ver, S_IRUGO, \ + read_cpld_version_cb, NULL, CPLD_MINOR_VER); +static SENSOR_DEVICE_ATTR(cpld_build_ver, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_BUILD_VER); +static SENSOR_DEVICE_ATTR(cpld_version_h, S_IRUGO, \ + read_cpld_version_h_cb, NULL, CPLD_VERION_H); +static SENSOR_DEVICE_ATTR(cpld_id, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_ID); +static SENSOR_DEVICE_ATTR(cpld_mac_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MAC_INTR); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_10G_PHY_INTR); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR); +static SENSOR_DEVICE_ATTR(cpld_misc_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC_INTR); +static SENSOR_DEVICE_ATTR(cpld_system_intr, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYSTEM_INTR); +static SENSOR_DEVICE_ATTR(cpld_mac_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_CPLD_FRU_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_THERMAL_ALERT_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_misc_intr_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MISC_INTR_MASK); +static SENSOR_DEVICE_ATTR(cpld_mac_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MAC_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_10G_PHY_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_misc_intr_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC_INTR_EVENT); +static SENSOR_DEVICE_ATTR(cpld_mac_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_RST); +static SENSOR_DEVICE_ATTR(cpld_10g_phy_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_RST); +static SENSOR_DEVICE_ATTR(cpld_bmc_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BMC_RST); +static SENSOR_DEVICE_ATTR(cpld_usb_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_USB_RST); +static SENSOR_DEVICE_ATTR(cpld_mux_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MUX_RST); +static SENSOR_DEVICE_ATTR(cpld_misc_rst, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MISC_RST); +static SENSOR_DEVICE_ATTR(cpld_bmc_watchdog, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BMC_WATCHDOG); +static SENSOR_DEVICE_ATTR(cpld_dau_bd_pres, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_DAU_BD_PRES); +static SENSOR_DEVICE_ATTR(cpld_psu_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_PSU_STATUS); +static SENSOR_DEVICE_ATTR(cpld_sys_pw_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_PW_STATUS); +static SENSOR_DEVICE_ATTR(cpld_misc, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_MISC); +static SENSOR_DEVICE_ATTR(cpld_mux_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MUX_CTRL); +static SENSOR_DEVICE_ATTR(cpld_10gmux_sel, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_10GMUX_SEL); +static SENSOR_DEVICE_ATTR(cpld_mac_qsfp_sel_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_MAC_QSFP_SEL_CTRL); +static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_1); +static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_2); +static SENSOR_DEVICE_ATTR(cpld_beacon_led_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_BEACON_LED_CTRL); +static SENSOR_DEVICE_ATTR(cpld_port_led_clr_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_PORT_LED_CLR_CTRL); +static SENSOR_DEVICE_ATTR(cpld_event_detect_ctrl, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_EVENT_DETECT_CTRL); +/* CPLD2 */ +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_PRES_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_PRES_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_PRES_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_TXFAULT); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_ABS); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_RXLOS); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_MOD_INT_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_MOD_INT_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_MOD_INT_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_PRES_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_PRES_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_PRES_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_mask_g0, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_FUSE_INT_MASK_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_mask_g1, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_FUSE_INT_MASK_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_mask_g2, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFP56_FUSE_INT_MASK_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TXFAULT_MASK); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_ABS_MASK); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_mask, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_RXLOS_MASK); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_PRES_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_PRES_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_PRES_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_event_g0, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_EVENT_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_event_g1, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_EVENT_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_event_g2, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_EVENT_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT); +static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_TXFAULT_EVENT); +static SENSOR_DEVICE_ATTR(cpld_sfp_abs_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_ABS_EVENT); +static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_event, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_SFP_RXLOS_EVENT); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_reset_ctrl_g0, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFP56_RESET_CTRL_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_reset_ctrl_g1, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFP56_RESET_CTRL_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_reset_ctrl_g2, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFP56_RESET_CTRL_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_RESET_CTRL); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_lp_mode_g0, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFP56_LP_MODE_G0); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_lp_mode_g1, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFP56_LP_MODE_G1); +static SENSOR_DEVICE_ATTR(cpld_qsfp56_lp_mode_g2, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFP56_LP_MODE_G2); +static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode, \ + S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, \ + CPLD_QSFPDD_LP_MODE); +static SENSOR_DEVICE_ATTR(cpld_sfp_tx_dis, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TX_DIS); +static SENSOR_DEVICE_ATTR(cpld_sfp_rs, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_RS); +static SENSOR_DEVICE_ATTR(cpld_sfp_ts, S_IWUSR | S_IRUGO, \ + read_cpld_callback, write_cpld_callback, CPLD_SFP_TS); +static SENSOR_DEVICE_ATTR(cpld_port_int_status, S_IRUGO, \ + read_cpld_callback, NULL, CPLD_PORT_INT_STATUS); +//BSP DEBUG +static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, \ + read_bsp_callback, write_bsp_callback, BSP_DEBUG); + +/* define support attributes of cpldx , total 3 */ +/* cpld 1 */ +static struct attribute *s9301_cpld1_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_sku_id.dev_attr.attr, + &sensor_dev_attr_cpld_hw_rev.dev_attr.attr, + &sensor_dev_attr_cpld_deph_rev.dev_attr.attr, + &sensor_dev_attr_cpld_build_rev.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id_type.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr.dev_attr.attr, + &sensor_dev_attr_cpld_system_intr.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr_mask.dev_attr.attr, + &sensor_dev_attr_cpld_mac_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_cpld_fru_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_thermal_alert_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_misc_intr_event.dev_attr.attr, + &sensor_dev_attr_cpld_mac_rst.dev_attr.attr, + &sensor_dev_attr_cpld_10g_phy_rst.dev_attr.attr, + &sensor_dev_attr_cpld_bmc_rst.dev_attr.attr, + &sensor_dev_attr_cpld_usb_rst.dev_attr.attr, + &sensor_dev_attr_cpld_mux_rst.dev_attr.attr, + &sensor_dev_attr_cpld_misc_rst.dev_attr.attr, + &sensor_dev_attr_cpld_bmc_watchdog.dev_attr.attr, + &sensor_dev_attr_cpld_dau_bd_pres.dev_attr.attr, + &sensor_dev_attr_cpld_psu_status.dev_attr.attr, + &sensor_dev_attr_cpld_sys_pw_status.dev_attr.attr, + &sensor_dev_attr_cpld_misc.dev_attr.attr, + &sensor_dev_attr_cpld_mux_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_10gmux_sel.dev_attr.attr, + &sensor_dev_attr_cpld_mac_qsfp_sel_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_sys_led_ctrl_1.dev_attr.attr, + &sensor_dev_attr_cpld_sys_led_ctrl_2.dev_attr.attr, + &sensor_dev_attr_cpld_beacon_led_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_port_led_clr_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_event_detect_ctrl.dev_attr.attr, + &sensor_dev_attr_bsp_debug.dev_attr.attr, + NULL +}; + +/* cpld 2 */ +static struct attribute *s9301_cpld2_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_mask.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_mask.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_mask_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_mask_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_mask_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault_mask.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs_mask.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos_mask.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_mod_int_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_mod_int_event.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_pres_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_pres_event.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_event_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_event_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_fuse_int_event_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_fuse_int_event.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_txfault_event.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_abs_event.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rxlos_event.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_reset_ctrl_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_reset_ctrl_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_reset_ctrl_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_reset_ctrl.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_lp_mode_g0.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_lp_mode_g1.dev_attr.attr, + &sensor_dev_attr_cpld_qsfp56_lp_mode_g2.dev_attr.attr, + &sensor_dev_attr_cpld_qsfpdd_lp_mode.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_tx_dis.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_rs.dev_attr.attr, + &sensor_dev_attr_cpld_sfp_ts.dev_attr.attr, + &sensor_dev_attr_cpld_port_int_status.dev_attr.attr, + NULL +}; + +/* cpld 3 */ +static struct attribute *s9301_cpld3_attributes[] = { + &sensor_dev_attr_cpld_access_register.dev_attr.attr, + &sensor_dev_attr_cpld_register_value.dev_attr.attr, + &sensor_dev_attr_cpld_major_ver.dev_attr.attr, + &sensor_dev_attr_cpld_minor_ver.dev_attr.attr, + &sensor_dev_attr_cpld_build_ver.dev_attr.attr, + &sensor_dev_attr_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpld_id.dev_attr.attr, + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group s9301_cpld1_group = { + .attrs = s9301_cpld1_attributes, +}; +/* cpld 2 attributes group */ +static const struct attribute_group s9301_cpld2_group = { + .attrs = s9301_cpld2_attributes, +}; +/* cpld 3 attributes group */ +static const struct attribute_group s9301_cpld3_group = { + .attrs = s9301_cpld3_attributes, +}; + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write)) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + len=sprintf(buf, "%s", str); + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + snprintf(str, str_len, "%s", buf); + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch(attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + ssize_t ret = 0; + u8 bsp_debug_u8 = 0; + + switch(attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + ret = write_bsp(buf, str, str_len, count); + + if(kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if(_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + return ret; + default: + return -EINVAL; + } + return 0; +} + +/* read access register from cpld data */ +static ssize_t read_access_register(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + + return sprintf(buf, "0x%x\n", reg); +} + +/* write access register to cpld data */ +static ssize_t write_access_register(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg; + + if(kstrtou8(buf, 0, ®) < 0) + return -EINVAL; + + data->access_reg = reg; + return count; +} + +/* read the value of access register in cpld data */ +static ssize_t read_register_value(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg = data->access_reg; + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if(reg_val < 0) + return reg_val; + + return sprintf(buf, "0x%x\n", reg_val); +} + +/* wrtie the value to access register in cpld data */ +static ssize_t write_register_value(struct device *dev, + struct device_attribute *da, + const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int ret = -EIO; + u8 reg = data->access_reg; + u8 reg_val; + + if(kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, reg_val); + + if(unlikely(ret < 0)) { + dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* get cpld register value */ +static ssize_t read_cpld_reg(struct device *dev, + char *buf, + u8 reg) +{ + int reg_val; + + if(read_cpld_reg_raw_int(dev, reg, ®_val)) + return sprintf(buf, "0x%02x\n", reg_val); + else + return reg_val; +} + +static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + I2C_READ_BYTE_DATA(*val, &data->access_lock, client, reg); + if(unlikely(*val < 0)) { + dev_err(dev, "read_cpld_reg_raw_int() error, return=%d\n", *val); + return false; + } + return true; +} + +static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno) +{ + int reg_val; + + if(read_cpld_reg_raw_int(dev, reg, ®_val)) { + *val = (u8)reg_val; + return true; + } else { + *errno = reg_val; + return false; + } +} + +/* handle read for attributes */ +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + + switch(attr->index) { + case CPLD_SKU_ID: + reg = CPLD_SKU_ID_REG; + break; + case CPLD_ID: + reg = CPLD_ID_REG; + break; + case CPLD_BUILD_VER: + reg = CPLD_BUILD_VER_REG; + break; + case CPLD_MAC_INTR: + reg = CPLD_MAC_INTR_REG; + break; + case CPLD_10G_PHY_INTR: + reg = CPLD_10G_PHY_INTR_REG; + break; + case CPLD_CPLD_FRU_INTR: + reg = CPLD_CPLD_FRU_INTR_REG; + break; + case CPLD_THERMAL_ALERT_INTR: + reg = CPLD_THERMAL_ALERT_INTR_REG; + break; + case CPLD_MISC_INTR: + reg = CPLD_MISC_INTR_REG; + break; + case CPLD_SYSTEM_INTR: + reg = CPLD_SYSTEM_INTR_REG; + break; + case CPLD_MAC_INTR_MASK: + reg = CPLD_MAC_INTR_MASK_REG; + break; + case CPLD_10G_PHY_INTR_MASK: + reg = CPLD_10G_PHY_INTR_MASK_REG; + break; + case CPLD_CPLD_FRU_INTR_MASK: + reg = CPLD_CPLD_FRU_INTR_MASK_REG; + break; + case CPLD_THERMAL_ALERT_INTR_MASK: + reg = CPLD_THERMAL_ALERT_INTR_MASK_REG; + break; + case CPLD_MISC_INTR_MASK: + reg = CPLD_MISC_INTR_MASK_REG; + break; + case CPLD_MAC_INTR_EVENT: + reg = CPLD_MAC_INTR_EVENT_REG; + break; + case CPLD_10G_PHY_INTR_EVENT: + reg = CPLD_10G_PHY_INTR_EVENT_REG; + break; + case CPLD_CPLD_FRU_INTR_EVENT: + reg = CPLD_CPLD_FRU_INTR_EVENT_REG; + break; + case CPLD_THERMAL_ALERT_INTR_EVENT: + reg = CPLD_THERMAL_ALERT_INTR_EVENT_REG; + break; + case CPLD_MISC_INTR_EVENT: + reg = CPLD_MISC_INTR_EVENT_REG; + break; + case CPLD_MAC_RST: + reg = CPLD_MAC_RST_REG; + break; + case CPLD_10G_PHY_RST: + reg = CPLD_10G_PHY_RST_REG; + break; + case CPLD_BMC_RST: + reg = CPLD_BMC_RST_REG; + break; + case CPLD_USB_RST: + reg = CPLD_USB_RST_REG; + break; + case CPLD_MUX_RST: + reg = CPLD_MUX_RST_REG; + break; + case CPLD_MISC_RST: + reg = CPLD_MISC_RST_REG; + break; + case CPLD_BMC_WATCHDOG: + reg = CPLD_BMC_WATCHDOG_REG; + break; + case CPLD_DAU_BD_PRES: + reg = CPLD_DAU_BD_PRES_REG; + break; + case CPLD_PSU_STATUS: + reg = CPLD_PSU_STATUS_REG; + break; + case CPLD_SYS_PW_STATUS: + reg = CPLD_SYS_PW_STATUS_REG; + break; + case CPLD_MISC: + reg = CPLD_MISC_REG; + break; + case CPLD_MUX_CTRL: + reg = CPLD_MUX_CTRL_REG; + break; + case CPLD_10GMUX_SEL: + reg = CPLD_10GMUX_SEL_REG; + break; + case CPLD_MAC_QSFP_SEL_CTRL: + reg = CPLD_MAC_QSFP_SEL_CTRL_REG; + break; + case CPLD_SYS_LED_CTRL_1: + reg = CPLD_SYS_LED_CTRL_1_REG; + break; + case CPLD_SYS_LED_CTRL_2: + reg = CPLD_SYS_LED_CTRL_2_REG; + break; + case CPLD_BEACON_LED_CTRL: + reg = CPLD_BEACON_LED_CTRL_REG; + break; + case CPLD_PORT_LED_CLR_CTRL: + reg = CPLD_PORT_LED_CLR_CTRL_REG; + break; + case CPLD_EVENT_DETECT_CTRL: + reg = CPLD_EVENT_DETECT_CTRL_REG; + break; + case CPLD_QSFP56_MOD_INT_G0: + reg = CPLD_QSFP56_MOD_INT_G0_REG; + break; + case CPLD_QSFP56_MOD_INT_G1: + reg = CPLD_QSFP56_MOD_INT_G1_REG; + break; + case CPLD_QSFP56_MOD_INT_G2: + reg = CPLD_QSFP56_MOD_INT_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT: + reg = CPLD_QSFPDD_MOD_INT_REG; + break; + case CPLD_QSFP56_PRES_G0: + reg = CPLD_QSFP56_PRES_G0_REG; + break; + case CPLD_QSFP56_PRES_G1: + reg = CPLD_QSFP56_PRES_G1_REG; + break; + case CPLD_QSFP56_PRES_G2: + reg = CPLD_QSFP56_PRES_G2_REG; + break; + case CPLD_QSFPDD_PRES: + reg = CPLD_QSFPDD_PRES_REG; + break; + case CPLD_QSFP56_FUSE_INT_G0: + reg = CPLD_QSFP56_FUSE_INT_G0_REG; + break; + case CPLD_QSFP56_FUSE_INT_G1: + reg = CPLD_QSFP56_FUSE_INT_G1_REG; + break; + case CPLD_QSFP56_FUSE_INT_G2: + reg = CPLD_QSFP56_FUSE_INT_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT: + reg = CPLD_QSFPDD_FUSE_INT_REG; + break; + case CPLD_SFP_TXFAULT: + reg = CPLD_SFP_TXFAULT_REG; + break; + case CPLD_SFP_ABS: + reg = CPLD_SFP_ABS_REG; + break; + case CPLD_SFP_RXLOS: + reg = CPLD_SFP_RXLOS_REG; + break; + case CPLD_QSFP56_MOD_INT_MASK_G0: + reg = CPLD_QSFP56_MOD_INT_MASK_G0_REG; + break; + case CPLD_QSFP56_MOD_INT_MASK_G1: + reg = CPLD_QSFP56_MOD_INT_MASK_G1_REG; + break; + case CPLD_QSFP56_MOD_INT_MASK_G2: + reg = CPLD_QSFP56_MOD_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK: + reg = CPLD_QSFPDD_MOD_INT_MASK_REG; + break; + case CPLD_QSFP56_PRES_MASK_G0: + reg = CPLD_QSFP56_PRES_MASK_G0_REG; + break; + case CPLD_QSFP56_PRES_MASK_G1: + reg = CPLD_QSFP56_PRES_MASK_G1_REG; + break; + case CPLD_QSFP56_PRES_MASK_G2: + reg = CPLD_QSFP56_PRES_MASK_G2_REG; + break; + case CPLD_QSFPDD_PRES_MASK: + reg = CPLD_QSFPDD_PRES_MASK_REG; + break; + case CPLD_QSFP56_FUSE_INT_MASK_G0: + reg = CPLD_QSFP56_FUSE_INT_MASK_G0_REG; + break; + case CPLD_QSFP56_FUSE_INT_MASK_G1: + reg = CPLD_QSFP56_FUSE_INT_MASK_G1_REG; + break; + case CPLD_QSFP56_FUSE_INT_MASK_G2: + reg = CPLD_QSFP56_FUSE_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK: + reg = CPLD_QSFPDD_FUSE_INT_MASK_REG; + break; + case CPLD_SFP_TXFAULT_MASK: + reg = CPLD_SFP_TXFAULT_MASK_REG; + break; + case CPLD_SFP_ABS_MASK: + reg = CPLD_SFP_ABS_MASK_REG; + break; + case CPLD_SFP_RXLOS_MASK: + reg = CPLD_SFP_RXLOS_MASK_REG; + break; + case CPLD_QSFP56_MOD_INT_EVENT_G0: + reg = CPLD_QSFP56_MOD_INT_EVENT_G0_REG; + break; + case CPLD_QSFP56_MOD_INT_EVENT_G1: + reg = CPLD_QSFP56_MOD_INT_EVENT_G1_REG; + break; + case CPLD_QSFP56_MOD_INT_EVENT_G2: + reg = CPLD_QSFP56_MOD_INT_EVENT_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_EVENT: + reg = CPLD_QSFPDD_MOD_INT_EVENT_REG; + break; + case CPLD_QSFP56_PRES_EVENT_G0: + reg = CPLD_QSFP56_PRES_EVENT_G0_REG; + break; + case CPLD_QSFP56_PRES_EVENT_G1: + reg = CPLD_QSFP56_PRES_EVENT_G1_REG; + break; + case CPLD_QSFP56_PRES_EVENT_G2: + reg = CPLD_QSFP56_PRES_EVENT_G2_REG; + break; + case CPLD_QSFPDD_PRES_EVENT: + reg = CPLD_QSFPDD_PRES_EVENT_REG; + break; + case CPLD_QSFP56_FUSE_INT_EVENT_G0: + reg = CPLD_QSFP56_FUSE_INT_EVENT_G0_REG; + break; + case CPLD_QSFP56_FUSE_INT_EVENT_G1: + reg = CPLD_QSFP56_FUSE_INT_EVENT_G1_REG; + break; + case CPLD_QSFP56_FUSE_INT_EVENT_G2: + reg = CPLD_QSFP56_FUSE_INT_EVENT_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_EVENT: + reg = CPLD_QSFPDD_FUSE_INT_EVENT_REG; + break; + case CPLD_SFP_TXFAULT_EVENT: + reg = CPLD_SFP_TXFAULT_EVENT_REG; + break; + case CPLD_SFP_ABS_EVENT: + reg = CPLD_SFP_ABS_EVENT_REG; + break; + case CPLD_SFP_RXLOS_EVENT: + reg = CPLD_SFP_RXLOS_EVENT_REG; + break; + case CPLD_QSFP56_RESET_CTRL_G0: + reg = CPLD_QSFP56_RESET_CTRL_G0_REG; + break; + case CPLD_QSFP56_RESET_CTRL_G1: + reg = CPLD_QSFP56_RESET_CTRL_G1_REG; + break; + case CPLD_QSFP56_RESET_CTRL_G2: + reg = CPLD_QSFP56_RESET_CTRL_G2_REG; + break; + case CPLD_QSFPDD_RESET_CTRL: + reg = CPLD_QSFPDD_RESET_CTRL_REG; + break; + case CPLD_QSFP56_LP_MODE_G0: + reg = CPLD_QSFP56_LP_MODE_G0_REG; + break; + case CPLD_QSFP56_LP_MODE_G1: + reg = CPLD_QSFP56_LP_MODE_G1_REG; + break; + case CPLD_QSFP56_LP_MODE_G2: + reg = CPLD_QSFP56_LP_MODE_G2_REG; + break; + case CPLD_QSFPDD_LP_MODE: + reg = CPLD_QSFPDD_LP_MODE_REG; + break; + case CPLD_SFP_TX_DIS: + reg = CPLD_SFP_TX_DIS_REG; + break; + case CPLD_SFP_RS: + reg = CPLD_SFP_RS_REG; + break; + case CPLD_SFP_TS: + reg = CPLD_SFP_TS_REG; + break; + case CPLD_PORT_INT_STATUS: + reg = CPLD_PORT_INT_STATUS_REG; + break; + default: + return -EINVAL; + } + return read_cpld_reg(dev, buf, reg); +} + +/* handle read for hw_rev attributes */ +static ssize_t read_hw_rev_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = CPLD_HW_REV_REG; + u8 reg_val = 0; + int errno = 0; + u8 res; + + if(!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + + switch(attr->index) { + case CPLD_HW_REV: + HW_REV_GET(reg_val, res); + break; + case CPLD_DEPH_REV: + DEPH_REV_GET(reg_val, res); + break; + case CPLD_BUILD_REV: + BUILD_REV_GET(reg_val, res); + break; + case CPLD_ID_TYPE: + ID_TYPE_GET(reg_val, res); + break; + default: + return -EINVAL; + } + return sprintf(buf, "0x%02x\n", res); +} + +/* handle read for cpld_version attributes */ +static ssize_t read_cpld_version_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = CPLD_VERSION_REG; + u8 reg_val = 0; + int errno = 0; + u8 res; + + if(!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + + switch(attr->index) { + case CPLD_MAJOR_VER: + CPLD_MAJOR_VERSION_GET(reg_val, res); + break; + case CPLD_MINOR_VER: + CPLD_MINOR_VERSION_GET(reg_val, res); + break; + default: + return -EINVAL; + } + return sprintf(buf, "0x%02x\n", res); +} + +/* handle read human-readable string for cpld_version attributes */ +static ssize_t read_cpld_version_h_cb(struct device *dev, + struct device_attribute *da, char *buf) +{ + u8 reg = CPLD_VERSION_REG; + u8 reg_val = 0; + int errno = 0; + u8 major, minor, build; + + //get major/minor register value + if(!read_cpld_reg_raw_byte(dev, reg, ®_val, &errno)) + return errno; + CPLD_MAJOR_VERSION_GET(reg_val, major); + CPLD_MINOR_VERSION_GET(reg_val, minor); + + //get build register value + reg = CPLD_BUILD_VER_REG; + if(!read_cpld_reg_raw_byte(dev, reg, &build, &errno)) + return errno; + + //version string format : xx.xx.xxx + return sprintf(buf, "%d.%02d.%03d\n", major, minor, build); +} + +/* handle write for attributes */ +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + + switch(attr->index) { + case CPLD_MAC_INTR_MASK: + reg = CPLD_MAC_INTR_MASK_REG; + break; + case CPLD_10G_PHY_INTR_MASK: + reg = CPLD_10G_PHY_INTR_MASK_REG; + break; + case CPLD_CPLD_FRU_INTR_MASK: + reg = CPLD_CPLD_FRU_INTR_MASK_REG; + break; + case CPLD_THERMAL_ALERT_INTR_MASK: + reg = CPLD_THERMAL_ALERT_INTR_MASK_REG; + break; + case CPLD_MISC_INTR_MASK: + reg = CPLD_MISC_INTR_MASK_REG; + break; + case CPLD_MAC_RST: + reg = CPLD_MAC_RST_REG; + break; + case CPLD_10G_PHY_RST: + reg = CPLD_10G_PHY_RST_REG; + break; + case CPLD_BMC_RST: + reg = CPLD_BMC_RST_REG; + break; + case CPLD_USB_RST: + reg = CPLD_USB_RST_REG; + break; + case CPLD_MUX_RST: + reg = CPLD_MUX_RST_REG; + break; + case CPLD_MISC_RST: + reg = CPLD_MISC_RST_REG; + break; + case CPLD_BMC_WATCHDOG: + reg = CPLD_BMC_WATCHDOG_REG; + break; + case CPLD_MUX_CTRL: + reg = CPLD_MUX_CTRL_REG; + break; + case CPLD_10GMUX_SEL: + reg = CPLD_10GMUX_SEL_REG; + break; + case CPLD_MAC_QSFP_SEL_CTRL: + reg = CPLD_MAC_QSFP_SEL_CTRL_REG; + break; + case CPLD_BEACON_LED_CTRL: + reg = CPLD_BEACON_LED_CTRL_REG; + break; + case CPLD_PORT_LED_CLR_CTRL: + reg = CPLD_PORT_LED_CLR_CTRL_REG; + break; + case CPLD_EVENT_DETECT_CTRL: + reg = CPLD_EVENT_DETECT_CTRL_REG; + break; + case CPLD_QSFP56_MOD_INT_MASK_G0: + reg = CPLD_QSFP56_MOD_INT_MASK_G0_REG; + break; + case CPLD_QSFP56_MOD_INT_MASK_G1: + reg = CPLD_QSFP56_MOD_INT_MASK_G1_REG; + break; + case CPLD_QSFP56_MOD_INT_MASK_G2: + reg = CPLD_QSFP56_MOD_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_MOD_INT_MASK: + reg = CPLD_QSFPDD_MOD_INT_MASK_REG; + break; + case CPLD_QSFP56_PRES_MASK_G0: + reg = CPLD_QSFP56_PRES_MASK_G0_REG; + break; + case CPLD_QSFP56_PRES_MASK_G1: + reg = CPLD_QSFP56_PRES_MASK_G1_REG; + break; + case CPLD_QSFP56_PRES_MASK_G2: + reg = CPLD_QSFP56_PRES_MASK_G2_REG; + break; + case CPLD_QSFPDD_PRES_MASK: + reg = CPLD_QSFPDD_PRES_MASK_REG; + break; + case CPLD_QSFP56_FUSE_INT_MASK_G0: + reg = CPLD_QSFP56_FUSE_INT_MASK_G0_REG; + break; + case CPLD_QSFP56_FUSE_INT_MASK_G1: + reg = CPLD_QSFP56_FUSE_INT_MASK_G1_REG; + break; + case CPLD_QSFP56_FUSE_INT_MASK_G2: + reg = CPLD_QSFP56_FUSE_INT_MASK_G2_REG; + break; + case CPLD_QSFPDD_FUSE_INT_MASK: + reg = CPLD_QSFPDD_FUSE_INT_MASK_REG; + break; + case CPLD_SFP_TXFAULT_MASK: + reg = CPLD_SFP_TXFAULT_MASK_REG; + break; + case CPLD_SFP_ABS_MASK: + reg = CPLD_SFP_ABS_MASK_REG; + break; + case CPLD_SFP_RXLOS_MASK: + reg = CPLD_SFP_RXLOS_MASK_REG; + break; + case CPLD_QSFP56_RESET_CTRL_G0: + reg = CPLD_QSFP56_RESET_CTRL_G0_REG; + break; + case CPLD_QSFP56_RESET_CTRL_G1: + reg = CPLD_QSFP56_RESET_CTRL_G1_REG; + break; + case CPLD_QSFP56_RESET_CTRL_G2: + reg = CPLD_QSFP56_RESET_CTRL_G2_REG; + break; + case CPLD_QSFPDD_RESET_CTRL: + reg = CPLD_QSFPDD_RESET_CTRL_REG; + break; + case CPLD_QSFP56_LP_MODE_G0: + reg = CPLD_QSFP56_LP_MODE_G0_REG; + break; + case CPLD_QSFP56_LP_MODE_G1: + reg = CPLD_QSFP56_LP_MODE_G1_REG; + break; + case CPLD_QSFP56_LP_MODE_G2: + reg = CPLD_QSFP56_LP_MODE_G2_REG; + break; + case CPLD_QSFPDD_LP_MODE: + reg = CPLD_QSFPDD_LP_MODE_REG; + break; + case CPLD_SFP_TX_DIS: + reg = CPLD_SFP_TX_DIS_REG; + break; + case CPLD_SFP_RS: + reg = CPLD_SFP_RS_REG; + break; + case CPLD_SFP_TS: + reg = CPLD_SFP_TS_REG; + break; + default: + return -EINVAL; + } + return write_cpld_reg(dev, buf, count, reg); +} + +/* set cpld register value */ +static ssize_t write_cpld_reg(struct device *dev, + const char *buf, + size_t count, + u8 reg) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg_val; + int ret; + + if(kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + + if(unlikely(ret < 0)) { + dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* add valid cpld client to list */ +static void s9301_cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if(!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void s9301_cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if(cpld_node->client == client) { + found = 1; + break; + } + } + + if(found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int s9301_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + int ret = -EPERM; + int idx; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if(!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if(!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + /* get cpld id from device */ + ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG); + + if(ret < 0) { + dev_info(&client->dev, + "fail to get cpld id (0x%x) at addr (0x%x)\n", + CPLD_ID_REG, client->addr); + status = -EIO; + goto exit; + } + + CPLD_ID_ID_GET(ret, idx); + + if(INVALID(idx, cpld1, cpld3)) { + dev_info(&client->dev, + "cpld id %d(device) not valid\n", idx); + //status = -EPERM; + //goto exit; + } + + data->index = dev_id->driver_data; + + /* register sysfs hooks for different cpld group */ + dev_info(&client->dev, "probe cpld with index %d\n", data->index); + switch(data->index) { + case cpld1: + status = sysfs_create_group(&client->dev.kobj, + &s9301_cpld1_group); + break; + case cpld2: + status = sysfs_create_group(&client->dev.kobj, + &s9301_cpld2_group); + break; + case cpld3: + status = sysfs_create_group(&client->dev.kobj, + &s9301_cpld3_group); + break; + default: + status = -EINVAL; + } + + if(status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + s9301_cpld_add_client(client); + + return 0; +exit: + switch(data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld2_group); + break; + case cpld3: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld3_group); + break; + default: + break; + } + return status; +} + +/* cpld drvier remove */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +s9301_cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + switch(data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld2_group); + break; + case cpld3: + sysfs_remove_group(&client->dev.kobj, &s9301_cpld3_group); + break; + } + + s9301_cpld_remove_client(client); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +MODULE_DEVICE_TABLE(i2c, s9301_cpld_id); + +static struct i2c_driver s9301_cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "x86_64_ufispace_s9301_32db_cpld", + }, + .probe = s9301_cpld_probe, + .remove = s9301_cpld_remove, + .id_table = s9301_cpld_id, + .address_list = cpld_i2c_addr, +}; + +/* provide cpld register read */ +/* cpld_idx indicate the index of cpld device */ +int s9301_cpld_read(u8 cpld_idx, + u8 reg) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EPERM; + struct cpld_data *data; + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + data = i2c_get_clientdata(cpld_node->client); + if(data->index == cpld_idx) { + DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x", + cpld_idx, reg); + I2C_READ_BYTE_DATA(ret, &data->access_lock, + cpld_node->client, reg); + DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x = 0x%02x", + cpld_idx, reg, ret); + break; + } + } + + return ret; +} +EXPORT_SYMBOL(s9301_cpld_read); + +/* provide cpld register write */ +/* cpld_idx indicate the index of cpld device */ +int s9301_cpld_write(u8 cpld_idx, + u8 reg, + u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + struct cpld_data *data; + + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + data = i2c_get_clientdata(cpld_node->client); + + if(data->index == cpld_idx) { + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + cpld_node->client, + reg, value); + DEBUG_PRINT("cpld_idx=%d, write reg 0x%02x val 0x%02x, ret=%d", + cpld_idx, reg, value, ret); + break; + } + } + + return ret; +} +EXPORT_SYMBOL(s9301_cpld_write); + +static int __init s9301_cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&s9301_cpld_driver); +} + +static void __exit s9301_cpld_exit(void) +{ + i2c_del_driver(&s9301_cpld_driver); +} + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("x86_64_ufispace_s9301_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(s9301_cpld_init); +module_exit(s9301_cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.h b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.h new file mode 100644 index 000000000000..2022a1301709 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.h @@ -0,0 +1,256 @@ +/* header file for i2c cpld driver of ufispace_s9301_32db + * + * Copyright (C) 2017 UfiSpace Technology Corporation. + * Leo Lin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef UFISPACE_S9301_I2C_CPLD_H +#define UFISPACE_S9301_I2C_CPLD_H + +/* CPLD device index value */ +enum cpld_id { + cpld1, + cpld2, + cpld3, +}; + +enum LED_BLINK { + NOBLINK, + BLINK, +}; + +enum LED_BLINK_SPEED { + BLINK_1X, //0.5hz + BLINK_4X, //2hz +}; + +enum LED_STATUS { + OFF, + ON, +}; + +enum LED_YELLOW { + YELLOW_OFF, + YELLOW_ON, +}; + +enum LED_GREEN { + GREEN_OFF, + GREEN_ON, +}; + +/* QSFP56 port number */ +#define QSFP56_MAX_PORT_NUM 24 +#define QSFP56_MIN_PORT_NUM 1 + +/* QSFPDD port number */ +#define QSFPDD_MAX_PORT_NUM 8 +#define QSFPDD_MIN_PORT_NUM 1 + +/* SFP+ port number */ +#define SFP_MAX_PORT_NUM 4 +#define SFP_MIN_PORT_NUM 1 + + +/* CPLD registers */ +/* CPLD 1 */ +#define CPLD_SKU_ID_REG 0x00 +#define CPLD_HW_REV_REG 0x01 +#define CPLD_VERSION_REG 0x02 +#define CPLD_ID_REG 0x03 +#define CPLD_BUILD_VER_REG 0x04 +//Interrupt status +#define CPLD_MAC_INTR_REG 0x10 +#define CPLD_10G_PHY_INTR_REG 0x13 +#define CPLD_CPLD_FRU_INTR_REG 0x14 +#define CPLD_THERMAL_ALERT_INTR_REG 0x16 +#define CPLD_MISC_INTR_REG 0x1B +#define CPLD_SYSTEM_INTR_REG 0x1D +//Interrupt mask +#define CPLD_MAC_INTR_MASK_REG 0x20 +#define CPLD_10G_PHY_INTR_MASK_REG 0x23 +#define CPLD_CPLD_FRU_INTR_MASK_REG 0x24 +#define CPLD_THERMAL_ALERT_INTR_MASK_REG 0x26 +#define CPLD_MISC_INTR_MASK_REG 0x2B +//Interrupt event +#define CPLD_MAC_INTR_EVENT_REG 0x30 +#define CPLD_10G_PHY_INTR_EVENT_REG 0x33 +#define CPLD_CPLD_FRU_INTR_EVENT_REG 0x14 +#define CPLD_THERMAL_ALERT_INTR_EVENT_REG 0x16 +#define CPLD_MISC_INTR_EVENT_REG 0x1B +//Reset ctrl +#define CPLD_MAC_RST_REG 0x40 +#define CPLD_10G_PHY_RST_REG 0x42 +#define CPLD_BMC_RST_REG 0x43 +#define CPLD_USB_RST_REG 0x44 +#define CPLD_MUX_RST_REG 0x46 +#define CPLD_MISC_RST_REG 0x48 +#define CPLD_BMC_WATCHDOG_REG 0x4D +//Sys status +#define CPLD_DAU_BD_PRES_REG 0x50 +#define CPLD_PSU_STATUS_REG 0x51 +#define CPLD_SYS_PW_STATUS_REG 0x52 +#define CPLD_MISC_REG 0x5B +//Mux ctrl +#define CPLD_MUX_CTRL_REG 0x5C +#define CPLD_10GMUX_SEL_REG 0x5E +#define CPLD_MAC_QSFP_SEL_CTRL_REG 0x5F +//Led ctrl +#define CPLD_SYS_LED_CTRL_1_REG 0x80 +#define CPLD_SYS_LED_CTRL_2_REG 0x81 +#define CPLD_BEACON_LED_CTRL_REG 0x84 +#define CPLD_PORT_LED_CLR_CTRL_REG 0x85 +//Event Detect Ctrl +#define CPLD_EVENT_DETECT_CTRL_REG 0x5D + +/* CPLD 2 */ +/* QSFP56 G0 - port 0 ~ 7 + QSFP56 G1 - port 8 ~ 15 + QSFP56 G2 - port 16 ~ 23 + QSFPDD - port 24 ~ 31 + */ +//Interrupt status +#define CPLD_QSFP56_MOD_INT_G0_REG 0x10 +#define CPLD_QSFP56_MOD_INT_G1_REG 0x11 +#define CPLD_QSFP56_MOD_INT_G2_REG 0x12 +#define CPLD_QSFPDD_MOD_INT_REG 0x13 +#define CPLD_QSFP56_PRES_G0_REG 0x14 +#define CPLD_QSFP56_PRES_G1_REG 0x15 +#define CPLD_QSFP56_PRES_G2_REG 0x16 +#define CPLD_QSFPDD_PRES_REG 0x17 +#define CPLD_QSFP56_FUSE_INT_G0_REG 0x18 +#define CPLD_QSFP56_FUSE_INT_G1_REG 0x19 +#define CPLD_QSFP56_FUSE_INT_G2_REG 0x1A +#define CPLD_QSFPDD_FUSE_INT_REG 0x1B +#define CPLD_SFP_TXFAULT_REG 0x1D +#define CPLD_SFP_ABS_REG 0x1E +#define CPLD_SFP_RXLOS_REG 0x1F +//Interrupt mask +#define CPLD_QSFP56_MOD_INT_MASK_G0_REG 0x20 +#define CPLD_QSFP56_MOD_INT_MASK_G1_REG 0x21 +#define CPLD_QSFP56_MOD_INT_MASK_G2_REG 0x22 +#define CPLD_QSFPDD_MOD_INT_MASK_REG 0x23 +#define CPLD_QSFP56_PRES_MASK_G0_REG 0x24 +#define CPLD_QSFP56_PRES_MASK_G1_REG 0x25 +#define CPLD_QSFP56_PRES_MASK_G2_REG 0x26 +#define CPLD_QSFPDD_PRES_MASK_REG 0x27 +#define CPLD_QSFP56_FUSE_INT_MASK_G0_REG 0x28 +#define CPLD_QSFP56_FUSE_INT_MASK_G1_REG 0x29 +#define CPLD_QSFP56_FUSE_INT_MASK_G2_REG 0x2A +#define CPLD_QSFPDD_FUSE_INT_MASK_REG 0x2B +#define CPLD_SFP_TXFAULT_MASK_REG 0x2D +#define CPLD_SFP_ABS_MASK_REG 0x2E +#define CPLD_SFP_RXLOS_MASK_REG 0x2F +//Interrupt event +#define CPLD_QSFP56_MOD_INT_EVENT_G0_REG 0x30 +#define CPLD_QSFP56_MOD_INT_EVENT_G1_REG 0x31 +#define CPLD_QSFP56_MOD_INT_EVENT_G2_REG 0x32 +#define CPLD_QSFPDD_MOD_INT_EVENT_REG 0x33 +#define CPLD_QSFP56_PRES_EVENT_G0_REG 0x34 +#define CPLD_QSFP56_PRES_EVENT_G1_REG 0x35 +#define CPLD_QSFP56_PRES_EVENT_G2_REG 0x36 +#define CPLD_QSFPDD_PRES_EVENT_REG 0x37 +#define CPLD_QSFP56_FUSE_INT_EVENT_G0_REG 0x38 +#define CPLD_QSFP56_FUSE_INT_EVENT_G1_REG 0x39 +#define CPLD_QSFP56_FUSE_INT_EVENT_G2_REG 0x3A +#define CPLD_QSFPDD_FUSE_INT_EVENT_REG 0x3B +#define CPLD_SFP_TXFAULT_EVENT_REG 0x3D +#define CPLD_SFP_ABS_EVENT_REG 0x3E +#define CPLD_SFP_RXLOS_EVENT_REG 0x3F +//Port ctrl +#define CPLD_QSFP56_RESET_CTRL_G0_REG 0x40 +#define CPLD_QSFP56_RESET_CTRL_G1_REG 0x41 +#define CPLD_QSFP56_RESET_CTRL_G2_REG 0x42 +#define CPLD_QSFPDD_RESET_CTRL_REG 0x43 +#define CPLD_QSFP56_LP_MODE_G0_REG 0x44 +#define CPLD_QSFP56_LP_MODE_G1_REG 0x45 +#define CPLD_QSFP56_LP_MODE_G2_REG 0x46 +#define CPLD_QSFPDD_LP_MODE_REG 0x47 +#define CPLD_SFP_TX_DIS_REG 0x55 +#define CPLD_SFP_RS_REG 0x56 +#define CPLD_SFP_TS_REG 0x57 +//Port status +#define CPLD_PORT_INT_STATUS_REG 0x58 + + +/* bit field structure for register value */ +struct cpld_reg_sku_id_t { + u8 model_id:8; +}; + +struct cpld_reg_hw_rev_t { + u8 hw_rev:2; + u8 deph_rev:1; + u8 build_rev:3; + u8 reserved:1; + u8 id_type:1; +}; + +struct cpld_reg_version_t { + u8 minor:6; + u8 major:2; +}; + +struct cpld_reg_id_t { + u8 id:3; + u8 release:5; +}; + +struct cpld_reg_beacon_led_ctrl_t { + u8 reserve:5; + u8 speed:1; + u8 blink:1; + u8 onoff:1; +}; + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) +#define READ_BIT(val, bit) ((0u == (val & (1<bf_name) +#define READ_BF_1(bf_struct, val, bf_name, bf_value) \ + bf_struct bf; \ + bf.data = val; \ + bf_value = bf.bf_name +#define HW_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, hw_rev, res) +#define DEPH_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, deph_rev, res) +#define BUILD_REV_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, build_rev, res) +#define ID_TYPE_GET(val, res) \ + READ_BF(cpld_reg_hw_rev_t, val, id_type, res) +#define CPLD_MAJOR_VERSION_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, major, res) +#define CPLD_MINOR_VERSION_GET(val, res) \ + READ_BF(cpld_reg_version_t, val, minor, res) +#define CPLD_ID_ID_GET(val, res) \ + READ_BF(cpld_reg_id_t, val, id, res) + +/* CPLD access functions */ +extern int s9301_cpld_read(u8 cpld_idx, u8 reg); +extern int s9301_cpld_write(u8 cpld_idx, u8 reg, u8 value); + +#endif + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-lpc.c new file mode 100644 index 000000000000..01801b6c81bd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-lpc.c @@ -0,0 +1,850 @@ +/* + * A lpc driver for the ufispace_s9301_32db + * + * Copyright (C) 2017-2020 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) + +#define DRIVER_NAME "x86_64_ufispace_s9301_32db_lpc" +#define CPU_BDE 0 +#define CPU_SKY 1 +#define CPU_TYPE CPU_SKY + +/* LPC registers */ + +#define REG_BASE_CPU 0x600 + +#if CPU_TYPE == CPU_SKY +#define REG_BASE_MB 0xE00 +#define REG_BASE_I2C_ALERT 0x700 +#else +#define REG_BASE_MB 0x700 +#define REG_BASE_I2C_ALERT 0xF000 +#endif + +//CPU CPLD +#define REG_CPU_CPLD_VERSION (REG_BASE_CPU + 0x00) +#define REG_CPU_STATUS_0 (REG_BASE_CPU + 0x01) +#define REG_CPU_STATUS_1 (REG_BASE_CPU + 0x02) +#define REG_CPU_CTRL_0 (REG_BASE_CPU + 0x03) +#define REG_CPU_CTRL_1 (REG_BASE_CPU + 0x04) +#define REG_CPU_CPLD_BUILD (REG_BASE_CPU + 0xE0) + +//MB CPLD +//TBD, need to change after CPLD spec release +#define REG_MB_BRD_ID_0 (REG_BASE_MB + 0x00) +#define REG_MB_BRD_ID_1 (REG_BASE_MB + 0x01) +#define REG_MB_CPLD_VERSION (REG_BASE_MB + 0x02) +#define REG_MB_CPLD_BUILD (REG_BASE_MB + 0x04) +#define REG_MB_MUX_RESET (REG_BASE_MB + 0x46) +#define REG_MB_MUX_CTRL (REG_BASE_MB + 0x5c) + +//I2C Alert +#if CPU_TYPE == CPU_SKY +#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x80) +#else +#define REG_ALERT_STATUS (REG_BASE_I2C_ALERT + 0x00) +#define REG_ALERT_DISABLE (REG_BASE_I2C_ALERT + 0x11) +#endif + +#define MASK_ALL (0xFF) +#define LPC_MDELAY (5) + +/* LPC sysfs attributes index */ +enum lpc_sysfs_attributes { + //CPU CPLD + ATT_CPU_CPLD_VERSION, + ATT_CPU_CPLD_VERSION_H, + ATT_CPU_BIOS_BOOT_ROM, + ATT_CPU_BIOS_BOOT_CFG, + ATT_CPU_CPLD_BUILD, + //MB CPLD + ATT_MB_BRD_ID_0, + ATT_MB_BRD_ID_1, + ATT_MB_CPLD_1_VERSION, + ATT_MB_CPLD_1_VERSION_H, + ATT_MB_CPLD_1_BUILD, + ATT_MB_MUX_CTRL, + ATT_MB_MUX_RESET, + ATT_MB_BRD_SKU_ID, + ATT_MB_BRD_HW_ID, + ATT_MB_BRD_ID_TYPE, + ATT_MB_BRD_BUILD_ID, + ATT_MB_BRD_DEPH_ID, + //I2C Alert + ATT_ALERT_STATUS, +#if CPU_TYPE == CPU_BDE + ATT_ALERT_DISABLE, +#endif + //BSP + ATT_BSP_VERSION, + ATT_BSP_DEBUG, + ATT_BSP_PR_INFO, + ATT_BSP_PR_ERR, + ATT_BSP_REG, + ATT_MAX +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE, + LOG_SYS +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +struct lpc_data_s { + struct mutex access_lock; +}; + +struct lpc_data_s *lpc_data; +char bsp_version[16]=""; +char bsp_debug[2]="0"; +char bsp_reg[8]="0x0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; +u8 enable_log_sys=LOG_ENABLE; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val) +{ + if(bit_val == 0) + reg_val = reg_val & ~(1 << bit); + else + reg_val = reg_val | (1 << bit); + return reg_val; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write) || + (log_type==LOG_SYS && enable_log_sys) ) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get lpc register value */ +static u8 _read_lpc_reg(u16 reg, u8 mask) +{ + u8 reg_val; + + mutex_lock(&lpc_data->access_lock); + reg_val=_mask_shift(inb(reg), mask); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return reg_val; +} + +/* get lpc register value */ +static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf) +{ + u8 reg_val; + int len=0; + + reg_val = _read_lpc_reg(reg, mask); + len=sprintf(buf,"0x%x\n", reg_val); + + return len; +} + +/* set lpc register value */ +static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count) +{ + u8 reg_val, reg_val_now, shift; + + if(kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + //apply SINGLE BIT operation if mask is specified, multiple bits are not supported + if(mask != MASK_ALL) { + reg_val_now = _read_lpc_reg(reg, 0x0); + shift = _shift(mask); + reg_val = _bit_operation(reg_val_now, shift, reg_val); + } + + mutex_lock(&lpc_data->access_lock); + + outb(reg_val, reg); + mdelay(LPC_MDELAY); + + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return count; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + mutex_lock(&lpc_data->access_lock); + len=sprintf(buf, "%s", str); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + mutex_lock(&lpc_data->access_lock); + snprintf(str, str_len, "%s", buf); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get cpu cpld version in human readable format */ +static ssize_t read_cpu_cpld_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u16 reg = REG_CPU_CPLD_VERSION; + u8 mask = MASK_ALL; + u8 mask_major = 0b11000000; + u8 mask_minor = 0b00111111; + u8 reg_val; + u8 major, minor, build; + + mutex_lock(&lpc_data->access_lock); + reg_val = _mask_shift(inb(reg), mask); + major = _mask_shift(reg_val, mask_major); + minor = _mask_shift(reg_val, mask_minor); + reg = REG_CPU_CPLD_BUILD; + build = _mask_shift(inb(reg), mask); + len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return len; +} + +/* get mb cpld version in human readable format */ +static ssize_t read_mb_cpld_1_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u16 reg = REG_MB_CPLD_VERSION; + u8 mask = MASK_ALL; + u8 mask_major = 0b11000000; + u8 mask_minor = 0b00111111; + u8 reg_val; + u8 major, minor, build; + + mutex_lock(&lpc_data->access_lock); + reg_val = _mask_shift(inb(reg), mask); + major = _mask_shift(reg_val, mask_major); + minor = _mask_shift(reg_val, mask_minor); + reg = REG_MB_CPLD_BUILD; + build = _mask_shift(inb(reg), mask); + len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + return len; +} + +/* get mux_reset register value */ +static ssize_t read_mux_reset_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + int len = 0; + u16 reg = REG_MB_MUX_RESET; + u8 mask = 0b00011111; + u8 reg_val; + + mutex_lock(&lpc_data->access_lock); + reg_val=_mask_shift(inb(reg), mask); + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + len=sprintf(buf, "%d\n", reg_val); + mutex_unlock(&lpc_data->access_lock); + + return len; +} + +/* set mux_reset register value */ +static ssize_t write_mux_reset_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + u8 val = 0; + u16 reg = REG_MB_MUX_RESET; + u8 reg_val = 0; + u8 mask = 0b00011111; + static int mux_reset_flag = 0; + + if(kstrtou8(buf, 0, &val) < 0) + return -EINVAL; + + if(mux_reset_flag == 0) { + if(val == 0) { + mutex_lock(&lpc_data->access_lock); + mux_reset_flag = 1; + BSP_LOG_W("i2c mux reset is triggered..."); + + reg_val = inb(reg); + outb((reg_val & ~mask), reg); + mdelay(LPC_MDELAY); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val & ~mask); + mdelay(500); + outb((reg_val | mask), reg); + mdelay(LPC_MDELAY); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val | mask); + mdelay(500); + mux_reset_flag = 0; + mutex_unlock(&lpc_data->access_lock); + } else { + return -EINVAL; + } + } else { + BSP_LOG_W("i2c mux is resetting... (ignore)"); + mutex_lock(&lpc_data->access_lock); + mutex_unlock(&lpc_data->access_lock); + } + + return count; +} + +/* get lpc register value */ +static ssize_t read_lpc_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + + switch(attr->index) { + //CPU CPLD + case ATT_CPU_CPLD_VERSION: + reg = REG_CPU_CPLD_VERSION; + break; + case ATT_CPU_BIOS_BOOT_ROM: + reg = REG_CPU_STATUS_1; + mask = 0x80; + break; + case ATT_CPU_BIOS_BOOT_CFG: + reg = REG_CPU_CTRL_1; + mask = 0x80; + break; + case ATT_CPU_CPLD_BUILD: + reg = REG_CPU_CPLD_BUILD; + break; + //MB CPLD + case ATT_MB_BRD_ID_0: + reg = REG_MB_BRD_ID_0; + break; + case ATT_MB_BRD_ID_1: + reg = REG_MB_BRD_ID_1; + break; + case ATT_MB_CPLD_1_VERSION: + reg = REG_MB_CPLD_VERSION; + break; + case ATT_MB_CPLD_1_BUILD: + reg = REG_MB_CPLD_BUILD; + break; + case ATT_MB_BRD_SKU_ID: + reg = REG_MB_BRD_ID_0; + mask = 0xFF; + break; + case ATT_MB_BRD_HW_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x03; + break; + case ATT_MB_BRD_ID_TYPE: + reg = REG_MB_BRD_ID_1; + mask = 0x80; + break; + case ATT_MB_BRD_BUILD_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x38; + break; + case ATT_MB_BRD_DEPH_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x04; + break; + case ATT_MB_MUX_CTRL: + reg = REG_MB_MUX_CTRL; + break; + //I2C Alert + case ATT_ALERT_STATUS: + reg = REG_ALERT_STATUS; + mask = 0x20; + break; +#if CPU_TYPE == CPU_BDE + case ATT_ALERT_DISABLE: + reg = REG_ALERT_DISABLE; + mask = 0x04; + break; +#endif + //BSP + case ATT_BSP_REG: + if(kstrtou16(bsp_reg, 0, ®) < 0) + return -EINVAL; + break; + default: + return -EINVAL; + } + return read_lpc_reg(reg, mask, buf); +} + +/* set lpc register value */ +static ssize_t write_lpc_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + + switch(attr->index) { + case ATT_MB_MUX_CTRL: + reg = REG_MB_MUX_CTRL; + break; + default: + return -EINVAL; + } + return write_lpc_reg(reg, mask, buf, count); +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch(attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + u16 reg = 0; + u8 bsp_debug_u8 = 0; + + switch(attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + if(kstrtou16(buf, 0, ®) < 0) + return -EINVAL; + + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + + if(attr->index == ATT_BSP_DEBUG) { + if(kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if(_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + } + + return write_bsp(buf, str, str_len, count); +} + +static ssize_t write_bsp_pr_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len = strlen(buf); + + if(str_len <= 0) + return str_len; + + switch (attr->index) { + case ATT_BSP_PR_INFO: + BSP_PR(KERN_INFO, "%s", buf); + break; + case ATT_BSP_PR_ERR: + BSP_PR(KERN_ERR, "%s", buf); + break; + default: + return -EINVAL; + } + + return str_len; +} + +//SENSOR_DEVICE_ATTR - CPU +static SENSOR_DEVICE_ATTR(cpu_cpld_version, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_VERSION); +static SENSOR_DEVICE_ATTR(cpu_cpld_version_h, S_IRUGO, read_cpu_cpld_version_h, NULL, ATT_CPU_CPLD_VERSION_H); +static SENSOR_DEVICE_ATTR(boot_rom, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM); +static SENSOR_DEVICE_ATTR(boot_cfg, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG); +static SENSOR_DEVICE_ATTR(cpu_cpld_build, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD); +//SENSOR_DEVICE_ATTR - MB +static SENSOR_DEVICE_ATTR(board_id_0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0); +static SENSOR_DEVICE_ATTR(board_id_1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1); +static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION); +static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H); +static SENSOR_DEVICE_ATTR(mb_cpld_1_build, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD); +static SENSOR_DEVICE_ATTR(mux_ctrl, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL); +static SENSOR_DEVICE_ATTR(mux_reset, S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET); +static SENSOR_DEVICE_ATTR(board_sku_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID); +static SENSOR_DEVICE_ATTR(board_hw_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID); +static SENSOR_DEVICE_ATTR(board_id_type, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE); +static SENSOR_DEVICE_ATTR(board_build_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID); +static SENSOR_DEVICE_ATTR(board_deph_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID); +//SENSOR_DEVICE_ATTR - I2C Alert +static SENSOR_DEVICE_ATTR(alert_status, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS); +#if CPU_TYPE == CPU_BDE +static SENSOR_DEVICE_ATTR(alert_disable, S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE); +#endif +//SENSOR_DEVICE_ATTR - BSP +static SENSOR_DEVICE_ATTR(bsp_version, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION); +static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG); +static SENSOR_DEVICE_ATTR(bsp_pr_info, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_INFO); +static SENSOR_DEVICE_ATTR(bsp_pr_err, S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_ERR); +static SENSOR_DEVICE_ATTR(bsp_reg, S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG); + +static struct attribute *cpu_cpld_attrs[] = { + &sensor_dev_attr_cpu_cpld_version.dev_attr.attr, + &sensor_dev_attr_cpu_cpld_version_h.dev_attr.attr, + &sensor_dev_attr_cpu_cpld_build.dev_attr.attr, + NULL, +}; + +static struct attribute *mb_cpld_attrs[] = { + &sensor_dev_attr_board_id_0.dev_attr.attr, + &sensor_dev_attr_board_id_1.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_build.dev_attr.attr, + &sensor_dev_attr_board_sku_id.dev_attr.attr, + &sensor_dev_attr_board_hw_id.dev_attr.attr, + &sensor_dev_attr_board_id_type.dev_attr.attr, + &sensor_dev_attr_board_build_id.dev_attr.attr, + &sensor_dev_attr_board_deph_id.dev_attr.attr, + &sensor_dev_attr_mux_ctrl.dev_attr.attr, + &sensor_dev_attr_mux_reset.dev_attr.attr, + NULL, +}; + +static struct attribute *bios_attrs[] = { + &sensor_dev_attr_boot_rom.dev_attr.attr, + &sensor_dev_attr_boot_cfg.dev_attr.attr, + NULL, +}; + +static struct attribute *i2c_alert_attrs[] = { + &sensor_dev_attr_alert_status.dev_attr.attr, +#if CPU_TYPE == CPU_BDE + &sensor_dev_attr_alert_disable.dev_attr.attr, +#endif + NULL, +}; + +static struct attribute *bsp_attrs[] = { + &sensor_dev_attr_bsp_version.dev_attr.attr, + &sensor_dev_attr_bsp_debug.dev_attr.attr, + &sensor_dev_attr_bsp_pr_info.dev_attr.attr, + &sensor_dev_attr_bsp_pr_err.dev_attr.attr, + &sensor_dev_attr_bsp_reg.dev_attr.attr, + NULL, +}; + +static struct attribute_group cpu_cpld_attr_grp = { + .name = "cpu_cpld", + .attrs = cpu_cpld_attrs, +}; + +static struct attribute_group mb_cpld_attr_grp = { + .name = "mb_cpld", + .attrs = mb_cpld_attrs, +}; + +static struct attribute_group bios_attr_grp = { + .name = "bios", + .attrs = bios_attrs, +}; + +static struct attribute_group i2c_alert_attr_grp = { + .name = "i2c_alert", + .attrs = i2c_alert_attrs, +}; + +static struct attribute_group bsp_attr_grp = { + .name = "bsp", + .attrs = bsp_attrs, +}; + +static void lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .dev = { + .release = lpc_dev_release, + } +}; + +static int lpc_drv_probe(struct platform_device *pdev) +{ + int i = 0, grp_num = 5; + int err[5] = {0}; + struct attribute_group *grp; + + lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s), + GFP_KERNEL); + if(!lpc_data) + return -ENOMEM; + + mutex_init(&lpc_data->access_lock); + + for (i=0; idev.kobj, grp); + if(err[i]) { + printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name); + goto exit; + } else { + continue; + } + } + + return 0; + +exit: + for (i=0; idev.kobj, grp); + if(!err[i]) { + //remove previous successful cases + continue; + } else { + //remove first failed case, then return + return err[i]; + } + } + return 0; +} + +static int lpc_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &cpu_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bios_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &i2c_alert_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp); + + return 0; +} + +static struct platform_driver lpc_drv = { + .probe = lpc_drv_probe, + .remove = __exit_p(lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int lpc_init(void) +{ + int err = 0; + + err = platform_driver_register(&lpc_drv); + if(err) { + printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", + __func__, __LINE__, err); + + return err; + } + + err = platform_device_register(&lpc_dev); + if(err) { + printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", + __func__, __LINE__, err); + platform_driver_unregister(&lpc_drv); + return err; + } + + return err; +} + +void lpc_exit(void) +{ + platform_driver_unregister(&lpc_drv); + platform_device_unregister(&lpc_dev); +} + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("x86_64_ufispace_s9301_32db_lpc driver"); +MODULE_LICENSE("GPL"); + +module_init(lpc_init); +module_exit(lpc_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-sys-eeprom.c new file mode 100644 index 000000000000..3fa3ae4c9681 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-sys-eeprom.c @@ -0,0 +1,283 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include + +#define _memset(s, c, n) memset(s, c, n) + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void sys_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + sys_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute sys_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = sys_eeprom_read, + .write = sys_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int sys_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); +#else + _memset(data->data, 0xff, EEPROM_SIZE); +#endif + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int +#else +static void +#endif +sys_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); + kfree(i2c_get_clientdata(client)); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#endif +} + +static const struct i2c_device_id sys_eeprom_id[] = { + { "sys_eeprom", 0 }, + { } +}; + +static struct i2c_driver sys_eeprom_driver = { + .driver = { + .name = "sys_eeprom", + }, + .probe = sys_eeprom_probe, + .remove = sys_eeprom_remove, + .id_table = sys_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = sys_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(sys_eeprom_driver); + +MODULE_AUTHOR("Wade "); +MODULE_DESCRIPTION("UfiSpace Mother Board EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/service/pddf-platform-init.service new file mode 100644 index 000000000000..41fa67214fc8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/service/pddf-platform-init.service @@ -0,0 +1,14 @@ +[Unit] +Description=PDDF module and device initialization service +Before=pmon.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStartPre=-/usr/local/bin/pre_pddf_init.sh +ExecStart=/usr/local/bin/pddf_util.py install +ExecStop=/usr/local/bin/pddf_util.py clean +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/__init__.py new file mode 100644 index 000000000000..593867d31c9d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"] +from . import platform + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/chassis.py new file mode 100644 index 000000000000..6c77e2424b89 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/chassis.py @@ -0,0 +1,189 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import time + from sonic_platform_pddf_base.pddf_chassis import PddfChassis + from sonic_py_common import device_info +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_COMPONENT = 5 + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + + port_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._initialize_components() + + def _initialize_components(self): + from sonic_platform.component import Component + for index in range(NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + return self._eeprom.platform_name_str() + + def initizalize_system_led(self): + return True + + def get_status_led(self): + return self.get_system_led("SYS_LED") + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + -------------------------------------------------------------------- + Ex. 'sfp':{'11':'0', '12':'1'}, + Indicates that: + sfp 11 has been removed, sfp 12 has been inserted. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + + change_event_dict = {"sfp": {}} + + start_time = time.time() + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_change_event:Invalid timeout value", timeout) + return False, change_event_dict + + end_time = start_time + timeout + if start_time > end_time: + print( + "get_change_event:" "time wrap / invalid timeout value", + timeout, + ) + return False, change_event_dict # Time wrap or possibly incorrect timeout + try: + while timeout >= 0: + # check for sfp + sfp_change_dict = self.get_transceiver_change_event() + + if sfp_change_dict: + change_event_dict["sfp"] = sfp_change_dict + return True, change_event_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, change_event_dict + except Exception as e: + print(e) + print("get_change_event: Should not reach here.") + return False, change_event_dict + + def get_transceiver_change_event(self, timeout=0): + current_port_dict = {} + ret_dict = {} + + # Check for OIR events and return ret_dict + for index in range(self.platform_inventory['num_ports']): + if self._sfp_list[index].get_presence(): + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['inserted'] + else: + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['removed'] + + if len(self.port_dict) == 0: # first time + self.port_dict = current_port_dict + return {} + + if current_port_dict == self.port_dict: + return {} + + # Update reg value + for index, status in current_port_dict.items(): + if self.port_dict[index] != status: + ret_dict[index] = status + #ret_dict[str(index)] = status + self.port_dict = current_port_dict + for index, status in ret_dict.items(): + if int(status) == 1: + pass + #self._sfp_list[int(index)].check_sfp_optoe_type() + return ret_dict + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file'] + + try: + with open(reboot_cause_path, 'r', errors='replace') as fd: + data = fd.read() + sw_reboot_cause = data.strip() + except IOError: + sw_reboot_cause = "Unknown" + + return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this + chassis. + """ + + return self.get_serial() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/component.py new file mode 100644 index 000000000000..b94a10d616d6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/component.py @@ -0,0 +1,131 @@ +############################################################################# +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +try: + import subprocess + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +CPLD_SYSFS = { + "CPLD1": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld1_version", + "CPLD2": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_version", + "CPLD3": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_version", +} + +BMC_CMDS = { + "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'", +} + +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" +COMPONENT_LIST= [ + ("CPLD1", "CPLD 1"), + ("CPLD2", "CPLD 2"), + ("CPLD3", "CPLD 3"), + ("BIOS", "Basic Input/Output System"), + ("BMC", "BMC"), + +] + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index=0): + self.index = component_index + self.name = self.get_name() + + def _run_command(self, command): + # Run bash command and print output to stdout + try: + process = subprocess.Popen( + shlex.split(command), stdout=subprocess.PIPE) + while True: + output = process.stdout.readline() + if output == '' and process.poll() is not None: + break + rc = process.poll() + if rc != 0: + return False + except Exception: + return False + return True + + def _get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def _get_cpld_version(self): + # Retrieves the CPLD firmware version + cpld_version = dict() + for cpld_name in CPLD_SYSFS: + cmd = "cat {}".format(CPLD_SYSFS[cpld_name]) + status, value = subprocess.getstatusoutput(cmd) + if not status: + cpld_version_raw = value.rstrip() + cpld_version_int = int(cpld_version_raw,16) + cpld_version[cpld_name] = "{}.{:02d}".format(cpld_version_int >> 6, + cpld_version_int & 0b00111111) + + return cpld_version + + def _get_bmc_version(self): + # Retrieves the BMC firmware version + status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"]) + if not status: + return value + else: + return None + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][0] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_LIST[self.index][1] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self._get_bios_version() + elif "CPLD" in self.name: + cpld_version = self._get_cpld_version() + fw_version = cpld_version.get(self.name) + elif self.name == "BMC": + fw_version = self._get_bmc_version() + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/eeprom.py new file mode 100644 index 000000000000..90ab1c779a48 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(PddfEeprom): + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def platform_name_str(self): + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan.py new file mode 100644 index 000000000000..3082de54a140 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan.py @@ -0,0 +1,172 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed_percentage = 0 + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED']) + else: + if self.fan_index == 1: + pos = "f" + max_speed = int(self.plugin_data['FAN']['FAN_F_MAX_SPEED']) + else: + pos = "r" + max_speed = int(self.plugin_data['FAN']['FAN_R_MAX_SPEED']) + attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return speed_percentage + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return speed_percentage + else: + speed = int(float(output['status'])) + + speed_percentage = round((speed*100)/max_speed) + + return min(speed_percentage, 100) + + def get_speed_rpm(self): + """ + Retrieves the speed of fan in RPM + + Returns: + An integer, Speed of fan in RPM + """ + rpm_speed = 0 + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + else: + if self.fan_index == 1: + pos = "f" + else: + pos = "r" + attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + + if output is None: + return rpm_speed + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return rpm_speed + else: + rpm_speed = int(float(output['status'])) + + return rpm_speed + + def get_direction(self): + """ + Retrieves the direction of fan + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = self.FAN_DIRECTION_INTAKE + if self.is_psu_fan: + attr = "psu_fan{}_dir".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + else: + attr = "fan{}_dir".format(self.fantray_index) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return direction + + mode = output['mode'] + val = output['status'].strip() + vmap = self.plugin_data['FAN']['direction'][mode]['valmap'] + + if val in vmap: + direction = vmap[val] + + return direction + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + presence = False + if self.is_psu_fan: + attr = "psu_present" + device = "PSU{}".format(self.fans_psu_index) + else: + attr = "fan{}_present".format(self.fantray_index) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return presence + + + mode = output['mode'] + val = output['status'].strip() + + if self.is_psu_fan: + vmap = self.plugin_data['PSU']['psu_present'][mode]['valmap'] + else: + vmap = self.plugin_data['FAN']['present'][mode]['valmap'] + + if val in vmap: + presence = vmap[val] + + return presence + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + return self.get_speed() + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + + print("Setting Fan speed is not allowed") + return False + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..3b9bb607f632 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan_drawer.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/platform.py similarity index 58% rename from platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/watchdog.py rename to platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/platform.py index 88660b1a1faa..406b1179ae1b 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/watchdog.py +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/platform.py @@ -1,23 +1,25 @@ #!/usr/bin/env python ############################################################################# -# -# Module contains an implementation of platform specific watchdog API's +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information # ############################################################################# + try: - from sonic_platform_pddf_base.pddf_watchdog import PddfWatchdog + from sonic_platform_pddf_base.pddf_platform import PddfPlatform except ImportError as e: raise ImportError(str(e) + "- required module not found") -class Watchdog(PddfWatchdog): + +class Platform(PddfPlatform): """ - PDDF Platform-specific Chassis class + PDDF Platform-Specific Platform Class """ def __init__(self): - PddfWatchdog.__init__(self) - self.timeout= 180 + PddfPlatform.__init__(self) # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/psu.py new file mode 100644 index 000000000000..3e213415f314 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/psu.py @@ -0,0 +1,56 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + PLATFORM_PSU_CAPACITY = 1300 + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return float(self.PLATFORM_PSU_CAPACITY) + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + + # power is returned in micro watts + return round(float(self.get_voltage()*self.get_current()), 2) + + def get_capacity(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return self.get_maximum_supplied_power() + + def get_type(self): + """ + Gets the type of the PSU + + Returns: + A string, the type of PSU (AC/DC) + """ + return self.plugin_data['PSU']['DEFAULT_TYPE'] \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/sfp.py new file mode 100644 index 000000000000..c7919482f69c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/sfp.py @@ -0,0 +1,31 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_sfp import PddfSfp +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.index = index + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + + return self.SFP_STATUS_OK diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/thermal.py new file mode 100644 index 000000000000..77d6ec7ae886 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/thermal.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform_setup.py new file mode 100644 index 000000000000..3661c84a0cd6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform_setup.py @@ -0,0 +1,27 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on ufispace platform', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Leo Lin', + maintainer_email='leo.yt.lin@ufispace.com', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_device_create.sh new file mode 100755 index 000000000000..e4de7ae3669e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_device_create.sh @@ -0,0 +1,6 @@ +#!/bin/bash +#disable bmc watchdog +timeout 3 ipmitool mc watchdog off + +echo 1 > /sys/kernel/pddf/devices/sysstatus/sysstatus_data/port_led_clr_ctrl +echo "PDDF device post-create completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_driver_install.sh new file mode 100755 index 000000000000..ed2559977e42 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_driver_install.sh @@ -0,0 +1,2 @@ +#!/bin/bash +echo "PDDF driver post-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_switch_svc.py new file mode 100755 index 000000000000..f5e45045fc12 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_switch_svc.py @@ -0,0 +1,86 @@ +#!/usr/bin/env python +# Script to stop and start the respective platforms default services. +# This will be used while switching the pddf->non-pddf mode and vice versa +import commands + +def check_pddf_support(): + return True + +def stop_platform_svc(): + + ''' + status, output = commands.getstatusoutput("systemctl stop s9301-32db-platform-monitor-fan.service") + if status: + print "Stop s9301-32db-platform-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s9301-32db-platform-monitor-psu.service") + if status: + print "Stop s9301-32db-platform-psu.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s9301-32db-platform-monitor.service") + if status: + print "Stop s9301-32db-platform-init.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl disable s9301-32db-platform-monitor.service") + if status: + print "Disable s9301-32db-platform-monitor.service failed %d"%status + return False + ''' + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit") + if status: + print "platform_utility.py deinit command failed %d"%status + return False + + # HACK , stop the pddf-platform-init service if it is active + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service along with other platform serives failed %d"%status + return False + + return True + +def start_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init") + if status: + print "platform_utility.py init command failed %d"%status + return False + + ''' + status, output = commands.getstatusoutput("systemctl enable s9301-32db-platform-monitor.service") + if status: + print "Enable s9301-32db-platform-monitor.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl start s9301-32db-platform-monitor-fan.service") + if status: + print "Start s9301-32db-platform-monitor-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl start s9301-32db-platform-monitor-psu.service") + if status: + print "Start s9301-32db-platform-monitor-psu.service failed %d"%status + return False + ''' + return True + +def start_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service") + if status: + print "Start pddf-platform-init.service failed %d"%status + return False + + return True + +def stop_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service failed %d"%status + return False + + return True + diff --git a/platform/centec-arm64/sonic-platform-modules-e530/debian/control b/platform/centec-arm64/sonic-platform-modules-e530/debian/control index 595673e049f8..0c5f0da490d9 100644 --- a/platform/centec-arm64/sonic-platform-modules-e530/debian/control +++ b/platform/centec-arm64/sonic-platform-modules-e530/debian/control @@ -7,20 +7,20 @@ Standards-Version: 3.9.3 Package: platform-modules-e530-48t4x-p Architecture: arm64 -Depends: linux-image-6.1.0-11-2-arm64-unsigned +Depends: linux-image-6.1.0-22-2-arm64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-e530-24x2c Architecture: arm64 -Depends: linux-image-6.1.0-11-2-arm64-unsigned +Depends: linux-image-6.1.0-22-2-arm64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-e530-48s4x Architecture: arm64 -Depends: linux-image-6.1.0-11-2-arm64-unsigned +Depends: linux-image-6.1.0-22-2-arm64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-e530-24x2q Architecture: arm64 -Depends: linux-image-6.1.0-11-2-arm64-unsigned +Depends: linux-image-6.1.0-22-2-arm64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/centec-arm64/sonic-platform-modules-fs/debian/control b/platform/centec-arm64/sonic-platform-modules-fs/debian/control index bf84935d49f0..c691b0b582af 100755 --- a/platform/centec-arm64/sonic-platform-modules-fs/debian/control +++ b/platform/centec-arm64/sonic-platform-modules-fs/debian/control @@ -7,5 +7,5 @@ Standards-Version: 3.9.3 Package: platform-modules-s5800-48t4s Architecture: arm64 -Depends: linux-image-6.1.0-11-2-arm64-unsigned +Depends: linux-image-6.1.0-22-2-arm64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/centec-arm64/sonic_fit.its b/platform/centec-arm64/sonic_fit.its index d7158e242855..53b8dba4eced 100644 --- a/platform/centec-arm64/sonic_fit.its +++ b/platform/centec-arm64/sonic_fit.its @@ -12,7 +12,7 @@ images { kernel_ctc { description = "ARM64 Kernel"; - data = /incbin/("./vmlinuz-6.1.0-11-2-arm64"); + data = /incbin/("./vmlinuz-6.1.0-22-2-arm64"); type = "kernel"; arch = "arm64"; os = "linux"; @@ -25,7 +25,7 @@ }; initramfs { description = "initramfs"; - data = /incbin/("./initrd.img-6.1.0-11-2-arm64"); + data = /incbin/("./initrd.img-6.1.0-22-2-arm64"); type = "ramdisk"; arch = "arm64"; os = "linux"; diff --git a/platform/centec-arm64/tsingma-bsp/debian/control b/platform/centec-arm64/tsingma-bsp/debian/control index de5eab663ed3..c439be832d40 100644 --- a/platform/centec-arm64/tsingma-bsp/debian/control +++ b/platform/centec-arm64/tsingma-bsp/debian/control @@ -7,5 +7,5 @@ Standards-Version: 3.9.3 Package: tsingma-bsp Architecture: arm64 -Depends: linux-image-6.1.0-11-2-arm64-unsigned +Depends: linux-image-6.1.0-22-2-arm64-unsigned Description: kernel modules for tsingma bsp diff --git a/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install b/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install index 30757f33ec53..b27752503d12 100644 --- a/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install +++ b/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install @@ -1,17 +1,17 @@ -src/ctc5236-mc/ctc5236-mc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/pwm-ctc/pwm-ctc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/ctc5236_switch/ctc5236_switch.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/pinctrl-ctc/pinctrl-ctc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/ctc_wdt/ctc_wdt.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/ctcmac/ctcmac.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/ctcmac/ctc5236_mdio.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/ctc-phy/mars.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/i2c-ctc/i2c-ctc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/gpio-ctc/gpio-ctc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/ehci-ctc/ehci-ctc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/rtc-sd2405/rtc-sd2405.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/sdhci-ctc5236/sdhci-ctc5236.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra -src/spi-ctc-qspi/spi-ctc-qspi.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra +src/ctc5236-mc/ctc5236-mc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/pwm-ctc/pwm-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/ctc5236_switch/ctc5236_switch.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/pinctrl-ctc/pinctrl-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/ctc_wdt/ctc_wdt.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/ctcmac/ctcmac.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/ctcmac/ctc5236_mdio.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/ctc-phy/mars.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/i2c-ctc/i2c-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/gpio-ctc/gpio-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/ehci-ctc/ehci-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/rtc-sd2405/rtc-sd2405.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/sdhci-ctc5236/sdhci-ctc5236.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra +src/spi-ctc-qspi/spi-ctc-qspi.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra src/ctc-dts/e530-ctc5236.dtb /boot/ src/m2-w6010-48gt4x/m2-w6010-48gt4x-r0.dtb /boot/ src/config/fw_env.config /etc/ diff --git a/platform/centec/sonic-platform-modules-e582/debian/control b/platform/centec/sonic-platform-modules-e582/debian/control index bf1f71f245fc..529aac43d427 100644 --- a/platform/centec/sonic-platform-modules-e582/debian/control +++ b/platform/centec/sonic-platform-modules-e582/debian/control @@ -7,11 +7,11 @@ Standards-Version: 3.9.3 Package: platform-modules-e582-48x2q4z Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-e582-48x6q Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/centec/sonic-platform-modules-embedway/debian/control b/platform/centec/sonic-platform-modules-embedway/debian/control index 0b4837e027d7..c01f8f2c6d26 100644 --- a/platform/centec/sonic-platform-modules-embedway/debian/control +++ b/platform/centec/sonic-platform-modules-embedway/debian/control @@ -7,6 +7,6 @@ Standards-Version: 3.9.3 Package: platform-modules-embedway-es6220 Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/centec/sonic-platform-modules-v682/debian/control b/platform/centec/sonic-platform-modules-v682/debian/control index 5f03f277802b..b775827ab75e 100644 --- a/platform/centec/sonic-platform-modules-v682/debian/control +++ b/platform/centec/sonic-platform-modules-v682/debian/control @@ -7,15 +7,15 @@ Standards-Version: 3.9.3 Package: platform-modules-v682-48y8c-d Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-v682-48y8c Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-v682-48x8c Architecture: amd64 -Depends: linux-image-6.1.0-11-2-amd64-unsigned +Depends: linux-image-6.1.0-22-2-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini index 6c33ec6a895d..0c22272d7883 100644 --- a/platform/checkout/cisco-8000.ini +++ b/platform/checkout/cisco-8000.ini @@ -1,3 +1,3 @@ [module] repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git -ref=0.master.0.2 +ref=202405.0.4 diff --git a/platform/marvell/mrvl-prestera b/platform/marvell/mrvl-prestera index 5834b7338ff9..36fa3a3f4e31 160000 --- a/platform/marvell/mrvl-prestera +++ b/platform/marvell/mrvl-prestera @@ -1 +1 @@ -Subproject commit 5834b7338ff9ac6f03d45ab85568048be1f62199 +Subproject commit 36fa3a3f4e317d8c0c111cc74aafffce12e1546d diff --git a/platform/marvell/platform_arm64.conf b/platform/marvell/platform_arm64.conf index 51af700c4cf7..4c55dd3ae78c 100644 --- a/platform/marvell/platform_arm64.conf +++ b/platform/marvell/platform_arm64.conf @@ -9,7 +9,7 @@ VAR_LOG=512 UBOOT_FW_DEFAULT=1 kernel_addr=0x1100000 -kernel_version=6.1.0-11-2-arm64 +kernel_version=6.1.0-22-2-arm64 kernel_fname="/boot/vmlinuz-$kernel_version" initrd_fname="/boot/initrd.img-$kernel_version" fit_fname="/boot/sonic_arm64.fit" diff --git a/platform/marvell/platform_armhf.conf b/platform/marvell/platform_armhf.conf index 931cddd12a47..9c3568957914 100644 --- a/platform/marvell/platform_armhf.conf +++ b/platform/marvell/platform_armhf.conf @@ -10,8 +10,8 @@ fdt_addr=0x2800000 fdt_high=0x28fffff initrd_addr=0x2900000 -kernel_fname="/boot/vmlinuz-6.1.0-11-2-armmp" -initrd_fname="/boot/initrd.img-6.1.0-11-2-armmp" +kernel_fname="/boot/vmlinuz-6.1.0-22-2-armmp" +initrd_fname="/boot/initrd.img-6.1.0-22-2-armmp" fdt_fname="/boot/armada-385-ET6448M_4G_Nand.dtb" if [ "$install_env" = "onie" ]; then @@ -61,6 +61,15 @@ demo_mnt=/tmp FW_ENV_DEFAULT='/dev/mtd0 0x00500000 0x80000 0x100000 8' UBOOT_FW_DEFAULT=1 +defrag_file() { + echo "Defragment file: $1 (used by U-Boot)" + e4defrag $1 >/dev/null + if [ $? -ne 0 ]; then + echo "ERROR: defrag failed for $1" + exit 3 + fi +} + prepare_boot_menu() { echo "Sync up cache ..." sync @@ -100,15 +109,22 @@ prepare_boot_menu() { echo $FW_ENV_DEFAULT > /etc/fw_env.config echo "Using pre-configured uboot env" fi + + image_name=${image_dir}${kernel_fname} + initrd_name=${image_dir}${initrd_fname} + fdt_name=${image_dir}${fdt_fname} + if [ "$PLATFORM" = "armhf-nokia_ixs7215_52x-r0" ]; then FW_ENV_DEFAULT='/dev/mtd0 0x00100000 0x10000 0x10000' echo $FW_ENV_DEFAULT > /etc/fw_env.config echo "Using pre-configured uboot env for armhf-nokia_ixs7215_52x-r0" + if [ "$install_env" != "onie" ]; then + defrag_file ${demo_mnt}/${image_name} + defrag_file ${demo_mnt}/${initrd_name} + defrag_file ${demo_mnt}/${fdt_name} + fi fi - image_name=${image_dir}${kernel_fname} - initrd_name=${image_dir}${initrd_fname} - fdt_name=${image_dir}${fdt_fname} if [ "$install_env" = "onie" ]; then FW_ARG="-f" diff --git a/platform/marvell/sai.mk b/platform/marvell/sai.mk index 3a50da904b99..87bd92448d5d 100644 --- a/platform/marvell/sai.mk +++ b/platform/marvell/sai.mk @@ -2,11 +2,11 @@ BRANCH = master ifeq ($(CONFIGURED_ARCH),arm64) -MRVL_SAI_VERSION = 1.13.0-1 +MRVL_SAI_VERSION = 1.14.0-1 else ifeq ($(CONFIGURED_ARCH),armhf) -MRVL_SAI_VERSION = 1.13.0-3 +MRVL_SAI_VERSION = 1.14.0-1 else -MRVL_SAI_VERSION = 1.13.0-1 +MRVL_SAI_VERSION = 1.14.0-1 endif MRVL_SAI_URL_PREFIX = https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/$(CONFIGURED_ARCH)/sai-plugin/$(BRANCH)/ diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh b/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh index 51474c2e0ff0..68613cb8676e 100644 --- a/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh +++ b/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh @@ -5,8 +5,8 @@ # Load required kernel-mode drivers load_kernel_drivers() { echo "Loading Kernel Drivers" - sudo insmod /lib/modules/6.1.0-11-2-arm64/kernel/extra/nokia_7215_ixs_a1_cpld.ko - sudo insmod /lib/modules/6.1.0-11-2-arm64/kernel/extra/cn9130_cpu_thermal_sensor.ko + sudo insmod /lib/modules/6.1.0-22-2-arm64/kernel/extra/nokia_7215_ixs_a1_cpld.ko + sudo insmod /lib/modules/6.1.0-22-2-arm64/kernel/extra/cn9130_cpu_thermal_sensor.ko } fw_uboot_env_cfg() diff --git a/platform/marvell/sonic_fit.its b/platform/marvell/sonic_fit.its index 3208388d980e..f3ff5ac7cec1 100644 --- a/platform/marvell/sonic_fit.its +++ b/platform/marvell/sonic_fit.its @@ -7,7 +7,7 @@ images { kernel_ac5x { description = "Linux Kernel for AC5x"; - data = /incbin/("/boot/vmlinuz-6.1.0-11-2-arm64"); + data = /incbin/("/boot/vmlinuz-6.1.0-22-2-arm64"); type = "kernel"; arch = "arm64"; os = "linux"; @@ -20,7 +20,7 @@ }; fdt_ac5x { description = "Flattened Device Tree blob for AC5x"; - data = /incbin/("/usr/lib/linux-image-6.1.0-11-2-arm64/marvell/ac5-98dx35xx-rd.dtb"); + data = /incbin/("/usr/lib/linux-image-6.1.0-22-2-arm64/marvell/ac5-98dx35xx-rd.dtb"); type = "flat_dt"; arch = "arm64"; compression = "none"; @@ -31,7 +31,7 @@ }; fdt_7215_a1 { description = "Flattened Device Tree blob for 7215_IXS_A1"; - data = /incbin/("/usr/lib/linux-image-6.1.0-11-2-arm64/marvell/7215-ixs-a1.dtb"); + data = /incbin/("/usr/lib/linux-image-6.1.0-22-2-arm64/marvell/7215-ixs-a1.dtb"); type = "flat_dt"; arch = "arm64"; compression = "none"; @@ -42,7 +42,7 @@ }; ramdisk_ac5x { description = "ramdisk for AC5x"; - data = /incbin/("/boot/initrd.img-6.1.0-11-2-arm64"); + data = /incbin/("/boot/initrd.img-6.1.0-22-2-arm64"); type = "ramdisk"; arch = "arm64"; os = "linux"; @@ -55,7 +55,7 @@ }; kernel_1 { description = "Linux Kernel"; - data = /incbin/("/boot/vmlinuz-6.1.0-11-2-arm64"); + data = /incbin/("/boot/vmlinuz-6.1.0-22-2-arm64"); type = "kernel"; arch = "arm64"; os = "linux"; @@ -68,7 +68,7 @@ }; ramdisk_1 { description = "ramdisk"; - data = /incbin/("/boot/initrd.img-6.1.0-11-2-arm64"); + data = /incbin/("/boot/initrd.img-6.1.0-22-2-arm64"); type = "ramdisk"; arch = "arm64"; os = "linux"; @@ -81,7 +81,7 @@ }; kernel_2 { description = "Linux Kernel"; - data = /incbin/("/boot/vmlinuz-6.1.0-11-2-arm64"); + data = /incbin/("/boot/vmlinuz-6.1.0-22-2-arm64"); type = "kernel"; arch = "arm64"; os = "linux"; @@ -94,7 +94,7 @@ }; ramdisk_2 { description = "ramdisk"; - data = /incbin/("/boot/initrd.img-6.1.0-11-2-arm64"); + data = /incbin/("/boot/initrd.img-6.1.0-22-2-arm64"); type = "ramdisk"; arch = "arm64"; os = "linux"; diff --git a/platform/mellanox/asic_table.j2 b/platform/mellanox/asic_table.j2 index 9fa36035a657..0069c6b77dfa 100644 --- a/platform/mellanox/asic_table.j2 +++ b/platform/mellanox/asic_table.j2 @@ -49,6 +49,7 @@ 'x86_64-nvidia_sn5600-r0':'MELLANOX-SPECTRUM-4', 'x86_64-nvidia_sn5400_simx-r0':'MELLANOX-SPECTRUM-4', 'x86_64-nvidia_sn5600_simx-r0':'MELLANOX-SPECTRUM-4', + 'x86_64-nvidia_sn4280-r0':'MELLANOX-SPECTRUM-3', 'vs-platform':'vs' } %} diff --git a/platform/mellanox/cmis_host_mgmt/cmis_host_mgmt.py b/platform/mellanox/cmis_host_mgmt/cmis_host_mgmt.py new file mode 100644 index 000000000000..a1011d244b94 --- /dev/null +++ b/platform/mellanox/cmis_host_mgmt/cmis_host_mgmt.py @@ -0,0 +1,184 @@ +#!/usr/bin/env python3 +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import shutil +import click +import re +import os +import subprocess +import glob +from pathlib import Path + + +class CMISHostMgmtActivator: + PARAMS = { + "sai_profile": { + "file_name": "sai.profile", + "enabled_param": "SAI_INDEPENDENT_MODULE_MODE=1", + "disabled_param": "SAI_INDEPENDENT_MODULE_MODE=0" + }, + "pmon_daemon_control": { + "file_name": "pmon_daemon_control.json", + "enabled_param": "\"skip_xcvrd_cmis_mgr\": false", + "disabled_param": "\"skip_xcvrd_cmis_mgr\": true", + }, + "sai_xml": { + "file_name": "sai_<>.xml", # will be filled at main, since we can't know the SKU here + "enabled_param": "1", + "disabled_param": "1" # Shouldn't be called + } + } + + @staticmethod + def change_param(param, path, action): + file_path = '{}/{}'.format(path, CMISHostMgmtActivator.PARAMS[param]["file_name"]) + lines = None + + try: + with open(file_path, 'r') as param_file: + lines = param_file.read() + + if lines: + if action == "disable": + lines = re.sub(CMISHostMgmtActivator.PARAMS[param]["enabled_param"], + CMISHostMgmtActivator.PARAMS[param]["disabled_param"], + lines) + elif action == "enable": + if param == "sai_profile" and not re.search(CMISHostMgmtActivator.PARAMS[param]["disabled_param"], lines): + if not re.search(CMISHostMgmtActivator.PARAMS[param]["enabled_param"], lines): + with open(file_path, 'a') as param_file: + param_file.write(CMISHostMgmtActivator.PARAMS[param]["enabled_param"] + '\n') + return + + lines = re.sub(CMISHostMgmtActivator.PARAMS[param]["disabled_param"], + CMISHostMgmtActivator.PARAMS[param]["enabled_param"], + lines) + + with open(file_path, 'w') as param_file: + param_file.write(lines) + + except FileNotFoundError as e: + print('Missing file: {}'.format(e.filename)) + + + @staticmethod + def parse_show_platform_summary(): + summary = subprocess.check_output(['show', 'platform', 'summary']) + summary = summary.decode('utf-8') + summary = [x for x in summary.split('\n') if x] + + for field in summary: + key, value = field.split(": ") + + if key == 'Platform': + platform = value + + elif key == 'HwSKU': + sku = value + + return platform, sku + + + @staticmethod + def remove_file(file_path): + if os.path.isfile(file_path): + os.remove(file_path) + + + @staticmethod + def copy_file(src_path, dest_path): + if os.path.isfile(src_path): + shutil.copy(src_path, dest_path) + + + @staticmethod + def is_spc_supported(spc): + return int(spc) >= 4000 + + @staticmethod + def disable(): + platform, sku = CMISHostMgmtActivator.parse_show_platform_summary() + sku_path = '/usr/share/sonic/device/{0}/{1}'.format(platform, sku) + platform_path = '/usr/share/sonic/device/{0}'.format(platform) + CMISHostMgmtActivator.change_param("sai_profile", sku_path, 'disable') + + if os.path.isfile('{0}/{1}'.format(platform_path, 'pmon_daemon_control.json')): + CMISHostMgmtActivator.change_param("pmon_daemon_control", platform_path, 'disable') + CMISHostMgmtActivator.remove_file('{0}/{1}'.format(sku_path, 'pmon_daemon_control.json')) + else: + CMISHostMgmtActivator.change_param("pmon_daemon_control", sku_path, 'disable') + + CMISHostMgmtActivator.remove_file('{0}/{1}'.format(sku_path, 'media_settings.json')) + CMISHostMgmtActivator.remove_file('{0}/{1}'.format(sku_path,'optics_si_settings.json')) + CMISHostMgmtActivator.remove_file('{0}/{1}'.format(platform_path, 'media_settings.json')) + CMISHostMgmtActivator.remove_file('{0}/{1}'.format(platform_path, 'optics_si_settings.json')) + + + @staticmethod + def enable(args): + platform, sku = CMISHostMgmtActivator.parse_show_platform_summary() + sku_path = '/usr/share/sonic/device/{0}/{1}'.format(platform, sku) + platform_path = '/usr/share/sonic/device/{0}'.format(platform) + + sku_num = re.search('[0-9]{4}', sku).group() + + if not CMISHostMgmtActivator.is_spc_supported(sku_num): + print("Error: unsupported platform - feature is supported on SPC3 and higher.") + + sai_profile_file = '{}/{}'.format(sku_path, CMISHostMgmtActivator.PARAMS["sai_profile"]["file_name"]) + lines = None + with open(sai_profile_file, 'r') as saiprofile: + lines = saiprofile.read() + + sai_xml_path = re.search("SAI_INIT_CONFIG_FILE.*", lines).group() + + if sai_xml_path: + sai_xml_name = Path(sai_xml_path).name + CMISHostMgmtActivator.PARAMS["sai_xml"]["file_name"] = sai_xml_name + else: + print("Error: no sai_*.xml file present") + + CMISHostMgmtActivator.copy_file(args[0], sku_path) + CMISHostMgmtActivator.copy_file(args[1], sku_path) + CMISHostMgmtActivator.copy_file('{0}/{1}'.format(platform_path, 'pmon_daemon_control.json'), sku_path) + + CMISHostMgmtActivator.change_param("sai_profile", sku_path, 'enable') + CMISHostMgmtActivator.change_param("pmon_daemon_control", sku_path, 'enable') + CMISHostMgmtActivator.change_param("sai_xml", sku_path, 'enable') + + +@click.command() +@click.option('--disable', is_flag=True, help='Disable CMIS Host Management') +@click.option('--enable', nargs=2, type=click.Path(), help='Enable CMIS Host Management, receives two arguments: media_settings.json path, and optics_si_settings.json path') +def main(disable, enable): + + if disable and enable: + print("Error: can't use both options, please choose one.") + return + + if disable: + CMISHostMgmtActivator.disable() + + elif enable: + CMISHostMgmtActivator.enable(enable) + + else: + print("Error: no option was provided - nothing to execute.") + +if __name__ == '__main__': + main() diff --git a/platform/mellanox/component-versions/Makefile b/platform/mellanox/component-versions/Makefile index 6a240bd02e53..095aad7902a7 100644 --- a/platform/mellanox/component-versions/Makefile +++ b/platform/mellanox/component-versions/Makefile @@ -22,5 +22,5 @@ SHELL = /bin/bash MAIN_TARGET = component-versions $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : - ./create_component_versions.sh $(MLNX_SDK_VERSION) $(MLNX_SPC_FW_VERSION) $(MLNX_SAI_VERSION) $(MLNX_HW_MANAGEMENT_VERSION) $(MFT_VERSION) $(MFT_REVISION) $(KVERSION_SHORT) + ./create_component_versions.sh $(MLNX_SDK_VERSION) $(MLNX_SPC_FW_VERSION) $(MLNX_SAI_VERSION) $(MLNX_HW_MANAGEMENT_VERSION) $(MFT_VERSION) $(MFT_REVISION) $(KVERSION_SHORT) $(SIMX_VERSION) mv temp_versions_file $(DEST)/$(MAIN_TARGET) diff --git a/platform/mellanox/component-versions/create_component_versions.sh b/platform/mellanox/component-versions/create_component_versions.sh index 109242de9a0e..b523c0308d85 100755 --- a/platform/mellanox/component-versions/create_component_versions.sh +++ b/platform/mellanox/component-versions/create_component_versions.sh @@ -18,6 +18,7 @@ echo "SDK $1" > temp_versions_file echo $2 | sed -r 's/([0-9]*)\.([0-9]*)\.([0-9]*)/FW \2\.\3/g' >> temp_versions_file echo "SAI $3" >> temp_versions_file -echo "HW-MGMT $4" >> temp_versions_file +echo "HW_MANAGEMENT $4" >> temp_versions_file echo "MFT $5-$6" >> temp_versions_file -echo "Kernel $7" >> temp_versions_file +echo "KERNEL $7" >> temp_versions_file +echo "SIMX $8" >> temp_versions_file diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk index 62014478b3f2..1e7d02b9924e 100644 --- a/platform/mellanox/fw.mk +++ b/platform/mellanox/fw.mk @@ -21,33 +21,33 @@ MLNX_FW_BASE_PATH = $(MLNX_SDK_BASE_PATH) # Place an URL here to FW if you want to download FW instead MLNX_FW_BASE_URL = -SIMX_VERSION = 24.4-1091 +SIMX_VERSION = 24.4-1098 FW_FROM_URL = y -MLNX_FW_ASSETS_RELEASE_TAG = fw-2012.4062 +MLNX_FW_ASSETS_RELEASE_TAG = fw-2012.4082 MLNX_FW_ASSETS_URL = $(MLNX_ASSETS_GITHUB_URL)/releases/download/$(MLNX_FW_ASSETS_RELEASE_TAG) ifeq ($(MLNX_FW_BASE_URL), ) MLNX_FW_BASE_URL = $(MLNX_FW_ASSETS_URL) endif -MLNX_SPC_FW_VERSION = 13.2012.4062 +MLNX_SPC_FW_VERSION = 13.2012.4082 MLNX_SPC_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_SPC_FW_VERSION))-EVB.mfa $(MLNX_SPC_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC_FW_FILE) -MLNX_SPC2_FW_VERSION = 29.2012.4062 +MLNX_SPC2_FW_VERSION = 29.2012.4082 MLNX_SPC2_FW_FILE = fw-SPC2-rel-$(subst .,_,$(MLNX_SPC2_FW_VERSION))-EVB.mfa $(MLNX_SPC2_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC2_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC2_FW_FILE) -MLNX_SPC3_FW_VERSION = 30.2012.4062 +MLNX_SPC3_FW_VERSION = 30.2012.4082 MLNX_SPC3_FW_FILE = fw-SPC3-rel-$(subst .,_,$(MLNX_SPC3_FW_VERSION))-EVB.mfa $(MLNX_SPC3_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC3_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC3_FW_FILE) -MLNX_SPC4_FW_VERSION = 34.2012.4062 +MLNX_SPC4_FW_VERSION = 34.2012.4082 MLNX_SPC4_FW_FILE = fw-SPC4-rel-$(subst .,_,$(MLNX_SPC4_FW_VERSION))-EVB.mfa $(MLNX_SPC4_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC4_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC4_FW_FILE) @@ -63,6 +63,7 @@ endif MLNX_FILES += $(MLNX_FW_FILES) export MLNX_SPC_FW_VERSION MLNX_SPC2_FW_VERSION MLNX_SPC3_FW_VERSION MLNX_SPC4_FW_VERSION +export SIMX_VERSION export MLNX_SPC_FW_FILE export MLNX_SPC2_FW_FILE export MLNX_SPC3_FW_FILE diff --git a/platform/mellanox/get_component_versions/get_component_versions.py b/platform/mellanox/get_component_versions/get_component_versions.py index 8e900eb0ca08..ba75bd8a215b 100644 --- a/platform/mellanox/get_component_versions/get_component_versions.py +++ b/platform/mellanox/get_component_versions/get_component_versions.py @@ -20,22 +20,28 @@ import subprocess import re -from fwutil.lib import PlatformDataProvider +try: + from fwutil.lib import PlatformDataProvider +except Exception: + PlatformDataProvider = None + from sonic_py_common.general import check_output_pipe +from sonic_platform.device_data import DeviceDataManager from tabulate import tabulate COMPONENT_VERSIONS_FILE = "/etc/mlnx/component-versions" HEADERS = ["COMPONENT", "COMPILATION", "ACTUAL"] COMMANDS_FOR_ACTUAL = { "MFT": [["dpkg", "-l"], ["grep", "mft "], "mft *([0-9.-]*)"], - "HW-MGMT": [["dpkg", "-l"], ["grep", "hw"], ".*1\\.mlnx\\.([0-9.]*)"], + "HW_MANAGEMENT": [["dpkg", "-l"], ["grep", "hw"], ".*1\\.mlnx\\.([0-9.]*)"], "SDK": [["docker", "exec", "-it", "syncd", "bash", "-c", 'dpkg -l | grep sdk'], ".*1\\.mlnx\\.([0-9.]*)"], "SAI": [["docker", "exec", "-it", "syncd", "bash", "-c", 'dpkg -l | grep mlnx-sai'], ".*1\\.mlnx\\.([A-Za-z0-9.]*)"], "FW": [["mlxfwmanager", "--query"], "FW * [0-9]{2}\\.([0-9.]*)"], - "Kernel": [["uname", "-r"], "([0-9][0-9.-]*)-.*"] + "KERNEL": [["uname", "-r"], "([0-9][0-9.-]*)-.*"] } UNAVAILABLE_PLATFORM_VERSIONS = { + "ONIE": "N/A", "SSD": "N/A", "BIOS": "N/A", "CPLD": "N/A" @@ -45,9 +51,9 @@ "SDK": "N/A", "FW": "N/A", "SAI": "N/A", - "HW-MGMT": "N/A", + "HW_MANAGEMENT": "N/A", "MFT": "N/A", - "Kernel": "N/A" + "KERNEL": "N/A" } @@ -59,15 +65,21 @@ def parse_compiled_components_file(): with open(COMPONENT_VERSIONS_FILE, 'r') as component_versions: for line in component_versions.readlines(): - comp, version = line.split() - compiled_versions[comp] = version + try: + comp, version = line.split() + compiled_versions[comp] = version + except ValueError: + continue return compiled_versions def get_platform_component_versions(): - pdp = PlatformDataProvider() - ccm = pdp.chassis_component_map + ccm = None + + if PlatformDataProvider: + pdp = PlatformDataProvider() + ccm = pdp.chassis_component_map if not ccm: return UNAVAILABLE_PLATFORM_VERSIONS @@ -91,15 +103,18 @@ def get_platform_component_versions(): def get_current_version(comp): version = "" - # If there's only one command - if len(COMMANDS_FOR_ACTUAL[comp]) == 2: - version = subprocess.run(COMMANDS_FOR_ACTUAL[comp][0], shell=False, stdout=subprocess.PIPE, text=True) - version = str(version.stdout) - #If there are two commands and we need a pipe - elif len(COMMANDS_FOR_ACTUAL[comp]) == 3: - version = check_output_pipe(COMMANDS_FOR_ACTUAL[comp][0], COMMANDS_FOR_ACTUAL[comp][1]) - parsed_version = re.search(COMMANDS_FOR_ACTUAL[comp][-1], version) - return parsed_version.group(1) if parsed_version else "N/A" + try: + # If there's only one command + if len(COMMANDS_FOR_ACTUAL[comp]) == 2: + version = subprocess.run(COMMANDS_FOR_ACTUAL[comp][0], shell=False, stdout=subprocess.PIPE, text=True) + version = str(version.stdout) + #If there are two commands and we need a pipe + elif len(COMMANDS_FOR_ACTUAL[comp]) == 3: + version = check_output_pipe(COMMANDS_FOR_ACTUAL[comp][0], COMMANDS_FOR_ACTUAL[comp][1]) + parsed_version = re.search(COMMANDS_FOR_ACTUAL[comp][-1], version) + return parsed_version.group(1) if parsed_version else "N/A" + except Exception: + return "N/A" def format_output_table(table): @@ -113,13 +128,23 @@ def main(): return compiled_versions = parse_compiled_components_file() - platform_versions = get_platform_component_versions() + simx_compiled_ver = compiled_versions.pop("SIMX") + # Add compiled versions to table output_table = [] for comp in compiled_versions.keys(): actual = get_current_version(comp) output_table.append([comp, compiled_versions[comp], actual]) + # Handle if SIMX + if DeviceDataManager.is_simx_platform(): + simx_actual_ver = DeviceDataManager.get_simx_version() + output_table.append(["SIMX", simx_compiled_ver, simx_actual_ver]) + platform_versions = UNAVAILABLE_PLATFORM_VERSIONS + else: + platform_versions = get_platform_component_versions() + + # Add actual versions to table for comp in platform_versions.keys(): output_table.append([comp, "-", platform_versions[comp]]) diff --git a/platform/mellanox/hw-management.mk b/platform/mellanox/hw-management.mk index 9664435a146d..cab5e2ecf7df 100644 --- a/platform/mellanox/hw-management.mk +++ b/platform/mellanox/hw-management.mk @@ -16,7 +16,7 @@ # # Mellanox HW Management -MLNX_HW_MANAGEMENT_VERSION = 7.0030.4003 +MLNX_HW_MANAGEMENT_VERSION = 7.0040.1008 export MLNX_HW_MANAGEMENT_VERSION diff --git a/platform/mellanox/hw-management/Makefile b/platform/mellanox/hw-management/Makefile index 3ada49920413..a42bcdfeafb7 100644 --- a/platform/mellanox/hw-management/Makefile +++ b/platform/mellanox/hw-management/Makefile @@ -9,7 +9,7 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : git stash git apply -3 ../*.patch || exit 1 chmod +x ./debian/rules - KVERSION=$(KVERSION) dpkg-buildpackage -us -uc -b -rfakeroot -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) + KVERSION=$(KVERSION) LM_DEPENDS=0 dpkg-buildpackage -us -uc -b -rfakeroot -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) popd mv $* $(DEST)/ diff --git a/platform/mellanox/hw-management/hw-mgmt b/platform/mellanox/hw-management/hw-mgmt index 6cf13ac6000a..cc3c0e00e8e0 160000 --- a/platform/mellanox/hw-management/hw-mgmt +++ b/platform/mellanox/hw-management/hw-mgmt @@ -1 +1 @@ -Subproject commit 6cf13ac6000ad7be68ef9b6b25261bbb0fd5d5a5 +Subproject commit cc3c0e00e8e03bf2edcffaaf356777292ad8d22b diff --git a/platform/mellanox/minirc.dfl b/platform/mellanox/minirc.dfl new file mode 100644 index 000000000000..193cf47d9f39 --- /dev/null +++ b/platform/mellanox/minirc.dfl @@ -0,0 +1,2 @@ +# Machine-generated file - use "minicom -s" to change parameters. +pu rtscts No diff --git a/platform/mellanox/mlnx-fw-upgrade.j2 b/platform/mellanox/mlnx-fw-upgrade.j2 index e4c567c1b76e..6bfea7762070 100755 --- a/platform/mellanox/mlnx-fw-upgrade.j2 +++ b/platform/mellanox/mlnx-fw-upgrade.j2 @@ -36,6 +36,7 @@ declare -r VERBOSE_MIN="${VERBOSE_ERROR}" declare -r EXIT_SUCCESS="0" declare -r EXIT_FAILURE="1" declare -r FW_ALREADY_UPDATED_FAILURE="2" +declare -r FW_UPGRADE_IS_REQUIRED="10" declare -r QUERY_XML="mlxfwmanager --query-format XML" declare -r QUERY_CMD="mlxfwmanager --query" @@ -49,6 +50,7 @@ declare -r SPC1_ASIC="spc1" declare -r SPC2_ASIC="spc2" declare -r SPC3_ASIC="spc3" declare -r SPC4_ASIC="spc4" +declare -r BF3_NIC="bf3" declare -r UNKN_ASIC="unknown" declare -r UNKN_MST="unknown" @@ -57,8 +59,10 @@ declare -rA FW_FILE_MAP=( \ [$SPC2_ASIC]="fw-SPC2.mfa" \ [$SPC3_ASIC]="fw-SPC3.mfa" \ [$SPC4_ASIC]="fw-SPC4.mfa" \ + [$BF3_NIC]="fw-BF3.mfa" \ ) +DRY_RUN="${NO_PARAM}" IMAGE_UPGRADE="${NO_PARAM}" SYSLOG_LOGGER="${NO_PARAM}" VERBOSE_LEVEL="${VERBOSE_MIN}" @@ -72,6 +76,7 @@ function PrintHelp() { echo " -u, --upgrade Upgrade ASIC firmware using next boot image (useful after SONiC-To-SONiC update)" echo " -s, --syslog Use syslog logger (enabled when -u|--upgrade)" echo " -v, --verbose Verbose mode (enabled when -u|--upgrade)" + echo " -d, --dry-run Compare the FW versions without installation. Return code "0" means the FW is up-to-date, return code "10" means an upgrade is required, otherwise an error is detected." echo " -h, --help Print help" echo echo "Examples:" @@ -95,6 +100,9 @@ function ParseArguments() { -s|--syslog) SYSLOG_LOGGER="${YES_PARAM}" ;; + -d|--dry-run) + DRY_RUN="${YES_PARAM}" + ;; -h|--help) PrintHelp exit "${EXIT_SUCCESS}" @@ -179,9 +187,29 @@ function UnlockStateChange() { /usr/bin/flock -u ${LOCKFD} } +function GetMstDeviceType() { + local -r asic_type=$(GetAsicType) + + case $asic_type in + ${SPC1_ASIC}|${SPC2_ASIC}|${SPC3_ASIC}|${SPC4_ASIC}) + echo "Spectrum" + return ${EXIT_SUCCESS} + ;; + ${BF3_NIC}) + echo "BlueField3" + return ${EXIT_SUCCESS} + ;; + *) + echo "Unknown" + return ${EXIT_FAILURE} + ;; + esac +} + function WaitForDevice() { local -i QUERY_RETRY_COUNT_MAX="10" local -i QUERY_RETRY_COUNT="0" + local -r DEVICE_TYPE=$(GetMstDeviceType) local SPC_MST_DEV=$(GetSPCMstDevice) @@ -198,7 +226,7 @@ function WaitForDevice() { ExitFailure "FW Query command: ${QUERY_CMD} failed to detect spectrum device with error: ${failure_msg}" fi - LogInfo "Spectrum ASIC successfully detected at ${SPC_MST_DEV}" + LogInfo "${DEVICE_TYPE} ASIC successfully detected at ${SPC_MST_DEV}" } function GetAsicType() { @@ -208,6 +236,7 @@ function GetAsicType() { local -r SPC2_PRODUCT_ID="cf6c" local -r SPC3_PRODUCT_ID="cf70" local -r SPC4_PRODUCT_ID="cf80" + local -r BF3_PRODUCT_ID="a2dc" if lspci -n | grep "${VENDOR_ID}:${SPC1_PRODUCT_ID}" &>/dev/null; then echo "${SPC1_ASIC}" @@ -221,6 +250,9 @@ function GetAsicType() { elif lspci -n | grep "${VENDOR_ID}:${SPC4_PRODUCT_ID}" &>/dev/null; then echo "${SPC4_ASIC}" exit "${EXIT_SUCCESS}" + elif lspci -n | grep "${VENDOR_ID}:${BF3_PRODUCT_ID}" &>/dev/null; then + echo "${BF3_NIC}" + exit "${EXIT_SUCCESS}" fi echo "${UNKN_ASIC}" @@ -228,7 +260,8 @@ function GetAsicType() { } function GetSPCMstDevice() { - local _MST_DEVICE=$(${QUERY_XML} | xmlstarlet sel -t -m "//Device[contains(@type,'Spectrum')]" -v @pciName | head -n 1) + local _DEVICE_TYPE=$(GetMstDeviceType) + local _MST_DEVICE=$(${QUERY_XML} | xmlstarlet sel -t -m "//Device[contains(@type,'${_DEVICE_TYPE}')]" -v @pciName | head -n 1) if [[ ! -c "${_MST_DEVICE}" ]]; then echo "${UNKN_MST}" @@ -267,6 +300,8 @@ function RunCmd() { fi } +{% if sonic_asic_platform == "mellanox" %} + function RunFwUpdateCmd() { local ERROR_CODE="${EXIT_SUCCESS}" local COMMAND="${MFT_DIAGNOSIS_FLAGS} ${BURN_CMD} $@" @@ -301,6 +336,56 @@ function RunFwUpdateCmd() { fi } +function GetAvailableFwVersion() { + local -r _FW_FILE="$1" + local -r _MST_DEVICE="$2" + local -r _PSID="$3" + + RunCmd "${LIST_CONTENT_CMD} -i ${_FW_FILE} -d ${_MST_DEVICE} -o ${LIST_CONTENT_FILE}" + + local -r _FW_AVAILABLE_INFO="$(grep ${_PSID} ${LIST_CONTENT_FILE})" + local -r _FW_AVAILABLE="$(echo ${_FW_AVAILABLE_INFO} | awk '{print $4}')" + + echo ${_FW_AVAILABLE} +} + +{% elif sonic_asic_platform == "nvidia-bluefield" %} + +function RunFwUpdateCmd() { + local ERROR_CODE="${EXIT_SUCCESS}" + local -r _MST_DEVICE="$(GetSPCMstDevice)" + + # Reactivate FW prior to burning... + eval "flint -d ${_MST_DEVICE} ir" 2>&1 >/dev/null + + local COMMAND="${MFT_DIAGNOSIS_FLAGS} flint $@ burn" + + output=$(eval "${COMMAND}") + + ERROR_CODE="$?" + + if [[ "${ERROR_CODE}" != "${EXIT_SUCCESS}" ]]; then + echo "${output}" + failure_msg="${output#*Fail : }" + ExitFailure "FW Update command: ${COMMAND} failed with error: ${failure_msg}" + fi +} + +function GetAvailableFwVersion() { + local -r _FW_FILE="$1" + local -r _MST_DEVICE="$2" + local -r _PSID="$3" + + RunCmd "flint -i ${_FW_FILE} --psid ${_PSID} query 2>&1 > ${LIST_CONTENT_FILE}" + + local -r _FW_AVAILABLE_INFO="$(grep 'FW Version:' ${LIST_CONTENT_FILE})" + local -r _FW_AVAILABLE="$(echo ${_FW_AVAILABLE_INFO} | awk '{print $3}')" + + echo ${_FW_AVAILABLE} +} + +{% endif %} + function UpgradeFW() { local -r _FW_BIN_PATH="$1" @@ -323,10 +408,7 @@ function UpgradeFW() { RunCmd "${QUERY_XML} -d ${_MST_DEVICE} -o ${QUERY_FILE}" local -r _FW_CURRENT=$(GetXPathXML "//Device/Versions/FW/@current" ${QUERY_FILE}) local -r _PSID=$(GetXPathXML "//Device/@psid" ${QUERY_FILE}) - - RunCmd "${LIST_CONTENT_CMD} -i ${_FW_FILE} -d ${_MST_DEVICE} -o ${LIST_CONTENT_FILE}" - local -r _FW_AVAILABLE_INFO="$(grep ${_PSID} ${LIST_CONTENT_FILE})" - local -r _FW_AVAILABLE="$(echo ${_FW_AVAILABLE_INFO} | awk '{print $4}')" + local -r _FW_AVAILABLE="$(GetAvailableFwVersion ${_FW_FILE} ${_MST_DEVICE} ${_PSID})" if [[ -z "${_FW_CURRENT}" ]]; then ExitFailure "could not retreive current FW version" @@ -339,7 +421,13 @@ function UpgradeFW() { if [[ "${_FW_CURRENT}" == "${_FW_AVAILABLE}" ]]; then ExitSuccess "firmware is up to date" else + if [[ "${DRY_RUN}" == "${YES_PARAM}" ]]; then + LogNotice "firmware upgrade is required" + exit ${FW_UPGRADE_IS_REQUIRED} + fi + LogNotice "firmware upgrade is required. Installing compatible version..." + if [[ "${_MST_DEVICE}" = "${UNKN_MST}" ]]; then LogWarning "could not find fastest mst device, using default device" RunFwUpdateCmd "-i ${_FW_FILE}" diff --git a/platform/mellanox/mlnx-onie-fw-update.sh b/platform/mellanox/mlnx-onie-fw-update.sh index 35fdb55dfd93..56b251a96f86 100755 --- a/platform/mellanox/mlnx-onie-fw-update.sh +++ b/platform/mellanox/mlnx-onie-fw-update.sh @@ -68,8 +68,12 @@ enable_onie_fw_update_mode() { fi register_terminate_handler - - grub-editenv ${os_boot}/grub/grubenv set onie_entry="ONIE" || return $? + if [ -d /sys/firmware/efi/efivars ]; then + onie_boot_num=$(efibootmgr | grep "ONIE:" | awk '{ print $1 }' | cut -b 5-8 ) + efibootmgr -n $onie_boot_num + else + grub-editenv ${os_boot}/grub/grubenv set onie_entry="ONIE" || return $? + fi grub-editenv ${onie_mount}/grub/grubenv set onie_mode="update" || return $? return 0 @@ -80,7 +84,12 @@ disable_onie_fw_update_mode() { return 1 fi - grub-editenv ${os_boot}/grub/grubenv unset onie_entry || return $? + if [ -d /sys/firmware/efi/efivars ]; then + sonic_boot_num=$(efibootmgr | grep "SONiC-OS" | awk '{ print $1 }' | cut -b 5-8 ) + efibootmgr -n $sonic_boot_num + else + grub-editenv ${os_boot}/grub/grubenv unset onie_entry || return $? + fi grub-editenv ${onie_mount}/grub/grubenv set onie_mode="install" || return $? return 0 @@ -106,7 +115,7 @@ system_reboot() { sleep 5s # Use SONiC reboot scenario - /usr/local/bin/reboot + /usr/local/bin/reboot -f exit $? } diff --git a/platform/mellanox/mlnx-platform-api/setup.py b/platform/mellanox/mlnx-platform-api/setup.py index 31dba9d2ae00..cfa39aa2bf72 100644 --- a/platform/mellanox/mlnx-platform-api/setup.py +++ b/platform/mellanox/mlnx-platform-api/setup.py @@ -1,5 +1,5 @@ # -# Copyright (c) 2019-2021 NVIDIA CORPORATION & AFFILIATES. +# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -28,15 +28,24 @@ maintainer_email='kevinw@mellanox.com', packages=[ 'sonic_platform', - 'tests' + 'tests', + 'smart_switch.dpuctl' ], setup_requires= [ 'pytest-runner' ], + install_requires= [ + 'inotify' + ], tests_require = [ 'pytest', 'mock>=2.0.0' ], + entry_points={ + 'console_scripts': [ + 'dpuctl = smart_switch.dpuctl.main:dpuctl', + ] + }, classifiers=[ 'Development Status :: 3 - Alpha', 'Environment :: Plugins', diff --git a/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/__init__.py b/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/__init__.py new file mode 100644 index 000000000000..0a2c565b0ac3 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/__init__.py @@ -0,0 +1,18 @@ +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from smart_switch.dpuctl import * diff --git a/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/main.py b/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/main.py new file mode 100644 index 000000000000..7abcd24771cf --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/main.py @@ -0,0 +1,193 @@ +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +"""Click Implemenetation for dpuctl related commands""" +from multiprocessing import Process +from tabulate import tabulate +try: + import click + from sonic_platform.dpuctlplat import DpuCtlPlat +except ImportError as e: + raise ImportError(str(e) + '- required module not found') from e + + +def call_dpu_reset(obj, force): + """Function to call object specific Reset for each dpu""" + try: + obj.dpu_reboot(force) + except Exception as error: + print(f"An error occurred: {type(error).__name__} - {error}") + + +def call_dpu_power_on(obj, force): + """Function to call object specific power on for each dpu""" + try: + obj.dpu_power_on(force) + except Exception as error: + print(f"An error occurred: {type(error).__name__} - {error}") + + +def call_dpu_power_off(obj, force): + """Function to call object specific power off for each dpu""" + try: + obj.dpu_power_off(force) + except Exception as error: + print(f"An error occurred: {type(error).__name__} - {error}") + + +def call_dpu_status_update(obj): + """Function to call object specific status update for each dpu""" + try: + obj.dpu_status_update() + except Exception as error: + print(f"An error occurred: {type(error).__name__} - {error}") + + +def validate_return_dpus(all_dpus, dpu_names, dpuctl_list): + """Function to validate list of dpus provided by User""" + if (((not all_dpus) and (dpu_names is None)) or (all_dpus and (dpu_names is not None))): + raise AssertionError("Invalid Arguments provided!" + "Please provide either dpu_names or -all option") + + if all_dpus: + return dpuctl_list + dpu_names_l = dpu_names.split(',') + dpu_names_l = [dpu_name.strip() for dpu_name in dpu_names_l] + for provided_dpu in dpu_names_l: + if provided_dpu not in dpuctl_list: + raise AssertionError("Invalid Arguments provided!" + f"{provided_dpu} does not exist!") + return dpu_names_l + + +def execute_function_call(ctx, + all_dpus, + force, + dpu_names, + function_to_call, + verbose=None): + """Function to fork multiple child process for each DPU + and call required function""" + try: + dpuctl_dict = ctx.obj['dpuctl_dict'] + selected_dpus = validate_return_dpus(all_dpus, dpu_names, dpuctl_dict.keys()) + selected_dpus = list(set(selected_dpus)) + proc_list = [] + for dpu_name, dpu_obj in dpuctl_dict.items(): + if verbose: + dpu_obj.verbosity = True + if dpu_name in selected_dpus: + if function_to_call == "PW_ON": + proc = Process(target=call_dpu_power_on, args=(dpu_obj, force)) + elif function_to_call == "PW_OFF": + proc = Process(target=call_dpu_power_off, + args=(dpu_obj, force)) + elif function_to_call == "RST": + proc = Process(target=call_dpu_reset, args=(dpu_obj, force)) + proc_list.append(proc) + for proc in proc_list: + proc.start() + for proc in proc_list: + proc.join() + except Exception as error: + print(f"An error occurred: {type(error).__name__} - {error}") + + +@click.group() +@click.pass_context +def dpuctl(ctx=None): + """SONiC command line - 'dpuctl' Wrapper command: + Smart Switch DPU reset flow commands""" + # Hardcoded HW-mgmt names + try: + existing_dpu_list=['dpu0', 'dpu1', 'dpu2', 'dpu3'] + # dpu0 in Platform.json = dpu1 in HW-mgmt + dpuctl_dict = {} + for dpu_name in existing_dpu_list: + dpu_obj = DpuCtlPlat(dpu_name) + dpu_obj.setup_logger(use_print=True) + dpuctl_dict[dpu_name] = dpu_obj + context = { + "dpuctl_dict": dpuctl_dict, + } + ctx.obj = context + except Exception as error: + print(f"An error occurred: {type(error).__name__} - {error}") + ctx.exit() + + +@dpuctl.command(name='dpu-reset') +@click.option('--force', '-f', is_flag=True, default=False, help='Perform force Reboot - Turned off by default') +@click.option('--all', '-a', 'all_dpus', is_flag=True, default=False, help='Execute for all DPUs') +@click.argument('dpu_names', metavar='', required=False) +@click.option('--verbose', '-v', 'verbose', is_flag=True, default=False, help='Print debug messages') +@click.pass_context +def dpuctl_reset(ctx, force, all_dpus, verbose, dpu_names=None): + """Reboot individual or all DPUs""" + execute_function_call(ctx, all_dpus, force, dpu_names, "RST", verbose) + + +@dpuctl.command(name='dpu-power-on') +@click.option('--force', '-f', is_flag=True, default=False, help='Perform force power on - Turned off by default') +@click.option('--all', '-a', 'all_dpus', is_flag=True, default=False, help='Execute on all DPUs') +@click.option('--verbose', '-v', 'verbose', is_flag=True, default=False, help='Print debug messages') +@click.argument('dpu_names', metavar='', required=False) +@click.pass_context +def dpuctl_power_on(ctx, force, all_dpus, verbose, dpu_names=None): + """Power On individual or all DPUs""" + execute_function_call(ctx, all_dpus, force, dpu_names, "PW_ON", verbose) + + +@dpuctl.command(name='dpu-power-off') +@click.option('--force', '-f', is_flag=True, default=False, help='Perform force power off Turned of by default') +@click.option('--all', '-a', 'all_dpus', is_flag=True, default=False, help='Execute on all DPUs') +@click.option('--verbose', '-v', 'verbose', is_flag=True, default=False, help='Print debug messages') +@click.argument('dpu_names', metavar='', required=False) +@click.pass_context +def dpuctl_power_off(ctx, force, all_dpus, verbose, dpu_names=None): + """Power Off individual or all DPUs""" + execute_function_call(ctx, all_dpus, force, dpu_names, "PW_OFF", verbose) + + +@dpuctl.command(name='dpu-status') +@click.argument('dpu_names', metavar='', required=False) +@click.pass_context +def dpuctl_get_status(ctx, all_dpus=False, dpu_names=None): + """Obtain current status of the DPUs""" + try: + if not dpu_names: + all_dpus = True + dpuctl_dict = ctx.obj['dpuctl_dict'] + selected_dpus = validate_return_dpus(all_dpus, dpu_names, dpuctl_dict.keys()) + selected_dpus = list(set(selected_dpus)) + status_list = [] + for dpu_name, dpu_obj in dpuctl_dict.items(): + if dpu_name in selected_dpus: + call_dpu_status_update(dpu_obj) + dpu_status_list = [dpu_name, + dpu_obj.dpu_ready_indication, + dpu_obj.dpu_shtdn_ready_indication, + dpu_obj.boot_prog_indication] + status_list.append(dpu_status_list) + header = ['DPU', 'dpu ready', 'dpu shutdown ready', 'boot progress'] + click.echo(tabulate(status_list, header)) + except Exception as error: + print(f"An error occurred: {type(error).__name__} - {error}") + + +if __name__ == '__main__': + dpuctl() diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py index a616b28e0c02..e0bcb2846a70 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py @@ -475,6 +475,8 @@ def get_change_event_for_module_host_management_mode(self, timeout): if fd_type == 'hw_present': # event could be EVENT_NOT_PRESENT or EVENT_PRESENT event = sfp.EVENT_NOT_PRESENT if fd_value == 0 else sfp.EVENT_PRESENT + if fd_value == 1: + s.processing_insert_event = True s.on_event(event) elif fd_type == 'present': if str(fd_value) == sfp.SFP_STATUS_ERROR: @@ -499,16 +501,18 @@ def get_change_event_for_module_host_management_mode(self, timeout): s.on_event(event) if s.in_stable_state(): + self.sfp_module.SFP.wait_sfp_eeprom_ready([s], 2) s.fill_change_event(port_dict) s.refresh_poll_obj(self.poll_obj, self.registered_fds) else: logger.log_debug(f'SFP {sfp_index} does not reach stable state, state={s.state}') - + ready_sfp_set = wait_ready_task.get_ready_set() for sfp_index in ready_sfp_set: s = self._sfp_list[sfp_index] s.on_event(sfp.EVENT_RESET_DONE) if s.in_stable_state(): + self.sfp_module.SFP.wait_sfp_eeprom_ready([s], 2) s.fill_change_event(port_dict) s.refresh_poll_obj(self.poll_obj, self.registered_fds) else: diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/component.py b/platform/mellanox/mlnx-platform-api/sonic_platform/component.py index ef1713f8f3be..f1ce4d8b1cc4 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/component.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/component.py @@ -1,5 +1,5 @@ # -# Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES. +# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -130,7 +130,7 @@ class ONIEUpdater(object): ONIE_FW_UPDATE_CMD_INSTALL = ['/usr/bin/mlnx-onie-fw-update.sh', 'update', '--no-reboot'] ONIE_FW_UPDATE_CMD_SHOW_PENDING = ['/usr/bin/mlnx-onie-fw-update.sh', 'show-pending'] - ONIE_VERSION_PARSE_PATTERN = '([0-9]{4})\.([0-9]{2})-([0-9]+)\.([0-9]+)\.([0-9]+)-?(dev)?-([0-9]+)' + ONIE_VERSION_PARSE_PATTERN = '([0-9]{4})\.([0-9]{2})-([0-9]+)\.([0-9]+)\.([0-9]+)-?(rc[0-9]+)?-?(dev)?-([0-9]+)' ONIE_VERSION_BASE_PARSE_PATTERN = '([0-9]+)\.([0-9]+)\.([0-9]+)' ONIE_VERSION_REQUIRED = '5.2.0016' @@ -153,7 +153,7 @@ def __init__(self): def __add_prefix(self, image_path): if image_path.endswith(self.BIOS_UPDATE_FILE_EXT_CAB): - return image_path; + return image_path elif self.BIOS_UPDATE_FILE_EXT_ROM not in image_path: rename_path = "/tmp/00-{}".format(os.path.basename(image_path)) else: @@ -281,8 +281,9 @@ def parse_onie_version(self, version, is_base=False): onie_major = m.group(3) onie_minor = m.group(4) onie_release = m.group(5) - onie_signtype = m.group(6) - onie_baudrate = m.group(7) + onie_rc = m.group(6) + onie_signtype = m.group(7) + onie_baudrate = m.group(8) return onie_year, onie_month, onie_major, onie_minor, onie_release, onie_baudrate @@ -732,6 +733,7 @@ class ComponentCPLD(Component): MST_DEVICE_PATH = '/dev/mst' MST_DEVICE_PATTERN = 'mt[0-9]*_pci_cr0' + FW_VERSION_FORMAT = 'CPLD{}_REV{}{}' CPLD_NUMBER_FILE = '/var/run/hw-management/config/cpld_num' CPLD_PART_NUMBER_FILE = '/var/run/hw-management/system/cpld{}_pn' @@ -833,7 +835,7 @@ def get_firmware_version(self): version = version.rstrip('\n').zfill(self.CPLD_VERSION_MAX_LENGTH) version_minor = version_minor.rstrip('\n').zfill(self.CPLD_VERSION_MINOR_MAX_LENGTH) - return "CPLD{}_REV{}{}".format(part_number, version, version_minor) + return self.FW_VERSION_FORMAT.format(part_number, version, version_minor) def get_available_firmware_version(self, image_path): with MPFAManager(image_path) as mpfa: @@ -906,3 +908,43 @@ def _install_firmware(self, image_path): return False return True + +class ComponentCPLDSN4280(ComponentCPLD): + CPLD_FIRMWARE_UPDATE_COMMAND = ['cpldupdate', '--gpio', '--print-progress', ''] + + def _install_firmware(self, image_path): + self.CPLD_FIRMWARE_UPDATE_COMMAND[3] = image_path + + try: + print("INFO: Installing {} firmware update: path={}".format(self.name, image_path)) + subprocess.check_call(self.CPLD_FIRMWARE_UPDATE_COMMAND, universal_newlines=True) + except subprocess.CalledProcessError as e: + print("ERROR: Failed to update {} firmware: {}".format(self.name, str(e))) + return False + + return True + +class ComponenetFPGADPU(ComponentCPLD): + CPLD_NUMBER_FILE = '/var/run/hw-management/config/dpu_num' + + COMPONENT_NAME = 'DPU{}_FPGA' + COMPONENT_DESCRIPTION = 'FPGA - Field-Programmable Gate Array' + FW_VERSION_FORMAT = 'FPGA{}_REV{}{}' + + CPLD_PART_NUMBER_FILE = '/var/run/hw-management/dpu{}/system/fpga1_pn' + CPLD_VERSION_FILE = '/var/run/hw-management/dpu{}/system/fpga1_version' + CPLD_VERSION_MINOR_FILE = '/var/run/hw-management/dpu{}/system/fpga1_version_min' + + CPLD_FIRMWARE_UPDATE_COMMAND = ['cpldupdate', '--cpld_chain', '2', '--gpio', '--print-progress', ''] + + def _install_firmware(self, image_path): + self.CPLD_FIRMWARE_UPDATE_COMMAND[5] = image_path + + try: + print("INFO: Installing {} firmware update: path={}".format(self.name, image_path)) + subprocess.check_call(self.CPLD_FIRMWARE_UPDATE_COMMAND, universal_newlines=True) + except subprocess.CalledProcessError as e: + print("ERROR: Failed to update {} firmware: {}".format(self.name, str(e))) + return False + + return True diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py index 9ee37af9981d..e0592fd58feb 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py @@ -18,8 +18,10 @@ import glob import os import time +import re from . import utils +from sonic_py_common.general import check_output_pipe DEFAULT_WD_PERIOD = 65535 @@ -102,6 +104,13 @@ }, 'x86_64-mlnx_msn4600-r0': { }, + 'x86_64-nvidia_sn4280-r0': { + 'thermal': { + "capability": { + "comex_amb": False + } + } + }, 'x86_64-nvidia_sn4800-r0': { 'thermal': { "capability": { @@ -126,6 +135,9 @@ "comex_amb": False, "pch_temp": True } + }, + 'sfp': { + 'fw_control_ports': [64, 65] # 0 based sfp index list } }, 'x86_64-nvidia_sn5600-r0': { @@ -134,6 +146,9 @@ "comex_amb": False, "pch_temp": True } + }, + 'sfp': { + 'fw_control_ports': [64] # 0 based sfp index list } }, 'x86_64-nvidia_sn4280_simx-r0': { @@ -160,6 +175,13 @@ def is_simx_platform(cls): platform_name = cls.get_platform_name() return platform_name and 'simx' in platform_name + @classmethod + @utils.read_only_cache() + def get_simx_version(cls): + version = check_output_pipe(["lspci", "-vv"], ["grep", "SimX"]) + parsed_version = re.search("([0-9]+\\.[0-9]+-[0-9]+)", version) + return parsed_version.group(1) if parsed_version else "N/A" + @classmethod @utils.read_only_cache() def get_fan_drawer_count(cls): @@ -246,6 +268,20 @@ def get_linecard_max_port_count(cls): return 0 return sfp_data.get('max_port_per_line_card', 0) + @classmethod + @utils.read_only_cache() + def get_platform_dpus_data(cls): + json_data = cls.get_platform_json_data() + return json_data.get('DPUS', None) + + @classmethod + @utils.read_only_cache() + def get_platform_json_data(cls): + from sonic_py_common import device_info + platform_path = device_info.get_path_to_platform_dir() + platform_json_path = os.path.join(platform_path, 'platform.json') + return utils.load_json_file(platform_json_path) + @classmethod def get_bios_component(cls): from .component import ComponentBIOS, ComponentBIOSSN2201 @@ -257,22 +293,26 @@ def get_bios_component(cls): @classmethod def get_cpld_component_list(cls): - from .component import ComponentCPLD, ComponentCPLDSN2201 + from .component import ComponentCPLD, ComponentCPLDSN2201, ComponentCPLDSN4280, ComponenetFPGADPU if cls.get_platform_name() in ['x86_64-nvidia_sn2201-r0']: # For SN2201, special chass is required for handle BIOS # Currently, only fetching BIOS version is supported return ComponentCPLDSN2201.get_component_list() + if cls.get_platform_name() in ['x86_64-nvidia_sn4280-r0']: + return ComponentCPLDSN4280.get_component_list() + ComponenetFPGADPU.get_component_list() return ComponentCPLD.get_component_list() @classmethod @utils.read_only_cache() def is_module_host_management_mode(cls): - from sonic_py_common import device_info - _, hwsku_dir = device_info.get_paths_to_platform_and_hwsku_dirs() - sai_profile_file = os.path.join(hwsku_dir, 'sai.profile') + sai_profile_file = '/tmp/sai.profile' + if not os.path.exists(sai_profile_file): + from sonic_py_common import device_info + _, hwsku_dir = device_info.get_paths_to_platform_and_hwsku_dirs() + sai_profile_file = os.path.join(hwsku_dir, 'sai.profile') data = utils.read_key_value_file(sai_profile_file, delimeter='=') return data.get('SAI_INDEPENDENT_MODULE_MODE') == '1' - + @classmethod def wait_platform_ready(cls): """ @@ -305,3 +345,16 @@ def get_watchdog_max_period(cls): return DEFAULT_WD_PERIOD return watchdog_data.get('max_period', None) + + @classmethod + @utils.read_only_cache() + def get_always_fw_control_ports(cls): + platform_data = DEVICE_DATA.get(cls.get_platform_name()) + if not platform_data: + return None + + sfp_data = platform_data.get('sfp') + if not sfp_data: + return None + + return sfp_data.get('fw_control_ports') diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py b/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py new file mode 100644 index 000000000000..12281db1e789 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py @@ -0,0 +1,430 @@ +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +"""Class Implementation for per DPU functionality""" +import os.path +import time +import multiprocessing +import subprocess +from contextlib import contextmanager +from select import poll, POLLPRI, POLLIN +from enum import Enum + +try: + from .inotify_helper import InotifyHelper + from sonic_py_common.syslogger import SysLogger + from . import utils +except ImportError as e: + raise ImportError(str(e)) from e + +HW_BASE = "/var/run/hw-management/" +EVENT_BASE = os.path.join(HW_BASE, "events/") +SYSTEM_BASE = os.path.join(HW_BASE, "system/") +PCI_BASE = "/sys/bus/pci/" +PCI_DEV_BASE = os.path.join(PCI_BASE, "devices/") + +logger = SysLogger() + +WAIT_FOR_SHTDN = 120 +WAIT_FOR_DPU_READY = 180 +WAIT_FOR_PCI_DEV = 60 + + +class OperationType(Enum): + CLR = "0" + SET = "1" + +class BootProgEnum(Enum): + RST = 0 + BL2 = 1 + BL31 = 2 + UEFI = 3 + OS_START = 4 + OS_RUN = 5 + LOW_POWER = 6 + FW_UPDATE = 7 + OS_CRASH_PROG = 8 + OS_CRASH_DONE = 9 + FW_FAULT_PROG = 10 + FW_FAULT_DONE = 11 + SW_INACTIVE = 15 + +# The rshim services are in a different order as compared to the DPU names +dpu_map = { + "dpu1": {"pci_id": "0000:08:00.0", "rshim": "rshim@0"}, + "dpu2": {"pci_id": "0000:07:00.0", "rshim": "rshim@1"}, + "dpu3": {"pci_id": "0000:01:00.0", "rshim": "rshim@2"}, + "dpu4": {"pci_id": "0000:02:00.0", "rshim": "rshim@3"}, +} + + +class DpuCtlPlat(): + """Class for Per DPU API Call""" + def __init__(self, dpu_name): + self.dpu_name = dpu_name + self._name = self.get_hwmgmt_name() + self.rst_path = os.path.join(SYSTEM_BASE, + f"{self._name}_rst") + self.pwr_path = os.path.join(SYSTEM_BASE, + f"{self._name}_pwr") + self.pwr_f_path = os.path.join(SYSTEM_BASE, + f"{self._name}_pwr_force") + self.dpu_rdy_path = os.path.join(EVENT_BASE, + f"{self._name}_ready") + self.shtdn_ready_path = os.path.join(EVENT_BASE, + f"{self._name}_shtdn_ready") + self.boot_prog_path = os.path.join(HW_BASE, + f"{self._name}/system/boot_progress") + self.pci_dev_path = os.path.join(PCI_DEV_BASE, + dpu_map[self._name]["pci_id"], + "remove") + self.boot_prog_map = { + BootProgEnum.RST.value: "Reset/Boot-ROM", + BootProgEnum.BL2.value: "BL2 (from ATF image on eMMC partition)", + BootProgEnum.BL31.value: "BL31 (from ATF image on eMMC partition)", + BootProgEnum.UEFI.value: "UEFI (from UEFI image on eMMC partition)", + BootProgEnum.OS_START.value: "OS Starting", + BootProgEnum.OS_RUN.value: "OS is running", + BootProgEnum.LOW_POWER.value: "Low-Power Standby", + BootProgEnum.FW_UPDATE.value: "FW Update in progress", + BootProgEnum.OS_CRASH_PROG.value: "OS Crash Dump in progress", + BootProgEnum.OS_CRASH_DONE.value: "OS Crash Dump is complete", + BootProgEnum.FW_FAULT_PROG.value: "FW Fault Crash Dump in progress", + BootProgEnum.FW_FAULT_DONE.value: "FW Fault Crash Dump is complete", + BootProgEnum.SW_INACTIVE.value: "Software is inactive" + } + self.boot_prog_state = None + self.shtdn_state = None + self.dpu_ready_state = None + self.setup_logger() + self.verbosity = False + + def setup_logger(self, use_print=False): + if use_print: + self.logger_info = print + self.logger_error = print + self.logger_debug = print + return + self.logger_debug = logger.log_debug + self.logger_info = logger.log_info + self.logger_error = logger.log_error + + def log_debug(self, msg=None): + # Print only in verbose mode + if self.verbosity: + self.logger_debug(f"{self.dpu_name}: {msg}") + + def log_info(self, msg=None): + self.logger_info(f"{self.dpu_name}: {msg}") + + def log_error(self, msg=None): + self.logger_error(f"{self.dpu_name}: {msg}") + + def run_cmd_output(self, cmd): + try: + subprocess.check_output(cmd) + except Exception as err: + self.log_error(f"Failed to run cmd {' '.join(cmd)}") + raise err + + def dpu_pre_shutdown(self): + """Method to execute shutdown activities for the DPU""" + self.dpu_rshim_service_control("stop") + self.dpu_pci_remove() + + def dpu_post_startup(self): + """Method to execute all post startup activities for the DPU""" + self.dpu_pci_scan() + self.wait_for_pci() + self.dpu_rshim_service_control("start") + + def dpu_rshim_service_control(self, set_state): + """Start/Stop the RSHIM service for the current DPU""" + try: + cmd = ['systemctl', set_state, dpu_map[self.get_hwmgmt_name()]['rshim'] + ".service"] + self.run_cmd_output(cmd) + self.log_debug(f"Executed rshim service command: {' '.join(cmd)}") + except Exception: + self.log_error(f"Failed to start rshim!") + + @contextmanager + def get_open_fd(self, path, flag): + fd = os.open(path, flag) + try: + yield fd + finally: + os.close(fd) + + def wait_for_pci(self): + """Wait for the PCI device folder in the PCI Path, required before starting rshim""" + try: + with self.get_open_fd(PCI_DEV_BASE, os.O_RDONLY) as dir_fd: + if os.path.exists(os.path.dirname(self.pci_dev_path)): + return True + poll_obj = poll() + poll_obj.register(dir_fd, POLLIN) + start = time.time() + while (time.time() - start) < WAIT_FOR_PCI_DEV: + events = poll_obj.poll(WAIT_FOR_PCI_DEV * 1000) + if events: + if os.path.exists(os.path.dirname(self.pci_dev_path)): + return True + return os.path.exists(os.path.dirname(self.pci_dev_path)) + except Exception: + self.log_error("Unable to wait for PCI device") + + def write_file(self, file_name, content_towrite): + """Write given value to file only if file exists""" + try: + utils.write_file(file_name, content_towrite, raise_exception=True) + except Exception as e: + self.log_error(f'Failed to write {content_towrite} to file {file_name}') + raise type(e)(f"{self.dpu_name}:{str(e)}") + return True + + def get_hwmgmt_name(self): + """Return name of the DPU in the HW Management mapping""" + return f"{self.dpu_name[:3]}{str(int(self.dpu_name[3:])+1)}" + + def dpu_go_down(self): + """Per DPU going down API""" + self.write_file(self.rst_path, OperationType.CLR.value) + try: + get_shtdn_inotify = InotifyHelper(self.shtdn_ready_path) + with self.time_check_context("going down"): + dpu_shtdn_rdy = get_shtdn_inotify.wait_watch(WAIT_FOR_SHTDN, 1) + except (FileNotFoundError, PermissionError) as inotify_exc: + raise type(inotify_exc)(f"{self.dpu_name}:{str(inotify_exc)}") + if not dpu_shtdn_rdy: + self.log_error(f"Going Down Unsuccessful") + return False + return True + + def _power_off(self): + """Per DPU Power off private function""" + if not self.dpu_go_down(): + return self._power_off_force() + self.write_file(self.pwr_path, OperationType.CLR.value) + self.log_info(f"Power Off complete") + return True + + def _power_off_force(self): + """Per DPU Force Power off private function""" + self.write_file(self.rst_path, OperationType.CLR.value) + self.write_file(self.pwr_f_path, OperationType.CLR.value) + self.log_info(f"Force Power Off complete") + return True + + def _power_on_force(self, count=4): + """Per DPU Power on with force private function""" + if count < 4: + self.log_error(f"Failed Force Power on! Retry {4-count}..") + self.write_file(self.pwr_f_path, OperationType.SET.value) + self.write_file(self.rst_path, OperationType.SET.value) + get_rdy_inotify = InotifyHelper(self.dpu_rdy_path) + with self.time_check_context("power on force"): + dpu_rdy = get_rdy_inotify.wait_watch(WAIT_FOR_DPU_READY, 1) + if not dpu_rdy: + if count > 1: + time.sleep(1) + self._power_off_force() + return self._power_on_force(count=count - 1) + self.log_error(f"Failed Force power on! Exiting") + return False + self.log_info(f"Force Power on Successful!") + return True + + def _power_on(self): + """Per DPU Power on without force private function""" + self.write_file(self.pwr_path, OperationType.SET.value) + self.write_file(self.rst_path, OperationType.SET.value) + get_rdy_inotify = InotifyHelper(self.dpu_rdy_path) + with self.time_check_context("power on"): + dpu_rdy = get_rdy_inotify.wait_watch(WAIT_FOR_DPU_READY, 1) + if not dpu_rdy: + self.log_error(f"Failed power on! Trying Force Power on") + self._power_off_force() + return self._power_on_force() + self.log_info(f"Power on Successful!") + return True + + def dpu_pci_remove(self): + """Per DPU PCI remove API""" + try: + self.write_file(self.pci_dev_path, OperationType.SET.value) + except Exception: + self.log_info(f"Failed PCI Removal!") + + def dpu_pci_scan(self): + """PCI Scan API""" + pci_scan_path = "/sys/bus/pci/rescan" + self.write_file(pci_scan_path, OperationType.SET.value) + + def dpu_power_on(self, forced=False): + """Per DPU Power on API""" + with self.boot_prog_context(): + self.log_info(f"Power on with force = {forced}") + if forced: + return_value = self._power_on_force() + else: + return_value = self._power_on() + self.dpu_post_startup() + return return_value + + def dpu_power_off(self, forced=False): + """Per DPU Power off API""" + with self.boot_prog_context(): + self.dpu_pre_shutdown() + self.log_info(f"Power off with force = {forced}") + if forced: + return self._power_off_force() + elif self.read_boot_prog() != BootProgEnum.OS_RUN.value: + self.log_info(f"Power off with force = True since since OS is not in running state on DPU") + return self._power_off_force() + return self._power_off() + + def _reboot(self): + """Per DPU Reboot Private function API""" + if not self.dpu_go_down(): + self._power_off_force() + self.write_file(self.rst_path, OperationType.SET.value) + get_rdy_inotify = InotifyHelper(self.dpu_rdy_path) + with self.time_check_context("power on"): + dpu_rdy = get_rdy_inotify.wait_watch(WAIT_FOR_DPU_READY, 1) + return_value = True + if not dpu_rdy: + self._power_off_force() + return_value = self._power_on_force() + return return_value + + def _reboot_force(self): + """Per DPU Force Reboot Private function API""" + self._power_off_force() + return_value = self._power_on_force() + return return_value + + def dpu_reboot(self, forced=False): + """Per DPU Power on API""" + with self.boot_prog_context(): + self.dpu_pre_shutdown() + self.log_info(f"Reboot with force = {forced}") + if forced: + return_value = self._reboot_force() + elif self.read_boot_prog() != BootProgEnum.OS_RUN.value: + self.log_info(f"Reboot with force = True since OS is not in running state on DPU") + return_value = self._reboot_force() + else: + return_value = self._reboot() + self.dpu_post_startup() + if return_value: + self.log_info("Reboot Complete") + return return_value + + def dpu_boot_prog_update(self, read_value=None): + """Monitor and read changes to boot_progress sysfs file and map it to corresponding indication""" + try: + if read_value: + self.boot_prog_state = read_value + else: + self.boot_prog_state = self.read_boot_prog() + self.boot_prog_indication = f"{self.boot_prog_state} - {self.boot_prog_map.get(self.boot_prog_state,'N/A')}" + except Exception as e: + self.log_error(f"Could not update boot_progress of DPU") + raise e + + def dpu_ready_update(self): + """Monitor and read changes to dpu_ready sysfs file and map it to corresponding indication""" + try: + self.dpu_ready_state = utils.read_int_from_file(self.dpu_rdy_path, + raise_exception=True) + self.dpu_ready_indication = f"{False if self.dpu_ready_state == 0 else True if self.dpu_ready_state == 1 else str(self.dpu_ready_state)+' - N/A'}" + except Exception as e: + self.log_error(f"Could not update dpu_ready for DPU") + raise e + + def dpu_shtdn_ready_update(self): + """Monitor and read changes to dpu_shtdn_ready sysfs file and map it to corresponding indication""" + try: + self.dpu_shtdn_ready_state = utils.read_int_from_file(self.shtdn_ready_path, + raise_exception=True) + self.dpu_shtdn_ready_indication = f"{False if self.dpu_shtdn_ready_state == 0 else True if self.dpu_shtdn_ready_state == 1 else str(self.dpu_shtdn_ready_state)+' - N/A'}" + except Exception as e: + self.log_error(f"Could not update dpu_shtdn_ready for DPU") + raise e + + def dpu_status_update(self): + """Update status for all the three relevant sysfs files for DPU monitoring""" + try: + self.dpu_boot_prog_update() + self.dpu_ready_update() + self.dpu_shtdn_ready_update() + except Exception as e: + self.log_error(f"Could not obtain status of DPU") + raise e + + def read_boot_prog(self): + return utils.read_int_from_file(self.boot_prog_path, raise_exception=True) + + def update_boot_prog_once(self, poll_var): + """Read boot_progress and update the value once """ + poll_var.poll() + read_value = self.read_boot_prog() + if read_value != self.boot_prog_state: + self.dpu_boot_prog_update(read_value) + self.log_error(f"The boot_progress status is changed to = {self.boot_prog_indication}") + + def watch_boot_prog(self): + """Read boot_progress and update the value in an infinite loop""" + try: + self.dpu_boot_prog_update() + self.log_info(f"The initial boot_progress status is = {self.boot_prog_indication}") + file = open(self.boot_prog_path, "r") + p = poll() + p.register(file.fileno(), POLLPRI) + while True: + self.update_boot_prog_once(p) + except Exception: + self.log_error(f"Exception occured during watch_boot_progress!") + + @contextmanager + def boot_prog_context(self): + """Context manager for boot_progress update""" + if self.verbosity: + self.boot_prog_proc = None + try: + self.boot_prog_proc = multiprocessing.Process(target=self.watch_boot_prog) + self.boot_prog_proc.start() + yield + except Exception: + self.log_error(f"Exception occured during creating boot_prog_context manager!") + yield + finally: + if self.boot_prog_proc and self.boot_prog_proc.is_alive(): + self.boot_prog_proc.terminate() + self.boot_prog_proc.join() + else: + yield + + @contextmanager + def time_check_context(self, msg): + if self.verbosity: + start_time = time.time() + yield + end_time = time.time() + self.log_info(f"Total time taken = {end_time - start_time} for {msg}") + return + yield diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/inotify_helper.py b/platform/mellanox/mlnx-platform-api/sonic_platform/inotify_helper.py new file mode 100644 index 000000000000..b3ddae9052e2 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/inotify_helper.py @@ -0,0 +1,61 @@ +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +"""Helper code for Inotify Implementation for reading file until timeout""" +import os +import errno +import inotify.adapters + +try: + from sonic_py_common.syslogger import SysLogger + from . import utils +except ImportError as e: + raise ImportError(str(e) + '- required module not found') from e + +logger = SysLogger() + + +class InotifyHelper(): + """Helper Code for Inotify Implmentation""" + def __init__(self, file_path): + self.file_path = file_path + self.inotify_obj = inotify.adapters.Inotify() + if not self.inotify_obj: + logger.log_error("INOTIFY adapter error!") + raise RuntimeError("INOTIFY is not present!") + if not os.path.exists(self.file_path): + logger.log_error(f"{self.file_path} does not exist") + raise FileNotFoundError(errno.ENOENT, + os.strerror(errno.ENOENT), + self.file_path) + + def wait_watch(self, timeout, expected_value): + """Waits for changes in file until specified time and + compares written value to expected value""" + self.inotify_obj.add_watch(self.file_path, + mask=inotify.constants.IN_CLOSE_WRITE) + for event in self.inotify_obj.event_gen(timeout_s=timeout, + yield_nones=False): + read_value = utils.read_int_from_file(self.file_path, + raise_exception=True) + if read_value == expected_value: + return read_value + read_value = utils.read_int_from_file(self.file_path, + raise_exception=True) + if read_value != expected_value: + return None + return read_value diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py index 58fe71b84c87..1a0245b79e62 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py @@ -253,6 +253,14 @@ ACTION_ON_FW_CONTROL = 'On Firmware Control' ACTION_ON_POWER_LIMIT_ERROR = 'On Power Limit Error' ACTION_ON_CANCEL_WAIT = 'On Cancel Wait' + +# States/actions for always firmware control ports +STATE_FCP_DOWN = 'Down(Firmware Control)' +STATE_FCP_INIT = 'Initializing(Firmware Control)' +STATE_FCP_NOT_PRESENT = 'Not Present(Firmware Control)' +STATE_FCP_PRESENT = 'Present(Firmware Control)' + +ACTION_FCP_ON_START = 'On Start(Firmware Control)' # Module host management definitions end # SFP EEPROM limited bytes @@ -463,7 +471,12 @@ def __init__(self, sfp_index, sfp_type=None, slot_id=0, linecard_port_count=0, l self.slot_id = slot_id self._sfp_type_str = None # SFP state, only applicable for module host management - self.state = STATE_DOWN + fw_control_ports = DeviceDataManager.get_always_fw_control_ports() + if not fw_control_ports or self.sdk_index not in fw_control_ports: + self.state = STATE_DOWN + else: + self.state = STATE_FCP_DOWN + self.processing_insert_event = False def __str__(self): return f'SFP {self.sdk_index}' @@ -488,6 +501,21 @@ def get_presence(self): return False eeprom_raw = self._read_eeprom(0, 1, log_on_error=False) return eeprom_raw is not None + + @classmethod + def wait_sfp_eeprom_ready(cls, sfp_list, wait_time): + not_ready_list = sfp_list + + while wait_time > 0: + not_ready_list = [s for s in not_ready_list if s.state == STATE_FW_CONTROL and s._read_eeprom(0, 2,False) is None] + if not_ready_list: + time.sleep(0.1) + wait_time -= 0.1 + else: + return + + for s in not_ready_list: + logger.log_error(f'SFP {s.sdk_index} eeprom is not ready') # read eeprom specfic bytes beginning from offset with size as num_bytes def read_eeprom(self, offset, num_bytes): @@ -1054,6 +1082,11 @@ def get_tx_fault(self): list: [False] * channels """ api = self.get_xcvr_api() + try: + if self.is_sw_control(): + return api.get_tx_fault() if api else None + except Exception as e: + print(e) return [False] * api.NUM_CHANNELS if api else None def get_temperature(self): @@ -1154,7 +1187,6 @@ def get_xcvr_api(self): self.refresh_xcvr_api() if self._xcvr_api is not None: self._xcvr_api.get_rx_los = self.get_rx_los - self._xcvr_api.get_tx_fault = self.get_tx_fault return self._xcvr_api def is_sw_control(self): @@ -1426,7 +1458,7 @@ def get_state_machine(cls): sm.add_state(STATE_POWER_LIMIT_ERROR).set_entry_action(ACTION_ON_POWER_LIMIT_ERROR) \ .add_transition(EVENT_POWER_GOOD, STATE_POWERED_ON) \ .add_transition(EVENT_NOT_PRESENT, STATE_NOT_PRESENT) - + cls.action_table = {} cls.action_table[ACTION_ON_START] = cls.action_on_start cls.action_table[ACTION_ON_RESET] = cls.action_on_reset @@ -1436,6 +1468,16 @@ def get_state_machine(cls): cls.action_table[ACTION_ON_CANCEL_WAIT] = cls.action_on_cancel_wait cls.action_table[ACTION_ON_POWER_LIMIT_ERROR] = cls.action_on_power_limit_error + # For always firewire control ports + sm.add_state(STATE_FCP_DOWN).add_transition(EVENT_START, STATE_FCP_INIT) + sm.add_state(STATE_FCP_INIT).set_entry_action(ACTION_FCP_ON_START) \ + .add_transition(EVENT_NOT_PRESENT, STATE_FCP_NOT_PRESENT) \ + .add_transition(EVENT_PRESENT, STATE_FCP_PRESENT) + sm.add_state(STATE_FCP_NOT_PRESENT).add_transition(EVENT_PRESENT, STATE_FCP_PRESENT) + sm.add_state(STATE_FCP_PRESENT).add_transition(EVENT_NOT_PRESENT, STATE_FCP_NOT_PRESENT) + + cls.action_table[ACTION_FCP_ON_START] = cls.action_fcp_on_start + cls.sm = sm return cls.sm @@ -1463,7 +1505,20 @@ def action_on_start(cls, sfp): sfp.set_hw_reset(1) sfp.on_event(EVENT_RESET) else: - sfp.on_event(EVENT_POWER_ON) + if not sfp.processing_insert_event: + sfp.on_event(EVENT_POWER_ON) + else: + sfp.processing_insert_event = False + logger.log_info(f'SFP {sfp.sdk_index} is processing insert event and needs to wait module ready') + sfp.on_event(EVENT_RESET) + + @classmethod + def action_fcp_on_start(cls, sfp): + present = utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{sfp.sdk_index}/present') + if present: + sfp.on_event(EVENT_PRESENT) + else: + sfp.on_event(EVENT_NOT_PRESENT) @classmethod def action_on_reset(cls, sfp): @@ -1560,10 +1615,12 @@ def in_stable_state(self): Returns: bool: True if the module is in a stable state """ - return self.state in (STATE_NOT_PRESENT, STATE_SW_CONTROL, STATE_FW_CONTROL, STATE_POWER_BAD, STATE_POWER_LIMIT_ERROR) + return self.state in (STATE_NOT_PRESENT, STATE_SW_CONTROL, STATE_FW_CONTROL, + STATE_POWER_BAD, STATE_POWER_LIMIT_ERROR, STATE_FCP_NOT_PRESENT, + STATE_FCP_PRESENT) def get_fds_for_poling(self): - if self.state == STATE_FW_CONTROL: + if self.state == STATE_FW_CONTROL or self.state == STATE_FCP_NOT_PRESENT or self.state == STATE_FCP_PRESENT: return { 'present': self.get_fd('present') } @@ -1579,11 +1636,9 @@ def fill_change_event(self, port_dict): Args: port_dict (dict): {:} """ - if self.state == STATE_NOT_PRESENT: + if self.state == STATE_NOT_PRESENT or self.state == STATE_FCP_NOT_PRESENT: port_dict[self.sdk_index + 1] = SFP_STATUS_REMOVED - elif self.state == STATE_SW_CONTROL: - port_dict[self.sdk_index + 1] = SFP_STATUS_INSERTED - elif self.state == STATE_FW_CONTROL: + elif self.state == STATE_SW_CONTROL or self.state == STATE_FW_CONTROL or self.state == STATE_FCP_PRESENT: port_dict[self.sdk_index + 1] = SFP_STATUS_INSERTED elif self.state == STATE_POWER_BAD or self.state == STATE_POWER_LIMIT_ERROR: sfp_state = SFP.SFP_ERROR_BIT_POWER_BUDGET_EXCEEDED | SFP.SFP_STATUS_BIT_INSERTED @@ -1602,7 +1657,7 @@ def refresh_poll_obj(self, poll_obj, all_registered_fds): # find fds registered by this SFP current_registered_fds = {item[2]: (fileno, item[1]) for fileno, item in all_registered_fds.items() if item[0] == self.sdk_index} logger.log_debug(f'SFP {self.sdk_index} registered fds are: {current_registered_fds}') - if self.state == STATE_FW_CONTROL: + if self.state == STATE_FW_CONTROL or self.state == STATE_FCP_NOT_PRESENT or self.state == STATE_FCP_PRESENT: target_poll_types = ['present'] else: target_poll_types = ['hw_present', 'power_good'] @@ -1638,9 +1693,10 @@ def is_dummy_event(self, fd_type, fd_value): """ if fd_type == 'hw_present' or fd_type == 'present': if fd_value == int(SFP_STATUS_INSERTED): - return self.state in (STATE_SW_CONTROL, STATE_FW_CONTROL, STATE_POWER_BAD, STATE_POWER_LIMIT_ERROR) + return self.state in (STATE_SW_CONTROL, STATE_FW_CONTROL, STATE_POWER_BAD, + STATE_POWER_LIMIT_ERROR, STATE_FCP_PRESENT) elif fd_value == int(SFP_STATUS_REMOVED): - return self.state == STATE_NOT_PRESENT + return self.state in (STATE_NOT_PRESENT, STATE_FCP_NOT_PRESENT) elif fd_type == 'power_good': if fd_value == 1: return self.state in (STATE_SW_CONTROL, STATE_NOT_PRESENT, STATE_RESETTING) @@ -1688,7 +1744,8 @@ def initialize_sfp_modules(cls, sfp_list): logger.log_error(f'SFP {index} is not in stable state after initializing, state={s.state}') logger.log_notice(f'SFP {index} is in state {s.state} after module initialization') - + cls.wait_sfp_eeprom_ready(sfp_list, 2) + class RJ45Port(NvidiaSFPCommon): """class derived from SFP, representing RJ45 ports""" diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/wait_sfp_ready_task.py b/platform/mellanox/mlnx-platform-api/sonic_platform/wait_sfp_ready_task.py index 56b1f479fd44..4aa893773d29 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/wait_sfp_ready_task.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/wait_sfp_ready_task.py @@ -62,8 +62,8 @@ def schedule_wait(self, sfp_index): """ logger.log_debug(f'SFP {sfp_index} is scheduled for waiting reset done') with self.lock: - if len(self._wait_dict) == 0: - is_empty = True + is_empty = len(self._wait_dict) == 0 + # The item will be expired in 3 seconds self._wait_dict[sfp_index] = time.time() + self.WAIT_TIME diff --git a/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/dpuctl_test_inputs.py b/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/dpuctl_test_inputs.py new file mode 100644 index 000000000000..ad71d26c9172 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/dpuctl_test_inputs.py @@ -0,0 +1,143 @@ +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +"""Input Data for dpuctl tests""" +testData = { + 'PW_OFF': {'AssertionError': + {'arg_list': [['dpu5'], + ['dpu1', '--all'], + ['dpu1,dpu2,dpu3,dpu5'], + ['dpu5', '--all'], + ['dpu5', '--all', '--force'], + ]}, + 'Returncheck': + {'arg_list': [['dpu1'], + ['dpu1, dpu2,dpu3', '--force'], + ['--all', '--force'], + ['dpu4', '--path'], + ['--all', '--test'], + ], + 'rc': [0, 0, 0, 2, 2], + 'return_message': ["", + "", + "", + "Usage: dpu-power-off [OPTIONS]" + " \n" + "Try 'dpu-power-off --help' for" + " help.\n\nError: " + "No such option: --path\n", + "Usage: dpu-power-off [OPTIONS] " + "\n" + "Try 'dpu-power-off --help' for" + " help.\n\n" + "Error: No such option: --test\n"], + } + }, + 'PW_ON': {'AssertionError': + {'arg_list': [['dpu5'], + ['dpu1', '--all'], + ['dpu1,dpu2,dpu3,dpu5'], + ['dpu5', '--all'], + ['dpu5', '--all', '--force'], + ]}, + 'Returncheck': + {'arg_list': [['dpu1'], + ['dpu1,dpu2,dpu3', '--force'], + ['--all'], + ['--all', '--force'], + ['dpu4', '--path'], + ['--all', '--test'], + ], + 'rc': [0, 0, 0, 0, 2, 2], + 'return_message': ["", + "", + "", + "", + "Usage: dpu-power-on [OPTIONS]" + " \n" + "Try 'dpu-power-on --help'" + " for help.\n\nError: " + "No such option: --path\n", + "Usage: dpu-power-on [OPTIONS]" + " \n" + "Try 'dpu-power-on --help'" + " for help.\n\nError: " + "No such option: --test\n"], + } + }, + 'RST': {'AssertionError': + {'arg_list': [['dpu5'], + ['dpu1', '--all'], + ['dpu1,dpu2,dpu3,dpu5'], + ['dpu5', '--all'], + ['dpu1,dpu5', '--all'], + ]}, + 'Returncheck': + {'arg_list': [['dpu1'], + ['dpu1,dpu2,dpu3', '--force'], + ['--all'], + ['--all', '--test'], + ['dpu1,dpu2,dpu3'], + ['--all', '--test'], + ], + 'rc': [0, 0, 0, 2, 0, 2], + 'return_message': ["", + "", + "", + "Usage: dpu-reset [OPTIONS]" + " \n" + "Try 'dpu-reset --help' for help." + "\n\nError: " + "No such option: --test\n", + "", + "Usage: dpu-reset [OPTIONS]" + " \n" + "Try 'dpu-reset --help' for help." + "\n\nError: " + "No such option: --test\n"], + } + }, +} + +status_output = ["""DPU dpu ready dpu shutdown ready boot progress +----- ----------- -------------------- ----------------- +dpu0 True False 5 - OS is running +dpu1 True False 5 - OS is running +dpu2 True False 5 - OS is running +dpu3 True False 5 - OS is running +""", + """DPU dpu ready dpu shutdown ready boot progress +----- ----------- -------------------- ----------------- +dpu1 True False 5 - OS is running +""", + """DPU dpu ready dpu shutdown ready boot progress +----- ----------- -------------------- ----------------- +dpu0 True False 5 - OS is running +""", + """An error occurred: AssertionError - Invalid Arguments provided!dpu5 does not exist! +""", + """An error occurred: AssertionError - Invalid Arguments provided!dpu10 does not exist! +""", + """DPU dpu ready dpu shutdown ready boot progress +----- ----------- -------------------- ------------------ +dpu0 False True 0 - Reset/Boot-ROM +dpu1 False True 0 - Reset/Boot-ROM +dpu2 False True 0 - Reset/Boot-ROM +dpu3 False True 0 - Reset/Boot-ROM +""", + ["dpu1", "True", "False"], + ] diff --git a/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/platform.json b/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/platform.json new file mode 100644 index 000000000000..7af93ee06931 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/platform.json @@ -0,0 +1,16 @@ +{ + "DPUS": { + "dpu0": { + "midplane_interface": "dpu0" + }, + "dpu1": { + "midplane_interface": "dpu1" + }, + "dpu2": { + "midplane_interface": "dpu2" + }, + "dpu3": { + "midplane_interface": "dpu3" + } + } +} \ No newline at end of file diff --git a/platform/mellanox/mlnx-platform-api/tests/test_change_event.py b/platform/mellanox/mlnx-platform-api/tests/test_change_event.py index 0d3429c483de..70652dc74591 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_change_event.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_change_event.py @@ -83,7 +83,8 @@ def test_get_change_event_legacy(self, mock_status, mock_time, mock_create_poll, _, change_event = c.get_change_event(timeout) assert 'sfp' in change_event and sfp_index in change_event['sfp'] and change_event['sfp'][sfp_index] == '2' assert 'sfp_error' in change_event and sfp_index in change_event['sfp_error'] and change_event['sfp_error'][sfp_index] == 'some error' - + + @mock.patch('sonic_platform.wait_sfp_ready_task.WaitSfpReadyTask.get_ready_set') @mock.patch('sonic_platform.sfp.SFP.get_fd') @mock.patch('select.poll') @mock.patch('time.time') @@ -91,7 +92,7 @@ def test_get_change_event_legacy(self, mock_status, mock_time, mock_create_poll, @mock.patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', mock.MagicMock(return_value=1)) @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[])) @mock.patch('sonic_platform.module_host_mgmt_initializer.ModuleHostMgmtInitializer.initialize', mock.MagicMock()) - def test_get_change_event_for_module_host_management_mode(self, mock_time, mock_create_poll, mock_get_fd): + def test_get_change_event_for_module_host_management_mode(self, mock_time, mock_create_poll, mock_get_fd, mock_ready): """Test steps: 1. Simulate polling with no event 2. Simulate polling the first dummy event. (SDK always return a event when first polling the fd even if there is no change) @@ -163,6 +164,7 @@ def get_fd(fd_type): s.determine_control_type = mock.MagicMock(return_value=sfp.SFP_FW_CONTROL) s.set_control_type = mock.MagicMock() mock_time.side_effect = [0, timeout] + mock_ready.return_value = set([0]) mock_hw_present_file.read.return_value = sfp.SFP_STATUS_INSERTED _, change_event = c.get_change_event(timeout) assert 'sfp' in change_event and sfp_index in change_event['sfp'] and change_event['sfp'][sfp_index] == sfp.SFP_STATUS_INSERTED @@ -173,6 +175,7 @@ def get_fd(fd_type): print(c.registered_fds) # error event, expect returning error + mock_ready.return_value = [] mock_time.side_effect = [0, timeout] mock_poll.poll.return_value = [(3, 10)] mock_present_file.read.return_value = sfp.SFP_STATUS_ERROR @@ -193,6 +196,7 @@ def get_fd(fd_type): # plug in a software control cable, expect returning insert event mock_time.side_effect = [0, timeout] + mock_ready.return_value = set([0]) mock_poll.poll.return_value = [(1, 10)] mock_hw_present_file.read.return_value = sfp.SFP_STATUS_INSERTED s.determine_control_type.return_value = sfp.SFP_SW_CONTROL diff --git a/platform/mellanox/mlnx-platform-api/tests/test_component.py b/platform/mellanox/mlnx-platform-api/tests/test_component.py index 131220c27f90..d3f4543fd817 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_component.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_component.py @@ -1,5 +1,5 @@ # -# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. +# Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -35,6 +35,8 @@ ComponentBIOSSN2201, \ ComponentCPLD, \ ComponentCPLDSN2201, \ + ComponentCPLDSN4280, \ + ComponenetFPGADPU, \ MPFAManager, \ ONIEUpdater, \ Component @@ -284,6 +286,13 @@ def test_cpld_get_component_list(self): for index, item in enumerate(component_list): assert item.name == 'CPLD{}'.format(index + 1) + @mock.patch('sonic_platform.component.ComponenetFPGADPU._read_generic_file', mock.MagicMock(return_value='4')) + def test_cpld_get_component_list_dpu(self): + component_list = ComponenetFPGADPU.get_component_list() + assert len(component_list) == 4 + for index, item in enumerate(component_list): + assert item.name == 'DPU{}_FPGA'.format(index + 1) + def test_cpld_get_mst_device(self): ComponentCPLD.MST_DEVICE_PATH = '/tmp/mst' os.system('rm -rf /tmp/mst') @@ -302,6 +311,20 @@ def test_cpld_2201_component(self, mock_check_call): mock_check_call.side_effect = subprocess.CalledProcessError(1, None) assert not c._install_firmware('') + @mock.patch('sonic_platform.component.subprocess.check_call') + def test_cpld_4280_component(self, mock_check_call): + c = ComponentCPLDSN4280(1) + assert c._install_firmware('') + mock_check_call.side_effect = subprocess.CalledProcessError(1, None) + assert not c._install_firmware('') + + @mock.patch('sonic_platform.component.subprocess.check_call') + def test_cpld_dpu_component(self, mock_check_call): + c = ComponenetFPGADPU(1) + assert c._install_firmware('') + mock_check_call.side_effect = subprocess.CalledProcessError(1, None) + assert not c._install_firmware('') + @mock.patch('sonic_platform.component.MPFAManager.cleanup') @mock.patch('sonic_platform.component.MPFAManager.extract') def test_mpfa_manager_context(self, mock_extract, mock_cleanup): @@ -353,6 +376,26 @@ def test_onie_updater_parse_onie_version(self): assert onie_minor == '3' assert onie_release == '0010' assert onie_baudrate == '9600' + + # Verify presence of release candidate (rc) string doesn't throw an exception + onie_year, onie_month, onie_major, onie_minor, onie_release, onie_baudrate = \ + o.parse_onie_version('2023.11-5.3.0012-rc2-9600') + assert onie_year == '2023' + assert onie_month == '11' + assert onie_major == '5' + assert onie_minor == '3' + assert onie_release == '0012' + assert onie_baudrate == '9600' + + onie_year, onie_month, onie_major, onie_minor, onie_release, onie_baudrate = \ + o.parse_onie_version('2023.11-5.3.0012-rc24-dev-115200') + assert onie_year == '2023' + assert onie_month == '11' + assert onie_major == '5' + assert onie_minor == '3' + assert onie_release == '0012' + assert onie_baudrate == '115200' + with pytest.raises(RuntimeError): o.parse_onie_version('invalid', is_base=True) with pytest.raises(RuntimeError): @@ -368,6 +411,10 @@ def test_onie_updater_parse_onie_version(self): assert o.get_onie_required_version() == o.ONIE_VERSION_REQUIRED + def test_parse_onie_version_extra_prefix(self): + o = ONIEUpdater() + + @mock.patch('sonic_platform.component.ONIEUpdater.get_onie_version') @mock.patch('sonic_platform.component.device_info.get_platform') def test_onie_updater_is_non_onie_firmware_update_supported(self, mock_platform, mock_version): diff --git a/platform/mellanox/mlnx-platform-api/tests/test_dpuctl.py b/platform/mellanox/mlnx-platform-api/tests/test_dpuctl.py new file mode 100644 index 000000000000..7f6d2be7892b --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/tests/test_dpuctl.py @@ -0,0 +1,161 @@ +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +"""dpuctl Tests Implementation""" +import os +import sys +import json +from tabulate import tabulate + +from click.testing import CliRunner +from smart_switch.dpuctl.main import dpuctl, dpuctl_get_status, dpuctl_power_off, dpuctl_power_on, dpuctl_reset +from sonic_platform.dpuctlplat import DpuCtlPlat +from tests.dpuctl_inputs.dpuctl_test_inputs import testData, status_output + +if sys.version_info.major == 3: + from unittest.mock import MagicMock, patch + + +test_path = os.path.dirname(os.path.abspath(__file__)) +modules_path = os.path.dirname(test_path) +sys.path.insert(0, modules_path) +scripts_path = os.path.join(modules_path, "scripts") +test_ip = os.path.join(modules_path, "tests") +example_platform = os.path.join(str(test_ip), "dpuctl_inputs", "platform.json") + + +def create_dpu_list(): + """Create dpu object list for Function calls""" + existing_dpu_list = ['dpu0', 'dpu1', 'dpu2', 'dpu3'] + dpuctl_dict = {} + for dpu_name in existing_dpu_list: + dpuctl_dict[dpu_name] = DpuCtlPlat(dpu_name) + context = { + "dpuctl_dict": dpuctl_dict, + } + return context + + +obj = create_dpu_list() + + +def dpuctl_command_exec(exec_cmd, command_name): + """General Command Execution and return value + validation function for all the APIs""" + test_data_checks = testData[command_name] + runner = CliRunner() + assertion_checks = test_data_checks['AssertionError'] + for args in assertion_checks['arg_list']: + result = runner.invoke(exec_cmd, args, catch_exceptions=False, obj=obj) + assert "AssertionError" in result.output + + result_checks = test_data_checks['Returncheck'] + for index_value in range(len(result_checks['arg_list'])): + print(index_value) + args = result_checks['arg_list'][index_value] + return_code = result_checks['rc'][index_value] + return_message = result_checks['return_message'][index_value] + return_message = return_message.replace('"', "'").lower() + result = runner.invoke(exec_cmd, args, catch_exceptions=False, obj=obj) + assert result.exit_code == return_code + assert return_message == result.output.replace('"', "'").lower() + + +class Testdpuctl: + """Tests for dpuctl Platform API Wrapper""" + @classmethod + def setup_class(cls): + """Setup function for all tests for dpuctl implementation""" + os.environ["PATH"] += os.pathsep + scripts_path + os.environ["MLNX_PLATFORM_API_DPUCTL_UNIT_TESTING"] = "2" + + @patch('multiprocessing.Process.start', MagicMock(return_value=True)) + @patch('multiprocessing.Process.join', MagicMock(return_value=True)) + def test_dpuctl_power_off(self): + """Tests for dpuctl click Implementation for Power Off API""" + exec_cmd = dpuctl_power_off + dpuctl_command_exec(exec_cmd, "PW_OFF") + + @patch('multiprocessing.Process.start', MagicMock(return_value=True)) + @patch('multiprocessing.Process.join', MagicMock(return_value=True)) + def test_dpuctl_power_on(self): + """Tests for dpuctl click Implementation for Power On API""" + exec_cmd = dpuctl_power_on + dpuctl_command_exec(exec_cmd, "PW_ON") + + @patch('multiprocessing.Process.start', MagicMock(return_value=True)) + @patch('multiprocessing.Process.join', MagicMock(return_value=True)) + def test_dpuctl_reset(self): + """Tests for dpuctl click Implementation for Reset API""" + exec_cmd = dpuctl_reset + dpuctl_command_exec(exec_cmd, "RST") + + def test_dpuctl_status(self): + """Tests for dpuctl click Implementation for Status API""" + mock_file_list = ['shtdn_ready', '_ready', 'boot_progress'] + mock_return_value = [0, 1, 5] + + def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_func=None): + for index, value in enumerate(mock_file_list): + if file_path.endswith(value): + return mock_return_value[index] + return 0 + + with patch("sonic_platform.utils.read_int_from_file", wraps=mock_read_int_from_file): + cmd = dpuctl_get_status + runner = CliRunner() + result = runner.invoke(cmd, catch_exceptions=False, obj=obj) + assert result.output == status_output[0] + result = runner.invoke(cmd, ['dpu1'], catch_exceptions=False, obj=obj) + assert result.output == status_output[1] + result = runner.invoke(cmd, ['dpu0'], catch_exceptions=False, obj=obj) + assert result.output == status_output[2] + result = runner.invoke(cmd, ['dpu5'], catch_exceptions=False, obj=obj) + assert result.output == status_output[3] + result = runner.invoke(cmd, ['dpu10'], catch_exceptions=False, obj=obj) + assert result.output == status_output[4] + mock_return_value = [1, 0, 0] + result = runner.invoke(cmd, catch_exceptions=False, obj=obj) + assert result.output == status_output[5] + header = ["DPU", "dpu ready", "dpu shutdown ready", "boot progress"] + boot_prog_map = { + 0: "Reset/Boot-ROM", + 1: "BL2 (from ATF image on eMMC partition)", + 2: "BL31 (from ATF image on eMMC partition)", + 3: "UEFI (from UEFI image on eMMC partition)", + 4: "OS Starting", + 5: "OS is running", + 6: "Low-Power Standby", + 7: "FW Update in progress", + 8: "OS Crash Dump in progress", + 9: "OS Crash Dump is complete", + 10: "FW Fault Crash Dump in progress", + 11: "FW Fault Crash Dump is complete", + 15: "Software is inactive" + } + for key in boot_prog_map.keys(): + mock_return_value = [0, 1, key] + result = runner.invoke(cmd, ['dpu1'], catch_exceptions=False, obj=obj) + expected_value = f"{key} - {boot_prog_map.get(key)}" + expected_data = [[status_output[6][0], status_output[6][1], status_output[6][2], expected_value]] + expected_res = tabulate(expected_data, header) + assert result.output == expected_res + "\n" + mock_return_value = [5, 5, 25] + expected_data = [["dpu1", "5 - N/A", "5 - N/A", "25 - N/A"]] + result = runner.invoke(cmd, ['dpu1'], catch_exceptions=False, obj=obj) + expected_res = tabulate(expected_data, header) + assert result.output == expected_res + "\n" diff --git a/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py b/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py new file mode 100644 index 000000000000..7340a0041953 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py @@ -0,0 +1,478 @@ +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +"""dpuctlplat Tests Implementation""" +import os +import sys +import pytest +from sonic_platform.dpuctlplat import DpuCtlPlat, dpu_map, BootProgEnum + +from unittest.mock import MagicMock, patch, Mock, call + +test_path = os.path.dirname(os.path.abspath(__file__)) +modules_path = os.path.dirname(test_path) +sys.path.insert(0, modules_path) +scripts_path = os.path.join(modules_path, "scripts") + + +def create_dpu_list(): + """Create dpu object list for Function calls""" + existing_dpu_list = ['dpu0', 'dpu1', 'dpu2', 'dpu3'] + dpuctl_list = [] + for dpu_name in existing_dpu_list: + dpuctl_obj = DpuCtlPlat(dpu_name) + dpuctl_obj.setup_logger(True) + dpuctl_list.append(dpuctl_obj) + context = { + "dpuctl_list": dpuctl_list, + } + return context + + +obj = create_dpu_list() + + +class TestDpuClass: + """Tests for dpuctl Platform API Wrapper""" + @classmethod + def setup_class(cls): + """Setup function for all tests for dpuctl implementation""" + os.environ["PATH"] += os.pathsep + scripts_path + os.environ["MLNX_PLATFORM_API_DPUCTL_UNIT_TESTING"] = "2" + + @patch('os.path.exists', MagicMock(return_value=True)) + @patch('multiprocessing.Process.start', MagicMock(return_value=True)) + @patch('multiprocessing.Process.is_alive', MagicMock(return_value=False)) + @patch('sonic_platform.inotify_helper.InotifyHelper.wait_watch') + @patch('sonic_platform.inotify_helper.InotifyHelper.__init__') + @patch('subprocess.check_output', MagicMock(return_value=True)) + def test_power_off(self, mock_inotify, mock_add_watch): + """Tests for Per DPU Power Off function""" + dpuctl_obj = obj["dpuctl_list"][0] + mock_inotify.return_value = None + mock_add_watch.return_value = True + written_data = [] + + def mock_write_file(file_name, content_towrite): + written_data.append({"file": file_name, + "data": content_towrite}) + return True + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)): + assert dpuctl_obj.dpu_power_off(True) + assert written_data[0]["file"].endswith( + f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert "1" == written_data[0]["data"] + assert "0" == written_data[1]["data"] + assert written_data[1]["file"].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[2]["data"] + assert written_data[2]["file"].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + written_data = [] + assert dpuctl_obj.dpu_power_off(False) + assert mock_inotify.call_args.args[0].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_shtdn_ready") + assert written_data[0]["file"].endswith( + f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[1]["data"] + assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr") + assert "0" == written_data[2]["data"] + written_data = [] + mock_add_watch.return_value = None + assert dpuctl_obj.dpu_power_off(False) + assert mock_inotify.call_args.args[0].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_shtdn_ready") + assert written_data[0]["file"].endswith( + f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[1]["data"] + assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[2]["data"] + assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "0" == written_data[3]["data"] + # Test whether value of boot_progress changes power off to force_power_off + with patch.object(dpuctl_obj, 'read_boot_prog') as mock_boot_prog, \ + patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch.object(dpuctl_obj, '_power_off_force') as mock_power_off_force, \ + patch.object(dpuctl_obj, '_power_off') as mock_power_off, \ + patch.object(dpuctl_obj, 'log_info') as mock_obj: + mock_boot_prog.return_value = BootProgEnum.RST.value + mock_add_watch.return_value = True + assert dpuctl_obj.dpu_power_off(False) + assert mock_obj.call_args_list[1].args[0] == "Power off with force = True since since OS is not in running state on DPU" + mock_power_off_force.assert_called_once() + mock_power_off.assert_not_called() + mock_boot_prog.return_value = BootProgEnum.OS_RUN.value + mock_power_off_force.reset_mock() + mock_power_off.reset_mock() + assert dpuctl_obj.dpu_power_off(False) + mock_power_off_force.assert_not_called() + mock_power_off.assert_called_once() + + + @patch('os.path.exists', MagicMock(return_value=True)) + @patch('multiprocessing.Process.start', MagicMock(return_value=True)) + @patch('multiprocessing.Process.is_alive', MagicMock(return_value=False)) + @patch('sonic_platform.inotify_helper.InotifyHelper.wait_watch') + @patch('sonic_platform.inotify_helper.InotifyHelper.__init__') + @patch('subprocess.check_output', MagicMock(return_value=True)) + def test_power_on(self, mock_inotify, mock_add_watch): + """Tests for Per DPU Power On function""" + dpuctl_obj = obj["dpuctl_list"][0] + mock_inotify.return_value = None + mock_add_watch.return_value = True + written_data = [] + + def mock_write_file(file_name, content_towrite): + written_data.append({"file": file_name, + "data": content_towrite}) + return True + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch.object(dpuctl_obj, 'wait_for_pci', wraps=MagicMock(return_value=None)), \ + patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)): + assert dpuctl_obj.dpu_power_on(True) + assert mock_inotify.call_args.args[0].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_ready") + assert written_data[0]["file"].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[1]["data"] + written_data = [] + assert dpuctl_obj.dpu_power_on(False) + assert written_data[0]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[1]["data"] + assert written_data[2]["file"].endswith(f"rescan") + assert "1" == written_data[2]["data"] + written_data = [] + mock_add_watch.return_value = None + assert not dpuctl_obj.dpu_power_on(False) + assert len(written_data) == 19 + assert written_data[0]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[1]["data"] + for i in range(4): + assert written_data[2 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[2 + 4 * i]["data"] + assert written_data[3 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "0" == written_data[3 + 4 * i]["data"] + assert written_data[4 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "1" == written_data[4 + 4 * i]["data"] + assert written_data[5 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[5 + 4 * i]["data"] + assert written_data[18]["file"].endswith(f"rescan") + assert "1" == written_data[18]["data"] + + @patch('os.path.exists', MagicMock(return_value=True)) + @patch('multiprocessing.Process.start', MagicMock(return_value=True)) + @patch('multiprocessing.Process.is_alive', MagicMock(return_value=False)) + @patch('sonic_platform.inotify_helper.InotifyHelper.wait_watch') + @patch('sonic_platform.inotify_helper.InotifyHelper.__init__') + def test_dpu_reset(self, mock_inotify, mock_add_watch): + """Tests for Per DPU Reset function""" + dpuctl_obj = obj["dpuctl_list"][0] + mock_inotify.return_value = None + mock_add_watch.return_value = True + written_data = [] + + def mock_write_file(file_name, content_towrite): + written_data.append({"file": file_name, + "data": content_towrite}) + return True + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)), \ + patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)): + dpuctl_obj.write_file = mock_write_file + assert dpuctl_obj.dpu_reboot(False) + assert len(written_data) == 4 + assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[1]["data"] + assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[2]["data"] + assert written_data[3]["file"].endswith(f"rescan") + assert "1" == written_data[3]["data"] + assert mock_inotify.call_args.args[0].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_ready") + mock_add_watch.return_value = None + written_data = [] + assert not dpuctl_obj.dpu_reboot() + assert len(written_data) == 22 + assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[1]["data"] + assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[2]["data"] + assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "0" == written_data[3]["data"] + assert written_data[4]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[4]["data"] + for i in range(4): + assert written_data[5 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[5 + 4 * i]["data"] + assert written_data[6 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "0" == written_data[6 + 4 * i]["data"] + assert written_data[7 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "1" == written_data[7 + 4 * i]["data"] + assert written_data[8 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[8 + 4 * i]["data"] + assert written_data[21]["file"].endswith(f"rescan") + assert "1" == written_data[21]["data"] + # Force Reboot + mock_inotify.reset_mock() + mock_add_watch.return_value = True + mock_inotify.return_value = None + written_data=[] + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)), \ + patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)): + dpuctl_obj.write_file = mock_write_file + assert dpuctl_obj.dpu_reboot(True) + mock_add_watch.return_value = None + assert len(written_data) == 6 + assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[1]["data"] + assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "0" == written_data[2]["data"] + assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "1" == written_data[3]["data"] + assert written_data[4]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[4]["data"] + assert written_data[5]["file"].endswith(f"rescan") + assert "1" == written_data[5]["data"] + assert mock_inotify.call_args.args[0].endswith( + f"{dpuctl_obj.get_hwmgmt_name()}_ready") + mock_add_watch.return_value = None + written_data = [] + assert not dpuctl_obj.dpu_reboot(True) + assert len(written_data) == 18 + assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove") + assert "1" == written_data[0]["data"] + assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[1]["data"] + assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "0" == written_data[2]["data"] + assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "1" == written_data[3]["data"] + assert written_data[4]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[4]["data"] + for i in range(3): + assert written_data[5 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "0" == written_data[5 + 4 * i]["data"] + assert written_data[6 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "0" == written_data[6 + 4 * i]["data"] + assert written_data[7 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force") + assert "1" == written_data[7 + 4 * i]["data"] + assert written_data[8 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst") + assert "1" == written_data[8 + 4 * i]["data"] + assert written_data[17]["file"].endswith(f"rescan") + assert "1" == written_data[17]["data"] + # Test whether value of boot_progress changes power off to force_power_off + with patch.object(dpuctl_obj, 'read_boot_prog') as mock_boot_prog, \ + patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch.object(dpuctl_obj, '_reboot') as mock_reset, \ + patch.object(dpuctl_obj, '_reboot_force') as mock_reset_force, \ + patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)), \ + patch.object(dpuctl_obj, 'log_info') as mock_obj: + mock_boot_prog.return_value = BootProgEnum.RST.value + mock_add_watch.return_value = True + assert dpuctl_obj.dpu_reboot(False) + assert mock_obj.call_args_list[1].args[0] == "Reboot with force = True since OS is not in running state on DPU" + mock_reset_force.assert_called_once() + mock_reset.assert_not_called() + mock_boot_prog.return_value = 5 + mock_reset_force.reset_mock() + mock_reset.reset_mock() + assert dpuctl_obj.dpu_reboot(False) + mock_reset_force.assert_not_called() + mock_reset.assert_called_once() + + def test_prog_update(self): + dpuctl_obj = obj["dpuctl_list"][0] + dpuctl_obj.boot_prog_path = os.path.join(test_path, 'mock_dpu_boot_prog') + + class Dummy: + def poll(self): + return True + dummy_obj = Dummy() + mock_file_path = "mock_dpu_boot_prog" + mock_val = 0 + boot_prog_map = dpuctl_obj.boot_prog_map + + def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_func=None): + if file_path.endswith(mock_file_path): + return mock_val + else: + return 0 + with patch("sonic_platform.utils.read_int_from_file", wraps=mock_read_int_from_file), \ + patch.object(dpuctl_obj, 'wait_for_pci', wraps=MagicMock(return_value=None)), \ + patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)): + for key_val in boot_prog_map.keys(): + mock_val = key_val + dpuctl_obj.update_boot_prog_once(dummy_obj) + assert dpuctl_obj.boot_prog_state == key_val + assert dpuctl_obj.boot_prog_indication == f"{key_val} - {boot_prog_map.get(key_val)}" + mock_val = 25 + dpuctl_obj.update_boot_prog_once(dummy_obj) + assert dpuctl_obj.boot_prog_state == 25 + assert dpuctl_obj.boot_prog_indication == "25 - N/A" + mock_val = 36 + dpuctl_obj.update_boot_prog_once(dummy_obj) + assert dpuctl_obj.boot_prog_state == 36 + assert dpuctl_obj.boot_prog_indication == "36 - N/A" + mock_file_path = "dpu1_ready" + mock_val = 1 + dpuctl_obj.dpu_status_update() + assert dpuctl_obj.boot_prog_state == 0 + assert dpuctl_obj.boot_prog_indication == f"0 - {boot_prog_map.get(0)}" + assert dpuctl_obj.dpu_ready_state == 1 + assert dpuctl_obj.dpu_ready_indication == f"True" + assert dpuctl_obj.dpu_shtdn_ready_state == 0 + assert dpuctl_obj.dpu_shtdn_ready_indication == f"False" + mock_file_path = "dpu1_shtdn_ready" + dpuctl_obj.dpu_status_update() + assert dpuctl_obj.boot_prog_state == 0 + assert dpuctl_obj.boot_prog_indication == f"0 - {boot_prog_map.get(0)}" + assert dpuctl_obj.dpu_ready_state == 0 + assert dpuctl_obj.dpu_ready_indication == "False" + assert dpuctl_obj.dpu_shtdn_ready_state == 1 + assert dpuctl_obj.dpu_shtdn_ready_indication == "True" + mock_file_path = "dpu1_shtdn_ready" + mock_val = 25 + dpuctl_obj.dpu_status_update() + assert dpuctl_obj.dpu_shtdn_ready_indication == "25 - N/A" + mock_file_path = "dpu1_ready" + mock_val = 50 + dpuctl_obj.dpu_status_update() + assert dpuctl_obj.dpu_ready_indication == "50 - N/A" + + @patch('os.path.exists') + @patch('os.open', MagicMock(return_value=-1)) + @patch('os.close', MagicMock(return_value=None)) + @patch('sonic_platform.dpuctlplat.poll') + def test_pci_func(self, m1, mock_exists): + dpuctl_obj = obj["dpuctl_list"][0] + mock_exists.return_value = False + mock_obj = Mock() + mock_obj.register.return_value = None + mock_obj.poll.return_value = None + m1.return_value = mock_obj + timeout_val = 45 + + def mock_time_diff(): + mock_time_diff.counter += 1 + return mock_time_diff.counter * timeout_val + mock_time_diff.counter = 0 + with patch("time.time", wraps=mock_time_diff): + # PCI Device is not recognized + assert not dpuctl_obj.wait_for_pci() + assert f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}" in mock_exists.call_args.args[0] + mock_obj.register.assert_called_once() + mock_obj.poll.assert_called_once() + # PCI device is recognized immediately + mock_obj.reset_mock() + mock_exists.reset_mock() + mock_exists.return_value = True + assert dpuctl_obj.wait_for_pci() + assert f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}" in mock_exists.call_args.args[0] + mock_obj.register.assert_not_called() + mock_obj.poll.assert_not_called() + # PCI device is added later (Detected in Loop) + timeout_val = 20 + mock_exists.reset_mock() + mock_obj.reset_mock() + mock_exists.side_effect = [False, True] + mock_obj.poll.return_value = True + assert dpuctl_obj.wait_for_pci() + mock_obj.register.assert_called_once() + mock_obj.poll.assert_called_once() + # PCI device is added later (Detected at the end) + timeout_val = 80 + mock_exists.reset_mock() + mock_obj.reset_mock() + mock_exists.side_effect = [False, True] + assert dpuctl_obj.wait_for_pci() + mock_obj.register.assert_called_once() + mock_obj.poll.assert_not_called() + with patch.object(dpuctl_obj, '_name', "dpua"), patch.object(dpuctl_obj, 'log_error') as mock_obj: + dpuctl_obj.wait_for_pci() + mock_obj.assert_called_once_with("Unable to wait for PCI device") + + def test_rshim_service(self): + dpuctl_obj = obj["dpuctl_list"][0] + with patch.object(dpuctl_obj, 'run_cmd_output') as mock_method: + dpuctl_obj.dpu_rshim_service_control('start') + mock_method.assert_called_once() + cmd_string = ' '.join(mock_method.call_args.args[0]) + cmd_string == f"systemctl start {dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('rshim')}.service" + mock_method.reset_mock() + dpuctl_obj.dpu_rshim_service_control('stop') + cmd_string == f"systemctl stop {dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('rshim')}.service" + mock_method.assert_called_once() + with pytest.raises(TypeError): + dpuctl_obj.dpu_rshim_service_control() + with patch.object(dpuctl_obj, 'get_hwmgmt_name', return_value="dpu5"), patch.object(dpuctl_obj, 'log_error') as mock_obj: + dpuctl_obj.dpu_rshim_service_control('start') + mock_obj.assert_called_once_with("Failed to start rshim!") + + def test_pre_and_post(self): + dpuctl_obj = obj["dpuctl_list"][0] + with patch.object(dpuctl_obj, 'dpu_rshim_service_control') as mock_rshim, patch.object(dpuctl_obj, 'write_file') as mock_write: + manager_mock = Mock() + manager_mock.attach_mock(mock_rshim, 'rshim') + manager_mock.attach_mock(mock_write, 'write') + dpuctl_obj.dpu_pre_shutdown() + mock_rshim.assert_called_once() + mock_write.assert_called_once() + # Confirm the order of calls and the parameters + manager_mock.mock_calls[0] == call.rshim('stop') + manager_mock.mock_calls[1] == call.rshim(dpuctl_obj.pci_dev_path, '1') + # Test post startup + mock_rshim.reset_mock() + mock_write.reset_mock() + manager_mock.reset_mock() + with patch.object(dpuctl_obj, 'wait_for_pci') as mock_pci: + manager_mock.attach_mock(mock_rshim, 'rshim') + manager_mock.attach_mock(mock_write, 'write') + manager_mock.attach_mock(mock_pci, 'pci') + dpuctl_obj.dpu_post_startup() + mock_rshim.assert_called_once() + mock_write.assert_called_once() + mock_pci.assert_called_once() + # Confirm the order of calls and the parameters + manager_mock.mock_calls[0] == call.rshim('/sys/bus/pci/rescan', '1') + manager_mock.mock_calls[1] == call.pci() + manager_mock.mock_calls[2] == call.rshim('start') + + @classmethod + def teardown_class(cls): + """Teardown function for all tests for dpuctl implementation""" + os.environ["MLNX_PLATFORM_API_DPUCTL_UNIT_TESTING"] = "0" + os.environ["PATH"] = os.pathsep.join( + os.environ["PATH"].split(os.pathsep)[:-1]) diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp_sm.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp_sm.py index 9f2154173d32..a1e4a0280037 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_sfp_sm.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp_sm.py @@ -168,3 +168,16 @@ def test_sw_control(self): s.disable_tx_for_sff_optics = mock.MagicMock() s.on_event(sfp.EVENT_START) assert s.get_state() == sfp.STATE_SW_CONTROL + + @mock.patch('sonic_platform.device_data.DeviceDataManager.get_always_fw_control_ports', mock.MagicMock(return_value=[0])) + def test_fcp_state(self): + self.mock_value('present', 1) + s = sfp.SFP(0) + s.on_event(sfp.EVENT_START) + assert s.get_state() == sfp.STATE_FCP_PRESENT + + self.mock_value('present', 0) + s = sfp.SFP(0) + s.on_event(sfp.EVENT_START) + assert s.get_state() == sfp.STATE_FCP_NOT_PRESENT + diff --git a/platform/mellanox/non-upstream-patches/external-changes.patch b/platform/mellanox/non-upstream-patches/external-changes.patch index ffc749cfc05a..cde69e93e127 100644 --- a/platform/mellanox/non-upstream-patches/external-changes.patch +++ b/platform/mellanox/non-upstream-patches/external-changes.patch @@ -1,13 +1,14 @@ --- a/patch/kconfig-inclusions +++ b/patch/kconfig-inclusions -@@ -117,6 +117,9 @@ +@@ -124,6 +124,10 @@ CONFIG_PINCTRL_AMD=y CONFIG_EDAC_AMD64=m CONFIG_AMD_XGBE_DCB=y +CONFIG_USB_NET_DRIVERS=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_CDCETHER=m ++CONFIG_HOTPLUG_PCI_PCIE=n ###-> mellanox_amd64-end # For Cisco 8000 CONFIG_PHYLIB=m diff --git a/platform/mellanox/rshim.mk b/platform/mellanox/rshim.mk index 9a375aec8c1b..13ec5951cfbf 100644 --- a/platform/mellanox/rshim.mk +++ b/platform/mellanox/rshim.mk @@ -15,7 +15,7 @@ # limitations under the License. # -MLNX_RSHIM_DRIVER_VERSION = 2.0.19 +MLNX_RSHIM_DRIVER_VERSION = 2.0.29 MLNX_RSHIM_ASSETS_GITHUB_URL = https://github.com/Mellanox/sonic-bluefield-packages MLNX_RSHIM_ASSETS_RELEASE_TAG = rshim-$(MLNX_RSHIM_DRIVER_VERSION)-$(BLDENV)-$(CONFIGURED_ARCH) MLNX_RSHIM_ASSETS_URL = $(MLNX_RSHIM_ASSETS_GITHUB_URL)/releases/download/$(MLNX_RSHIM_ASSETS_RELEASE_TAG) diff --git a/platform/mellanox/rshim/.gitignore b/platform/mellanox/rshim/.gitignore index 6dbdff4573bb..1ccb02ed83b3 100644 --- a/platform/mellanox/rshim/.gitignore +++ b/platform/mellanox/rshim/.gitignore @@ -3,3 +3,4 @@ # Except these files !.gitignore !Makefile +!files/* diff --git a/platform/mellanox/rshim/Makefile b/platform/mellanox/rshim/Makefile index fee2e6ec7c5f..4a8099e61a3b 100644 --- a/platform/mellanox/rshim/Makefile +++ b/platform/mellanox/rshim/Makefile @@ -31,6 +31,10 @@ $(addprefix $(DEST)/, $(MLNX_RSHIM)): $(DEST)/% : tar xf rshim-${MLNX_RSHIM_DRIVER_VERSION}.tar.gz -C rshim_src --strip-components=1 pushd rshim_src + patch -p1 < ../rename_tmfifo_to_dpu.patch + + # disable default systemd service + sed -i 's/ dh_auto_configure/ dh_auto_configure -- --with-systemdsystemunitdir=no/' debian/rules # Build the package DEB_BUILD_OPTIONS=nocheck dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) diff --git a/platform/mellanox/rshim/files/rshim-manager.service b/platform/mellanox/rshim/files/rshim-manager.service new file mode 100644 index 000000000000..4998bd3ff22c --- /dev/null +++ b/platform/mellanox/rshim/files/rshim-manager.service @@ -0,0 +1,11 @@ +[Unit] +Description=Starts rshim driver for all DPUs +After=network.target +Wants=rshim@0.service rshim@1.service rshim@2.service rshim@3.service + +[Service] +Type=oneshot +ExecStart=/bin/true + +[Install] +WantedBy=multi-user.target diff --git a/platform/mellanox/rshim/files/rshim.sh b/platform/mellanox/rshim/files/rshim.sh new file mode 100644 index 000000000000..e384ba9c18b2 --- /dev/null +++ b/platform/mellanox/rshim/files/rshim.sh @@ -0,0 +1,44 @@ +#!/usr/bin/env bash +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +if [ $# -eq 0 ]; then + echo "Usage: $0 " + exit 1 +fi + +dpu_id=$1 + +declare -A dpu2pcie +dpu2pcie[0]="06:00.0" +dpu2pcie[1]="05:00.0" +dpu2pcie[2]="01:00.0" +dpu2pcie[3]="02:00.0" + +if [ -z "${dpu2pcie[$dpu_id]}" ]; then + echo "Error: Invalid dpu index $dpu_id" + exit 1 +fi + +pcie=${dpu2pcie[$dpu_id]} + +if ! lspci | grep $pcie > /dev/null; then + echo "PCIE device $pcie is not available" + exit 1 +fi + +/usr/sbin/rshim -i $dpu_id -d pcie-0000:$pcie diff --git a/platform/mellanox/rshim/files/rshim@.service b/platform/mellanox/rshim/files/rshim@.service new file mode 100644 index 000000000000..a3e26418d7e5 --- /dev/null +++ b/platform/mellanox/rshim/files/rshim@.service @@ -0,0 +1,13 @@ +[Unit] +Description=rshim driver for DPU %I +Documentation=man:rshim(8) +After=network.target + +[Service] +Restart=always +Type=forking +ExecStart=/usr/bin/rshim.sh %i +KillMode=control-group + +[Install] +WantedBy=multi-user.target diff --git a/platform/mellanox/rshim/rename_tmfifo_to_dpu.patch b/platform/mellanox/rshim/rename_tmfifo_to_dpu.patch new file mode 100644 index 000000000000..f01880d0c1f0 --- /dev/null +++ b/platform/mellanox/rshim/rename_tmfifo_to_dpu.patch @@ -0,0 +1,13 @@ +diff --git a/src/rshim_net.c b/src/rshim_net.c +index a9e8663..7214df2 100644 +--- a/src/rshim_net.c ++++ b/src/rshim_net.c +@@ -263,7 +263,7 @@ int rshim_net_init(rshim_backend_t *bd) + char ifname[IFNAMSIZ]; + int rc, fd[2]; + +- snprintf(ifname, sizeof(ifname), "tmfifo_net%d", bd->index); ++ snprintf(ifname, sizeof(ifname), "dpu%d", bd->index); + bd->net_fd = rshim_if_open(ifname, bd->index); + + if (bd->net_fd < 0) diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk index 15ccedc7b606..14b0caceb919 100644 --- a/platform/mellanox/sdk.mk +++ b/platform/mellanox/sdk.mk @@ -14,7 +14,7 @@ # See the License for the specific language governing permissions and # limitations under the License. # -MLNX_SDK_VERSION = 4.6.4062 +MLNX_SDK_VERSION = 4.6.4082 MLNX_SDK_ISSU_VERSION = 101 MLNX_SDK_DRIVERS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers diff --git a/platform/mellanox/sonic-bfb-installer.sh b/platform/mellanox/sonic-bfb-installer.sh index 57930d991c64..8950797fed7f 100755 --- a/platform/mellanox/sonic-bfb-installer.sh +++ b/platform/mellanox/sonic-bfb-installer.sh @@ -26,12 +26,12 @@ usage(){ echo "-c Config file" echo "-h Help" } +WORK_DIR=`mktemp -d -p "$DIR"` bfb_install_call(){ #Example:sudo bfb-install -b -r rshim - local result_file=$(mktemp "/tmp/result_file.XXXXX") - trap "rm -f $result_file" EXIT - local cmd="timeout 300s bfb-install -b $2 -r $1 $appendix" + local result_file=$(mktemp "${WORK_DIR}/result_file.XXXXX") + local cmd="timeout 600s bfb-install -b $2 -r $1 $appendix" echo "Installing bfb image on DPU connected to $1 using $cmd" local indicator="$1:" eval "$cmd" > "$result_file" 2>&1 > >(while IFS= read -r line; do echo "$indicator $line"; done > "$result_file") @@ -44,7 +44,26 @@ bfb_install_call(){ if [ $exit_status -ne 0 ] ||[ $verbose = true ]; then cat "$result_file" fi - rm -f $result_file +} + +file_cleanup(){ + rm -rf "$WORK_DIR" +} + +is_url() { + local link=$1 + if [[ $link =~ https?:// ]]; then + echo "Detected URL. Downloading file" + filename="${WORK_DIR}/sonic-nvidia-bluefield.bfb" + curl -L -o "$filename" "$link" + res=$? + if test "$res" != "0"; then + echo "the curl command failed with: $res" + exit 1 + fi + bfb="$filename" + echo "bfb path changed to $bfb" + fi } validate_rshim(){ @@ -71,8 +90,6 @@ check_for_root(){ fi } - - main(){ check_for_root local config= @@ -104,13 +121,16 @@ main(){ echo "Error : bfb image is not provided." usage exit 1 + else + is_url $bfb fi + trap "file_cleanup" EXIT if [[ -f ${config} ]]; then echo "Using ${config} file" appendix="-c ${config}" fi dev_names_det+=($( - ls /dev/rshim* | awk -F'/' '/^\/dev\/rshim/ {gsub(/:/,"",$NF); print $NF}' + ls -d /dev/rshim? | awk -F'/' '{print $NF}' )) if [ "${#dev_names_det[@]}" -eq 0 ]; then echo "No rshim interfaces detected! Make sure to run the $command_name script from the host device/ switch!" @@ -127,7 +147,7 @@ main(){ echo "${dev_names_det[@]}" else IFS=',' read -ra dev_names <<< "$rshim_dev" - validate_rshim $dev_names + validate_rshim ${dev_names[@]} fi fi trap 'kill_ch_procs' SIGINT SIGTERM SIGHUP @@ -148,7 +168,7 @@ kill_all_descendant_procs() { done fi if [[ "$self_kill" == true ]]; then - kill -15 "$pid" > /dev/null 2>&1 + kill -9 "$pid" > /dev/null 2>&1 fi } diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh b/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh index 0c74cfbe5068..76b785c9b536 100755 --- a/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh +++ b/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh @@ -16,6 +16,7 @@ # limitations under the License. # +pci_iface=eth0-midplane cp_iface=Ethernet0 pidfile=/run/dhcl-internal.$cp_iface.pid leasefile=/var/lib/dhcp/dhcl-internal.$cp_iface.leases @@ -55,12 +56,23 @@ stop() rmmod mlx5_ib mlx5_core } +configure_pci_iface() +{ + mgmt_mac=$(cat /sys/devices/platform/MLNXBF17:00/net/*/address) + + # Set PCI interface MAC address to the MAC address of the mgmt interface + ip link set dev $pci_iface address $mgmt_mac +} + case "$1" in start|stop) $1 ;; + configure-pci-iface) + configure_pci_iface + ;; *) - echo "Usage: $0 {start|stop}" + echo "Usage: $0 {start|stop|configure-pci-iface}" exit 1 ;; esac diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/systemd/dpu.service b/platform/nvidia-bluefield/bluefield-platform-modules/systemd/dpu.service index e713ca18e748..fc4c50d69de7 100644 --- a/platform/nvidia-bluefield/bluefield-platform-modules/systemd/dpu.service +++ b/platform/nvidia-bluefield/bluefield-platform-modules/systemd/dpu.service @@ -5,7 +5,8 @@ After=getty.target [Service] Type=oneshot ExecStartPre=/usr/bin/bfrshlog "Linux up" -ExecStart=/usr/bin/bfrshlog "DPU is ready" +ExecStartPre=/usr/bin/bfrshlog "DPU is ready" +ExecStart=/usr/bin/bfup StandardOutput=journal+console [Install] diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/udev/91-tmfifo_net.rules b/platform/nvidia-bluefield/bluefield-platform-modules/udev/91-tmfifo_net.rules index 540908d69445..af1c3f8e5423 100644 --- a/platform/nvidia-bluefield/bluefield-platform-modules/udev/91-tmfifo_net.rules +++ b/platform/nvidia-bluefield/bluefield-platform-modules/udev/91-tmfifo_net.rules @@ -1 +1 @@ -SUBSYSTEM=="net", ACTION=="add", DEVPATH=="/devices/platform/MLNXBF01:00/virtio1/net/eth*", NAME="tmfifo_net0" \ No newline at end of file +SUBSYSTEM=="net", ACTION=="add", DEVPATH=="/devices/platform/MLNXBF01:00/virtio1/net/eth*", NAME="eth0-midplane", RUN+="/usr/bin/bfnet.sh configure-pci-iface" diff --git a/platform/nvidia-bluefield/installer/create_sonic_image b/platform/nvidia-bluefield/installer/create_sonic_image new file mode 100755 index 000000000000..8e18f1b7fe80 --- /dev/null +++ b/platform/nvidia-bluefield/installer/create_sonic_image @@ -0,0 +1,420 @@ +#!/bin/bash +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +set -x +set -e + +WDIR= +IMAGE_VERSION= +KERNEL_VERSION= +CHROOT_DIR= +INITRD= +VMLINUZ= +MODULES_DIR= + +SIGNING_CERT= +SIGNING_KEY= +CDIR=/sonic/ +SDIR=$CDIR/platform/${CONFIGURED_PLATFORM}/installer/ +DDIR=$CDIR +CAPSULE=/lib/firmware/mellanox/boot/capsule/boot_update2.cap +BOOTCTL_DRIVER= +TMFIFO_DRIVER= +SDHCI_OF_DWCMSHC_DRIVER= +TARGET_MACHINE=nvidia-bluefield +BFB="${BFB:-/lib/firmware/mellanox/boot/default.bfb}" +GRUB_AA64=grubnetaa64.efi +GRUB_CFG="" # Common Grub Config +BF2_BOOT_ARGS="console=ttyAMA1 console=hvc0 console=ttyAMA0 earlycon=pl011,0x01000000 earlycon=pl011,0x01800000" +BF2_GRUB_CFG="$BF2_BOOT_ARGS isolcpus=1-7 nohz_full=1-7 rcu_nocbs=1-7" +BF3_BOOT_ARGS="console=ttyAMA1 console=hvc0 console=ttyAMA0 earlycon=pl011,0x13010000" +BF3_GRUB_CFG="$BF3_BOOT_ARGS isolcpus=1-13 nohz_full=1-13 rcu_nocbs=1-13" + +usage() { +cat << EOF +Usage: `basename $0` [ OPTIONS ] +OPTIONS: +-k, --kernel Kernel version for the SmartNIC. +-sc, --signing-cert Secure upgrade signing certificate. +-sk, --signing-key Secure upgrade signing key. +-v, --verbose Run script in verbose mode. Will print out each step of execution. +-h, --help Display help +EOF +} +parse_args() { + while [[ $@ != "" ]]; do + case $1 in + -h|--help) + usage + exit 0 + ;; + -v|--verbose) + shift + set -x + ;; + -k|--kernel) + shift + KERNEL_VERSION=$1 + ;; + -sc|--signing-cert) + shift + echo "signing cert $1" + SIGNING_CERT="$1" + ;; + -sk|--signing-key) + shift + echo "signing key $1" + SIGNING_KEY="$1" + ;; + *) + usage + exit 1 + ;; + esac + shift + done +} + +clean_dir() +{ + rm -rf $1 + exit $2 +} + +validate_config() { + if [[ ! -f "$INITRD" ]]; then + echo "[create_sonic_image] Error! SONiC INITRD not found" + exit 1 + fi + + if [[ ! -f "$VMLINUZ" ]]; then + echo "[create_sonic_image] Error! SONiC VMLINUZ not found" + exit 1 + fi + + if [[ ! -d "$MODULES_DIR" ]]; then + echo "[create_sonic_image] Error! Path to Kernel Modules not found" + exit 1 + fi + + if [[ ! -n "$OUTPUT_BFB_IMAGE" ]]; then + echo "[create_sonic_image] Error! OUTPUT_BFB_IMAGE name not defined. Exiting.." + exit 1 + fi + + if [[ ! -f "$CDIR/$INSTALLER_PAYLOAD" ]]; then + echo "$INSTALLER_PAYLOAD not found. Exiting.." + exit 1 + fi + + mkbfb=`which mlx-mkbfb` + if [[ ! -x "${mkbfb}" ]]; then + echo "Error! mlx-mkbfb is required to build BFB image" + exit 1 + fi + + if [[ ! -f $CAPSULE ]]; then + echo "ERROR: Capsule file $CAPSULE does not exist" + exit 1 + fi + + if [[ ! -f $BOOTCTL_DRIVER ]]; then + echo "ERROR: Bootctl driver $BOOTCTL_DRIVER does not exist" + exit 1 + fi + + if [[ ! -f $TMFIFO_DRIVER ]]; then + echo "ERROR: Bootctl driver $TMFIFO_DRIVER does not exist" + exit 1 + fi + + if [[ ! -f $SDHCI_OF_DWCMSHC_DRIVER ]]; then + echo "ERROR: Bootctl driver $SDHCI_OF_DWCMSHC_DRIVER does not exist" + exit 1 + fi + + if [[ ! -f $BFB ]]; then + echo "ERROR: Default BFB $BFB does not exist" + exit 1 + fi +} + +cleanup_workdir() { + rm -rf $boot_args $boot_args2 $boot_path $boot_desc $WDIR +} + +create_workdir() { + if [[ $WDIR == "" ]]; then + WDIR=$(mktemp -d /sonic/bfb-wd-XXXX) + else + rm -rf $WDIR/* + fi + boot_args=$(mktemp /tmp/boot-args-XXXX) + boot_args2=$(mktemp /tmp/boot-args2-XXXX) + boot_path=$(mktemp /tmp/boot-path-XXXX) + boot_desc=$(mktemp /tmp/boot-desc-XXXX) + trap cleanup_workdir EXIT +} + +add_sonic_to_initramfs() { + # Add the logic to put second stage installer into bfb initramfs + mkdir -p debian + + j2 ${SDIR}/install.sh.j2 -o ./debian/install.sh -e SECURE_UPGRADE_MODE="$SECURE_UPGRADE_MODE" + chmod 0755 ./debian/install.sh + + # Copy the INSTALLER payload + cp $CDIR/$INSTALLER_PAYLOAD ./debian/ + +cat > scripts/initrd-install << EOF +#!/bin/bash + +printf_msg() +{ + echo "$@" | tee /dev/kmsg + return 0 +} + +depmod -a $KERNEL_VERSION > /dev/null 2>&1 +insmod /mlx-bootctl.ko +insmod /sdhci-of-dwcmshc.ko +insmod /sbsa_gwdt.ko +/usr/sbin/watchdog + +printf_msg "=================================" +printf_msg "Installing SONiC. Please wait..." +printf_msg "=================================" + +/bin/bash /debian/install.sh +if [ \$? -eq 0 ]; then + printf_msg "===================================" + printf_msg "Installation finished. Rebooting..." + printf_msg "===================================" + printf_msg + reboot -f +else + printf_msg "========================" + printf_msg "Failed to install SONiC" + printf_msg "========================" +fi +EOF + chmod +x scripts/initrd-install + sudo rm -f conf/conf.d/debian-core* + sudo sh -c 'echo "BOOT=initrd-install" > conf/conf.d/initrd_install' + sudo sh -c 'echo "ROOT=\"LABEL=writable\"" > conf/conf.d/default_root' +} + +copy_bin() +{ + from=$(realpath $1) + + if [ -e $from/$2 ]; then + bin=$2 + else + bin=$(sudo chroot $from bash -c "which $2 2> /dev/null") + fi + + echo "copy from" $from file: $bin + + if [ -h $from/$bin ]; then + if [[ $from == "/" ]]; then + tbin=`readlink -f $bin` + else + tbin=`readlink -f $from/$bin | sed -e "s~$from~~"` + fi + + if [ ! -e .$tbin ]; then + sudo mkdir -p .`dirname $tbin` + sudo cp $from/$tbin .$tbin + fi + + if [ ! -e .${bin} ]; then + sudo mkdir -p .`dirname $bin` + sudo cp -a $from/$bin .${bin} + fi + elif [ -e $from/$bin ]; then + sudo mkdir -p .`dirname $bin` + sudo cp -a $from/$bin .${bin} + else + echo "ERROR: Cannot find $2" + exit 1 + fi + + # Copy dependencies + for lib in `ldd $from/$bin 2> /dev/null | grep '=>' | awk '{print $3}'` + do + if [ -e .$lib ]; then + continue + fi + + sudo mkdir -p .`dirname $lib` + sudo cp -a $from/$lib .$lib + echo sudo cp -a $from/$lib .$lib + if [ -h $from/.$lib ]; then + if [[ $from == "/" ]]; then + tlib=`readlink -f $lib` + else + tlib=`readlink -f $from/$lib | sed -e "s~$from~~"` + fi + if [ ! -e .$tlib ]; then + sudo mkdir -p .`dirname $tlib` + sudo cp $from/$tlib .$tlib + fi + fi + done + } + +create_bfb_image() { + + pushd $WDIR + + # Copy the initrd into the work directory + initramfs=$(realpath $INITRD) + cp $initramfs $WDIR/dump-initramfs-v0 + initramfs=$WDIR/dump-initramfs-v0 + + case "$(file --brief --mime-type "$initramfs")" in + "application/x-lzma") + cat_initrd="lzcat" ;; + "application/x-lz4") + cat_initrd="lz4cat" ;; + "application/zstd") + cat_initrd="zstdcat" ;; + *) + cat_initrd="zcat" ;; + esac + + echo "Rebuilding $initramfs" + + mkdir -p ${WDIR}/initramfs + pushd initramfs + $cat_initrd "$initramfs" | cpio -i + + # Remove tools coming with busybox + for tool in `dpkg -L grub2-common` \ + `dpkg -L e2fsprogs` \ + `dpkg -L kmod | grep -v share` \ + `dpkg -L pciutils | grep -v share` \ + `dpkg -L usbutils | grep -v share` \ + `dpkg -L tar` \ + /usr/sbin/watchdog + do + if [ -d $tool ]; then + continue + fi + /bin/rm -f .${tool} + done + + for tool in `dpkg -L bfscripts | grep bin/` \ + `dpkg -L e2fsprogs | grep -v share` \ + `dpkg -L grub2-common` \ + `dpkg -L kmod | grep -v share` \ + `dpkg -L pciutils | grep -v share` \ + `dpkg -L usbutils | grep -v share` \ + `dpkg -L tar | grep -v share` \ + `dpkg -L grub-efi-arm64-bin` \ + `dpkg -L dmidecode | grep -v share` \ + xz efibootmgr bash getopt hexdump lspci perl \ + lsblk shutdown systemctl strings aarch64-linux-gnu-strings \ + mlxbf-bootctl id mkfs fsck watchdog dirname curl openssl + do + if [ -d $tool ]; then + continue + fi + copy_bin / $tool + done + + sudo depmod -a -b ./ $KERNEL_VERSION + mkdir -p usr/share/misc/ bin/ var/log/watchdog + sudo cp /etc/watchdog.conf etc + sudo cp /usr/share/misc/pci.ids usr/share/misc/ + cp $CHROOT_DIR/usr/share/misc/pci.ids usr/share/misc/ + cp $BOOTCTL_DRIVER . + cp $TMFIFO_DRIVER . + cp $SDHCI_OF_DWCMSHC_DRIVER . + cp $WATCHDOG . + mkdir -p ./secure-boot + cp -r $CDIR/$FILESYSTEM_ROOT/boot/* ./secure-boot + + mkdir -p ./lib/firmware/mellanox/boot/ + cp /lib/firmware/mellanox/boot/default.bfb ./lib/firmware/mellanox/boot/default.bfb + cp -a /lib/firmware/mellanox/boot/capsule ./lib/firmware/mellanox/boot/ + mkdir -p mnt dev sys proc + + add_sonic_to_initramfs + + # Make initramfs with new debian + find . -print0 | sudo cpio --null -o --format=newc | gzip -9 > "$initramfs" + + popd + + printf "$BF2_BOOT_ARGS initrd=initramfs" > \ + "$boot_args" + printf "$BF3_BOOT_ARGS initrd=initramfs" > \ + "$boot_args2" + + printf "VenHw(F019E406-8C9C-11E5-8797-001ACA00BFC4)/Image" > "$boot_path" + printf "Linux from rshim" > "$boot_desc" + vmlinuz=$WDIR/vmlinuz + cat $VMLINUZ > "$vmlinuz" + + $mkbfb --image "$vmlinuz" \ + --initramfs "$initramfs" \ + --capsule "$CAPSULE" \ + --boot-args-v0 "$boot_args" \ + --boot-args-v2 "$boot_args2" \ + --boot-path "$boot_path" \ + --boot-desc "$boot_desc" \ + ${BFB} ${DDIR}/${OUTPUT_BFB_IMAGE} + + echo "BFB is ready: $(readlink -f ${DDIR}/${OUTPUT_BFB_IMAGE})" + + popd +} + +main() { + echo $@ + parse_args $@ + . $CDIR/onie-image-arm64.conf + # Export ENV Variables for j2cli + CHROOT_DIR=$CDIR/$FILESYSTEM_ROOT + if [[ ! -d "$CHROOT_DIR" ]]; then + echo "[create_sonic_image] Error! Path to CHROOT not found" + exit 1 + fi + export GRUB_CFG=$(cat $SDIR/sonic-grub.cfg) + export IMAGE_VERSION=$(cat $CHROOT_DIR/etc/sonic/sonic_version.yml | grep "build_version" | sed -e "s/build_version: //g;s/'//g") + export BF2_BOOT_ARGS BF3_BOOT_ARGS BF2_GRUB_CFG BF3_GRUB_CFG INSTALLER_PAYLOAD FILESYSTEM_DOCKERFS DOCKERFS_DIR FILESYSTEM_SQUASHFS KERNEL_VERSION SECURE_UPGRADE_MODE SIGNING_KEY SIGNING_CERT + + INITRD=$CDIR/$FILESYSTEM_ROOT/boot/initrd.img-$KERNEL_VERSION + VMLINUZ=$CDIR/$FILESYSTEM_ROOT/boot/vmlinuz-$KERNEL_VERSION + MODULES_DIR=$CDIR/$FILESYSTEM_ROOT/lib/modules/$KERNEL_VERSION + WATCHDOG=$MODULES_DIR/kernel/drivers/watchdog/sbsa_gwdt.ko + BOOTCTL_DRIVER=$CHROOT_DIR/usr/lib/modules/$KERNEL_VERSION/extra/mlx-bootctl.ko + TMFIFO_DRIVER=$CHROOT_DIR/usr/lib/modules/$KERNEL_VERSION/extra/mlxbf-tmfifo.ko + SDHCI_OF_DWCMSHC_DRIVER=$CHROOT_DIR/usr/lib/modules/$KERNEL_VERSION/extra/sdhci-of-dwcmshc.ko + + validate_config + + create_workdir + echo "Work directory: $WDIR" + + create_bfb_image +} + +main $@ diff --git a/platform/nvidia-bluefield/installer/install.sh.j2 b/platform/nvidia-bluefield/installer/install.sh.j2 new file mode 100755 index 000000000000..e8167f4ab6d0 --- /dev/null +++ b/platform/nvidia-bluefield/installer/install.sh.j2 @@ -0,0 +1,390 @@ +# +# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#!/bin/bash + +# This script will run after being booted into a installer kernel +# This will setup the disk, grub etc for the actual SONiC to boot from + +# NOTE: Replace these flag at build time +IMAGE_VERSION="{{IMAGE_VERSION}}" +INSTALLER_PAYLOAD="{{INSTALLER_PAYLOAD}}" +FILESYSTEM_DOCKERFS="{{FILESYSTEM_DOCKERFS}}" +DOCKERFS_DIR="{{DOCKERFS_DIR}}" +FILESYSTEM_SQUASHFS="{{FILESYSTEM_SQUASHFS}}" +KERNEL_VERSION="{{KERNEL_VERSION}}" +BF2_GRUB_CFG="{{BF2_GRUB_CFG}}" +BF3_GRUB_CFG="{{BF3_GRUB_CFG}}" + +image_dir="image-$IMAGE_VERSION" +demo_volume_revision_label="SONiC-OS-${IMAGE_VERSION}" + +PATH="/usr/local/sbin:/usr/local/bin:/sbin:/bin:/usr/sbin:/usr/bin:/opt/mellanox/scripts" +CHROOT_PATH="/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin" + +rshimlog=`which bfrshlog 2> /dev/null` +distro="SONiC" + +device_nvmv=/dev/nvme0n1 +device_emmc=/dev/mmcblk0 + +capsule=/lib/firmware/mellanox/boot/capsule/boot_update2.cap + +rshim_log() +{ + # Write a message to rshim. Rshim can handle only a limited number of bites. + # It should be used only for critical messages. + echo "INFO: $*" + if [ -n "$rshimlog" ]; then + $rshimlog "INFO: $*" + fi +} + +log() +{ + # Write message to serial concole + if [ -e /dev/ttyAMA0 ]; then + echo "INFO: $*" > /dev/ttyAMA0 + fi +} + +function_exists() +{ + declare -f -F "$1" > /dev/null + return $? +} + +# +# Check auto configuration passed from boot-fifo +# + +boot_fifo_path="/sys/bus/platform/devices/MLNXBF04:00/bootfifo" +if [ -e "${boot_fifo_path}" ]; then + cfg_file=$(mktemp) + # Get 16KB assuming it's big enough to hold the config file. + dd if=${boot_fifo_path} of=${cfg_file} bs=4096 count=4 + + # + # Check the .xz signature {0xFD, '7', 'z', 'X', 'Z', 0x00} and extract the + # config file from it. Then start decompression in the background. + # + offset=$(strings -a -t d ${cfg_file} | grep -m 1 "7zXZ" | awk '{print $1}') + if [ -s "${cfg_file}" -a ."${offset}" != ."1" ]; then + log "Found bf.cfg" + cat ${cfg_file} | tr -d '\0' > /etc/bf.cfg + fi + rm -f $cfg_file +fi + +if [ -e /etc/bf.cfg ]; then + . /etc/bf.cfg +fi + +ex() { + echo "Executing command: $@" > /dev/ttyAMA0 + + local rc=0 + $@ 2>&1 > /dev/ttyAMA0 + rc=$? + + if [[ $rc -ne 0 ]]; then + echo "RC: $rc" > /dev/ttyAMA0 + fi +} + +if (lspci -n -d 15b3: | grep -wq 'a2dc'); then + module=BF3 + if [[ $DHCP_CLASS_ID != "" ]]; then + DHCP_CLASS_ID="BF3Client" + fi +else + module=BF2 + if [[ $DHCP_CLASS_ID != "" ]]; then + DHCP_CLASS_ID="BF2Client" + fi +fi + +log "$distro installation started on $module module" + +default_device_label="SONiC-OS" + +device_label=${device_label:-$default_device_label} + +if [[ $module == "BF3" ]]; then + default_device=$device_nvmv + if [[ $(blkid -L $device_label) =~ ${device_emmc} ]] && [[ -b ${device_emmc}p1 ]]; then + # Delete EFi boot partition on eMMC device. This is required to migrate to NVME device and boot from NVME correctly + sfdisk --force ${device_emmc} --delete 1 + fi +else + default_device=$device_emmc +fi + +device=${device:-$default_device} + +log "Using $device device and $device_label device label" + +# We cannot use wait-for-root as it expects the device to contain a +# known filesystem, which might not be the case here. +while [ ! -b $device ]; do + log "Waiting for $device to be ready" + sleep 1 +done + +# Flash image +bs=512 +reserved=34 +boot_size_megs=50 +mega=$((2**20)) +boot_size_bytes=$(($boot_size_megs * $mega)) + +disk_sectors=`fdisk -l $device | grep "Disk $device:" | awk '{print $7}'` +disk_end=$((disk_sectors - reserved)) +boot_start=2048 +boot_size=$(($boot_size_bytes/$bs)) +root_start=$((2048 + $boot_size)) +root_end=$disk_end +root_size=$(($root_end - $root_start + 1)) + +dd if=/dev/zero of="$device" bs="$bs" count=1 +sfdisk -f "$device" << EOF +label: gpt +label-id: A2DF9E70-6329-4679-9C1F-1DAF38AE25AE +device: ${device} +unit: sectors +first-lba: $reserved +last-lba: $disk_end + +${device}p1 : start=$boot_start, size=$boot_size, type=C12A7328-F81F-11D2-BA4B-00A0C93EC93B, uuid=CEAEF8AC-B559-4D83-ACB1-A4F45B26E7F0, name="EFI System", bootable +${device}p2 : start=$root_start ,size=$root_size, type=0FC63DAF-8483-4772-8E79-3D69D8477DE4, uuid=F093FF4B-CC26-408F-81F5-FF2DD6AE139F, name=$device_label +EOF +sync + +# Refresh partition table +ex blockdev --rereadpt ${device} + +if function_exists bfb_pre_install; then + log "Running bfb_pre_install from bf.cfg" + bfb_pre_install +fi + +# Generate some entropy +ex mke2fs -F ${device}p2 +ex mkdosfs ${device}p1 -n "system-boot" +ex mkfs.ext4 -F ${device}p2 -L $device_label +ex fsck.vfat -a ${device}p1 +mkdir -p /mnt +ex mount -t ext4 ${device}p2 /mnt +mkdir -p /mnt/boot/efi +ex mount -t vfat ${device}p1 /mnt/boot/efi +log "Extracting SONiC files" + +mkdir -p /mnt/$image_dir + +# Extract the INSTALLER_PAYLOAD to the $image_dir +export EXTRACT_UNSAFE_SYMLINKS=1 +ex unzip -o /debian/$INSTALLER_PAYLOAD -x $FILESYSTEM_DOCKERFS "platform.tar.gz" -d /mnt/$image_dir +mkdir -p /mnt/$image_dir/$DOCKERFS_DIR +unzip -op /debian/$INSTALLER_PAYLOAD "$FILESYSTEM_DOCKERFS" | tar xz --warning=no-timestamp -f - -C /mnt/$image_dir/$DOCKERFS_DIR + +mkdir -p /mnt/$image_dir/platform +unzip -op /debian/$INSTALLER_PAYLOAD "platform.tar.gz" | tar xz --warning=no-timestamp -f - -C /mnt/$image_dir/platform + +platform=$(dmidecode -t 4 | grep "Part Number" | awk '{split($NF,a,"-"); print tolower(a[1])}') +platform=arm64-nvda_bf-$platform + +# Copy in the machine.conf file +cat < /mnt/machine.conf +onie_arch=arm64 +onie_platform=$platform +EOF + +chmod a+r /mnt/machine.conf + +sync +{% if SECURE_UPGRADE_MODE in ['dev', 'prod'] %} +demo_volume_label="SONiC-OS" +log "creating demo_volume_label=$demo_volume_label dir under EFI partition to include all boot related modules" +mkdir -p /mnt/boot/efi/EFI/$demo_volume_label + +if [ ! -f /secure-boot/mmaa64.efi ]; then + echo "ERROR: /secure-boot/mmaa64.efi file does not exist" + exit 1 +fi + +if [ ! -f /secure-boot/shimaa64.efi ]; then + echo "ERROR: /secure-boot/shimaa64.efi file does not exist" + exit 1 +fi + +if [ ! -f /secure-boot/grubaa64.efi ]; then + echo "ERROR: /secure-boot/grubaa64.efi file does not exist" + exit 1 +fi + +log "copying signed shim, mm, grub, grub.cfg from /secure-boot to /boot/efi/EFI/$demo_volume_label directory" +MNT_DIR="/mnt/boot/efi/EFI/$demo_volume_label" +cp /secure-boot/shimaa64.efi $MNT_DIR +cp /secure-boot/grubaa64.efi $MNT_DIR +cp /secure-boot/mmaa64.efi $MNT_DIR +{% else %} +log "Installing GRUB" +{% endif %} +# Create a minimal grub.cfg that allows for: +# - configure the serial console +# - allows for grub-reboot to work +# - a menu entry for the DEMO OS + +grub_cfg=$(mktemp) + +# Modify GRUB_CMDLINE_LINUX from bf.cfg file if required + +if [[ $module == "BF3" ]]; then + DEFAULT_GRUB_CMDLINE_LINUX=$BF3_GRUB_CFG +else + DEFAULT_GRUB_CMDLINE_LINUX=$BF2_GRUB_CFG +fi + +GRUB_CMDLINE_LINUX=${GRUB_CMDLINE_LINUX:-"$DEFAULT_GRUB_CMDLINE_LINUX"} +export GRUB_CMDLINE_LINUX + +# Add a menu entry for the SONiC OS +# Note: assume that apparmor is supported in the kernel +demo_grub_entry="$demo_volume_revision_label" + +# Find the grub_cfg_root +uuid=$(blkid ${device}p2 | sed -ne 's/.* UUID=\"\([^"]*\)\".*/\1/p') +if [ -z "$uuid" ]; then + grub_cfg_root=${device}p2 +else + grub_cfg_root=UUID=$uuid +fi + +cat <> $grub_cfg +{{GRUB_CFG}} +EOF + +# Copy the grub.cfg onto the boot-directory as specified in the grub-install +{% if SECURE_UPGRADE_MODE in ['dev', 'prod'] %} +ex cp $grub_cfg /mnt/boot/efi/EFI/$demo_volume_label/grub.cfg +ex mkdir -p /mnt/grub +ex cp $grub_cfg /mnt/grub/grub.cfg +{% else %} +ex mkdir -p /mnt/grub +ex cp $grub_cfg /mnt/grub/grub.cfg + +{% endif %} +sync + +log "GRUB CFG Updated" + +# Update HW-dependant files + +umount /mnt/boot/efi +umount /mnt + +ex blockdev --rereadpt ${device} + +ex fsck.vfat -a ${device}p1 +sync + +if function_exists bfb_pre_bootmgr_update; then + log "Running bfb_pre_bootmgr_update from bf.cfg" + bfb_pre_bootmgr_update +fi + +if [ -e ${capsule} ]; then + log "Update capsule: ${capsule}" + ex bfrec --capsule ${capsule} +fi + +log "Updating EFIBootMgr" + +if [ ! -d /sys/firmware/efi/efivars ]; then + ex mount -t efivarfs none /sys/firmware/efi/efivars +fi + +# Cleanup boot partition +ex bfbootmgr --cleanall +ex rm -f /sys/firmware/efi/efivars/Boot* +ex rm -f /sys/firmware/efi/efivars/dump-* + +# If any of the following commands fail or the image is not booting after the installation check if efivars driver is available and loaded +if [[ $(which grub-install) != "" ]]; then + log "Installing grub with grub-install utility" + + ex mount ${device}p2 /mnt/ + ex mount ${device}p1 /mnt/boot/efi/ + ex grub-install ${device}p1 --bootloader-id=$device_label --locale-directory=/mnt/usr/share/locale --efi-directory=/mnt/boot/efi/ --boot-directory=/mnt/ + ex umount /mnt/boot/efi + ex umount /mnt +else + log "Updating bootmgr with efibootmgr utility" + + if efibootmgr | grep $device_label; then + ex efibootmgr --delete-bootnum -b "$(efibootmgr | grep $device_label | cut -c 5-8)" + fi + ex efibootmgr -c -d "$device" -p 1 -L $device_label -l "\EFI\\$device_label\grubaa64.efi" +fi +{% if SECURE_UPGRADE_MODE in ['dev', 'prod'] %} +uefi_part=1 +ex efibootmgr --create \ + --label "$demo_volume_label" \ + --disk "$device" --part $uefi_part \ + --loader "\EFI\$demo_volume_label\shimaa64.efi" || { + echo "ERROR: efibootmgr failed to create new boot variable on: $device" + exit 1 +} +echo "uefi_shim: Secure Boot components installed successfully" +{% endif %} +BFCFG=`which bfcfg 2> /dev/null` +if [ -n "$BFCFG" ]; then + # Create PXE boot entries + # Not adding CX ifaces because presumably they'll not be used for PXE + if [ -e /etc/bf.cfg ]; then + mv /etc/bf.cfg /etc/bf.cfg.orig + fi + + cat > /etc/bf.cfg << EOF +BOOT0=DISK +BOOT1=NET-OOB-IPV4 +BOOT2=NET-OOB-IPV6 +BOOT3=NET-RSHIM-IPV4 +BOOT4=NET-RSHIM-IPV6 +PXE_DHCP_CLASS_ID=$DHCP_CLASS_ID +EOF + + ex $BFCFG + + # Restore the original bf.cfg + /bin/rm -f /etc/bf.cfg + if [ -e /etc/bf.cfg.orig ]; then + mv /etc/bf.cfg.orig /etc/bf.cfg + fi +fi + +if [ -n "$BFCFG" ]; then + ex $BFCFG +fi + +if function_exists bfb_post_install; then + ex bfb_post_install +fi + +rshim_log "Installation finished" +rshim_log "Rebooting..." +# Wait for these messages to be pulled by the rshim service +sleep 3 diff --git a/platform/nvidia-bluefield/installer/sonic-grub.cfg b/platform/nvidia-bluefield/installer/sonic-grub.cfg new file mode 100644 index 000000000000..59b037b5abf1 --- /dev/null +++ b/platform/nvidia-bluefield/installer/sonic-grub.cfg @@ -0,0 +1,27 @@ +set timeout=5 + +if [ -s \$prefix/grubenv ]; then + load_env +fi +if [ "\${saved_entry}" ]; then + set default="\${saved_entry}" +fi +if [ "\${next_entry}" ]; then + set default="\${next_entry}" + unset next_entry + save_env next_entry +fi + +menuentry '$demo_grub_entry' { + insmod gzio + insmod part_gpt + insmod ext2 + search --no-floppy --label --set=root $device_label + if [ x$grub_platform = xxen ]; then insmod xzio; insmod lzopio; fi + echo 'Loading SONiC-OS Kernel' + linux /$image_dir/boot/vmlinuz-$KERNEL_VERSION root=$grub_cfg_root rw $GRUB_CMDLINE_LINUX fixrtc \ + loop=$image_dir/$FILESYSTEM_SQUASHFS loopfstype=squashfs systemd.unified_cgroup_hierarchy=0 \ + apparmor=1 security=apparmor varlog_size=4096 systemd.unified_cgroup_hierarchy=0 + echo 'Loading SONiC-OS initial ramdisk ...' + initrd /$image_dir/boot/initrd.img-$KERNEL_VERSION +} diff --git a/platform/nvidia-bluefield/pinctrl-mlxbf3/Makefile b/platform/nvidia-bluefield/pinctrl-mlxbf3/Makefile index ca56f30f8324..04fab4b518e4 100644 --- a/platform/nvidia-bluefield/pinctrl-mlxbf3/Makefile +++ b/platform/nvidia-bluefield/pinctrl-mlxbf3/Makefile @@ -32,8 +32,6 @@ $(addprefix $(DEST)/, $(MLXBF3_PINCTRL_DRIVER)): $(DEST)/% : pushd ${MLXBF3_PINCTRL} - patch -p1 < ../../pinctrl-mlxbf3.c.patch - # Build the package make -C /lib/modules/$(KVERSION)/build M=$(MODULE_DIR) diff --git a/platform/nvidia-bluefield/pinctrl-mlxbf3/pinctrl-mlxbf3.c.patch b/platform/nvidia-bluefield/pinctrl-mlxbf3/pinctrl-mlxbf3.c.patch deleted file mode 100644 index c78afc4b2805..000000000000 --- a/platform/nvidia-bluefield/pinctrl-mlxbf3/pinctrl-mlxbf3.c.patch +++ /dev/null @@ -1,13 +0,0 @@ -diff --git a/pinctrl-mlxbf3.c b/pinctrl-mlxbf3.c -index 8371d83..d3746f6 100644 ---- a/pinctrl-mlxbf3.c -+++ b/pinctrl-mlxbf3.c -@@ -18,7 +18,7 @@ - - #define DRV_VERSION "1.0" - --#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) -+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 0, 0) - struct pinfunction { - const char *name; - const char * const *groups; diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/device_data.py b/platform/nvidia-bluefield/platform-api/sonic_platform/device_data.py index c4d3e902f1e4..5c62ec51ba1a 100644 --- a/platform/nvidia-bluefield/platform-api/sonic_platform/device_data.py +++ b/platform/nvidia-bluefield/platform-api/sonic_platform/device_data.py @@ -30,7 +30,6 @@ def __init__(self, name, thermals=None): self.name = name self.thermals = thermals - class DeviceDataManager: def __init__(self): diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/thermal_bf3.py b/platform/nvidia-bluefield/platform-api/sonic_platform/thermal_bf3.py index c769a5e373f1..c1e2ea5fdaa7 100644 --- a/platform/nvidia-bluefield/platform-api/sonic_platform/thermal_bf3.py +++ b/platform/nvidia-bluefield/platform-api/sonic_platform/thermal_bf3.py @@ -18,7 +18,11 @@ try: from sonic_platform_base.thermal_base import ThermalBase from sonic_py_common.logger import Logger + from .device_data import DeviceDataManager + from enum import Enum, auto import os + import json + import subprocess except ImportError as e: raise ImportError (str(e) + "- required module not found") @@ -26,28 +30,75 @@ logger = Logger() MLXBF_BASE_PATH = '/sys/kernel/debug/mlxbf-ptm/monitors/status' +SSD_DEV='nvme0' -SENSORS = [ - {'name': 'CPU', 'mlxbf_sensor_name': 'core_temp', 'ht': 95, 'cht': 100}, - {'name': 'DDR', 'mlxbf_sensor_name': 'ddr_temp', 'ht': 95, 'cht': 100}, - {'name': 'SFP0', 'iface': 'Ethernet0', 'hwmon_path': None}, - {'name': 'SFP1', 'iface': 'Ethernet4', 'hwmon_path': None}, +class ThermalType(Enum): + MLXBF = auto() + SFP = auto() + SSD = auto() + +MLXBF_SENSORS = [ + {'name': 'CPU', 'thermal_type': ThermalType.MLXBF, 'mlxbf_sensor_name': 'core_temp', 'ht': 95, 'cht': 100}, + {'name': 'DDR', 'thermal_type': ThermalType.MLXBF, 'mlxbf_sensor_name': 'ddr_temp', 'ht': 95, 'cht': 100}, ] -def set_hwmon_path(sensor): - base = f'/sys/class/net/{sensor["iface"]}/device/hwmon' +def get_hwmon_path(iface): + base = f'/sys/class/net/{iface}/device/hwmon' dirs = os.listdir(base) if len(dirs) != 1 or not dirs[0].startswith('hwmon'): - logger.log_error(f'Failed to find hwmon path for {sensor["iface"]}') + logger.log_error(f'Failed to find hwmon path for {iface}') return - sensor['hwmon_path'] = f'{base}/{dirs[0]}' + return f'{base}/{dirs[0]}' + +def initialize_sfp_thermals(): + sfps = [] + sfp_count = DeviceDataManager().get_sfp_count() + for i in range(sfp_count): + iface = f'Ethernet{i * 4}' + sfp_thermal = Thermal(name=f'SFP{i}', thermal_type=ThermalType.SFP, hwmon_path=get_hwmon_path(iface)) + sfps.append(sfp_thermal) + return sfps + +def read_smartctl(dev, all=False): + all_flag = 'u' if all else '' + cmd = f'smartctl -x /dev/{dev} --json=v{all_flag}' + try: + output = subprocess.check_output(cmd.split(' ')).decode().strip() + return json.loads(output) + except: + logger.log_error('Failed to read smartctl output') + return {} + +def read_ssd_temperatrue(dev): + try: + return int(read_smartctl(dev)['temperature']['current']) + except: + logger.log_error('Failed to read nvme0 temperature') + return 'N/A' + +def read_ssd_thresholds(dev): + higt_th = None + crit_th = None + def parse_value(v): + return int(v.split(':')[1].strip().split(' ')[0]) + + output = read_smartctl(dev, all=True) + for k,v in output.items(): + if "smartctl" in k: + if not higt_th and "Warning Comp. Temp. Threshold" in v: + higt_th = parse_value(v) + if not crit_th and "Critical Comp. Temp. Threshold" in v: + crit_th = parse_value(v) + return higt_th or 'N/A', crit_th or 'N/A' + +def initialize_ssd_thermals(): + higt_th, crit_th = read_ssd_thresholds(SSD_DEV) + return [Thermal(name=f'NVME', thermal_type=ThermalType.SSD, dev=SSD_DEV, ht=higt_th, cht=crit_th)] def initialize_chassis_thermals(): - thermal_list = [] - for s in SENSORS: - if 'hwmon_path' in s: - set_hwmon_path(s) - thermal_list.append(Thermal(**s)) + thermal_list = [Thermal(**x) for x in MLXBF_SENSORS] + thermal_list += initialize_sfp_thermals() + thermal_list += initialize_ssd_thermals() return thermal_list def read_fs(path, name): @@ -72,10 +123,12 @@ def read_temp_hwmon(hwmon_path, sensor): return v / 1000 class Thermal(ThermalBase): - def __init__(self, name, mlxbf_sensor_name=None, iface=None, hwmon_path=None, ht='N/A', cht='N/A'): + def __init__(self, name, thermal_type=None, mlxbf_sensor_name=None, dev=None, hwmon_path=None, ht='N/A', cht='N/A'): super(Thermal, self).__init__() self.name = name + self.thermal_type = thermal_type self.mlxbf_sensor_name = mlxbf_sensor_name + self.dev = dev self.hwmon_path = hwmon_path self.ht = ht self.cht = cht @@ -97,10 +150,13 @@ def get_temperature(self): A float number of current temperature in Celsius up to nearest thousandth of one degree Celsius, e.g. 30.125 """ - if self.mlxbf_sensor_name: - return read_temp_mlxbf(self.mlxbf_sensor_name) - else: - return read_temp_hwmon(self.hwmon_path, 'temp1_input') + match self.thermal_type: + case ThermalType.MLXBF: + return read_temp_mlxbf(self.mlxbf_sensor_name) + case ThermalType.SFP: + return read_temp_hwmon(self.hwmon_path, 'temp1_input') + case ThermalType.SSD: + return read_ssd_temperatrue(self.dev) def get_high_threshold(self): """ diff --git a/platform/nvidia-bluefield/platform-api/tests/test_thermal_bf3.py b/platform/nvidia-bluefield/platform-api/tests/test_thermal_bf3.py index 1ceac45d8725..991f15edd8b5 100644 --- a/platform/nvidia-bluefield/platform-api/tests/test_thermal_bf3.py +++ b/platform/nvidia-bluefield/platform-api/tests/test_thermal_bf3.py @@ -17,6 +17,7 @@ import os import sys +import json from unittest.mock import patch from unittest.mock import mock_open @@ -27,7 +28,7 @@ sys.path.insert(0, modules_path) from sonic_platform.chassis import Chassis -from .utils import platform_sample_bf3 +from .utils import platform_sample_bf3, smartctl_output @patch('sonic_py_common.device_info.get_platform', MagicMock(return_value="")) @@ -38,54 +39,53 @@ class TestThermal: def test_chassis_thermal(self, *args): - from sonic_platform.thermal_bf3 import SENSORS chassis = Chassis() thermal_list = chassis.get_all_thermals() assert thermal_list - for s in SENSORS: - assert 'name' in s - assert 'mlxbf_sensor_name' in s or 'hwmon_path' in s - - sensor_names = list(map(lambda x: x.get('name'), SENSORS)) - thermal_names = list(map(lambda x: x.get_name(), thermal_list)) - for sn in sensor_names: - assert sn in thermal_names - def test_hwmon_read(self, *args): from sonic_platform import thermal_bf3 as thermal - from sonic_platform.thermal_bf3 import Thermal + from sonic_platform.thermal_bf3 import Thermal, ThermalType thermal.read_fs = MagicMock(return_value=83123) - sensor = {'name': 'test', 'hwmon_path': '/tmp/', 'ht': 95, 'cht': 100} - t = Thermal(**sensor) + t = Thermal(name='test', thermal_type=ThermalType.SFP, hwmon_path='/tmp/', ht=95, cht=100) assert t.get_temperature() == 83.123 assert t.get_high_critical_threshold() == 83.123 + def test_ssd(self, *args): + from sonic_platform import thermal_bf3 as thermal + from sonic_platform.thermal_bf3 import initialize_ssd_thermals + thermal.read_smartctl = MagicMock(return_value=json.loads(smartctl_output)) + t = initialize_ssd_thermals() + assert len(t) == 1 + assert t[0].get_temperature() == 42 + assert t[0].get_high_threshold() == 90 + assert t[0].get_high_critical_threshold() == 100 + + def test_thermal_get(self, *args): from sonic_platform import thermal_bf3 as thermal - from sonic_platform.thermal_bf3 import Thermal + from sonic_platform.thermal_bf3 import Thermal, ThermalType temp_test_mocked_vals = [123, 10.5, -1, None] for tv in temp_test_mocked_vals: thermal.read_temp_mlxbf = MagicMock(return_value=tv) - sensor = {'name': 'test', 'mlxbf_sensor_name': 'test', 'ht': 95, 'cht': 100} - t = Thermal(**sensor) + t = Thermal(name='test', thermal_type=ThermalType.MLXBF, mlxbf_sensor_name='test', ht=95, cht=100) assert t.get_temperature() == tv - assert t.get_high_threshold() == sensor['ht'] - assert t.get_high_critical_threshold() == sensor['cht'] + assert t.get_high_threshold() == 95 + + assert t.get_high_critical_threshold() == 100 assert t.get_low_threshold() == 'N/A' assert t.get_low_critical_threshold() == 'N/A' for tv in temp_test_mocked_vals: thermal.read_temp_hwmon = MagicMock(return_value=tv) - sensor = {'name': 'test', 'hwmon_path': '/tmp/', 'ht': 95, 'cht': 100} - t = Thermal(**sensor) + t = Thermal(name='test', thermal_type=ThermalType.SFP, hwmon_path='/tmp/', ht=95) assert t.get_temperature() == tv - assert t.get_high_threshold() == sensor['ht'] + assert t.get_high_threshold() == 95 assert t.get_high_critical_threshold() == tv assert t.get_low_threshold() == 'N/A' assert t.get_low_critical_threshold() == 'N/A' diff --git a/platform/nvidia-bluefield/platform-api/tests/utils.py b/platform/nvidia-bluefield/platform-api/tests/utils.py index 8c9878e0c0e3..e40bbe8e24ed 100644 --- a/platform/nvidia-bluefield/platform-api/tests/utils.py +++ b/platform/nvidia-bluefield/platform-api/tests/utils.py @@ -92,6 +92,18 @@ } """ +smartctl_output = """ +{ + "smartctl_0004_u": "=== START OF INFORMATION SECTION ===", + "smartctl_0023_u": "Maximum Data Transfer Size: 512 Pages", + "smartctl_0024_u": "Warning Comp. Temp. Threshold: 90 Celsius", + "smartctl_0025_u": "Critical Comp. Temp. Threshold: 100 Celsius", + "temperature": { + "current": 42 + } +} +""" + # Utilities for throttling tests class LogRecorderMock(object): def __init__(self): diff --git a/platform/nvidia-bluefield/recipes/bluefield-soc.mk b/platform/nvidia-bluefield/recipes/bluefield-soc.mk index 3ff258936253..dc256b6b6c11 100644 --- a/platform/nvidia-bluefield/recipes/bluefield-soc.mk +++ b/platform/nvidia-bluefield/recipes/bluefield-soc.mk @@ -16,8 +16,8 @@ # # Bluefied Software Distribution Version -BFSOC_VERSION = 4.6.0 -BFSOC_REVISION = 13035 +BFSOC_VERSION = 4.7.0 +BFSOC_REVISION = 13127 BFB_IMG_TYPE = prod BFSOC_BUILD_DATE = @@ -34,6 +34,7 @@ BSD_BASE_URL = $(BSD_INTERNAL_BASE_URL)/$(BFSOC_BUILD_DATE) endif BSD_BASE_SOURCE_URL = $(BSD_BASE_URL)/build/install/distro/SRPMS/ +QP_BOOTIMAGES_BASE_URL = $(BSD_BASE_URL)/build/install/distro/DEBS/ DEV_BOOTIMAGES_BASE_URL = $(BSD_BASE_URL)/build/install/distro/dev-release/DEBS/ PROD_BOOTIMAGES_BASE_URL = $(BSD_BASE_URL)/build/install/distro/ga-release/DEBS/ endif @@ -133,7 +134,10 @@ $(MLXBF_PTM_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) BF_PLATFORM_DRIVERS += $(MLXBF_PTM_DRIVER) export MLXBF_PTM_DRIVER_VERSION MLXBF_PTM_DRIVER -ifeq ($(BFB_IMG_TYPE), prod) +ifeq ($(BFB_IMG_TYPE), qp) +BOOTIMAGES_BASE_URL = $(QP_BOOTIMAGES_BASE_URL) +BOOTIMAGES = mlxbf-bootimages_$(BFSOC_VERSION)-$(BFSOC_REVISION)_arm64.deb +else ifeq ($(BFB_IMG_TYPE), prod) BOOTIMAGES_BASE_URL = $(PROD_BOOTIMAGES_BASE_URL) BOOTIMAGES = mlxbf-bootimages-signed_$(BFSOC_VERSION)-$(BFSOC_REVISION)_arm64.deb else @@ -160,15 +164,13 @@ $(BF_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/bluefield-platform-modules $(BF_PLATFORM_MODULE)_FILES = $(BF_PLATFORM_DRIVERS) -SONIC_MAKE_DEBS += $(BF_PLATFORM_MODULE) export BF_PLATFORM_MODULE_VERSION BF_PLATFORM_MODULE BF_PLATFORM_DRIVERS ifeq ($(BFSOC_FROM_INTERNAL), y) SONIC_MAKE_FILES += $(BF_PLATFORM_DRIVERS) -SONIC_MAKE_DEBS += $(BFSOC_MAKE_DEBS) +SONIC_MAKE_DEBS += $(BFSOC_MAKE_DEBS) $(BF_PLATFORM_MODULE) SONIC_ONLINE_DEBS += $(BFSOC_ONLINE_DEBS) else -$(eval $(foreach file,$(BF_PLATFORM_DRIVERS) $(BFSOC_MAKE_DEBS) $(BFSOC_MAKE_DEBS_DERIVED) $(BFSOC_ONLINE_DEBS), $(call make_url_bfsoc,$(file)))) -SONIC_ONLINE_FILES += $(BF_PLATFORM_DRIVERS) -SONIC_ONLINE_DEBS += $(BFSOC_MAKE_DEBS) $(BFSOC_MAKE_DEBS_DERIVED) $(BFSOC_ONLINE_DEBS) +$(eval $(foreach file, $(BFSOC_MAKE_DEBS) $(BFSOC_MAKE_DEBS_DERIVED) $(BFSOC_ONLINE_DEBS) $(BF_PLATFORM_MODULE), $(call make_url_bfsoc,$(file)))) +SONIC_ONLINE_DEBS += $(BFSOC_MAKE_DEBS) $(BFSOC_MAKE_DEBS_DERIVED) $(BFSOC_ONLINE_DEBS) $(BF_PLATFORM_MODULE) endif diff --git a/platform/nvidia-bluefield/recipes/dpu-sai.mk b/platform/nvidia-bluefield/recipes/dpu-sai.mk index 6cac410ec104..706fd6d65c4e 100644 --- a/platform/nvidia-bluefield/recipes/dpu-sai.mk +++ b/platform/nvidia-bluefield/recipes/dpu-sai.mk @@ -15,7 +15,7 @@ # limitations under the License. # -DPU_SAI_VERSION = SAIBuild0.0.30.0 +DPU_SAI_VERSION = SAIBuild0.0.32.0 # Place here URL where SAI sources exist DPU_SAI_SOURCE_BASE_URL= diff --git a/platform/nvidia-bluefield/recipes/fw.mk b/platform/nvidia-bluefield/recipes/fw.mk index 94b0486e9e7b..344ed49b18b3 100644 --- a/platform/nvidia-bluefield/recipes/fw.mk +++ b/platform/nvidia-bluefield/recipes/fw.mk @@ -17,7 +17,7 @@ BF3_FW_BASE_URL = -BF3_FW_VERSION = 32.39.1002 +BF3_FW_VERSION = 32.41.1000 BF3_FW_FILE = fw-BlueField-3-rel-$(subst .,_,$(BF3_FW_VERSION)).mfa diff --git a/platform/nvidia-bluefield/recipes/installer-image.dep b/platform/nvidia-bluefield/recipes/installer-image.dep index 74214c6485a4..43a4d4e1f856 100644 --- a/platform/nvidia-bluefield/recipes/installer-image.dep +++ b/platform/nvidia-bluefield/recipes/installer-image.dep @@ -1,5 +1,4 @@ # DPKG FRK -(SONIC_BF_IMAGE_PXE)_CACHE_MODE := none (SONIC_BF_IMAGE_BIN)_CACHE_MODE := none (SONIC_BF_IMAGE_BFB)_CACHE_MODE := none diff --git a/platform/nvidia-bluefield/recipes/installer-image.mk b/platform/nvidia-bluefield/recipes/installer-image.mk index e3831a54d368..08592bcd30e7 100644 --- a/platform/nvidia-bluefield/recipes/installer-image.mk +++ b/platform/nvidia-bluefield/recipes/installer-image.mk @@ -58,17 +58,6 @@ $(foreach feature, $(DISABLED_FEATURE_FLAGS), $(eval override $(feature)=n )) $(SONIC_BF_IMAGE_BASE)_DOCKERS = $(filter-out $(DISABLED_DOCKERS), $(SONIC_INSTALL_DOCKER_IMAGES)) $(SONIC_BF_IMAGE_BASE)_FILES = $(BF_FW_FILES) -# A compressed archive which contains individual files required for PXE boot -# A BFB image is also generated as a by-product of PXE image generation -SONIC_BF_IMAGE_PXE = $(SONIC_BF_IMAGE_BASE).tar.gz -$(SONIC_BF_IMAGE_PXE)_IMAGE_TYPE = pxe -$(SONIC_BF_IMAGE_PXE)_MACHINE = $($(SONIC_BF_IMAGE_BASE)_MACHINE) -$(SONIC_BF_IMAGE_PXE)_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_INSTALLS) -$(SONIC_BF_IMAGE_PXE)_DEPENDS += $($(SONIC_BF_IMAGE_BASE)_DEPENDS) -$(SONIC_BF_IMAGE_PXE)_DOCKERS += $($(SONIC_BF_IMAGE_BASE)_DOCKERS) -$(SONIC_BF_IMAGE_PXE)_LAZY_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_LAZY_INSTALLS) -$(SONIC_BF_IMAGE_PXE)_FILES += $($(SONIC_BF_IMAGE_BASE)_FILES) $(MLX_BOOTCTL_DRIVER) - # The traditional *.bin image. Works for sonic-sonic upgrade. SONIC_BF_IMAGE_BIN = $(SONIC_BF_IMAGE_BASE).bin $(SONIC_BF_IMAGE_BIN)_IMAGE_TYPE = onie @@ -87,6 +76,6 @@ $(SONIC_BF_IMAGE_BFB)_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_INSTALLS) $(SONIC_BF_IMAGE_BFB)_DEPENDS += $($(SONIC_BF_IMAGE_BASE)_DEPENDS) $(SONIC_BF_IMAGE_BFB)_DOCKERS += $($(SONIC_BF_IMAGE_BASE)_DOCKERS) $(SONIC_BF_IMAGE_BFB)_LAZY_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_LAZY_INSTALLS) -$(SONIC_BF_IMAGE_BFB)_FILES += $($(SONIC_BF_IMAGE_BASE)_FILES) $(MLX_BOOTCTL_DRIVER) +$(SONIC_BF_IMAGE_BFB)_FILES += $($(SONIC_BF_IMAGE_BASE)_FILES) -SONIC_INSTALLERS += $(SONIC_BF_IMAGE_PXE) $(SONIC_BF_IMAGE_BIN) $(SONIC_BF_IMAGE_BFB) +SONIC_INSTALLERS += $(SONIC_BF_IMAGE_BIN) $(SONIC_BF_IMAGE_BFB) diff --git a/platform/nvidia-bluefield/recipes/mft.mk b/platform/nvidia-bluefield/recipes/mft.mk index 7f56158656cb..f4b3722a1ea5 100644 --- a/platform/nvidia-bluefield/recipes/mft.mk +++ b/platform/nvidia-bluefield/recipes/mft.mk @@ -14,8 +14,8 @@ # See the License for the specific language governing permissions and # limitations under the License. -MFT_VERSION = 4.26.1 -MFT_REVISION = 3 +MFT_VERSION = 4.28.0 +MFT_REVISION = 96 MFT_INTERNAL_SOURCE_BASE_URL = diff --git a/platform/nvidia-bluefield/recipes/sdk.mk b/platform/nvidia-bluefield/recipes/sdk.mk index 0e0a048aef86..fbe53fddde64 100644 --- a/platform/nvidia-bluefield/recipes/sdk.mk +++ b/platform/nvidia-bluefield/recipes/sdk.mk @@ -19,7 +19,7 @@ SDK_BASE_PATH = $(PLATFORM_PATH)/sdk-src/sonic-bluefield-packages/bin # Place here URL where SDK sources exist SDK_SOURCE_BASE_URL = -SDK_VERSION = 24.4-RC2 +SDK_VERSION = 24.7-RC4 SDK_COLLECTX_URL = https://linux.mellanox.com/public/repo/doca/1.5.2/debian12/aarch64/ diff --git a/platform/pensando/dsc-drivers/debian/control b/platform/pensando/dsc-drivers/debian/control index 342424ccbf15..07d8ed353b3e 100644 --- a/platform/pensando/dsc-drivers/debian/control +++ b/platform/pensando/dsc-drivers/debian/control @@ -10,5 +10,5 @@ Standards-Version: 3.9.3 Package: ionic-modules Architecture: arm64 Section: main -Depends: linux-image-6.1.0-11-2-arm64-unsigned +Depends: linux-image-6.1.0-22-2-arm64-unsigned Description: kernel modules for pensando elba diff --git a/platform/pensando/dsc-drivers/debian/ionic-modules.install b/platform/pensando/dsc-drivers/debian/ionic-modules.install index cad27cea25f4..9e1d39a9b6b3 100644 --- a/platform/pensando/dsc-drivers/debian/ionic-modules.install +++ b/platform/pensando/dsc-drivers/debian/ionic-modules.install @@ -1,4 +1,4 @@ -src/drivers/linux/build/mdev.ko lib/modules/6.1.0-11-2-arm64/extra -src/drivers/linux/build/mnet_uio_pdrv_genirq.ko lib/modules/6.1.0-11-2-arm64/extra -src/drivers/linux/build/ionic_mnic.ko lib/modules/6.1.0-11-2-arm64/extra +src/drivers/linux/build/mdev.ko lib/modules/6.1.0-22-2-arm64/extra +src/drivers/linux/build/mnet_uio_pdrv_genirq.ko lib/modules/6.1.0-22-2-arm64/extra +src/drivers/linux/build/ionic_mnic.ko lib/modules/6.1.0-22-2-arm64/extra systemd/ionic-modules.service lib/systemd/system diff --git a/platform/pensando/platform.conf b/platform/pensando/platform.conf index b10f20e1ca28..8ebae0e2a0db 100644 --- a/platform/pensando/platform.conf +++ b/platform/pensando/platform.conf @@ -172,8 +172,8 @@ cat <> $bl_conf_path/$BL_CONF default main label main - kernel /$image_dir/boot/vmlinuz-6.1.0-11-2-arm64 - initrd /$image_dir/boot/initrd.img-6.1.0-11-2-arm64 + kernel /$image_dir/boot/vmlinuz-6.1.0-22-2-arm64 + initrd /$image_dir/boot/initrd.img-6.1.0-22-2-arm64 devicetree /$image_dir/boot/elba-asic-psci.dtb append softdog.soft_panic=1 FW_NAME=mainfwa root=/dev/mmcblk0p10 rw rootwait rootfstype=ext4 loopfstype=squashfs loop=/$image_dir/fs.squashfs } diff --git a/platform/vs/docker-sonic-vs/orchagent.sh b/platform/vs/docker-sonic-vs/orchagent.sh index 8bd365e13230..f044bc922cda 100755 --- a/platform/vs/docker-sonic-vs/orchagent.sh +++ b/platform/vs/docker-sonic-vs/orchagent.sh @@ -8,6 +8,20 @@ else export platform=vs fi +# Force orchagent to run with the given ASIC. +if [ "$ASIC_TYPE" == "broadcom-dnx" ]; then + export platform="broadcom" + export sub_platform="broadcom-dnx" +fi + +# Allow test to override PfcDlrInitEnable for VS switch so that +# we can test PfcWdAclHandler, instead of PfcWdDlrHandler. +if [ "$PFC_DLR_INIT_ENABLE" == "1" ]; then + export pfcDlrInitEnable="1" +elif [ "$PFC_DLR_INIT_ENABLE" == "0" ]; then + export pfcDlrInitEnable="0" +fi + SWSS_VARS_FILE=/usr/share/sonic/templates/swss_vars.j2 # Retrieve SWSS vars from sonic-cfggen diff --git a/rules/config b/rules/config index 9e728acaa6ca..38b1b606e7cf 100644 --- a/rules/config +++ b/rules/config @@ -320,3 +320,6 @@ BUILD_REDUCE_IMAGE_SIZE = n # SONIC_PTF_ENV_PY_VER - SONiC PTF test Python version. Set to 'mixed' to build the # image with both Python 2 and 3. Set to 'py3' to build a Python 3 only image SONIC_PTF_ENV_PY_VER = mixed + +# Add timeout on some process which may hangs +BUILD_PROCESS_TIMEOUT ?= 0 diff --git a/rules/docker-database.mk b/rules/docker-database.mk index c38f574afbfb..3b16960f632a 100644 --- a/rules/docker-database.mk +++ b/rules/docker-database.mk @@ -28,7 +28,7 @@ SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_DATABASE_DBG) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_DATABASE_DBG) $(DOCKER_DATABASE)_CONTAINER_NAME = database -$(DOCKER_DATABASE)_RUN_OPT += --privileged -t +$(DOCKER_DATABASE)_RUN_OPT += -t --security-opt apparmor=unconfined --security-opt="systempaths=unconfined" $(DOCKER_DATABASE)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro $(DOCKER_DATABASE)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro diff --git a/rules/docker-dhcp-server.mk b/rules/docker-dhcp-server.mk index 94ec1bf0a357..b3960f16a9c6 100644 --- a/rules/docker-dhcp-server.mk +++ b/rules/docker-dhcp-server.mk @@ -38,8 +38,8 @@ $(DOCKER_DHCP_SERVER)_CONTAINER_NAME = dhcp_server $(DOCKER_DHCP_SERVER)_VERSION = 1.0.0 $(DOCKER_DHCP_SERVER)_PACKAGE_NAME = dhcp-server -$(DOCKER_MACSEC)_SERVICE_REQUIRES = config-setup -$(DOCKER_MACSEC)_SERVICE_AFTER = swss syncd +$(DOCKER_DHCP_SERVER)_SERVICE_REQUIRES = config-setup +$(DOCKER_DHCP_SERVER)_SERVICE_AFTER = swss syncd $(DOCKER_DHCP_SERVER)_CONTAINER_PRIVILEGED = false $(DOCKER_DHCP_SERVER)_CONTAINER_VOLUMES += /etc/sonic:/etc/sonic:ro diff --git a/rules/docker-sflow.mk b/rules/docker-sflow.mk index ece35f5cb8d0..cf54436a0910 100644 --- a/rules/docker-sflow.mk +++ b/rules/docker-sflow.mk @@ -30,7 +30,7 @@ SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_SFLOW_DBG) endif $(DOCKER_SFLOW)_CONTAINER_NAME = sflow -$(DOCKER_SFLOW)_RUN_OPT += -t +$(DOCKER_SFLOW)_RUN_OPT += -t --cap-add=NET_ADMIN --cap-add=SYS_ADMIN $(DOCKER_SFLOW)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro $(DOCKER_SFLOW)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro $(DOCKER_SFLOW)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/rules/ipmitool.mk b/rules/ipmitool.mk index aad6fea3a86f..a3d08452473f 100644 --- a/rules/ipmitool.mk +++ b/rules/ipmitool.mk @@ -1,6 +1,6 @@ # ipmitool packages IPMITOOL_VERSION = 1.8.19 -IPMITOOL_VERSION_SUFFIX = 4 +IPMITOOL_VERSION_SUFFIX = 4+deb12u1 IPMITOOL_VERSION_FULL = $(IPMITOOL_VERSION)-$(IPMITOOL_VERSION_SUFFIX) IPMITOOL = ipmitool_$(IPMITOOL_VERSION_FULL)_$(CONFIGURED_ARCH).deb $(IPMITOOL)_SRC_PATH = $(SRC_PATH)/ipmitool diff --git a/rules/linux-kernel.mk b/rules/linux-kernel.mk index acd900431332..246578086832 100644 --- a/rules/linux-kernel.mk +++ b/rules/linux-kernel.mk @@ -1,9 +1,9 @@ # linux kernel package -KVERSION_SHORT = 6.1.0-11-2 +KVERSION_SHORT = 6.1.0-22-2 KVERSION = $(KVERSION_SHORT)-$(CONFIGURED_ARCH) -KERNEL_VERSION = 6.1.38 -KERNEL_SUBVERSION = 4 +KERNEL_VERSION = 6.1.94 +KERNEL_SUBVERSION = 1 ifeq ($(CONFIGURED_ARCH), armhf) # Override kernel version for ARMHF as it uses arm MP (multi-platform) for short version KVERSION = $(KVERSION_SHORT)-armmp diff --git a/rules/openssh.mk b/rules/openssh.mk index 98dda081ec14..87bc2ee5cc02 100644 --- a/rules/openssh.mk +++ b/rules/openssh.mk @@ -1,18 +1,19 @@ # openssh package -OPENSSH_VERSION = 9.2p1-2+deb12u1 +OPENSSH_VERSION := 9.2p1 +OPENSSH_VERSION_FULL := $(OPENSSH_VERSION)-2+deb12u3 -export OPENSSH_VERSION +export OPENSSH_VERSION OPENSSH_VERSION_FULL -OPENSSH_SERVER = openssh-server_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb +OPENSSH_SERVER = openssh-server_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb $(OPENSSH_SERVER)_SRC_PATH = $(SRC_PATH)/openssh $(OPENSSH_SERVER)_DEPENDS += $(LIBNL3_DEV) $(LIBNL_ROUTE3_DEV) SONIC_MAKE_DEBS += $(OPENSSH_SERVER) -OPENSSH_CLIENT = openssh-client_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb +OPENSSH_CLIENT = openssh-client_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb $(eval $(call add_derived_package,$(OPENSSH_SERVER),$(OPENSSH_CLIENT))) -OPENSSH_SFTP_SERVER = openssh-sftp-server_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb +OPENSSH_SFTP_SERVER = openssh-sftp-server_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb $(eval $(call add_derived_package,$(OPENSSH_SERVER),$(OPENSSH_SFTP_SERVER))) # The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list} diff --git a/rules/phy-credo.mk b/rules/phy-credo.mk index cfc62e77ebb9..3d11475cf152 100644 --- a/rules/phy-credo.mk +++ b/rules/phy-credo.mk @@ -1,3 +1,3 @@ PHY_CREDO = phy-credo_1.0_amd64.deb -$(PHY_CREDO)_URL = "https://github.com/aristanetworks/sonic-firmware/raw/9e34da2a2d2d1e7e972cda3064b7b73c0558b322/phy/phy-credo_1.0_amd64.deb" +$(PHY_CREDO)_URL = "https://github.com/aristanetworks/sonic-firmware/raw/24716c4e03f223d8e18afff786ac427f6ac77fe0/phy/phy-credo_1.0_amd64.deb" SONIC_ONLINE_DEBS += $(PHY_CREDO) diff --git a/rules/sonic-fips.mk b/rules/sonic-fips.mk index 0ec82b26690d..5ab8f1a64063 100644 --- a/rules/sonic-fips.mk +++ b/rules/sonic-fips.mk @@ -1,9 +1,9 @@ # fips packages ifeq ($(BLDENV), bookworm) -FIPS_VERSION = 1.4.3-preview +FIPS_VERSION = 1.4.3-1 FIPS_OPENSSL_VERSION = 3.0.11-1~deb12u2+fips -FIPS_OPENSSH_VERSION = 9.2p1-2+deb12u2+fips +FIPS_OPENSSH_VERSION = 9.2p1-2+deb12u3+fips FIPS_PYTHON_MAIN_VERSION = 3.11 FIPS_PYTHON_VERSION = 3.11.2-6+fips FIPS_GOLANG_MAIN_VERSION = 1.19 @@ -12,14 +12,14 @@ FIPS_KRB5_VERSION = 1.20.1-2+deb12u1+fips endif ifeq ($(BLDENV), bullseye) -FIPS_VERSION = 0.12 +FIPS_VERSION = 0.13 FIPS_OPENSSL_VERSION = 1.1.1n-0+deb11u5+fips FIPS_OPENSSH_VERSION = 8.4p1-5+deb11u2+fips FIPS_PYTHON_MAIN_VERSION = 3.9 FIPS_PYTHON_VERSION = 3.9.2-1+fips FIPS_GOLANG_MAIN_VERSION = 1.15 FIPS_GOLANG_VERSION = 1.15.15-1~deb11u4+fips -FIPS_KRB5_VERSION = 1.18.3-6+deb11u4+fips +FIPS_KRB5_VERSION = 1.18.3-6+deb11u5+fips endif FIPS_URL_PREFIX = https://sonicstorage.blob.core.windows.net/public/fips/$(BLDENV)/$(FIPS_VERSION)/$(CONFIGURED_ARCH) diff --git a/rules/sonic-nettools.mk b/rules/sonic-nettools.mk new file mode 100644 index 000000000000..44351ec6be2a --- /dev/null +++ b/rules/sonic-nettools.mk @@ -0,0 +1,7 @@ +SONIC_NETTOOLS_VERSION = 0.0.1-0 + +export SONIC_NETTOOLS_VERSION + +SONIC_NETTOOLS = sonic-nettools_$(SONIC_NETTOOLS_VERSION)_$(CONFIGURED_ARCH).deb +$(SONIC_NETTOOLS)_SRC_PATH = $(SRC_PATH)/sonic-nettools +SONIC_DPKG_DEBS += $(SONIC_NETTOOLS) diff --git a/slave.mk b/slave.mk index c49a0efa3793..35f3c892fbe8 100644 --- a/slave.mk +++ b/slave.mk @@ -362,6 +362,15 @@ CROSS_COMPILE_FLAGS := CGO_ENABLED=1 GOOS=linux GOARCH=$(GOARCH) CROSS_COMPILE=$ endif +ifeq ($(CROSS_BUILD_ENVIRON),y) +ifeq ($(CONFIGURED_ARCH),armhf) +RUST_CROSS_COMPILE_TARGET = armv7-unknown-linux-gnueabihf +else ifeq ($(CONFIGURED_ARCH),arm64) +RUST_CROSS_COMPILE_TARGET = aarch64-unknown-linux-gnu +endif +export RUST_CROSS_COMPILE_TARGET +endif + ############################################################################### ## Routing stack related exports ############################################################################### @@ -789,8 +798,8 @@ $(addprefix $(DEBS_PATH)/, $(SONIC_DPKG_DEBS)) : $(DEBS_PATH)/% : .platform $$(a if [ -f ./autogen.sh ]; then ./autogen.sh $(LOG); fi $(SETUP_OVERLAYFS_FOR_DPKG_ADMINDIR) $(if $($*_DPKG_TARGET), - ${$*_BUILD_ENV} DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC} ${$*_DEB_BUILD_OPTIONS}" DEB_BUILD_PROFILES="${$*_DEB_BUILD_PROFILES}" $(ANT_DEB_CONFIG) $(CROSS_COMPILE_FLAGS) dpkg-buildpackage -rfakeroot -b $(ANT_DEB_CROSS_OPT) -us -uc -tc -j$(SONIC_CONFIG_MAKE_JOBS) --as-root -T$($*_DPKG_TARGET) --admindir $$mergedir $(LOG), - ${$*_BUILD_ENV} DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC} ${$*_DEB_BUILD_OPTIONS}" DEB_BUILD_PROFILES="${$*_DEB_BUILD_PROFILES}" $(ANT_DEB_CONFIG) $(CROSS_COMPILE_FLAGS) dpkg-buildpackage -rfakeroot -b $(ANT_DEB_CROSS_OPT) -us -uc -tc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $$mergedir $(LOG) + ${$*_BUILD_ENV} DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC} ${$*_DEB_BUILD_OPTIONS}" DEB_BUILD_PROFILES="${$*_DEB_BUILD_PROFILES}" $(ANT_DEB_CONFIG) $(CROSS_COMPILE_FLAGS) timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) dpkg-buildpackage -rfakeroot -b $(ANT_DEB_CROSS_OPT) -us -uc -tc -j$(SONIC_CONFIG_MAKE_JOBS) --as-root -T$($*_DPKG_TARGET) --admindir $$mergedir $(LOG), + ${$*_BUILD_ENV} DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC} ${$*_DEB_BUILD_OPTIONS}" DEB_BUILD_PROFILES="${$*_DEB_BUILD_PROFILES}" $(ANT_DEB_CONFIG) $(CROSS_COMPILE_FLAGS) timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) dpkg-buildpackage -rfakeroot -b $(ANT_DEB_CROSS_OPT) -us -uc -tc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $$mergedir $(LOG) ) popd $(LOG_SIMPLE) # Clean up @@ -940,19 +949,19 @@ $(addprefix $(PYTHON_WHEELS_PATH)/, $(SONIC_PYTHON_WHEELS)) : $(PYTHON_WHEELS_PA if [ -f ../$(notdir $($*_SRC_PATH)).patch/series ]; then ( quilt pop -a -f 1>/dev/null 2>&1 || true ) && QUILT_PATCHES=../$(notdir $($*_SRC_PATH)).patch quilt push -a; fi $(LOG) ifneq ($(CROSS_BUILD_ENVIRON),y) # Use pip instead of later setup.py to install dependencies into user home, but uninstall self - pip$($*_PYTHON_VERSION) install . && pip$($*_PYTHON_VERSION) uninstall --yes `python$($*_PYTHON_VERSION) setup.py --name` + { pip$($*_PYTHON_VERSION) install . && pip$($*_PYTHON_VERSION) uninstall --yes `python$($*_PYTHON_VERSION) setup.py --name`; } $(LOG) ifeq ($(BLDENV),bookworm) - if [ ! "$($*_TEST)" = "n" ]; then pip$($*_PYTHON_VERSION) install ".[testing]" && pip$($*_PYTHON_VERSION) uninstall --yes `python$($*_PYTHON_VERSION) setup.py --name` && python$($*_PYTHON_VERSION) -m pytest $(LOG); fi + if [ ! "$($*_TEST)" = "n" ]; then pip$($*_PYTHON_VERSION) install ".[testing]" && pip$($*_PYTHON_VERSION) uninstall --yes `python$($*_PYTHON_VERSION) setup.py --name` && timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) python$($*_PYTHON_VERSION) -m pytest; fi $(LOG) python$($*_PYTHON_VERSION) -m build -n $(LOG) else - if [ ! "$($*_TEST)" = "n" ]; then python$($*_PYTHON_VERSION) setup.py test $(LOG); fi + if [ ! "$($*_TEST)" = "n" ]; then timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) python$($*_PYTHON_VERSION) setup.py test $(LOG); fi python$($*_PYTHON_VERSION) setup.py bdist_wheel $(LOG) endif else { export PATH=$(VIRTENV_BIN_CROSS_PYTHON$($*_PYTHON_VERSION)):${PATH} python$($*_PYTHON_VERSION) setup.py build $(LOG) - if [ ! "$($*_TEST)" = "n" ]; then python$($*_PYTHON_VERSION) setup.py test $(LOG); fi + if [ ! "$($*_TEST)" = "n" ]; then timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) python$($*_PYTHON_VERSION) setup.py test $(LOG); fi python$($*_PYTHON_VERSION) setup.py bdist_wheel $(LOG) } endif @@ -1298,7 +1307,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_RFS_TARGETS)) : $(TARGET_PATH)/% : \ $(call dpkg_depend,$(TARGET_PATH)/%.dep) $(HEADER) - # $(call LOAD_CACHE,$*,$@) + # $(call LOAD_CACHE,$*,$@) # Skip building the target if it is already loaded from cache if [ -z '$($*_CACHE_LOADED)' ] ; then @@ -1368,6 +1377,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ $(PYTHON_SWSSCOMMON) \ $(PYTHON3_SWSSCOMMON) \ $(SONIC_DB_CLI) \ + $(SONIC_NETTOOLS) \ $(SONIC_RSYSLOG_PLUGIN) \ $(SONIC_UTILITIES_DATA) \ $(SONIC_HOST_SERVICES_DATA) \ diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2 index a254d3fab308..92a15eaf9972 100644 --- a/sonic-slave-bookworm/Dockerfile.j2 +++ b/sonic-slave-bookworm/Dockerfile.j2 @@ -113,6 +113,7 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install git-buildpackage \ perl-modules \ libclass-accessor-perl \ + libcap2-bin \ libswitch-perl \ libzmq5 \ libzmq3-dev \ @@ -520,7 +521,7 @@ RUN eatmydata apt-get install -y golang-go \ && ln -sf /usr/lib/go-1.19 /usr/local/go {%- endif %} -RUN pip3 install --upgrade pip +RUN pip3 install --upgrade pip==24.2 RUN apt-get purge -y python3-pip {%- if CONFIGURED_ARCH == "armhf" %} @@ -565,6 +566,7 @@ RUN pip3 uninstall -y enum34 # For sonic-platform-common testing RUN pip3 install redis RUN pip3 install psutil +RUN pip3 install blkinfo # For sonic-swss-common testing RUN pip3 install Pympler==1.0 @@ -655,6 +657,7 @@ RUN eatmydata apt-get install -y \ pps-tools:$arch \ libpam-cap:$arch \ libcap-dev:$arch \ + libcap2-bin:$arch \ libpam0g-dev:$arch \ libaudit-dev:$arch \ libgtk-3-dev:$arch \ @@ -736,3 +739,15 @@ RUN eatmydata apt install -y python-is-python3 ARG bazelisk_url=https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-{{ CONFIGURED_ARCH }} RUN curl -fsSL -o /usr/local/bin/bazel ${bazelisk_url} && chmod 755 /usr/local/bin/bazel {% endif -%} + +# Install Rust +ARG RUST_ROOT=/usr/.cargo +RUN RUSTUP_HOME=$RUST_ROOT CARGO_HOME=$RUST_ROOT bash -c 'curl --proto "=https" -sSf https://sh.rustup.rs | sh -s -- --default-toolchain 1.79.0 -y' +{% if CROSS_BUILD_ENVIRON == "y" and CONFIGURED_ARCH == "armhf" %} +RUN mkdir -p /.cargo && $RUST_ROOT/bin/rustup target add armv7-unknown-linux-gnueabihf && echo "[target.armv7-unknown-linux-gnueabihf]\nlinker = \"arm-linux-gnueabihf-gcc\"" >> /.cargo/config.toml +{% endif -%} +{% if CROSS_BUILD_ENVIRON == "y" and CONFIGURED_ARCH == "arm64" %} +RUN mkdir -p /.cargo && $RUST_ROOT/bin/rustup target add aarch64-unknown-linux-gnu && echo "[target.aarch64-unknown-linux-gnu]\nlinker = \"aarch64-linux-gnu-gcc\"" >> /.cargo/config.toml +{% endif -%} +ENV RUSTUP_HOME $RUST_ROOT +ENV PATH $PATH:$RUST_ROOT/bin \ No newline at end of file diff --git a/sonic-slave-bookworm/disable-non-manylinux.patch b/sonic-slave-bookworm/disable-non-manylinux.patch index 67e81c4e9116..dcdb953581c9 100644 --- a/sonic-slave-bookworm/disable-non-manylinux.patch +++ b/sonic-slave-bookworm/disable-non-manylinux.patch @@ -1,10 +1,16 @@ +Disable any type of wheel besides manylinux wheels. This is to work around an issue where the architecture-specific +wheel might be built with a newer glibc version than what is supported on the system. + +(This patch gets applied only on armhf.) + --- a/tags.py 2022-07-12 00:07:22.710207780 +0000 +++ b/tags.py 2022-07-12 00:07:13.185890659 +0000 -@@ -424,7 +424,6 @@ - _, arch = linux.split("_", 1) - yield from _manylinux.platform_tags(linux, arch) - yield from _musllinux.platform_tags(arch) -- yield linux +@@ -498,8 +498,6 @@ + archs = {"armv8l": ["armv8l", "armv7l"]}.get(arch, [arch]) + yield from _manylinux.platform_tags(archs) + yield from _musllinux.platform_tags(archs) +- for arch in archs: +- yield f"linux_{arch}" def _generic_platforms() -> Iterator[str]: diff --git a/sonic-slave-bullseye/Dockerfile.j2 b/sonic-slave-bullseye/Dockerfile.j2 index ea3cd41ef028..1aca2a0ba5e3 100644 --- a/sonic-slave-bullseye/Dockerfile.j2 +++ b/sonic-slave-bullseye/Dockerfile.j2 @@ -520,7 +520,7 @@ RUN wget -O golang-go.deb 'https://sonicstorage.blob.core.windows.net/public/fip && rm golang-go.deb golang-src.deb {%- endif %} -RUN pip3 install --upgrade pip +RUN pip3 install --upgrade pip==24.2 RUN apt-get purge -y python3-pip python3-yaml # For building Python packages @@ -587,6 +587,8 @@ RUN pip3 install "lxml==4.9.1" # For sonic-platform-common testing RUN pip3 install redis +RUN pip3 install psutil +RUN pip3 install blkinfo # For vs image build RUN pip3 install pexpect==4.8.0 diff --git a/sonic-slave-bullseye/disable-non-manylinux.patch b/sonic-slave-bullseye/disable-non-manylinux.patch index 67e81c4e9116..dcdb953581c9 100644 --- a/sonic-slave-bullseye/disable-non-manylinux.patch +++ b/sonic-slave-bullseye/disable-non-manylinux.patch @@ -1,10 +1,16 @@ +Disable any type of wheel besides manylinux wheels. This is to work around an issue where the architecture-specific +wheel might be built with a newer glibc version than what is supported on the system. + +(This patch gets applied only on armhf.) + --- a/tags.py 2022-07-12 00:07:22.710207780 +0000 +++ b/tags.py 2022-07-12 00:07:13.185890659 +0000 -@@ -424,7 +424,6 @@ - _, arch = linux.split("_", 1) - yield from _manylinux.platform_tags(linux, arch) - yield from _musllinux.platform_tags(arch) -- yield linux +@@ -498,8 +498,6 @@ + archs = {"armv8l": ["armv8l", "armv7l"]}.get(arch, [arch]) + yield from _manylinux.platform_tags(archs) + yield from _musllinux.platform_tags(archs) +- for arch in archs: +- yield f"linux_{arch}" def _generic_platforms() -> Iterator[str]: diff --git a/sonic-slave-buster/Dockerfile.j2 b/sonic-slave-buster/Dockerfile.j2 index 151df8243ed3..dce6daa520a0 100644 --- a/sonic-slave-buster/Dockerfile.j2 +++ b/sonic-slave-buster/Dockerfile.j2 @@ -561,6 +561,10 @@ RUN pip3 install "lxml==4.9.1" # For sonic-platform-common testing RUN pip2 install redis RUN pip3 install redis +RUN pip2 install psutil +RUN pip3 install psutil +RUN pip2 install blkinfo +RUN pip3 install blkinfo # For vs image build RUN pip2 install pexpect==4.6.0 diff --git a/src/dash-sai/Makefile b/src/dash-sai/Makefile index 2a188c49f6c9..927f799f9b72 100644 --- a/src/dash-sai/Makefile +++ b/src/dash-sai/Makefile @@ -37,6 +37,7 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : sed -i.bak '/checkenumlock.sh/d' SAI/SAI/meta/Makefile sed -i.bak '/checkancestry.sh/d' SAI/SAI/meta/Makefile sed -i.bak '/checkstructs.sh/d' SAI/SAI/meta/Makefile + sed -i.bak "/.\/saimetadatatest >\/dev\/null/d" SAI/SAI/meta/Makefile pushd SAI/SAI/meta/ CFLAGS=-Wdangling-pointer=1 make all libsaimetadata.so popd diff --git a/src/isc-dhcp/patch/0017-Register-IO-obj-before-create-fd-watch.patch b/src/isc-dhcp/patch/0017-Register-IO-obj-before-create-fd-watch.patch new file mode 100644 index 000000000000..7e1bddd63906 --- /dev/null +++ b/src/isc-dhcp/patch/0017-Register-IO-obj-before-create-fd-watch.patch @@ -0,0 +1,110 @@ +From debe69ebc8df454f0fa7a8c6f3a7c9622ceaf3c2 Mon Sep 17 00:00:00 2001 +From: yaqiangz +Date: Mon, 26 Aug 2024 02:18:52 +0000 +Subject: [PATCH] Register IO obj before create fd watch + +--- + omapip/dispatch.c | 44 +++++++++++++++++++++++++++----------------- + 1 file changed, 27 insertions(+), 17 deletions(-) + +diff --git a/omapip/dispatch.c b/omapip/dispatch.c +index 644ab43..d9b9a57 100644 +--- a/omapip/dispatch.c ++++ b/omapip/dispatch.c +@@ -123,6 +123,7 @@ omapi_iscsock_cb(isc_task_t *task, + int flags) + { + omapi_io_object_t *obj; ++ omapi_io_object_t *temp_obj; + isc_result_t status; + + /* Get the current time... */ +@@ -140,6 +141,9 @@ omapi_iscsock_cb(isc_task_t *task, + } + + if (obj == NULL) { ++ temp_obj = (omapi_io_object_t *) cbarg; ++ log_error ("Isc socket callback of fd %d return 0 because obj is NULL", ++ temp_obj->fd->methods->getfd(temp_obj->fd)); + return(0); + } + #else +@@ -157,6 +161,8 @@ omapi_iscsock_cb(isc_task_t *task, + * close the socket. + */ + if (obj->closed == ISC_TRUE) { ++ log_error ("Isc socket callback of fd %d return 0 because fd closed", ++ obj->fd->methods->getfd(obj->fd)); + return(0); + } + #endif +@@ -170,8 +176,11 @@ omapi_iscsock_cb(isc_task_t *task, + * read and got no bytes) we don't need to try + * again. + */ +- if (status == ISC_R_SHUTTINGDOWN) ++ if (status == ISC_R_SHUTTINGDOWN) { ++ log_error ("Isc socket callback of fd %d return 0 because reader shutdown", ++ obj->fd->methods->getfd(obj->fd)); + return (0); ++ } + /* Otherwise We always ask for more when reading */ + return (1); + } else if ((flags == ISC_SOCKFDWATCH_WRITE) && +@@ -190,6 +199,8 @@ omapi_iscsock_cb(isc_task_t *task, + * structures etc) or no more to write, tell the socket + * lib we don't have more to do right now. + */ ++ log_error ("Isc socket callback of fd %d return 0 because unknown issue", ++ obj->fd->methods->getfd(obj->fd)); + return (0); + } + +@@ -255,6 +266,21 @@ isc_result_t omapi_register_io_object (omapi_object_t *h, + fd = writefd(h); + } + ++ /* Find the last I/O state, if there are any. */ ++ for (p = omapi_io_states.next; ++ p && p -> next; p = p -> next) ++ ; ++ if (p) ++ omapi_io_reference (&p -> next, obj, MDL); ++ else ++ omapi_io_reference (&omapi_io_states.next, obj, MDL); ++ ++ obj -> readfd = readfd; ++ obj -> writefd = writefd; ++ obj -> reader = reader; ++ obj -> writer = writer; ++ obj -> reaper = reaper; ++ + if (fd_flags != 0) { + status = isc_socket_fdwatchcreate(dhcp_gbl_ctx.socketmgr, + fd, fd_flags, +@@ -274,22 +300,6 @@ isc_result_t omapi_register_io_object (omapi_object_t *h, + } + } + +- +- /* Find the last I/O state, if there are any. */ +- for (p = omapi_io_states.next; +- p && p -> next; p = p -> next) +- ; +- if (p) +- omapi_io_reference (&p -> next, obj, MDL); +- else +- omapi_io_reference (&omapi_io_states.next, obj, MDL); +- +- obj -> readfd = readfd; +- obj -> writefd = writefd; +- obj -> reader = reader; +- obj -> writer = writer; +- obj -> reaper = reaper; +- + omapi_io_dereference(&obj, MDL); + return ISC_R_SUCCESS; + } +-- +2.25.1 + diff --git a/src/isc-dhcp/patch/series b/src/isc-dhcp/patch/series index 755200d9eb99..d61fd2bf780b 100644 --- a/src/isc-dhcp/patch/series +++ b/src/isc-dhcp/patch/series @@ -14,3 +14,4 @@ 0014-enable-parallel-build.patch 0015-option-to-set-primary-address-in-interface.patch 0016-Don-t-look-up-the-ifindex-for-fallback.patch +0017-Register-IO-obj-before-create-fd-watch.patch diff --git a/src/linkmgrd b/src/linkmgrd index f96d40cfbe4a..287dbd70298c 160000 --- a/src/linkmgrd +++ b/src/linkmgrd @@ -1 +1 @@ -Subproject commit f96d40cfbe4a771c60579935998ae2c52816c4ea +Subproject commit 287dbd70298c1743668182913644d2bbe3cdcd5b diff --git a/src/openssh/Makefile b/src/openssh/Makefile index c52a86baf4e2..8ecea0228c14 100644 --- a/src/openssh/Makefile +++ b/src/openssh/Makefile @@ -2,21 +2,25 @@ SHELL = /bin/bash .SHELLFLAGS += -e -MAIN_TARGET = openssh-server_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb -DERIVED_TARGETS = openssh-server-dbgsym_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb \ - openssh-client_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb \ - openssh-client-dbgsym_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb \ - openssh-sftp-server_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb \ - openssh-sftp-server-dbgsym_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb +MAIN_TARGET = openssh-server_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb +DERIVED_TARGETS = openssh-server-dbgsym_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + openssh-client_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + openssh-client-dbgsym_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + openssh-sftp-server_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + openssh-sftp-server-dbgsym_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : - # Obtain openssh: https://salsa.debian.org/ssh-team/openssh/-/tree/debian/1%258.4p1-5 - rm -rf ./openssh-server - git clone https://salsa.debian.org/ssh-team/openssh.git openssh-server - pushd ./openssh-server + # Remove any stale files + rm -rf ./openssh-$(OPENSSH_VERSION) - # Check out tag: debian/1%8.4p1-5 - git checkout -b openssh-src -f debian/1\%$(OPENSSH_VERSION) + # Get openssh release, debian files + dget https://security.debian.org/pool/updates/main/o/openssh/openssh_$(OPENSSH_VERSION_FULL).dsc + pushd ./openssh-$(OPENSSH_VERSION) + + # Create a git repository here for stg to apply patches + git init + git add -f * + git commit -qm "initial commit" # Apply patch series stg init diff --git a/src/sonic-bgpcfgd/bgpcfgd/main.py b/src/sonic-bgpcfgd/bgpcfgd/main.py index 624d311037ad..4b41e6825f95 100644 --- a/src/sonic-bgpcfgd/bgpcfgd/main.py +++ b/src/sonic-bgpcfgd/bgpcfgd/main.py @@ -6,6 +6,7 @@ import traceback from swsscommon import swsscommon +from sonic_py_common import device_info from .config import ConfigMgr from .directory import Directory @@ -20,6 +21,7 @@ from .managers_static_rt import StaticRouteMgr from .managers_rm import RouteMapMgr from .managers_device_global import DeviceGlobalCfgMgr +from .managers_chassis_app_db import ChassisAppDbMgr from .static_rt_timer import StaticRouteTimer from .runner import Runner, signal_handler from .template import TemplateFabric @@ -74,6 +76,10 @@ def do_work(): # Device Global Manager DeviceGlobalCfgMgr(common_objs, "CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME), ] + + if device_info.is_chassis(): + managers.append(ChassisAppDbMgr(common_objs, "CHASSIS_APP_DB", "BGP_DEVICE_GLOBAL")) + runner = Runner(common_objs['cfg_mgr']) for mgr in managers: runner.add_manager(mgr) diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bbr.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bbr.py index 0e82d0a4b6d5..6e1a33e8947d 100644 --- a/src/sonic-bgpcfgd/bgpcfgd/managers_bbr.py +++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bbr.py @@ -45,26 +45,38 @@ def del_handler(self, key): def __init(self): """ Initialize BBRMgr. Extracted from constructor """ - if not 'bgp' in self.constants: - log_err("BBRMgr::Disabled: 'bgp' key is not found in constants") - return - if 'bbr' in self.constants['bgp'] \ - and 'enabled' in self.constants['bgp']['bbr'] \ - and self.constants['bgp']['bbr']['enabled']: + # Check BGP_BBR table from config_db first + bbr_status_from_config_db = self.get_bbr_status_from_config_db() + + if bbr_status_from_config_db is None: + if not 'bgp' in self.constants: + log_err("BBRMgr::Disabled: 'bgp' key is not found in constants") + return + if 'bbr' in self.constants['bgp'] \ + and 'enabled' in self.constants['bgp']['bbr'] \ + and self.constants['bgp']['bbr']['enabled']: + self.bbr_enabled_pgs = self.__read_pgs() + if self.bbr_enabled_pgs: + self.enabled = True + if 'default_state' in self.constants['bgp']['bbr'] \ + and self.constants['bgp']['bbr']['default_state'] == 'enabled': + default_status = "enabled" + else: + default_status = "disabled" + self.directory.put(self.db_name, self.table_name, 'status', default_status) + log_info("BBRMgr::Initialized and enabled from constants. Default state: '%s'" % default_status) + else: + log_info("BBRMgr::Disabled: no BBR enabled peers") + else: + log_info("BBRMgr::Disabled: no bgp.bbr.enabled in the constants") + else: self.bbr_enabled_pgs = self.__read_pgs() if self.bbr_enabled_pgs: self.enabled = True - if 'default_state' in self.constants['bgp']['bbr'] \ - and self.constants['bgp']['bbr']['default_state'] == 'enabled': - default_status = "enabled" - else: - default_status = "disabled" - self.directory.put(self.db_name, self.table_name, 'status', default_status) - log_info("BBRMgr::Initialized and enabled. Default state: '%s'" % default_status) + self.directory.put(self.db_name, self.table_name, 'status', bbr_status_from_config_db) + log_info("BBRMgr::Initialized and enabled from config_db. Default state: '%s'" % bbr_status_from_config_db) else: log_info("BBRMgr::Disabled: no BBR enabled peers") - else: - log_info("BBRMgr::Disabled: no bgp.bbr.enabled in the constants") def __read_pgs(self): """ @@ -82,6 +94,35 @@ def __read_pgs(self): res[pg_name] = pg_afs return res + def get_bbr_status_from_config_db(self): + """ + Read BBR status from CONFIG_DB + :return: BBR status from CONFIG_DB or None if not found + """ + try: + config_db = swsscommon.ConfigDBConnector() + if config_db is None: + log_info("BBRMgr::Failed to connect to CONFIG_DB, get BBR default state from constants.yml") + return None + config_db.connect() + except Exception as e: + log_info("BBRMgr::Failed to connect to CONFIG_DB with exception %s, get BBR default state from constants.yml" % str(e)) + return None + + try: + bbr_table_data = config_db.get_table(self.table_name) + if bbr_table_data and 'all' in bbr_table_data and 'status' in bbr_table_data["all"]: + if bbr_table_data["all"]["status"] == "enabled": + return "enabled" + else: + return "disabled" + else: + log_info("BBRMgr::BBR status is not found in CONFIG_DB, get BBR default state from constants.yml") + return None + except Exception as e: + log_info("BBRMgr::Failed to read BBR status from CONFIG_DB with exception %s, get BBR default state from constants.yml" % str(e)) + return None + def __set_validation(self, key, data): """ Validate set-command arguments :param key: key of 'set' command diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py index 3708b5b30dfc..0b07f9cbcda7 100644 --- a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py +++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py @@ -107,6 +107,7 @@ def __init__(self, common_objs, db_name, table_name, peer_type, check_neig_meta) deps = [ ("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/bgp_asn"), + ("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/type"), ("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME, "Loopback0"), ("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"), ("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "idf_isolation_state"), diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_chassis_app_db.py b/src/sonic-bgpcfgd/bgpcfgd/managers_chassis_app_db.py new file mode 100644 index 000000000000..7969ae828d80 --- /dev/null +++ b/src/sonic-bgpcfgd/bgpcfgd/managers_chassis_app_db.py @@ -0,0 +1,50 @@ +from .manager import Manager +from .managers_device_global import DeviceGlobalCfgMgr +from .log import log_err, log_debug, log_notice +import re +from swsscommon import swsscommon + +class ChassisAppDbMgr(Manager): + """This class responds to change in tsa_enabled state of the supervisor""" + + def __init__(self, common_objs, db, table): + """ + Initialize the object + :param common_objs: common object dictionary + :param db: name of the db + :param table: name of the table in the db + """ + self.lc_tsa = "" + self.directory = common_objs['directory'] + self.dev_cfg_mgr = DeviceGlobalCfgMgr(common_objs, "CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME) + self.directory.subscribe([("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"),], self.on_lc_tsa_status_change) + super(ChassisAppDbMgr, self).__init__( + common_objs, + [], + db, + table, + ) + + def on_lc_tsa_status_change(self): + if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"): + self.lc_tsa = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)["tsa_enabled"] + log_debug("ChassisAppDbMgr:: LC TSA update handler status %s" % self.lc_tsa) + + def set_handler(self, key, data): + log_debug("ChassisAppDbMgr:: set handler") + + if not data: + log_err("ChassisAppDbMgr:: data is None") + return False + + if "tsa_enabled" in data: + if self.lc_tsa == "false": + self.dev_cfg_mgr.cfg_mgr.commit() + self.dev_cfg_mgr.cfg_mgr.update() + self.dev_cfg_mgr.isolate_unisolate_device(data["tsa_enabled"]) + return True + return False + + def del_handler(self, key): + log_debug("ChassisAppDbMgr:: del handler") + return True diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py b/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py index 1943dfa5d709..30ff726cb597 100644 --- a/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py +++ b/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py @@ -4,6 +4,7 @@ from .manager import Manager from .log import log_err, log_debug, log_notice from swsscommon import swsscommon +from sonic_py_common import device_info class DeviceGlobalCfgMgr(Manager): """This class responds to change in device-specific state""" @@ -18,8 +19,9 @@ def __init__(self, common_objs, db, table): :param common_objs: common object dictionary :param db: name of the db :param table: name of the table in the db - """ - self.switch_type = "" + """ + self.switch_role = "" + self.chassis_tsa = "" self.directory = common_objs['directory'] self.cfg_mgr = common_objs['cfg_mgr'] self.constants = common_objs['constants'] @@ -27,8 +29,8 @@ def __init__(self, common_objs, db, table): self.tsb_template = common_objs['tf'].from_file("bgpd/tsa/bgpd.tsa.unisolate.conf.j2") self.wcmp_template = common_objs['tf'].from_file("bgpd/wcmp/bgpd.wcmp.conf.j2") self.idf_isolate_template = common_objs['tf'].from_file("bgpd/idf_isolate/idf_isolate.conf.j2") - self.idf_unisolate_template = common_objs['tf'].from_file("bgpd/idf_isolate/idf_unisolate.conf.j2") - self.directory.subscribe([("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/switch_type"),], self.on_switch_type_change) + self.idf_unisolate_template = common_objs['tf'].from_file("bgpd/idf_isolate/idf_unisolate.conf.j2") + self.directory.subscribe([("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/type"),], self.handle_type_update) super(DeviceGlobalCfgMgr, self).__init__( common_objs, [], @@ -46,18 +48,16 @@ def __init__(self, common_objs, db, table): if not self.directory.path_exist(self.db_name, self.table_name, "idf_isolation_state"): self.directory.put(self.db_name, self.table_name, "idf_isolation_state", self.IDF_DEFAULTS) - def on_switch_type_change(self): - log_debug("DeviceGlobalCfgMgr:: Switch type update handler") - if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/switch_type"): - self.switch_type = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"]["switch_type"] - log_debug("DeviceGlobalCfgMgr:: Switch type: %s" % self.switch_type) + def handle_type_update(self): + log_debug("DeviceGlobalCfgMgr:: Switch role update handler") + if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/type"): + self.switch_role = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"]["type"] + log_debug("DeviceGlobalCfgMgr:: Switch role: %s" % self.switch_role) def set_handler(self, key, data): """ Handle device TSA/W-ECMP state change """ log_debug("DeviceGlobalCfgMgr:: set handler") - if self.switch_type: - log_debug("DeviceGlobalCfgMgr:: Switch type: %s" % self.switch_type) if not data: log_err("DeviceGlobalCfgMgr:: data is None") return False @@ -97,11 +97,16 @@ def configure_tsa(self, data=None): if "tsa_enabled" in data: state = data["tsa_enabled"] - if self.is_update_required("tsa_enabled", state): + self.chassis_tsa = self.get_chassis_tsa_status() + requires_update = self.is_update_required("tsa_enabled", state) + + if state in ["true", "false"] and self.directory.path_exist(self.db_name, self.table_name, "tsa_enabled"): + self.directory.put(self.db_name, self.table_name, "tsa_enabled", state) + + if requires_update and self.chassis_tsa == "false": self.cfg_mgr.commit() self.cfg_mgr.update() - if self.isolate_unisolate_device(state): - self.directory.put(self.db_name, self.table_name, "tsa_enabled", state) + self.isolate_unisolate_device(state) else: log_notice("DeviceGlobalCfgMgr:: TSA configuration is up-to-date") @@ -167,7 +172,9 @@ def check_state_and_get_tsa_routemaps(self, cfg): cmd = "" if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"): tsa_status = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)["tsa_enabled"] - if tsa_status == "true": + chassis_tsa = self.get_chassis_tsa_status() + + if tsa_status == "true" or chassis_tsa == "true": cmds = cfg.replace("#012", "\n").split("\n") log_notice("DeviceGlobalCfgMgr:: Device is isolated. Applying TSA route-maps") cmd = self.get_ts_routemaps(cmds, self.tsa_template) @@ -228,6 +235,21 @@ def __extract_out_route_map_names(self, cmds): route_map_names.add(result.group(1)) return route_map_names + def get_chassis_tsa_status(self): + chassis_tsa_status = "false" + + if not device_info.is_chassis(): + return chassis_tsa_status + + try: + ch = swsscommon.SonicV2Connector(use_unix_socket_path=False) + ch.connect(ch.CHASSIS_APP_DB, False) + chassis_tsa_status = ch.get(ch.CHASSIS_APP_DB, "BGP_DEVICE_GLOBAL|STATE", 'tsa_enabled') + except Exception as e: + log_err("Got an exception {}".format(e)) + + return chassis_tsa_status + def downstream_isolate_unisolate(self, idf_isolation_state): """ API to apply IDF configuration """ @@ -235,8 +257,8 @@ def downstream_isolate_unisolate(self, idf_isolation_state): log_err("IDF: invalid value({}) is provided".format(idf_isolation_state)) return False - if self.switch_type and self.switch_type != "SpineRouter": - log_debug("DeviceGlobalCfgMgr:: Skipping IDF isolation configuration on Switch type: %s" % self.switch_type) + if self.switch_role and self.switch_role != "SpineRouter": + log_debug("DeviceGlobalCfgMgr:: Skipping IDF isolation configuration on %s" % self.switch_role) return True cmd = "\n" diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_rm.py b/src/sonic-bgpcfgd/bgpcfgd/managers_rm.py index 35a3f864d55c..2412dc3d9eab 100644 --- a/src/sonic-bgpcfgd/bgpcfgd/managers_rm.py +++ b/src/sonic-bgpcfgd/bgpcfgd/managers_rm.py @@ -2,7 +2,7 @@ from swsscommon import swsscommon from .log import log_err, log_debug -ROUTE_MAPS = ["FROM_SDN_SLB_ROUTES"] +ROUTE_MAPS = ["FROM_SDN_SLB_ROUTES", "FROM_SDN_APPLIANCE_ROUTES"] FROM_SDN_SLB_DEPLOYMENT_ID = '2' class RouteMapMgr(Manager): @@ -83,7 +83,7 @@ def __read_asn(self): def __update_rm(self, rm, data): cmds = [] - if rm == "FROM_SDN_SLB_ROUTES": + if rm in ROUTE_MAPS : cmds.append("route-map %s permit 100" % ("%s_RM" % rm)) bgp_asn = self.__read_asn() if bgp_asn is None or bgp_asn is '': diff --git a/src/sonic-bgpcfgd/bgpcfgd/runner.py b/src/sonic-bgpcfgd/bgpcfgd/runner.py index 4c160e5967cf..75df6f902e9a 100644 --- a/src/sonic-bgpcfgd/bgpcfgd/runner.py +++ b/src/sonic-bgpcfgd/bgpcfgd/runner.py @@ -39,7 +39,10 @@ def add_manager(self, manager): table_name = manager.get_table_name() db = swsscommon.SonicDBConfig.getDbId(db_name) if db not in self.db_connectors: - self.db_connectors[db] = swsscommon.DBConnector(db_name, 0) + if db_name == "CHASSIS_APP_DB": + self.db_connectors[db] = swsscommon.DBConnector(db_name, 0, True, '') + else: + self.db_connectors[db] = swsscommon.DBConnector(db_name, 0) if table_name not in self.callbacks[db]: conn = self.db_connectors[db] diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all.conf index 8d0c17d592b8..f19b98a859c8 100644 --- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all.conf +++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all.conf @@ -31,6 +31,7 @@ route-map FROM_BGP_PEER_V6 permit 11 route-map FROM_BGP_PEER_V4 permit 100 ! route-map TO_BGP_PEER_V4 permit 100 + call CHECK_IDF_ISOLATION ! route-map FROM_BGP_PEER_V6 permit 1 on-match next @@ -39,6 +40,9 @@ route-map FROM_BGP_PEER_V6 permit 1 route-map FROM_BGP_PEER_V6 permit 100 ! route-map TO_BGP_PEER_V6 permit 100 + call CHECK_IDF_ISOLATION +! +route-map CHECK_IDF_ISOLATION permit 10 ! ! end of template: bgpd/templates/general/policies.conf.j2 ! diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_base.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_base.conf index 8f7631caabd8..671eea007cf9 100644 --- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_base.conf +++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_base.conf @@ -4,6 +4,7 @@ route-map FROM_BGP_PEER_V4 permit 100 ! route-map TO_BGP_PEER_V4 permit 100 + call CHECK_IDF_ISOLATION ! route-map FROM_BGP_PEER_V6 permit 1 on-match next @@ -12,6 +13,9 @@ route-map FROM_BGP_PEER_V6 permit 1 route-map FROM_BGP_PEER_V6 permit 100 ! route-map TO_BGP_PEER_V6 permit 100 + call CHECK_IDF_ISOLATION +! +route-map CHECK_IDF_ISOLATION permit 10 ! ! end of template: bgpd/templates/general/policies.conf.j2 ! diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_deny.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_deny.conf index 661414bd579c..fdc10b84bf8f 100644 --- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_deny.conf +++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_deny.conf @@ -31,6 +31,7 @@ route-map FROM_BGP_PEER_V6 permit 11 route-map FROM_BGP_PEER_V4 permit 100 ! route-map TO_BGP_PEER_V4 permit 100 + call CHECK_IDF_ISOLATION ! route-map FROM_BGP_PEER_V6 permit 1 on-match next @@ -39,6 +40,9 @@ route-map FROM_BGP_PEER_V6 permit 1 route-map FROM_BGP_PEER_V6 permit 100 ! route-map TO_BGP_PEER_V6 permit 100 + call CHECK_IDF_ISOLATION +! +route-map CHECK_IDF_ISOLATION permit 10 ! ! end of template: bgpd/templates/general/policies.conf.j2 ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf index 6b7e1feff000..bd8afe7f915c 100644 --- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf @@ -22,9 +22,11 @@ log facility local4 ! vrf First vni 10 +exit ! vrf Second vni 20 +exit ! ! Enable nht through default route ip nht resolve-via-default diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v4.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v4.conf index 604af65d5e66..1250552211e0 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v4.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v4.conf @@ -7,7 +7,7 @@ neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 - neighbor 10.10.10.10 timers 3 10 + neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 neighbor 10.10.10.10 shutdown ! diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v6.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v6.conf index 793473c2e202..e6274e05332c 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v6.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v6.conf @@ -7,7 +7,7 @@ neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 - neighbor fc00::01 timers 3 10 + neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 neighbor fc00::01 shutdown ! diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v4.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v4.conf index 23bf5841f9cc..4d2f2c251e44 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v4.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v4.conf @@ -7,7 +7,7 @@ neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 - neighbor 10.10.10.10 timers 3 10 + neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 address-family ipv4 maximum-paths ibgp 64 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v6.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v6.conf index a0bd9379c8b2..375d00051199 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v6.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v6.conf @@ -7,7 +7,7 @@ neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 - neighbor fc00::01 timers 3 10 + neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 address-family ipv4 maximum-paths ibgp 64 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_1.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_1.conf index f26f0d6d3d0c..5181fad5187f 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_1.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_1.conf @@ -7,7 +7,7 @@ neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 - neighbor 10.10.10.10 timers 3 10 + neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 neighbor 10.10.10.10 shutdown ! diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_2.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_2.conf index 23bf5841f9cc..4d2f2c251e44 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_2.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_2.conf @@ -7,7 +7,7 @@ neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 - neighbor 10.10.10.10 timers 3 10 + neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 address-family ipv4 maximum-paths ibgp 64 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_1.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_1.conf index 4057147d5d58..144a26ca4852 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_1.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_1.conf @@ -7,7 +7,7 @@ neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 - neighbor fc00::01 timers 3 10 + neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 neighbor fc00::01 shutdown ! diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_2.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_2.conf index a0bd9379c8b2..375d00051199 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_2.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_2.conf @@ -7,7 +7,7 @@ neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 - neighbor fc00::01 timers 3 10 + neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 address-family ipv4 maximum-paths ibgp 64 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_1.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_1.conf index 23bf5841f9cc..4d2f2c251e44 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_1.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_1.conf @@ -7,7 +7,7 @@ neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 - neighbor 10.10.10.10 timers 3 10 + neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 address-family ipv4 maximum-paths ibgp 64 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_2.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_2.conf index 23bf5841f9cc..4d2f2c251e44 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_2.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_2.conf @@ -7,7 +7,7 @@ neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 - neighbor 10.10.10.10 timers 3 10 + neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 address-family ipv4 maximum-paths ibgp 64 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_1.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_1.conf index a0bd9379c8b2..375d00051199 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_1.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_1.conf @@ -7,7 +7,7 @@ neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 - neighbor fc00::01 timers 3 10 + neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 address-family ipv4 maximum-paths ibgp 64 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_2.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_2.conf index a0bd9379c8b2..375d00051199 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_2.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_2.conf @@ -7,7 +7,7 @@ neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 - neighbor fc00::01 timers 3 10 + neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 address-family ipv4 maximum-paths ibgp 64 diff --git a/src/sonic-bgpcfgd/tests/test_bbr.py b/src/sonic-bgpcfgd/tests/test_bbr.py index b95b94493af4..554c4acfcd47 100644 --- a/src/sonic-bgpcfgd/tests/test_bbr.py +++ b/src/sonic-bgpcfgd/tests/test_bbr.py @@ -112,6 +112,7 @@ def __init_common(constants, 'tf': TemplateFabric(), 'constants': constants, } + m = BBRMgr(common_objs, "CONFIG_DB", "BGP_BBR") m._BBRMgr__init() assert m.bbr_enabled_pgs == expected_bbr_enabled_pgs @@ -157,7 +158,7 @@ def test___init_6(): "bbr": expected_bbr_entries, } } - __init_common(constants, "BBRMgr::Initialized and enabled. Default state: 'disabled'", None, expected_bbr_entries, "disabled") + __init_common(constants, "BBRMgr::Initialized and enabled from constants. Default state: 'disabled'", None, expected_bbr_entries, "disabled") def test___init_7(): expected_bbr_entries = { @@ -171,7 +172,7 @@ def test___init_7(): "bbr": expected_bbr_entries, } } - __init_common(constants, "BBRMgr::Initialized and enabled. Default state: 'disabled'", None, expected_bbr_entries, "disabled") + __init_common(constants, "BBRMgr::Initialized and enabled from constants. Default state: 'disabled'", None, expected_bbr_entries, "disabled") def test___init_8(): expected_bbr_entries = { @@ -185,7 +186,32 @@ def test___init_8(): "bbr": expected_bbr_entries, } } - __init_common(constants, "BBRMgr::Initialized and enabled. Default state: 'enabled'", None, expected_bbr_entries, "enabled") + __init_common(constants, "BBRMgr::Initialized and enabled from constants. Default state: 'enabled'", None, expected_bbr_entries, "enabled") + +@patch('bgpcfgd.managers_bbr.BBRMgr.get_bbr_status_from_config_db', return_value='disabled') +def test___init_with_config_db_overwirte_constants(mocked_get_bbr_status_from_config_db): + expected_bbr_entries = { + "PEER_V4": ["ipv4"], + "PEER_V6": ["ipv6"], + } + constants = deepcopy(global_constants) + constants["bgp"]["bbr"] = {"enabled": True, "default_state": "enabled"} + constants["bgp"]["peers"] = { + "general": { + "bbr": expected_bbr_entries, + } + } + + # BBR status from config_db should be prioritized over constants + __init_common(constants, "BBRMgr::Initialized and enabled from config_db. Default state: 'disabled'", None, expected_bbr_entries, "disabled") + +@patch('bgpcfgd.managers_bbr.BBRMgr.get_bbr_status_from_config_db', return_value='enabled') +def test___init_with_config_db_no_peers(mocked_get_bbr_status_from_config_db): + + constants = deepcopy(global_constants) + constants["bgp"]["bbr"] = {"enabled": True} + + __init_common(constants, "BBRMgr::Disabled: no BBR enabled peers", None, {}, "disabled") @patch('bgpcfgd.managers_bbr.log_info') def read_pgs_common(constants, expected_log_info, expected_bbr_enabled_pgs, mocked_log_info): diff --git a/src/sonic-bgpcfgd/tests/test_chassis_app_db.py b/src/sonic-bgpcfgd/tests/test_chassis_app_db.py new file mode 100644 index 000000000000..edb08595ade1 --- /dev/null +++ b/src/sonic-bgpcfgd/tests/test_chassis_app_db.py @@ -0,0 +1,142 @@ +from unittest.mock import MagicMock, patch + +import os +from bgpcfgd.directory import Directory +from bgpcfgd.template import TemplateFabric +from . import swsscommon_test +from .util import load_constants +import bgpcfgd.managers_chassis_app_db +import bgpcfgd.managers_device_global +from swsscommon import swsscommon +from copy import deepcopy + +TEMPLATE_PATH = os.path.abspath('../../dockers/docker-fpm-frr/frr') +BASE_PATH = os.path.abspath('../sonic-bgpcfgd/tests/data/general/peer-group.conf/') +INTERNAL_BASE_PATH = os.path.abspath('../sonic-bgpcfgd/tests/data/internal/peer-group.conf/') +global_constants = { + "bgp": { + "traffic_shift_community" :"12345:12345", + "internal_community_match_tag" : "1001" + } +} + +def constructor(check_internal=False): + cfg_mgr = MagicMock() + def get_text(): + text = [] + for line in cfg_mgr.changes.split('\n'): + if line.lstrip().startswith('!'): + continue + text.append(line) + text += [" "] + return text + def update(): + if check_internal: + cfg_mgr.changes = get_string_from_file("/result_chasiss_packet.conf", INTERNAL_BASE_PATH) + else: + cfg_mgr.changes = get_string_from_file("/result_all.conf") + def push(cfg): + cfg_mgr.changes += cfg + "\n" + def get_config(): + return cfg_mgr.changes + cfg_mgr.get_text = get_text + cfg_mgr.update = update + cfg_mgr.push = push + cfg_mgr.get_config = get_config + + constants = deepcopy(global_constants) + common_objs = { + 'directory': Directory(), + 'cfg_mgr': cfg_mgr, + 'tf': TemplateFabric(TEMPLATE_PATH), + 'constants': constants + } + mgr = bgpcfgd.managers_chassis_app_db.ChassisAppDbMgr(common_objs, "CHASSIS_APP_DB", "BGP_DEVICE_GLOBAL") + cfg_mgr.update() + return mgr + + +@patch('bgpcfgd.managers_device_global.log_debug') +def test_isolate_device(mocked_log_info): + m = constructor() + + m.lc_tsa = "false" + res = m.set_handler("STATE", {"tsa_enabled": "true"}) + assert res, "Expect True return value for set_handler" + mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done") + assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_isolate.conf") + + curr_cfg = m.cfg_mgr.get_config() + m.lc_tsa = "true" + res = m.set_handler("STATE", {"tsa_enabled": "true"}) + assert res, "Expect True return value for set_handler" + assert m.cfg_mgr.get_config() == curr_cfg + +@patch('bgpcfgd.managers_device_global.log_debug') +def test_isolate_device_internal_session(mocked_log_info): + m = constructor(check_internal=True) + + m.lc_tsa = "false" + res = m.set_handler("STATE", {"tsa_enabled": "true"}) + assert res, "Expect True return value for set_handler" + mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done") + assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_isolate.conf", INTERNAL_BASE_PATH) + + curr_cfg = m.cfg_mgr.get_config() + m.lc_tsa = "true" + res = m.set_handler("STATE", {"tsa_enabled": "true"}) + assert res, "Expect True return value for set_handler" + assert m.cfg_mgr.get_config() == curr_cfg + + +@patch('bgpcfgd.managers_device_global.log_debug') +def test_unisolate_device(mocked_log_info): + m = constructor() + + m.lc_tsa = "false" + res = m.set_handler("STATE", {"tsa_enabled": "false"}) + assert res, "Expect True return value for set_handler" + mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done") + assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_unisolate.conf") + + curr_cfg = m.cfg_mgr.get_config() + m.lc_tsa = "true" + res = m.set_handler("STATE", {"tsa_enabled": "false"}) + assert res, "Expect True return value for set_handler" + assert m.cfg_mgr.get_config() == curr_cfg + +@patch('bgpcfgd.managers_device_global.log_debug') +def test_unisolate_device_internal_session(mocked_log_info): + m = constructor(check_internal=True) + + m.lc_tsa = "false" + res = m.set_handler("STATE", {"tsa_enabled": "false"}) + assert res, "Expect True return value for set_handler" + mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done") + assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_unisolate.conf", INTERNAL_BASE_PATH) + + curr_cfg = m.cfg_mgr.get_config() + m.lc_tsa = "true" + res = m.set_handler("STATE", {"tsa_enabled": "false"}) + assert res, "Expect True return value for set_handler" + assert m.cfg_mgr.get_config() == curr_cfg + + +def get_string_from_file(filename, base_path=BASE_PATH): + fp = open(base_path + filename, "r") + cfg = fp.read() + fp.close() + + return cfg + +@patch('bgpcfgd.managers_chassis_app_db.log_err') +def test_set_handler_failure_case(mocked_log_info): + m = constructor() + res = m.set_handler("STATE", {}) + assert res == False, "Expect False return value for invalid data passed to set_handler" + mocked_log_info.assert_called_with("ChassisAppDbMgr:: data is None") + +def test_del_handler(): + m = constructor() + res = m.del_handler("STATE") + assert res, "Expect True return value for del_handler" diff --git a/src/sonic-bgpcfgd/tests/test_device_global.py b/src/sonic-bgpcfgd/tests/test_device_global.py index fc1c5e702d10..60c791bf5a8d 100644 --- a/src/sonic-bgpcfgd/tests/test_device_global.py +++ b/src/sonic-bgpcfgd/tests/test_device_global.py @@ -68,52 +68,111 @@ def get_config(): # TSA ----------------------------------------------------------------------------------------------------------------- # +@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status') @patch('bgpcfgd.managers_device_global.log_debug') -def test_isolate_device(mocked_log_info): +def test_isolate_device(mocked_log_info, mock_get_chassis_tsa_status): m = constructor() + + mock_get_chassis_tsa_status.return_value = "false" res = m.set_handler("STATE", {"tsa_enabled": "true"}) assert res, "Expect True return value for set_handler" mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done") assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_isolate.conf") + curr_cfg = m.cfg_mgr.get_config() + mock_get_chassis_tsa_status.return_value = "true" + res = m.set_handler("STATE", {"tsa_enabled": "true"}) + assert res, "Expect True return value for set_handler" + assert m.cfg_mgr.get_config() == curr_cfg + + +@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status') @patch('bgpcfgd.managers_device_global.log_debug') -def test_isolate_device_internal_session(mocked_log_info): +def test_isolate_device_internal_session(mocked_log_info, mock_get_chassis_tsa_status): m = constructor(check_internal=True) + + mock_get_chassis_tsa_status.return_value = "false" res = m.set_handler("STATE", {"tsa_enabled": "true"}) assert res, "Expect True return value for set_handler" mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done") assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_isolate.conf", INTERNAL_BASE_PATH) + curr_cfg = m.cfg_mgr.get_config() + mock_get_chassis_tsa_status.return_value = "true" + res = m.set_handler("STATE", {"tsa_enabled": "true"}) + assert res, "Expect True return value for set_handler" + assert m.cfg_mgr.get_config() == curr_cfg + + +@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status') @patch('bgpcfgd.managers_device_global.log_debug') -def test_unisolate_device(mocked_log_info): +def test_unisolate_device(mocked_log_info, mock_get_chassis_tsa_status): m = constructor() + + mock_get_chassis_tsa_status.return_value = "false" + # By default feature is disabled. Simulate enabled state m.directory.put(m.db_name, m.table_name, "tsa_enabled", "true") + res = m.set_handler("STATE", {"tsa_enabled": "false"}) assert res, "Expect True return value for set_handler" mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done") assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_unisolate.conf") + curr_cfg = m.cfg_mgr.get_config() + mock_get_chassis_tsa_status.return_value = "true" + res = m.set_handler("STATE", {"tsa_enabled": "false"}) + assert res, "Expect True return value for set_handler" + assert m.cfg_mgr.get_config() == curr_cfg + + +@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status') @patch('bgpcfgd.managers_device_global.log_debug') -def test_unisolate_device_internal_session(mocked_log_info): +def test_unisolate_device_internal_session(mocked_log_info, mock_get_chassis_tsa_status): m = constructor(check_internal=True) + + mock_get_chassis_tsa_status.return_value = "false" + # By default feature is disabled. Simulate enabled state m.directory.put(m.db_name, m.table_name, "tsa_enabled", "true") + res = m.set_handler("STATE", {"tsa_enabled": "false"}) assert res, "Expect True return value for set_handler" mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done") assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_unisolate.conf", INTERNAL_BASE_PATH) -def test_check_state_and_get_tsa_routemaps(): + curr_cfg = m.cfg_mgr.get_config() + mock_get_chassis_tsa_status.return_value = "true" + res = m.set_handler("STATE", {"tsa_enabled": "false"}) + assert res, "Expect True return value for set_handler" + assert m.cfg_mgr.get_config() == curr_cfg + + +@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status') +def test_check_state_and_get_tsa_routemaps(mock_get_chassis_tsa_status): m = constructor() + + mock_get_chassis_tsa_status.return_value = "false" m.set_handler("STATE", {"tsa_enabled": "true"}) res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config()) assert res == get_string_from_file("/result_isolate.conf") + mock_get_chassis_tsa_status.return_value = "true" + m.set_handler("STATE", {"tsa_enabled": "true"}) + res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config()) + assert res == get_string_from_file("/result_isolate.conf") + + mock_get_chassis_tsa_status.return_value = "false" m.set_handler("STATE", {"tsa_enabled": "false"}) res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config()) assert res == "" + mock_get_chassis_tsa_status.return_value = "true" + m.set_handler("STATE", {"tsa_enabled": "false"}) + res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config()) + assert res == get_string_from_file("/result_isolate.conf") + + def test_get_tsa_routemaps(): m = constructor() assert m.get_ts_routemaps([], m.tsa_template) == "" @@ -153,9 +212,11 @@ def test_del_handler(): "value", [ "invalid_value" ] ) @patch('bgpcfgd.managers_device_global.log_err') -def test_tsa_neg(mocked_log_err, value): +@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status') +def test_tsa_neg(mock_get_chassis_tsa_status, mocked_log_err, value): m = constructor() m.cfg_mgr.changes = "" + mock_get_chassis_tsa_status.return_value = "false" res = m.set_handler("STATE", {"tsa_enabled": value}) assert res, "Expect True return value for set_handler" mocked_log_err.assert_called_with("TSA: invalid value({}) is provided".format(value)) diff --git a/src/sonic-bgpcfgd/tests/test_rm.py b/src/sonic-bgpcfgd/tests/test_rm.py index 867ae1a7a51c..697e3096602d 100644 --- a/src/sonic-bgpcfgd/tests/test_rm.py +++ b/src/sonic-bgpcfgd/tests/test_rm.py @@ -25,7 +25,7 @@ def constructor(): mgr = RouteMapMgr(common_objs, "APPL_DB", "BGP_PROFILE_TABLE") return mgr -def set_del_test(mgr, op, args, expected_ret, expected_cmds): +def set_del_test(mgr, op, cfg_args, expected_ret, expected_cmds): set_del_test.push_list_called = False def push_list(cmds): set_del_test.push_list_called = True @@ -34,10 +34,12 @@ def push_list(cmds): mgr.cfg_mgr.push_list = push_list if op == "SET": - ret = mgr.set_handler(*args) - assert ret == expected_ret + for i in range(0, len(cfg_args)): + ret = mgr.set_handler(cfg_args[i][0], cfg_args[i][1]) + assert ret == expected_ret elif op == "DEL": - mgr.del_handler(*args) + for i in range(0, len(cfg_args)): + mgr.del_handler(cfg_args[i]) else: assert False, "Wrong operation" @@ -51,9 +53,9 @@ def test_set_del(): set_del_test( mgr, "SET", - ("FROM_SDN_SLB_ROUTES", { + [("FROM_SDN_SLB_ROUTES", { "community_id": "1234:1234" - }), + })], True, [ ["route-map FROM_SDN_SLB_ROUTES_RM permit 100", @@ -72,3 +74,68 @@ def test_set_del(): ["no route-map FROM_SDN_SLB_ROUTES_RM permit 100"] ] ) + +def test_set_del_com_sdn_apl(): + mgr = constructor() + set_del_test( + mgr, + "SET", + [("FROM_SDN_APPLIANCE_ROUTES", { + "community_id": "1235:1235" + })], + True, + [ + ["route-map FROM_SDN_APPLIANCE_ROUTES_RM permit 100", + " set as-path prepend 12346 12346", + " set community 1235:1235", + " set origin incomplete"] + ] + ) + + set_del_test( + mgr, + "DEL", + ("FROM_SDN_APPLIANCE_ROUTES",), + True, + [ + ["no route-map FROM_SDN_APPLIANCE_ROUTES_RM permit 100"] + ] + ) + +def test_set_del_com_sdn_apl_and_slb(): + mgr = constructor() + set_del_test( + mgr, + "SET", + [("FROM_SDN_APPLIANCE_ROUTES", { + "community_id": "1235:1235" + }), + ("FROM_SDN_SLB_ROUTES", { + "community_id": "1234:1234" + } + )], + True, + [ + ["route-map FROM_SDN_APPLIANCE_ROUTES_RM permit 100", + " set as-path prepend 12346 12346", + " set community 1235:1235", + " set origin incomplete"], + ["route-map FROM_SDN_SLB_ROUTES_RM permit 100", + " set as-path prepend 12346 12346", + " set community 1234:1234", + " set origin incomplete"] + + ] + ) + + set_del_test( + mgr, + "DEL", + ("FROM_SDN_APPLIANCE_ROUTES", "FROM_SDN_SLB_ROUTES",), + True, + [ + ["no route-map FROM_SDN_APPLIANCE_ROUTES_RM permit 100"], + ["no route-map FROM_SDN_SLB_ROUTES_RM permit 100"] + ] + ) + diff --git a/src/sonic-config-engine/config_samples.py b/src/sonic-config-engine/config_samples.py index 4989b88021a7..d72925c843c0 100644 --- a/src/sonic-config-engine/config_samples.py +++ b/src/sonic-config-engine/config_samples.py @@ -4,6 +4,8 @@ from ipaddress import ip_interface from natsort import natsorted +import smartswitch_config + #TODO: Remove once Python 2 support is removed if sys.version_info.major == 3: UNICODE_TYPE = str @@ -75,31 +77,56 @@ def generate_t1_sample_config(data): port_count += 1 return data -def generate_t1_smartswitch_sample_config(data): +def generate_t1_smartswitch_switch_sample_config(data, ss_config): data = generate_t1_sample_config(data) data['DEVICE_METADATA']['localhost']['subtype'] = 'SmartSwitch' mpbr_prefix = '169.254.200' mpbr_address = '{}.254'.format(mpbr_prefix) - bridge_name = 'bridge_midplane' - data['MID_PLANE_BRIDGE'] = { - 'GLOBAL': { - 'bridge': bridge_name, - 'ip_prefix': '{}/24'.format(mpbr_address) - } - } + bridge_name = 'bridge-midplane' dhcp_server_ports = {} - for dpu_name in natsorted(data.get('DPUS', {})): - midplane_interface = data['DPUS'][dpu_name]['midplane_interface'] + for dpu_name in natsorted(ss_config.get('DPUS', {})): + midplane_interface = ss_config['DPUS'][dpu_name]['midplane_interface'] dpu_id = int(midplane_interface.replace('dpu', '')) dhcp_server_ports['{}|{}'.format(bridge_name, midplane_interface)] = {'ips': ['{}.{}'.format(mpbr_prefix, dpu_id + 1)]} if dhcp_server_ports: + data['DPUS'] = ss_config['DPUS'] + + data['FEATURE'] = { + "dhcp_relay": { + "auto_restart": "enabled", + "check_up_status": "False", + "delayed": "False", + "has_global_scope": "True", + "has_per_asic_scope": "False", + "high_mem_alert": "disabled", + "set_owner": "local", + "state": "enabled", + "support_syslog_rate_limit": "True" + }, + "dhcp_server": { + "auto_restart": "enabled", + "check_up_status": "False", + "delayed": "False", + "has_global_scope": "True", + "has_per_asic_scope": "False", + "high_mem_alert": "disabled", + "set_owner": "local", + "state": "enabled", + "support_syslog_rate_limit": "False" + } + } + data['DHCP_SERVER_IPV4'] = { bridge_name: { + 'customized_options': [ + 'option60', + 'option223' + ], 'gateway': mpbr_address, 'lease_time': '3600', 'mode': 'PORT', @@ -107,10 +134,44 @@ def generate_t1_smartswitch_sample_config(data): "state": "enabled" } } + data['DHCP_SERVER_IPV4_PORT'] = dhcp_server_ports return data +def generate_t1_smartswitch_dpu_sample_config(data, ss_config): + data['DEVICE_METADATA']['localhost']['hostname'] = 'sonic' + data['DEVICE_METADATA']['localhost']['switch_type'] = 'dpu' + data['DEVICE_METADATA']['localhost']['type'] = 'SonicDpu' + data['DEVICE_METADATA']['localhost']['subtype'] = 'SmartSwitch' + data['DEVICE_METADATA']['localhost']['bgp_asn'] = '65100' + + for port in natsorted(data['PORT']): + data['PORT'][port]['admin_status'] = 'up' + data['PORT'][port]['mtu'] = '9100' + + dash_crm_resources = ["vnet", "eni", "eni_ether_address_map", "ipv4_inbound_routing", "ipv6_inbound_routing", "ipv4_outbound_routing", + "ipv6_outbound_routing", "ipv4_pa_validation", "ipv6_pa_validation", "ipv4_outbound_ca_to_pa", "ipv6_outbound_ca_to_pa", + "ipv4_acl_group", "ipv6_acl_group", "ipv4_acl_rule", "ipv6_acl_rule"] + dash_crm_thresholds = dict([thresholds for res in dash_crm_resources for thresholds in ( + (f"dash_{res}_threshold_type", "percentage"), + (f"dash_{res}_low_threshold", "70"), + (f"dash_{res}_high_threshold", "85") + )]) + + crmconfig = data.setdefault('CRM', {}).setdefault('Config', {}) + crmconfig.update(dash_crm_thresholds) + + return data + +def generate_t1_smartswitch_sample_config(data): + ss_config = smartswitch_config.get_smartswitch_config(data['DEVICE_METADATA']['localhost']['hwsku']) + + if smartswitch_config.DPU_TABLE in ss_config: + return generate_t1_smartswitch_dpu_sample_config(data, ss_config) + + return generate_t1_smartswitch_switch_sample_config(data, ss_config) + def generate_empty_config(data): new_data = {'DEVICE_METADATA': data['DEVICE_METADATA']} if 'hostname' not in new_data['DEVICE_METADATA']['localhost']: diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py index 0d5d4424c208..c9d060993e4a 100644 --- a/src/sonic-config-engine/minigraph.py +++ b/src/sonic-config-engine/minigraph.py @@ -128,9 +128,9 @@ def get_voq_intf_attributes(ports): core_port_index = None speed = None for k,v in ports.get(port, {}).items(): - if k.lower() == 'coreid': + if k.lower() == 'core_id': core_id = v - if k.lower() == 'coreportid': + if k.lower() == 'core_port_id': core_port_index = v if k.lower() == 'speed': speed = v @@ -2120,7 +2120,6 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw results = {} results['DEVICE_METADATA'] = {'localhost': { - 'bgp_asn': bgp_asn, 'region': region, 'cloudtype': cloudtype, 'docker_routing_config_mode': docker_routing_config_mode, @@ -2132,6 +2131,9 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw } } + if bgp_asn: + results['DEVICE_METADATA']['localhost']['bgp_asn'] = bgp_asn + if chassis_hostname: results['DEVICE_METADATA']['localhost']['chassis_hostname'] = chassis_hostname @@ -2610,7 +2612,7 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw results['SYSLOG_SERVER'] = dict((item, {}) for item in syslog_servers) results['DHCP_SERVER'] = dict((item, {}) for item in dhcp_servers) results['DHCP_RELAY'] = dhcp_relay_table - results['NTP_SERVER'] = dict((item, {}) for item in ntp_servers) + results['NTP_SERVER'] = dict((item, {'iburst': 'on'}) for item in ntp_servers) # Set default DNS nameserver from dns.j2 results['DNS_NAMESERVER'] = {} if os.environ.get("CFGGEN_UNIT_TESTING", "0") == "2": @@ -2829,9 +2831,9 @@ def parse_device_desc_xml(filename): 'hwsku': hwsku, }} - results['LOOPBACK_INTERFACE'] = {('lo', lo_prefix): {}} + results['LOOPBACK_INTERFACE'] = {'lo': {}, ('lo', lo_prefix): {}} if lo_prefix_v6: - results['LOOPBACK_INTERFACE'] = {('lo_v6', lo_prefix_v6): {}} + results['LOOPBACK_INTERFACE'] = {'lo_v6': {}, ('lo_v6', lo_prefix_v6): {}} results['MGMT_INTERFACE'] = {} if mgmt_prefix: diff --git a/src/sonic-config-engine/smartswitch_config.py b/src/sonic-config-engine/smartswitch_config.py index b11c6b558985..6c5202a59a05 100644 --- a/src/sonic-config-engine/smartswitch_config.py +++ b/src/sonic-config-engine/smartswitch_config.py @@ -1,6 +1,7 @@ import os import sys import portconfig +from sonic_py_common import device_info try: if os.environ["CFGGEN_UNIT_TESTING"] == "2": @@ -14,25 +15,29 @@ except KeyError: pass -DPUS_TABLE = 'DPUS' +DPU_TABLE = 'DPU' +DPUS_TABLE = 'DPUS' -def get_smartswitch_config(hwsku=None, platform=None): - hwsku_json_file = portconfig.get_hwsku_file_name(hwsku, platform) - - if os.environ.get("CFGGEN_UNIT_TESTING") == "2" and hwsku == 'SSwitch-32x1000Gb': - hwsku_json_file = os.path.join(tests_path, "data", "smartswitch", hwsku, "hwsku.json") - - if not hwsku_json_file: - return {} - - hwsku_dict = portconfig.readJson(hwsku_json_file) - if not hwsku_dict: - raise Exception("hwsku_dict is none") - +def get_smartswitch_config(hwsku=None): config = {} - if DPUS_TABLE in hwsku_dict: - config[DPUS_TABLE] = hwsku_dict[DPUS_TABLE] + if os.environ.get("CFGGEN_UNIT_TESTING") == "2": + if hwsku == 'SSwitch-32x1000Gb': + json_file = os.path.join(tests_path, "data", "smartswitch", "sample_switch_platform.json") + elif hwsku == 'SS-DPU-1x400Gb': + json_file = os.path.join(tests_path, "data", "smartswitch", "sample_dpu_platform.json") + else: + platform_path = device_info.get_path_to_platform_dir() + json_file = os.path.join(platform_path, device_info.PLATFORM_JSON_FILE) + + platform_json = portconfig.readJson(json_file) + if not platform_json: + return config + + if DPU_TABLE in platform_json: + config[DPU_TABLE] = platform_json[DPU_TABLE] + if DPUS_TABLE in platform_json: + config[DPUS_TABLE] = platform_json[DPUS_TABLE] return config diff --git a/src/sonic-config-engine/sonic-cfggen b/src/sonic-config-engine/sonic-cfggen index e3314d34fa42..9151bfa20de1 100755 --- a/src/sonic-config-engine/sonic-cfggen +++ b/src/sonic-config-engine/sonic-cfggen @@ -33,7 +33,6 @@ from config_samples import generate_sample_config, get_available_config from functools import partial from minigraph import minigraph_encoder, parse_xml, parse_device_desc_xml, parse_asic_sub_role, parse_asic_switch_type, parse_hostname from portconfig import get_port_config, get_breakout_mode -from smartswitch_config import get_smartswitch_config from sonic_py_common.multi_asic import get_asic_id_from_name, get_asic_device_id, is_multi_asic from sonic_py_common import device_info from swsscommon.swsscommon import ConfigDBConnector, SonicDBConfig, ConfigDBPipeConnector @@ -371,11 +370,6 @@ def main(): if brkout_table is not None: deep_update(data, {'BREAKOUT_CFG': brkout_table}) - # Read Smart Switch config - smartswitch_config = get_smartswitch_config(hwsku, platform) - if smartswitch_config: - deep_update(data, smartswitch_config) - _process_json(args, data) if args.yang is not None: diff --git a/src/sonic-config-engine/tests/common_utils.py b/src/sonic-config-engine/tests/common_utils.py index 1a2a36805530..a5a15c45be42 100644 --- a/src/sonic-config-engine/tests/common_utils.py +++ b/src/sonic-config-engine/tests/common_utils.py @@ -97,3 +97,18 @@ def cmp(file1, file2): return obj1 == obj2 except: return filecmp.cmp(file1, file2) + +def cmp_tables(f_rcvd, f_exp): + """ Check if the tables present in rcvd matches with exp """ + try: + with open(f_rcvd, 'r') as f: + rcvd = json.load(f) + with open(f_exp, 'r') as f: + exp = json.load(f) + + for key in rcvd.keys(): + print(key, rcvd[key], exp.get(key,{})) + assert rcvd[key] == exp.get(key,{}) + except Exception as e: + return False + return True diff --git a/src/sonic-config-engine/tests/data/j2_template/config.bcm.j2 b/src/sonic-config-engine/tests/data/j2_template/config.bcm.j2 index 8a10ddb91936..61aeb0eff901 100644 --- a/src/sonic-config-engine/tests/data/j2_template/config.bcm.j2 +++ b/src/sonic-config-engine/tests/data/j2_template/config.bcm.j2 @@ -14,7 +14,8 @@ {%- set switch_subtype = DEVICE_METADATA['localhost']['subtype'] -%} {%- if 'dualtor' in switch_subtype.lower() %} {%- set IPinIP_sock = -'sai_tunnel_underlay_route_mode=1 +'sai_tunnel_support=1 +sai_tunnel_underlay_route_mode=1 host_as_route_disable=1 l3_ecmp_levels=2' -%} {%- set map_prio = 'sai_remap_prio_on_tnl_egress=1' -%} @@ -32,6 +33,5 @@ sai_pfc_dlr_init_capability=1' -%} l3_alpm_hit_skip=1 {{ map_prio }} {{ mmu_sock }} -sai_tunnel_support=1 {{ IPinIP_sock }} {{ pfcwd_sock }} diff --git a/src/sonic-config-engine/tests/data/rsyslog/config_db.json b/src/sonic-config-engine/tests/data/rsyslog/config_db.json index 74f7f8ecbed5..7cc58a131576 100644 --- a/src/sonic-config-engine/tests/data/rsyslog/config_db.json +++ b/src/sonic-config-engine/tests/data/rsyslog/config_db.json @@ -207,22 +207,22 @@ "DEVICE_NEIGHBOR_METADATA": { "ARISTA01T1": { "hwsku": "Arista-VM", - "mgmt_addr": "172.16.190.114", + "mgmt_addr": "3.3.3.14", "type": "LeafRouter" }, "ARISTA02T1": { "hwsku": "Arista-VM", - "mgmt_addr": "172.16.190.115", + "mgmt_addr": "3.3.3.15", "type": "LeafRouter" }, "ARISTA03T1": { "hwsku": "Arista-VM", - "mgmt_addr": "172.16.190.116", + "mgmt_addr": "3.3.3.16", "type": "LeafRouter" }, "ARISTA04T1": { "hwsku": "Arista-VM", - "mgmt_addr": "172.16.190.117", + "mgmt_addr": "3.3.3.17", "type": "LeafRouter" } }, @@ -411,11 +411,11 @@ "Loopback0|FC00:1::32/128": {} }, "MGMT_INTERFACE": { - "eth0|10.150.22.115/23": { - "gwaddr": "10.150.22.1" + "eth0|1.1.1.15/23": { + "gwaddr": "1.1.1.10" }, - "eth0|2404:f801:10:2200::a96:1673/64": { - "gwaddr": "2404:f801:10:2200::1" + "eth0|2404:::2/64": { + "gwaddr": "2404::1" } }, "MGMT_PORT": { @@ -867,7 +867,7 @@ } }, "SYSLOG_SERVER": { - "10.150.22.222": {} + "3.3.3.3": {} }, "VERSIONS": { "DATABASE": { diff --git a/src/sonic-config-engine/tests/data/smartswitch/SS-DPU-1x400Gb/hwsku.json b/src/sonic-config-engine/tests/data/smartswitch/SS-DPU-1x400Gb/hwsku.json new file mode 100644 index 000000000000..6f9d58a075d8 --- /dev/null +++ b/src/sonic-config-engine/tests/data/smartswitch/SS-DPU-1x400Gb/hwsku.json @@ -0,0 +1,7 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G" + } + } +} diff --git a/src/sonic-config-engine/tests/data/smartswitch/SSwitch-32x1000Gb/hwsku.json b/src/sonic-config-engine/tests/data/smartswitch/SSwitch-32x1000Gb/hwsku.json index 9ce920b2ddbc..697fb7b1ccb4 100644 --- a/src/sonic-config-engine/tests/data/smartswitch/SSwitch-32x1000Gb/hwsku.json +++ b/src/sonic-config-engine/tests/data/smartswitch/SSwitch-32x1000Gb/hwsku.json @@ -111,19 +111,5 @@ "Ethernet144": { "default_brkout_mode": "1x100000[50G,40000,25G,10000]" } - }, - "DPUS": { - "dpu0": { - "midplane_interface": "dpu0" - }, - "dpu1": { - "midplane_interface": "dpu1" - }, - "dpu2": { - "midplane_interface": "dpu2" - }, - "dpu3": { - "midplane_interface": "dpu3" - } } } diff --git a/src/sonic-config-engine/tests/data/smartswitch/sample_dpu_platform.json b/src/sonic-config-engine/tests/data/smartswitch/sample_dpu_platform.json new file mode 100644 index 000000000000..11eb9a4dae58 --- /dev/null +++ b/src/sonic-config-engine/tests/data/smartswitch/sample_dpu_platform.json @@ -0,0 +1,3 @@ +{ + "DPU": {} +} diff --git a/src/sonic-config-engine/tests/data/smartswitch/sample_switch_platform.json b/src/sonic-config-engine/tests/data/smartswitch/sample_switch_platform.json new file mode 100644 index 000000000000..18b525588301 --- /dev/null +++ b/src/sonic-config-engine/tests/data/smartswitch/sample_switch_platform.json @@ -0,0 +1,16 @@ +{ + "DPUS": { + "dpu0": { + "midplane_interface": "dpu0" + }, + "dpu1": { + "midplane_interface": "dpu1" + }, + "dpu2": { + "midplane_interface": "dpu2" + }, + "dpu3": { + "midplane_interface": "dpu3" + } + } +} diff --git a/src/sonic-config-engine/tests/sample-mellanox-4700-t1-minigraph-smartswitch.xml b/src/sonic-config-engine/tests/sample-mellanox-4700-t1-minigraph-smartswitch.xml new file mode 100644 index 000000000000..6f47baf933b7 --- /dev/null +++ b/src/sonic-config-engine/tests/sample-mellanox-4700-t1-minigraph-smartswitch.xml @@ -0,0 +1,1082 @@ + + + + + + false + mtvr-leopard-01 + 10.0.0.32 + ARISTA01T0 + 10.0.0.33 + 1 + 10 + 3 + + + mtvr-leopard-01 + FC00::8D + ARISTA20T0 + FC00::8E + 1 + 10 + 3 + + + + + 65100 + mtvr-leopard-01 + + +
10.0.0.33
+ + + + + +
10.0.0.1
+ + + + + +
10.0.0.35
+ + + + + +
10.0.0.37
+ + + + + +
10.0.0.5
+ + + + + +
10.0.0.39
+ + + + + +
10.0.0.41
+ + + + + +
10.0.0.9
+ + + + + +
10.0.0.43
+ + + + + +
10.0.0.45
+ + + + + +
10.0.0.13
+ + + + + +
10.0.0.47
+ + + + + +
10.0.0.49
+ + + + + +
10.0.0.51
+ + + + + +
10.0.0.53
+ + + + + +
10.0.0.55
+ + + + + +
10.0.0.57
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10.0.0.59
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10.0.0.63
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10.0.0.65
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10.0.0.69
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10.0.0.71
+ + + + + + + + + 64001 + ARISTA01T0 + + + + 65200 + ARISTA01T2 + + + + 64002 + ARISTA02T0 + + + + 64003 + ARISTA03T0 + + + + 65200 + ARISTA03T2 + + + + 64004 + ARISTA04T0 + + + + 64005 + ARISTA05T0 + + + + 65200 + ARISTA05T2 + + + + 64006 + ARISTA06T0 + + + + 64007 + ARISTA07T0 + + + + 65200 + ARISTA07T2 + + + + 64008 + ARISTA08T0 + + + + 64009 + ARISTA09T0 + + + + 64010 + ARISTA10T0 + + + + 64011 + ARISTA11T0 + + + + 64012 + ARISTA12T0 + + + + 64013 + ARISTA13T0 + + + + 64014 + ARISTA14T0 + + + + 64015 + ARISTA15T0 + + + + 64016 + ARISTA16T0 + + + + 64017 + ARISTA17T0 + + + + 64018 + ARISTA18T0 + + + + 64019 + ARISTA19T0 + + + + 64020 + ARISTA20T0 + + + + + + + + + HostIP + Loopback0 + + 10.1.0.32/32 + + 10.1.0.32/32 + + + HostIP1 + Loopback0 + + FC00:1::32/128 + + FC00:1::32/128 + + + + + HostIP + eth0 + + 10.210.24.184/22 + + 10.210.24.184/22 + + + + + + + mtvr-leopard-01 + + + PortChannel102 + etp1;etp2 + + + + PortChannel105 + etp3;etp4 + + + + PortChannel108 + etp5;etp6 + + + + PortChannel1011 + etp7;etp8 + + + + + + + + + etp28 + 10.0.0.70/31 + + + + etp28 + FC00::8D/126 + + + + + + NTP_ACL + NTP + NTP + + + SNMP_ACL + SNMP + SNMP + + + VTY_LINE + ssh-only + SSH + + + ERSPAN + Everflow + Everflow + + + ERSPANV6 + EverflowV6 + EverflowV6 + + + PortChannel102;PortChannel105;PortChannel108;PortChannel1011;etp9;etp10;etp11;etp12;etp13;etp14;etp15;etp16;etp17;etp18;etp19;etp20;etp21;etp22;etp23;etp24;etp25;etp26;etp27;etp28 + DataAcl + DataPlane + + + + + + + + + DeviceInterfaceLink + ARISTA20T0 + Ethernet1 + mtvr-leopard-01 + etp28 + 400000 + + + + + mtvr-leopard-01 + Mellanox-SN4700-O28 + + 10.245.20.49 + + + + ARISTA16T0 + + 10.245.32.142 + + Arista-VM + + + ARISTA11T0 + + 10.245.32.137 + + Arista-VM + + + ARISTA10T0 + + 10.245.32.136 + + Arista-VM + + + ARISTA17T0 + + 10.245.32.143 + + Arista-VM + + + ARISTA09T0 + + 10.245.32.135 + + Arista-VM + + + ARISTA20T0 + + 10.245.32.146 + + Arista-VM + + + ARISTA08T0 + + 10.245.32.134 + + Arista-VM + + + ARISTA07T0 + + 10.245.32.133 + + Arista-VM + + + ARISTA07T2 + + 10.245.32.126 + + Arista-VM + + + ARISTA01T2 + + 10.245.32.123 + + Arista-VM + + + ARISTA01T0 + + 10.245.32.127 + + Arista-VM + + + ARISTA05T2 + + 10.245.32.125 + + Arista-VM + + + ARISTA05T0 + + 10.245.32.131 + + Arista-VM + + + ARISTA02T0 + + 10.245.32.128 + + Arista-VM + + + ARISTA03T0 + + 10.245.32.129 + + Arista-VM + + + ARISTA03T2 + + 10.245.32.124 + + Arista-VM + + + ARISTA04T0 + + 10.245.32.130 + + Arista-VM + + + ARISTA18T0 + + 10.245.32.144 + + Arista-VM + + + ARISTA15T0 + + 10.245.32.141 + + Arista-VM + + + ARISTA19T0 + + 10.245.32.145 + + Arista-VM + + + ARISTA14T0 + + 10.245.32.140 + + Arista-VM + + + ARISTA12T0 + + 10.245.32.138 + + Arista-VM + + + ARISTA13T0 + + 10.245.32.139 + + Arista-VM + + + ARISTA06T0 + + 10.245.32.132 + + Arista-VM + + + + + true + + + DeviceInterface + + true + true + 1 + etp1 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp2 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp3 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp4 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp5 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp6 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp7 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp8 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp9 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp10 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp11 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp12 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp13 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp14 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp15 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp16 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp17 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp18 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp19 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp20 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp21 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp22 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp23 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp24 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp25 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp26 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp27 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp28 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp29 + + false + 0 + 0 + 200000 + + + DeviceInterface + + true + true + 1 + etp30 + + false + 0 + 0 + 200000 + + + DeviceInterface + + true + true + 1 + etp31 + + false + 0 + 0 + 200000 + + + DeviceInterface + + true + true + 1 + etp32 + + false + 0 + 0 + 200000 + + + true + 0 + Mellanox-SN4700-O28 + + + + + + mtvr-leopard-01 + + + DeploymentId + + 1 + + + CloudType + + Public + + + QosProfile + + Profile0 + + + DhcpResources + + 192.0.0.1;192.0.0.2;192.0.0.3;192.0.0.4 + + + NtpResources + + 10.210.25.32;10.75.202.2 + + + SnmpResources + + 10.0.0.9 + + + TacacsGroup + + testlab + + + TacacsServer + + 10.7.34.20 + + + ForcedMgmtRoutes + + 10.75.0.0/16;10.213.0.0/16;10.215.0.0/16;10.9.0.0/16;10.212.0.0/16 + + + ErspanDestinationIpv4 + + 10.0.0.7 + + + + + + + mtvr-leopard-01 + Mellanox-SN4700-O28 + \ No newline at end of file diff --git a/src/sonic-config-engine/tests/sample-voq-graph.xml b/src/sonic-config-engine/tests/sample-voq-graph.xml index b6e8ff1521a0..ab9a1b8b81b8 100644 --- a/src/sonic-config-engine/tests/sample-voq-graph.xml +++ b/src/sonic-config-engine/tests/sample-voq-graph.xml @@ -1,14 +1,7 @@ - - - 65100 - linecard-1 - - - - + diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json index 305640a45d69..661fd8cc28c5 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json @@ -63,19 +63,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset":"2560", + "size":"0", + "xon_offset":"0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, "BUFFER_PG": { diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json index 8dacec342179..8a1163f95f72 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json @@ -63,19 +63,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset":"2560", + "size":"0", + "xon_offset":"0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, "BUFFER_PG": { diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json index fa6b56ab02d9..b82f36fdda28 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json @@ -33,19 +33,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json index 026f88f033f7..7d7af2c6836c 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json @@ -33,19 +33,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json index 3eb37c2ea0b3..7e39255e71d4 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json +++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json @@ -33,19 +33,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json index ef1882e0666e..010a8677eed9 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json +++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json @@ -33,19 +33,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json b/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json index ad978b8865a7..abcfa56eaea9 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json +++ b/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json @@ -8,6 +8,20 @@ }, "OP": "SET" }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:192.168.0.0/27" : { + "term_type":"MP2MP", + "subnet_type": "vlan" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:192.168.200.0/27" : { + "term_type":"MP2MP", + "subnet_type": "vlan" + }, + "OP": "SET" + }, { "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : { "tunnel_type":"IPINIP", diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf index 8bb483456829..4cdb8bceaba6 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf @@ -22,6 +22,7 @@ log facility local4 ! vrf VnetFE vni 9000 +exit ! ! ! Enable nht through default route diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf index 402230348a4a..ca56e9ca0fdd 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf @@ -22,6 +22,7 @@ log facility local4 ! vrf VnetFE vni 8000 +exit ! ! ! Enable nht through default route diff --git a/src/sonic-config-engine/tests/sample_output/py3/arista7260-t1.config.bcm b/src/sonic-config-engine/tests/sample_output/py3/arista7260-t1.config.bcm index c3323f545aa4..a76c2173f436 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/arista7260-t1.config.bcm +++ b/src/sonic-config-engine/tests/sample_output/py3/arista7260-t1.config.bcm @@ -2,7 +2,6 @@ l3_alpm_hit_skip=1 mmu_init_config="MSFT-TH2-Tier1" -sai_tunnel_support=1 hybrid_pfc_deadlock_enable=1 pfc_deadlock_seq_control=1 diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json index 305640a45d69..661fd8cc28c5 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json @@ -63,19 +63,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset":"2560", + "size":"0", + "xon_offset":"0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, "BUFFER_PG": { diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json index 8dacec342179..8a1163f95f72 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json @@ -63,19 +63,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset":"2560", + "size":"0", + "xon_offset":"0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, "BUFFER_PG": { diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json index fa6b56ab02d9..b82f36fdda28 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json @@ -33,19 +33,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json index 026f88f033f7..7d7af2c6836c 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json @@ -33,19 +33,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json index 3eb37c2ea0b3..7e39255e71d4 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json @@ -33,19 +33,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json index ef1882e0666e..010a8677eed9 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json @@ -33,19 +33,19 @@ "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", - "size":"1280", - "xon_offset": "2560", + "size":"0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { "pool":"ingress_lossless_pool", "size":"0", - "static_th":"33030144" + "dynamic_th":"-1" }, "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-1" + "dynamic_th":"-4" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json b/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json index ad978b8865a7..abcfa56eaea9 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json +++ b/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json @@ -8,6 +8,20 @@ }, "OP": "SET" }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:192.168.0.0/27" : { + "term_type":"MP2MP", + "subnet_type": "vlan" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:192.168.200.0/27" : { + "term_type":"MP2MP", + "subnet_type": "vlan" + }, + "OP": "SET" + }, { "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : { "tunnel_type":"IPINIP", diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4700-o28-t1-smartswitch.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4700-o28-t1-smartswitch.json new file mode 100644 index 000000000000..95add1de513a --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4700-o28-t1-smartswitch.json @@ -0,0 +1,814 @@ +{ + "PORT_QOS_MAP": { + "global": { + "dscp_to_tc_map": "AZURE" + }, + "Ethernet216": { + "dscp_to_tc_map": "AZURE", + "tc_to_queue_map": "AZURE", + "pfc_enable": "3,4", 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"egress_lossless_profile" + }, + "Ethernet16|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet24|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet32|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet40|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet48|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet56|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet64|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet72|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet80|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet88|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet96|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet104|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet112|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet120|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet128|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet136|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet144|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet152|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet160|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet168|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet176|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet184|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet192|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet200|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet208|3-4": { + "profile": "egress_lossless_profile" + }, + "Ethernet0|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet8|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet16|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet24|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet32|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet40|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet48|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet56|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet64|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet72|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet80|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet88|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet96|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet104|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet112|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet120|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet128|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet136|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet144|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet152|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet160|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet168|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet176|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet184|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet192|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet200|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet208|0-2": { + "profile": "q_lossy_profile" + }, + "Ethernet0|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet8|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet16|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet24|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet32|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet40|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet48|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet56|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet64|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet72|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet80|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet88|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet96|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet104|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet112|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet120|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet128|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet136|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet144|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet152|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet160|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet168|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet176|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet184|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet192|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet200|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet208|5-6": { + "profile": "q_lossy_profile" + } + } +} diff --git a/dockers/docker-dhcp-server/rsyslog/rsyslog.conf.j2 b/src/sonic-config-engine/tests/sample_output/py3/rsyslog.conf similarity index 67% rename from dockers/docker-dhcp-server/rsyslog/rsyslog.conf.j2 rename to src/sonic-config-engine/tests/sample_output/py3/rsyslog.conf index 664a6a5fb9bd..e62c29781bc0 100644 --- a/dockers/docker-dhcp-server/rsyslog/rsyslog.conf.j2 +++ b/src/sonic-config-engine/tests/sample_output/py3/rsyslog.conf @@ -15,23 +15,14 @@ $ModLoad imuxsock # provides support for local system logging -{% set gconf = (SYSLOG_CONFIG | d({})).get('GLOBAL', {}) -%} -{% set rate_limit_interval = gconf.get('rate_limit_interval') %} -{% set rate_limit_burst = gconf.get('rate_limit_burst') %} -{% if rate_limit_interval is not none %} -$SystemLogRateLimitInterval {{ rate_limit_interval }} -{% endif %} -{% if rate_limit_burst is not none %} -$SystemLogRateLimitBurst {{ rate_limit_burst }} -{% endif %} $ModLoad imklog # provides kernel logging support #$ModLoad immark # provides --MARK-- message capability # provides UDP syslog reception $ModLoad imudp -$UDPServerAddress {{udp_server_ip}} #bind to localhost before udp server run +$UDPServerAddress 1.1.1.1 #bind to localhost before udp server run $UDPServerRun 514 # provides TCP syslog reception @@ -42,8 +33,6 @@ $UDPServerRun 514 ########################### #### GLOBAL DIRECTIVES #### ########################### -{% set format = gconf.get('format', 'standard') -%} -{% set fw_name = gconf.get('welf_firewall_name', hostname) -%} # # Use traditional timestamp format. # To enable high precision timestamps, comment out the following line. @@ -51,12 +40,14 @@ $UDPServerRun 514 #$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat # Define a custom template -$template SONiCFileFormat,"%TIMESTAMP%.%timestamp:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% dhcp_server#%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" +$template SONiCFileFormat,"%timegenerated:::date-year% %timegenerated%.%timegenerated:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" $ActionFileDefaultTemplate SONiCFileFormat +$template SONiCForwardFormat,"<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" +$ActionForwardDefaultTemplate SONiCForwardFormat template(name="WelfRemoteFormat" type="string" string="%TIMESTAMP% id=firewall time=\"%timereported\ :::date-year%-%timereported:::date-month%-%timereported:::date-day% %timereported:::date-hour%:%timereported:::date-minute%:%timereported\ -:::date-second%\" fw=\"{{ fw_name }}\" pri=%syslogpriority% msg=\"%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\"\n") +:::date-second%\" fw=\"kvm-host\" pri=%syslogpriority% msg=\"%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\"\n") # # Set the default permissions for all log files. @@ -93,4 +84,7 @@ $RepeatedMsgReduction on # The omfwd plug-in provides the core functionality of traditional message # forwarding via UDP and plain TCP. It is a built-in module that does not need # to be loaded. -# TODO rsyslog issue in bridge mode container, don't update to remote server for now + +*.* +action(type="omfwd" Target="3.3.3.3" Port="514" Protocol="udp" Template="SONiCForwardFormat") + diff --git a/src/sonic-config-engine/tests/sample_output/py3/rsyslog_with_docker0.conf b/src/sonic-config-engine/tests/sample_output/py3/rsyslog_with_docker0.conf new file mode 100644 index 000000000000..0c845227aa13 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/rsyslog_with_docker0.conf @@ -0,0 +1,92 @@ +############################################################################### +# Managed by Ansible +# file: ansible/roles/acs/templates/rsyslog.conf.j2 +############################################################################### +# +# /etc/rsyslog.conf Configuration file for rsyslog. +# +# For more information see +# /usr/share/doc/rsyslog-doc/html/rsyslog_conf.html + + +################# +#### MODULES #### +################# + +$ModLoad imuxsock # provides support for local system logging + + + +$ModLoad imklog # provides kernel logging support +#$ModLoad immark # provides --MARK-- message capability + +# provides UDP syslog reception +$ModLoad imudp +$UDPServerAddress 1.1.1.1 #bind to localhost before udp server run +$UDPServerRun 514 +$UDPServerAddress 2.2.2.2 +$UDPServerRun 514 + +# provides TCP syslog reception +#$ModLoad imtcp +#$InputTCPServerRun 514 + + +########################### +#### GLOBAL DIRECTIVES #### +########################### +# +# Use traditional timestamp format. +# To enable high precision timestamps, comment out the following line. +# +#$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat + +# Define a custom template +$template SONiCFileFormat,"%timegenerated:::date-year% %timegenerated%.%timegenerated:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" +$ActionFileDefaultTemplate SONiCFileFormat +$template SONiCForwardFormat,"<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" +$ActionForwardDefaultTemplate SONiCForwardFormat + +template(name="WelfRemoteFormat" type="string" string="%TIMESTAMP% id=firewall time=\"%timereported\ +:::date-year%-%timereported:::date-month%-%timereported:::date-day% %timereported:::date-hour%:%timereported:::date-minute%:%timereported\ +:::date-second%\" fw=\"kvm-host\" pri=%syslogpriority% msg=\"%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\"\n") + +# +# Set the default permissions for all log files. +# +$FileOwner root +$FileGroup adm +$FileCreateMode 0640 +$DirCreateMode 0755 +$Umask 0022 + +# +# Where to place spool and state files +# +$WorkDirectory /var/spool/rsyslog + +# +# Include all config files in /etc/rsyslog.d/ +# +$IncludeConfig /etc/rsyslog.d/*.conf + +# +# Suppress duplicate messages and report "message repeated n times" +# +$RepeatedMsgReduction on + +############### +#### RULES #### +############### + +# +# Remote syslog logging +# + +# The omfwd plug-in provides the core functionality of traditional message +# forwarding via UDP and plain TCP. It is a built-in module that does not need +# to be loaded. + +*.* +action(type="omfwd" Target="3.3.3.3" Port="514" Protocol="udp" Template="SONiCForwardFormat") + diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf index b55906056616..67f4f030de0b 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf @@ -22,6 +22,7 @@ log facility local4 ! vrf VnetFE vni 9000 +exit ! ! ! Enable nht through default route diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf index 19e303639a55..3b7b1f727a2a 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf @@ -22,6 +22,7 @@ log facility local4 ! vrf VnetFE vni 8000 +exit ! ! ! Enable nht through default route diff --git a/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json b/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json new file mode 100644 index 000000000000..9421f40c3493 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json @@ -0,0 +1,76 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "hwsku": "SS-DPU-1x400Gb", + "hostname": "sonic", + "switch_type": "dpu", + "type": "SonicDpu", + "subtype": "SmartSwitch", + "bgp_asn": "65100" + } + }, + "PORT": { + "Ethernet0": { + "lanes": "0,1,2,3,4,5,6,7", + "alias": "etp1", + "admin_status": "up", + "mtu": "9100" + } + }, + "FLEX_COUNTER_TABLE": { + "ACL": { + "FLEX_COUNTER_STATUS": "disable", + "FLEX_COUNTER_DELAY_STATUS": "true", + "POLL_INTERVAL": "10000" + } + }, + "CRM": { + "Config": { + "dash_vnet_threshold_type": "percentage", + "dash_vnet_low_threshold": "70", + "dash_vnet_high_threshold": "85", + "dash_eni_threshold_type": "percentage", + "dash_eni_low_threshold": "70", + "dash_eni_high_threshold": "85", + "dash_eni_ether_address_map_threshold_type": "percentage", + "dash_eni_ether_address_map_low_threshold": "70", + "dash_eni_ether_address_map_high_threshold": "85", + "dash_ipv4_inbound_routing_threshold_type": "percentage", + "dash_ipv4_inbound_routing_low_threshold": "70", + "dash_ipv4_inbound_routing_high_threshold": "85", + "dash_ipv6_inbound_routing_threshold_type": "percentage", + "dash_ipv6_inbound_routing_low_threshold": "70", + "dash_ipv6_inbound_routing_high_threshold": "85", + "dash_ipv4_outbound_routing_threshold_type": "percentage", + "dash_ipv4_outbound_routing_low_threshold": "70", + "dash_ipv4_outbound_routing_high_threshold": "85", + "dash_ipv6_outbound_routing_threshold_type": "percentage", + "dash_ipv6_outbound_routing_low_threshold": "70", + "dash_ipv6_outbound_routing_high_threshold": "85", + "dash_ipv4_pa_validation_threshold_type": "percentage", + "dash_ipv4_pa_validation_low_threshold": "70", + "dash_ipv4_pa_validation_high_threshold": "85", + "dash_ipv6_pa_validation_threshold_type": "percentage", + "dash_ipv6_pa_validation_low_threshold": "70", + "dash_ipv6_pa_validation_high_threshold": "85", + "dash_ipv4_outbound_ca_to_pa_threshold_type": "percentage", + "dash_ipv4_outbound_ca_to_pa_low_threshold": "70", + "dash_ipv4_outbound_ca_to_pa_high_threshold": "85", + "dash_ipv6_outbound_ca_to_pa_threshold_type": "percentage", + "dash_ipv6_outbound_ca_to_pa_low_threshold": "70", + "dash_ipv6_outbound_ca_to_pa_high_threshold": "85", + "dash_ipv4_acl_group_threshold_type": "percentage", + "dash_ipv4_acl_group_low_threshold": "70", + "dash_ipv4_acl_group_high_threshold": "85", + "dash_ipv6_acl_group_threshold_type": "percentage", + "dash_ipv6_acl_group_low_threshold": "70", + "dash_ipv6_acl_group_high_threshold": "85", + "dash_ipv4_acl_rule_threshold_type": "percentage", + "dash_ipv4_acl_rule_low_threshold": "70", + "dash_ipv4_acl_rule_high_threshold": "85", + "dash_ipv6_acl_rule_threshold_type": "percentage", + "dash_ipv6_acl_rule_low_threshold": "70", + "dash_ipv6_acl_rule_high_threshold": "85" + } + } +} diff --git a/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json b/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json index 58d91aa90560..fc305243fb0e 100644 --- a/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json +++ b/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json @@ -1,591 +1,613 @@ { - "DEVICE_METADATA": { - "localhost": { - "hwsku": "SSwitch-32x1000Gb", - "hostname": "sonic", - "type": "LeafRouter", - "bgp_asn": "65100", - "subtype": "SmartSwitch" - } - }, - "PORT": { - "Ethernet0": { - "lanes": "0,1,2,3,4,5,6,7", - "alias": "etp1", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet8": { - "lanes": "8,9,10,11,12,13,14,15", - "alias": "etp2", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet16": { - "lanes": "16,17,18,19,20,21,22,23", - "alias": "etp3", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet24": { - "lanes": "24,25,26,27,28,29,30,31", - "alias": "etp4", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet32": { - "lanes": "32,33,34,35,36,37,38,39", - "alias": "etp5", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet40": { - "lanes": "40,41,42,43,44,45,46,47", - "alias": "etp6", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet48": { - "lanes": "48,49,50,51,52,53,54,55", - "alias": "etp7", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet56": { - "lanes": "56,57,58,59,60,61,62,63", - "alias": "etp8", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet64": { - "lanes": "64,65,66,67,68,69,70,71", - "alias": "etp9", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet72": { - "lanes": "72,73,74,75,76,77,78,79", - "alias": "etp10", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet80": { - "lanes": "80,81,82,83,84,85,86,87", - "alias": "etp11", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet88": { - "lanes": "88,89,90,91,92,93,94,95", - "alias": "etp12", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet96": { - "lanes": "96,97,98,99,100,101,102,103", - "alias": "etp13", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet104": { - "lanes": "104,105,106,107,108,109,110,111", - "alias": "etp14", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet112": { - "lanes": "112,113,114,115,116,117,118,119", - "alias": "etp15", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet120": { - "lanes": "120,121,122,123,124,125,126,127", - "alias": "etp16", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet128": { - "lanes": "128,129,130,131,132,133,134,135", - "alias": "etp17", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet136": { - "lanes": "136,137,138,139,140,141,142,143", - "alias": "etp18", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet144": { - "lanes": "144,145,146,147,148,149,150,151", - "alias": "etp19", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet152": { - "lanes": "152,153,154,155,156,157,158,159", - "alias": "etp20", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet160": { - "lanes": "160,161,162,163,164,165,166,167", - "alias": "etp21", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet168": { - "lanes": "168,169,170,171,172,173,174,175", - "alias": "etp22", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet176": { - "lanes": "176,177,178,179,180,181,182,183", - "alias": "etp23", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet184": { - "lanes": "184,185,186,187,188,189,190,191", - "alias": "etp24", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet192": { - "lanes": "192,193,194,195,196,197,198,199", - "alias": "etp25", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet200": { - "lanes": "200,201,202,203,204,205,206,207", - "alias": "etp26", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet208": { - "lanes": "208,209,210,211,212,213,214,215", - "alias": "etp27", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet216": { - "lanes": "216,217,218,219,220,221,222,223", - "alias": "etp28", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet224": { - "lanes": "224,225,226,227,228,229,230,231", - "alias": "etp29", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet232": { - "lanes": "232,233,234,235,236,237,238,239", - "alias": "etp30", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet240": { - "lanes": "240,241,242,243,244,245,246,247", - "alias": "etp31", - "admin_status": "up", - "mtu": "9100" - }, - "Ethernet248": { - "lanes": "248,249,250,251,252,253,254,255", - "alias": "etp32", - "admin_status": "up", - "mtu": "9100" - } - }, - "DPUS": { - "dpu0": { - "midplane_interface": "dpu0" - }, - "dpu1": { - "midplane_interface": "dpu1" - }, - "dpu2": { - "midplane_interface": "dpu2" - }, - "dpu3": { - "midplane_interface": "dpu3" - } - }, - "FLEX_COUNTER_TABLE": { - "ACL": { - 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"option60", + "option223" + ], + "gateway": "169.254.200.254", + "lease_time": "3600", + "mode": "PORT", + "netmask": "255.255.255.0", + "state": "enabled" + } + }, + "DHCP_SERVER_IPV4_PORT": { + "bridge-midplane|dpu0": { + "ips": [ + "169.254.200.1" + ] + }, + "bridge-midplane|dpu1": { + "ips": [ + "169.254.200.2" + ] + }, + "bridge-midplane|dpu2": { + "ips": [ + "169.254.200.3" + ] + }, + "bridge-midplane|dpu3": { + "ips": [ + "169.254.200.4" + ] + } + }, + "DPUS": { + "dpu0": { + "midplane_interface": "dpu0" + }, + "dpu1": { + "midplane_interface": "dpu1" + }, + "dpu2": { + "midplane_interface": "dpu2" + }, + "dpu3": { + "midplane_interface": "dpu3" + } + }, + "FEATURE": { + "dhcp_relay": { + "auto_restart": "enabled", + "check_up_status": "False", + "delayed": "False", + "has_global_scope": "True", + "has_per_asic_scope": "False", + "high_mem_alert": "disabled", + "set_owner": "local", + "state": "enabled", + "support_syslog_rate_limit": "True" + }, + "dhcp_server": { + "auto_restart": "enabled", + "check_up_status": "False", + "delayed": "False", + "has_global_scope": "True", + "has_per_asic_scope": "False", + "high_mem_alert": "disabled", + "set_owner": "local", + "state": "enabled", + "support_syslog_rate_limit": "False" + } + }, + "FLEX_COUNTER_TABLE": { + "ACL": { + "FLEX_COUNTER_DELAY_STATUS": "true", + "FLEX_COUNTER_STATUS": "disable", + "POLL_INTERVAL": "10000" + } + }, + "INTERFACE": { + "Ethernet0|10.0.0.0/31": {}, + "Ethernet104|10.0.0.26/31": {}, + "Ethernet112|10.0.0.28/31": {}, + "Ethernet120|10.0.0.30/31": {}, + "Ethernet128|10.0.0.32/31": {}, + "Ethernet136|10.0.0.34/31": {}, + "Ethernet144|10.0.0.36/31": {}, + "Ethernet152|10.0.0.38/31": {}, + "Ethernet160|10.0.0.40/31": {}, + "Ethernet168|10.0.0.42/31": {}, + "Ethernet16|10.0.0.4/31": {}, + "Ethernet176|10.0.0.44/31": {}, + "Ethernet184|10.0.0.46/31": {}, + "Ethernet192|10.0.0.48/31": {}, + "Ethernet200|10.0.0.50/31": {}, + "Ethernet208|10.0.0.52/31": {}, + "Ethernet216|10.0.0.54/31": {}, + "Ethernet224|10.0.0.56/31": {}, + "Ethernet232|10.0.0.58/31": {}, + "Ethernet240|10.0.0.60/31": {}, + "Ethernet248|10.0.0.62/31": {}, + "Ethernet24|10.0.0.6/31": {}, + "Ethernet32|10.0.0.8/31": {}, + "Ethernet40|10.0.0.10/31": {}, + "Ethernet48|10.0.0.12/31": {}, + "Ethernet56|10.0.0.14/31": {}, + "Ethernet64|10.0.0.16/31": {}, + "Ethernet72|10.0.0.18/31": {}, + "Ethernet80|10.0.0.20/31": {}, + "Ethernet88|10.0.0.22/31": {}, + "Ethernet8|10.0.0.2/31": {}, + "Ethernet96|10.0.0.24/31": {} + }, + "LOOPBACK_INTERFACE": { + "Loopback0|10.1.0.1/32": {} + }, + "PORT": { + "Ethernet0": { + "admin_status": "up", + "alias": "etp1", + "lanes": "0,1,2,3,4,5,6,7", + "mtu": "9100" + }, + "Ethernet104": { + "admin_status": "up", + "alias": "etp14", + "lanes": "104,105,106,107,108,109,110,111", + "mtu": "9100" + }, + "Ethernet112": { + "admin_status": "up", + "alias": "etp15", + "lanes": "112,113,114,115,116,117,118,119", + "mtu": "9100" + }, + "Ethernet120": { + "admin_status": "up", + "alias": "etp16", + "lanes": "120,121,122,123,124,125,126,127", + "mtu": "9100" + }, + "Ethernet128": { + "admin_status": "up", + "alias": "etp17", + "lanes": "128,129,130,131,132,133,134,135", + "mtu": "9100" + }, + "Ethernet136": { + "admin_status": "up", + "alias": "etp18", + "lanes": "136,137,138,139,140,141,142,143", + "mtu": "9100" + }, + "Ethernet144": { + "admin_status": "up", + "alias": "etp19", + "lanes": "144,145,146,147,148,149,150,151", + "mtu": "9100" + }, + "Ethernet152": { + "admin_status": "up", + "alias": "etp20", + "lanes": "152,153,154,155,156,157,158,159", + "mtu": "9100" + }, + "Ethernet16": { + "admin_status": "up", + "alias": "etp3", + "lanes": "16,17,18,19,20,21,22,23", + "mtu": "9100" + }, + "Ethernet160": { + "admin_status": "up", + "alias": "etp21", + "lanes": "160,161,162,163,164,165,166,167", + "mtu": "9100" + }, + "Ethernet168": { + "admin_status": "up", + "alias": "etp22", + "lanes": "168,169,170,171,172,173,174,175", + "mtu": "9100" + }, + "Ethernet176": { + "admin_status": "up", + "alias": "etp23", + "lanes": "176,177,178,179,180,181,182,183", + "mtu": "9100" + }, + "Ethernet184": { + "admin_status": "up", + "alias": "etp24", + "lanes": "184,185,186,187,188,189,190,191", + "mtu": "9100" + }, + "Ethernet192": { + "admin_status": "up", + "alias": "etp25", + "lanes": "192,193,194,195,196,197,198,199", + "mtu": "9100" + }, + "Ethernet200": { + "admin_status": "up", + "alias": "etp26", + "lanes": "200,201,202,203,204,205,206,207", + "mtu": "9100" + }, + "Ethernet208": { + "admin_status": "up", + "alias": "etp27", + "lanes": "208,209,210,211,212,213,214,215", + "mtu": "9100" + }, + "Ethernet216": { + "admin_status": "up", + "alias": "etp28", + "lanes": "216,217,218,219,220,221,222,223", + "mtu": "9100" + }, + "Ethernet224": { + "admin_status": "up", + "alias": "etp29", + "lanes": "224,225,226,227,228,229,230,231", + "mtu": "9100" + }, + "Ethernet232": { + "admin_status": "up", + "alias": "etp30", + "lanes": "232,233,234,235,236,237,238,239", + "mtu": "9100" + }, + "Ethernet24": { + "admin_status": "up", + "alias": "etp4", + "lanes": "24,25,26,27,28,29,30,31", + "mtu": "9100" + }, + "Ethernet240": { + "admin_status": "up", + "alias": "etp31", + "lanes": "240,241,242,243,244,245,246,247", + "mtu": "9100" + }, + "Ethernet248": { + "admin_status": "up", + "alias": "etp32", + "lanes": "248,249,250,251,252,253,254,255", + "mtu": "9100" + }, + "Ethernet32": { + "admin_status": "up", + "alias": "etp5", + "lanes": "32,33,34,35,36,37,38,39", + "mtu": "9100" + }, + "Ethernet40": { + "admin_status": "up", + "alias": "etp6", + "lanes": "40,41,42,43,44,45,46,47", + "mtu": "9100" + }, + "Ethernet48": { + "admin_status": "up", + "alias": "etp7", + "lanes": "48,49,50,51,52,53,54,55", + "mtu": "9100" + }, + "Ethernet56": { + "admin_status": "up", + "alias": "etp8", + "lanes": "56,57,58,59,60,61,62,63", + "mtu": "9100" + }, + "Ethernet64": { + "admin_status": "up", + "alias": "etp9", + "lanes": "64,65,66,67,68,69,70,71", + "mtu": "9100" + }, + "Ethernet72": { + "admin_status": "up", + "alias": "etp10", + "lanes": "72,73,74,75,76,77,78,79", + "mtu": "9100" + }, + "Ethernet8": { + "admin_status": "up", + "alias": "etp2", + "lanes": "8,9,10,11,12,13,14,15", + "mtu": "9100" + }, + "Ethernet80": { + "admin_status": "up", + "alias": "etp11", + "lanes": "80,81,82,83,84,85,86,87", + "mtu": "9100" + }, + "Ethernet88": { + "admin_status": "up", + "alias": "etp12", + "lanes": "88,89,90,91,92,93,94,95", + "mtu": "9100" + }, + "Ethernet96": { + "admin_status": "up", + "alias": "etp13", + "lanes": "96,97,98,99,100,101,102,103", + "mtu": "9100" + } + } +} \ No newline at end of file diff --git a/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf index be261bab99a8..f4d987989c38 100644 --- a/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf +++ b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf @@ -10,6 +10,7 @@ enable password zebra ! vrf VnetFE vni 8000 +exit ! ! ! Enable nht through default route diff --git a/src/sonic-config-engine/tests/sample_output/t2-switch-masic1.json b/src/sonic-config-engine/tests/sample_output/t2-switch-masic1.json new file mode 100644 index 000000000000..c88d4c6997ff --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/t2-switch-masic1.json @@ -0,0 +1,11 @@ +[ + { + "SWITCH_TABLE:switch": { + "ecmp_hash_seed": "26", + "lag_hash_seed": "26", + "fdb_aging_time": "600", + "ordered_ecmp": "false" + }, + "OP": "SET" + } +] diff --git a/src/sonic-config-engine/tests/sample_output/t2-switch-masic3.json b/src/sonic-config-engine/tests/sample_output/t2-switch-masic3.json new file mode 100644 index 000000000000..2e5e3fbf4b94 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/t2-switch-masic3.json @@ -0,0 +1,11 @@ +[ + { + "SWITCH_TABLE:switch": { + "ecmp_hash_seed": "28", + "lag_hash_seed": "28", + "fdb_aging_time": "600", + "ordered_ecmp": "false" + }, + "OP": "SET" + } +] diff --git a/src/sonic-config-engine/tests/t1-ss-dpu-sample-port-config.ini b/src/sonic-config-engine/tests/t1-ss-dpu-sample-port-config.ini new file mode 100644 index 000000000000..eb8916447e47 --- /dev/null +++ b/src/sonic-config-engine/tests/t1-ss-dpu-sample-port-config.ini @@ -0,0 +1,2 @@ +# name lanes alias +Ethernet0 0,1,2,3,4,5,6,7 etp1 diff --git a/src/sonic-config-engine/tests/test_cfggen.py b/src/sonic-config-engine/tests/test_cfggen.py index 6126522bb6dd..19e0af5cd4dd 100644 --- a/src/sonic-config-engine/tests/test_cfggen.py +++ b/src/sonic-config-engine/tests/test_cfggen.py @@ -696,7 +696,7 @@ def test_metadata_tacacs(self): def test_metadata_ntp(self): argument = ['-m', self.sample_graph_metadata, '-p', self.port_config, '-v', "NTP_SERVER"] output = self.run_script(argument) - self.assertEqual(utils.to_dict(output.strip()), utils.to_dict("{'10.0.10.1': {}, '10.0.10.2': {}}")) + self.assertEqual(utils.to_dict(output.strip()), utils.to_dict("{'10.0.10.1': {'iburst': 'on'}, '10.0.10.2': {'iburst': 'on'}}")) def test_dns_nameserver(self): argument = ['-m', self.sample_graph_metadata, '-p', self.port_config, '-v', "DNS_NAMESERVER"] diff --git a/src/sonic-config-engine/tests/test_cfggen_from_yang.py b/src/sonic-config-engine/tests/test_cfggen_from_yang.py index 48b970df8204..7caf1425e1ad 100644 --- a/src/sonic-config-engine/tests/test_cfggen_from_yang.py +++ b/src/sonic-config-engine/tests/test_cfggen_from_yang.py @@ -272,7 +272,9 @@ def test_fabric_monitor_data_table(self): "monErrThreshCrcCells": "1", "monErrThreshRxCells": "61035156", "monPollThreshIsolation": "1", - "monPollThreshRecovery": "8" + "monPollThreshRecovery": "8", + "monCapacityThreshWarn": "10", + "monState": "enable" } }) @@ -283,6 +285,7 @@ def test_fabric_port_table(self): "Fabric0": { "alias": "Fabric0", "isolateStatus": "False", - "lanes": "0" + "lanes": "0", + "forceUnisolateStatus": "0" } }) diff --git a/src/sonic-config-engine/tests/test_chassis_cfggen.py b/src/sonic-config-engine/tests/test_chassis_cfggen.py index c309e7f2d694..83d4be6f3550 100644 --- a/src/sonic-config-engine/tests/test_chassis_cfggen.py +++ b/src/sonic-config-engine/tests/test_chassis_cfggen.py @@ -104,7 +104,7 @@ def test_ntp(self): argument = ['-m', self.sample_graph, '-p', self.sample_port_config, '--var-json', 'NTP_SERVER'] output = json.loads(self.run_script(argument)) - self.assertDictEqual(output, {'17.39.1.130': {}, '17.39.1.129': {}}) + self.assertDictEqual(output, {'17.39.1.130': {'iburst': 'on'}, '17.39.1.129': {'iburst': 'on'}}) # NTP data is present only in the host config argument = ['-m', self.sample_graph, '--var-json', 'NTP_SERVER'] @@ -182,7 +182,7 @@ def test_system_port(self): expected_output_file = os.path.join( self.test_data_dir, 'system_ports.json') self.run_script(argument, output_file=self.output_file) - self.assertTrue(self.run_diff(expected_output_file, self.output_file)) + self.assertFalse(self.run_diff(expected_output_file, self.output_file)) if os.path.exists(self.output_file): os.remove(self.output_file) @@ -416,7 +416,7 @@ def test_ntp(self): argument = ['-m', self.sample_graph, '-p', self.sample_port_config, '--var-json', 'NTP_SERVER'] output = json.loads(self.run_script(argument)) - self.assertDictEqual(output, {'17.39.1.130': {}, '17.39.1.129': {}}) + self.assertDictEqual(output, {'17.39.1.130': {'iburst': 'on'}, '17.39.1.129': {'iburst': 'on'}}) # NTP data is present only in the host config argument = ['-m', self.sample_graph, '--var-json', 'NTP_SERVER'] @@ -433,7 +433,6 @@ def test_device_metadata(self): output = json.loads(self.run_script(argument)) print(output['localhost']) self.assertDictEqual(output['localhost'], { - 'bgp_asn': None, 'region': 'test', 'cloudtype': 'Public', 'docker_routing_config_mode': 'separated', @@ -480,11 +479,11 @@ def test_system_port(self): argument = ['-m', self.sample_graph, '-p', self.sample_port_config, '-n', 'asic0', - '--var-json', 'DEVICE_METADATA'] + '--var-json', 'SYSTEM_PORT'] expected_output_file = os.path.join( self.test_data_dir, 'system_ports.json') self.run_script(argument, output_file=self.output_file) - self.assertTrue(self.run_diff(expected_output_file, self.output_file)) + self.assertFalse(self.run_diff(expected_output_file, self.output_file)) if os.path.exists(self.output_file): os.remove(self.output_file) @@ -885,7 +884,7 @@ def test_ntp(self): '--var-json', 'NTP_SERVER' ] output = json.loads(self.run_script(argument)) - self.assertDictEqual(output, {'17.39.1.130': {}, '17.39.1.129': {}}) + self.assertDictEqual(output, {'17.39.1.130': {'iburst': 'on'}, '17.39.1.129': {'iburst': 'on'}}) def test_mgmt_port(self): @@ -910,7 +909,6 @@ def test_device_metadata(self): print(output['localhost']) self.assertDictEqual(output['localhost'], { - "bgp_asn": None, "region": "test", "cloudtype": "Public", "docker_routing_config_mode": "separated", @@ -938,7 +936,6 @@ def test_device_metadata_for_namespace(self): print(output['localhost']) self.assertDictEqual(output['localhost'], { - "bgp_asn": None, "region": "test", "cloudtype": None, "docker_routing_config_mode": "separated", @@ -1022,7 +1019,7 @@ def test_ntp(self): '--var-json', 'NTP_SERVER' ] output = json.loads(self.run_script(argument)) - self.assertDictEqual(output, {'17.39.1.130': {}, '17.39.1.129': {}}) + self.assertDictEqual(output, {'17.39.1.130': {'iburst': 'on'}, '17.39.1.129': {'iburst': 'on'}}) # NTP data is present only in the host config argument = ['-m', self.sample_graph, '--var-json', 'NTP_SERVER'] @@ -1046,7 +1043,6 @@ def test_device_metadata(self): print(output['localhost']) self.assertDictEqual(output['localhost'], { - "bgp_asn": None, "region": "test", "cloudtype": "Public", "docker_routing_config_mode": "separated", @@ -1074,7 +1070,6 @@ def test_device_metadata_for_namespace(self): print(output['localhost']) self.assertDictEqual(output['localhost'], { - "bgp_asn": None, "region": "test", "cloudtype": None, "docker_routing_config_mode": "separated", diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py index cf8907bf1c2b..2f424f6c3949 100644 --- a/src/sonic-config-engine/tests/test_j2files.py +++ b/src/sonic-config-engine/tests/test_j2files.py @@ -29,6 +29,7 @@ def setUp(self): self.t0_port_config = os.path.join(self.test_dir, 't0-sample-port-config.ini') self.t0_port_config_tiny = os.path.join(self.test_dir, 't0-sample-port-config-tiny.ini') self.t1_ss_port_config = os.path.join(self.test_dir, 't1-ss-sample-port-config.ini') + self.t1_ss_dpu_port_config = os.path.join(self.test_dir, 't1-ss-dpu-sample-port-config.ini') self.l1_l3_port_config = os.path.join(self.test_dir, 'l1-l3-sample-port-config.ini') self.t0_7050cx3_port_config = os.path.join(self.test_dir, 't0_7050cx3_d48c8_port_config.ini') self.t1_mlnx_minigraph = os.path.join(self.test_dir, 't1-sample-graph-mlnx.xml') @@ -46,6 +47,7 @@ def setUp(self): self.no_ip_helper_minigraph = os.path.join(self.test_dir, 't0-sample-no-ip-helper-graph.xml') self.nokia_ixr7250e_36x100g_t2_minigraph = os.path.join(self.test_dir, 'sample-nokia-ixr7250e-36x100g-t2-minigraph.xml') self.nokia_ixr7250e_36x400g_t2_minigraph = os.path.join(self.test_dir, 'sample-nokia-ixr7250e-36x400g-t2-minigraph.xml') + self.t2_sample_graph_chassis_packet = os.path.join(self.test_dir, 'sample-chassis-packet-lc-graph.xml') self.output_file = os.path.join(self.test_dir, 'output') os.environ["CFGGEN_UNIT_TESTING"] = "2" @@ -323,6 +325,17 @@ def test_t1_smartswitch_template(self): self.assertTrue(json.dumps(sample_output_json, sort_keys=True) == json.dumps(output_json, sort_keys=True)) + def test_t1_smartswitch_dpu_template(self): + argument = ['-k', 'SS-DPU-1x400Gb', '--preset', 't1-smartswitch', '-p', self.t1_ss_dpu_port_config] + output = self.run_script(argument) + output_json = json.loads(output) + + sample_output_file = os.path.join(self.test_dir, 'sample_output', 't1-smartswitch-dpu.json') + with open(sample_output_file) as sample_output_fd: + sample_output_json = json.load(sample_output_fd) + + self.assertTrue(json.dumps(sample_output_json, sort_keys=True) == json.dumps(output_json, sort_keys=True)) + def test_qos_arista7050_render_template(self): self._test_qos_render_template('arista', 'x86_64-arista_7050_qx32s', 'Arista-7050-QX-32S', 'sample-arista-7050-t0-minigraph.xml', 'qos-arista7050.json') @@ -494,6 +507,58 @@ def test_qos_dscp_remapping_render_template(self): assert utils.cmp(sample_output_file, test_output) os.remove(test_output) + def test_qos_smartswitch_render_template(self): + if utils.PYvX_DIR != 'py3': + # Skip on python2 as the change will not be backported to previous version + return + + dir_paths = [ + '../../../device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28', + '../../../device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28' + ] + sample_outputs = [ + 'qos-mellanox4700-o28-t1-smartswitch.json', + 'qos-mellanox4700-o28-t1-smartswitch_dyn.json' + ] + sample_minigraph_files = [ + 'sample-mellanox-4700-t1-minigraph-smartswitch.xml', + 'sample-mellanox-4700-t1-minigraph-smartswitch.xml' + ] + buffer_files = [ + 'buffers.json.j2', # traditional buffer mode + 'buffers_dynamic.json.j2' # dynamic buffer mode + ] + + for i, path in enumerate(dir_paths): + device_template_path = os.path.join(self.test_dir, path) + sample_output = sample_outputs[i] + sample_minigraph_file = os.path.join(self.test_dir,sample_minigraph_files[i]) + qos_file = os.path.join(device_template_path, 'qos.json.j2') + buf_file = os.path.join(device_template_path, buffer_files[i]) + hwsku_json_file = os.path.join(device_template_path, 'hwsku.json') + plat_json_file = os.path.join(device_template_path, '../platform.json') + test_output = os.path.join(self.test_dir, 'output.json') + + # copy qos_config.j2 & buffer_config.j2 to the target directory to have all templates in one directory + qos_config_file = os.path.join(self.test_dir, '..', '..', '..', 'files', 'build_templates', 'qos_config.j2') + shutil.copy2(qos_config_file, device_template_path) + + buf_config_file = os.path.join(self.test_dir, '..', '..', '..', 'files', 'build_templates', 'buffers_config.j2') + shutil.copy2(buf_config_file, device_template_path) + + argument = ['-m', sample_minigraph_file, '-p', plat_json_file, '-S', hwsku_json_file, '-t', "{},config-db".format(qos_file), '-t', "{},config-db".format(buf_file), '--print-data'] + self.run_script(argument, output_file=test_output) + + # cleanup + qos_config_file_new = os.path.join(device_template_path, 'qos_config.j2') + os.remove(qos_config_file_new) + buf_config_file_new = os.path.join(device_template_path, 'buffers_config.j2') + os.remove(buf_config_file_new) + + sample_output_file = os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, sample_output) + assert utils.cmp_tables(sample_output_file, test_output) + os.remove(test_output) + def test_config_brcm_render_template(self): if utils.PYvX_DIR != 'py3': #Skip on python2 as the change will not be backported to previous version @@ -689,6 +754,36 @@ def test_swss_switch_render_template_multi_asic(self): assert utils.cmp(sample_output_file, self.output_file), self.run_diff(sample_output_file, self.output_file) os.environ["NAMESPACE_ID"] = "" + def test_swss_switch_render_template_t2(self): + # verify the ECMP hash seed changes per namespace + switch_template = os.path.join( + self.test_dir, '..', '..', '..', 'dockers', 'docker-orchagent', + 'switch.json.j2' + ) + constants_yml = os.path.join( + self.test_dir, '..', '..', '..', 'files', 'image_config', + 'constants', 'constants.yml' + ) + test_list = { + "0": { + "namespace_id": "1", + "output": "t2-switch-masic1.json" + }, + "1": { + "namespace_id": "3", + "output": "t2-switch-masic3.json" + }, + } + for _, v in test_list.items(): + os.environ["NAMESPACE_ID"] = v["namespace_id"] + argument = ["-m", self.t2_sample_graph_chassis_packet, "-y", constants_yml, "-t", switch_template] + sample_output_file = os.path.join( + self.test_dir, 'sample_output', v["output"] + ) + self.run_script(argument, output_file=self.output_file) + assert utils.cmp(sample_output_file, self.output_file), self.run_diff(sample_output_file, self.output_file) + os.environ["NAMESPACE_ID"] = "" + def test_ndppd_conf(self): conf_template = os.path.join(self.test_dir, "ndppd.conf.j2") vlan_interfaces_json = os.path.join(self.test_dir, "data", "ndppd", "vlan_interfaces.json") @@ -759,9 +854,10 @@ def test_rsyslog_conf(self): # Skip on python2 as the change will not be backported to previous version return - conf_template = os.path.join(self.test_dir, '..', '..', '..', 'files', 'image_config', 'rsyslog', 'rsyslog.conf.j2') + conf_template = os.path.join(self.test_dir, '..', '..', '..', 'files', 'image_config', 'rsyslog', + 'rsyslog.conf.j2') config_db_json = os.path.join(self.test_dir, "data", "rsyslog", "config_db.json") - additional_data = "{\"udp_server_ip\": \"10.150.22.222\", \"hostname\": \"kvm-host\"}" + additional_data = "{\"udp_server_ip\": \"1.1.1.1\", \"hostname\": \"kvm-host\"}" argument = ['-j', config_db_json, '-t', conf_template, '-a', additional_data] self.run_script(argument, output_file=self.output_file) @@ -769,6 +865,24 @@ def test_rsyslog_conf(self): pattern = r'^action.*Device="eth0".*' for line in file: assert not bool(re.match(pattern, line.strip())), "eth0 is not allowed in Mgfx device" + self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'rsyslog.conf'), + self.output_file)) + + def test_rsyslog_conf_docker0_ip(self): + if utils.PYvX_DIR != 'py3': + # Skip on python2 as the change will not be backported to previous version + return + + conf_template = os.path.join(self.test_dir, '..', '..', '..', 'files', 'image_config', 'rsyslog', + 'rsyslog.conf.j2') + config_db_json = os.path.join(self.test_dir, "data", "rsyslog", "config_db.json") + additional_data = "{\"udp_server_ip\": \"1.1.1.1\", \"hostname\": \"kvm-host\", " + \ + "\"docker0_ip\": \"2.2.2.2\"}" + + argument = ['-j', config_db_json, '-t', conf_template, '-a', additional_data] + self.run_script(argument, output_file=self.output_file) + self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, + 'rsyslog_with_docker0.conf'), self.output_file)) def tearDown(self): os.environ["CFGGEN_UNIT_TESTING"] = "" diff --git a/src/sonic-config-engine/tests/test_minigraph_case.py b/src/sonic-config-engine/tests/test_minigraph_case.py index a5578b841df4..9e19fbdaeaff 100644 --- a/src/sonic-config-engine/tests/test_minigraph_case.py +++ b/src/sonic-config-engine/tests/test_minigraph_case.py @@ -283,7 +283,7 @@ def test_minigraph_mgmt_port(self): def test_metadata_ntp(self): argument = ['-m', self.sample_graph, '-p', self.port_config, '-v', "NTP_SERVER"] output = self.run_script(argument) - self.assertEqual(output.strip(), "{'10.0.10.1': {}, '10.0.10.2': {}}") + self.assertEqual(output.strip(), "{'10.0.10.1': {'iburst': 'on'}, '10.0.10.2': {'iburst': 'on'}}") def test_minigraph_vnet(self): argument = ['-m', self.sample_graph, '-p', self.port_config, '-v', "VNET"] diff --git a/src/sonic-config-engine/tests/test_multinpu_cfggen.py b/src/sonic-config-engine/tests/test_multinpu_cfggen.py index bba0adeae752..5f7646f48f1c 100644 --- a/src/sonic-config-engine/tests/test_multinpu_cfggen.py +++ b/src/sonic-config-engine/tests/test_multinpu_cfggen.py @@ -151,7 +151,7 @@ def test_metadata_tacacs(self): def test_metadata_ntp(self): argument = ['-m', self.sample_graph, '-p', self.sample_port_config, '--var-json', "NTP_SERVER"] output = json.loads(self.run_script(argument)) - self.assertDictEqual(output, {'17.39.1.130': {}, '17.39.1.129': {}}) + self.assertDictEqual(output, {'17.39.1.130': {'iburst': 'on'}, '17.39.1.129': {'iburst': 'on'}}) #NTP data is present only in the host config argument = ['-m', self.sample_graph, '--var-json', "NTP_SERVER"] for asic in range(NUM_ASIC): diff --git a/src/sonic-config-engine/tests/test_yang_data.json b/src/sonic-config-engine/tests/test_yang_data.json index 8126e7bc264a..b5cd43c717f5 100644 --- a/src/sonic-config-engine/tests/test_yang_data.json +++ b/src/sonic-config-engine/tests/test_yang_data.json @@ -378,7 +378,9 @@ "monErrThreshCrcCells": "1", "monErrThreshRxCells": "61035156", "monPollThreshIsolation": "1", - "monPollThreshRecovery": "8" + "monPollThreshRecovery": "8", + "monCapacityThreshWarn": "10", + "monState": "enable" } } }, @@ -389,7 +391,8 @@ "name": "Fabric0", "alias": "Fabric0", "isolateStatus": "False", - "lanes": "0" + "lanes": "0", + "forceUnisolateStatus": "0" } ] } diff --git a/src/sonic-ctrmgrd/ctrmgr/ctrmgrd.py b/src/sonic-ctrmgrd/ctrmgr/ctrmgrd.py index 7e85c22f60c8..645724214bfd 100755 --- a/src/sonic-ctrmgrd/ctrmgr/ctrmgrd.py +++ b/src/sonic-ctrmgrd/ctrmgr/ctrmgrd.py @@ -489,7 +489,9 @@ def handle_update(self, feat, set_owner, ct_owner, remote_state): service_restart = False if set_owner == "local": - if ct_owner != "local": + # NOTE: no need to restart if the current owner is none, + # as none implies the container is not running. + if ct_owner != "local" and ct_owner != "none": service_restart = True else: if (ct_owner != "none") and (remote_state == "pending"): diff --git a/src/sonic-ctrmgrd/tests/ctrmgrd_test.py b/src/sonic-ctrmgrd/tests/ctrmgrd_test.py index 76651309ce6a..df7e2729d566 100755 --- a/src/sonic-ctrmgrd/tests/ctrmgrd_test.py +++ b/src/sonic-ctrmgrd/tests/ctrmgrd_test.py @@ -355,6 +355,38 @@ } } } + }, + 5: { + common_test.DESCR: "No restart for current_owner == none in config reload", + common_test.ARGS: "ctrmgrd", + common_test.PRE: { + common_test.CONFIG_DB_NO: { + common_test.FEATURE_TABLE: { + "swss": { + "set_owner": "local", + "state": "enabled", + "auto_restart": "enabled" + } + } + } + }, + common_test.UPD: { + common_test.STATE_DB_NO: { + common_test.FEATURE_TABLE: { + "swss": { + "system_state": "down", + "remote_state": "none", + "current_owner": "none", + "container_id": "", + "state": "enabled" + } + } + } + }, + common_test.POST: { + common_test.STATE_DB_NO: { + } + } } } diff --git a/src/sonic-dash-api b/src/sonic-dash-api index d033898e7e47..0b33087d82c2 160000 --- a/src/sonic-dash-api +++ b/src/sonic-dash-api @@ -1 +1 @@ -Subproject commit d033898e7e4774fad88229610a5bb502b4152a5a +Subproject commit 0b33087d82c2d297aadd75b2862fbd11a2fce386 diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list index 625e6afccad2..b526724a7819 100644 --- a/src/sonic-device-data/tests/permitted_list +++ b/src/sonic-device-data/tests/permitted_list @@ -346,3 +346,4 @@ sai_stats_support_mask sai_default_cpu_tx_tc oversubscribe_mixed_sister_25_50_enable sai_disable_srcmacqedstmac_ctrl +programmability_ucode_relative_path diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/common/utils.py b/src/sonic-dhcp-utilities/dhcp_utilities/common/utils.py index f6975c452cdd..325553f536af 100644 --- a/src/sonic-dhcp-utilities/dhcp_utilities/common/utils.py +++ b/src/sonic-dhcp-utilities/dhcp_utilities/common/utils.py @@ -160,8 +160,11 @@ def get_target_process_cmds(process_name): """ res = [] for proc in psutil.process_iter(): - if proc.name() == process_name: - res.append(proc.cmdline()) + try: + if proc.name() == process_name: + res.append(proc.cmdline()) + except psutil.NoSuchProcess: + continue return res diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py index 66139500d0a5..d1b22a3158b4 100644 --- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py +++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py @@ -109,7 +109,9 @@ def refresh_dhcrelay(self, force_kill=False): self._disable_checkers(checkers_to_be_disabled) self._start_dhcrelay_process(dhcp_interfaces, dhcp_server_ip, force_kill) - self._start_dhcpmon_process(dhcp_interfaces, force_kill) + + # TODO dhcpmon is not ready for count packet for dhcp_server, hence comment invoke it for now + # self._start_dhcpmon_process(dhcp_interfaces, force_kill) def wait(self): """ @@ -307,7 +309,7 @@ def _start_dhcpmon_process(self, new_dhcp_interfaces, force_kill): for pid, cmds in pids_cmds.items(): proc = psutil.Process(pid) if proc.status() == psutil.STATUS_ZOMBIE: - syslog.syslog(syslog.LOG_ERR, "Faild to start dhcpmon process: {}".format(cmds)) + syslog.syslog(syslog.LOG_ERR, "Failed to start dhcpmon process: {}".format(cmds)) terminate_proc(proc) else: syslog.syslog(syslog.LOG_INFO, "dhcpmon process started successfully, cmds: {}".format(cmds)) @@ -319,16 +321,19 @@ def _kill_exist_relay_releated_process(self, new_dhcp_interfaces, process_name, # Get old dhcrelay process and get old dhcp interfaces for proc in psutil.process_iter(): - if proc.name() == process_name: - cmds = proc.cmdline() - index = 0 - target_procs.append(proc) - while index < len(cmds): - if cmds[index] == "-id": - old_dhcp_interfaces.add(cmds[index + 1]) - index += 2 - else: - index += 1 + try: + if proc.name() == process_name: + cmds = proc.cmdline() + index = 0 + target_procs.append(proc) + while index < len(cmds): + if cmds[index] == "-id": + old_dhcp_interfaces.add(cmds[index + 1]) + index += 2 + else: + index += 1 + except psutil.NoSuchProcess: + continue if len(target_procs) == 0: return NOT_FOUND_PROC diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py index eb7ae34d852f..c41e61d5f9f8 100755 --- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py +++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py @@ -16,6 +16,7 @@ VLAN_MEMBER = "VLAN_MEMBER" DPUS = "DPUS" MID_PLANE_BRIDGE = "MID_PLANE_BRIDGE" +MID_PLANE_BRIDGE_SUBNET_ID = 10000 PORT_MODE_CHECKER = ["DhcpServerTableCfgChangeEventChecker", "DhcpPortTableEventChecker", "DhcpRangeTableEventChecker", "DhcpOptionTableEventChecker", "VlanTableEventChecker", "VlanIntfTableEventChecker", "VlanMemberTableEventChecker"] @@ -90,7 +91,7 @@ def generate(self): port_ips, used_ranges = self._parse_port(port_ipv4, dhcp_interfaces, dhcp_members, ranges) customized_options = self._parse_customized_options(customized_options_ipv4) render_obj, enabled_dhcp_interfaces, used_options, subscribe_table = \ - self._construct_obj_for_template(dhcp_server_ipv4, port_ips, hostname, customized_options) + self._construct_obj_for_template(dhcp_server_ipv4, port_ips, hostname, customized_options, smart_switch) if smart_switch: subscribe_table |= set(SMART_SWITCH_CHECKER) @@ -175,7 +176,7 @@ def _parse_port_map_alias(self): for pc_name in pc_table.keys(): self.port_alias_map[pc_name] = pc_name - def _construct_obj_for_template(self, dhcp_server_ipv4, port_ips, hostname, customized_options): + def _construct_obj_for_template(self, dhcp_server_ipv4, port_ips, hostname, customized_options, smart_switch=False): subnets = [] client_classes = [] enabled_dhcp_interfaces = set() @@ -223,8 +224,9 @@ def _construct_obj_for_template(self, dhcp_server_ipv4, port_ips, hostname, cust "condition": "substring(relay4[1].hex, -{}, {}) == '{}'".format(class_len, class_len, client_class) }) + subnet_obj = { - "id": dhcp_interface_name.replace("Vlan", ""), + "id": MID_PLANE_BRIDGE_SUBNET_ID if smart_switch else dhcp_interface_name.replace("Vlan", ""), "subnet": str(ipaddress.ip_network(dhcp_interface_ip, strict=False)), "pools": pools, "gateway": dhcp_config["gateway"], diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_lease.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_lease.py index 6dda767287ca..e2e95fb7b532 100644 --- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_lease.py +++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_lease.py @@ -5,6 +5,7 @@ from abc import abstractmethod from collections import deque from datetime import datetime +from dhcp_utilities.common.utils import is_smart_switch DHCP_SERVER_IPV4_LEASE = "DHCP_SERVER_IPV4_LEASE" KEA_LEASE_FILE_PATH = "/tmp/kea-lease.csv" @@ -29,6 +30,13 @@ def __init__(self, db_connector, lease_update_interval=DEFAULE_LEASE_UPDATE_INTE self.lease_update_interval = lease_update_interval self.last_update_time = None self.lock = threading.Lock() + device_metadata = self.db_connector.get_config_db_table("DEVICE_METADATA") + self.is_smart_switch = is_smart_switch(device_metadata) + + if self.is_smart_switch: + mid_plane_table = self.db_connector.get_config_db_table("MID_PLANE_BRIDGE") + if "GLOBAL" in mid_plane_table and mid_plane_table["GLOBAL"]: + self.midplane_bridge_name = mid_plane_table["GLOBAL"]["bridge"] @abstractmethod def _read(self): @@ -97,6 +105,12 @@ def register(self): """ signal.signal(signal.SIGUSR1, self._update_lease) + def _lease_key(self, subnet_id, mac_address): + if self.is_smart_switch: + return f"{self.midplane_bridge_name}|{mac_address}" + else: + return f"Vlan{subnet_id}|{mac_address}" + def _read(self): # Read lease file generated by kea-dhcp4 try: @@ -120,7 +134,7 @@ def _read(self): lease_end = splits[4] subnet_id = splits[5] - new_key = "{}|{}".format("Vlan" + subnet_id, mac_address) + new_key = self._lease_key(subnet_id, mac_address) if new_key in new_lease: continue new_lease[new_key] = { diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py index e8341e436b7c..73a928eb08c9 100644 --- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py +++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py @@ -39,9 +39,12 @@ def _notify_kea_dhcp4_proc(self): Send SIGHUP signal to kea-dhcp4 process """ for proc in psutil.process_iter(): - if KEA_DHCP4_PROC_NAME in proc.name(): - proc.send_signal(signal.SIGHUP) - break + try: + if KEA_DHCP4_PROC_NAME in proc.name(): + proc.send_signal(signal.SIGHUP) + break + except psutil.NoSuchProcess: + continue def dump_dhcp4_config(self): """ diff --git a/src/sonic-dhcp-utilities/tests/common_utils.py b/src/sonic-dhcp-utilities/tests/common_utils.py index 6f3c07a174f8..f5eb4e018f86 100644 --- a/src/sonic-dhcp-utilities/tests/common_utils.py +++ b/src/sonic-dhcp-utilities/tests/common_utils.py @@ -65,17 +65,22 @@ def mock_get_config_db_table(table_name): class MockProc(object): - def __init__(self, name, pid=None, status=psutil.STATUS_RUNNING): + def __init__(self, name, pid=1, exited=False): self.proc_name = name self.pid = pid + self.exited = exited def name(self): + if self.exited: + raise psutil.NoSuchProcess(self.pid) return self.proc_name def send_signal(self, sig_num): pass def cmdline(self): + if self.exited: + raise psutil.NoSuchProcess(self.pid) if self.proc_name == "dhcrelay": return ["/usr/sbin/dhcrelay", "-d", "-m", "discard", "-a", "%h:%p", "%P", "--name-alias-map-file", "/tmp/port-name-alias-map.txt", "-id", "Vlan1000", "-iu", "docker0", "240.127.1.2"] diff --git a/src/sonic-dhcp-utilities/tests/test_data/kea-dhcp4.conf.j2 b/src/sonic-dhcp-utilities/tests/test_data/kea-dhcp4.conf.j2 index 082cbca14dd5..f5f7a9b054f0 100644 --- a/src/sonic-dhcp-utilities/tests/test_data/kea-dhcp4.conf.j2 +++ b/src/sonic-dhcp-utilities/tests/test_data/kea-dhcp4.conf.j2 @@ -42,6 +42,7 @@ {%- if add_subnet_preceding_comma.flag -%},{%- endif -%} {%- set _dummy = add_subnet_preceding_comma.update({'flag': True}) %} { + "id": {{ subnet_info["id"] }}, "subnet": "{{ subnet_info["subnet"] }}", "pools": [ {%- set add_pool_preceding_comma = { 'flag': False } %} diff --git a/src/sonic-dhcp-utilities/tests/test_data/kea-lease_smart_switch.csv b/src/sonic-dhcp-utilities/tests/test_data/kea-lease_smart_switch.csv new file mode 100644 index 000000000000..ea7d4ed2cbc4 --- /dev/null +++ b/src/sonic-dhcp-utilities/tests/test_data/kea-lease_smart_switch.csv @@ -0,0 +1,5 @@ +address,hwaddr,client_id,valid_lifetime,expire,subnet_id,fqdn_fwd,fqdn_rev,hostname,state,user_context +169.254.200.4,aa:bb:cc:dd:ff:04,,900,1718053209,10000,0,0,sonic,0, +169.254.200.1,aa:bb:cc:dd:ff:01,,900,1718053209,10000,0,0,sonic,0, +169.254.200.3,aa:bb:cc:dd:ff:03,,900,1718053210,10000,0,0,sonic,0, +169.254.200.2,aa:bb:cc:dd:ff:02,,900,1718053210,10000,0,0,sonic,0, \ No newline at end of file diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py index 723731839649..3548e39c1435 100644 --- a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py +++ b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py @@ -42,6 +42,7 @@ }, "subnet4": [ { + "id": 1000, "subnet": "192.168.0.0/21", "pools": [ { diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_lease.py b/src/sonic-dhcp-utilities/tests/test_dhcp_lease.py index a831b2ad5a11..04009d2ee0f5 100644 --- a/src/sonic-dhcp-utilities/tests/test_dhcp_lease.py +++ b/src/sonic-dhcp-utilities/tests/test_dhcp_lease.py @@ -3,6 +3,7 @@ from freezegun import freeze_time from swsscommon import swsscommon from unittest.mock import patch, call, MagicMock +from common_utils import mock_get_config_db_table expected_lease = { "Vlan1000|10:70:fd:b6:13:00": { @@ -34,20 +35,22 @@ def test_read_kea_lease_with_file_not_found(mock_swsscommon_dbconnector_init): - db_connector = DhcpDbConnector() - kea_lease_handler = KeaDhcp4LeaseHandler(db_connector) - try: - kea_lease_handler._read() - except FileNotFoundError: - pass + with patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table): + db_connector = DhcpDbConnector() + kea_lease_handler = KeaDhcp4LeaseHandler(db_connector) + try: + kea_lease_handler._read() + except FileNotFoundError: + pass def test_read_kea_lease(mock_swsscommon_dbconnector_init): - db_connector = DhcpDbConnector() - kea_lease_handler = KeaDhcp4LeaseHandler(db_connector, lease_file="tests/test_data/kea-lease.csv") - # Verify whether lease information read is as expected - lease = kea_lease_handler._read() - assert lease == expected_lease + with patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table): + db_connector = DhcpDbConnector() + kea_lease_handler = KeaDhcp4LeaseHandler(db_connector, lease_file="tests/test_data/kea-lease.csv") + # Verify whether lease information read is as expected + lease = kea_lease_handler._read() + assert lease == expected_lease # Cannot mock built-in/extension type function(datetime.datetime.timestamp), need to free time @@ -88,13 +91,14 @@ def test_update_kea_lease(mock_swsscommon_dbconnector_init, mock_swsscommon_tabl def test_no_implement(mock_swsscommon_dbconnector_init): - db_connector = DhcpDbConnector() - lease_handler = LeaseHanlder(db_connector) - try: - lease_handler._read() - except NotImplementedError: - pass - try: - lease_handler.register() - except NotImplementedError: - pass + with patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table): + db_connector = DhcpDbConnector() + lease_handler = LeaseHanlder(db_connector) + try: + lease_handler._read() + except NotImplementedError: + pass + try: + lease_handler.register() + except NotImplementedError: + pass diff --git a/src/sonic-dhcp-utilities/tests/test_dhcprelayd.py b/src/sonic-dhcp-utilities/tests/test_dhcprelayd.py index 0cc95ad6a21c..4914ff020d63 100644 --- a/src/sonic-dhcp-utilities/tests/test_dhcprelayd.py +++ b/src/sonic-dhcp-utilities/tests/test_dhcprelayd.py @@ -111,6 +111,7 @@ def test_kill_exist_relay_releated_process(mock_swsscommon_dbconnector_init, new process_iter_ret = [] for running_proc in running_procs: process_iter_ret.append(MockProc(running_proc)) + process_iter_ret.append(MockProc("exited_proc", exited=True)) with patch.object(psutil, "process_iter", return_value=process_iter_ret), \ patch.object(ConfigDbEventChecker, "enable"): dhcp_db_connector = DhcpDbConnector() @@ -194,23 +195,23 @@ def test_execute_supervisor_dhcp_relay_process(mock_swsscommon_dbconnector_init, mock_run.assert_called_once_with(["supervisorctl", op, "dhcpmon-Vlan1000"], check=True) -@pytest.mark.parametrize("target_cmds", [[["/usr/bin/dhcrelay"]], [["/usr/bin/dhcpmon"]]]) -def test_check_dhcp_relay_process(mock_swsscommon_dbconnector_init, mock_swsscommon_table_init, target_cmds): - exp_config = {"isc-dhcpv4-relay-Vlan1000": ["/usr/bin/dhcrelay"]} - with patch("dhcp_utilities.dhcprelayd.dhcprelayd.get_target_process_cmds", return_value=target_cmds), \ +@pytest.mark.parametrize("target_procs_cmds", [[["dhcrelay", "-d"]], [["dhcpmon"]]]) +def test_check_dhcp_relay_process(mock_swsscommon_dbconnector_init, mock_swsscommon_table_init, target_procs_cmds): + exp_config = { + "isc-dhcpv4-relay-Vlan1000": ["dhcrelay", "-d"] + } + with patch("dhcp_utilities.dhcprelayd.dhcprelayd.get_target_process_cmds", return_value=target_procs_cmds), \ patch.object(DhcpRelayd, "dhcp_relay_supervisor_config", return_value=exp_config, new_callable=PropertyMock), \ patch.object(sys, "exit", mock_exit_func): dhcp_db_connector = DhcpDbConnector() dhcprelayd = DhcpRelayd(dhcp_db_connector, None) - exp_cmds = [value for key, value in exp_config.items() if "isc-dhcpv4-relay" in key] - exp_cmds.sort() try: dhcprelayd._check_dhcp_relay_processes() except SystemExit: - assert exp_cmds != target_cmds + assert target_procs_cmds[0] != exp_config["isc-dhcpv4-relay-Vlan1000"] else: - assert exp_cmds == target_cmds + assert target_procs_cmds[0] == exp_config["isc-dhcpv4-relay-Vlan1000"] def test_get_dhcp_relay_config(mock_swsscommon_dbconnector_init, mock_swsscommon_table_init): diff --git a/src/sonic-dhcp-utilities/tests/test_dhcpservd.py b/src/sonic-dhcp-utilities/tests/test_dhcpservd.py index f11ffdbba0b5..b55703aeb416 100644 --- a/src/sonic-dhcp-utilities/tests/test_dhcpservd.py +++ b/src/sonic-dhcp-utilities/tests/test_dhcpservd.py @@ -4,7 +4,7 @@ import signal import sys import time -from common_utils import MockProc +from common_utils import MockProc, mock_get_config_db_table from dhcp_utilities.common.utils import DhcpDbConnector from dhcp_utilities.common.dhcp_db_monitor import DhcpServdDbMonitor from dhcp_utilities.dhcpservd.dhcp_cfggen import DhcpServCfgGenerator @@ -66,6 +66,7 @@ def test_dump_dhcp4_config(mock_swsscommon_dbconnector_init, enabled_checker): def test_notify_kea_dhcp4_proc(process_list, mock_swsscommon_dbconnector_init, mock_get_render_template, mock_parse_port_map_alias): proc_list = [MockProc(process_name) for process_name in process_list] + proc_list.append(MockProc("exited_proc", exited=True)) with patch.object(psutil, "process_iter", return_value=proc_list), \ patch.object(MockProc, "send_signal", MagicMock()) as mock_send_signal: dhcp_db_connector = DhcpDbConnector() @@ -110,7 +111,8 @@ def test_update_dhcp_server_ip(mock_swsscommon_dbconnector_init, mock_parse_port def test_start(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias, mock_get_render_template): with patch.object(DhcpServd, "dump_dhcp4_config") as mock_dump, \ patch.object(DhcpServd, "_update_dhcp_server_ip") as mock_update_dhcp_server_ip, \ - patch.object(DhcpServdDbMonitor, "enable_checkers"): + patch.object(DhcpServdDbMonitor, "enable_checkers"), \ + patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table): dhcp_db_connector = DhcpDbConnector() dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so") dhcpservd = DhcpServd(dhcp_cfg_generator, dhcp_db_connector, MagicMock()) diff --git a/src/sonic-dhcp-utilities/tests/test_smart_switch.py b/src/sonic-dhcp-utilities/tests/test_smart_switch.py index 0347d5df2f6d..a5c6be2fd273 100644 --- a/src/sonic-dhcp-utilities/tests/test_smart_switch.py +++ b/src/sonic-dhcp-utilities/tests/test_smart_switch.py @@ -1,6 +1,7 @@ import json import pytest from common_utils import MockConfigDb, dhcprelayd_refresh_dhcrelay_test, dhcprelayd_proceed_with_check_res_test +from dhcp_utilities.dhcpservd.dhcp_lease import KeaDhcp4LeaseHandler from dhcp_utilities.dhcprelayd.dhcprelayd import DHCP_SERVER_CHECKER, MID_PLANE_CHECKER from dhcp_utilities.dhcpservd.dhcp_cfggen import DhcpServCfgGenerator from dhcp_utilities.common.utils import DhcpDbConnector @@ -35,6 +36,7 @@ }, "subnet4": [ { + "id": 10000, "subnet": "169.254.200.0/24", "pools": [ { @@ -103,6 +105,30 @@ } +expected_lease = { + 'bridge_midplane|aa:bb:cc:dd:ff:01': { + 'ip': '169.254.200.1', + 'lease_end': '1718053209', + 'lease_start': '1718052309' + }, + 'bridge_midplane|aa:bb:cc:dd:ff:02': { + 'ip': '169.254.200.2', + 'lease_end': '1718053210', + 'lease_start': '1718052310' + }, + 'bridge_midplane|aa:bb:cc:dd:ff:03': { + 'ip': '169.254.200.3', + 'lease_end': '1718053210', + 'lease_start': '1718052310' + }, + 'bridge_midplane|aa:bb:cc:dd:ff:04': { + 'ip': '169.254.200.4', + 'lease_end': '1718053209', + 'lease_start': '1718052309' + } +} + + def test_dhcprelayd_refresh_dhcrelay(mock_swsscommon_dbconnector_init): expected_checkers = set(["MidPlaneTableEventChecker"]) dhcprelayd_refresh_dhcrelay_test(expected_checkers, True, mock_get_config_db_table) @@ -140,3 +166,12 @@ def test_dhcp_dhcp_cfggen_generate(mock_swsscommon_dbconnector_init, mock_parse_ def mock_get_config_db_table(table_name): mock_config_db = MockConfigDb(MOCK_CONFIG_DB_PATH_SMART_SWITCH) return mock_config_db.get_config_db_table(table_name) + + +def test_read_kea_lease(mock_swsscommon_dbconnector_init): + with patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table): + db_connector = DhcpDbConnector() + kea_lease_handler = KeaDhcp4LeaseHandler(db_connector, lease_file="tests/test_data/kea-lease_smart_switch.csv") + # Verify whether lease information read is as expected + lease = kea_lease_handler._read() + assert lease == expected_lease diff --git a/src/sonic-dhcp-utilities/tests/test_utils.py b/src/sonic-dhcp-utilities/tests/test_utils.py index cf69c2f93377..4a41049fe06e 100644 --- a/src/sonic-dhcp-utilities/tests/test_utils.py +++ b/src/sonic-dhcp-utilities/tests/test_utils.py @@ -142,7 +142,9 @@ def test_validate_ttr_type(test_data): def test_get_target_process_cmds(): - with patch.object(psutil, "process_iter", return_value=[MockProc("dhcrelay", 1), MockProc("dhcpmon", 2)], + with patch.object(psutil, "process_iter", return_value=[MockProc("dhcrelay", 1), + MockProc("dhcrelay", 1, exited=True), + MockProc("dhcpmon", 2)], new_callable=PropertyMock): res = utils.get_target_process_cmds("dhcrelay") expected_res = [ diff --git a/src/sonic-eventd/src/eventd.cpp b/src/sonic-eventd/src/eventd.cpp index eb692d5b3a9b..d4da44f32526 100644 --- a/src/sonic-eventd/src/eventd.cpp +++ b/src/sonic-eventd/src/eventd.cpp @@ -302,7 +302,9 @@ static bool validate_event(const internal_event_t &event, runtime_id_t &rid, sequence_t &seq) { bool ret = false; - + if(event.empty()) { + return ret; + } internal_event_t::const_iterator itc_r, itc_s, itc_e; itc_r = event.find(EVENT_RUNTIME_ID); itc_s = event.find(EVENT_SEQUENCE); @@ -357,7 +359,6 @@ capture_service::do_capture() int init_cnt; void *cap_sub_sock = NULL; counters_t total_overflow = 0; - static bool init_done = false; typedef enum { /* @@ -394,25 +395,6 @@ capture_service::do_capture() m_cap_run = true; - if(!init_done) { - zmq_msg_t msg; - zmq_msg_init(&msg); - int rc = zmq_msg_recv(&msg, cap_sub_sock, 0); - RET_ON_ERR(rc == 1, "Failed to read subscription message when XSUB connects to XPUB"); - /* - * When XSUB socket connects to XPUB, a subscription message is sent as a single byte 1. - * When capture service begins to read, the very first message that it will read is this - * control character. - * - * We will handle by reading this message and dropping it before we begin reading for - * cached events. - * - * This behavior will only happen once when XSUB connects to XPUB not everytime cache is started. - * - */ - init_done = true; - } - while (m_ctrl != START_CAPTURE) { /* Wait for capture start */ this_thread::sleep_for(chrono::milliseconds(10)); diff --git a/src/sonic-eventd/tests/eventd_ut.cpp b/src/sonic-eventd/tests/eventd_ut.cpp index 729563fcd39d..a499bb67a95e 100644 --- a/src/sonic-eventd/tests/eventd_ut.cpp +++ b/src/sonic-eventd/tests/eventd_ut.cpp @@ -150,9 +150,8 @@ static const test_data_t ldata[] = { }, }; - void run_cap(void *zctx, bool &term, string &read_source, - int &cnt, bool &should_read_control) + int &cnt) { void *mock_cap = zmq_socket (zctx, ZMQ_SUB); string source; @@ -165,11 +164,10 @@ void run_cap(void *zctx, bool &term, string &read_source, EXPECT_EQ(0, zmq_setsockopt(mock_cap, ZMQ_SUBSCRIBE, "", 0)); EXPECT_EQ(0, zmq_setsockopt(mock_cap, ZMQ_RCVTIMEO, &block_ms, sizeof (block_ms))); - if(should_read_control) { - zmq_msg_t msg; - zmq_msg_init(&msg); - EXPECT_NE(1, zmq_msg_recv(&msg, mock_cap, 0)); // Subscription message should be read by do_capture - } + zmq_msg_t msg; + zmq_msg_init(&msg); + int rc = zmq_msg_recv(&msg, mock_cap, 0); + EXPECT_EQ(1, rc); // read control character while(!term) { string source; @@ -228,7 +226,6 @@ void run_pub(void *mock_pub, const string wr_source, internal_events_lst_t &lst) TEST(eventd, proxy) { printf("Proxy TEST started\n"); - bool should_read_control = false; bool term_sub = false; bool term_cap = false; string rd_csource, rd_source, wr_source("hello"); @@ -246,7 +243,7 @@ TEST(eventd, proxy) EXPECT_EQ(0, pxy->init()); /* capture in a thread */ - thread thrc(&run_cap, zctx, ref(term_cap), ref(rd_csource), ref(rd_cevts_sz), ref(should_read_control)); + thread thrc(&run_cap, zctx, ref(term_cap), ref(rd_csource), ref(rd_cevts_sz)); /* subscriber in a thread */ thread thr(&run_sub, zctx, ref(term_sub), ref(rd_source), ref(rd_evts), ref(rd_evts_sz)); @@ -283,17 +280,9 @@ TEST(eventd, proxy) zmq_close(mock_pub); - /* Do control test */ - - should_read_control = true; - - /* capture in a thread */ - thread thrcc(&run_cap, zctx, ref(term_cap), ref(rd_csource), ref(rd_cevts_sz), ref(should_read_control)); - delete pxy; pxy = NULL; - thrcc.join(); zmq_ctx_term(zctx); /* Provide time for async proxy removal to complete */ diff --git a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py index 8db49bf327f5..c2a9f0c142ad 100755 --- a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py +++ b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py @@ -1486,7 +1486,7 @@ def listen(self): """Start listen Redis keyspace events and will trigger corresponding handlers when content of a table changes. """ self.pubsub = self.get_redis_client(self.db_name).pubsub() - self.sub_thread = threading.Thread(target=self.listen_thread, args=(0.01,)) + self.sub_thread = threading.Thread(target=self.listen_thread, args=(10,)) self.sub_thread.start() def stop_listen(self): @@ -1718,6 +1718,7 @@ class BGPConfigDaemon: DEFAULT_VRF = 'default' global_key_map = [('router_id', '{no:no-prefix}bgp router-id {}'), + ('srv6_locator', '{no:no-prefix}srv6-locator {}'), (['load_balance_mp_relax', '+as_path_mp_as_set'], '{no:no-prefix}bgp bestpath as-path multipath-relax {:mp-as-set}', ['true', 'false']), ('always_compare_med', '{no:no-prefix}bgp always-compare-med', ['true', 'false']), ('external_compare_router_id', '{no:no-prefix}bgp bestpath compare-routerid', ['true', 'false']), @@ -1759,6 +1760,16 @@ class BGPConfigDaemon: global_af_key_map = [(['ebgp_route_distance', 'ibgp_route_distance', 'local_route_distance'], '{no:no-prefix}distance bgp {} {} {}'), + ('rd_vpn_export', '{no:no-prefix}rd vpn export {}'), + ('rt_vpn_export', '{no:no-prefix}rt vpn export {}'), + ('rt_vpn_import', '{no:no-prefix}rt vpn import {}'), + ('rt_vpn_both', '{no:no-prefix}rt vpn both {}'), + ('export_vpn', '{no:no-prefix}export vpn', ['true','false']), + ('import_vpn', '{no:no-prefix}import vpn', ['true','false']), + ('redistribute_connected', '{no:no-prefix}redistribute connected', ['true','false']), + ('redistribute_static_rmap', '{no:no-prefix}redistribute static route-map {}'), + ('rmap_vpn_export', '{no:no-prefix}route-map vpn export {}'), + ('rmap_vpn_import', '{no:no-prefix}route-map vpn import {}'), ('max_ebgp_paths', '{no:no-prefix}maximum-paths {}'), (['max_ibgp_paths', '+ibgp_equal_cluster_length'], '{no:no-prefix}maximum-paths ibgp {} {:match-clust-len}', hdl_ibgp_maxpath), diff --git a/src/sonic-frr-mgmt-framework/templates/frr/frr.conf.j2 b/src/sonic-frr-mgmt-framework/templates/frr/frr.conf.j2 index f1f015a6e7a6..391e5d581cec 100644 --- a/src/sonic-frr-mgmt-framework/templates/frr/frr.conf.j2 +++ b/src/sonic-frr-mgmt-framework/templates/frr/frr.conf.j2 @@ -10,6 +10,9 @@ ! agentx ! +ï¼Add fpm address for zebra +fpm address 127.0.0.1 +ï¼ {% include "zebra/zebra.interfaces.conf.j2" %} ! {% if MGMT_VRF_CONFIG %} diff --git a/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch b/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch new file mode 100644 index 000000000000..0bebd1ea12ba --- /dev/null +++ b/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch @@ -0,0 +1,174 @@ +From 7c711ff437985b23a4dd919a98b22b8ea14ef553 Mon Sep 17 00:00:00 2001 +From: Rajasekar Raja +Date: Mon, 12 Feb 2024 10:44:18 -0800 +Subject: [PATCH 02/11] zebra: backpressure - Zebra push back on Buffer/Stream + creation + +Currently, the way zebra works is it creates pthread per client (BGP is +of interest in this case) and this thread loops itself in zserv_read() +to check for any incoming data. If there is one, then it reads, +validates and adds it in the ibuf_fifo signalling the main thread to +process the message. The main thread when it gets a change, processes +the message, and invokes the function pointer registered in the header +command. (Ex: zserv_handlers). + +Finally, if all of this was successful, this task reschedules itself and +loops in zserv_read() again + +However, if there are already items on ibuf FIFO, that means zebra is +slow in processing. And with the current mechanism if Zebra main is +busy, the ibuf FIFO keeps growing holding up the memory. + +Show memory zebra:(Example: 15k streams hoarding ~160 MB of data) +--- qmem libfrr --- +Stream : 44 variable 3432352 15042 161243800 + +Fix: +Client IO Thread: (zserv_read) + - Stop doing the read events when we know there are X number of items + on the FIFO already.(X - zebra zapi-packets <1-10000> (Default-1000) + + - Determine the number of items on the zserv->ibuf_fifo. Subtract this + from the work items and only pull the number of items off that would + take us to X items on the ibuf_fifo again. + + - If the number of items in the ibuf_fifo has reached to the maximum + * Either initially when zserv_read() is called (or) + * when processing the remainders of the incoming buffer + the client IO thread is woken by the the zebra main. + +Main thread: (zserv_process_message) +If the client ibuf always schedules a wakeup to the client IO to read +more items from the socked buffer. This way we ensure + - Client IO thread always tries to read the socket buffer and add more + items to the ibuf_fifo (until max limit) + - hidden config change (zebra zapi-packets <>) is taken into account + +Ticket: #3390099 + +Signed-off-by: Donald Sharp +Signed-off-by: Rajasekar Raja + +diff --git a/zebra/zserv.c b/zebra/zserv.c +index 2024f34534..de6e404fc4 100644 +--- a/zebra/zserv.c ++++ b/zebra/zserv.c +@@ -318,6 +318,14 @@ zwrite_fail: + * this task reschedules itself. + * + * Any failure in any of these actions is handled by terminating the client. ++ * ++ * The client's input buffer ibuf_fifo can have a maximum items as configured ++ * in the packets_to_process. This way we are not filling up the FIFO more ++ * than the maximum when the zebra main is busy. If the fifo has space, we ++ * reschedule ourselves to read more. ++ * ++ * The main thread processes the items in ibuf_fifo and always signals the ++ * client IO thread. + */ + static void zserv_read(struct thread *thread) + { +@@ -325,15 +333,25 @@ static void zserv_read(struct thread *thread) + int sock; + size_t already; + struct stream_fifo *cache; +- uint32_t p2p_orig; +- +- uint32_t p2p; ++ uint32_t p2p; /* Temp p2p used to process */ ++ uint32_t p2p_orig; /* Configured p2p (Default-1000) */ ++ int p2p_avail; /* How much space is available for p2p */ + struct zmsghdr hdr; ++ size_t client_ibuf_fifo_cnt = stream_fifo_count_safe(client->ibuf_fifo); + + p2p_orig = atomic_load_explicit(&zrouter.packets_to_process, + memory_order_relaxed); ++ p2p_avail = p2p_orig - client_ibuf_fifo_cnt; ++ ++ /* ++ * Do nothing if ibuf_fifo count has reached its max limit. Otherwise ++ * proceed and reschedule ourselves if there is space in the ibuf_fifo. ++ */ ++ if (p2p_avail <= 0) ++ return; ++ ++ p2p = p2p_avail; + cache = stream_fifo_new(); +- p2p = p2p_orig; + sock = THREAD_FD(thread); + + while (p2p) { +@@ -433,7 +451,7 @@ static void zserv_read(struct thread *thread) + p2p--; + } + +- if (p2p < p2p_orig) { ++ if (p2p < (uint32_t)p2p_avail) { + uint64_t time_now = monotime(NULL); + + /* update session statistics */ +@@ -447,19 +465,23 @@ static void zserv_read(struct thread *thread) + while (cache->head) + stream_fifo_push(client->ibuf_fifo, + stream_fifo_pop(cache)); ++ /* Need to update count as main thread could have processed few */ ++ client_ibuf_fifo_cnt = ++ stream_fifo_count_safe(client->ibuf_fifo); + } + + /* Schedule job to process those packets */ + zserv_event(client, ZSERV_PROCESS_MESSAGES); +- + } + + if (IS_ZEBRA_DEBUG_PACKET) +- zlog_debug("Read %d packets from client: %s", p2p_orig - p2p, +- zebra_route_string(client->proto)); ++ zlog_debug("Read %d packets from client: %s. Current ibuf fifo count: %zu. Conf P2p %d", ++ p2p_avail - p2p, zebra_route_string(client->proto), ++ client_ibuf_fifo_cnt, p2p_orig); + +- /* Reschedule ourselves */ +- zserv_client_event(client, ZSERV_CLIENT_READ); ++ /* Reschedule ourselves since we have space in ibuf_fifo */ ++ if (client_ibuf_fifo_cnt < p2p_orig) ++ zserv_client_event(client, ZSERV_CLIENT_READ); + + stream_fifo_free(cache); + +@@ -495,14 +517,20 @@ static void zserv_client_event(struct zserv *client, + * as the task argument. + * + * Each message is popped off the client's input queue and the action associated +- * with the message is executed. This proceeds until there are no more messages, +- * an error occurs, or the processing limit is reached. ++ * with the message is executed. This proceeds until an error occurs, or the ++ * processing limit is reached. + * + * The client's I/O thread can push at most zrouter.packets_to_process messages + * onto the input buffer before notifying us there are packets to read. As long + * as we always process zrouter.packets_to_process messages here, then we can + * rely on the read thread to handle queuing this task enough times to process + * everything on the input queue. ++ * ++ * If the client ibuf always schedules a wakeup to the client IO to read more ++ * items from the socked buffer. This way we ensure ++ * - Client IO thread always tries to read the socket buffer and add more ++ * items to the ibuf_fifo (until max limit) ++ * - the hidden config change (zebra zapi-packets <>) is taken into account. + */ + static void zserv_process_messages(struct thread *thread) + { +@@ -538,6 +566,9 @@ static void zserv_process_messages(struct thread *thread) + /* Reschedule ourselves if necessary */ + if (need_resched) + zserv_event(client, ZSERV_PROCESS_MESSAGES); ++ ++ /* Ensure to include the read socket in the select/poll/etc.. */ ++ zserv_client_event(client, ZSERV_CLIENT_READ); + } + + int zserv_send_message(struct zserv *client, struct stream *msg) +-- +2.17.1 + diff --git a/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch b/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch new file mode 100644 index 000000000000..21a2b90f44f4 --- /dev/null +++ b/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch @@ -0,0 +1,90 @@ +From 7796ce2bb6eb1650ae1bec41ab2f270807b33c62 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Thu, 25 Jan 2024 12:53:24 -0500 +Subject: [PATCH 03/11] bgpd: backpressure - Add a typesafe list for Zebra + Announcement + +Modify the bgp master to hold a type safe list for bgp_dests that need +to be passed to zebra. + +Future commits will use this. + +Ticket: #3390099 + +Signed-off-by: Donald Sharp +Signed-off-by: Rajasekar Raja + +diff --git a/bgpd/bgp_main.c b/bgpd/bgp_main.c +index 90ae580bab..e28dde5d16 100644 +--- a/bgpd/bgp_main.c ++++ b/bgpd/bgp_main.c +@@ -214,6 +214,8 @@ static __attribute__((__noreturn__)) void bgp_exit(int status) + bgp_evpn_mh_finish(); + bgp_l3nhg_finish(); + ++ zebra_announce_fini(&bm->zebra_announce_head); ++ + /* reverse bgp_dump_init */ + bgp_dump_finish(); + +diff --git a/bgpd/bgp_table.h b/bgpd/bgp_table.h +index 121afc481f..d43bf86eb9 100644 +--- a/bgpd/bgp_table.h ++++ b/bgpd/bgp_table.h +@@ -101,6 +101,8 @@ struct bgp_node { + + STAILQ_ENTRY(bgp_dest) pq; + ++ struct zebra_announce_item zai; ++ + uint64_t version; + + mpls_label_t local_label; +@@ -121,6 +123,8 @@ struct bgp_node { + enum bgp_path_selection_reason reason; + }; + ++DECLARE_LIST(zebra_announce, struct bgp_dest, zai); ++ + extern void bgp_delete_listnode(struct bgp_dest *dest); + /* + * bgp_table_iter_t +diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c +index 023047050b..392423e028 100644 +--- a/bgpd/bgpd.c ++++ b/bgpd/bgpd.c +@@ -8017,6 +8017,8 @@ void bgp_master_init(struct thread_master *master, const int buffer_size, + memset(&bgp_master, 0, sizeof(bgp_master)); + + bm = &bgp_master; ++ ++ zebra_announce_init(&bm->zebra_announce_head); + bm->bgp = list_new(); + bm->listen_sockets = list_new(); + bm->port = BGP_PORT_DEFAULT; +diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h +index 72b5b50fb4..55f53bf9d3 100644 +--- a/bgpd/bgpd.h ++++ b/bgpd/bgpd.h +@@ -32,6 +32,8 @@ + #include "srv6.h" + #include "iana_afi.h" + ++PREDECL_LIST(zebra_announce); ++ + /* For union sockunion. */ + #include "queue.h" + #include "sockunion.h" +@@ -180,6 +182,9 @@ struct bgp_master { + uint32_t inq_limit; + uint32_t outq_limit; + ++ /* To preserve ordering of installations into zebra across all Vrfs */ ++ struct zebra_announce_head zebra_announce_head; ++ + QOBJ_FIELDS; + }; + DECLARE_QOBJ_TYPE(bgp_master); +-- +2.17.1 + diff --git a/src/sonic-frr/patch/0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch b/src/sonic-frr/patch/0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch new file mode 100644 index 000000000000..bfefccceff10 --- /dev/null +++ b/src/sonic-frr/patch/0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch @@ -0,0 +1,158 @@ +From 69e38aa82f325129ebad4535be5d834c599b5c0b Mon Sep 17 00:00:00 2001 +From: Philippe Guibert +Date: Wed, 7 Feb 2024 22:34:34 +0100 +Subject: [PATCH 04/11] bgpd: fix flushing ipv6 flowspec entries when peering + stops + +When a BGP flowspec peering stops, the BGP RIB entries for IPv6 +flowspec entries are removed, but not the ZEBRA RIB IPv6 entries. + +Actually, when calling bgp_zebra_withdraw() function call, only +the AFI_IP parameter is passed to the bgp_pbr_update_entry() function +in charge of the Flowspec add/delete in zebra. Fix this by passing +the AFI parameter to the bgp_zebra_withdraw() function. + +Note that using topotest does not show up the problem as the +flowspec driver code is not present and was refused. Without that, +routes are not installed, and can not be uninstalled. + +Fixes: 529efa234655 ("bgpd: allow flowspec entries to be announced to zebra") +Link: https://github.com/FRRouting/frr/pull/2025 + +Signed-off-by: Philippe Guibert + +diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c +index fbff57634a..455cd6cdbb 100644 +--- a/bgpd/bgp_route.c ++++ b/bgpd/bgp_route.c +@@ -3312,7 +3312,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, + */ + if (old_select && + is_route_parent_evpn(old_select)) +- bgp_zebra_withdraw(p, old_select, bgp, safi); ++ bgp_zebra_withdraw(p, old_select, bgp, afi, ++ safi); + + bgp_zebra_announce(dest, p, new_select, bgp, afi, safi); + } else { +@@ -3322,7 +3323,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, + || old_select->sub_type == BGP_ROUTE_AGGREGATE + || old_select->sub_type == BGP_ROUTE_IMPORTED)) + +- bgp_zebra_withdraw(p, old_select, bgp, safi); ++ bgp_zebra_withdraw(p, old_select, bgp, afi, ++ safi); + } + } + +@@ -4201,7 +4203,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, + if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) { + if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)) + /* remove from RIB previous entry */ +- bgp_zebra_withdraw(p, pi, bgp, safi); ++ bgp_zebra_withdraw(p, pi, bgp, afi, safi); + } + + if (peer->sort == BGP_PEER_EBGP) { +@@ -5841,7 +5843,7 @@ bool bgp_inbound_policy_exists(struct peer *peer, struct bgp_filter *filter) + } + + static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table, +- safi_t safi) ++ afi_t afi, safi_t safi) + { + struct bgp_dest *dest; + struct bgp_path_info *pi; +@@ -5865,7 +5867,8 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table, + || pi->sub_type == BGP_ROUTE_IMPORTED)) { + + if (bgp_fibupd_safi(safi)) +- bgp_zebra_withdraw(p, pi, bgp, safi); ++ bgp_zebra_withdraw(p, pi, bgp, afi, ++ safi); + } + + bgp_path_info_reap(dest, pi); +@@ -5882,7 +5885,7 @@ void bgp_cleanup_routes(struct bgp *bgp) + for (afi = AFI_IP; afi < AFI_MAX; ++afi) { + if (afi == AFI_L2VPN) + continue; +- bgp_cleanup_table(bgp, bgp->rib[afi][SAFI_UNICAST], ++ bgp_cleanup_table(bgp, bgp->rib[afi][SAFI_UNICAST], afi, + SAFI_UNICAST); + /* + * VPN and ENCAP and EVPN tables are two-level (RD is top level) +@@ -5894,7 +5897,7 @@ void bgp_cleanup_routes(struct bgp *bgp) + dest = bgp_route_next(dest)) { + table = bgp_dest_get_bgp_table_info(dest); + if (table != NULL) { +- bgp_cleanup_table(bgp, table, safi); ++ bgp_cleanup_table(bgp, table, afi, safi); + bgp_table_finish(&table); + bgp_dest_set_bgp_table_info(dest, NULL); + bgp_dest_unlock_node(dest); +@@ -5905,7 +5908,7 @@ void bgp_cleanup_routes(struct bgp *bgp) + dest = bgp_route_next(dest)) { + table = bgp_dest_get_bgp_table_info(dest); + if (table != NULL) { +- bgp_cleanup_table(bgp, table, safi); ++ bgp_cleanup_table(bgp, table, afi, safi); + bgp_table_finish(&table); + bgp_dest_set_bgp_table_info(dest, NULL); + bgp_dest_unlock_node(dest); +@@ -5917,7 +5920,7 @@ void bgp_cleanup_routes(struct bgp *bgp) + dest = bgp_route_next(dest)) { + table = bgp_dest_get_bgp_table_info(dest); + if (table != NULL) { +- bgp_cleanup_table(bgp, table, SAFI_EVPN); ++ bgp_cleanup_table(bgp, table, afi, SAFI_EVPN); + bgp_table_finish(&table); + bgp_dest_set_bgp_table_info(dest, NULL); + bgp_dest_unlock_node(dest); +diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c +index ff79746b4c..69240a3b83 100644 +--- a/bgpd/bgp_zebra.c ++++ b/bgpd/bgp_zebra.c +@@ -1761,7 +1761,7 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, + } + + void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info, +- struct bgp *bgp, safi_t safi) ++ struct bgp *bgp, afi_t afi, safi_t safi) + { + struct zapi_route api; + struct peer *peer; +@@ -1780,7 +1780,7 @@ void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info, + + if (safi == SAFI_FLOWSPEC) { + peer = info->peer; +- bgp_pbr_update_entry(peer->bgp, p, info, AFI_IP, safi, false); ++ bgp_pbr_update_entry(peer->bgp, p, info, afi, safi, false); + return; + } + +@@ -1821,7 +1821,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa + if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) + && (pi->type == ZEBRA_ROUTE_BGP)) + bgp_zebra_withdraw(bgp_dest_get_prefix(dest), +- pi, bgp, safi); ++ pi, bgp, afi, safi); + } + } + } +diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h +index 0a41069411..a5fe8d7ace 100644 +--- a/bgpd/bgp_zebra.h ++++ b/bgpd/bgp_zebra.h +@@ -49,7 +49,7 @@ extern void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, + extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi); + extern void bgp_zebra_withdraw(const struct prefix *p, + struct bgp_path_info *path, struct bgp *bgp, +- safi_t safi); ++ afi_t afi, safi_t safi); + + /* Announce routes of any bgp subtype of a table to zebra */ + extern void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, +-- +2.17.1 + diff --git a/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch b/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch new file mode 100644 index 000000000000..16383dc95caa --- /dev/null +++ b/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch @@ -0,0 +1,234 @@ +From 679ad9ee5f3c15570d697506183d37aa29f6ebf2 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Thu, 25 Jan 2024 13:07:37 -0500 +Subject: [PATCH 05/11] bgpd: backpressure - cleanup bgp_zebra_XX func args + +Since installing/withdrawing routes into zebra is going to be changed +around to be dest based in a list, + - Retrieve the afi/safi to use based upon the dest's afi/safi + instead of passing it in. + - Prefix is known by the dest. Remove this arg as well + +Ticket: #3390099 + +Signed-off-by: Donald Sharp +Signed-off-by: Rajasekar Raja + +diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c +index 455cd6cdbb..d19f27110e 100644 +--- a/bgpd/bgp_route.c ++++ b/bgpd/bgp_route.c +@@ -3214,8 +3214,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, + || new_select->sub_type + == BGP_ROUTE_IMPORTED)) + +- bgp_zebra_announce(dest, p, old_select, +- bgp, afi, safi); ++ bgp_zebra_announce(dest, old_select, ++ bgp); + } + } + +@@ -3312,10 +3312,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, + */ + if (old_select && + is_route_parent_evpn(old_select)) +- bgp_zebra_withdraw(p, old_select, bgp, afi, +- safi); ++ bgp_zebra_withdraw(dest, old_select, bgp); + +- bgp_zebra_announce(dest, p, new_select, bgp, afi, safi); ++ bgp_zebra_announce(dest, new_select, bgp); + } else { + /* Withdraw the route from the kernel. */ + if (old_select && old_select->type == ZEBRA_ROUTE_BGP +@@ -3323,8 +3322,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, + || old_select->sub_type == BGP_ROUTE_AGGREGATE + || old_select->sub_type == BGP_ROUTE_IMPORTED)) + +- bgp_zebra_withdraw(p, old_select, bgp, afi, +- safi); ++ bgp_zebra_withdraw(dest, old_select, bgp); + } + } + +@@ -4203,7 +4201,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, + if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) { + if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)) + /* remove from RIB previous entry */ +- bgp_zebra_withdraw(p, pi, bgp, afi, safi); ++ bgp_zebra_withdraw(dest, pi, bgp); + } + + if (peer->sort == BGP_PEER_EBGP) { +@@ -5867,8 +5865,7 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table, + || pi->sub_type == BGP_ROUTE_IMPORTED)) { + + if (bgp_fibupd_safi(safi)) +- bgp_zebra_withdraw(p, pi, bgp, afi, +- safi); ++ bgp_zebra_withdraw(dest, pi, bgp); + } + + bgp_path_info_reap(dest, pi); +diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c +index 69240a3b83..920df835a4 100644 +--- a/bgpd/bgp_zebra.c ++++ b/bgpd/bgp_zebra.c +@@ -1292,9 +1292,8 @@ static bool bgp_zebra_use_nhop_weighted(struct bgp *bgp, struct attr *attr, + return true; + } + +-void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, +- struct bgp_path_info *info, struct bgp *bgp, afi_t afi, +- safi_t safi) ++void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info, ++ struct bgp *bgp) + { + struct zapi_route api = { 0 }; + struct zapi_nexthop *api_nh; +@@ -1321,6 +1320,8 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, + uint32_t ttl = 0; + uint32_t bos = 0; + uint32_t exp = 0; ++ struct bgp_table *table = bgp_dest_table(dest); ++ const struct prefix *p = bgp_dest_get_prefix(dest); + + /* + * BGP is installing this route and bgp has been configured +@@ -1339,9 +1340,9 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, + if (bgp->main_zebra_update_hold) + return; + +- if (safi == SAFI_FLOWSPEC) { +- bgp_pbr_update_entry(bgp, bgp_dest_get_prefix(dest), info, afi, +- safi, true); ++ if (table->safi == SAFI_FLOWSPEC) { ++ bgp_pbr_update_entry(bgp, p, info, table->afi, table->safi, ++ true); + return; + } + +@@ -1354,7 +1355,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, + /* Make Zebra API structure. */ + api.vrf_id = bgp->vrf_id; + api.type = ZEBRA_ROUTE_BGP; +- api.safi = safi; ++ api.safi = table->safi; + api.prefix = *p; + SET_FLAG(api.message, ZAPI_MESSAGE_NEXTHOP); + +@@ -1458,12 +1459,13 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, + } + } + +- if (bgp->table_map[afi][safi].name) { ++ if (bgp->table_map[table->afi][table->safi].name) { + /* Copy info and attributes, so the route-map + apply doesn't modify the BGP route info. */ + local_attr = *mpinfo->attr; + mpinfo_cp->attr = &local_attr; +- if (!bgp_table_map_apply(bgp->table_map[afi][safi].map, ++ if (!bgp_table_map_apply(bgp->table_map[table->afi] ++ [table->safi].map, + p, mpinfo_cp)) + continue; + +@@ -1619,7 +1621,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, + api.tag = tag; + } + +- distance = bgp_distance_apply(p, info, afi, safi, bgp); ++ distance = bgp_distance_apply(p, info, table->afi, table->safi, bgp); + if (distance) { + SET_FLAG(api.message, ZAPI_MESSAGE_DISTANCE); + api.distance = distance; +@@ -1731,9 +1733,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi) + && (pi->sub_type == BGP_ROUTE_NORMAL + || pi->sub_type == BGP_ROUTE_IMPORTED))) + +- bgp_zebra_announce(dest, +- bgp_dest_get_prefix(dest), +- pi, bgp, afi, safi); ++ bgp_zebra_announce(dest, pi, bgp); + } + + /* Announce routes of any bgp subtype of a table to zebra */ +@@ -1755,16 +1755,16 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, + for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) + if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) && + pi->type == ZEBRA_ROUTE_BGP) +- bgp_zebra_announce(dest, +- bgp_dest_get_prefix(dest), +- pi, bgp, afi, safi); ++ bgp_zebra_announce(dest, pi, bgp); + } + +-void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info, +- struct bgp *bgp, afi_t afi, safi_t safi) ++void bgp_zebra_withdraw(struct bgp_dest *dest, struct bgp_path_info *info, ++ struct bgp *bgp) + { + struct zapi_route api; + struct peer *peer; ++ struct bgp_table *table = bgp_dest_table(dest); ++ const struct prefix *p = bgp_dest_get_prefix(dest); + + /* + * If we are withdrawing the route, we don't need to have this +@@ -1778,16 +1778,17 @@ void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info, + if (!bgp_install_info_to_zebra(bgp)) + return; + +- if (safi == SAFI_FLOWSPEC) { ++ if (table->safi == SAFI_FLOWSPEC) { + peer = info->peer; +- bgp_pbr_update_entry(peer->bgp, p, info, afi, safi, false); ++ bgp_pbr_update_entry(peer->bgp, p, info, table->afi, ++ table->safi, false); + return; + } + + memset(&api, 0, sizeof(api)); + api.vrf_id = bgp->vrf_id; + api.type = ZEBRA_ROUTE_BGP; +- api.safi = safi; ++ api.safi = table->safi; + api.prefix = *p; + + if (info->attr->rmap_table_id) { +@@ -1820,8 +1821,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa + for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) { + if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) + && (pi->type == ZEBRA_ROUTE_BGP)) +- bgp_zebra_withdraw(bgp_dest_get_prefix(dest), +- pi, bgp, afi, safi); ++ bgp_zebra_withdraw(dest, pi, bgp); + } + } + } +diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h +index a5fe8d7ace..b77e423f8f 100644 +--- a/bgpd/bgp_zebra.h ++++ b/bgpd/bgp_zebra.h +@@ -43,13 +43,11 @@ extern void bgp_zebra_destroy(void); + extern int bgp_zebra_get_table_range(uint32_t chunk_size, + uint32_t *start, uint32_t *end); + extern int bgp_if_update_all(void); +-extern void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p, +- struct bgp_path_info *path, struct bgp *bgp, +- afi_t afi, safi_t safi); ++extern void bgp_zebra_announce(struct bgp_dest *dest, ++ struct bgp_path_info *path, struct bgp *bgp); + extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi); +-extern void bgp_zebra_withdraw(const struct prefix *p, +- struct bgp_path_info *path, struct bgp *bgp, +- afi_t afi, safi_t safi); ++extern void bgp_zebra_withdraw(struct bgp_dest *dest, ++ struct bgp_path_info *path, struct bgp *bgp); + + /* Announce routes of any bgp subtype of a table to zebra */ + extern void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, +-- +2.17.1 + diff --git a/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch b/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch new file mode 100644 index 000000000000..724cf1297a59 --- /dev/null +++ b/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch @@ -0,0 +1,512 @@ +From 6d5604a9315801e9380c11357d663ad6537ed8ab Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Fri, 26 Jan 2024 14:48:53 -0500 +Subject: [PATCH 06/11] bgpd : backpressure - Handle BGP-Zebra Install evt + Creation + +BGP is now keeping a list of dests with the dest having a pointer +to the bgp_path_info that it will be working on. + +1) When bgp receives a prefix, process it, add the bgp_dest of the +prefix into the new Fifo list if not present, update the flags (Ex: +earlier if the prefix was advertised and now it is a withdrawn), +increment the ref_count and DO NOT advertise the install/withdraw +to zebra yet. + +2) Schedule an event to wake up to invoke the new function which will +walk the list one by one and installs/withdraws the routes into zebra. + a) if BUFFER_EMPTY, process the next item on the list + b) if BUFFER_PENDING, bail out and the callback in + zclient_flush_data() will invoke the same function when BUFFER_EMPTY + +Changes + - rename old bgp_zebra_announce to bgp_zebra_announce_actual + - rename old bgp_zebra_withdrw to bgp_zebra_withdraw_actual + - Handle new fifo list cleanup in bgp_exit() + - New funcs: bgp_handle_route_announcements_to_zebra() and + bgp_zebra_route_install() + - Define a callback function to invoke + bgp_handle_route_announcements_to_zebra() when BUFFER_EMPTY in + zclient_flush_data() + +The current change deals with bgp installing routes via +bgp_process_main_one() + +Ticket: #3390099 + +Signed-off-by: Donald Sharp +Signed-off-by: Rajasekar Raja + +diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c +index d19f27110e..c29442d96c 100644 +--- a/bgpd/bgp_route.c ++++ b/bgpd/bgp_route.c +@@ -3214,8 +3214,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, + || new_select->sub_type + == BGP_ROUTE_IMPORTED)) + +- bgp_zebra_announce(dest, old_select, +- bgp); ++ bgp_zebra_route_install( ++ dest, old_select, bgp, true); + } + } + +@@ -3312,9 +3312,10 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, + */ + if (old_select && + is_route_parent_evpn(old_select)) +- bgp_zebra_withdraw(dest, old_select, bgp); ++ bgp_zebra_route_install(dest, old_select, bgp, ++ false); + +- bgp_zebra_announce(dest, new_select, bgp); ++ bgp_zebra_route_install(dest, new_select, bgp, true); + } else { + /* Withdraw the route from the kernel. */ + if (old_select && old_select->type == ZEBRA_ROUTE_BGP +@@ -3322,7 +3323,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, + || old_select->sub_type == BGP_ROUTE_AGGREGATE + || old_select->sub_type == BGP_ROUTE_IMPORTED)) + +- bgp_zebra_withdraw(dest, old_select, bgp); ++ bgp_zebra_route_install(dest, old_select, bgp, ++ false); + } + } + +@@ -4201,7 +4203,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, + if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) { + if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)) + /* remove from RIB previous entry */ +- bgp_zebra_withdraw(dest, pi, bgp); ++ bgp_zebra_route_install(dest, pi, bgp, false); + } + + if (peer->sort == BGP_PEER_EBGP) { +@@ -5865,7 +5867,8 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table, + || pi->sub_type == BGP_ROUTE_IMPORTED)) { + + if (bgp_fibupd_safi(safi)) +- bgp_zebra_withdraw(dest, pi, bgp); ++ bgp_zebra_withdraw_actual(dest, pi, ++ bgp); + } + + bgp_path_info_reap(dest, pi); +diff --git a/bgpd/bgp_table.h b/bgpd/bgp_table.h +index d43bf86eb9..45d61f8dfd 100644 +--- a/bgpd/bgp_table.h ++++ b/bgpd/bgp_table.h +@@ -102,6 +102,7 @@ struct bgp_node { + STAILQ_ENTRY(bgp_dest) pq; + + struct zebra_announce_item zai; ++ struct bgp_path_info *za_bgp_pi; + + uint64_t version; + +@@ -117,6 +118,8 @@ struct bgp_node { + #define BGP_NODE_FIB_INSTALLED (1 << 6) + #define BGP_NODE_LABEL_REQUESTED (1 << 7) + #define BGP_NODE_SOFT_RECONFIG (1 << 8) ++#define BGP_NODE_SCHEDULE_FOR_INSTALL (1 << 10) ++#define BGP_NODE_SCHEDULE_FOR_DELETE (1 << 11) + + struct bgp_addpath_node_data tx_addpath; + +diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c +index 920df835a4..1162941ef1 100644 +--- a/bgpd/bgp_zebra.c ++++ b/bgpd/bgp_zebra.c +@@ -1292,8 +1292,9 @@ static bool bgp_zebra_use_nhop_weighted(struct bgp *bgp, struct attr *attr, + return true; + } + +-void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info, +- struct bgp *bgp) ++static enum zclient_send_status ++bgp_zebra_announce_actual(struct bgp_dest *dest, struct bgp_path_info *info, ++ struct bgp *bgp) + { + struct zapi_route api = { 0 }; + struct zapi_nexthop *api_nh; +@@ -1323,27 +1324,10 @@ void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info, + struct bgp_table *table = bgp_dest_table(dest); + const struct prefix *p = bgp_dest_get_prefix(dest); + +- /* +- * BGP is installing this route and bgp has been configured +- * to suppress announcements until the route has been installed +- * let's set the fact that we expect this route to be installed +- */ +- if (BGP_SUPPRESS_FIB_ENABLED(bgp)) +- SET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING); +- +- /* Don't try to install if we're not connected to Zebra or Zebra doesn't +- * know of this instance. +- */ +- if (!bgp_install_info_to_zebra(bgp)) +- return; +- +- if (bgp->main_zebra_update_hold) +- return; +- + if (table->safi == SAFI_FLOWSPEC) { + bgp_pbr_update_entry(bgp, p, info, table->afi, table->safi, + true); +- return; ++ return ZCLIENT_SEND_SUCCESS; + } + + /* +@@ -1704,10 +1688,11 @@ void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info, + zlog_debug("%s: %pFX: announcing to zebra (recursion %sset)", + __func__, p, (recursion_flag ? "" : "NOT ")); + } +- zclient_route_send(is_add ? ZEBRA_ROUTE_ADD : ZEBRA_ROUTE_DELETE, +- zclient, &api); ++ return zclient_route_send(is_add ? ZEBRA_ROUTE_ADD : ZEBRA_ROUTE_DELETE, ++ zclient, &api); + } + ++ + /* Announce all routes of a table to zebra */ + void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi) + { +@@ -1733,7 +1718,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi) + && (pi->sub_type == BGP_ROUTE_NORMAL + || pi->sub_type == BGP_ROUTE_IMPORTED))) + +- bgp_zebra_announce(dest, pi, bgp); ++ bgp_zebra_route_install(dest, pi, bgp, true); + } + + /* Announce routes of any bgp subtype of a table to zebra */ +@@ -1755,34 +1740,23 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, + for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) + if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) && + pi->type == ZEBRA_ROUTE_BGP) +- bgp_zebra_announce(dest, pi, bgp); ++ bgp_zebra_route_install(dest, pi, bgp, true); + } + +-void bgp_zebra_withdraw(struct bgp_dest *dest, struct bgp_path_info *info, +- struct bgp *bgp) ++enum zclient_send_status bgp_zebra_withdraw_actual(struct bgp_dest *dest, ++ struct bgp_path_info *info, ++ struct bgp *bgp) + { + struct zapi_route api; + struct peer *peer; + struct bgp_table *table = bgp_dest_table(dest); + const struct prefix *p = bgp_dest_get_prefix(dest); + +- /* +- * If we are withdrawing the route, we don't need to have this +- * flag set. So unset it. +- */ +- UNSET_FLAG(info->net->flags, BGP_NODE_FIB_INSTALL_PENDING); +- +- /* Don't try to install if we're not connected to Zebra or Zebra doesn't +- * know of this instance. +- */ +- if (!bgp_install_info_to_zebra(bgp)) +- return; +- + if (table->safi == SAFI_FLOWSPEC) { + peer = info->peer; + bgp_pbr_update_entry(peer->bgp, p, info, table->afi, + table->safi, false); +- return; ++ return ZCLIENT_SEND_SUCCESS; + } + + memset(&api, 0, sizeof(api)); +@@ -1800,7 +1774,172 @@ void bgp_zebra_withdraw(struct bgp_dest *dest, struct bgp_path_info *info, + zlog_debug("Tx route delete VRF %u %pFX", bgp->vrf_id, + &api.prefix); + +- zclient_route_send(ZEBRA_ROUTE_DELETE, zclient, &api); ++ return zclient_route_send(ZEBRA_ROUTE_DELETE, zclient, &api); ++} ++ ++/* ++ * Walk the new Fifo list one by one and invoke bgp_zebra_announce/withdraw ++ * to install/withdraw the routes to zebra. ++ * ++ * If status = ZCLIENT_SEND_SUCCESS (Buffer empt)y i.e. Zebra is free to ++ * receive more incoming data, then pick the next item on the list and ++ * continue processing. ++ * ++ * If status = ZCLIENT_SEND_BUFFERED (Buffer pending) i.e. Zebra is busy, ++ * break and bail out of the function because once at some point when zebra ++ * is free, a callback is triggered which inturn call this same function and ++ * continue processing items on list. ++ */ ++#define ZEBRA_ANNOUNCEMENTS_LIMIT 1000 ++static void bgp_handle_route_announcements_to_zebra(struct thread *e) ++{ ++ uint32_t count = 0; ++ struct bgp_dest *dest = NULL; ++ struct bgp_table *table = NULL; ++ enum zclient_send_status status = ZCLIENT_SEND_SUCCESS; ++ bool install; ++ ++ while (count < ZEBRA_ANNOUNCEMENTS_LIMIT) { ++ dest = zebra_announce_pop(&bm->zebra_announce_head); ++ ++ if (!dest) ++ break; ++ ++ table = bgp_dest_table(dest); ++ install = ++ CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL); ++ ++ if (BGP_DEBUG(zebra, ZEBRA)) ++ zlog_debug( ++ "BGP %s route %pBD(%s) with dest %p and flags 0x%x to zebra", ++ install ? "announcing" : "withdrawing", dest, ++ table->bgp->name_pretty, dest, dest->flags); ++ ++ if (install) { ++ status = bgp_zebra_announce_actual( ++ dest, dest->za_bgp_pi, table->bgp); ++ UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL); ++ } else { ++ status = bgp_zebra_withdraw_actual( ++ dest, dest->za_bgp_pi, table->bgp); ++ UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE); ++ } ++ ++ bgp_path_info_unlock(dest->za_bgp_pi); ++ dest->za_bgp_pi = NULL; ++ bgp_dest_unlock_node(dest); ++ ++ if (status == ZCLIENT_SEND_BUFFERED) ++ break; ++ ++ count++; ++ } ++ ++ if (status != ZCLIENT_SEND_BUFFERED && ++ zebra_announce_count(&bm->zebra_announce_head)) ++ thread_add_event(bm->master, ++ bgp_handle_route_announcements_to_zebra, NULL, ++ 0, &bm->t_bgp_zebra_route); ++} ++ ++/* ++ * Callback function invoked when zclient_flush_data() receives a BUFFER_EMPTY ++ * i.e. zebra is free to receive more incoming data. ++ */ ++static void bgp_zebra_buffer_write_ready(void) ++{ ++ bgp_handle_route_announcements_to_zebra(NULL); ++} ++ ++/* ++ * BGP is now keeping a list of dests with the dest having a pointer ++ * to the bgp_path_info that it will be working on. ++ * Here is the sequence of events that should happen: ++ * ++ * Current State New State Action ++ * ------------- --------- ------ ++ * ---- Install Place dest on list, save pi, mark ++ * as going to be installed ++ * ---- Withdrawal Place dest on list, save pi, mark ++ * as going to be deleted ++ * ++ * Install Install Leave dest on list, release old pi, ++ * save new pi, mark as going to be ++ * Installed ++ * Install Withdrawal Leave dest on list, release old pi, ++ * save new pi, mark as going to be ++ * withdrawan, remove install flag ++ * ++ * Withdrawal Install Special case, send withdrawal immediately ++ * Leave dest on list, release old pi, ++ * save new pi, mark as going to be ++ * installed. ++ * Withdrawal Withdrawal Leave dest on list, release old pi, ++ * save new pi, mark as going to be ++ * withdrawn. ++ */ ++void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, ++ struct bgp *bgp, bool install) ++{ ++ /* ++ * BGP is installing this route and bgp has been configured ++ * to suppress announcements until the route has been installed ++ * let's set the fact that we expect this route to be installed ++ */ ++ if (install) { ++ if (BGP_SUPPRESS_FIB_ENABLED(bgp)) ++ SET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING); ++ ++ if (bgp->main_zebra_update_hold) ++ return; ++ } else { ++ UNSET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING); ++ } ++ ++ /* ++ * Don't try to install if we're not connected to Zebra or Zebra doesn't ++ * know of this instance. ++ */ ++ if (!bgp_install_info_to_zebra(bgp)) ++ return; ++ ++ if (!CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL) && ++ !CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE)) { ++ zebra_announce_add_tail(&bm->zebra_announce_head, dest); ++ /* ++ * If neither flag is set and za_bgp_pi is not set then it is a ++ * bug ++ */ ++ assert(!dest->za_bgp_pi); ++ bgp_path_info_lock(info); ++ bgp_dest_lock_node(dest); ++ dest->za_bgp_pi = info; ++ } else if (CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL)) { ++ assert(dest->za_bgp_pi); ++ bgp_path_info_unlock(dest->za_bgp_pi); ++ bgp_path_info_lock(info); ++ dest->za_bgp_pi = info; ++ } else if (CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE)) { ++ assert(dest->za_bgp_pi); ++ if (install) ++ bgp_zebra_withdraw_actual(dest, dest->za_bgp_pi, bgp); ++ ++ bgp_path_info_unlock(dest->za_bgp_pi); ++ bgp_path_info_lock(info); ++ dest->za_bgp_pi = info; ++ } ++ ++ if (install) { ++ UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE); ++ SET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL); ++ } else { ++ UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL); ++ SET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE); ++ } ++ ++ thread_add_event(bm->master, bgp_handle_route_announcements_to_zebra, ++ NULL, 0, &bm->t_bgp_zebra_route); + } + + /* Withdraw all entries in a BGP instances RIB table from Zebra */ +@@ -1821,7 +1960,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa + for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) { + if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) + && (pi->type == ZEBRA_ROUTE_BGP)) +- bgp_zebra_withdraw(dest, pi, bgp); ++ bgp_zebra_route_install(dest, pi, bgp, false); + } + } + } +@@ -3470,6 +3609,7 @@ void bgp_zebra_init(struct thread_master *master, unsigned short instance) + zclient = zclient_new(master, &zclient_options_default, bgp_handlers, + array_size(bgp_handlers)); + zclient_init(zclient, ZEBRA_ROUTE_BGP, 0, &bgpd_privs); ++ zclient->zebra_buffer_write_ready = bgp_zebra_buffer_write_ready; + zclient->zebra_connected = bgp_zebra_connected; + zclient->instance = instance; + } +diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h +index b77e423f8f..45fcf7f514 100644 +--- a/bgpd/bgp_zebra.h ++++ b/bgpd/bgp_zebra.h +@@ -43,11 +43,10 @@ extern void bgp_zebra_destroy(void); + extern int bgp_zebra_get_table_range(uint32_t chunk_size, + uint32_t *start, uint32_t *end); + extern int bgp_if_update_all(void); +-extern void bgp_zebra_announce(struct bgp_dest *dest, +- struct bgp_path_info *path, struct bgp *bgp); ++extern void bgp_zebra_route_install(struct bgp_dest *dest, ++ struct bgp_path_info *path, struct bgp *bgp, ++ bool install); + extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi); +-extern void bgp_zebra_withdraw(struct bgp_dest *dest, +- struct bgp_path_info *path, struct bgp *bgp); + + /* Announce routes of any bgp subtype of a table to zebra */ + extern void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, +@@ -131,4 +130,7 @@ extern int bgp_zebra_update(afi_t afi, safi_t safi, vrf_id_t vrf_id, int type); + extern int bgp_zebra_stale_timer_update(struct bgp *bgp); + extern int bgp_zebra_srv6_manager_get_locator_chunk(const char *name); + extern int bgp_zebra_srv6_manager_release_locator_chunk(const char *name); ++extern enum zclient_send_status ++bgp_zebra_withdraw_actual(struct bgp_dest *dest, struct bgp_path_info *info, ++ struct bgp *bgp); + #endif /* _QUAGGA_BGP_ZEBRA_H */ +diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c +index 392423e028..da133d71c1 100644 +--- a/bgpd/bgpd.c ++++ b/bgpd/bgpd.c +@@ -3688,10 +3688,20 @@ int bgp_delete(struct bgp *bgp) + afi_t afi; + safi_t safi; + int i; ++ struct bgp_dest *dest = NULL; + struct graceful_restart_info *gr_info; + + assert(bgp); + ++ while (zebra_announce_count(&bm->zebra_announce_head)) { ++ dest = zebra_announce_pop(&bm->zebra_announce_head); ++ if (dest->za_bgp_pi->peer->bgp == bgp) { ++ bgp_path_info_unlock(dest->za_bgp_pi); ++ bgp_dest_unlock_node(dest); ++ } else ++ zebra_announce_add_tail(&bm->zebra_announce_head, dest); ++ } ++ + bgp_soft_reconfig_table_task_cancel(bgp, NULL, NULL); + + /* make sure we withdraw any exported routes */ +@@ -8035,6 +8045,7 @@ void bgp_master_init(struct thread_master *master, const int buffer_size, + bm->tcp_dscp = IPTOS_PREC_INTERNETCONTROL; + bm->inq_limit = BM_DEFAULT_Q_LIMIT; + bm->outq_limit = BM_DEFAULT_Q_LIMIT; ++ bm->t_bgp_zebra_route = NULL; + + bgp_mac_init(); + /* init the rd id space. +@@ -8278,6 +8289,7 @@ void bgp_terminate(void) + list_delete(&bm->listen_sockets); + + THREAD_OFF(bm->t_rmap_update); ++ THREAD_OFF(bm->t_bgp_zebra_route); + + bgp_mac_finish(); + } +diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h +index 55f53bf9d3..bdf31f5161 100644 +--- a/bgpd/bgpd.h ++++ b/bgpd/bgpd.h +@@ -182,6 +182,8 @@ struct bgp_master { + uint32_t inq_limit; + uint32_t outq_limit; + ++ struct thread *t_bgp_zebra_route; ++ + /* To preserve ordering of installations into zebra across all Vrfs */ + struct zebra_announce_head zebra_announce_head; + +diff --git a/lib/zclient.c b/lib/zclient.c +index 0082b21485..c48c1c6ee4 100644 +--- a/lib/zclient.c ++++ b/lib/zclient.c +@@ -285,6 +285,7 @@ static void zclient_flush_data(struct thread *thread) + zclient->sock, &zclient->t_write); + break; + case BUFFER_EMPTY: ++ /* Currently only Sharpd and Bgpd has callbacks defined */ + if (zclient->zebra_buffer_write_ready) + (*zclient->zebra_buffer_write_ready)(); + break; +-- +2.17.1 + diff --git a/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch b/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch new file mode 100644 index 000000000000..e83526b6e8ef --- /dev/null +++ b/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch @@ -0,0 +1,995 @@ +From 84f7778808b7fee771f26c3cae46292ef85f06c0 Mon Sep 17 00:00:00 2001 +From: Rajasekar Raja +Date: Thu, 15 Feb 2024 11:23:51 -0800 +Subject: [PATCH 07/11] bgpd : backpressure - Handle BGP-Zebra(EPVN) Install + evt Creation + +Current changes deals with EVPN routes installation to zebra. + +In evpn_route_select_install() we invoke evpn_zebra_install/uninstall +which sends zclient_send_message(). + +This is a continuation of code changes (similar to +ccfe452763d16c432fa81fd20e805bec819b345e) but to handle evpn part +of the code. + +Ticket: #3390099 + +Signed-off-by: Rajasekar Raja + +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index 2b2cfa0f4c..622fd6afd2 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -863,11 +863,10 @@ struct bgp_dest *bgp_evpn_vni_node_lookup(const struct bgpevpn *vpn, + /* + * Add (update) or delete MACIP from zebra. + */ +-static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn, +- const struct prefix_evpn *p, +- const struct ethaddr *mac, +- struct in_addr remote_vtep_ip, int add, +- uint8_t flags, uint32_t seq, esi_t *esi) ++static enum zclient_send_status bgp_zebra_send_remote_macip( ++ struct bgp *bgp, struct bgpevpn *vpn, const struct prefix_evpn *p, ++ const struct ethaddr *mac, struct in_addr remote_vtep_ip, int add, ++ uint8_t flags, uint32_t seq, esi_t *esi) + { + struct stream *s; + uint16_t ipa_len; +@@ -875,8 +874,12 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn, + bool esi_valid; + + /* Check socket. */ +- if (!zclient || zclient->sock < 0) +- return 0; ++ if (!zclient || zclient->sock < 0) { ++ if (BGP_DEBUG(zebra, ZEBRA)) ++ zlog_debug("%s: No zclient or zclient->sock exists", ++ __func__); ++ return ZCLIENT_SEND_SUCCESS; ++ } + + /* Don't try to register if Zebra doesn't know of this instance. */ + if (!IS_BGP_INST_KNOWN_TO_ZEBRA(bgp)) { +@@ -884,7 +887,7 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn, + zlog_debug( + "%s: No zebra instance to talk to, not installing remote macip", + __func__); +- return 0; ++ return ZCLIENT_SEND_SUCCESS; + } + + if (!esi) +@@ -956,15 +959,20 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn, + /* + * Add (update) or delete remote VTEP from zebra. + */ +-static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn, +- const struct prefix_evpn *p, +- int flood_control, int add) ++static enum zclient_send_status ++bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn, ++ const struct prefix_evpn *p, int flood_control, ++ int add) + { + struct stream *s; + + /* Check socket. */ +- if (!zclient || zclient->sock < 0) +- return 0; ++ if (!zclient || zclient->sock < 0) { ++ if (BGP_DEBUG(zebra, ZEBRA)) ++ zlog_debug("%s: No zclient or zclient->sock exists", ++ __func__); ++ return ZCLIENT_SEND_SUCCESS; ++ } + + /* Don't try to register if Zebra doesn't know of this instance. */ + if (!IS_BGP_INST_KNOWN_TO_ZEBRA(bgp)) { +@@ -972,7 +980,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn, + zlog_debug( + "%s: No zebra instance to talk to, not installing remote vtep", + __func__); +- return 0; ++ return ZCLIENT_SEND_SUCCESS; + } + + s = zclient->obuf; +@@ -989,7 +997,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn, + EC_BGP_VTEP_INVALID, + "Bad remote IP when trying to %s remote VTEP for VNI %u", + add ? "ADD" : "DEL", vpn->vni); +- return -1; ++ return ZCLIENT_SEND_FAILURE; + } + stream_putl(s, flood_control); + +@@ -1222,14 +1230,15 @@ static void add_mac_mobility_to_attr(uint32_t seq_num, struct attr *attr) + } + + /* Install EVPN route into zebra. */ +-static int evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn, +- const struct prefix_evpn *p, +- struct bgp_path_info *pi) ++enum zclient_send_status evpn_zebra_install(struct bgp *bgp, ++ struct bgpevpn *vpn, ++ const struct prefix_evpn *p, ++ struct bgp_path_info *pi) + { +- int ret; + uint8_t flags; + int flood_control; + uint32_t seq; ++ enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; + + if (p->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE) { + flags = 0; +@@ -1302,6 +1311,7 @@ static int evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn, + flood_control = VXLAN_FLOOD_DISABLED; + break; + } ++ + ret = bgp_zebra_send_remote_vtep(bgp, vpn, p, flood_control, 1); + } + +@@ -1309,11 +1319,13 @@ static int evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn, + } + + /* Uninstall EVPN route from zebra. */ +-static int evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn, +- const struct prefix_evpn *p, +- struct bgp_path_info *pi, bool is_sync) ++enum zclient_send_status evpn_zebra_uninstall(struct bgp *bgp, ++ struct bgpevpn *vpn, ++ const struct prefix_evpn *p, ++ struct bgp_path_info *pi, ++ bool is_sync) + { +- int ret; ++ enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; + + if (p->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE) + ret = bgp_zebra_send_remote_macip( +@@ -1328,7 +1340,7 @@ static int evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn, + ret = bgp_evpn_remote_es_evi_del(bgp, vpn, p); + else + ret = bgp_zebra_send_remote_vtep(bgp, vpn, p, +- VXLAN_FLOOD_DISABLED, 0); ++ VXLAN_FLOOD_DISABLED, 0); + + return ret; + } +@@ -1419,12 +1431,18 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, + && !CHECK_FLAG(dest->flags, BGP_NODE_USER_CLEAR) + && !CHECK_FLAG(old_select->flags, BGP_PATH_ATTR_CHANGED) + && !bgp_addpath_is_addpath_used(&bgp->tx_addpath, afi, safi)) { +- if (bgp_zebra_has_route_changed(old_select)) +- ret = evpn_zebra_install( +- bgp, vpn, +- (const struct prefix_evpn *)bgp_dest_get_prefix( +- dest), +- old_select); ++ if (bgp_zebra_has_route_changed(old_select)) { ++ if (CHECK_FLAG(bgp->flags, BGP_FLAG_DELETE_IN_PROGRESS)) ++ evpn_zebra_install( ++ bgp, vpn, ++ (const struct prefix_evpn *) ++ bgp_dest_get_prefix(dest), ++ old_select); ++ else ++ bgp_zebra_route_install(dest, old_select, bgp, ++ true, vpn, false); ++ } ++ + UNSET_FLAG(old_select->flags, BGP_PATH_MULTIPATH_CHG); + UNSET_FLAG(old_select->flags, BGP_PATH_LINK_BW_CHG); + bgp_zebra_clear_route_change_flags(dest); +@@ -1456,10 +1474,14 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, + if (new_select && new_select->type == ZEBRA_ROUTE_BGP + && (new_select->sub_type == BGP_ROUTE_IMPORTED || + bgp_evpn_attr_is_sync(new_select->attr))) { +- ret = evpn_zebra_install( +- bgp, vpn, +- (struct prefix_evpn *)bgp_dest_get_prefix(dest), +- new_select); ++ if (CHECK_FLAG(bgp->flags, BGP_FLAG_DELETE_IN_PROGRESS)) ++ evpn_zebra_install(bgp, vpn, ++ (const struct prefix_evpn *) ++ bgp_dest_get_prefix(dest), ++ new_select); ++ else ++ bgp_zebra_route_install(dest, new_select, bgp, true, ++ vpn, false); + + /* If an old best existed and it was a "local" route, the only + * reason +@@ -1476,13 +1498,20 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, + evpn_delete_old_local_route(bgp, vpn, dest, + old_select, new_select); + } else { +- if (old_select && old_select->type == ZEBRA_ROUTE_BGP +- && old_select->sub_type == BGP_ROUTE_IMPORTED) +- ret = evpn_zebra_uninstall( +- bgp, vpn, +- (const struct prefix_evpn *)bgp_dest_get_prefix( +- dest), +- old_select, false); ++ if (old_select && old_select->type == ZEBRA_ROUTE_BGP && ++ old_select->sub_type == BGP_ROUTE_IMPORTED) { ++ if (CHECK_FLAG(bgp->flags, ++ BGP_FLAG_DELETE_IN_PROGRESS) || ++ CHECK_FLAG(bgp->flags, BGP_FLAG_VNI_DOWN)) ++ evpn_zebra_uninstall( ++ bgp, vpn, ++ (const struct prefix_evpn *) ++ bgp_dest_get_prefix(dest), ++ old_select, false); ++ else ++ bgp_zebra_route_install(dest, old_select, bgp, ++ false, vpn, false); ++ } + } + + /* Clear any route change flags. */ +@@ -2012,9 +2041,19 @@ static void evpn_zebra_reinstall_best_route(struct bgp *bgp, + if (curr_select && curr_select->type == ZEBRA_ROUTE_BGP + && (curr_select->sub_type == BGP_ROUTE_IMPORTED || + bgp_evpn_attr_is_sync(curr_select->attr))) +- evpn_zebra_install(bgp, vpn, +- (const struct prefix_evpn *)bgp_dest_get_prefix(dest), +- curr_select); ++ if (curr_select && curr_select->type == ZEBRA_ROUTE_BGP && ++ (curr_select->sub_type == BGP_ROUTE_IMPORTED || ++ bgp_evpn_attr_is_sync(curr_select->attr))) { ++ if (CHECK_FLAG(bgp->flags, BGP_FLAG_DELETE_IN_PROGRESS)) ++ evpn_zebra_install( ++ bgp, vpn, ++ (const struct prefix_evpn *) ++ bgp_dest_get_prefix(dest), ++ curr_select); ++ else ++ bgp_zebra_route_install(dest, curr_select, bgp, ++ true, vpn, false); ++ } + } + + /* +@@ -2189,8 +2228,16 @@ static int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn, + * has been removed. + */ + new_is_sync = bgp_evpn_attr_is_sync(pi->attr); +- if (!new_is_sync && old_is_sync) +- evpn_zebra_uninstall(bgp, vpn, p, pi, true); ++ if (!new_is_sync && old_is_sync) { ++ if (CHECK_FLAG(bgp->flags, ++ BGP_FLAG_DELETE_IN_PROGRESS)) ++ evpn_zebra_uninstall(bgp, vpn, p, pi, ++ true); ++ else ++ bgp_zebra_route_install(dest, pi, bgp, ++ false, vpn, ++ true); ++ } + } + } + bgp_path_info_unlock(pi); +@@ -2444,8 +2491,16 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn, + * has been removed. + */ + new_is_sync = bgp_evpn_attr_is_sync(pi->attr); +- if (!new_is_sync && old_is_sync) +- evpn_zebra_uninstall(bgp, vpn, &evp, pi, true); ++ if (!new_is_sync && old_is_sync) { ++ if (CHECK_FLAG(bgp->flags, ++ BGP_FLAG_DELETE_IN_PROGRESS)) ++ (void)evpn_zebra_uninstall( ++ bgp, vpn, &evp, pi, true); ++ else ++ bgp_zebra_route_install(dest, pi, bgp, ++ false, vpn, ++ true); ++ } + } + } + +@@ -2701,7 +2756,22 @@ static int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + delete_all_type2_routes(bgp, vpn); + + build_evpn_type3_prefix(&p, vpn->originator_ip); ++ ++ /* ++ * To handle the following scenario: ++ * - Say, the new zebra announce fifo list has few vni Evpn prefixes ++ * yet to be sent to zebra. ++ * - At this point if we have triggers like "no advertise-all-vni" or ++ * "networking restart", where a vni is going down. ++ * ++ * Perform the below ++ * 1) send withdraw routes to zebra immediately in case it is ++ * installed. 2) before we blow up the vni table, we need to walk the ++ * list and pop all the dest whose za_vpn points to this vni. ++ */ ++ SET_FLAG(bgp->flags, BGP_FLAG_VNI_DOWN); + ret = delete_evpn_route(bgp, vpn, &p); ++ UNSET_FLAG(bgp->flags, BGP_FLAG_VNI_DOWN); + if (ret) + return ret; + +@@ -6028,6 +6098,17 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni, + */ + void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn) + { ++ struct bgp_dest *dest = NULL; ++ ++ while (zebra_announce_count(&bm->zebra_announce_head)) { ++ dest = zebra_announce_pop(&bm->zebra_announce_head); ++ if (dest->za_vpn == vpn) { ++ bgp_path_info_unlock(dest->za_bgp_pi); ++ bgp_dest_unlock_node(dest); ++ } else ++ zebra_announce_add_tail(&bm->zebra_announce_head, dest); ++ } ++ + bgp_evpn_remote_ip_hash_destroy(vpn); + bgp_evpn_vni_es_cleanup(vpn); + bgpevpn_unlink_from_l3vni(vpn); +diff --git a/bgpd/bgp_evpn.h b/bgpd/bgp_evpn.h +index 3cbc5af5af..bf1943a2db 100644 +--- a/bgpd/bgp_evpn.h ++++ b/bgpd/bgp_evpn.h +@@ -230,4 +230,12 @@ extern void + bgp_evpn_handle_resolve_overlay_index_unset(struct hash_bucket *bucket, + void *arg); + ++extern enum zclient_send_status evpn_zebra_install(struct bgp *bgp, ++ struct bgpevpn *vpn, ++ const struct prefix_evpn *p, ++ struct bgp_path_info *pi); ++extern enum zclient_send_status ++evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn, ++ const struct prefix_evpn *p, struct bgp_path_info *pi, ++ bool is_sync); + #endif /* _QUAGGA_BGP_EVPN_H */ +diff --git a/bgpd/bgp_evpn_mh.c b/bgpd/bgp_evpn_mh.c +index 552365959d..40687c558d 100644 +--- a/bgpd/bgp_evpn_mh.c ++++ b/bgpd/bgp_evpn_mh.c +@@ -56,13 +56,14 @@ static void bgp_evpn_local_es_down(struct bgp *bgp, + struct bgp_evpn_es *es); + static void bgp_evpn_local_type1_evi_route_del(struct bgp *bgp, + struct bgp_evpn_es *es); +-static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp, ++static struct bgp_evpn_es_vtep * ++bgp_evpn_es_vtep_add(struct bgp *bgp, struct bgp_evpn_es *es, ++ struct in_addr vtep_ip, bool esr, uint8_t df_alg, ++ uint16_t df_pref, int *zret); ++static enum zclient_send_status bgp_evpn_es_vtep_del(struct bgp *bgp, + struct bgp_evpn_es *es, + struct in_addr vtep_ip, +- bool esr, uint8_t df_alg, +- uint16_t df_pref); +-static void bgp_evpn_es_vtep_del(struct bgp *bgp, +- struct bgp_evpn_es *es, struct in_addr vtep_ip, bool esr); ++ bool esr); + static void bgp_evpn_es_cons_checks_pend_add(struct bgp_evpn_es *es); + static void bgp_evpn_es_cons_checks_pend_del(struct bgp_evpn_es *es); + static struct bgp_evpn_es_evi * +@@ -105,6 +106,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp, + struct bgp_dest *dest) + { + int ret = 0; ++ int zret = 0; + afi_t afi = AFI_L2VPN; + safi_t safi = SAFI_EVPN; + struct bgp_path_info *old_select; /* old best */ +@@ -131,7 +133,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp, + bgp_evpn_es_vtep_add(bgp, es, old_select->attr->nexthop, + true /*esr*/, + old_select->attr->df_alg, +- old_select->attr->df_pref); ++ old_select->attr->df_pref, &zret); + } + UNSET_FLAG(old_select->flags, BGP_PATH_MULTIPATH_CHG); + bgp_zebra_clear_route_change_flags(dest); +@@ -160,7 +162,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp, + && new_select->sub_type == BGP_ROUTE_IMPORTED) { + bgp_evpn_es_vtep_add(bgp, es, new_select->attr->nexthop, + true /*esr */, new_select->attr->df_alg, +- new_select->attr->df_pref); ++ new_select->attr->df_pref, &zret); + } else { + if (old_select && old_select->type == ZEBRA_ROUTE_BGP + && old_select->sub_type == BGP_ROUTE_IMPORTED) +@@ -447,7 +449,7 @@ int bgp_evpn_mh_route_update(struct bgp *bgp, struct bgp_evpn_es *es, + &attr->mp_nexthop_global_in); + } + +- /* Return back the route entry. */ ++ /* Return back th*e route entry. */ + *ri = tmp_pi; + return 0; + } +@@ -1366,23 +1368,28 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_find(struct bgp_evpn_es *es, + } + + /* Send the remote ES to zebra for NHG programming */ +-static int bgp_zebra_send_remote_es_vtep(struct bgp *bgp, +- struct bgp_evpn_es_vtep *es_vtep, bool add) ++static enum zclient_send_status ++bgp_zebra_send_remote_es_vtep(struct bgp *bgp, struct bgp_evpn_es_vtep *es_vtep, ++ bool add) + { + struct bgp_evpn_es *es = es_vtep->es; + struct stream *s; + uint32_t flags = 0; + + /* Check socket. */ +- if (!zclient || zclient->sock < 0) +- return 0; ++ if (!zclient || zclient->sock < 0) { ++ if (BGP_DEBUG(zebra, ZEBRA)) ++ zlog_debug("%s: No zclient or zclient->sock exists", ++ __func__); ++ return ZCLIENT_SEND_SUCCESS; ++ } + + /* Don't try to register if Zebra doesn't know of this instance. */ + if (!IS_BGP_INST_KNOWN_TO_ZEBRA(bgp)) { + if (BGP_DEBUG(zebra, ZEBRA)) + zlog_debug("No zebra instance, not installing remote es %s", + es->esi_str); +- return 0; ++ return ZCLIENT_SEND_SUCCESS; + } + + if (es_vtep->flags & BGP_EVPNES_VTEP_ESR) +@@ -1413,12 +1420,12 @@ static int bgp_zebra_send_remote_es_vtep(struct bgp *bgp, + return zclient_send_message(zclient); + } + +-static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp, +- struct bgp_evpn_es_vtep *es_vtep, +- bool param_change) ++static enum zclient_send_status bgp_evpn_es_vtep_re_eval_active( ++ struct bgp *bgp, struct bgp_evpn_es_vtep *es_vtep, bool param_change) + { + bool old_active; + bool new_active; ++ enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; + + old_active = CHECK_FLAG(es_vtep->flags, BGP_EVPNES_VTEP_ACTIVE); + /* currently we need an active EVI reference to use the VTEP as +@@ -1440,7 +1447,7 @@ static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp, + es_vtep->df_alg, es_vtep->df_pref); + + /* send remote ES to zebra */ +- bgp_zebra_send_remote_es_vtep(bgp, es_vtep, new_active); ++ ret = bgp_zebra_send_remote_es_vtep(bgp, es_vtep, new_active); + + /* The NHG is updated first for efficient failover handling. + * Note the NHG can be de-activated while there are bgp +@@ -1452,13 +1459,14 @@ static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp, + /* queue up the es for background consistency checks */ + bgp_evpn_es_cons_checks_pend_add(es_vtep->es); + } ++ ++ return ret; + } + +-static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp, +- struct bgp_evpn_es *es, +- struct in_addr vtep_ip, +- bool esr, uint8_t df_alg, +- uint16_t df_pref) ++static struct bgp_evpn_es_vtep * ++bgp_evpn_es_vtep_add(struct bgp *bgp, struct bgp_evpn_es *es, ++ struct in_addr vtep_ip, bool esr, uint8_t df_alg, ++ uint16_t df_pref, int *zret) + { + struct bgp_evpn_es_vtep *es_vtep; + bool param_change = false; +@@ -1485,15 +1493,17 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp, + ++es_vtep->evi_cnt; + } + +- bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change); ++ *zret = bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change); + + return es_vtep; + } + +-static void bgp_evpn_es_vtep_do_del(struct bgp *bgp, +- struct bgp_evpn_es_vtep *es_vtep, bool esr) ++static enum zclient_send_status ++bgp_evpn_es_vtep_do_del(struct bgp *bgp, struct bgp_evpn_es_vtep *es_vtep, ++ bool esr) + { + bool param_change = false; ++ enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; + + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) + zlog_debug("es %s vtep %pI4 del %s", es_vtep->es->esi_str, +@@ -1510,18 +1520,25 @@ static void bgp_evpn_es_vtep_do_del(struct bgp *bgp, + --es_vtep->evi_cnt; + } + +- bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change); ++ ret = bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change); + bgp_evpn_es_vtep_free(es_vtep); ++ ++ return ret; + } + +-static void bgp_evpn_es_vtep_del(struct bgp *bgp, +- struct bgp_evpn_es *es, struct in_addr vtep_ip, bool esr) ++static enum zclient_send_status bgp_evpn_es_vtep_del(struct bgp *bgp, ++ struct bgp_evpn_es *es, ++ struct in_addr vtep_ip, ++ bool esr) + { + struct bgp_evpn_es_vtep *es_vtep; ++ enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; + + es_vtep = bgp_evpn_es_vtep_find(es, vtep_ip); + if (es_vtep) +- bgp_evpn_es_vtep_do_del(bgp, es_vtep, esr); ++ ret = bgp_evpn_es_vtep_do_del(bgp, es_vtep, esr); ++ ++ return ret; + } + + /********************** ES MAC-IP paths ************************************* +@@ -3382,12 +3399,14 @@ static struct bgp_evpn_es_evi_vtep *bgp_evpn_es_evi_vtep_find( + /* A VTEP can be added as "active" attach to an ES if EAD-per-ES and + * EAD-per-EVI routes are rxed from it. + */ +-static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp, +- struct bgp_evpn_es_evi_vtep *evi_vtep) ++static enum zclient_send_status ++bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp, ++ struct bgp_evpn_es_evi_vtep *evi_vtep) + { + bool old_active; + bool new_active; + uint32_t ead_activity_flags; ++ enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; + + old_active = CHECK_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_ACTIVE); + +@@ -3408,7 +3427,7 @@ static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp, + new_active = CHECK_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_ACTIVE); + + if (old_active == new_active) +- return; ++ return ret; + + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) + zlog_debug("es %s evi %u vtep %pI4 %s", +@@ -3417,24 +3436,26 @@ static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp, + new_active ? "active" : "inactive"); + + /* add VTEP to parent es */ +- if (new_active) ++ if (new_active) { + evi_vtep->es_vtep = bgp_evpn_es_vtep_add( + bgp, evi_vtep->es_evi->es, evi_vtep->vtep_ip, +- false /*esr*/, 0, 0); +- else { ++ false /*esr*/, 0, 0, &ret); ++ } else { + if (evi_vtep->es_vtep) { +- bgp_evpn_es_vtep_do_del(bgp, evi_vtep->es_vtep, +- false /*esr*/); ++ ret = bgp_evpn_es_vtep_do_del(bgp, evi_vtep->es_vtep, ++ false /*esr*/); + evi_vtep->es_vtep = NULL; + } + } + /* queue up the parent es for background consistency checks */ + bgp_evpn_es_cons_checks_pend_add(evi_vtep->es_evi->es); ++ ++ return ret; + } + +-static void bgp_evpn_es_evi_vtep_add(struct bgp *bgp, +- struct bgp_evpn_es_evi *es_evi, struct in_addr vtep_ip, +- bool ead_es) ++static enum zclient_send_status ++bgp_evpn_es_evi_vtep_add(struct bgp *bgp, struct bgp_evpn_es_evi *es_evi, ++ struct in_addr vtep_ip, bool ead_es) + { + struct bgp_evpn_es_evi_vtep *evi_vtep; + +@@ -3454,18 +3475,19 @@ static void bgp_evpn_es_evi_vtep_add(struct bgp *bgp, + else + SET_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_EAD_PER_EVI); + +- bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep); ++ return bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep); + } + +-static void bgp_evpn_es_evi_vtep_del(struct bgp *bgp, +- struct bgp_evpn_es_evi *es_evi, struct in_addr vtep_ip, +- bool ead_es) ++static enum zclient_send_status ++bgp_evpn_es_evi_vtep_del(struct bgp *bgp, struct bgp_evpn_es_evi *es_evi, ++ struct in_addr vtep_ip, bool ead_es) + { + struct bgp_evpn_es_evi_vtep *evi_vtep; ++ enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; + + evi_vtep = bgp_evpn_es_evi_vtep_find(es_evi, vtep_ip); + if (!evi_vtep) +- return; ++ return ret; + + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) + zlog_debug("del es %s evi %u vtep %pI4 %s", +@@ -3478,8 +3500,10 @@ static void bgp_evpn_es_evi_vtep_del(struct bgp *bgp, + else + UNSET_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_EAD_PER_EVI); + +- bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep); ++ ret = bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep); + bgp_evpn_es_evi_vtep_free(evi_vtep); ++ ++ return ret; + } + + /* compare ES-IDs for the ES-EVI RB tree maintained per-VNI */ +@@ -3755,18 +3779,20 @@ int bgp_evpn_local_es_evi_add(struct bgp *bgp, esi_t *esi, vni_t vni) + /* Add remote ES-EVI entry. This is actually the remote VTEP add and the + * ES-EVI is implicity created on first VTEP's reference. + */ +-int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn, +- const struct prefix_evpn *p) ++enum zclient_send_status bgp_evpn_remote_es_evi_add(struct bgp *bgp, ++ struct bgpevpn *vpn, ++ const struct prefix_evpn *p) + { + char buf[ESI_STR_LEN]; + struct bgp_evpn_es *es; + struct bgp_evpn_es_evi *es_evi; + bool ead_es; + const esi_t *esi = &p->prefix.ead_addr.esi; ++ enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; + + if (!vpn) + /* local EAD-ES need not be sent back to zebra */ +- return 0; ++ return ret; + + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) + zlog_debug("add remote %s es %s evi %u vtep %pI4", +@@ -3783,27 +3809,29 @@ int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn, + es_evi = bgp_evpn_es_evi_new(es, vpn); + + ead_es = !!p->prefix.ead_addr.eth_tag; +- bgp_evpn_es_evi_vtep_add(bgp, es_evi, p->prefix.ead_addr.ip.ipaddr_v4, +- ead_es); ++ ret = bgp_evpn_es_evi_vtep_add(bgp, es_evi, ++ p->prefix.ead_addr.ip.ipaddr_v4, ead_es); + + bgp_evpn_es_evi_remote_info_re_eval(es_evi); +- return 0; ++ return ret; + } + + /* A remote VTEP has withdrawn. The es-evi-vtep will be deleted and the + * parent es-evi freed up implicitly in last VTEP's deref. + */ +-int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn, +- const struct prefix_evpn *p) ++enum zclient_send_status bgp_evpn_remote_es_evi_del(struct bgp *bgp, ++ struct bgpevpn *vpn, ++ const struct prefix_evpn *p) + { + char buf[ESI_STR_LEN]; + struct bgp_evpn_es *es; + struct bgp_evpn_es_evi *es_evi; + bool ead_es; ++ enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; + + if (!vpn) + /* local EAD-ES need not be sent back to zebra */ +- return 0; ++ return ret; + + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) + zlog_debug( +@@ -3822,7 +3850,7 @@ int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn, + esi_to_str(&p->prefix.ead_addr.esi, buf, + sizeof(buf)), + vpn->vni, &p->prefix.ead_addr.ip.ipaddr_v4); +- return 0; ++ return ret; + } + es_evi = bgp_evpn_es_evi_find(es, vpn); + if (!es_evi) { +@@ -3835,14 +3863,15 @@ int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn, + sizeof(buf)), + vpn->vni, + &p->prefix.ead_addr.ip.ipaddr_v4); +- return 0; ++ return ret; + } + + ead_es = !!p->prefix.ead_addr.eth_tag; +- bgp_evpn_es_evi_vtep_del(bgp, es_evi, p->prefix.ead_addr.ip.ipaddr_v4, +- ead_es); ++ ret = bgp_evpn_es_evi_vtep_del(bgp, es_evi, ++ p->prefix.ead_addr.ip.ipaddr_v4, ead_es); + bgp_evpn_es_evi_remote_info_re_eval(es_evi); +- return 0; ++ ++ return ret; + } + + /* If a VNI is being deleted we need to force del all remote VTEPs */ +diff --git a/bgpd/bgp_evpn_mh.h b/bgpd/bgp_evpn_mh.h +index 11030e323f..d6e77e982f 100644 +--- a/bgpd/bgp_evpn_mh.h ++++ b/bgpd/bgp_evpn_mh.h +@@ -434,10 +434,12 @@ extern int bgp_evpn_local_es_add(struct bgp *bgp, esi_t *esi, + extern int bgp_evpn_local_es_del(struct bgp *bgp, esi_t *esi); + extern int bgp_evpn_local_es_evi_add(struct bgp *bgp, esi_t *esi, vni_t vni); + extern int bgp_evpn_local_es_evi_del(struct bgp *bgp, esi_t *esi, vni_t vni); +-extern int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn, +- const struct prefix_evpn *p); +-extern int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn, +- const struct prefix_evpn *p); ++extern enum zclient_send_status ++bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn, ++ const struct prefix_evpn *p); ++extern enum zclient_send_status ++bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn, ++ const struct prefix_evpn *p); + extern void bgp_evpn_mh_init(void); + extern void bgp_evpn_mh_finish(void); + void bgp_evpn_vni_es_init(struct bgpevpn *vpn); +diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c +index c29442d96c..679abba463 100644 +--- a/bgpd/bgp_route.c ++++ b/bgpd/bgp_route.c +@@ -3213,9 +3213,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, + && (new_select->sub_type == BGP_ROUTE_NORMAL + || new_select->sub_type + == BGP_ROUTE_IMPORTED)) +- + bgp_zebra_route_install( +- dest, old_select, bgp, true); ++ dest, old_select, bgp, true, ++ NULL, false); + } + } + +@@ -3313,9 +3313,10 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, + if (old_select && + is_route_parent_evpn(old_select)) + bgp_zebra_route_install(dest, old_select, bgp, +- false); ++ false, NULL, false); + +- bgp_zebra_route_install(dest, new_select, bgp, true); ++ bgp_zebra_route_install(dest, new_select, bgp, true, ++ NULL, false); + } else { + /* Withdraw the route from the kernel. */ + if (old_select && old_select->type == ZEBRA_ROUTE_BGP +@@ -3324,7 +3325,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, + || old_select->sub_type == BGP_ROUTE_IMPORTED)) + + bgp_zebra_route_install(dest, old_select, bgp, +- false); ++ false, NULL, false); + } + } + +@@ -4203,7 +4204,8 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id, + if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) { + if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)) + /* remove from RIB previous entry */ +- bgp_zebra_route_install(dest, pi, bgp, false); ++ bgp_zebra_route_install(dest, pi, bgp, false, NULL, ++ false); + } + + if (peer->sort == BGP_PEER_EBGP) { +diff --git a/bgpd/bgp_table.h b/bgpd/bgp_table.h +index 45d61f8dfd..9eb681ea3f 100644 +--- a/bgpd/bgp_table.h ++++ b/bgpd/bgp_table.h +@@ -103,6 +103,8 @@ struct bgp_node { + + struct zebra_announce_item zai; + struct bgp_path_info *za_bgp_pi; ++ struct bgpevpn *za_vpn; ++ bool za_is_sync; + + uint64_t version; + +diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c +index 1162941ef1..b81acaf8ec 100644 +--- a/bgpd/bgp_zebra.c ++++ b/bgpd/bgp_zebra.c +@@ -1713,12 +1713,11 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi) + for (dest = bgp_table_top(table); dest; dest = bgp_route_next(dest)) + for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) + if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) && +- +- (pi->type == ZEBRA_ROUTE_BGP +- && (pi->sub_type == BGP_ROUTE_NORMAL +- || pi->sub_type == BGP_ROUTE_IMPORTED))) +- +- bgp_zebra_route_install(dest, pi, bgp, true); ++ (pi->type == ZEBRA_ROUTE_BGP && ++ (pi->sub_type == BGP_ROUTE_NORMAL || ++ pi->sub_type == BGP_ROUTE_IMPORTED))) ++ bgp_zebra_route_install(dest, pi, bgp, true, ++ NULL, false); + } + + /* Announce routes of any bgp subtype of a table to zebra */ +@@ -1740,7 +1739,8 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi, + for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) + if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) && + pi->type == ZEBRA_ROUTE_BGP) +- bgp_zebra_route_install(dest, pi, bgp, true); ++ bgp_zebra_route_install(dest, pi, bgp, true, ++ NULL, false); + } + + enum zclient_send_status bgp_zebra_withdraw_actual(struct bgp_dest *dest, +@@ -1793,6 +1793,7 @@ enum zclient_send_status bgp_zebra_withdraw_actual(struct bgp_dest *dest, + #define ZEBRA_ANNOUNCEMENTS_LIMIT 1000 + static void bgp_handle_route_announcements_to_zebra(struct thread *e) + { ++ bool is_evpn = false; + uint32_t count = 0; + struct bgp_dest *dest = NULL; + struct bgp_table *table = NULL; +@@ -1808,6 +1809,9 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e) + table = bgp_dest_table(dest); + install = + CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL); ++ if (table && table->afi == AFI_L2VPN && ++ table->safi == SAFI_EVPN) ++ is_evpn = true; + + if (BGP_DEBUG(zebra, ZEBRA)) + zlog_debug( +@@ -1816,17 +1820,33 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e) + table->bgp->name_pretty, dest, dest->flags); + + if (install) { +- status = bgp_zebra_announce_actual( +- dest, dest->za_bgp_pi, table->bgp); ++ if (is_evpn) ++ status = evpn_zebra_install( ++ table->bgp, dest->za_vpn, ++ (const struct prefix_evpn *) ++ bgp_dest_get_prefix(dest), ++ dest->za_bgp_pi); ++ else ++ status = bgp_zebra_announce_actual( ++ dest, dest->za_bgp_pi, table->bgp); + UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL); + } else { +- status = bgp_zebra_withdraw_actual( +- dest, dest->za_bgp_pi, table->bgp); ++ if (is_evpn) ++ status = evpn_zebra_uninstall( ++ table->bgp, dest->za_vpn, ++ (const struct prefix_evpn *) ++ bgp_dest_get_prefix(dest), ++ dest->za_bgp_pi, false); ++ else ++ status = bgp_zebra_withdraw_actual( ++ dest, dest->za_bgp_pi, table->bgp); ++ + UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE); + } + + bgp_path_info_unlock(dest->za_bgp_pi); + dest->za_bgp_pi = NULL; ++ dest->za_vpn = NULL; + bgp_dest_unlock_node(dest); + + if (status == ZCLIENT_SEND_BUFFERED) +@@ -1880,8 +1900,16 @@ static void bgp_zebra_buffer_write_ready(void) + * withdrawn. + */ + void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, +- struct bgp *bgp, bool install) ++ struct bgp *bgp, bool install, struct bgpevpn *vpn, ++ bool is_sync) + { ++ bool is_evpn = false; ++ struct bgp_table *table = NULL; ++ ++ table = bgp_dest_table(dest); ++ if (table && table->afi == AFI_L2VPN && table->safi == SAFI_EVPN) ++ is_evpn = true; ++ + /* + * BGP is installing this route and bgp has been configured + * to suppress announcements until the route has been installed +@@ -1891,7 +1919,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, + if (BGP_SUPPRESS_FIB_ENABLED(bgp)) + SET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING); + +- if (bgp->main_zebra_update_hold) ++ if (bgp->main_zebra_update_hold && !is_evpn) + return; + } else { + UNSET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING); +@@ -1901,7 +1929,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, + * Don't try to install if we're not connected to Zebra or Zebra doesn't + * know of this instance. + */ +- if (!bgp_install_info_to_zebra(bgp)) ++ if (!bgp_install_info_to_zebra(bgp) && !is_evpn) + return; + + if (!CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL) && +@@ -1922,7 +1950,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, + dest->za_bgp_pi = info; + } else if (CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE)) { + assert(dest->za_bgp_pi); +- if (install) ++ if (install & !is_evpn) + bgp_zebra_withdraw_actual(dest, dest->za_bgp_pi, bgp); + + bgp_path_info_unlock(dest->za_bgp_pi); +@@ -1930,6 +1958,11 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, + dest->za_bgp_pi = info; + } + ++ if (is_evpn) { ++ dest->za_vpn = vpn; ++ dest->za_is_sync = is_sync; ++ } ++ + if (install) { + UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE); + SET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL); +@@ -1960,7 +1993,8 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa + for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) { + if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) + && (pi->type == ZEBRA_ROUTE_BGP)) +- bgp_zebra_route_install(dest, pi, bgp, false); ++ bgp_zebra_route_install(dest, pi, bgp, false, ++ NULL, false); + } + } + } +diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h +index 45fcf7f514..5186b7454e 100644 +--- a/bgpd/bgp_zebra.h ++++ b/bgpd/bgp_zebra.h +@@ -45,7 +45,8 @@ extern int bgp_zebra_get_table_range(uint32_t chunk_size, + extern int bgp_if_update_all(void); + extern void bgp_zebra_route_install(struct bgp_dest *dest, + struct bgp_path_info *path, struct bgp *bgp, +- bool install); ++ bool install, struct bgpevpn *vpn, ++ bool is_sync); + extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi); + + /* Announce routes of any bgp subtype of a table to zebra */ +diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h +index bdf31f5161..dc660fb8f0 100644 +--- a/bgpd/bgpd.h ++++ b/bgpd/bgpd.h +@@ -512,6 +512,7 @@ struct bgp { + #define BGP_FLAG_HARD_ADMIN_RESET (1ULL << 31) + /* Evaluate the AIGP attribute during the best path selection process */ + #define BGP_FLAG_COMPARE_AIGP (1ULL << 32) ++#define BGP_FLAG_VNI_DOWN (1ULL << 38) + + /* BGP default address-families. + * New peers inherit enabled afi/safis from bgp instance. +-- +2.17.1 + diff --git a/src/sonic-frr/patch/0036-zebra-backpressure-Fix-Null-ptr-access-Coverity-Issu.patch b/src/sonic-frr/patch/0036-zebra-backpressure-Fix-Null-ptr-access-Coverity-Issu.patch new file mode 100644 index 000000000000..a3b1fa5fe0da --- /dev/null +++ b/src/sonic-frr/patch/0036-zebra-backpressure-Fix-Null-ptr-access-Coverity-Issu.patch @@ -0,0 +1,29 @@ +From b6caf88bd3bce9673d49435453991c49712287aa Mon Sep 17 00:00:00 2001 +From: Rajasekar Raja +Date: Thu, 11 Apr 2024 22:27:37 -0700 +Subject: [PATCH 08/11] zebra: backpressure - Fix Null ptr access (Coverity + Issue) + +Fix dereferencing NULL ptr making coverity happy. + +Ticket :#3390099 + +Signed-off-by: Rajasekar Raja + +diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c +index b81acaf8ec..524551b1e0 100644 +--- a/bgpd/bgp_zebra.c ++++ b/bgpd/bgp_zebra.c +@@ -1809,8 +1809,7 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e) + table = bgp_dest_table(dest); + install = + CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL); +- if (table && table->afi == AFI_L2VPN && +- table->safi == SAFI_EVPN) ++ if (table->afi == AFI_L2VPN && table->safi == SAFI_EVPN) + is_evpn = true; + + if (BGP_DEBUG(zebra, ZEBRA)) +-- +2.17.1 + diff --git a/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch b/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch new file mode 100644 index 000000000000..a360a3101599 --- /dev/null +++ b/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch @@ -0,0 +1,116 @@ +From 7166c2222cb82885510c3e8c7906c1d7de950f9b Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Thu, 11 Apr 2024 13:28:30 -0400 +Subject: [PATCH 09/11] bgpd: Increase install/uninstall speed of evpn vpn + vni's + +BGP receives notification from zebra about an vpn that +needs to be installed into the evpn tables. Unfortunately +this function was walking the entirety of evpn tables +3 times. Modify the code to walk the tree 1 time and +to just look for the needed route types as you go. + +This reduces, in a scaled environment, processing +time of the zclient_read function from 130 seconds +to 95 seconds. For a up / down / up interface +scenario. + +Signed-off-by: Rajasekar Raja +Signed-off-by: Donald Sharp + +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index 622fd6afd2..eb5aa9f077 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -3752,9 +3752,7 @@ static int install_uninstall_routes_for_vrf(struct bgp *bgp_vrf, int install) + * particular VNI. + */ + static int install_uninstall_routes_for_vni(struct bgp *bgp, +- struct bgpevpn *vpn, +- bgp_evpn_route_type rtype, +- int install) ++ struct bgpevpn *vpn, int install) + { + afi_t afi; + safi_t safi; +@@ -3785,7 +3783,9 @@ static int install_uninstall_routes_for_vni(struct bgp *bgp, + (const struct prefix_evpn *)bgp_dest_get_prefix( + dest); + +- if (evp->prefix.route_type != rtype) ++ if (evp->prefix.route_type != BGP_EVPN_IMET_ROUTE && ++ evp->prefix.route_type != BGP_EVPN_AD_ROUTE && ++ evp->prefix.route_type != BGP_EVPN_MAC_IP_ROUTE) + continue; + + for (pi = bgp_dest_get_bgp_path_info(dest); pi; +@@ -3812,7 +3812,8 @@ static int install_uninstall_routes_for_vni(struct bgp *bgp, + bgp->vrf_id, + install ? "install" + : "uninstall", +- rtype == BGP_EVPN_MAC_IP_ROUTE ++ evp->prefix.route_type == ++ BGP_EVPN_MAC_IP_ROUTE + ? "MACIP" + : "IMET", + vpn->vni); +@@ -3845,23 +3846,11 @@ static int install_routes_for_vrf(struct bgp *bgp_vrf) + */ + static int install_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + { +- int ret; +- +- /* Install type-3 routes followed by type-2 routes - the ones applicable ++ /* ++ * Install type-3 routes followed by type-2 routes - the ones applicable + * for this VNI. + */ +- ret = install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_IMET_ROUTE, +- 1); +- if (ret) +- return ret; +- +- ret = install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_AD_ROUTE, +- 1); +- if (ret) +- return ret; +- +- return install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_MAC_IP_ROUTE, +- 1); ++ return install_uninstall_routes_for_vni(bgp, vpn, 1); + } + + /* uninstall routes from l3vni vrf. */ +@@ -3877,25 +3866,11 @@ static int uninstall_routes_for_vrf(struct bgp *bgp_vrf) + */ + static int uninstall_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + { +- int ret; +- +- /* Uninstall type-2 routes followed by type-3 routes - the ones +- * applicable +- * for this VNI. ++ /* ++ * Uninstall type-2 routes followed by type-3 routes - the ones ++ * applicable for this VNI. + */ +- ret = install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_MAC_IP_ROUTE, +- 0); +- if (ret) +- return ret; +- +- ret = install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_AD_ROUTE, +- 0); +- if (ret) +- return ret; +- +- +- return install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_IMET_ROUTE, +- 0); ++ return install_uninstall_routes_for_vni(bgp, vpn, 0); + } + + /* +-- +2.17.1 + diff --git a/src/sonic-frr/patch/0038-zebra-Actually-display-I-O-buffer-sizes.patch b/src/sonic-frr/patch/0038-zebra-Actually-display-I-O-buffer-sizes.patch new file mode 100644 index 000000000000..904cb169b840 --- /dev/null +++ b/src/sonic-frr/patch/0038-zebra-Actually-display-I-O-buffer-sizes.patch @@ -0,0 +1,49 @@ +From 72781109e5dadafe55f10d72ae2b3505bf0ccb93 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Mon, 8 Apr 2024 16:24:05 -0400 +Subject: [PATCH 10/11] zebra: Actually display I/O buffer sizes + +An operator found a situation where zebra was +backing up in a significant way towards BGP +with EVPN changes taking up some serious amounts +of memory. The key lines that would have clued +us in on it were behind a dev build. Let's change +this. + +Signed-off-by: Donald Sharp + +diff --git a/lib/stream.h b/lib/stream.h +index a3c148c9c9..7acbbd2dc7 100644 +--- a/lib/stream.h ++++ b/lib/stream.h +@@ -120,9 +120,7 @@ struct stream_fifo { + + /* number of streams in this fifo */ + atomic_size_t count; +-#if defined DEV_BUILD + atomic_size_t max_count; +-#endif + + struct stream *head; + struct stream *tail; +diff --git a/zebra/zserv.c b/zebra/zserv.c +index de6e404fc4..daccfa59d5 100644 +--- a/zebra/zserv.c ++++ b/zebra/zserv.c +@@ -1130,12 +1130,10 @@ static void zebra_show_client_detail(struct vty *vty, struct zserv *client) + vty_out(vty, "ES-EVI %-12u%-12u%-12u\n", + client->local_es_evi_add_cnt, 0, client->local_es_evi_del_cnt); + vty_out(vty, "Errors: %u\n", client->error_cnt); +- +-#if defined DEV_BUILD + vty_out(vty, "Input Fifo: %zu:%zu Output Fifo: %zu:%zu\n", + client->ibuf_fifo->count, client->ibuf_fifo->max_count, + client->obuf_fifo->count, client->obuf_fifo->max_count); +-#endif ++ + vty_out(vty, "\n"); + } + +-- +2.17.1 + diff --git a/src/sonic-frr/patch/0039-zebra-Actually-display-I-O-buffer-sizes-part-2.patch b/src/sonic-frr/patch/0039-zebra-Actually-display-I-O-buffer-sizes-part-2.patch new file mode 100644 index 000000000000..9088bfebbdad --- /dev/null +++ b/src/sonic-frr/patch/0039-zebra-Actually-display-I-O-buffer-sizes-part-2.patch @@ -0,0 +1,49 @@ +From 981bfca72414bfa7a97b6526e4736ea4f6834620 Mon Sep 17 00:00:00 2001 +From: Rajasekar Raja +Date: Mon, 22 Apr 2024 13:50:47 -0400 +Subject: [PATCH] From a88498262d8d88fb3846d1a5c1a373751fe6f381 Mon Sep 17 + 00:00:00 2001 Subject: [PATCH 11/11] zebra: Actually display I/O buffer sizes + (part-2) + +An extension of commit-8d8f12ba8e5cd11c189b8475b05539fa8415ccb9 + +Removing ifdef DEV_BUILD in stream_fifo_push as well to make the 'sh +zebra client' display the current I/O fifo along with max fifo items. + +TICKET :#3390099 + +Signed-off-by: Rajasekar Raja + +diff --git a/lib/stream.c b/lib/stream.c +index 2de3abdf45..3aef70794e 100644 +--- a/lib/stream.c ++++ b/lib/stream.c +@@ -1256,9 +1256,7 @@ void stream_fifo_init(struct stream_fifo *fifo) + /* Add new stream to fifo. */ + void stream_fifo_push(struct stream_fifo *fifo, struct stream *s) + { +-#if defined DEV_BUILD + size_t max, curmax; +-#endif + + if (fifo->tail) + fifo->tail->next = s; +@@ -1267,15 +1265,11 @@ void stream_fifo_push(struct stream_fifo *fifo, struct stream *s) + + fifo->tail = s; + fifo->tail->next = NULL; +-#if !defined DEV_BUILD +- atomic_fetch_add_explicit(&fifo->count, 1, memory_order_release); +-#else + max = atomic_fetch_add_explicit(&fifo->count, 1, memory_order_release); + curmax = atomic_load_explicit(&fifo->max_count, memory_order_relaxed); + if (max > curmax) + atomic_store_explicit(&fifo->max_count, max, + memory_order_relaxed); +-#endif + } + + void stream_fifo_push_safe(struct stream_fifo *fifo, struct stream *s) +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch b/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch new file mode 100644 index 000000000000..b74d86881ae5 --- /dev/null +++ b/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch @@ -0,0 +1,63 @@ +From f3ec35b461a06f1278383d2347dfbc611b6a91a6 Mon Sep 17 00:00:00 2001 +From: Rajasekar Raja +Date: Fri, 17 May 2024 12:36:31 -0700 +Subject: [PATCH] bgpd: backpressure - Fix to withdraw evpn type-5 routes + immediately + +As part of backpressure changes, there is a bug where immediate withdraw +is to be sent for evpn imported type-5 prefix to clear the nh neigh and +RMAC entry. + +Fixing this by sending withdraw immediately to keep it inline with the +code today + +Ticket: #3905571 + +Signed-off-by: Donald Sharp +Signed-off-by: Rajasekar Raja + +diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c +index 679abba463..e28069767f 100644 +--- a/bgpd/bgp_route.c ++++ b/bgpd/bgp_route.c +@@ -3312,8 +3312,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest, + */ + if (old_select && + is_route_parent_evpn(old_select)) +- bgp_zebra_route_install(dest, old_select, bgp, +- false, NULL, false); ++ bgp_zebra_withdraw_actual(dest, old_select, bgp); + + bgp_zebra_route_install(dest, new_select, bgp, true, + NULL, false); +diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c +index 524551b1e0..5d5525156b 100644 +--- a/bgpd/bgp_zebra.c ++++ b/bgpd/bgp_zebra.c +@@ -1889,11 +1889,9 @@ static void bgp_zebra_buffer_write_ready(void) + * save new pi, mark as going to be + * withdrawan, remove install flag + * +- * Withdrawal Install Special case, send withdrawal immediately +- * Leave dest on list, release old pi, ++ * Withdrawal Install Leave dest on list, release old pi, + * save new pi, mark as going to be +- * installed. ++ * installed. + * Withdrawal Withdrawal Leave dest on list, release old pi, + * save new pi, mark as going to be + * withdrawn. +@@ -1949,9 +1947,6 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info, + dest->za_bgp_pi = info; + } else if (CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE)) { + assert(dest->za_bgp_pi); +- if (install & !is_evpn) +- bgp_zebra_withdraw_actual(dest, dest->za_bgp_pi, bgp); +- + bgp_path_info_unlock(dest->za_bgp_pi); + bgp_path_info_lock(info); + dest->za_bgp_pi = info; +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0041-bgpd-backpressure-Fix-to-avoid-CPU-hog.patch b/src/sonic-frr/patch/0041-bgpd-backpressure-Fix-to-avoid-CPU-hog.patch new file mode 100644 index 000000000000..860d928d3247 --- /dev/null +++ b/src/sonic-frr/patch/0041-bgpd-backpressure-Fix-to-avoid-CPU-hog.patch @@ -0,0 +1,53 @@ +From 4775b2b2bf39caa4bc5aed10ef44c6dcf9c7fc80 Mon Sep 17 00:00:00 2001 +From: Rajasekar Raja +Date: Fri, 17 May 2024 15:43:59 -0700 +Subject: [PATCH] bgpd: backpressure - Fix to avoid CPU hog + +In case when bgp_evpn_free or bgp_delete is called and the announce_list +has few items where vpn/bgp does not match, we add the item back to the +list. Because of this the list count is always > 0 thereby hogging CPU or +infinite loop. + +Ticket: #3905624 + +Signed-off-by: Rajasekar Raja + +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index eb5aa9f077..2243ffdc77 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -6074,9 +6074,11 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni, + void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn) + { + struct bgp_dest *dest = NULL; ++ uint32_t ann_count = zebra_announce_count(&bm->zebra_announce_head); + +- while (zebra_announce_count(&bm->zebra_announce_head)) { ++ while (ann_count) { + dest = zebra_announce_pop(&bm->zebra_announce_head); ++ ann_count--; + if (dest->za_vpn == vpn) { + bgp_path_info_unlock(dest->za_bgp_pi); + bgp_dest_unlock_node(dest); +diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c +index da133d71c1..492566f8c8 100644 +--- a/bgpd/bgpd.c ++++ b/bgpd/bgpd.c +@@ -3690,11 +3690,13 @@ int bgp_delete(struct bgp *bgp) + int i; + struct bgp_dest *dest = NULL; + struct graceful_restart_info *gr_info; ++ uint32_t ann_count = zebra_announce_count(&bm->zebra_announce_head); + + assert(bgp); + +- while (zebra_announce_count(&bm->zebra_announce_head)) { ++ while (ann_count) { + dest = zebra_announce_pop(&bm->zebra_announce_head); ++ ann_count--; + if (dest->za_bgp_pi->peer->bgp == bgp) { + bgp_path_info_unlock(dest->za_bgp_pi); + bgp_dest_unlock_node(dest); +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch b/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch new file mode 100644 index 000000000000..3401dae27158 --- /dev/null +++ b/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch @@ -0,0 +1,156 @@ +From 529cdfa09065c6c77aff4a96a52f0d3bcb385b6f Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Thu, 13 Jun 2024 15:30:00 -0400 +Subject: [PATCH 1/5] zebra: Use built in data structure counter + +Instead of keeping a counter that is independent +of the queue's data structure. Just use the queue's +built-in counter. Ensure that it's pthread safe by +keeping it wrapped inside the mutex for adding/deleting +to the queue. + +Signed-off-by: Donald Sharp + +diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c +index caa2f988e2..bc9815bb10 100644 +--- a/zebra/dplane_fpm_nl.c ++++ b/zebra/dplane_fpm_nl.c +@@ -135,8 +135,6 @@ struct fpm_nl_ctx { + + /* Amount of data plane context processed. */ + _Atomic uint32_t dplane_contexts; +- /* Amount of data plane contexts enqueued. */ +- _Atomic uint32_t ctxqueue_len; + /* Peak amount of data plane contexts enqueued. */ + _Atomic uint32_t ctxqueue_len_peak; + +@@ -311,6 +309,12 @@ DEFUN(fpm_show_counters, fpm_show_counters_cmd, + FPM_STR + "FPM statistic counters\n") + { ++ uint32_t curr_queue_len; ++ ++ frr_with_mutex (&gfnc->ctxqueue_mutex) { ++ curr_queue_len = dplane_ctx_queue_count(&gfnc->ctxqueue); ++ } ++ + vty_out(vty, "%30s\n%30s\n", "FPM counters", "============"); + + #define SHOW_COUNTER(label, counter) \ +@@ -324,8 +328,7 @@ DEFUN(fpm_show_counters, fpm_show_counters_cmd, + SHOW_COUNTER("Connection errors", gfnc->counters.connection_errors); + SHOW_COUNTER("Data plane items processed", + gfnc->counters.dplane_contexts); +- SHOW_COUNTER("Data plane items enqueued", +- gfnc->counters.ctxqueue_len); ++ SHOW_COUNTER("Data plane items enqueued", curr_queue_len); + SHOW_COUNTER("Data plane items queue peak", + gfnc->counters.ctxqueue_len_peak); + SHOW_COUNTER("Buffer full hits", gfnc->counters.buffer_full); +@@ -344,6 +347,12 @@ DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd, + "FPM statistic counters\n" + JSON_STR) + { ++ uint32_t curr_queue_len; ++ ++ frr_with_mutex (&gfnc->ctxqueue_mutex) { ++ curr_queue_len = dplane_ctx_queue_count(&gfnc->ctxqueue); ++ } ++ + struct json_object *jo; + + jo = json_object_new_object(); +@@ -357,8 +366,7 @@ DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd, + gfnc->counters.connection_errors); + json_object_int_add(jo, "data-plane-contexts", + gfnc->counters.dplane_contexts); +- json_object_int_add(jo, "data-plane-contexts-queue", +- gfnc->counters.ctxqueue_len); ++ json_object_int_add(jo, "data-plane-contexts-queue", curr_queue_len); + json_object_int_add(jo, "data-plane-contexts-queue-peak", + gfnc->counters.ctxqueue_len_peak); + json_object_int_add(jo, "buffer-full-hits", gfnc->counters.buffer_full); +@@ -1380,8 +1388,6 @@ static void fpm_process_queue(struct thread *t) + + /* Account the processed entries. */ + processed_contexts++; +- atomic_fetch_sub_explicit(&fnc->counters.ctxqueue_len, 1, +- memory_order_relaxed); + + dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_SUCCESS); + dplane_provider_enqueue_out_ctx(fnc->prov, ctx); +@@ -1550,7 +1556,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov) + struct zebra_dplane_ctx *ctx; + struct fpm_nl_ctx *fnc; + int counter, limit; +- uint64_t cur_queue, peak_queue = 0, stored_peak_queue; ++ uint64_t cur_queue = 0, peak_queue = 0, stored_peak_queue; + + fnc = dplane_provider_get_data(prov); + limit = dplane_provider_get_work_limit(prov); +@@ -1564,20 +1570,12 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov) + * anyway. + */ + if (fnc->socket != -1 && fnc->connecting == false) { +- /* +- * Update the number of queued contexts *before* +- * enqueueing, to ensure counter consistency. +- */ +- atomic_fetch_add_explicit(&fnc->counters.ctxqueue_len, +- 1, memory_order_relaxed); +- + frr_with_mutex (&fnc->ctxqueue_mutex) { + dplane_ctx_enqueue_tail(&fnc->ctxqueue, ctx); ++ cur_queue = ++ dplane_ctx_queue_count(&fnc->ctxqueue); + } + +- cur_queue = atomic_load_explicit( +- &fnc->counters.ctxqueue_len, +- memory_order_relaxed); + if (peak_queue < cur_queue) + peak_queue = cur_queue; + continue; +@@ -1594,9 +1592,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov) + atomic_store_explicit(&fnc->counters.ctxqueue_len_peak, + peak_queue, memory_order_relaxed); + +- if (atomic_load_explicit(&fnc->counters.ctxqueue_len, +- memory_order_relaxed) +- > 0) ++ if (cur_queue > 0) + thread_add_timer(fnc->fthread->master, fpm_process_queue, + fnc, 0, &fnc->t_dequeue); + +diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c +index 59b8d6cc63..c252a370b8 100644 +--- a/zebra/zebra_dplane.c ++++ b/zebra/zebra_dplane.c +@@ -969,6 +969,11 @@ struct zebra_dplane_ctx *dplane_ctx_dequeue(struct dplane_ctx_list_head *q) + return ctx; + } + ++uint32_t dplane_ctx_queue_count(struct dplane_ctx_list_head *q) ++{ ++ return dplane_ctx_list_count(q); ++} ++ + /* + * Accessors for information from the context object + */ +diff --git a/zebra/zebra_dplane.h b/zebra/zebra_dplane.h +index 9f9496c8f4..c29e05bbc9 100644 +--- a/zebra/zebra_dplane.h ++++ b/zebra/zebra_dplane.h +@@ -324,6 +324,8 @@ struct zebra_dplane_ctx *dplane_ctx_get_head(struct dplane_ctx_list_head *q); + /* Init a list of contexts */ + void dplane_ctx_q_init(struct dplane_ctx_list_head *q); + ++uint32_t dplane_ctx_queue_count(struct dplane_ctx_list_head *q); ++ + /* + * Accessors for information from the context object + */ +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0043-zebra-Use-the-ctx-queue-counters.patch b/src/sonic-frr/patch/0043-zebra-Use-the-ctx-queue-counters.patch new file mode 100644 index 000000000000..e57684aee9a3 --- /dev/null +++ b/src/sonic-frr/patch/0043-zebra-Use-the-ctx-queue-counters.patch @@ -0,0 +1,108 @@ +From 59e2b19d2d08349ef0197b0adcb13d0bd7de2b79 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Mon, 17 Jun 2024 11:05:28 -0400 +Subject: [PATCH 2/5] zebra: Use the ctx queue counters + +The ctx queue data structures already have a counter +associated with them. Let's just use them instead. + +Signed-off-by: Donald Sharp + +diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c +index c252a370b8..c52e032660 100644 +--- a/zebra/zebra_dplane.c ++++ b/zebra/zebra_dplane.c +@@ -492,10 +492,8 @@ struct zebra_dplane_provider { + int (*dp_fini)(struct zebra_dplane_provider *prov, bool early_p); + + _Atomic uint32_t dp_in_counter; +- _Atomic uint32_t dp_in_queued; + _Atomic uint32_t dp_in_max; + _Atomic uint32_t dp_out_counter; +- _Atomic uint32_t dp_out_queued; + _Atomic uint32_t dp_out_max; + _Atomic uint32_t dp_error_counter; + +@@ -6008,17 +6006,19 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed) + + /* Show counters, useful info from each registered provider */ + while (prov) { ++ dplane_provider_lock(prov); ++ in_q = dplane_ctx_queue_count(&prov->dp_ctx_in_list); ++ out_q = dplane_ctx_queue_count(&prov->dp_ctx_out_list); ++ dplane_provider_unlock(prov); + + in = atomic_load_explicit(&prov->dp_in_counter, + memory_order_relaxed); +- in_q = atomic_load_explicit(&prov->dp_in_queued, +- memory_order_relaxed); ++ + in_max = atomic_load_explicit(&prov->dp_in_max, + memory_order_relaxed); + out = atomic_load_explicit(&prov->dp_out_counter, + memory_order_relaxed); +- out_q = atomic_load_explicit(&prov->dp_out_queued, +- memory_order_relaxed); ++ + out_max = atomic_load_explicit(&prov->dp_out_max, + memory_order_relaxed); + +@@ -6169,10 +6169,6 @@ struct zebra_dplane_ctx *dplane_provider_dequeue_in_ctx( + dplane_provider_lock(prov); + + ctx = dplane_ctx_list_pop(&(prov->dp_ctx_in_list)); +- if (ctx) { +- atomic_fetch_sub_explicit(&prov->dp_in_queued, 1, +- memory_order_relaxed); +- } + + dplane_provider_unlock(prov); + +@@ -6200,10 +6196,6 @@ int dplane_provider_dequeue_in_list(struct zebra_dplane_provider *prov, + break; + } + +- if (ret > 0) +- atomic_fetch_sub_explicit(&prov->dp_in_queued, ret, +- memory_order_relaxed); +- + dplane_provider_unlock(prov); + + return ret; +@@ -6228,10 +6220,7 @@ void dplane_provider_enqueue_out_ctx(struct zebra_dplane_provider *prov, + dplane_ctx_list_add_tail(&(prov->dp_ctx_out_list), ctx); + + /* Maintain out-queue counters */ +- atomic_fetch_add_explicit(&(prov->dp_out_queued), 1, +- memory_order_relaxed); +- curr = atomic_load_explicit(&prov->dp_out_queued, +- memory_order_relaxed); ++ curr = dplane_ctx_queue_count(&prov->dp_ctx_out_list); + high = atomic_load_explicit(&prov->dp_out_max, + memory_order_relaxed); + if (curr > high) +@@ -6253,9 +6242,6 @@ dplane_provider_dequeue_out_ctx(struct zebra_dplane_provider *prov) + if (!ctx) + return NULL; + +- atomic_fetch_sub_explicit(&(prov->dp_out_queued), 1, +- memory_order_relaxed); +- + return ctx; + } + +@@ -7260,10 +7246,7 @@ static void dplane_thread_loop(struct thread *event) + + atomic_fetch_add_explicit(&prov->dp_in_counter, counter, + memory_order_relaxed); +- atomic_fetch_add_explicit(&prov->dp_in_queued, counter, +- memory_order_relaxed); +- curr = atomic_load_explicit(&prov->dp_in_queued, +- memory_order_relaxed); ++ curr = dplane_ctx_queue_count(&prov->dp_ctx_in_list); + high = atomic_load_explicit(&prov->dp_in_max, + memory_order_relaxed); + if (curr > high) +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0044-zebra-Modify-dplane-loop-to-allow-backpressure-to-fi.patch b/src/sonic-frr/patch/0044-zebra-Modify-dplane-loop-to-allow-backpressure-to-fi.patch new file mode 100644 index 000000000000..67b76d03424a --- /dev/null +++ b/src/sonic-frr/patch/0044-zebra-Modify-dplane-loop-to-allow-backpressure-to-fi.patch @@ -0,0 +1,199 @@ +From 4671ddf4920553b663fda129f7c4366839347645 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Wed, 12 Jun 2024 14:14:48 -0400 +Subject: [PATCH 3/5] zebra: Modify dplane loop to allow backpressure to filter + up + +Currently when the dplane_thread_loop is run, it moves contexts +from the dg_update_list and puts the contexts on the input queue +of the first provider. This provider is given a chance to run +and then the items on the output queue are pulled off and placed +on the input queue of the next provider. Rinse/Repeat down through +the entire list of providers. Now imagine that we have a list +of multiple providers and the last provider is getting backed up. +Contexts will end up sticking in the input Queue of the `slow` +provider. This can grow without bounds. This is a real problem +when you have a situation where an interface is flapping and an +upper level protocol is sending a continous stream of route +updates to reflect the change in ecmp. You can end up with +a very very large backlog of contexts. This is bad because +zebra can easily grow to a very very large memory size and on +restricted systems you can run out of memory. Fortunately +for us, the MetaQ already participates with this process +by not doing more route processing until the dg_update_list +goes below the working limit of dg_updates_per_cycle. Thus +if FRR modifies the behavior of this loop to not move more +contexts onto the input queue if either the input queue +or output queue of the next provider has reached this limit. +FRR will naturaly start auto handling backpressure for the dplane +context system and memory will not go out of control. + +Signed-off-by: Donald Sharp + +diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c +index c52e032660..f0e1ff6f27 100644 +--- a/zebra/zebra_dplane.c ++++ b/zebra/zebra_dplane.c +@@ -7155,10 +7155,10 @@ static void dplane_thread_loop(struct thread *event) + { + struct dplane_ctx_list_head work_list; + struct dplane_ctx_list_head error_list; +- struct zebra_dplane_provider *prov; ++ struct zebra_dplane_provider *prov, *next_prov; + struct zebra_dplane_ctx *ctx; + int limit, counter, error_counter; +- uint64_t curr, high; ++ uint64_t curr, out_curr, high; + bool reschedule = false; + + /* Capture work limit per cycle */ +@@ -7182,18 +7182,48 @@ static void dplane_thread_loop(struct thread *event) + /* Locate initial registered provider */ + prov = dplane_prov_list_first(&zdplane_info.dg_providers); + +- /* Move new work from incoming list to temp list */ +- for (counter = 0; counter < limit; counter++) { +- ctx = dplane_ctx_list_pop(&zdplane_info.dg_update_list); +- if (ctx) { +- ctx->zd_provider = prov->dp_id; ++ curr = dplane_ctx_queue_count(&prov->dp_ctx_in_list); ++ out_curr = dplane_ctx_queue_count(&prov->dp_ctx_out_list); + +- dplane_ctx_list_add_tail(&work_list, ctx); +- } else { +- break; ++ if (curr >= (uint64_t)limit) { ++ if (IS_ZEBRA_DEBUG_DPLANE_DETAIL) ++ zlog_debug("%s: Current first provider(%s) Input queue is %" PRIu64 ++ ", holding off work", ++ __func__, prov->dp_name, curr); ++ counter = 0; ++ } else if (out_curr >= (uint64_t)limit) { ++ if (IS_ZEBRA_DEBUG_DPLANE_DETAIL) ++ zlog_debug("%s: Current first provider(%s) Output queue is %" PRIu64 ++ ", holding off work", ++ __func__, prov->dp_name, out_curr); ++ counter = 0; ++ } else { ++ int tlimit; ++ /* ++ * Let's limit the work to how what can be put on the ++ * in or out queue without going over ++ */ ++ tlimit = limit - MAX(curr, out_curr); ++ /* Move new work from incoming list to temp list */ ++ for (counter = 0; counter < tlimit; counter++) { ++ ctx = dplane_ctx_list_pop(&zdplane_info.dg_update_list); ++ if (ctx) { ++ ctx->zd_provider = prov->dp_id; ++ ++ dplane_ctx_list_add_tail(&work_list, ctx); ++ } else { ++ break; ++ } + } + } + ++ /* ++ * If there is anything still on the two input queues reschedule ++ */ ++ if (dplane_ctx_queue_count(&prov->dp_ctx_in_list) > 0 || ++ dplane_ctx_queue_count(&zdplane_info.dg_update_list) > 0) ++ reschedule = true; ++ + DPLANE_UNLOCK(); + + atomic_fetch_sub_explicit(&zdplane_info.dg_routes_queued, counter, +@@ -7212,8 +7242,9 @@ static void dplane_thread_loop(struct thread *event) + * items. + */ + if (IS_ZEBRA_DEBUG_DPLANE_DETAIL) +- zlog_debug("dplane enqueues %d new work to provider '%s'", +- counter, dplane_provider_get_name(prov)); ++ zlog_debug("dplane enqueues %d new work to provider '%s' curr is %" PRIu64, ++ counter, dplane_provider_get_name(prov), ++ curr); + + /* Capture current provider id in each context; check for + * error status. +@@ -7271,18 +7302,61 @@ static void dplane_thread_loop(struct thread *event) + if (!zdplane_info.dg_run) + break; + ++ /* Locate next provider */ ++ next_prov = dplane_prov_list_next(&zdplane_info.dg_providers, ++ prov); ++ if (next_prov) { ++ curr = dplane_ctx_queue_count( ++ &next_prov->dp_ctx_in_list); ++ out_curr = dplane_ctx_queue_count( ++ &next_prov->dp_ctx_out_list); ++ } else ++ out_curr = curr = 0; ++ + /* Dequeue completed work from the provider */ + dplane_provider_lock(prov); + +- while (counter < limit) { +- ctx = dplane_provider_dequeue_out_ctx(prov); +- if (ctx) { +- dplane_ctx_list_add_tail(&work_list, ctx); +- counter++; +- } else +- break; ++ if (curr >= (uint64_t)limit) { ++ if (IS_ZEBRA_DEBUG_DPLANE_DETAIL) ++ zlog_debug("%s: Next Provider(%s) Input queue is %" PRIu64 ++ ", holding off work", ++ __func__, next_prov->dp_name, curr); ++ counter = 0; ++ } else if (out_curr >= (uint64_t)limit) { ++ if (IS_ZEBRA_DEBUG_DPLANE_DETAIL) ++ zlog_debug("%s: Next Provider(%s) Output queue is %" PRIu64 ++ ", holding off work", ++ __func__, next_prov->dp_name, ++ out_curr); ++ counter = 0; ++ } else { ++ int tlimit; ++ ++ /* ++ * Let's limit the work to how what can be put on the ++ * in or out queue without going over ++ */ ++ tlimit = limit - MAX(curr, out_curr); ++ while (counter < tlimit) { ++ ctx = dplane_provider_dequeue_out_ctx(prov); ++ if (ctx) { ++ dplane_ctx_list_add_tail(&work_list, ++ ctx); ++ counter++; ++ } else ++ break; ++ } + } + ++ /* ++ * Let's check if there are still any items on the ++ * input or output queus of the current provider ++ * if so then we know we need to reschedule. ++ */ ++ if (dplane_ctx_queue_count(&prov->dp_ctx_in_list) > 0 || ++ dplane_ctx_queue_count(&prov->dp_ctx_out_list) > 0) ++ reschedule = true; ++ + dplane_provider_unlock(prov); + + if (counter >= limit) +@@ -7293,7 +7367,7 @@ static void dplane_thread_loop(struct thread *event) + counter, dplane_provider_get_name(prov)); + + /* Locate next provider */ +- prov = dplane_prov_list_next(&zdplane_info.dg_providers, prov); ++ prov = next_prov; + } + + /* +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0045-zebra-Limit-queue-depth-in-dplane_fpm_nl.patch b/src/sonic-frr/patch/0045-zebra-Limit-queue-depth-in-dplane_fpm_nl.patch new file mode 100644 index 000000000000..7f25a773a101 --- /dev/null +++ b/src/sonic-frr/patch/0045-zebra-Limit-queue-depth-in-dplane_fpm_nl.patch @@ -0,0 +1,52 @@ +From 50f606c158f6c89abd0d3f531905005d3a48a5b6 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Wed, 12 Jun 2024 15:16:08 -0400 +Subject: [PATCH 4/5] zebra: Limit queue depth in dplane_fpm_nl + +The dplane providers have a concept of input queues +and output queues. These queues are chained together +during normal operation. The code in zebra also has +a feedback mechanism where the MetaQ will not run when +the first input queue is backed up. Having the dplane_fpm_nl +code grab all contexts when it is backed up prevents +this system from behaving appropriately. + +Modify the code to not add to the dplane_fpm_nl's internal +queue when it is already full. This will allow the backpressure +to work appropriately in zebra proper. + +Signed-off-by: Donald Sharp + +diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c +index bc9815bb10..4fd42f64a2 100644 +--- a/zebra/dplane_fpm_nl.c ++++ b/zebra/dplane_fpm_nl.c +@@ -1560,6 +1560,25 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov) + + fnc = dplane_provider_get_data(prov); + limit = dplane_provider_get_work_limit(prov); ++ ++ frr_with_mutex (&fnc->ctxqueue_mutex) { ++ cur_queue = dplane_ctx_queue_count(&fnc->ctxqueue); ++ } ++ ++ if (cur_queue >= (uint64_t)limit) { ++ if (IS_ZEBRA_DEBUG_FPM) ++ zlog_debug("%s: Already at a limit(%" PRIu64 ++ ") of internal work, hold off", ++ __func__, cur_queue); ++ limit = 0; ++ } else { ++ if (IS_ZEBRA_DEBUG_FPM) ++ zlog_debug("%s: current queue is %" PRIu64 ++ ", limiting to lesser amount of %" PRIu64, ++ __func__, cur_queue, limit - cur_queue); ++ limit -= cur_queue; ++ } ++ + for (counter = 0; counter < limit; counter++) { + ctx = dplane_provider_dequeue_in_ctx(prov); + if (ctx == NULL) +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch b/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch new file mode 100644 index 000000000000..e865b861d192 --- /dev/null +++ b/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch @@ -0,0 +1,102 @@ +From d695dfb88418834f0054255dd4385b293efb5a17 Mon Sep 17 00:00:00 2001 +From: Donald Sharp +Date: Mon, 17 Jun 2024 10:42:41 -0400 +Subject: [PATCH 5/5] zebra: Modify show `zebra dplane providers` to give more + data + +The show zebra dplane provider command was ommitting +the input and output queues to the dplane itself. +It would be nice to have this insight as well. + +New output: +r1# show zebra dplane providers +dataplane Incoming Queue from Zebra: 100 +Zebra dataplane providers: + Kernel (1): in: 6, q: 0, q_max: 3, out: 6, q: 14, q_max: 3 + dplane_fpm_nl (2): in: 6, q: 10, q_max: 3, out: 6, q: 0, q_max: 3 +dataplane Outgoing Queue to Zebra: 43 +r1# + +Signed-off-by: Donald Sharp + +diff --git a/zebra/rib.h b/zebra/rib.h +index 2e62148ea0..b78cd218f6 100644 +--- a/zebra/rib.h ++++ b/zebra/rib.h +@@ -630,6 +630,7 @@ static inline struct nexthop_group *rib_get_fib_backup_nhg( + } + + extern void zebra_vty_init(void); ++extern uint32_t zebra_rib_dplane_results_count(void); + + extern pid_t pid; + +diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c +index f0e1ff6f27..21c73a3796 100644 +--- a/zebra/zebra_dplane.c ++++ b/zebra/zebra_dplane.c +@@ -5998,12 +5998,14 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed) + struct zebra_dplane_provider *prov; + uint64_t in, in_q, in_max, out, out_q, out_max; + +- vty_out(vty, "Zebra dataplane providers:\n"); +- + DPLANE_LOCK(); + prov = dplane_prov_list_first(&zdplane_info.dg_providers); ++ in = dplane_ctx_queue_count(&zdplane_info.dg_update_list); + DPLANE_UNLOCK(); + ++ vty_out(vty, "dataplane Incoming Queue from Zebra: %" PRIu64 "\n", in); ++ vty_out(vty, "Zebra dataplane providers:\n"); ++ + /* Show counters, useful info from each registered provider */ + while (prov) { + dplane_provider_lock(prov); +@@ -6022,13 +6024,19 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed) + out_max = atomic_load_explicit(&prov->dp_out_max, + memory_order_relaxed); + +- vty_out(vty, "%s (%u): in: %"PRIu64", q: %"PRIu64", q_max: %"PRIu64", out: %"PRIu64", q: %"PRIu64", q_max: %"PRIu64"\n", +- prov->dp_name, prov->dp_id, in, in_q, in_max, +- out, out_q, out_max); ++ vty_out(vty, ++ " %s (%u): in: %" PRIu64 ", q: %" PRIu64 ++ ", q_max: %" PRIu64 ", out: %" PRIu64 ", q: %" PRIu64 ++ ", q_max: %" PRIu64 "\n", ++ prov->dp_name, prov->dp_id, in, in_q, in_max, out, ++ out_q, out_max); + + prov = dplane_prov_list_next(&zdplane_info.dg_providers, prov); + } + ++ out = zebra_rib_dplane_results_count(); ++ vty_out(vty, "dataplane Outgoing Queue to Zebra: %" PRIu64 "\n", out); ++ + return CMD_SUCCESS; + } + +diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c +index 1ff3d98545..ae051d37eb 100644 +--- a/zebra/zebra_rib.c ++++ b/zebra/zebra_rib.c +@@ -4874,6 +4874,17 @@ static int rib_dplane_results(struct dplane_ctx_list_head *ctxlist) + return 0; + } + ++uint32_t zebra_rib_dplane_results_count(void) ++{ ++ uint32_t count; ++ ++ frr_with_mutex (&dplane_mutex) { ++ count = dplane_ctx_queue_count(&rib_dplane_q); ++ } ++ ++ return count; ++} ++ + /* + * Ensure there are no empty slots in the route_info array. + * Every route type in zebra should be present there. +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0047-bgpd-backpressure-fix-evpn-route-sync-to-zebra.patch b/src/sonic-frr/patch/0047-bgpd-backpressure-fix-evpn-route-sync-to-zebra.patch new file mode 100644 index 000000000000..c8e3de24ef33 --- /dev/null +++ b/src/sonic-frr/patch/0047-bgpd-backpressure-fix-evpn-route-sync-to-zebra.patch @@ -0,0 +1,33 @@ +From bed7636621589c139ed8d83842df3ce438b8493f Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Mon, 17 Jun 2024 13:58:03 -0700 +Subject: [PATCH] bgpd: backpressure - fix evpn route sync to zebra + +In scaled EVPN + ipv4/ipv6 uni route sync to zebra, +some of the ipv4/ipv6 routes skipped reinstallation +due to incorrect local variable's stale value. + +Once the local variable value reset in each loop +iteration all skipped routes synced to zebra properly. + +Ticket: #3948828 + +Signed-off-by: Rajasekar Raja +Signed-off-by: Chirag Shah + +diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c +index 5d5525156b..278e228d66 100644 +--- a/bgpd/bgp_zebra.c ++++ b/bgpd/bgp_zebra.c +@@ -1801,6 +1801,8 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e) + bool install; + + while (count < ZEBRA_ANNOUNCEMENTS_LIMIT) { ++ is_evpn = false; ++ + dest = zebra_announce_pop(&bm->zebra_announce_head); + + if (!dest) +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch b/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch new file mode 100644 index 000000000000..1731b6d21f31 --- /dev/null +++ b/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch @@ -0,0 +1,90 @@ +From 05d2c5b3ba6f83cd42a4dd5f9e40959fc438b0a6 Mon Sep 17 00:00:00 2001 +From: Rajasekar Raja +Date: Wed, 10 Jul 2024 16:46:29 -0700 +Subject: [PATCH 1/2] bgpd: backpressure - fix to properly remove dest for bgp + under deletion + +In case of imported routes (L3vni/vrf leaks), when a bgp instance is +being deleted, the peer->bgp comparision with the incoming bgp to remove +the dest from the pending fifo is wrong. This can lead to the fifo +having stale entries resulting in crash. + +Two changes are done here. + - Instead of pop/push items in list if the struct bgp doesnt match, + simply iterate the list and remove the expected ones. + + - Corrected the way bgp is fetched from dest rather than relying on + path_info->peer so that it works for all kinds of routes. + +Ticket :#3980988 + +Signed-off-by: Chirag Shah +Signed-off-by: Rajasekar Raja + +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index 2243ffdc77..b1f8f19594 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -6074,16 +6074,16 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni, + void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn) + { + struct bgp_dest *dest = NULL; +- uint32_t ann_count = zebra_announce_count(&bm->zebra_announce_head); ++ struct bgp_dest *dest_next = NULL; + +- while (ann_count) { +- dest = zebra_announce_pop(&bm->zebra_announce_head); +- ann_count--; ++ for (dest = zebra_announce_first(&bm->zebra_announce_head); dest; ++ dest = dest_next) { ++ dest_next = zebra_announce_next(&bm->zebra_announce_head, dest); + if (dest->za_vpn == vpn) { + bgp_path_info_unlock(dest->za_bgp_pi); + bgp_dest_unlock_node(dest); +- } else +- zebra_announce_add_tail(&bm->zebra_announce_head, dest); ++ zebra_announce_del(&bm->zebra_announce_head, dest); ++ } + } + + bgp_evpn_remote_ip_hash_destroy(vpn); +diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c +index 492566f8c8..e16a58b443 100644 +--- a/bgpd/bgpd.c ++++ b/bgpd/bgpd.c +@@ -3689,19 +3689,25 @@ int bgp_delete(struct bgp *bgp) + safi_t safi; + int i; + struct bgp_dest *dest = NULL; ++ struct bgp_dest *dest_next = NULL; ++ struct bgp_table *dest_table = NULL; + struct graceful_restart_info *gr_info; +- uint32_t ann_count = zebra_announce_count(&bm->zebra_announce_head); + + assert(bgp); + +- while (ann_count) { +- dest = zebra_announce_pop(&bm->zebra_announce_head); +- ann_count--; +- if (dest->za_bgp_pi->peer->bgp == bgp) { ++ /* ++ * Iterate the pending dest list and remove all the dest pertaininig to ++ * the bgp under delete. ++ */ ++ for (dest = zebra_announce_first(&bm->zebra_announce_head); dest; ++ dest = dest_next) { ++ dest_next = zebra_announce_next(&bm->zebra_announce_head, dest); ++ dest_table = bgp_dest_table(dest); ++ if (dest_table->bgp == bgp) { + bgp_path_info_unlock(dest->za_bgp_pi); + bgp_dest_unlock_node(dest); +- } else +- zebra_announce_add_tail(&bm->zebra_announce_head, dest); ++ zebra_announce_del(&bm->zebra_announce_head, dest); ++ } + } + + bgp_soft_reconfig_table_task_cancel(bgp, NULL, NULL); +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0049-bgpd-backpressure-Improve-debuggability.patch b/src/sonic-frr/patch/0049-bgpd-backpressure-Improve-debuggability.patch new file mode 100644 index 000000000000..e74a2a7c3114 --- /dev/null +++ b/src/sonic-frr/patch/0049-bgpd-backpressure-Improve-debuggability.patch @@ -0,0 +1,46 @@ +From 0dd44dc0d99b69e6c1853f46dbae4a30fc4b9aed Mon Sep 17 00:00:00 2001 +From: Rajasekar Raja +Date: Wed, 10 Jul 2024 20:17:14 -0700 +Subject: [PATCH 2/2] bgpd: backpressure - Improve debuggability + +Improve debuggability in backpressure code. + +Ticket :#3980988 + +Signed-off-by: Rajasekar Raja + +diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c +index e16a58b443..2e1c5e555b 100644 +--- a/bgpd/bgpd.c ++++ b/bgpd/bgpd.c +@@ -3692,6 +3692,7 @@ int bgp_delete(struct bgp *bgp) + struct bgp_dest *dest_next = NULL; + struct bgp_table *dest_table = NULL; + struct graceful_restart_info *gr_info; ++ uint32_t cnt_before, cnt_after; + + assert(bgp); + +@@ -3699,6 +3700,7 @@ int bgp_delete(struct bgp *bgp) + * Iterate the pending dest list and remove all the dest pertaininig to + * the bgp under delete. + */ ++ cnt_before = zebra_announce_count(&bm->zebra_announce_head); + for (dest = zebra_announce_first(&bm->zebra_announce_head); dest; + dest = dest_next) { + dest_next = zebra_announce_next(&bm->zebra_announce_head, dest); +@@ -3710,6 +3712,11 @@ int bgp_delete(struct bgp *bgp) + } + } + ++ cnt_after = zebra_announce_count(&bm->zebra_announce_head); ++ if (BGP_DEBUG(zebra, ZEBRA)) ++ zlog_debug("Zebra Announce Fifo cleanup count before %u and after %u during BGP %s deletion", ++ cnt_before, cnt_after, bgp->name_pretty); ++ + bgp_soft_reconfig_table_task_cancel(bgp, NULL, NULL); + + /* make sure we withdraw any exported routes */ +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch b/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch new file mode 100644 index 000000000000..878d60eb5e37 --- /dev/null +++ b/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch @@ -0,0 +1,48 @@ +From df1d28fcc12d4f5541c9335115887d31e6197b80 Mon Sep 17 00:00:00 2001 +From: Rajasekar Raja +Date: Mon, 22 Jul 2024 10:13:19 -0700 +Subject: [PATCH] bgpd: backpressure - Avoid use after free + +Coverity complains there is a use after free (1598495 and 1598496) +At this point, most likely dest->refcount cannot go 1 and free up +the dest, but there might be some code path where this can happen. + +Fixing this with a simple order change (no harm fix). + +Ticket :#4001204 + +Signed-off-by: Rajasekar Raja + +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index b1f8f19594..bb3cd62950 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -6080,9 +6080,9 @@ void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn) + dest = dest_next) { + dest_next = zebra_announce_next(&bm->zebra_announce_head, dest); + if (dest->za_vpn == vpn) { ++ zebra_announce_del(&bm->zebra_announce_head, dest); + bgp_path_info_unlock(dest->za_bgp_pi); + bgp_dest_unlock_node(dest); +- zebra_announce_del(&bm->zebra_announce_head, dest); + } + } + +diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c +index 2e1c5e555b..342982069b 100644 +--- a/bgpd/bgpd.c ++++ b/bgpd/bgpd.c +@@ -3706,9 +3706,9 @@ int bgp_delete(struct bgp *bgp) + dest_next = zebra_announce_next(&bm->zebra_announce_head, dest); + dest_table = bgp_dest_table(dest); + if (dest_table->bgp == bgp) { ++ zebra_announce_del(&bm->zebra_announce_head, dest); + bgp_path_info_unlock(dest->za_bgp_pi); + bgp_dest_unlock_node(dest); +- zebra_announce_del(&bm->zebra_announce_head, dest); + } + } + +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch b/src/sonic-frr/patch/0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch new file mode 100644 index 000000000000..53d12a6a83d9 --- /dev/null +++ b/src/sonic-frr/patch/0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch @@ -0,0 +1,73 @@ +From cc56963da0e8f0ca606bc9b932e9180ad059f8c5 Mon Sep 17 00:00:00 2001 +From: Rajasekar Raja +Date: Tue, 16 Jul 2024 23:34:15 -0700 +Subject: [PATCH 1/2] bgpd: backpressure - fix ret value + evpn_route_select_install + +The return value of evpn_route_select_install is ignored in all cases +except during vni route table install/uninstall and based on the +returned value, an error is logged. Fixing this. + +Ticket :#3992392 + +Signed-off-by: Rajasekar Raja + +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index bb3cd62950..34128e7c19 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -1433,11 +1433,12 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, + && !bgp_addpath_is_addpath_used(&bgp->tx_addpath, afi, safi)) { + if (bgp_zebra_has_route_changed(old_select)) { + if (CHECK_FLAG(bgp->flags, BGP_FLAG_DELETE_IN_PROGRESS)) +- evpn_zebra_install( +- bgp, vpn, +- (const struct prefix_evpn *) +- bgp_dest_get_prefix(dest), +- old_select); ++ ret = evpn_zebra_install(bgp, vpn, ++ (const struct prefix_evpn ++ *) ++ bgp_dest_get_prefix( ++ dest), ++ old_select); + else + bgp_zebra_route_install(dest, old_select, bgp, + true, vpn, false); +@@ -1475,10 +1476,11 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, + && (new_select->sub_type == BGP_ROUTE_IMPORTED || + bgp_evpn_attr_is_sync(new_select->attr))) { + if (CHECK_FLAG(bgp->flags, BGP_FLAG_DELETE_IN_PROGRESS)) +- evpn_zebra_install(bgp, vpn, +- (const struct prefix_evpn *) +- bgp_dest_get_prefix(dest), +- new_select); ++ ret = evpn_zebra_install(bgp, vpn, ++ (const struct prefix_evpn *) ++ bgp_dest_get_prefix( ++ dest), ++ new_select); + else + bgp_zebra_route_install(dest, new_select, bgp, true, + vpn, false); +@@ -1503,11 +1505,12 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn, + if (CHECK_FLAG(bgp->flags, + BGP_FLAG_DELETE_IN_PROGRESS) || + CHECK_FLAG(bgp->flags, BGP_FLAG_VNI_DOWN)) +- evpn_zebra_uninstall( +- bgp, vpn, +- (const struct prefix_evpn *) +- bgp_dest_get_prefix(dest), +- old_select, false); ++ ret = evpn_zebra_uninstall(bgp, vpn, ++ (const struct prefix_evpn ++ *) ++ bgp_dest_get_prefix( ++ dest), ++ old_select, false); + else + bgp_zebra_route_install(dest, old_select, bgp, + false, vpn, false); +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch b/src/sonic-frr/patch/0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch new file mode 100644 index 000000000000..62ba8a3b739e --- /dev/null +++ b/src/sonic-frr/patch/0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch @@ -0,0 +1,61 @@ +From dd591de04b0e25c74a9936c854bb6dbe7839bd39 Mon Sep 17 00:00:00 2001 +From: Rajasekar Raja +Date: Thu, 18 Jul 2024 22:23:23 -0700 +Subject: [PATCH 2/2] bgpd: backpressure - log error for evpn when route + install to zebra fails. + +log error for evpn in case route install to zebra fails. + +Ticket :#3992392 + +Signed-off-by: Rajasekar Raja + +diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c +index 278e228d66..038d328a60 100644 +--- a/bgpd/bgp_zebra.c ++++ b/bgpd/bgp_zebra.c +@@ -1799,6 +1799,7 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e) + struct bgp_table *table = NULL; + enum zclient_send_status status = ZCLIENT_SEND_SUCCESS; + bool install; ++ const struct prefix_evpn *evp = NULL; + + while (count < ZEBRA_ANNOUNCEMENTS_LIMIT) { + is_evpn = false; +@@ -1809,10 +1810,12 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e) + break; + + table = bgp_dest_table(dest); +- install = +- CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL); +- if (table->afi == AFI_L2VPN && table->safi == SAFI_EVPN) ++ install = CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL); ++ if (table->afi == AFI_L2VPN && table->safi == SAFI_EVPN) { + is_evpn = true; ++ evp = (const struct prefix_evpn *)bgp_dest_get_prefix( ++ dest); ++ } + + if (BGP_DEBUG(zebra, ZEBRA)) + zlog_debug( +@@ -1845,6 +1848,17 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e) + UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE); + } + ++ if (is_evpn && status == ZCLIENT_SEND_FAILURE) ++ flog_err(EC_BGP_EVPN_FAIL, ++ "%s (%u): Failed to %s EVPN %pFX %s route in VNI %u", ++ vrf_id_to_name(table->bgp->vrf_id), ++ table->bgp->vrf_id, ++ install ? "install" : "uninstall", evp, ++ evp->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE ++ ? "MACIP" ++ : "IMET", ++ dest->za_vpn->vni); ++ + bgp_path_info_unlock(dest->za_bgp_pi); + dest->za_bgp_pi = NULL; + dest->za_vpn = NULL; +-- +2.43.2 + diff --git a/src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch b/src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch new file mode 100644 index 000000000000..791f52de3966 --- /dev/null +++ b/src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch @@ -0,0 +1,14 @@ +diff --git a/bgpd/bgp_network.c b/bgpd/bgp_network.c +index 76bb9949d..974a57ef2 100644 +--- a/bgpd/bgp_network.c ++++ b/bgpd/bgp_network.c +@@ -774,6 +774,9 @@ int bgp_connect(struct peer *peer) + ? IPV4_MAX_BITLEN + : IPV6_MAX_BITLEN; + ++ if (!BGP_PEER_SU_UNSPEC(peer)) ++ bgp_md5_set(peer); ++ + bgp_md5_set_connect(peer->fd, &peer->su, prefixlen, + peer->password); + } diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series index 445bc9dd9653..1606b67065e4 100644 --- a/src/sonic-frr/patch/series +++ b/src/sonic-frr/patch/series @@ -27,3 +27,27 @@ 0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch 0028-zebra-fix-parse-attr-problems-for-encap.patch 0029-zebra-nhg-fix-on-intf-up.patch +0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch +0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch +0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch +0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch +0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch +0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch +0036-zebra-backpressure-Fix-Null-ptr-access-Coverity-Issu.patch +0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch +0038-zebra-Actually-display-I-O-buffer-sizes.patch +0039-zebra-Actually-display-I-O-buffer-sizes-part-2.patch +0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch +0041-bgpd-backpressure-Fix-to-avoid-CPU-hog.patch +0042-zebra-Use-built-in-data-structure-counter.patch +0043-zebra-Use-the-ctx-queue-counters.patch +0044-zebra-Modify-dplane-loop-to-allow-backpressure-to-fi.patch +0045-zebra-Limit-queue-depth-in-dplane_fpm_nl.patch +0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch +0047-bgpd-backpressure-fix-evpn-route-sync-to-zebra.patch +0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch +0049-bgpd-backpressure-Improve-debuggability.patch +0050-bgpd-backpressure-Avoid-use-after-free.patch +0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch +0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch +0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch diff --git a/src/sonic-gnmi b/src/sonic-gnmi index 424212b2ae85..95f4400d9698 160000 --- a/src/sonic-gnmi +++ b/src/sonic-gnmi @@ -1 +1 @@ -Subproject commit 424212b2ae8566084b715596d4cc715ad3a62618 +Subproject commit 95f4400d96982c9f6a6a02ed62e30a9cb2454a85 diff --git a/src/sonic-host-services b/src/sonic-host-services index 29a04f5bc06f..d2170c9d48e5 160000 --- a/src/sonic-host-services +++ b/src/sonic-host-services @@ -1 +1 @@ -Subproject commit 29a04f5bc06fbb2772565d404d91e0452d229f19 +Subproject commit d2170c9d48e59aeeec2058cb9a85e59b7761ad36 diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel index 1f101c13d3cc..72d451673d0d 160000 --- a/src/sonic-linux-kernel +++ b/src/sonic-linux-kernel @@ -1 +1 @@ -Subproject commit 1f101c13d3ccd692638f0aa253b0097f38783a6d +Subproject commit 72d451673d0d84ec274ebc5ad6fafc0ec7d6bd57 diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common index 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a/src/sonic-nettools/debian/changelog b/src/sonic-nettools/debian/changelog new file mode 100644 index 000000000000..6123545b50b2 --- /dev/null +++ b/src/sonic-nettools/debian/changelog @@ -0,0 +1,5 @@ +sonic-nettools (0.0.1-0) UNRELEASED; urgency=medium + + * Initial release. + + -- Wenda Chu Mon, 10 Jun 2024 12:49:43 -0700 diff --git a/src/sonic-nettools/debian/compat b/src/sonic-nettools/debian/compat new file mode 100644 index 000000000000..48082f72f087 --- /dev/null +++ b/src/sonic-nettools/debian/compat @@ -0,0 +1 @@ +12 diff --git a/src/sonic-nettools/debian/control b/src/sonic-nettools/debian/control new file mode 100644 index 000000000000..b77ec470ea1b --- /dev/null +++ b/src/sonic-nettools/debian/control @@ -0,0 +1,9 @@ +Source: sonic-nettools +Maintainer: Wenda Chu +Standards-Version: 0.0.1 +Section: custom + +Package: sonic-nettools +Priority: optional +Architecture: any +Description: Networking command line tools diff --git a/src/sonic-nettools/debian/install b/src/sonic-nettools/debian/install new file mode 100644 index 000000000000..902a829820b1 --- /dev/null +++ b/src/sonic-nettools/debian/install @@ -0,0 +1 @@ +bin/wol /usr/bin/ diff --git a/src/sonic-nettools/debian/rules b/src/sonic-nettools/debian/rules new file mode 100755 index 000000000000..cbe925d75871 --- /dev/null +++ b/src/sonic-nettools/debian/rules @@ -0,0 +1,3 @@ +#!/usr/bin/make -f +%: + dh $@ diff --git a/src/sonic-nettools/wol/Cargo.toml b/src/sonic-nettools/wol/Cargo.toml new file mode 100644 index 000000000000..6b2276e79724 --- /dev/null +++ b/src/sonic-nettools/wol/Cargo.toml @@ -0,0 +1,7 @@ +[package] +name = "wol" +version = "0.0.1" + +[dependencies] +pnet = "0.35.0" +clap = { version = "4.5.7", features = ["derive"] } diff --git a/src/sonic-nettools/wol/src/main.rs b/src/sonic-nettools/wol/src/main.rs new file mode 100644 index 000000000000..c04ba9411bcd --- /dev/null +++ b/src/sonic-nettools/wol/src/main.rs @@ -0,0 +1,13 @@ +mod wol; + +extern crate clap; +extern crate pnet; + +fn main() { + if let Err(e) = wol::build_and_send() { + eprintln!("Error: {}", e.msg); + std::process::exit(e.code); + } else { + std::process::exit(0); + } +} diff --git a/src/sonic-nettools/wol/src/wol.rs b/src/sonic-nettools/wol/src/wol.rs new file mode 100644 index 000000000000..b5d598d369f3 --- /dev/null +++ b/src/sonic-nettools/wol/src/wol.rs @@ -0,0 +1,687 @@ +use clap::builder::ArgPredicate; +use clap::Parser; +use pnet::datalink::Channel::Ethernet; +use pnet::datalink::{self, DataLinkSender, MacAddr, NetworkInterface}; +use std::fs::read_to_string; +use std::result::Result; +use std::str::FromStr; +use std::thread; +use std::time::Duration; + +const BROADCAST_MAC: [u8; 6] = [0xff, 0xff, 0xff, 0xff, 0xff, 0xff]; + +#[derive(Parser, Debug)] +#[command( + next_line_help = true, + about = " +This tool can generate and send wake on LAN magic packets with target interface and mac + +Examples: + wol Ethernet10 00:11:22:33:44:55 + wol Ethernet10 00:11:22:33:44:55 -b + wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -p 00:22:44:66:88:aa + wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -p 192.168.1.1 -c 3 -i 2000" +)] +struct WolArgs { + /// The name of the network interface to send the magic packet through + interface: String, + + /// The MAC address of the target device, formatted as a colon-separated string (e.g. "00:11:22:33:44:55") + target_mac: String, + + /// The flag to indicate if use broadcast MAC address instead of target device's MAC address as Destination MAC Address in Ethernet Frame Header [default: false] + #[arg(short, long, default_value_t = false)] + broadcast: bool, + + /// An optional 4 or 6 byte password, in ethernet hex format or quad-dotted decimal (e.g. "127.0.0.1" or "00:11:22:33:44:55") + #[arg(short, long, value_parser = parse_password)] + password: Option, + + /// For each target MAC address, the count of magic packets to send. count must between 1 and 5. This param must use with -i. [default: 1] + #[arg( + short, + long, + default_value_t = 1, + requires_if(ArgPredicate::IsPresent, "interval") + )] + count: u8, + + /// Wait interval milliseconds between sending each magic packet. interval must between 0 and 2000. This param must use with -c. [default: 0] + #[arg( + short, + long, + default_value_t = 0, + requires_if(ArgPredicate::IsPresent, "count") + )] + interval: u64, + + /// The flag to indicate if we should print verbose output + #[arg(short, long)] + verbose: bool, +} + +#[derive(Debug, Clone)] +struct Password(Vec); + +impl Password { + fn ref_bytes(&self) -> &Vec { + &self.0 + } +} + +#[derive(Debug)] +pub struct WolErr { + pub msg: String, + pub code: i32, +} + +impl std::error::Error for WolErr {} + +impl std::fmt::Display for WolErr { + fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result { + write!(f, "Error: {}", self.msg) + } +} + +enum WolErrCode { + SocketError = 1, + InvalidArguments = 2, + UnknownError = 999, +} + +pub fn build_and_send() -> Result<(), WolErr> { + let args = WolArgs::parse(); + let target_macs = parse_target_macs(&args)?; + valide_arguments(&args)?; + let src_mac = get_interface_mac(&args.interface)?; + let mut tx = open_tx_channel(&args.interface)?; + for target_mac in target_macs { + if args.verbose { + println!( + "Building and sending packet to target mac address {}", + target_mac + .iter() + .map(|b| format!("{:02X}", b)) + .collect::>() + .join(":") + ); + } + let dst_mac = if args.broadcast { + BROADCAST_MAC + } else { + target_mac + }; + let magic_bytes = build_magic_packet(&src_mac, &dst_mac, &target_mac, &args.password)?; + send_magic_packet( + &mut tx, + magic_bytes, + &args.count, + &args.interval, + &args.verbose, + )?; + } + + Ok(()) +} + +fn valide_arguments(args: &WolArgs) -> Result<(), WolErr> { + if !is_operstate_up(&args.interface)? { + return Err(WolErr { + msg: format!( + "Invalid value for \"INTERFACE\": interface {} is not up", + args.interface + ), + code: WolErrCode::InvalidArguments as i32, + }); + } + + if args.interval > 2000 { + return Err(WolErr { + msg: String::from("Invalid value for \"INTERVAL\": interval must between 0 and 2000"), + code: WolErrCode::InvalidArguments as i32, + }); + } + + if args.count == 0 || args.count > 5 { + return Err(WolErr { + msg: String::from("Invalid value for \"COUNT\": count must between 1 and 5"), + code: WolErrCode::InvalidArguments as i32, + }); + } + + Ok(()) +} + +fn parse_mac_addr(mac_str: &str) -> Result<[u8; 6], WolErr> { + MacAddr::from_str(mac_str) + .map(|mac| mac.octets()) + .map_err(|_| WolErr { + msg: String::from("Invalid MAC address"), + code: WolErrCode::InvalidArguments as i32, + }) +} + +fn parse_ipv4_addr(ipv4_str: &str) -> Result, WolErr> { + if !is_ipv4_address_valid(ipv4_str) { + Err(WolErr { + msg: String::from("Invalid IPv4 address"), + code: WolErrCode::InvalidArguments as i32, + }) + } else { + ipv4_str + .split('.') + .map(|octet| octet.parse::()) + .collect::, _>>() + .map_err(|_| WolErr { + msg: String::from("Invalid IPv4 address"), + code: WolErrCode::InvalidArguments as i32, + }) + } +} + +fn parse_password(password: &str) -> Result { + if is_ipv4_address_valid(password) { + Ok(Password(parse_ipv4_addr(password)?)) + } else if is_mac_string_valid(password) { + parse_mac_addr(password).map(|mac| Password(mac.to_vec())) + } else { + Err(WolErr { + msg: String::from("Invalid password"), + code: WolErrCode::InvalidArguments as i32, + }) + } +} + +fn parse_target_macs(args: &WolArgs) -> Result, WolErr> { + let target_macs: Vec<&str> = args.target_mac.split(',').collect(); + let mut macs = Vec::new(); + for mac_str in target_macs { + macs.push(parse_mac_addr(mac_str)?); + } + Ok(macs) +} + +fn is_operstate_up(interface: &str) -> Result { + let state_file_path = format!("/sys/class/net/{}/operstate", interface); + match read_to_string(state_file_path) { + Ok(content) => Ok(content.trim() == "up"), + Err(_) => Err(WolErr { + msg: format!( + "Invalid value for \"INTERFACE\": invalid SONiC interface name {}", + interface + ), + code: WolErrCode::InvalidArguments as i32, + }), + } +} + +fn is_mac_string_valid(mac_str: &str) -> bool { + let mac_str = mac_str.replace(':', ""); + mac_str.len() == 12 && mac_str.chars().all(|c| c.is_ascii_hexdigit()) +} + +fn is_ipv4_address_valid(ipv4_str: &str) -> bool { + ipv4_str.split('.').count() == 4 + && ipv4_str + .split('.') + .all(|octet| octet.parse::().map_or(false, |n| n < 256)) +} + +fn get_interface_mac(interface_name: &String) -> Result<[u8; 6], WolErr> { + if let Some(interface) = datalink::interfaces() + .into_iter() + .find(|iface: &NetworkInterface| iface.name == *interface_name) + { + if let Some(mac) = interface.mac { + Ok(mac.octets()) + } else { + Err(WolErr { + msg: String::from("Could not get MAC address of target interface"), + code: WolErrCode::UnknownError as i32, + }) + } + } else { + Err(WolErr { + msg: String::from("Could not find target interface"), + code: WolErrCode::InvalidArguments as i32, + }) + } +} + +fn build_magic_packet( + src_mac: &[u8; 6], + dst_mac: &[u8; 6], + target_mac: &[u8; 6], + password: &Option, +) -> Result, WolErr> { + let password_len = password.as_ref().map_or(0, |p| p.ref_bytes().len()); + let mut pkt = vec![0u8; 116 + password_len]; + pkt[0..6].copy_from_slice(dst_mac); + pkt[6..12].copy_from_slice(src_mac); + pkt[12..14].copy_from_slice(&[0x08, 0x42]); + pkt[14..20].copy_from_slice(&[0xff; 6]); + pkt[20..116].copy_from_slice(&target_mac.repeat(16)); + if let Some(p) = password { + pkt[116..116 + password_len].copy_from_slice(p.ref_bytes()); + } + Ok(pkt) +} + +fn send_magic_packet( + tx: &mut Box, + packet: Vec, + count: &u8, + interval: &u64, + verbose: &bool, +) -> Result<(), WolErr> { + for nth in 0..*count { + match tx.send_to(&packet, None) { + Some(Ok(_)) => {} + Some(Err(e)) => { + return Err(WolErr { + msg: format!("Network is down: {}", e), + code: WolErrCode::SocketError as i32, + }); + } + None => { + return Err(WolErr { + msg: String::from("Network is down"), + code: WolErrCode::SocketError as i32, + }); + } + } + if *verbose { + println!( + " | -> Sent the {}th packet and sleep for {} seconds", + &nth + 1, + &interval + ); + println!( + " | -> Packet bytes in hex {}", + &packet + .iter() + .fold(String::new(), |acc, b| acc + &format!("{:02X}", b)) + ) + } + thread::sleep(Duration::from_millis(*interval)); + } + Ok(()) +} + +fn open_tx_channel(interface: &str) -> Result, WolErr> { + if let Some(interface) = datalink::interfaces() + .into_iter() + .find(|iface: &NetworkInterface| iface.name == interface) + { + match datalink::channel(&interface, Default::default()) { + Ok(Ethernet(tx, _)) => Ok(tx), + Ok(_) => Err(WolErr { + msg: String::from("Network is down"), + code: WolErrCode::SocketError as i32, + }), + Err(e) => Err(WolErr { + msg: format!("Network is down: {}", e), + code: WolErrCode::SocketError as i32, + }), + } + } else { + Err(WolErr { + msg: format!( + "Invalid value for \"INTERFACE\": interface {} is not up", + interface + ), + code: WolErrCode::InvalidArguments as i32, + }) + } +} + +#[cfg(test)] +mod tests { + use super::*; + + #[test] + fn test_parse_mac_addr() { + let mac_str = "00:11:22:33:44:55"; + let mac = parse_mac_addr(mac_str).unwrap(); + assert_eq!(mac, [0x00, 0x11, 0x22, 0x33, 0x44, 0x55]); + + let mac_str = "00:11:22:33:44:GG"; + assert!(parse_mac_addr(mac_str).is_err()); + assert_eq!( + parse_mac_addr(mac_str).unwrap_err().msg, + "Invalid MAC address" + ); + assert_eq!( + parse_mac_addr(mac_str).unwrap_err().code, + WolErrCode::InvalidArguments as i32 + ); + + let mac_str = "00-01-22-33-44-55"; + assert!(parse_mac_addr(mac_str).is_err()); + assert_eq!( + parse_mac_addr(mac_str).unwrap_err().msg, + "Invalid MAC address" + ); + assert_eq!( + parse_mac_addr(mac_str).unwrap_err().code, + WolErrCode::InvalidArguments as i32 + ); + } + + #[test] + fn test_parse_ipv4_addr() { + let ipv4_str = "127.0.0.1"; + let ipv4 = parse_ipv4_addr(ipv4_str).unwrap(); + assert_eq!(ipv4, [127, 0, 0, 1]); + + let ipv4_str = "127.0.0.256"; + assert!(parse_ipv4_addr(ipv4_str).is_err()); + assert_eq!( + parse_ipv4_addr(ipv4_str).unwrap_err().msg, + "Invalid IPv4 address" + ); + assert_eq!( + parse_ipv4_addr(ipv4_str).unwrap_err().code, + WolErrCode::InvalidArguments as i32 + ); + + let ipv4_str = "127.0.0"; + assert!(parse_ipv4_addr(ipv4_str).is_err()); + assert_eq!( + parse_ipv4_addr(ipv4_str).unwrap_err().msg, + "Invalid IPv4 address" + ); + assert_eq!( + parse_ipv4_addr(ipv4_str).unwrap_err().code, + WolErrCode::InvalidArguments as i32 + ); + + let ipv4_str = "::1"; + assert!(parse_ipv4_addr(ipv4_str).is_err()); + assert_eq!( + parse_ipv4_addr(ipv4_str).unwrap_err().msg, + "Invalid IPv4 address" + ); + assert_eq!( + parse_ipv4_addr(ipv4_str).unwrap_err().code, + WolErrCode::InvalidArguments as i32 + ); + } + + #[test] + fn test_parse_password() { + let password_str = "127.0.0.1"; + let password = parse_password(password_str); + assert_eq!(*password.unwrap().ref_bytes(), [127, 0, 0, 1]); + + let password_str = "00:11:22:33:44:55"; + let password = parse_password(password_str); + assert_eq!(*password.unwrap().ref_bytes(), [0, 17, 34, 51, 68, 85]); + + let password_str = "127.0.0.256"; + assert!(parse_password(password_str).is_err()); + assert_eq!( + parse_password(password_str).unwrap_err().code, + WolErrCode::InvalidArguments as i32 + ); + + let password_str = "127.0.0"; + assert!(parse_password(password_str).is_err()); + assert_eq!( + parse_password(password_str).unwrap_err().code, + WolErrCode::InvalidArguments as i32 + ); + + let password_str = "::1"; + assert!(parse_password(password_str).is_err()); + assert_eq!( + parse_password(password_str).unwrap_err().code, + WolErrCode::InvalidArguments as i32 + ); + + let password_str = "00:11:22:33:44:GG"; + assert!(parse_password(password_str).is_err()); + assert_eq!( + parse_password(password_str).unwrap_err().code, + WolErrCode::InvalidArguments as i32 + ); + + let password_str = "00-01-22-33-44-55"; + assert!(parse_password(password_str).is_err()); + assert_eq!( + parse_password(password_str).unwrap_err().code, + WolErrCode::InvalidArguments as i32 + ); + } + + #[test] + fn test_parse_target_macs() { + let mut args = WolArgs { + interface: "Ethernet10".to_string(), + target_mac: "00:11:22:33:44:55".to_string(), + broadcast: false, + password: None, + count: 1, + interval: 0, + verbose: false, + }; + let target_macs = parse_target_macs(&args).unwrap(); + assert_eq!(target_macs.len(), 1); + assert_eq!(target_macs[0], [0x00, 0x11, 0x22, 0x33, 0x44, 0x55]); + + args.target_mac = "00:11:22:33:44:55,11:22:33:44:55:66,22:33:44:55:66:77".to_string(); + let target_macs = parse_target_macs(&args).unwrap(); + assert_eq!(target_macs.len(), 3); + assert_eq!(target_macs[0], [0x00, 0x11, 0x22, 0x33, 0x44, 0x55]); + assert_eq!(target_macs[1], [0x11, 0x22, 0x33, 0x44, 0x55, 0x66]); + assert_eq!(target_macs[2], [0x22, 0x33, 0x44, 0x55, 0x66, 0x77]); + + args.target_mac = "00:01".to_string(); + assert!(parse_target_macs(&args).is_err()); + assert_eq!( + parse_target_macs(&args).unwrap_err().msg, + "Invalid MAC address" + ); + assert_eq!( + parse_target_macs(&args).unwrap_err().code, + WolErrCode::InvalidArguments as i32 + ); + } + + #[test] + fn test_is_mac_string_valid() { + assert!(is_mac_string_valid("00:11:22:33:44:55")); + assert!(!is_mac_string_valid("")); + assert!(!is_mac_string_valid("0:1:2:3:4:G")); + assert!(!is_mac_string_valid("00:11:22:33:44:GG")); + assert!(!is_mac_string_valid("00-11-22-33-44-55")); + assert!(!is_mac_string_valid("00:11:22:33:44:55:66")); + } + + #[test] + fn test_is_ipv4_address_valid() { + assert!(is_ipv4_address_valid("192.168.1.1")); + assert!(!is_ipv4_address_valid("")); + assert!(!is_ipv4_address_valid("0::1")); + assert!(!is_ipv4_address_valid("192.168.1")); + assert!(!is_ipv4_address_valid("192.168.1.256")); + assert!(!is_ipv4_address_valid("192.168.1.1.1")); + } + + #[test] + fn test_build_magic_packet() { + let src_mac = [0x00, 0x11, 0x22, 0x33, 0x44, 0x55]; + let target_mac = [0xff, 0xff, 0xff, 0xff, 0xff, 0xff]; + let four_bytes_password = Some(Password(vec![0x00, 0x11, 0x22, 0x33])); + let magic_packet = + build_magic_packet(&src_mac, &target_mac, &target_mac, &four_bytes_password).unwrap(); + assert_eq!(magic_packet.len(), 120); + assert_eq!(&magic_packet[0..6], &target_mac); + assert_eq!(&magic_packet[6..12], &src_mac); + assert_eq!(&magic_packet[12..14], &[0x08, 0x42]); + assert_eq!(&magic_packet[14..20], &[0xff; 6]); + assert_eq!(&magic_packet[20..116], target_mac.repeat(16)); + assert_eq!(&magic_packet[116..120], &[0x00, 0x11, 0x22, 0x33]); + let six_bytes_password = Some(Password(vec![0x00, 0x11, 0x22, 0x33, 0x44, 0x55])); + let magic_packet = + build_magic_packet(&src_mac, &target_mac, &target_mac, &six_bytes_password).unwrap(); + assert_eq!(magic_packet.len(), 122); + assert_eq!(&magic_packet[0..6], &target_mac); + assert_eq!(&magic_packet[6..12], &src_mac); + assert_eq!(&magic_packet[12..14], &[0x08, 0x42]); + assert_eq!(&magic_packet[14..20], &[0xff; 6]); + assert_eq!(&magic_packet[20..116], target_mac.repeat(16)); + assert_eq!( + &magic_packet[116..122], + &[0x00, 0x11, 0x22, 0x33, 0x44, 0x55] + ); + } + + #[test] + fn test_build_magic_packet_without_password() { + let src_mac = [0x00, 0x11, 0x22, 0x33, 0x44, 0x55]; + let dst_mac = [0xff, 0xff, 0xff, 0xff, 0xff, 0xff]; + let target_mac = [0x01, 0x02, 0x03, 0x04, 0x05, 0x06]; + let magic_packet = build_magic_packet(&src_mac, &dst_mac, &target_mac, &None).unwrap(); + assert_eq!(magic_packet.len(), 116); + assert_eq!(&magic_packet[0..6], &dst_mac); + assert_eq!(&magic_packet[6..12], &src_mac); + assert_eq!(&magic_packet[12..14], &[0x08, 0x42]); + assert_eq!(&magic_packet[14..20], &[0xff; 6]); + assert_eq!(&magic_packet[20..116], target_mac.repeat(16)); + } + + #[test] + fn verify_args_parse() { + // Interface and target mac are required + let result = WolArgs::try_parse_from(&["wol", "eth0", "00:11:22:33:44:55"]); + assert!(result.as_ref().is_ok_and(|a| a.interface == "eth0")); + assert!(result.is_ok_and(|a| a.target_mac == "00:11:22:33:44:55")); + let result = WolArgs::try_parse_from(&["wol"]); + assert!(result.is_err()); + assert_eq!( + result.unwrap_err().to_string(), + "error: the following required arguments were not provided:\n \n \n\nUsage: wol \n\nFor more information, try '--help'.\n" + ); + // Mac address should valid + let args = + WolArgs::try_parse_from(&["wol", "Ethernet10", "00:11:22:33:44:55,00:01:02:03:04:05"]) + .unwrap(); + let macs = parse_target_macs(&args).unwrap(); + assert_eq!(macs.len(), 2); + assert_eq!(macs[0], [0x00, 0x11, 0x22, 0x33, 0x44, 0x55]); + assert_eq!(macs[1], [0x00, 0x01, 0x02, 0x03, 0x04, 0x05]); + let args = WolArgs::try_parse_from(&["wol", "Ethernet10", "00:11:22:33:44:GG"]).unwrap(); + let result: Result, WolErr> = parse_target_macs(&args); + assert!(result.is_err()); + assert_eq!(result.as_ref().unwrap_err().msg, "Invalid MAC address"); + assert_eq!( + result.unwrap_err().code, + WolErrCode::InvalidArguments as i32 + ); + // Password can be set + let args = WolArgs::try_parse_from(&[ + "wol", + "eth0", + "00:01:02:03:04:05", + "-b", + "-p", + "192.168.0.0", + ]) + .unwrap(); + assert_eq!(args.password.unwrap().ref_bytes(), &[192, 168, 0, 0]); + let args = WolArgs::try_parse_from(&[ + "wol", + "eth0", + "00:01:02:03:04:05", + "-b", + "-p", + "00:01:02:03:04:05", + ]) + .unwrap(); + assert_eq!(args.password.unwrap().ref_bytes(), &[0, 1, 2, 3, 4, 5]); + let result = WolArgs::try_parse_from(&["wol", "eth0", "-b", "-p", "xxx"]); + assert!(result.is_err()); + assert_eq!(result.unwrap_err().to_string(), "error: invalid value 'xxx' for '--password ': Error: Invalid password\n\nFor more information, try '--help'.\n"); + // Count should be between 1 and 5 + let args = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-b"]).unwrap(); + assert_eq!(args.count, 1); // default value + let args = WolArgs::try_parse_from(&[ + "wol", + "eth0", + "00:01:02:03:04:05", + "-b", + "-c", + "5", + "-i", + "0", + ]) + .unwrap(); + assert_eq!(args.count, 5); + let args = WolArgs::try_parse_from(&[ + "wol", + "eth0", + "00:01:02:03:04:05", + "-b", + "-c", + "0", + "-i", + "0", + ]); + let result = valide_arguments(&args.unwrap()); + assert!(result.is_err()); + assert_eq!( + result.unwrap_err().to_string(), + "Error: Invalid value for \"COUNT\": count must between 1 and 5" + ); + // Interval should be between 0 and 2000 + let args = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-b"]).unwrap(); + assert_eq!(args.interval, 0); // default value + let args = WolArgs::try_parse_from(&[ + "wol", + "eth0", + "00:01:02:03:04:05", + "-b", + "-i", + "2000", + "-c", + "0", + ]) + .unwrap(); + assert_eq!(args.interval, 2000); + let args = WolArgs::try_parse_from(&[ + "wol", + "eth0", + "00:01:02:03:04:05", + "-b", + "-i", + "2001", + "-c", + "0", + ]); + let result = valide_arguments(&args.unwrap()); + assert!(result.is_err()); + assert_eq!( + result.unwrap_err().to_string(), + "Error: Invalid value for \"INTERVAL\": interval must between 0 and 2000" + ); + // Interval and count should specified together + let result = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-i", "2000"]); + assert!(result.is_err()); + assert_eq!( + result.unwrap_err().to_string(), + "error: the following required arguments were not provided:\n --count \n\nUsage: wol --interval --count \n\nFor more information, try '--help'.\n" + ); + let result = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-c", "1"]); + assert!(result.is_err()); + assert_eq!( + result.unwrap_err().to_string(), + "error: the following required arguments were not provided:\n --interval \n\nUsage: wol --count --interval \n\nFor more information, try '--help'.\n" + ); + // Verbose can be set + let args = + WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-b", "--verbose"]) + .unwrap(); + assert_eq!(args.verbose, true); + } +} diff --git a/src/sonic-platform-common b/src/sonic-platform-common index cd6a5a42d2d9..174bbd47f0c5 160000 --- a/src/sonic-platform-common +++ b/src/sonic-platform-common @@ -1 +1 @@ -Subproject commit cd6a5a42d2d9e4973afe1bc5d8b1b5ff5f02d54c +Subproject commit 174bbd47f0c5a3b8bd181f79b9e700ffa38906f6 diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons index efb4dbd31006..f581c06cd8ad 160000 --- a/src/sonic-platform-daemons +++ b/src/sonic-platform-daemons @@ -1 +1 @@ -Subproject commit efb4dbd31006f7f0d44069b215c361ef0e1c2bc3 +Subproject commit f581c06cd8adeb4b82816ee0fc38fd07b3f9e692 diff --git a/src/sonic-py-common/setup.py b/src/sonic-py-common/setup.py index 59e7bb0bf1df..d4ae68536414 100644 --- a/src/sonic-py-common/setup.py +++ b/src/sonic-py-common/setup.py @@ -8,7 +8,7 @@ sonic_dependencies = ['redis-dump-load'] dependencies = [ - 'natsort==6.2.1', # 6.2.1 is the last version which supports Python 2 + 'natsort', 'pyyaml', ] diff --git a/src/sonic-py-common/sonic_py_common/syslogger.py b/src/sonic-py-common/sonic_py_common/syslogger.py index b3c8f726502c..c45f0cde8425 100644 --- a/src/sonic-py-common/sonic_py_common/syslogger.py +++ b/src/sonic-py-common/sonic_py_common/syslogger.py @@ -4,13 +4,19 @@ import socket import sys +# customize python logging to support notice logger +logging.NOTICE = logging.INFO + 1 +logging.addLevelName(logging.NOTICE, "NOTICE") +SysLogHandler.priority_map['NOTICE'] = 'notice' + + class SysLogger: """ SysLogger class for Python applications using SysLogHandler """ DEFAULT_LOG_FACILITY = SysLogHandler.LOG_USER - DEFAULT_LOG_LEVEL = SysLogHandler.LOG_NOTICE + DEFAULT_LOG_LEVEL = logging.NOTICE def __init__(self, log_identifier=None, log_facility=DEFAULT_LOG_FACILITY, log_level=DEFAULT_LOG_LEVEL): if log_identifier is None: @@ -53,10 +59,11 @@ def log_warning(self, msg, also_print_to_console=False): self.log(logging.WARNING, msg, also_print_to_console) def log_notice(self, msg, also_print_to_console=False): - self.log(logging.INFO, msg, also_print_to_console) + self.log(logging.NOTICE, msg, also_print_to_console) def log_info(self, msg, also_print_to_console=False): self.log(logging.INFO, msg, also_print_to_console) def log_debug(self, msg, also_print_to_console=False): self.log(logging.DEBUG, msg, also_print_to_console) + \ No newline at end of file diff --git a/src/sonic-py-common/tests/test_syslogger.py b/src/sonic-py-common/tests/test_syslogger.py new file mode 100644 index 000000000000..359120163b3f --- /dev/null +++ b/src/sonic-py-common/tests/test_syslogger.py @@ -0,0 +1,34 @@ +import logging +import os +import sys +from io import StringIO +from contextlib import redirect_stdout + +if sys.version_info.major == 3: + from unittest import mock +else: + import mock + +modules_path = os.path.dirname(os.path.dirname(os.path.abspath(__file__))) +sys.path.insert(0, os.path.join(modules_path, 'sonic_py_common')) +from sonic_py_common import syslogger + + +class TestSysLogger: + def test_notice_log(self, capsys): + """NOTICE is a customize log level, added a test case here to make sure it works in future + """ + log = syslogger.SysLogger() + # remove syslog handler, unit test environment has no rsyslogd + for handler in log.logger.handlers[:]: + log.logger.removeHandler(handler) + + # put a stdout log handler + handler = logging.StreamHandler(sys.stdout) + formatter = logging.Formatter('%(name)s[%(process)d] - %(levelname)s : %(message)s') + handler.setFormatter(formatter) + log.logger.addHandler(handler) + + log.log_notice('this is a message') + captured = capsys.readouterr() + assert 'NOTICE' in captured.out diff --git a/src/sonic-sairedis b/src/sonic-sairedis index 1f2c861aafe7..45ff42c3ca00 160000 --- a/src/sonic-sairedis +++ b/src/sonic-sairedis @@ -1 +1 @@ -Subproject commit 1f2c861aafe751e62ad8510419a4da7c795f4bb5 +Subproject commit 45ff42c3ca002b4426f6dad1fe8fc132be9dece7 diff --git a/src/sonic-snmpagent b/src/sonic-snmpagent index f6529481013d..deb7b7c43c2e 160000 --- a/src/sonic-snmpagent +++ b/src/sonic-snmpagent @@ -1 +1 @@ -Subproject commit f6529481013dbe736246e7c0b34d4851ce515c2c +Subproject commit deb7b7c43c2e9fa26acbac9907443b5d6f7310d2 diff --git a/src/sonic-swss b/src/sonic-swss index 70eb7663280c..42ea859ce982 160000 --- a/src/sonic-swss +++ b/src/sonic-swss @@ -1 +1 @@ -Subproject commit 70eb7663280c7b37a969d6305aa4a24e17e32fa3 +Subproject commit 42ea859ce982b21ff40c78c92a5ab21aafb52fad diff --git a/src/sonic-swss-common b/src/sonic-swss-common index a528c161244d..ea9a2b036d33 160000 --- a/src/sonic-swss-common +++ b/src/sonic-swss-common @@ -1 +1 @@ -Subproject commit a528c161244d7d1c8bfa8687dba2e310a19fc38b +Subproject commit ea9a2b036d334f343b8b3e8b7ecec94e0eaeee5b diff --git a/src/sonic-utilities b/src/sonic-utilities index c2370f88d896..a7897d1fd436 160000 --- a/src/sonic-utilities +++ b/src/sonic-utilities @@ -1 +1 @@ -Subproject commit c2370f88d896abbe9dc7b48acf66ebd2477ecdaa +Subproject commit a7897d1fd43603272f99dd7daaa08dc28f5bda7a diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md index cafc4fcaac16..090bebc39372 100644 --- a/src/sonic-yang-models/doc/Configuration.md +++ b/src/sonic-yang-models/doc/Configuration.md @@ -573,6 +573,7 @@ When the system is running in traditional buffer model, the size of all of the b ``` When the system is running in dynamic buffer model, the size of some of the buffer pools can be omitted and will be dynamically calculated. +In this case, A percentage can be configured on a pool, representing how many the available buffer can be allloced to the pool. ``` { @@ -584,11 +585,12 @@ When the system is running in dynamic buffer model, the size of some of the buff }, "egress_lossy_pool": { "type": "egress", - "mode": "dynamic", + "mode": "dynamic" }, "ingress_lossless_pool": { "type": "ingress", "mode": "dynamic", + "percentage": "80" } } } @@ -1195,7 +1197,9 @@ The FG_NHG_PREFIX table provides the FG_NHG_PREFIX for which FG behavior is desi "monErrThreshCrcCells": "1", "monErrThreshRxCells": "61035156", "monPollThreshIsolation": "1", - "monPollThreshRecovery": "8" + "monPollThreshRecovery": "8", + "monCapacityThreshWarn": "10", + "monState": "enable" } } } @@ -1209,12 +1213,14 @@ The FG_NHG_PREFIX table provides the FG_NHG_PREFIX for which FG behavior is desi "Fabric0": { "alias": "Fabric0", "isolateStatus": "False", - "lanes": "0" + "lanes": "0", + "forceUnisolateStatus": "0" }, "Fabric1": { "alias": "Fabric1", "isolateStatus": "False", - "lanes": "1" + "lanes": "1", + "forceUnisolateStatus": "0" } } } @@ -2332,7 +2338,8 @@ and is listed in this table. "gnmi": { "client_auth": "true", "log_level": "2", - "port": "50051" + "port": "50051", + "save_on_set": "false" } } } diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json index ed1f75c65795..b47805d14004 100644 --- a/src/sonic-yang-models/tests/files/sample_config_db.json +++ b/src/sonic-yang-models/tests/files/sample_config_db.json @@ -36,6 +36,11 @@ "size": "12766208", "type": "egress", "mode": "dynamic" + }, + "ingress_percentage_pool": { + "type": "ingress", + "mode": "dynamic", + "percentage": "90" } }, "BUFFER_PROFILE": { @@ -351,6 +356,7 @@ }, "DEVICE_METADATA": { "localhost": { + "buffer_model": "dynamic", "type": "ToRRouter", "asic_id": "06:00.0", "mac": "00:11:22:33:dd:5a", @@ -1323,6 +1329,14 @@ "port": "50052" } }, + "GNMI_CLIENT_CERT": { + "testcert1": { + "role": "RW" + }, + "testcert2": { + "role": "RO" + } + }, "TUNNEL": { "MuxTunnel0": { "dscp_mode": "uniform", @@ -1372,19 +1386,23 @@ "monErrThreshCrcCells": "1", "monErrThreshRxCells": "61035156", "monPollThreshIsolation": "1", - "monPollThreshRecovery": "8" + "monPollThreshRecovery": "8", + "monCapacityThreshWarn": "10", + "monState": "enable" } }, "FABRIC_PORT": { "Fabric0": { "alias": "Fabric0", "isolateStatus": "False", - "lanes": "0" + "lanes": "0", + "forceUnisolateStatus": "0" }, "Fabric1": { "alias": "Fabric1", "isolateStatus": "False", - "lanes": "1" + "lanes": "1", + "forceUnisolateStatus": "0" } }, "FLEX_COUNTER_TABLE": { @@ -2335,6 +2353,9 @@ "src_mac": "ToRMac", "interval_pck_loss_count_update": "3" }, + "TIMED_OSCILLATION": { + "oscillation_enabled": "false" + }, "MUXLOGGER": { "log_verbosity": "debug" }, diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/buffer_pool.json b/src/sonic-yang-models/tests/yang_model_tests/tests/buffer_pool.json index 974ece55dd79..ff35fc7357d1 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/buffer_pool.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/buffer_pool.json @@ -39,5 +39,23 @@ "BUFFER_POOL_WRONG_SIZE_VALUE": { "desc": "BUFFER_POOL_WRONG_SIZE_VALUE pattern failure.", "eStr": "wrong" + }, + "BUFFER_POOL_CORRECT_PERCENTAGE_VALUE": { + "desc": "BUFFER_POOL_CORRECT_PERCENTAGE_VALUE no failure." + }, + "BUFFER_POOL_CORRECT_LARGE_PERCENTAGE_VALUE": { + "desc": "BUFFER_POOL_CORRECT_PERCENTAGE_VALUE no failure." + }, + "BUFFER_POOL_WRONG_PERCENTAGE_NEGATIVE_VALUE": { + "desc": "BUFFER_POOL_WRONG_PERCENTAGE_NEGATIVE_VALUE pattern failure.", + "eStr": "Invalid value" + }, + "BUFFER_POOL_WRONG_PERCENTAGE_NOT_A_NUMBER_VALUE": { + "desc": "BUFFER_POOL_WRONG_PERCENTAGE_NOT_A_NUMBER_VALUE pattern failure.", + "eStr": "Invalid value" + }, + "BUFFER_POOL_WRONG_PERCENTAGE_VALUE_WITH_SIZE": { + "desc": "BUFFER_POOL_WRONG_PERCENTAGE_VALUE_WITH_SIZE pattern failure.", + "eStr": "Percentage should not be configured along with size" } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json index 3acfff5c42ad..bd3a44c3764f 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json @@ -45,6 +45,9 @@ "DEVICE_METADATA_TYPE_BMC_MGMT_TOR_PATTERN": { "desc": "DEVICE_METADATA value as BmcMgmtToRRouter for Type field" }, + "DEVICE_METADATA_TYPE_SONIC_HOST_PATTERN": { + "desc": "DEVICE_METADATA value as SonicHost for Type field" + }, "DEVICE_METADATA_TYPE_NOT_PROVISIONED_PATTERN": { "desc": "DEVICE_METADATA value as not-provisioned for Type field" }, diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/gnmi.json b/src/sonic-yang-models/tests/yang_model_tests/tests/gnmi.json index 5938290f8a96..56f855eac9a3 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/gnmi.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/gnmi.json @@ -11,7 +11,18 @@ "desc": "TABLE_WITH_INCORRECT_PORT failure.", "eStrKey": "InvalidValue" }, + "GNMI_TABLE_WITH_INCORRECT_SAVE_ON_SET": { + "desc": "TABLE_WITH_INCORRECT_SAVE_ON_SET failure", + "eStrKey": "InvalidValue" + }, "GNMI_TABLE_WITH_VALID_CONFIG": { "desc": "TABLE WITH VALID CONFIG." + }, + "GNMI_CLIENT_CERT_LIST_TABLE_WITH_MISSING_ROLE": { + "desc": "CLIENT_CERT_LIST_TABLE_WITH_MISSING_ROLE failure.", + "eStrKey": "Mandatory" + }, + "GNMI_CLIENT_CERT_LIST_TABLE_WITH_VALID_CONFIG": { + "desc": "TABLE WITH VALID CONFIG." } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/mux-linkmgr.json b/src/sonic-yang-models/tests/yang_model_tests/tests/mux-linkmgr.json index 7c4aeadffddc..050728cb944d 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/mux-linkmgr.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/mux-linkmgr.json @@ -5,10 +5,13 @@ "MUX_LINKMGR_LINK_PROBER_CHANGE_MAC_ADDR": { "desc": "Use well-known mac and vlan mac as dst/src in linkmgrd link prober. " }, + "MUX_LINKMGR_TIMED_OSCILLATION_DISABLE_OSCILLATION": { + "desc": "Disable timed oscillation." + }, "MUX_LINKMGR_MUXLOGGER_CHANGE_VERBOSITY_LEVEL": { "desc": "Consume verbosity level config changes. " }, "MUX_LINKMGR_SERVICE_MGMT_KILL_RADV_DISABLED": { "desc": "Disable feature to kill radv." } -} \ No newline at end of file +} diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/telemetry.json b/src/sonic-yang-models/tests/yang_model_tests/tests/telemetry.json index f79e8ea73272..3329abd874e3 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/telemetry.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/telemetry.json @@ -11,6 +11,10 @@ "desc": "TABLE_WITH_INCORRECT_PORT failure.", "eStrKey": "InvalidValue" }, + "TELEMETRY_TABLE_WITH_INCORRECT_SAVE_ON_SET": { + "desc": "TABLE_WITH_INCORRECT_SAVE_ON_SET failure", + "eStrKey": "InvalidValue" + }, "TELEMETRY_TABLE_WITH_VALID_CONFIG": { "desc": "TABLE WITH VALID CONFIG." } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/buffer_pool.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/buffer_pool.json index a2a4d6fc1f0e..47ce26357d4b 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/buffer_pool.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/buffer_pool.json @@ -167,5 +167,90 @@ ] } } + }, + "BUFFER_POOL_CORRECT_PERCENTAGE_VALUE": { + "sonic-device_metadata:sonic-device_metadata": { + "sonic-device_metadata:DEVICE_METADATA": { + "localhost":{ + "buffer_model": "dynamic" + } + } + }, + "sonic-buffer-pool:sonic-buffer-pool": { + "sonic-buffer-pool:BUFFER_POOL": { + "BUFFER_POOL_LIST": [ + { + "name": "ingress_lossless_pool", + "mode": "dynamic", + "percentage": "99", + "type": "ingress" + } + ] + } + } + }, + "BUFFER_POOL_CORRECT_LARGE_PERCENTAGE_VALUE": { + "sonic-device_metadata:sonic-device_metadata": { + "sonic-device_metadata:DEVICE_METADATA": { + "localhost":{ + "buffer_model": "dynamic" + } + } + }, + "sonic-buffer-pool:sonic-buffer-pool": { + "sonic-buffer-pool:BUFFER_POOL": { + "BUFFER_POOL_LIST": [ + { + "name": "ingress_lossless_pool", + "mode": "dynamic", + "percentage": "200", + "type": "ingress" + } + ] + } + } + }, + "BUFFER_POOL_WRONG_PERCENTAGE_NEGATIVE_VALUE": { + "sonic-buffer-pool:sonic-buffer-pool": { + "sonic-buffer-pool:BUFFER_POOL": { + "BUFFER_POOL_LIST": [ + { + "name": "ingress_lossless_pool", + "mode": "static", + "percentage": "-10", + "type": "ingress" + } + ] + } + } + }, + "BUFFER_POOL_WRONG_PERCENTAGE_NOT_A_NUMBER_VALUE": { + "sonic-buffer-pool:sonic-buffer-pool": { + "sonic-buffer-pool:BUFFER_POOL": { + "BUFFER_POOL_LIST": [ + { + "name": "ingress_lossless_pool", + "mode": "static", + "percentage": "NaN", + "type": "ingress" + } + ] + } + } + }, + "BUFFER_POOL_WRONG_PERCENTAGE_VALUE_WITH_SIZE": { + "sonic-buffer-pool:sonic-buffer-pool": { + "sonic-buffer-pool:BUFFER_POOL": { + "BUFFER_POOL_LIST": [ + { + "name": "ingress_lossless_pool", + "mode": "static", + "percentage": "90", + "size": "12766208", + "type": "ingress" + } + ] + } + } } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json index 74f4d17dd518..3d5adcabc4ea 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json @@ -92,6 +92,16 @@ } } }, + "DEVICE_METADATA_TYPE_SONIC_HOST_PATTERN": { + "sonic-device_metadata:sonic-device_metadata": { + "sonic-device_metadata:DEVICE_METADATA": { + "sonic-device_metadata:localhost": { + "bgp_asn": "65002", + "type": "SonicHost" + } + } + } + }, "DEVICE_METADATA_TYPE_NOT_PROVISIONED_PATTERN": { "sonic-device_metadata:sonic-device_metadata": { "sonic-device_metadata:DEVICE_METADATA": { diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_monitor_data.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_monitor_data.json index ad71aabd9c4c..a7452bf326e4 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_monitor_data.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_monitor_data.json @@ -6,7 +6,9 @@ "monErrThreshCrcCells": "1", "monErrThreshRxCells": "61035156", "monPollThreshIsolation": "1", - "monPollThreshRecovery": "8" + "monPollThreshRecovery": "8", + "monCapacityThreshWarn": "10", + "monState": "enable" } } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_port.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_port.json index 278834826120..401607c92894 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_port.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_port.json @@ -7,7 +7,8 @@ "name": "Fabric0", "alias": "Fabric0", "isolateStatus": "False", - "lanes": "0" + "lanes": "0", + "forceUnisolateStatus": "0" } ] } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json index db121ae3944c..cdad6fe31f53 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json @@ -47,6 +47,23 @@ } } }, + "GNMI_TABLE_WITH_INCORRECT_SAVE_ON_SET": { + "sonic-gnmi:sonic-gnmi": { + "sonic-gnmi:GNMI": { + "certs": { + "ca_crt": "/etc/sonic/credentials/dsmsroot.cer", + "server_crt": "/etc/sonic/credentials/server.cer", + "server_key": "/etc/sonic/credentials/server.key" + }, + "gnmi": { + "client_auth": "true", + "log_level": "2", + "port": "50051", + "save_on_set": "wrong" + } + } + } + }, "GNMI_TABLE_WITH_VALID_CONFIG": { "sonic-gnmi:sonic-gnmi": { "sonic-gnmi:GNMI": { @@ -58,8 +75,36 @@ "gnmi": { "client_auth": "true", "log_level": "2", - "port": "50052" + "port": "50052", + "save_on_set": "false" + } + } + } + }, + "GNMI_CLIENT_CERT_LIST_TABLE_WITH_MISSING_ROLE": { + "sonic-gnmi:sonic-gnmi": { + "sonic-gnmi:GNMI_CLIENT_CERT": { + "GNMI_CLIENT_CERT_LIST": [ + { + "cert_cname": "testcert1" + } + ] + } + } + }, + "GNMI_CLIENT_CERT_LIST_TABLE_WITH_VALID_CONFIG": { + "sonic-gnmi:sonic-gnmi": { + "sonic-gnmi:GNMI_CLIENT_CERT": { + "GNMI_CLIENT_CERT_LIST": [ + { + "cert_cname": "testcert1", + "role": "RW" + }, + { + "cert_cname": "testcert2", + "role": "RO" } + ] } } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/mux-linkmgr.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/mux-linkmgr.json index 1feff4f44038..8a9f9e01c22c 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/mux-linkmgr.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/mux-linkmgr.json @@ -23,6 +23,16 @@ } } }, + "MUX_LINKMGR_TIMED_OSCILLATION_DISABLE_OSCILLATION": { + "sonic-mux-linkmgr:sonic-mux-linkmgr": { + "sonic-mux-linkmgr:MUX_LINKMGR": { + "sonic-mux-linkmgr:TIMED_OSCILLATION": + { + "oscillation_enabled": "false" + } + } + } + }, "MUX_LINKMGR_MUXLOGGER_CHANGE_VERBOSITY_LEVEL": { "sonic-mux-linkmgr:sonic-mux-linkmgr": { "sonic-mux-linkmgr:MUX_LINKMGR": { @@ -43,4 +53,4 @@ } } } -} \ No newline at end of file +} diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-dhcp-relay.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-dhcp-relay.json index 9d68a99c588d..6dcd71d79786 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-dhcp-relay.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-dhcp-relay.json @@ -2,7 +2,7 @@ "SONIC_EVENTS_DHCP_RELAY_DHCP_RELAY_DISCARD_INCORRECT_IFNAME": { "sonic-events-dhcp-relay:sonic-events-dhcp-relay": { "sonic-events-dhcp-relay:dhcp-relay-discard": { - "ifname": "Eth", + "ifname": "@@@!!!", "timestamp": "1985-04-12T23:20:50.52Z" } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/system_port.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/system_port.json index 28edae5727a1..837d5a67797d 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/system_port.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/system_port.json @@ -86,6 +86,82 @@ ] } } + }, + "SYSTEM_ASIC_NAME_UPPERCASE": { + "sonic-system-port:sonic-system-port": { + "sonic-system-port:SYSTEM_PORT": { + "SYSTEM_PORT_LIST": [ + { + "hostname": "host456", + "asic_name": "ASIC0", + "ifname": "Ethernet0", + "core_index": "1", + "core_port_index": "20", + "num_voq": "8", + "speed": "900000", + "switch_id": "1", + "system_port_id": "200" + } + ] + } + } + }, + "SYSTEM_ASIC_NAME_INVALID": { + "sonic-system-port:sonic-system-port": { + "sonic-system-port:SYSTEM_PORT": { + "SYSTEM_PORT_LIST": [ + { + "hostname": "host456", + "asic_name": "INVALIDASIC0", + "ifname": "Ethernet0", + "core_index": "1", + "core_port_index": "20", + "num_voq": "8", + "speed": "900000", + "switch_id": "1", + "system_port_id": "200" + } + ] + } + } + }, + "SYSTEM_ASIC_NAME_SUP": { + "sonic-system-port:sonic-system-port": { + "sonic-system-port:SYSTEM_PORT": { + "SYSTEM_PORT_LIST": [ + { + "hostname": "host456", + "asic_name": "ASIC12", + "ifname": "Ethernet0", + "core_index": "1", + "core_port_index": "20", + "num_voq": "8", + "speed": "900000", + "switch_id": "1", + "system_port_id": "200" + } + ] + } + } + }, + "SYSTEM_ASIC_NAME_MIXED_CASE": { + "sonic-system-port:sonic-system-port": { + "sonic-system-port:SYSTEM_PORT": { + "SYSTEM_PORT_LIST": [ + { + "hostname": "host456", + "asic_name": "Asic2", + "ifname": "Ethernet0", + "core_index": "1", + "core_port_index": "20", + "num_voq": "8", + "speed": "900000", + "switch_id": "1", + "system_port_id": "200" + } + ] + } + } } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry.json index 1231a4cee662..18e708262e74 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry.json @@ -47,6 +47,23 @@ } } }, + "TELEMETRY_TABLE_WITH_INCORRECT_SAVE_ON_SET": { + "sonic-telemetry:sonic-telemetry": { + "sonic-telemetry:TELEMETRY": { + "certs": { + "ca_crt": "/etc/sonic/telemetry/dsmsroot.cer", + "server_crt": "/etc/sonic/telemetry/streamingtelemetryserver.cer", + "server_key": "/etc/sonic/telemetry/streamingtelemetryserver.key" + }, + "gnmi": { + "client_auth": "true", + "log_level": "2", + "port": "50051", + "save_on_set": "wrong" + } + } + } + }, "TELEMETRY_TABLE_WITH_VALID_CONFIG": { "sonic-telemetry:sonic-telemetry": { "sonic-telemetry:TELEMETRY": { @@ -58,7 +75,8 @@ "gnmi": { "client_auth": "true", "log_level": "2", - "port": "50051" + "port": "50051", + "save_on_set": "false" } } } diff --git a/src/sonic-yang-models/yang-models/sonic-buffer-pool.yang b/src/sonic-yang-models/yang-models/sonic-buffer-pool.yang index dd8c74c13ab5..174e6b2a0b38 100644 --- a/src/sonic-yang-models/yang-models/sonic-buffer-pool.yang +++ b/src/sonic-yang-models/yang-models/sonic-buffer-pool.yang @@ -2,6 +2,10 @@ module sonic-buffer-pool { namespace "http://github.com/sonic-net/sonic-buffer-pool"; prefix bpl; + import sonic-device_metadata { + prefix device_metadata; + } + organization "SONiC"; @@ -57,6 +61,20 @@ module sonic-buffer-pool { type uint64; description "Buffer Pool Xoff Threshold (in Bytes)"; } + + leaf percentage { + type uint8; + description " + Buffer Pool percentage. + The buffer pool size will be available_buffer * percentage / 100 if percentage is provided. + It is valid in dynamic buffer model only."; + must "(not(current()/../size))" { + error-message "Percentage should not be configured along with size"; + } + must "/device_metadata:sonic-device_metadata/device_metadata:DEVICE_METADATA/device_metadata:localhost/device_metadata:buffer_model = 'dynamic'" { + error-message "Percentage must be configured in dynamic buffer model"; + } + } } } } diff --git a/src/sonic-yang-models/yang-models/sonic-buffer-queue.yang b/src/sonic-yang-models/yang-models/sonic-buffer-queue.yang index 3e96db23c16c..685ed026dbfa 100644 --- a/src/sonic-yang-models/yang-models/sonic-buffer-queue.yang +++ b/src/sonic-yang-models/yang-models/sonic-buffer-queue.yang @@ -84,9 +84,7 @@ module sonic-buffer-queue { } leaf asic_name { - type string { - pattern "[Aa]sic[0-4]"; - } + type stypes:asic_name; } leaf port { diff --git a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang index 61f6888ded6d..5c5abdeb1a6f 100644 --- a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang +++ b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang @@ -100,7 +100,7 @@ module sonic-device_metadata { leaf type { type string { length 1..255; - pattern "ToRRouter|LeafRouter|SpineChassisFrontendRouter|ChassisBackendRouter|ASIC|MgmtToRRouter|SpineRouter|BackEndToRRouter|BackEndLeafRouter|EPMS|MgmtTsToR|BmcMgmtToRRouter|not-provisioned"; + pattern "ToRRouter|LeafRouter|SpineChassisFrontendRouter|ChassisBackendRouter|ASIC|MgmtToRRouter|SpineRouter|BackEndToRRouter|BackEndLeafRouter|EPMS|MgmtTsToR|BmcMgmtToRRouter|SonicHost|not-provisioned"; } } diff --git a/src/sonic-yang-models/yang-models/sonic-events-dhcp-relay.yang b/src/sonic-yang-models/yang-models/sonic-events-dhcp-relay.yang index 4b83c14b4ee7..e38b70e8227d 100644 --- a/src/sonic-yang-models/yang-models/sonic-events-dhcp-relay.yang +++ b/src/sonic-yang-models/yang-models/sonic-events-dhcp-relay.yang @@ -41,7 +41,7 @@ module sonic-events-dhcp-relay { leaf ifname { type string { - pattern 'Ethernet[0-9]{1,3}'; + pattern '[a-zA-Z0-9]+'; } description "Name of the i/f discarding"; } diff --git a/src/sonic-yang-models/yang-models/sonic-fabric-monitor.yang b/src/sonic-yang-models/yang-models/sonic-fabric-monitor.yang index 0c0464ab965d..e9730496738b 100644 --- a/src/sonic-yang-models/yang-models/sonic-fabric-monitor.yang +++ b/src/sonic-yang-models/yang-models/sonic-fabric-monitor.yang @@ -5,6 +5,10 @@ module sonic-fabric-monitor{ namespace "http://github.com/sonic-net/sonic-fabric-monitor"; prefix fabric-monitor; + import sonic-types { + prefix stypes; + } + description "FABRIC_MONITOR yang Module for SONiC OS"; revision 2023-03-14 { @@ -32,17 +36,35 @@ module sonic-fabric-monitor{ } leaf monPollThreshIsolation { - type uint32; + type uint8 { + range 1..10; + } default 1; description "Consecutive polls with higher error rate for isolation."; } leaf monPollThreshRecovery { - type uint32; + type uint8 { + range 1..10; + } default 8; description "Consecutive polls with lesser error rate for inclusion."; } + leaf monCapacityThreshWarn { + type uint8 { + range 5..100; + } + default 10; + description "Percentage of up fabric links."; + } + + leaf monState { + description "Configuration to set fabric link monitoring state: enable/disable"; + type stypes:mode-status; + default disable; + } + } /* end of container FABRIC_MONITOR_DATA */ } /* end of container FABRIC_MONITOR */ diff --git a/src/sonic-yang-models/yang-models/sonic-fabric-port.yang b/src/sonic-yang-models/yang-models/sonic-fabric-port.yang index f2266507deef..92b384ab7a98 100644 --- a/src/sonic-yang-models/yang-models/sonic-fabric-port.yang +++ b/src/sonic-yang-models/yang-models/sonic-fabric-port.yang @@ -52,6 +52,12 @@ module sonic-fabric-port{ } } + leaf forceUnisolateStatus { + description "Force unisolate status of a fabric port"; + type uint32; + default 0; + } + } /* end of list FABRIC_PORT_LIST */ } /* end of container FABRIC_PORT */ diff --git a/src/sonic-yang-models/yang-models/sonic-feature.yang b/src/sonic-yang-models/yang-models/sonic-feature.yang index 3ca32ad6a955..6939f0044920 100644 --- a/src/sonic-yang-models/yang-models/sonic-feature.yang +++ b/src/sonic-yang-models/yang-models/sonic-feature.yang @@ -29,6 +29,11 @@ module sonic-feature{ type string; } + typedef feature-delay-status { + description "configuration to set the feature has delay scope as True/False"; + type string; + } + container sonic-feature { container FEATURE { @@ -60,7 +65,7 @@ module sonic-feature{ leaf delayed { description "This configuration identicates if the feature needs to be delayed until system initialization"; - type stypes:boolean_type; + type feature-delay-status; default "false"; } diff --git a/src/sonic-yang-models/yang-models/sonic-gnmi.yang b/src/sonic-yang-models/yang-models/sonic-gnmi.yang index 1d6b228266b8..f7c4fef33c53 100644 --- a/src/sonic-yang-models/yang-models/sonic-gnmi.yang +++ b/src/sonic-yang-models/yang-models/sonic-gnmi.yang @@ -71,8 +71,34 @@ module sonic-gnmi { description "Port gnmi runs on."; } + leaf save_on_set { + type boolean; + description "Flag for enabling save on set."; + } + } + } + + container GNMI_CLIENT_CERT { + description "GNMI client cert list"; + list GNMI_CLIENT_CERT_LIST { + max-elements 8; + key "cert_cname"; + + leaf cert_cname { + type string; + description + "client cert common name"; + } + + leaf role { + type string; + mandatory true; + description + "role of client cert common name"; + } + } } } } diff --git a/src/sonic-yang-models/yang-models/sonic-mux-linkmgr.yang b/src/sonic-yang-models/yang-models/sonic-mux-linkmgr.yang index d7b07ed7335b..001ec4298ed6 100644 --- a/src/sonic-yang-models/yang-models/sonic-mux-linkmgr.yang +++ b/src/sonic-yang-models/yang-models/sonic-mux-linkmgr.yang @@ -84,6 +84,22 @@ module sonic-mux-linkmgr { } } + container TIMED_OSCILLATION { + + leaf oscillation_enabled { + type boolean; + default true; + description "Flag to enable/disable timed oscillation. "; + } + + leaf interval_sec { + type uint32; + default 300; + units seconds; + description "Interval between MUX oscillations. "; + } + } + container MUXLOGGER { leaf log_verbosity { @@ -114,4 +130,4 @@ module sonic-mux-linkmgr { } } } -} \ No newline at end of file +} diff --git a/src/sonic-yang-models/yang-models/sonic-queue.yang b/src/sonic-yang-models/yang-models/sonic-queue.yang index e491a50b01d2..453950f8b944 100644 --- a/src/sonic-yang-models/yang-models/sonic-queue.yang +++ b/src/sonic-yang-models/yang-models/sonic-queue.yang @@ -105,9 +105,7 @@ module sonic-queue { } leaf asic_name { - type string { - pattern "[Aa]sic[0-4]"; - } + type stypes:asic_name; } leaf ifname { diff --git a/src/sonic-yang-models/yang-models/sonic-system-port.yang b/src/sonic-yang-models/yang-models/sonic-system-port.yang index f95405ac662f..25d18e9a5515 100644 --- a/src/sonic-yang-models/yang-models/sonic-system-port.yang +++ b/src/sonic-yang-models/yang-models/sonic-system-port.yang @@ -34,9 +34,7 @@ module sonic-system-port { } leaf asic_name { - type string { - pattern "[Aa]sic[0-4]"; - } + type stypes:asic_name; } leaf ifname { diff --git a/src/sonic-yang-models/yang-models/sonic-telemetry.yang b/src/sonic-yang-models/yang-models/sonic-telemetry.yang index d3d7600a8e98..5cbdf2bd9330 100644 --- a/src/sonic-yang-models/yang-models/sonic-telemetry.yang +++ b/src/sonic-yang-models/yang-models/sonic-telemetry.yang @@ -71,6 +71,11 @@ module sonic-telemetry { description "Port gnmi runs on."; } + leaf save_on_set { + type boolean; + description "Flag for enabling save on set."; + } + } } diff --git a/src/sonic-yang-models/yang-templates/sonic-types.yang.j2 b/src/sonic-yang-models/yang-templates/sonic-types.yang.j2 index 6d3d3db00526..df9b3c91dd8f 100644 --- a/src/sonic-yang-models/yang-templates/sonic-types.yang.j2 +++ b/src/sonic-yang-models/yang-templates/sonic-types.yang.j2 @@ -386,6 +386,12 @@ module sonic-types { } } + typedef asic_name { + type string { + pattern '[Aa][Ss][Ii][Cc][0-9]{1,2}'; + } + } + {% if yang_model_type == "cvl" %} /* Required for CVL */ container operation { diff --git a/src/sonic-ztp b/src/sonic-ztp index 56cebaeec285..b4cdd8c58bc4 160000 --- a/src/sonic-ztp +++ b/src/sonic-ztp @@ -1 +1 @@ -Subproject commit 56cebaeec285c74ef531fa7b8436febe85547608 +Subproject commit b4cdd8c58bc419f37b91e783b357bff4c5174536 diff --git a/src/system-health/health_checker/service_checker.py b/src/system-health/health_checker/service_checker.py index bc38bd43a929..10ec7e678595 100644 --- a/src/system-health/health_checker/service_checker.py +++ b/src/system-health/health_checker/service_checker.py @@ -15,6 +15,19 @@ EVENTS_PUBLISHER_SOURCE = "sonic-events-host" EVENTS_PUBLISHER_TAG = "process-not-running" +def check_docker_image(image_name): + """ + @summary: This function will check if docker image exists. + @return: True if the image exists, otherwise False. + """ + try: + DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock') + DOCKER_CLIENT.images.get(image_name) + return True + except (docker.errors.ImageNotFound, docker.errors.APIError) as err: + logger.log_warning("Failed to get image '{}'. Error: '{}'".format(image_name, err)) + return False + class ServiceChecker(HealthChecker): """ Checker that checks critical system service status via monit service. @@ -84,21 +97,39 @@ def get_expected_running_containers(self, feature_table): # it will be removed from exception list. run_all_instance_list = ['database', 'bgp'] - for feature_name, feature_entry in feature_table.items(): + container_list = [] + for container_name in feature_table.keys(): + # slim image does not have telemetry container and corresponding docker image + if container_name == "telemetry": + ret = check_docker_image("docker-sonic-telemetry") + if not ret: + # If telemetry container image is not present, check gnmi container image + # If gnmi container image is not present, ignore telemetry container check + # if gnmi container image is present, check gnmi container instead of telemetry + ret = check_docker_image("docker-sonic-gnmi") + if not ret: + logger.log_debug("Ignoring telemetry container check on image which has no corresponding docker image") + else: + container_list.append("gnmi") + continue + container_list.append(container_name) + + for container_name in container_list: + feature_entry = feature_table[container_name] if feature_entry["state"] not in ["disabled", "always_disabled"]: if multi_asic.is_multi_asic(): if feature_entry.get("has_global_scope", "True") == "True": - expected_running_containers.add(feature_name) - container_feature_dict[feature_name] = feature_name + expected_running_containers.add(container_name) + container_feature_dict[container_name] = container_name if feature_entry.get("has_per_asic_scope", "False") == "True": num_asics = multi_asic.get_num_asics() for asic_id in range(num_asics): - if asic_id in asics_id_presence or feature_name in run_all_instance_list: - expected_running_containers.add(feature_name + str(asic_id)) - container_feature_dict[feature_name + str(asic_id)] = feature_name + if asic_id in asics_id_presence or container_name in run_all_instance_list: + expected_running_containers.add(container_name + str(asic_id)) + container_feature_dict[container_name + str(asic_id)] = container_name else: - expected_running_containers.add(feature_name) - container_feature_dict[feature_name] = feature_name + expected_running_containers.add(container_name) + container_feature_dict[container_name] = container_name if device_info.is_supervisor(): expected_running_containers.add("database-chassis") diff --git a/src/system-health/health_checker/sysmonitor.py b/src/system-health/health_checker/sysmonitor.py index 115dbfbe9ea0..c07b58b5489b 100755 --- a/src/system-health/health_checker/sysmonitor.py +++ b/src/system-health/health_checker/sysmonitor.py @@ -204,20 +204,23 @@ def get_service_from_feature_table(self, dir_list): while max_retry > 0: success = True - feature_table = self.config_db.get_table("FEATURE") - device_config = {} - device_config['DEVICE_METADATA'] = self.config_db.get_table('DEVICE_METADATA') - device_config.update(device_info.get_device_runtime_metadata()) - for srv, fields in feature_table.items(): - if 'state' not in fields: - success = False - logger.log_warning("FEATURE table is not fully ready: {}, retrying".format(feature_table)) - break - state = self.get_render_value_for_field(fields["state"], device_config, ['enabled', 'disabled', 'always_enabled', 'always_disabled']) - if state not in ["disabled", "always_disabled"]: - srvext = srv + ".service" - if srvext not in dir_list: - dir_list.append(srvext) + try: + feature_table = self.config_db.get_table("FEATURE") + device_config = {} + device_config['DEVICE_METADATA'] = self.config_db.get_table('DEVICE_METADATA') + device_config.update(device_info.get_device_runtime_metadata()) + for srv, fields in feature_table.items(): + if 'state' not in fields: + success = False + logger.log_warning("FEATURE table is not fully ready: {}, retrying".format(feature_table)) + break + state = self.get_render_value_for_field(fields["state"], device_config, ['enabled', 'disabled', 'always_enabled', 'always_disabled']) + if state not in ["disabled", "always_disabled"]: + srvext = srv + ".service" + if srvext not in dir_list: + dir_list.append(srvext) + except: + success = False if not success: max_retry -= 1 time.sleep(retry_delay) diff --git a/src/system-health/tests/telemetry/etc/supervisor/critical_processes b/src/system-health/tests/telemetry/etc/supervisor/critical_processes new file mode 100644 index 000000000000..fd693f80070d --- /dev/null +++ b/src/system-health/tests/telemetry/etc/supervisor/critical_processes @@ -0,0 +1 @@ +program:gnmi-native diff --git a/src/system-health/tests/test_system_health.py b/src/system-health/tests/test_system_health.py index ab44fcd66c9d..4aeb3b18f041 100644 --- a/src/system-health/tests/test_system_health.py +++ b/src/system-health/tests/test_system_health.py @@ -12,6 +12,7 @@ import copy import os import sys +import docker from imp import load_source from swsscommon import swsscommon @@ -23,6 +24,7 @@ swsscommon.SonicV2Connector = MockConnector test_path = os.path.dirname(os.path.abspath(__file__)) +telemetry_path = os.path.join(test_path, 'telemetry') modules_path = os.path.dirname(test_path) scripts_path = os.path.join(modules_path, 'scripts') sys.path.insert(0, modules_path) @@ -166,6 +168,53 @@ def test_service_checker_single_asic(mock_config_db, mock_run, mock_docker_clien assert origin_container_critical_processes == checker.container_critical_processes +@patch('swsscommon.swsscommon.ConfigDBConnector.connect', MagicMock()) +@patch('health_checker.service_checker.ServiceChecker._get_container_folder', MagicMock(return_value=telemetry_path)) +@patch('sonic_py_common.multi_asic.is_multi_asic', MagicMock(return_value=False)) +@patch('docker.DockerClient') +@patch('health_checker.utils.run_command') +@patch('swsscommon.swsscommon.ConfigDBConnector') +def test_service_checker_telemetry(mock_config_db, mock_run, mock_docker_client): + setup() + mock_db_data = MagicMock() + mock_get_table = MagicMock() + mock_db_data.get_table = mock_get_table + mock_config_db.return_value = mock_db_data + mock_get_table.return_value = { + 'gnmi': { + 'state': 'enabled', + 'has_global_scope': 'True', + 'has_per_asic_scope': 'False', + + }, + 'telemetry': { + 'state': 'enabled', + 'has_global_scope': 'True', + 'has_per_asic_scope': 'False', + + } + } + mock_containers = MagicMock() + mock_gnmi_container = MagicMock() + mock_gnmi_container.name = 'gnmi' + mock_containers.list = MagicMock(return_value=[mock_gnmi_container]) + mock_docker_client_object = MagicMock() + mock_docker_client.return_value = mock_docker_client_object + mock_docker_client_object.containers = mock_containers + mock_docker_client_object.images = MagicMock() + mock_docker_client_object.images.get = MagicMock() + except_err = docker.errors.ImageNotFound("Unit test") + mock_docker_client_object.images.get.side_effect = [except_err, None] + + mock_run.return_value = "gnmi-native RUNNING pid 67, uptime 1:03:56" + + checker = ServiceChecker() + assert checker.get_category() == 'Services' + config = Config() + checker.check(config) + assert 'gnmi:gnmi-native' in checker._info + assert checker._info['gnmi:gnmi-native'][HealthChecker.INFO_FIELD_OBJECT_STATUS] == HealthChecker.STATUS_OK + @patch('swsscommon.swsscommon.ConfigDBConnector.connect', MagicMock()) @patch('health_checker.service_checker.ServiceChecker._get_container_folder', MagicMock(return_value=test_path)) diff --git a/src/systemd-sonic-generator/ssg-test.cc b/src/systemd-sonic-generator/ssg-test.cc index 99b71b9ba55d..5e336fe2dac6 100644 --- a/src/systemd-sonic-generator/ssg-test.cc +++ b/src/systemd-sonic-generator/ssg-test.cc @@ -53,7 +53,8 @@ const std::string TEST_ASIC_CONF = TEST_PLATFORM_DIR + "asic.conf"; const std::string TEST_PLATFORM_CONF = TEST_PLATFORM_DIR + "platform.json"; const std::string TEST_OUTPUT_DIR = TEST_ROOT_DIR + "generator/"; -const std::string TEST_ETC_NETWORK = TEST_OUTPUT_DIR + "network/"; +const std::string TEST_ETC_NETWORK = TEST_OUTPUT_DIR + "network/"; +const std::string TEST_ETC_SYSTEM = TEST_OUTPUT_DIR + "system/"; const std::string TEST_CONFIG_FILE = TEST_ROOT_DIR + "generated_services.conf"; @@ -167,6 +168,8 @@ class SsgFunctionTest : public SystemdSonicGeneratorFixture { fs::create_directories(path); path = fs::path(TEST_ETC_NETWORK.c_str()); fs::create_directories(path); + path = fs::path(TEST_ETC_SYSTEM.c_str()); + fs::create_directories(path); fp = fopen(TEST_MACHINE_CONF.c_str(), "w"); ASSERT_NE(fp, nullptr); fputs("onie_platform=test_platform", fp); @@ -266,7 +269,8 @@ class SsgMainTest : public SsgFunctionTest { void validate_output_unit_files(std::vector strs, std::string target, bool expected_result, - int num_instances) { + int num_instances, + bool dev_null_as_inexistent = true) { for (std::string str : strs) { bool finished = false; for (int i = 0 ; i < num_instances && !finished; ++i) { @@ -279,9 +283,14 @@ class SsgMainTest : public SsgFunctionTest { finished = true; } fs::path path{TEST_OUTPUT_DIR + target + "/" + str_t}; - char resolved_path[PATH_MAX]; - realpath(path.c_str(), resolved_path); - bool exist = fs::exists(path) && strcmp(resolved_path, "/dev/null") != 0; + bool exist = fs::exists(path); + if (exist) { + char resolved_path[PATH_MAX] = { 0 }; + realpath(path.c_str(), resolved_path); + if (strcmp(resolved_path, "/dev/null") == 0) { + exist = !dev_null_as_inexistent; + } + } EXPECT_EQ(exist, expected_result) << "Failed validation: " << path; } @@ -351,6 +360,8 @@ class SsgMainTest : public SsgFunctionTest { test_target, cfg.is_smart_switch_dpu, cfg.num_dpus); validate_output_unit_files(dpu_network_service_list, "network", cfg.is_smart_switch_dpu, cfg.num_dpus); + validate_output_unit_files(non_smart_switch_service_list, + "system", !cfg.is_smart_switch_npu && !cfg.is_smart_switch_dpu, cfg.num_dpus, false); } /* ssg_main test routine. @@ -432,6 +443,7 @@ class SsgMainTest : public SsgFunctionTest { for (const auto &service : disabled_service) { fs::create_symlink("/dev/null", TEST_ETC_NETWORK + service); } + fs::create_symlink("/dev/null", TEST_ETC_SYSTEM + "systemd-networkd.service"); } /* Restore global vars */ @@ -444,6 +456,7 @@ class SsgMainTest : public SsgFunctionTest { static const std::vector single_asic_service_list; static const std::vector multi_asic_service_list; static const std::vector common_service_list; + static const std::vector non_smart_switch_service_list; static const std::vector npu_service_list; static const std::vector npu_network_service_list; static const std::vector dpu_service_list; @@ -487,6 +500,13 @@ SsgMainTest::common_service_list = { "database.service", }; +/* Systemd service list for non Smart Switch */ +const std::vector +SsgMainTest::non_smart_switch_service_list = { + "systemd-networkd.service" +}; + + /* Systemd service Unit file list for Smart Switch NPU. */ const std::vector SsgMainTest::npu_service_list = { diff --git a/src/systemd-sonic-generator/systemd-sonic-generator.cpp b/src/systemd-sonic-generator/systemd-sonic-generator.cpp index 0569f4dd696e..ffef213cd103 100644 --- a/src/systemd-sonic-generator/systemd-sonic-generator.cpp +++ b/src/systemd-sonic-generator/systemd-sonic-generator.cpp @@ -1076,6 +1076,15 @@ static int install_network_service_for_smart_switch() { network_units++; } + // If the systemd-networkd is masked, unmask it + std::string systemd_networkd = get_etc_systemd() + std::string("/system/systemd-networkd.service"); + if (is_devnull(systemd_networkd.c_str())) { + if (remove(systemd_networkd.c_str()) != 0) { + fprintf(stderr, "Unable to remove existing symlink %s\n", systemd_networkd.c_str()); + return -1; + } + } + return 0; }