From ce937a354bfefdcd18939fe4c86afd51a10f7da1 Mon Sep 17 00:00:00 2001 From: Javier Guerra Date: Thu, 25 Sep 2014 02:44:06 -0500 Subject: [PATCH 1/6] add test for local-only switch features --- src/apps/intel/intel_app.lua | 70 ++++++++++++++++++++++++++++++++++-- 1 file changed, 68 insertions(+), 2 deletions(-) diff --git a/src/apps/intel/intel_app.lua b/src/apps/intel/intel_app.lua index 5ad7b39756..1325f0e8f1 100644 --- a/src/apps/intel/intel_app.lua +++ b/src/apps/intel/intel_app.lua @@ -146,6 +146,20 @@ function selftest () end zone('buffer') buffer.preallocate(100000) zone() + + mq_sw(pcideva) + engine.main({duration = 1, report={showlinks=true, showapps=false}}) + do + local a0Sends = engine.app_table.nicAm0.input.rx.stats.txpackets + local a1Gets = engine.app_table.nicAm1.output.tx.stats.rxpackets + if a1Gets < a0Sends/4 + or a1Gets > a0Sends*3/4 + then + print ('wrong proportion of packets passed/discarded') + os.exit(1) + end + end + sq_sq(pcideva, pcidevb) engine.main({duration = 1, report={showlinks=true, showapps=false}}) @@ -187,6 +201,8 @@ end function sq_sq(pcidevA, pcidevB) engine.configure(config.new()) local c = config.new() + print ('-------') + print ('just send a lot of packets through the wire') config.app(c, 'source1', basic_apps.Source) config.app(c, 'source2', basic_apps.Source) config.app(c, 'nicA', Intel82599, ([[{pciaddr='%s'}]]):format(pcidevA)) @@ -201,7 +217,7 @@ end -- one singlequeue driver and a multiqueue at the other end function mq_sq(pcidevA, pcidevB) - d1 = lib.hexundump ([[ + local d1 = lib.hexundump ([[ 52:54:00:02:02:02 52:54:00:01:01:01 08 00 45 00 00 54 c3 cd 40 00 40 01 f3 23 c0 a8 01 66 c0 a8 01 01 08 00 57 ea 61 1a 00 06 5c ba 16 53 00 00 @@ -210,7 +226,7 @@ function mq_sq(pcidevA, pcidevB) 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 ]], 98) -- src: As dst: Bm0 - d2 = lib.hexundump ([[ + local d2 = lib.hexundump ([[ 52:54:00:03:03:03 52:54:00:01:01:01 08 00 45 00 00 54 c3 cd 40 00 40 01 f3 23 c0 a8 01 66 c0 a8 01 01 08 00 57 ea 61 1a 00 06 5c ba 16 53 00 00 @@ -240,6 +256,7 @@ function mq_sq(pcidevA, pcidevB) vmdq = true, macaddr = '52:54:00:03:03:03', }]]):format(pcidevB)) + print ('-------') print ("Send a bunch of from the SF on NIC A to the VFs on NIC B") print ("half of them go to nicBm0 and nicBm0") config.app(c, 'sink_ms', basic_apps.Sink) @@ -252,3 +269,52 @@ function mq_sq(pcidevA, pcidevB) link.transmit(engine.app_table.source_ms.output.out, packet.from_data(d1)) link.transmit(engine.app_table.source_ms.output.out, packet.from_data(d2)) end + +-- one multiqueue driver with two apps and do switch stuff +function mq_sw(pcidevA) + local d1 = lib.hexundump ([[ + 52:54:00:02:02:02 52:54:00:01:01:01 08 00 45 00 + 00 54 c3 cd 40 00 40 01 f3 23 c0 a8 01 66 c0 a8 + 01 01 08 00 57 ea 61 1a 00 06 5c ba 16 53 00 00 + 00 00 04 15 09 00 00 00 00 00 10 11 12 13 14 15 + 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 + 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 + 36 37 + ]], 98) -- src: Am0 dst: Am1 + local d2 = lib.hexundump ([[ + 52:54:00:03:03:03 52:54:00:01:01:01 08 00 45 00 + 00 54 c3 cd 40 00 40 01 f3 23 c0 a8 01 66 c0 a8 + 01 01 08 00 57 ea 61 1a 00 06 5c ba 16 53 00 00 + 00 00 04 15 09 00 00 00 00 00 10 11 12 13 14 15 + 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 + 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 + 36 37 + ]], 98) -- src: Am0 dst: --- + engine.configure(config.new()) + local c = config.new() + config.app(c, 'source_ms', basic_apps.Join) + config.app(c, 'repeater_ms', basic_apps.Repeater) + config.app(c, 'nicAm0', Intel82599, ([[{ + -- first VF on NIC A + pciaddr = '%s', + vmdq = true, + macaddr = '52:54:00:01:01:01', + }]]):format(pcidevA)) + config.app(c, 'nicAm1', Intel82599, ([[{ + -- second VF on NIC A + pciaddr = '%s', + vmdq = true, + macaddr = '52:54:00:02:02:02', + }]]):format(pcidevA)) + print ('-------') + print ("Send a bunch of packets from Am0") + print ("half of them go to nicAm1 and half go nowhere") + config.app(c, 'sink_ms', basic_apps.Sink) + config.link(c, 'source_ms.out -> repeater_ms.input') + config.link(c, 'repeater_ms.output -> nicAm0.rx') + config.link(c, 'nicAm0.tx -> sink_ms.in1') + config.link(c, 'nicAm1.tx -> sink_ms.in2') + engine.configure(c) + link.transmit(engine.app_table.source_ms.output.out, packet.from_data(d1)) + link.transmit(engine.app_table.source_ms.output.out, packet.from_data(d2)) +end From 3755beabc1b283357972ff674817ad0cf1f56206 Mon Sep 17 00:00:00 2001 From: Javier Guerra Date: Mon, 29 Sep 2014 00:31:59 -0500 Subject: [PATCH 2/6] receive buffer size configurable. ignores given freelist if any buffer is too small --- src/apps/intel/intel10g.lua | 27 ++++++++++++++++----------- src/apps/intel/intel_app.lua | 20 ++++++++++++++++++-- 2 files changed, 34 insertions(+), 13 deletions(-) diff --git a/src/apps/intel/intel10g.lua b/src/apps/intel/intel10g.lua index a34f258f35..954d089007 100644 --- a/src/apps/intel/intel10g.lua +++ b/src/apps/intel/intel10g.lua @@ -51,7 +51,7 @@ function new_sf (pciaddress) end -function M_sf:open () +function M_sf:open (args) pci.set_bus_master(self.pciaddress, true) self.base, self.fd = pci.map_pci_memory(self.pciaddress, 0) register.define(config_registers_desc, self.r, self.base) @@ -60,7 +60,7 @@ function M_sf:open () register.define(statistics_registers_desc, self.s, self.base) self.txpackets = ffi.new("struct packet *[?]", num_descriptors) self.rxbuffers = ffi.new("struct buffer *[?]", num_descriptors) - return self:init() + return self:init(args) end function M_sf:close() @@ -72,7 +72,7 @@ end --- See data sheet section 4.6.3 "Initialization Sequence." -function M_sf:init () +function M_sf:init (args) return self :init_dma_memory() :disable_interrupts() @@ -80,7 +80,7 @@ function M_sf:init () :wait_eeprom_autoread() :wait_dma() :init_statistics() - :init_receive() + :init_receive(args.rx_buffsize) :init_transmit() :wait_enable() end @@ -122,7 +122,7 @@ function M_sf:init_statistics () return self end -function M_sf:init_receive () +function M_sf:init_receive (rx_buffsize) self.r.RXCTRL:clr(bits{RXEN=0}) self:set_promiscuous_mode() -- NB: don't need to program MAC address filter self.r.HLREG0(bits{ @@ -130,13 +130,17 @@ function M_sf:init_receive () rsvd3=11, rsvd4=13, MDCSPD=16, RXLNGTHERREN=27, }) self.r.MAXFRS(lshift(9000+18, 16)) - self:set_receive_descriptors() + self:set_receive_descriptors(rx_buffsize) self.r.RXCTRL:set(bits{RXEN=0}) return self end -function M_sf:set_receive_descriptors () - self.r.SRRCTL(bits({DesctypeLSB=25}, 4)) +function M_sf:set_receive_descriptors (rx_buffsize) + rx_buffsize = math.min(16, math.floor((rx_buffsize or 4096) / 1024)) -- size in KB, max 16KB + assert (rx_buffsize > 0) + self.rx_buffsize = rx_buffsize + + self.r.SRRCTL(bits({DesctypeLSB=25}, rx_buffsize)) self.r.RDBAL(self.rxdesc_phy % 2^32) self.r.RDBAH(self.rxdesc_phy / 2^32) self.r.RDLEN(num_descriptors * ffi.sizeof(rxdesc_t)) @@ -256,6 +260,7 @@ end function M_sf:add_receive_buffer (b) assert(self:can_add_receive_buffer()) + assert(b.size >= self.rx_buffsize) local desc = self.rxdesc[self.rdt].data desc.address, desc.dd = b.physical, 0 self.rxbuffers[self.rdt] = b @@ -518,7 +523,7 @@ end function M_vf:init (opts) return self :init_dma_memory() - :init_receive() + :init_receive(opts.rx_buffsize) :init_transmit() :set_MAC(opts.macaddr) :set_mirror(opts.mirror) @@ -541,11 +546,11 @@ M_vf.can_add_receive_buffer = M_sf.can_add_receive_buffer M_vf.add_receive_buffer = M_sf.add_receive_buffer M_vf.sync_receive = M_sf.sync_receive -function M_vf:init_receive () +function M_vf:init_receive (rx_buffsize) local poolnum = self.poolnum or 0 self.pf.r.PSRTYPE[poolnum](0) -- no splitting, use pool's first queue self.r.RSCCTL(0x0) -- no RSC - self:set_receive_descriptors() + self:set_receive_descriptors(rx_buffsize) self.pf.r.PFVML2FLT[poolnum]:set(bits{MPE=28, BAM=27, AUPE=24}) self.r.RXDCTL(bits{Enable=25, VME=30}) self.r.RXDCTL:wait(bits{enable=25}) diff --git a/src/apps/intel/intel_app.lua b/src/apps/intel/intel_app.lua index 1325f0e8f1..8e764b9961 100644 --- a/src/apps/intel/intel_app.lua +++ b/src/apps/intel/intel_app.lua @@ -38,7 +38,7 @@ function Intel82599:new (args) return setmetatable({dev=vf:open(args)}, Intel82599) else local dev = intel10g.new_sf(args.pciaddr) - :open() + :open(args) :autonegotiate_sfi() :wait_linkup() if not dev then return null end @@ -66,9 +66,25 @@ function Intel82599:stop() end end +-- checks that all buffers in a freelist are big enough +local function all_buffers_ok(fl, minsize) + for i = 0, fl.nfree do + if fl.list[i].size < minsize then + print (string.format( + 'Buffer #%d is only %d bytes, need %d minimum. Rejecting whole list', + i, fl.list[i].size, minsize)) + return false + end + end + return true +end + -- Allocate receive buffers from the given freelist. function Intel82599:set_rx_buffer_freelist (fl) - self.rx_buffer_freelist = fl + if all_buffers_ok(fl, self.dev.rx_buffsize) then + print ('All given buffers ok') + self.rx_buffer_freelist = fl + end end -- Pull in packets from the network and queue them on our 'tx' link. From a969e027061aedcd266fa80a0b701361722c95e6 Mon Sep 17 00:00:00 2001 From: Javier Guerra Date: Mon, 29 Sep 2014 02:36:34 -0500 Subject: [PATCH 3/6] couple silly typos --- src/apps/intel/intel10g.lua | 4 ++-- src/apps/intel/intel_app.lua | 3 +-- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/src/apps/intel/intel10g.lua b/src/apps/intel/intel10g.lua index 954d089007..b0c784e4b2 100644 --- a/src/apps/intel/intel10g.lua +++ b/src/apps/intel/intel10g.lua @@ -137,8 +137,8 @@ end function M_sf:set_receive_descriptors (rx_buffsize) rx_buffsize = math.min(16, math.floor((rx_buffsize or 4096) / 1024)) -- size in KB, max 16KB - assert (rx_buffsize > 0) - self.rx_buffsize = rx_buffsize + assert (rx_buffsize > 0, "rx_buffsize must be more than 1024") + self.rx_buffsize = rx_buffsize * 1024 self.r.SRRCTL(bits({DesctypeLSB=25}, rx_buffsize)) self.r.RDBAL(self.rxdesc_phy % 2^32) diff --git a/src/apps/intel/intel_app.lua b/src/apps/intel/intel_app.lua index 8e764b9961..908c6a8263 100644 --- a/src/apps/intel/intel_app.lua +++ b/src/apps/intel/intel_app.lua @@ -68,7 +68,7 @@ end -- checks that all buffers in a freelist are big enough local function all_buffers_ok(fl, minsize) - for i = 0, fl.nfree do + for i = 1, fl.nfree-1 do if fl.list[i].size < minsize then print (string.format( 'Buffer #%d is only %d bytes, need %d minimum. Rejecting whole list', @@ -82,7 +82,6 @@ end -- Allocate receive buffers from the given freelist. function Intel82599:set_rx_buffer_freelist (fl) if all_buffers_ok(fl, self.dev.rx_buffsize) then - print ('All given buffers ok') self.rx_buffer_freelist = fl end end From 126147d04acc7c65abde984433bd2aefab14abfd Mon Sep 17 00:00:00 2001 From: Javier Guerra Date: Mon, 29 Sep 2014 03:18:29 -0500 Subject: [PATCH 4/6] don't pretest buffers, if anyone doesn't measure up, replace with a freshly allocated one --- src/apps/intel/intel10g.lua | 24 ++++++++++++------------ src/apps/intel/intel_app.lua | 24 +++++++----------------- 2 files changed, 19 insertions(+), 29 deletions(-) diff --git a/src/apps/intel/intel10g.lua b/src/apps/intel/intel10g.lua index b0c784e4b2..ac9111913c 100644 --- a/src/apps/intel/intel10g.lua +++ b/src/apps/intel/intel10g.lua @@ -80,7 +80,7 @@ function M_sf:init (args) :wait_eeprom_autoread() :wait_dma() :init_statistics() - :init_receive(args.rx_buffsize) + :init_receive(args.rx_buffersize) :init_transmit() :wait_enable() end @@ -122,7 +122,7 @@ function M_sf:init_statistics () return self end -function M_sf:init_receive (rx_buffsize) +function M_sf:init_receive (rx_buffersize) self.r.RXCTRL:clr(bits{RXEN=0}) self:set_promiscuous_mode() -- NB: don't need to program MAC address filter self.r.HLREG0(bits{ @@ -130,17 +130,17 @@ function M_sf:init_receive (rx_buffsize) rsvd3=11, rsvd4=13, MDCSPD=16, RXLNGTHERREN=27, }) self.r.MAXFRS(lshift(9000+18, 16)) - self:set_receive_descriptors(rx_buffsize) + self:set_receive_descriptors(rx_buffersize) self.r.RXCTRL:set(bits{RXEN=0}) return self end -function M_sf:set_receive_descriptors (rx_buffsize) - rx_buffsize = math.min(16, math.floor((rx_buffsize or 4096) / 1024)) -- size in KB, max 16KB - assert (rx_buffsize > 0, "rx_buffsize must be more than 1024") - self.rx_buffsize = rx_buffsize * 1024 +function M_sf:set_receive_descriptors (rx_buffersize) + rx_buffersize = math.min(16, math.floor((rx_buffersize or 4096) / 1024)) -- size in KB, max 16KB + assert (rx_buffersize > 0, "rx_buffersize must be more than 1024") + self.rx_buffersize = rx_buffersize * 1024 - self.r.SRRCTL(bits({DesctypeLSB=25}, rx_buffsize)) + self.r.SRRCTL(bits({DesctypeLSB=25}, rx_buffersize)) self.r.RDBAL(self.rxdesc_phy % 2^32) self.r.RDBAH(self.rxdesc_phy / 2^32) self.r.RDLEN(num_descriptors * ffi.sizeof(rxdesc_t)) @@ -260,7 +260,7 @@ end function M_sf:add_receive_buffer (b) assert(self:can_add_receive_buffer()) - assert(b.size >= self.rx_buffsize) + assert(b.size >= self.rx_buffersize) local desc = self.rxdesc[self.rdt].data desc.address, desc.dd = b.physical, 0 self.rxbuffers[self.rdt] = b @@ -523,7 +523,7 @@ end function M_vf:init (opts) return self :init_dma_memory() - :init_receive(opts.rx_buffsize) + :init_receive(opts.rx_buffersize) :init_transmit() :set_MAC(opts.macaddr) :set_mirror(opts.mirror) @@ -546,11 +546,11 @@ M_vf.can_add_receive_buffer = M_sf.can_add_receive_buffer M_vf.add_receive_buffer = M_sf.add_receive_buffer M_vf.sync_receive = M_sf.sync_receive -function M_vf:init_receive (rx_buffsize) +function M_vf:init_receive (rx_buffersize) local poolnum = self.poolnum or 0 self.pf.r.PSRTYPE[poolnum](0) -- no splitting, use pool's first queue self.r.RSCCTL(0x0) -- no RSC - self:set_receive_descriptors(rx_buffsize) + self:set_receive_descriptors(rx_buffersize) self.pf.r.PFVML2FLT[poolnum]:set(bits{MPE=28, BAM=27, AUPE=24}) self.r.RXDCTL(bits{Enable=25, VME=30}) self.r.RXDCTL:wait(bits{enable=25}) diff --git a/src/apps/intel/intel_app.lua b/src/apps/intel/intel_app.lua index 908c6a8263..2bdb85375b 100644 --- a/src/apps/intel/intel_app.lua +++ b/src/apps/intel/intel_app.lua @@ -66,24 +66,9 @@ function Intel82599:stop() end end --- checks that all buffers in a freelist are big enough -local function all_buffers_ok(fl, minsize) - for i = 1, fl.nfree-1 do - if fl.list[i].size < minsize then - print (string.format( - 'Buffer #%d is only %d bytes, need %d minimum. Rejecting whole list', - i, fl.list[i].size, minsize)) - return false - end - end - return true -end - -- Allocate receive buffers from the given freelist. function Intel82599:set_rx_buffer_freelist (fl) - if all_buffers_ok(fl, self.dev.rx_buffsize) then - self.rx_buffer_freelist = fl - end + self.rx_buffer_freelist = fl end -- Pull in packets from the network and queue them on our 'tx' link. @@ -107,7 +92,12 @@ function Intel82599:add_receive_buffers () -- Buffers from a special freelist local fl = self.rx_buffer_freelist while self.dev:can_add_receive_buffer() and freelist.nfree(fl) > 0 do - self.dev:add_receive_buffer(freelist.remove(fl)) + local b = freelist.remove(fl) + if b.size >= self.dev.rx_buffersize then + self.dev:add_receive_buffer(b) + else + self.dev:add_receive_buffer(buffer.allocate()) + end end end end From 1bc97c2809d15f18b3ab0f4466a7253f1b2de7f2 Mon Sep 17 00:00:00 2001 From: Javier Guerra Date: Thu, 2 Oct 2014 02:01:39 -0500 Subject: [PATCH 5/6] adapt buffer size to those offered. free unusable buffers --- src/apps/intel/intel10g.lua | 14 +++++++++++--- src/apps/intel/intel_app.lua | 9 +++++---- 2 files changed, 16 insertions(+), 7 deletions(-) diff --git a/src/apps/intel/intel10g.lua b/src/apps/intel/intel10g.lua index ac9111913c..f8a6bf5580 100644 --- a/src/apps/intel/intel10g.lua +++ b/src/apps/intel/intel10g.lua @@ -135,10 +135,15 @@ function M_sf:init_receive (rx_buffersize) return self end -function M_sf:set_receive_descriptors (rx_buffersize) - rx_buffersize = math.min(16, math.floor((rx_buffersize or 4096) / 1024)) -- size in KB, max 16KB +function M_sf:set_rx_buffersize(rx_buffersize) + rx_buffersize = math.min(16, math.floor((rx_buffersize or 16384) / 1024)) -- size in KB, max 16KB assert (rx_buffersize > 0, "rx_buffersize must be more than 1024") self.rx_buffersize = rx_buffersize * 1024 + return self +end + +function M_sf:set_receive_descriptors (rx_buffersize) + self:set_rx_buffersize(rx_buffersize) self.r.SRRCTL(bits({DesctypeLSB=25}, rx_buffersize)) self.r.RDBAL(self.rxdesc_phy % 2^32) @@ -260,7 +265,9 @@ end function M_sf:add_receive_buffer (b) assert(self:can_add_receive_buffer()) - assert(b.size >= self.rx_buffersize) + if b.size < self.rx_buffersize then + self:set_rx_buffersize(b.size) + end local desc = self.rxdesc[self.rdt].data desc.address, desc.dd = b.physical, 0 self.rxbuffers[self.rdt] = b @@ -543,6 +550,7 @@ M_vf.sync_transmit = M_sf.sync_transmit M_vf.can_receive = M_sf.can_receive M_vf.receive = M_sf.receive M_vf.can_add_receive_buffer = M_sf.can_add_receive_buffer +M_vf.set_rx_buffersize = M_sf.set_rx_buffersize M_vf.add_receive_buffer = M_sf.add_receive_buffer M_vf.sync_receive = M_sf.sync_receive diff --git a/src/apps/intel/intel_app.lua b/src/apps/intel/intel_app.lua index 2bdb85375b..692dd07a6a 100644 --- a/src/apps/intel/intel_app.lua +++ b/src/apps/intel/intel_app.lua @@ -83,6 +83,7 @@ function Intel82599:pull () end function Intel82599:add_receive_buffers () + self.dev:set_rx_buffersize() -- revert to default buffersize (16KB) if self.rx_buffer_freelist == nil then -- Generic buffers while self.dev:can_add_receive_buffer() do @@ -93,11 +94,11 @@ function Intel82599:add_receive_buffers () local fl = self.rx_buffer_freelist while self.dev:can_add_receive_buffer() and freelist.nfree(fl) > 0 do local b = freelist.remove(fl) - if b.size >= self.dev.rx_buffersize then - self.dev:add_receive_buffer(b) - else - self.dev:add_receive_buffer(buffer.allocate()) + if b.size < 1024 then + buffer.free(b) + b = buffer.allocate() end + self.dev:add_receive_buffer(b) end end end From 5d2574bc8850938e3daae0a35b49cf96a998cb8a Mon Sep 17 00:00:00 2001 From: Javier Guerra Date: Fri, 3 Oct 2014 23:51:39 -0500 Subject: [PATCH 6/6] remove rx_buffsize API --- src/apps/intel/intel10g.lua | 24 ++++++++++++------------ src/apps/intel/intel_app.lua | 3 +-- 2 files changed, 13 insertions(+), 14 deletions(-) diff --git a/src/apps/intel/intel10g.lua b/src/apps/intel/intel10g.lua index f8a6bf5580..84f0af1906 100644 --- a/src/apps/intel/intel10g.lua +++ b/src/apps/intel/intel10g.lua @@ -51,7 +51,7 @@ function new_sf (pciaddress) end -function M_sf:open (args) +function M_sf:open () pci.set_bus_master(self.pciaddress, true) self.base, self.fd = pci.map_pci_memory(self.pciaddress, 0) register.define(config_registers_desc, self.r, self.base) @@ -60,7 +60,7 @@ function M_sf:open (args) register.define(statistics_registers_desc, self.s, self.base) self.txpackets = ffi.new("struct packet *[?]", num_descriptors) self.rxbuffers = ffi.new("struct buffer *[?]", num_descriptors) - return self:init(args) + return self:init() end function M_sf:close() @@ -72,7 +72,7 @@ end --- See data sheet section 4.6.3 "Initialization Sequence." -function M_sf:init (args) +function M_sf:init () return self :init_dma_memory() :disable_interrupts() @@ -80,7 +80,7 @@ function M_sf:init (args) :wait_eeprom_autoread() :wait_dma() :init_statistics() - :init_receive(args.rx_buffersize) + :init_receive() :init_transmit() :wait_enable() end @@ -122,7 +122,7 @@ function M_sf:init_statistics () return self end -function M_sf:init_receive (rx_buffersize) +function M_sf:init_receive () self.r.RXCTRL:clr(bits{RXEN=0}) self:set_promiscuous_mode() -- NB: don't need to program MAC address filter self.r.HLREG0(bits{ @@ -130,7 +130,7 @@ function M_sf:init_receive (rx_buffersize) rsvd3=11, rsvd4=13, MDCSPD=16, RXLNGTHERREN=27, }) self.r.MAXFRS(lshift(9000+18, 16)) - self:set_receive_descriptors(rx_buffersize) + self:set_receive_descriptors() self.r.RXCTRL:set(bits{RXEN=0}) return self end @@ -139,13 +139,13 @@ function M_sf:set_rx_buffersize(rx_buffersize) rx_buffersize = math.min(16, math.floor((rx_buffersize or 16384) / 1024)) -- size in KB, max 16KB assert (rx_buffersize > 0, "rx_buffersize must be more than 1024") self.rx_buffersize = rx_buffersize * 1024 + self.r.SRRCTL(bits({DesctypeLSB=25}, rx_buffersize)) return self end -function M_sf:set_receive_descriptors (rx_buffersize) - self:set_rx_buffersize(rx_buffersize) +function M_sf:set_receive_descriptors () + self:set_rx_buffersize(16384) -- start at max - self.r.SRRCTL(bits({DesctypeLSB=25}, rx_buffersize)) self.r.RDBAL(self.rxdesc_phy % 2^32) self.r.RDBAH(self.rxdesc_phy / 2^32) self.r.RDLEN(num_descriptors * ffi.sizeof(rxdesc_t)) @@ -530,7 +530,7 @@ end function M_vf:init (opts) return self :init_dma_memory() - :init_receive(opts.rx_buffersize) + :init_receive() :init_transmit() :set_MAC(opts.macaddr) :set_mirror(opts.mirror) @@ -554,11 +554,11 @@ M_vf.set_rx_buffersize = M_sf.set_rx_buffersize M_vf.add_receive_buffer = M_sf.add_receive_buffer M_vf.sync_receive = M_sf.sync_receive -function M_vf:init_receive (rx_buffersize) +function M_vf:init_receive () local poolnum = self.poolnum or 0 self.pf.r.PSRTYPE[poolnum](0) -- no splitting, use pool's first queue self.r.RSCCTL(0x0) -- no RSC - self:set_receive_descriptors(rx_buffersize) + self:set_receive_descriptors() self.pf.r.PFVML2FLT[poolnum]:set(bits{MPE=28, BAM=27, AUPE=24}) self.r.RXDCTL(bits{Enable=25, VME=30}) self.r.RXDCTL:wait(bits{enable=25}) diff --git a/src/apps/intel/intel_app.lua b/src/apps/intel/intel_app.lua index 692dd07a6a..ff7d4cc665 100644 --- a/src/apps/intel/intel_app.lua +++ b/src/apps/intel/intel_app.lua @@ -38,7 +38,7 @@ function Intel82599:new (args) return setmetatable({dev=vf:open(args)}, Intel82599) else local dev = intel10g.new_sf(args.pciaddr) - :open(args) + :open() :autonegotiate_sfi() :wait_linkup() if not dev then return null end @@ -83,7 +83,6 @@ function Intel82599:pull () end function Intel82599:add_receive_buffers () - self.dev:set_rx_buffersize() -- revert to default buffersize (16KB) if self.rx_buffer_freelist == nil then -- Generic buffers while self.dev:can_add_receive_buffer() do