From 9438b74378b0c31ee1cd0a1177d9dbf8a5223c88 Mon Sep 17 00:00:00 2001 From: sakaki Date: Wed, 29 Jul 2015 10:17:28 +0100 Subject: [PATCH] Copy 8313E21.dts from 2.6.39 patchset also. Was previous reverse-engineered; this is a bit cleaner. --- 0002-Excito-B2-device-tree-source.patch | 364 ++++++++++++++---------- 1 file changed, 208 insertions(+), 156 deletions(-) diff --git a/0002-Excito-B2-device-tree-source.patch b/0002-Excito-B2-device-tree-source.patch index 15d0076..c15d8aa 100644 --- a/0002-Excito-B2-device-tree-source.patch +++ b/0002-Excito-B2-device-tree-source.patch @@ -1,66 +1,85 @@ --- /dev/null +++ arch/powerpc/boot/dts/8313E21.dts -@@ -0,0 +1,344 @@ +@@ -0,0 +1,396 @@ ++/* ++ * MPC8313E RDB Device Tree Source ++ * ++ * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ */ ++ +/dts-v1/; + +/ { + model = "MPC8313ERDB"; + compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB"; -+ #address-cells = <0x1>; -+ #size-cells = <0x1>; ++ #address-cells = <1>; ++ #size-cells = <1>; + + aliases { -+ ethernet0 = "/soc8313@e0000000/ethernet@24000"; -+ ethernet1 = "/soc8313@e0000000/ethernet@25000"; -+ serial0 = "/soc8313@e0000000/serial@4500"; -+ serial1 = "/soc8313@e0000000/serial@4600"; -+ pci0 = "/sleep-nexus/pci@e0008500"; ++ ethernet0 = &enet0; ++ ethernet1 = &enet1; ++ serial0 = &serial0; ++ serial1 = &serial1; ++ pci0 = &pci0; + }; + + cpus { -+ #address-cells = <0x1>; -+ #size-cells = <0x0>; ++ #address-cells = <1>; ++ #size-cells = <0>; + + PowerPC,8313@0 { + device_type = "cpu"; + reg = <0x0>; -+ d-cache-line-size = <0x20>; -+ i-cache-line-size = <0x20>; -+ d-cache-size = <0x4000>; -+ i-cache-size = <0x4000>; -+ timebase-frequency = <0x0>; -+ bus-frequency = <0x0>; -+ clock-frequency = <0x0>; ++ d-cache-line-size = <32>; ++ i-cache-line-size = <32>; ++ d-cache-size = <16384>; ++ i-cache-size = <16384>; ++ timebase-frequency = <0>; // from bootloader ++ bus-frequency = <0>; // from bootloader ++ clock-frequency = <0>; // from bootloader + }; + }; + + memory { + device_type = "memory"; -+ reg = <0x0 0x8000000>; ++ reg = <0x00000000 0x08000000>; // 128MB at 0 + }; + + localbus@e0005000 { -+ #address-cells = <0x2>; -+ #size-cells = <0x1>; ++ #address-cells = <2>; ++ #size-cells = <1>; + compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus"; + reg = <0xe0005000 0x1000>; -+ interrupts = <0x4d 0x8>; -+ interrupt-parent = <0x1>; -+ ranges = <0x0 0x0 0xfe000000 0x800000 0x1 0x0 0xe2800000 0x8000 0x2 0x0 0xf0000000 0x20000 0x3 0x0 0xfa000000 0x8000>; ++ interrupts = <77 0x8>; ++ interrupt-parent = <&ipic>; ++ ++ // CS0 and CS1 are swapped when ++ // booting from nand, but the ++ // addresses are the same. ++ ranges = <0x0 0x0 0xfe000000 0x00800000 ++ 0x1 0x0 0xe2800000 0x00008000 ++ 0x2 0x0 0xf0000000 0x00020000 ++ 0x3 0x0 0xfa000000 0x00008000>; + + flash@0,0 { -+ #address-cells = <0x1>; -+ #size-cells = <0x1>; ++ #address-cells = <1>; ++ #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x800000>; -+ bank-width = <0x2>; -+ device-width = <0x1>; ++ bank-width = <2>; ++ device-width = <1>; + }; + + nand@1,0 { -+ #address-cells = <0x1>; -+ #size-cells = <0x1>; -+ compatible = "fsl,mpc8313-fcm-nand", "fsl,elbc-fcm-nand"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "fsl,mpc8313-fcm-nand", ++ "fsl,elbc-fcm-nand"; + reg = <0x1 0x0 0x2000>; + + u-boot@0 { @@ -79,13 +98,13 @@ + }; + + soc8313@e0000000 { -+ #address-cells = <0x1>; -+ #size-cells = <0x1>; ++ #address-cells = <1>; ++ #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; -+ ranges = <0x0 0xe0000000 0x100000>; -+ reg = <0xe0000000 0x200>; -+ bus-frequency = <0x0>; ++ ranges = <0x0 0xe0000000 0x00100000>; ++ reg = <0xe0000000 0x00000200>; ++ bus-frequency = <0>; + + wdt@200 { + device_type = "watchdog"; @@ -97,26 +116,26 @@ + device_type = "gpio"; + reg = <0xc00 0xff>; + interrupts = <0x4a 0x8>; -+ interrupt-parent = <0x1>; ++ interrupt-parent = < &ipic >; + }; + ++ + sleep-nexus { -+ #address-cells = <0x1>; -+ #size-cells = <0x1>; ++ #address-cells = <1>; ++ #size-cells = <1>; + compatible = "simple-bus"; -+ sleep = <0x2 0x3000000>; ++ sleep = <&pmc 0x03000000>; + ranges; + + i2c@3000 { -+ #address-cells = <0x1>; -+ #size-cells = <0x0>; -+ cell-index = <0x0>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; -+ interrupts = <0xe 0x8>; -+ interrupt-parent = <0x1>; ++ interrupts = <14 0x8>; ++ interrupt-parent = <&ipic>; + dfsrr; -+ + rtc@6f { + compatible = "dallas,isl1208"; + reg = <0x6f>; @@ -124,223 +143,256 @@ + }; + + crypto@30000 { -+ compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; ++ compatible = "fsl,sec2.2", "fsl,sec2.1", ++ "fsl,sec2.0"; + reg = <0x30000 0x10000>; -+ interrupts = <0xb 0x8>; -+ interrupt-parent = <0x1>; -+ fsl,num-channels = <0x1>; -+ fsl,channel-fifo-len = <0x18>; ++ interrupts = <11 0x8>; ++ interrupt-parent = <&ipic>; ++ fsl,num-channels = <1>; ++ fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x4c>; -+ fsl,descriptor-types-mask = <0x122003f>; ++ fsl,descriptor-types-mask = <0x0122003f>; + }; + }; + + i2c@3100 { -+ #address-cells = <0x1>; -+ #size-cells = <0x0>; -+ cell-index = <0x1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; -+ interrupts = <0xf 0x8>; -+ interrupt-parent = <0x1>; ++ interrupts = <15 0x8>; ++ interrupt-parent = <&ipic>; + dfsrr; + }; + + spi@7000 { -+ cell-index = <0x0>; ++ cell-index = <0>; + compatible = "fsl,spi"; + reg = <0x7000 0x1000>; -+ interrupts = <0x10 0x8>; -+ interrupt-parent = <0x1>; ++ interrupts = <16 0x8>; ++ interrupt-parent = <&ipic>; + mode = "cpu"; + }; + ++ /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ + usb@23000 { + compatible = "fsl-usb2-dr"; + reg = <0x23000 0x1000>; -+ #address-cells = <0x1>; -+ #size-cells = <0x0>; -+ interrupt-parent = <0x1>; -+ interrupts = <0x26 0x8>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ interrupt-parent = <&ipic>; ++ interrupts = <38 0x8>; + phy_type = "utmi_wide"; -+ sleep = <0x2 0x300000>; ++ sleep = <&pmc 0x00300000>; + }; + -+ ethernet@24000 { -+ #address-cells = <0x1>; -+ #size-cells = <0x1>; -+ sleep = <0x2 0x20000000>; ++ enet0: ethernet@24000 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ sleep = <&pmc 0x20000000>; + ranges = <0x0 0x24000 0x1000>; -+ cell-index = <0x0>; ++ ++ cell-index = <0>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar", "simple-bus"; + reg = <0x24000 0x1000>; -+ local-mac-address = [00 00 00 00 00 00]; -+ interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>; -+ interrupt-parent = <0x1>; -+ phy-handle = <0x3>; ++ local-mac-address = [ 00 00 00 00 00 00 ]; ++ interrupts = <32 0x8 33 0x8 34 0x8>; ++ interrupt-parent = <&ipic>; ++ phy-handle = < &phy1 >; + fsl,magic-packet; + + mdio@520 { -+ #address-cells = <0x1>; -+ #size-cells = <0x0>; ++ #address-cells = <1>; ++ #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x520 0x20>; -+ -+ ethernet-phy@1 { -+ interrupt-parent = <0x1>; -+ interrupts = <0x30 0x8>; ++ phy1: ethernet-phy@1 { ++ interrupt-parent = <&ipic>; ++ interrupts = <48 0x8>; //IRQ0 + reg = <0x1>; + device_type = "ethernet-phy"; -+ linux,phandle = <0x3>; + }; -+ -+ ethernet-phy@0 { -+ interrupt-parent = <0x1>; -+ interrupts = <0x11 0x8>; ++ phy0: ethernet-phy@0 { ++ interrupt-parent = <&ipic>; ++ interrupts = <17 0x8>; //IRQ1 + reg = <0x0>; + device_type = "ethernet-phy"; -+ linux,phandle = <0x4>; + }; + }; + }; + -+ ethernet@25000 { -+ #address-cells = <0x1>; -+ #size-cells = <0x1>; ++ enet1: ethernet@25000 { ++ #address-cells = <1>; ++ #size-cells = <1>; + ranges = <0x0 0x25000 0x1000>; -+ cell-index = <0x1>; ++ ++ cell-index = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar", "simple-bus"; + reg = <0x25000 0x1000>; -+ local-mac-address = [00 00 00 00 00 00]; -+ interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>; -+ interrupt-parent = <0x1>; -+ phy-handle = <0x4>; -+ sleep = <0x2 0x10000000>; ++ local-mac-address = [ 00 00 00 00 00 00 ]; ++ interrupts = <35 0x8 36 0x8 37 0x8>; ++ interrupt-parent = <&ipic>; ++ phy-handle = < &phy0 >; ++ sleep = <&pmc 0x10000000>; + fsl,magic-packet; + }; + -+ serial@4500 { -+ cell-index = <0x0>; ++ serial0: serial@4500 { ++ cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; -+ clock-frequency = <0x0>; -+ interrupts = <0x9 0x8>; -+ interrupt-parent = <0x1>; ++ clock-frequency = <0>; ++ interrupts = <9 0x8>; ++ interrupt-parent = <&ipic>; + }; + -+ serial@4600 { -+ cell-index = <0x1>; ++ serial1: serial@4600 { ++ cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; -+ clock-frequency = <0x0>; -+ interrupts = <0xa 0x8>; -+ interrupt-parent = <0x1>; ++ clock-frequency = <0>; ++ interrupts = <10 0x8>; ++ interrupt-parent = <&ipic>; + }; + -+ pic@700 { ++ /* IPIC ++ * interrupts cell = ++ * sense values match linux IORESOURCE_IRQ_* defines: ++ * sense == 8: Level, low assertion ++ * sense == 2: Edge, high-to-low change ++ */ ++ ipic: pic@700 { + interrupt-controller; -+ #address-cells = <0x0>; -+ #interrupt-cells = <0x2>; ++ #address-cells = <0>; ++ #interrupt-cells = <2>; + reg = <0x700 0x100>; + device_type = "ipic"; -+ linux,phandle = <0x1>; + }; + -+ power@b00 { ++ pmc: power@b00 { + compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc"; + reg = <0xb00 0x100 0xa00 0x100>; -+ interrupts = <0x50 0x8>; -+ interrupt-parent = <0x1>; -+ fsl,mpc8313-wakeup-timer = <0x5>; ++ interrupts = <80 8>; ++ interrupt-parent = <&ipic>; ++ fsl,mpc8313-wakeup-timer = <>m1>; ++ ++ /* Remove this (or change to "okay") if you have ++ * a REVA3 or later board, if you apply one of the ++ * workarounds listed in section 8.5 of the board ++ * manual, or if you are adapting this device tree ++ * to a different board. ++ */ + status = "fail"; -+ linux,phandle = <0x2>; + }; + -+ timer@500 { ++ gtm1: timer@500 { + compatible = "fsl,mpc8313-gtm", "fsl,gtm"; + reg = <0x500 0x100>; -+ interrupts = <0x5a 0x8 0x4e 0x8 0x54 0x8 0x48 0x8>; -+ interrupt-parent = <0x1>; -+ linux,phandle = <0x5>; ++ interrupts = <90 8 78 8 84 8 72 8>; ++ interrupt-parent = <&ipic>; + }; + + timer@600 { + compatible = "fsl,mpc8313-gtm", "fsl,gtm"; + reg = <0x600 0x100>; -+ interrupts = <0x5b 0x8 0x4f 0x8 0x55 0x8 0x49 0x8>; -+ interrupt-parent = <0x1>; ++ interrupts = <91 8 79 8 85 8 73 8>; ++ interrupt-parent = <&ipic>; + }; + }; + + sleep-nexus { -+ #address-cells = <0x1>; -+ #size-cells = <0x1>; ++ #address-cells = <1>; ++ #size-cells = <1>; + compatible = "simple-bus"; -+ sleep = <0x2 0x10000>; ++ sleep = <&pmc 0x00010000>; + ranges; + -+ pci@e0008500 { -+ cell-index = <0x1>; ++ pci0: pci@e0008500 { ++ cell-index = <1>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; -+ interrupt-map = <0x7000 0x0 0x0 0x1 0x1 0x12 0x8 0x7000 0x0 0x0 0x2 0x1 0x13 0x8 0x7000 0x0 0x0 0x3 0x1 0x12 0x8 0x7000 0x0 0x0 0x4 0x1 0x13 0x8 0x8000 0x0 0x0 0x1 0x1 0x14 0x8 0x8000 0x0 0x0 0x2 0x1 0x14 0x8 0x8000 0x0 0x0 0x3 0x1 0x14 0x8 0x8000 0x0 0x0 0x4 0x1 0x14 0x8>; -+ interrupt-parent = <0x1>; -+ interrupts = <0x42 0x8>; ++ interrupt-map = < ++ // 3 first numbers pci device specifier are: (buss << 16 | id_sel << 11) 0 0 ++ // Next number is interrupt-ID. ID 17 (0x11) = IRQ1 etc. 1-4 mapped A-D ++ // Last two numbers are host interrupt specifier ++ ++ /* IDSEL 0x0E -mini PCI */ ++ 0x7000 0x0 0x0 0x1 &ipic 18 0x8 //IRQ2 (ID18 = 0x12) ++ 0x7000 0x0 0x0 0x2 &ipic 19 0x8 //IRQ3 (ID19 = 0x13) ++ 0x7000 0x0 0x0 0x3 &ipic 18 0x8 ++ 0x7000 0x0 0x0 0x4 &ipic 19 0x8 ++ ++ /* IDSEL 0x10 - SATA */ ++ 0x8000 0x0 0x0 0x1 &ipic 20 0x8 //IRQ4 (ID20 = 0x14) ++ 0x8000 0x0 0x0 0x2 &ipic 20 0x8 ++ 0x8000 0x0 0x0 0x3 &ipic 20 0x8 ++ 0x8000 0x0 0x0 0x4 &ipic 20 0x8>; ++ ++ interrupt-parent = <&ipic>; ++ interrupts = <66 0x8>; + bus-range = <0x0 0x0>; -+ ranges = <0x2000000 0x0 0x90000000 0x90000000 0x0 0x10000000 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>; -+ clock-frequency = <0x3f940aa>; -+ #interrupt-cells = <0x1>; -+ #size-cells = <0x2>; -+ #address-cells = <0x3>; -+ reg = <0xe0008500 0x100 0xe0008300 0x8>; ++ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 ++ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 ++ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; ++ clock-frequency = <66666666>; ++ #interrupt-cells = <1>; ++ #size-cells = <2>; ++ #address-cells = <3>; ++ reg = <0xe0008500 0x100 /* internal registers */ ++ 0xe0008300 0x8>; /* config space access registers */ + compatible = "fsl,mpc8349-pci"; + device_type = "pci"; + }; + + dma@82a8 { -+ #address-cells = <0x1>; -+ #size-cells = <0x1>; ++ #address-cells = <1>; ++ #size-cells = <1>; + compatible = "fsl,mpc8313-dma", "fsl,elo-dma"; -+ reg = <0xe00082a8 0x4>; -+ ranges = <0x0 0xe0008100 0x1a8>; -+ interrupt-parent = <0x1>; -+ interrupts = <0x47 0x8>; ++ reg = <0xe00082a8 4>; ++ ranges = <0 0xe0008100 0x1a8>; ++ interrupt-parent = <&ipic>; ++ interrupts = <71 8>; + + dma-channel@0 { -+ compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; -+ reg = <0x0 0x28>; -+ interrupt-parent = <0x1>; -+ interrupts = <0x47 0x8>; -+ cell-index = <0x0>; ++ compatible = "fsl,mpc8313-dma-channel", ++ "fsl,elo-dma-channel"; ++ reg = <0 0x28>; ++ interrupt-parent = <&ipic>; ++ interrupts = <71 8>; ++ cell-index = <0>; + }; + + dma-channel@80 { -+ compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; ++ compatible = "fsl,mpc8313-dma-channel", ++ "fsl,elo-dma-channel"; + reg = <0x80 0x28>; -+ interrupt-parent = <0x1>; -+ interrupts = <0x47 0x8>; -+ cell-index = <0x1>; ++ interrupt-parent = <&ipic>; ++ interrupts = <71 8>; ++ cell-index = <1>; + }; + + dma-channel@100 { -+ compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; ++ compatible = "fsl,mpc8313-dma-channel", ++ "fsl,elo-dma-channel"; + reg = <0x100 0x28>; -+ interrupt-parent = <0x1>; -+ interrupts = <0x47 0x8>; -+ cell-index = <0x2>; ++ interrupt-parent = <&ipic>; ++ interrupts = <71 8>; ++ cell-index = <2>; + }; + + dma-channel@180 { -+ compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; ++ compatible = "fsl,mpc8313-dma-channel", ++ "fsl,elo-dma-channel"; + reg = <0x180 0x28>; -+ interrupt-parent = <0x1>; -+ interrupts = <0x47 0x8>; -+ cell-index = <0x3>; ++ interrupt-parent = <&ipic>; ++ interrupts = <71 8>; ++ cell-index = <3>; + }; + }; + };