diff --git a/rp-binary-info/src/lib.rs b/rp-binary-info/src/lib.rs
index 25aa1edfe..a36f027a5 100644
--- a/rp-binary-info/src/lib.rs
+++ b/rp-binary-info/src/lib.rs
@@ -117,6 +117,7 @@ pub static PICOTOOL_HEADER: Header = unsafe {
 /// This tells picotool how to convert RAM addresses back into Flash addresses
 pub static MAPPING_TABLE: [MappingTableEntry; 2] = [
     // This is the entry for .data
+    #[allow(unused_unsafe)]
     MappingTableEntry {
         source_addr_start: unsafe { core::ptr::addr_of!(__sidata) },
         dest_addr_start: unsafe { core::ptr::addr_of!(__sdata) },
diff --git a/rp2040-hal/src/rom_data.rs b/rp2040-hal/src/rom_data.rs
index 1c90afcf7..b4bb1d956 100644
--- a/rp2040-hal/src/rom_data.rs
+++ b/rp2040-hal/src/rom_data.rs
@@ -8,6 +8,9 @@
 //! > functionality that would otherwise have to take up space in most user
 //! > binaries.
 
+#![allow(unknown_lints)]
+#![allow(clippy::too_long_first_doc_paragraph)]
+
 /// A bootrom function table code.
 pub type RomFnTableCode = [u8; 2];
 
@@ -211,6 +214,7 @@ rom_functions! {
     b"T3" fn ctz32(value: u32) -> u32;
 
     /// Resets the RP2040 and uses the watchdog facility to re-start in BOOTSEL mode:
+    ///
     ///   * gpio_activity_pin_mask is provided to enable an 'activity light' via GPIO attached LED
     ///     for the USB Mass Storage Device:
     ///     * 0 No pins are used as per cold boot.
@@ -254,16 +258,18 @@ rom_functions! {
     /// function configures the SSI with a fixed SCK clock divisor of /6.
     b"EX" unsafe fn flash_exit_xip() -> ();
 
-    /// Erase a count bytes, starting at addr (offset from start of flash). Optionally, pass a
-    /// block erase command e.g. D8h block erase, and the size of the block erased by this
-    /// command — this function will use the larger block erase where possible, for much higher
+    /// Erase a count bytes, starting at addr (offset from start of flash).
+    ///
+    /// Optionally, pass a block erase command e.g. D8h block erase, and the size of the block erased
+    /// by this command — this function will use the larger block erase where possible, for much higher
     /// erase speed. addr must be aligned to a 4096-byte sector, and count must be a multiple of
     /// 4096 bytes.
     b"RE" unsafe fn flash_range_erase(addr: u32, count: usize, block_size: u32, block_cmd: u8) -> ();
 
     /// Program data to a range of flash addresses starting at `addr` (and
-    /// offset from the start of flash) and `count` bytes in size. The value
-    /// `addr` must be aligned to a 256-byte boundary, and `count` must be a
+    /// offset from the start of flash) and `count` bytes in size.
+    ///
+    /// The value `addr` must be aligned to a 256-byte boundary, and `count` must be a
     /// multiple of 256.
     b"RP" unsafe fn flash_range_program(addr: u32, data: *const u8, count: usize) -> ();
 
@@ -272,13 +278,16 @@ rom_functions! {
     b"FC" unsafe fn flash_flush_cache() -> ();
 
     /// Configure the SSI to generate a standard 03h serial read command, with 24 address bits,
-    /// upon each XIP access. This is a very slow XIP configuration, but is very widely supported.
+    /// upon each XIP access.
+    ///
+    /// This is a very slow XIP configuration, but is very widely supported.
     /// The debugger calls this function after performing a flash erase/programming operation, so
     /// that the freshly-programmed code and data is visible to the debug host, without having to
     /// know exactly what kind of flash device is connected.
     b"CX" unsafe fn flash_enter_cmd_xip() -> ();
 
     /// This is the method that is entered by core 1 on reset to wait to be launched by core 0.
+    ///
     /// There are few cases where you should call this method (resetting core 1 is much better).
     /// This method does not return and should only ever be called on core 1.
     b"WV" unsafe fn wait_for_vector() -> !;
diff --git a/rp2040-hal/src/sio.rs b/rp2040-hal/src/sio.rs
index f2d792533..13fbfcc0e 100644
--- a/rp2040-hal/src/sio.rs
+++ b/rp2040-hal/src/sio.rs
@@ -202,6 +202,7 @@ impl SioFifo {
     }
 }
 
+#[cfg(target_arch = "arm")]
 macro_rules! concatln {
     ($(,)*) => {
         ""
@@ -220,6 +221,8 @@ macro_rules! concatln {
 // alias the division operators to these for a similar reason r0 is the
 // result either way and r1 a scratch register, so the caller can't assume it
 // retains the argument value.
+
+#[cfg(target_arch = "arm")]
 macro_rules! hwdivider_head {
     () => {
         concatln!(
@@ -238,6 +241,7 @@ macro_rules! hwdivider_head {
     };
 }
 
+#[cfg(target_arch = "arm")]
 macro_rules! hwdivider_tail {
     () => {
         concatln!(
diff --git a/rp235x-hal/src/rom_data.rs b/rp235x-hal/src/rom_data.rs
index 3879b9635..ef9440b97 100644
--- a/rp235x-hal/src/rom_data.rs
+++ b/rp235x-hal/src/rom_data.rs
@@ -358,7 +358,9 @@ declare_rom_function! {
 
 declare_rom_function! {
     /// Configure QMI for one of a small menu of XIP read modes supported by the
-    /// bootrom. This mode is configured for both memory windows (both chip
+    /// bootrom.
+    ///
+    /// This mode is configured for both memory windows (both chip
     /// selects), and the clock divisor is also applied to direct mode.
     ///
     /// The available modes are:
@@ -393,9 +395,10 @@ declare_rom_function! {
 
 declare_rom_function! {
     /// Restore the QMI address translation registers, ATRANS0 through ATRANS7,
-    /// to their reset state. This makes the runtime- to-storage address map an
-    /// identity map, i.e. the mapped and unmapped address are equal, and the
-    /// entire space is fully mapped.
+    /// to their reset state.
+    ///
+    /// This makes the runtime- to-storage address map an identity map, i.e. the
+    /// mapped and unmapped address are equal, and the entire space is fully mapped.
     ///
     /// See [Section 12.14.4](https://rptl.io/rp2350-datasheet#section_bootrom) of the RP2350
     /// datasheet.