From 13884eea49c24cb72297c2000070fd620a92977e Mon Sep 17 00:00:00 2001 From: Martins Polakovs Date: Sun, 2 Jun 2024 00:01:14 +0300 Subject: [PATCH 1/5] Fix set_low() and set_high() implementation for OutputPin --- rp2040-hal/src/gpio/mod.rs | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/rp2040-hal/src/gpio/mod.rs b/rp2040-hal/src/gpio/mod.rs index d8fb75e89..71a346682 100644 --- a/rp2040-hal/src/gpio/mod.rs +++ b/rp2040-hal/src/gpio/mod.rs @@ -1465,8 +1465,8 @@ mod eh1 { use embedded_hal::digital::{ErrorType, InputPin, OutputPin, StatefulOutputPin}; use super::{ - func, AnyPin, AsInputPin, Error, FunctionSio, InOutPin, Pin, PinId, PullType, SioConfig, - SioInput, SioOutput, + func, AnyPin, AsInputPin, Error, FunctionSio, InOutPin, OutputEnableOverride, Pin, PinId, + PullType, SioConfig, SioInput, SioOutput, }; impl ErrorType for Pin, P> @@ -1558,12 +1558,17 @@ mod eh1 { I: AnyPin, { fn set_low(&mut self) -> Result<(), Self::Error> { - self.inner._set_low(); + // The pin is already set to output low but this is inhibited by the override. + self.inner + .set_output_enable_override(OutputEnableOverride::Enable); Ok(()) } fn set_high(&mut self) -> Result<(), Self::Error> { - self.inner._set_high(); + // To set the open-drain pin to high, just disable the output driver by configuring the + // output override. That way, the DHT11 can still pull the data line down to send its response. + self.inner + .set_output_enable_override(OutputEnableOverride::Disable); Ok(()) } } From 7c1b99d110eaaefd566f3e149870b8f6748bed82 Mon Sep 17 00:00:00 2001 From: Jan Niehusmann Date: Thu, 23 May 2024 21:44:26 +0000 Subject: [PATCH 2/5] Update install instructions for probe-rs --- README.md | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index 9eeabbc2e..b804efc9f 100644 --- a/README.md +++ b/README.md @@ -73,7 +73,7 @@ You may also want to install these helpful tools: # Useful to creating UF2 images for the RP2040 USB Bootloader cargo install elf2uf2-rs --locked # Useful for flashing over the SWD pins using a supported JTAG probe -cargo install probe-rs --features cli --locked +cargo install --locked probe-rs-tools ``` ## Packages @@ -196,9 +196,11 @@ probe-rs can autodetect your debug probe, which can make it easier to use. *Step 1* - Install `probe-rs`: ```console -$ cargo install probe-rs --features cli --locked +$ cargo install --locked probe-rs-tools ``` +Alternatively, follow the installation instructions on https://probe.rs/. + *Step 2* - Make sure your .cargo/config contains the following: ```toml From 0d2e81f9412b7ecde02cbc8ffe7a8ee011eac7d2 Mon Sep 17 00:00:00 2001 From: Jan Niehusmann Date: Fri, 24 May 2024 18:13:03 +0000 Subject: [PATCH 3/5] Fix transmutes Don't accidentally transmute from `&&Reg<_>` to `&Reg<_>`, and make types in transmutes explicit to avoid such issues in future. --- rp2040-hal/src/gpio/pin/pin_sealed.rs | 64 ++++++++++++++++----------- 1 file changed, 39 insertions(+), 25 deletions(-) diff --git a/rp2040-hal/src/gpio/pin/pin_sealed.rs b/rp2040-hal/src/gpio/pin/pin_sealed.rs index 951931f7c..2864fdbd3 100644 --- a/rp2040-hal/src/gpio/pin/pin_sealed.rs +++ b/rp2040-hal/src/gpio/pin/pin_sealed.rs @@ -43,8 +43,8 @@ macro_rules! accessor_fns { unsafe { let sio = &*$crate::pac::SIO::PTR; match pin.bank { - DynBankId::Bank0 => &sio.[](), - DynBankId::Qspi => core::mem::transmute(&sio.[]()), + DynBankId::Bank0 =>sio.[](), + DynBankId::Qspi => core::mem::transmute::<&$crate::pac::sio::[],&$crate::pac::sio::[]>(sio.[]()), } } } @@ -57,19 +57,11 @@ macro_rules! accessor_fns { match pin.bank { DynBankId::Bank0 => { let gpio = unsafe { &*$crate::pac::IO_BANK0::PTR }; - &gpio.gpio(usize::from(pin.num)).[]() + gpio.gpio(usize::from(pin.num)).[]() } DynBankId::Qspi => unsafe { let qspi = &*$crate::pac::IO_QSPI::PTR; - match pin.num { - 0 => core::mem::transmute(&qspi.gpio_qspisclk().[]()), - 1 => core::mem::transmute(&qspi.gpio_qspiss().[]()), - 2 => core::mem::transmute(&qspi.gpio_qspisd0().[]()), - 3 => core::mem::transmute(&qspi.gpio_qspisd1().[]()), - 4 => core::mem::transmute(&qspi.gpio_qspisd2().[]()), - 5 => core::mem::transmute(&qspi.gpio_qspisd3().[]()), - _ => unreachable!("Invalid QSPI bank pin number."), - } + core::mem::transmute::<&$crate::pac::io_qspi::gpio_qspi::[], &$crate::pac::io_bank0::gpio::[]>(qspi.gpio_qspi(usize::from(pin.num)).[]()) }, } } @@ -86,14 +78,14 @@ macro_rules! accessor_fns { let bank = &*$crate::pac::IO_BANK0::PTR; match proc { CoreId::Core0 => bank.[](usize::from(index)), - CoreId::Core1 => core::mem::transmute(&bank.[](usize::from(index))), + CoreId::Core1 => core::mem::transmute::<&$crate::pac::io_bank0::[], &$crate::pac::io_bank0::[]>(bank.[](usize::from(index))), } } DynBankId::Qspi => { let bank = &*$crate::pac::IO_QSPI::PTR; match proc { - CoreId::Core0 => core::mem::transmute(&bank.[]()), - CoreId::Core1 => core::mem::transmute(&bank.[]()), + CoreId::Core0 => core::mem::transmute::<&$crate::pac::io_qspi::[], &$crate::pac::io_bank0::[]>(bank.[]()), + CoreId::Core1 => core::mem::transmute::<&$crate::pac::io_qspi::[], &$crate::pac::io_bank0::[]>(bank.[]()), } } }; @@ -115,7 +107,7 @@ macro_rules! accessor_fns { } DynBankId::Qspi => { let bank = &*$crate::pac::IO_QSPI::PTR; - core::mem::transmute(&bank.[< dormant_wake_ $reg:lower>]()) + core::mem::transmute::<&$crate::pac::io_qspi::[< DORMANT_WAKE_ $reg:upper >], &$crate::pac::io_bank0::[< DORMANT_WAKE_ $reg:upper >]>(bank.[< dormant_wake_ $reg:lower>]()) } }; (reg, usize::from(offset)) @@ -140,13 +132,32 @@ where } DynBankId::Qspi => unsafe { let qspi = &*pac::PADS_QSPI::PTR; + use rp2040_pac::{generic::Reg, pads_bank0, pads_qspi}; match pin.num { - 0 => core::mem::transmute(&qspi.gpio_qspi_sclk()), - 1 => core::mem::transmute(&qspi.gpio_qspi_ss()), - 2 => core::mem::transmute(&qspi.gpio_qspi_sd0()), - 3 => core::mem::transmute(&qspi.gpio_qspi_sd1()), - 4 => core::mem::transmute(&qspi.gpio_qspi_sd2()), - 5 => core::mem::transmute(&qspi.gpio_qspi_sd3()), + 0 => core::mem::transmute::< + &Reg, + &Reg, + >(qspi.gpio_qspi_sclk()), + 1 => core::mem::transmute::< + &Reg, + &Reg, + >(qspi.gpio_qspi_ss()), + 2 => core::mem::transmute::< + &Reg, + &Reg, + >(qspi.gpio_qspi_sd0()), + 3 => core::mem::transmute::< + &Reg, + &Reg, + >(qspi.gpio_qspi_sd1()), + 4 => core::mem::transmute::< + &Reg, + &Reg, + >(qspi.gpio_qspi_sd2()), + 5 => core::mem::transmute::< + &Reg, + &Reg, + >(qspi.gpio_qspi_sd3()), _ => unreachable!("Invalid QSPI bank pin number."), } }, @@ -165,13 +176,16 @@ where accessor_fns!(sio oe_clr); accessor_fns!(sio oe_xor); - fn proc_in_by_pass(&self) -> &crate::pac::syscfg::PROC_IN_SYNC_BYPASS { + fn proc_in_by_pass(&self) -> &pac::syscfg::PROC_IN_SYNC_BYPASS { let pin = self.as_dyn(); unsafe { let syscfg = &*pac::SYSCFG::PTR; match pin.bank { DynBankId::Bank0 => syscfg.proc_in_sync_bypass(), - DynBankId::Qspi => core::mem::transmute(&syscfg.proc_in_sync_bypass_hi()), + DynBankId::Qspi => core::mem::transmute::< + &pac::syscfg::PROC_IN_SYNC_BYPASS_HI, + &pac::syscfg::PROC_IN_SYNC_BYPASS, + >(syscfg.proc_in_sync_bypass_hi()), } } } @@ -187,7 +201,7 @@ where } DynBankId::Qspi => { let bank = &*pac::IO_QSPI::PTR; - core::mem::transmute(&bank.intr()) + core::mem::transmute::<&pac::io_qspi::INTR, &pac::io_bank0::INTR>(bank.intr()) } }; From 5cb727e929611eb1147b648e989115bad7bc939c Mon Sep 17 00:00:00 2001 From: Jan Niehusmann Date: Mon, 27 May 2024 10:21:55 +0200 Subject: [PATCH 4/5] Fix formatting in pin_sealed.rs Co-authored-by: 9names <60134748+9names@users.noreply.github.com> --- rp2040-hal/src/gpio/pin/pin_sealed.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/rp2040-hal/src/gpio/pin/pin_sealed.rs b/rp2040-hal/src/gpio/pin/pin_sealed.rs index 2864fdbd3..ce0109c21 100644 --- a/rp2040-hal/src/gpio/pin/pin_sealed.rs +++ b/rp2040-hal/src/gpio/pin/pin_sealed.rs @@ -43,7 +43,7 @@ macro_rules! accessor_fns { unsafe { let sio = &*$crate::pac::SIO::PTR; match pin.bank { - DynBankId::Bank0 =>sio.[](), + DynBankId::Bank0 => sio.[](), DynBankId::Qspi => core::mem::transmute::<&$crate::pac::sio::[],&$crate::pac::sio::[]>(sio.[]()), } } From ce1cc0556f5e26dfec7eef1f0d095429a228896c Mon Sep 17 00:00:00 2001 From: Martins Polakovs Date: Sun, 2 Jun 2024 00:01:14 +0300 Subject: [PATCH 5/5] Prepare release 0.10.2 Update changelog, bump versions --- rp2040-hal/CHANGELOG.md | 8 +++++++- rp2040-hal/Cargo.toml | 2 +- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/rp2040-hal/CHANGELOG.md b/rp2040-hal/CHANGELOG.md index e591df690..377d7665b 100644 --- a/rp2040-hal/CHANGELOG.md +++ b/rp2040-hal/CHANGELOG.md @@ -7,7 +7,12 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ## [Unreleased] +## [0.10.2] - 2024-06-07 + - Fix oneshot adc read waiting indefinitely - #799 @mjptree +- Fix set_low() and set_high() implementation for OutputPin - #807 @martinsp +- Update install instructions for probe-rs - #804 @jannic +- Fix bad transmutes of references to Qspi pins - #805 @jannic ## [0.10.1] - 2024-04-28 @@ -407,7 +412,8 @@ The Minimum-Supported Rust Version (MSRV) for this release is 1.54. - Initial release -[Unreleased]: https://github.com/rp-rs/rp-hal/compare/v0.10.1...HEAD +[Unreleased]: https://github.com/rp-rs/rp-hal/compare/v0.10.2...HEAD +[0.10.2]: https://github.com/rp-rs/rp-hal/compare/v0.10.1...v0.10.2 [0.10.1]: https://github.com/rp-rs/rp-hal/compare/v0.10.0...v0.10.1 [0.10.0]: https://github.com/rp-rs/rp-hal/compare/v0.9.1...v0.10.0 [0.9.1]: https://github.com/rp-rs/rp-hal/compare/v0.9.0...v0.9.1 diff --git a/rp2040-hal/Cargo.toml b/rp2040-hal/Cargo.toml index c2dd46648..c8de1a929 100644 --- a/rp2040-hal/Cargo.toml +++ b/rp2040-hal/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "rp2040-hal" -version = "0.10.1" +version = "0.10.2" authors = ["The rp-rs Developers"] edition = "2021" homepage = "https://github.com/rp-rs/rp-hal"