ProjectNew.amp

<?xml version="1.0" encoding="UTF-8"?><intel_fpga_monitor_program_project version="1.0">
    <architecture>ARM Cortex-A9</architecture>
    <system>
        <sample_system_title>DE1-SoC Computer for ARM Cortex-A9</sample_system_title>
        <board>DE1-SoC</board>
        <cable>DE-SoC [USB-1]</cable>
        <processor>ARM_A9_HPS_arm_a9_0</processor>
        <reset_processor_during_load>true</reset_processor_during_load>
        <terminal>JTAG_UART_for_ARM_0</terminal>
    </system>
    <program>
        <type>C Program</type>
        <source_files>
            <source_file filepath="true">project.c</source_file>
            <source_file filepath="true">assembly.s</source_file>
        </source_files>
        <options>
            <compiler_flags>-g -O1</compiler_flags>
        </options>
        <linker_sections type="Basic">
            <linker_section name=".text">
                <memory_device>ARM_DDR3_SDRAM.axi_slave</memory_device>
                <base_address>0x00000000</base_address>
                <end_address>0x3FFFFFF7</end_address>
                <required_section/>
            </linker_section>
            <linker_section name=".stack">
                <memory_device>ARM_DDR3_SDRAM.axi_slave</memory_device>
                <base_address>0x3FFFFFF8</base_address>
                <end_address>0x3FFFFFFF</end_address>
                <required_section/>
            </linker_section>
        </linker_sections>
    </program>
</intel_fpga_monitor_program_project>