From 1c925269af9dd0034bef2b6c84e3e95458b3bb97 Mon Sep 17 00:00:00 2001 From: Enrico Zelioli Date: Thu, 3 Apr 2025 16:06:55 +0200 Subject: [PATCH] Add Yosys elaboration support --- Bender.yml | 4 +++ Makefile | 19 ++++++++++++++ src/clic_synth_pkg.sv | 29 +++++++++++++++++++++ src/clic_synth_wrap.sv | 58 ++++++++++++++++++++++++++++++++++++++++++ yosys/.gitignore | 3 +++ yosys/elaborate.tcl | 32 +++++++++++++++++++++++ yosys/yosys.mk | 37 +++++++++++++++++++++++++++ 7 files changed, 182 insertions(+) create mode 100644 Makefile create mode 100644 src/clic_synth_pkg.sv create mode 100644 src/clic_synth_wrap.sv create mode 100644 yosys/.gitignore create mode 100644 yosys/elaborate.tcl create mode 100644 yosys/yosys.mk diff --git a/Bender.yml b/Bender.yml index 2a9b4fd..85d56f4 100644 --- a/Bender.yml +++ b/Bender.yml @@ -35,3 +35,7 @@ sources: - src/clic_apb.sv - src/clic.sv + - target: clic_synth_test + files: + - src/clic_synth_pkg.sv + - src/clic_synth_wrap.sv diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..1991bbf --- /dev/null +++ b/Makefile @@ -0,0 +1,19 @@ +# Copyright 2025 ETH Zurich and University of Bologna. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +# SPDX-License-Identifier: Apache-2.0 + +ROOT := $(shell pwd) + +include yosys/yosys.mk diff --git a/src/clic_synth_pkg.sv b/src/clic_synth_pkg.sv new file mode 100644 index 0000000..39cb2d4 --- /dev/null +++ b/src/clic_synth_pkg.sv @@ -0,0 +1,29 @@ +// Copyright 2025 ETH Zurich and University of Bologna. +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +// SPDX-License-Identifier: Apache-2.0 + +`include "register_interface/typedef.svh" + +package clic_synth_pkg; + + localparam int N_SOURCE = 256; + localparam int SRC_W = $clog2(N_SOURCE); + localparam int INTCTLBITS = 8; + localparam bit SSCLIC = 1; + localparam bit USCLIC = 0; + + `REG_BUS_TYPEDEF_ALL(reg, logic [31:0], logic [31:0], logic [3:0]) + +endpackage diff --git a/src/clic_synth_wrap.sv b/src/clic_synth_wrap.sv new file mode 100644 index 0000000..f1c65ab --- /dev/null +++ b/src/clic_synth_wrap.sv @@ -0,0 +1,58 @@ +// Copyright 2025 ETH Zurich and University of Bologna. +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +// SPDX-License-Identifier: Apache-2.0 + +module clic_synth_wrap + import clic_synth_pkg::*; +( + input logic clk_i, + input logic rst_ni, + input reg_req_t reg_req_i, + output reg_rsp_t reg_rsp_o, + input logic [N_SOURCE-1:0] intr_src_i, + output logic irq_valid_o, + input logic irq_ready_i, + output logic [SRC_W-1:0] irq_id_o, + output logic [7:0] irq_level_o, + output logic irq_shv_o, + output logic [1:0] irq_priv_o, + output logic irq_kill_req_o, + input logic irq_kill_ack_i +); + + clic #( + .reg_req_t ( reg_req_t ), + .reg_rsp_t ( reg_rsp_t ), + .N_SOURCE ( N_SOURCE ), + .INTCTLBITS ( INTCTLBITS ), + .SSCLIC ( SSCLIC ), + .USCLIC ( USCLIC ) + ) i_clic ( + .clk_i ( clk_i ), + .rst_ni ( rst_ni ), + .reg_req_i ( reg_req_i ), + .reg_rsp_o ( reg_rsp_o ), + .intr_src_i ( intr_src_i ), + .irq_valid_o ( irq_valid_o ), + .irq_ready_i ( irq_ready_i ), + .irq_id_o ( irq_id_o ), + .irq_level_o ( irq_level_o ), + .irq_shv_o ( irq_shv_o ), + .irq_priv_o ( irq_priv_o ), + .irq_kill_req_o ( irq_kill_req_o ), + .irq_kill_ack_i ( irq_kill_ack_i ) + ); + +endmodule diff --git a/yosys/.gitignore b/yosys/.gitignore new file mode 100644 index 0000000..2176e1d --- /dev/null +++ b/yosys/.gitignore @@ -0,0 +1,3 @@ +out/ +reports/ +*.flist diff --git a/yosys/elaborate.tcl b/yosys/elaborate.tcl new file mode 100644 index 0000000..7e30b3d --- /dev/null +++ b/yosys/elaborate.tcl @@ -0,0 +1,32 @@ +# Copyright 2025 ETH Zurich and University of Bologna. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +# SPDX-License-Identifier: Apache-2.0 + +set top_design clic_synth_wrap + +yosys plugin -i slang.so + +yosys read_slang --top ${top_design} -F clic.flist \ + --compat-mode --keep-hierarchy \ + --allow-use-before-declare --ignore-unknown-modules \ + --ignore-assertions -Wno-error=duplicate-definition + +yosys hierarchy -top ${top_design} +yosys check + +yosys tee -q -o "reports/clic_elaborated.rpt" stat +yosys write_verilog -norename -noexpr -attr2comment out/clic_elaborated.v + +exit diff --git a/yosys/yosys.mk b/yosys/yosys.mk new file mode 100644 index 0000000..53b829d --- /dev/null +++ b/yosys/yosys.mk @@ -0,0 +1,37 @@ +# Copyright 2025 ETH Zurich and University of Bologna. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +# SPDX-License-Identifier: Apache-2.0 + +BENDER ?= bender +YOSYS ?= oseda -2025.03 yosys + +YOSYS_ROOT_DIR ?= $(ROOT)/yosys +YOSYS_OUT_DIR := $(YOSYS_ROOT_DIR)/out +YOSYS_REPORTS_DIR := $(YOSYS_ROOT_DIR)/reports + +$(YOSYS_ROOT_DIR)/clic.flist: Bender.yml + $(BENDER) script flist-plus -t rtl -t synthesis -t asic -t clic_synth_test > $@ + +$(YOSYS_OUT_DIR)/clic_elaborated.v: $(YOSYS_ROOT_DIR)/clic.flist + mkdir -p $(YOSYS_OUT_DIR) $(YOSYS_REPORTS_DIR) + cd $(YOSYS_ROOT_DIR) && $(YOSYS) -C elaborate.tcl + +.PHONY: yosys-elaborate +yosys-elaborate: $(YOSYS_OUT_DIR)/clic_elaborated.v + @echo "Synthesized CLIC successfully" + +.PHONY: yosys-clean +yosys-clean: + rm -rf $(YOSYS_OUT_DIR) $(YOSYS_REPORTS_DIR) $(YOSYS_ROOT_DIR)/clic.flist