@@ -2326,12 +2326,13 @@ void C2_MacroAssembler::expand_bits_l_v(Register dst, Register src, Register mas
2326
2326
}
2327
2327
2328
2328
void C2_MacroAssembler::element_compare (Register a1, Register a2, Register result, Register cnt, Register tmp1, Register tmp2,
2329
- VectorRegister vr1, VectorRegister vr2, VectorRegister vrs, bool islatin, Label &DONE) {
2329
+ VectorRegister vr1, VectorRegister vr2, VectorRegister vrs, bool islatin, Label &DONE,
2330
+ Assembler::LMUL lmul) {
2330
2331
Label loop;
2331
2332
Assembler::SEW sew = islatin ? Assembler::e8 : Assembler::e16 ;
2332
2333
2333
2334
bind (loop);
2334
- vsetvli (tmp1, cnt, sew, Assembler::m2 );
2335
+ vsetvli (tmp1, cnt, sew, lmul );
2335
2336
vlex_v (vr1, a1, sew);
2336
2337
vlex_v (vr2, a2, sew);
2337
2338
vmsne_vv (vrs, vr1, vr2);
@@ -2357,7 +2358,7 @@ void C2_MacroAssembler::string_equals_v(Register a1, Register a2, Register resul
2357
2358
2358
2359
mv (result, false );
2359
2360
2360
- element_compare (a1, a2, result, cnt, tmp1, tmp2, v2, v4, v2, true , DONE);
2361
+ element_compare (a1, a2, result, cnt, tmp1, tmp2, v2, v4, v2, true , DONE, Assembler::m2 );
2361
2362
2362
2363
bind (DONE);
2363
2364
BLOCK_COMMENT (" } string_equals_v" );
@@ -2410,7 +2411,7 @@ void C2_MacroAssembler::arrays_equals_v(Register a1, Register a2, Register resul
2410
2411
la (a1, Address (a1, base_offset));
2411
2412
la (a2, Address (a2, base_offset));
2412
2413
2413
- element_compare (a1, a2, result, cnt1, tmp1, tmp2, v2, v4, v2, elem_size == 1 , DONE);
2414
+ element_compare (a1, a2, result, cnt1, tmp1, tmp2, v2, v4, v2, elem_size == 1 , DONE, Assembler::m2 );
2414
2415
2415
2416
bind (DONE);
2416
2417
@@ -2445,8 +2446,18 @@ void C2_MacroAssembler::string_compare_v(Register str1, Register str2, Register
2445
2446
mv (cnt2, cnt1);
2446
2447
bind (L);
2447
2448
2449
+ // We focus on the optimization of small sized string.
2450
+ // Please check below document for string size distribution statistics.
2451
+ // https://cr.openjdk.org/~shade/density/string-density-report.pdf
2448
2452
if (str1_isL == str2_isL) { // LL or UU
2449
- element_compare (str1, str2, zr, cnt2, tmp1, tmp2, v2, v4, v2, encLL, DIFFERENCE);
2453
+ // Below construction of v regs and lmul is based on test on 2 different boards,
2454
+ // vlen == 128 and vlen == 256 respectively.
2455
+ if (!encLL && MaxVectorSize == 16 ) { // UU
2456
+ element_compare (str1, str2, zr, cnt2, tmp1, tmp2, v4, v8, v4, encLL, DIFFERENCE, Assembler::m4);
2457
+ } else { // UU + MaxVectorSize or LL
2458
+ element_compare (str1, str2, zr, cnt2, tmp1, tmp2, v2, v4, v2, encLL, DIFFERENCE, Assembler::m2);
2459
+ }
2460
+
2450
2461
j (DONE);
2451
2462
} else { // LU or UL
2452
2463
Register strL = encLU ? str1 : str2;
0 commit comments