The SNAP documentation is aimed at providing users with the best experience of CAPI/SNAP.
Users can come to SNAP with different skills, as SNAP is a bridge between software applications and hardware implemented actions.
Users coming from the software domain will certainly be inclined to use HLS (High Level Synthesis) features to help them port their software code into FPGA, while hardware users will be more comfortable to tune their action in FPGA native HDL languages and use SNAP to bridge with the software world.
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In any case, all users should begin with the Quick Start Guide on a General Environment to discover the topic and have the main steps in mind before any advanced work.
They will learn the basics and the guide will enable them to setup SNAP whether their action is developed in C or in VHDL. -
Then all users should create their first own action to go into more detail using the How to Create a New Action Guide Upon completion of this exercise, they will be able to modify, adjust their action skeleton, add or remove ports, as needed to fullfill their specific needs.
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The specific documentation located in each snap/actions/<action_name>/doc will help define the specific features related to the proposed example.
Thus HLS NVME attachments goodies will be located in ../actions/hls_nvme_memcopy/doc/ while HDL NVME attachments goodies will be located in ../actions/hdl_nvme_memcopy/doc/ -
For HLS users, optimization is a must, so users can rely on How to Optimize an HLS Action guide to understand the details of how their C code is "converted".
The usage of basic conversion directives (#pragma) and their understanding will allow for significant improvements over plain conversion. -
For hardware skilled user HDL_example and hdl_nvme_example show several different memory copy usage examples.
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Supported Boards :
(All information provided by FPGA board vendors are subject to change at any time.)
Check OS release in deployment servers table / (Resources in italic are not enabled yet)
| Manufacturer | Card Type | SNAP Code Name | FPGA | DRAM | NVME | QDR | Ethernet | CAPI Interface | Board | CAPI support | SNAP support |
|---|---|---|---|---|---|---|---|---|---|---|---|
| Alphadata | ADM-PCIE-KU3 | ADKU3 | KU060 | 8/_16_GB DDR3(1ch-1ch) | - | - | 2x(40GbE/4x10GbE) | PCIe Gen3 x8 | LowProf | X | X |
| Alphadata | ADM-PCIE-8K5 | AD8K5 | KU115 | 8/_16_GB DDR4(1ch-1ch) | - | - | 2x(10GbE/16GbE FC) | PCIe Gen3 x8 | LowProf | X | X |
| Nallatech | 250S | N250S | KU060 | 4GB DDR4(1ch) | 2TB (1ch+1ch) | - | - | PCIe Gen3 x8 | LowProf | X | X |
| Semptian | NSA-121B | S121B | KU115 | 8/_16_GB DDR4(1ch-1ch) | - | - | 2x(10GbE) | PCIe Gen3 x8 | LowProf | X | X |
Check OS release in deployment servers table / (Resources in italic are not enabled yet)
| Manufacturer | Card Type | SNAP Code Name | FPGA | DRAM | NVME | QDR | Network | CAPI Interface | Board | CAPI support | SNAP support |
|---|---|---|---|---|---|---|---|---|---|---|---|
| ReflexCES | XpressVUP-LP9PT | RCXVUP | VU9P* | 8GB /16GB DDR4 (1ch-1ch) | - | 144Mb/575Mb | 2x(100GbE/4x25GbE) | PCIe Gen3 x 16 | LowProf | X | X |
| Flyslice | FX609QL | FX609 | VU9P* | 8GB /16GB DDR4 (1ch-3ch) | - | - | - | PCIe Gen3 x 16 | LowProf** | X | X |
| Semptian | NSA-241 | S241 | VU9P* | 8GB /32GB DDR4 (1ch-3ch) | - | - | 2x(25GbE) | PCIe Gen3 x 16 | FullHeight | X | X |
| Alphadata | ADM-PCIE-9V3 | AD9V3 | VU3P | 8GB /16GB DDR4 (1ch-1ch) | - | - | 2x(100GbE/4x25GbE) | PCIe Gen4 x8 or Gen3 x16 | LowProf | X | X |
| Alphadata | ADM-PCIE-9H3 | AD9H3 | VU33P | 8GB HBM | - | - | 1x QSFP-DD (8x28Gbps) | PCIe Gen3 x16 | LowProf | X | X |
Notes :
- * : requires an auxiliary power supply connector (100W)
- ** : requires 2 mechanical slots
- N250SP board has been removed from the list even if it has been enabled. Indeed it is working only with a Vivado release prior to 2018.2, due to Xilinx changes in IPs.
OpenCAPI environment has been renamed oc-accel and is hosted on a specific site on github.
Please check : https://github.com/OpenCAPI/oc-accel
- Supported Development Environments :
| Development Server(x86) | Ubuntu | RedHat | CentOS | Suse | Helpful commands |
|---|---|---|---|---|---|
| 16.04.1 minimum | 6.4 | Linux 7 | 11.4 | lsb_release -a |
| Tool | Minimum | Recommended | Helpful commands |
|---|---|---|---|
| gcc | 4.4.7 | latest | gcc -v |
| Vivado HL Design Edition | 2018.1 | 2019.2 (for CAPI2.0) | vivado -version |
| Vivado HLS | 2018.1 | 2019.2 (for CAPI2.0) | vivado_hls -version |
| Cadence irun (required only for NVME simulation with Denali models) | 15.20.046(Vivado 2018.1) | 15.20.046(Vivado 2018.2) | irun -version |
Vivado 2018.1 is compatible with CAPI1.0 and CAPI2.0 while Vivado 2018.2 doesn't work on CAPI1.0 cards
All CAPI2 cards (except 250SP) are compatible with Vivado 2019.2
2019.2 has still issues
| Deployment Server(Power) | Ubuntu | RedHat | CentOS | Suse | Helpful commands |
|---|---|---|---|---|---|
| Power8 (CAPI1.0) | 16.04.1 min | RHEL7.3 min | - | - | lsb_release -a OR cat /etc/os-release |
| Power9 (CAPI2.0) | 18.04.1 min | RHEL7.5-ALT min | - | - | lsb_release -a OR cat /etc/os-release |
| Power9 (OpenCAPI3.0) | https://github.com/OpenCAPI/oc-accel |
Notes :
- Resources in italic are tentative
- RHEL x.x non -ALT are NOT supporting CAPI for P9
| Tool | Minimum | Recommended | Helpful commands |
|---|---|---|---|
| gcc | 4.4.7 | latest | gcc -v |
| P8 Server Firmware : skiboot/FW | 5.1.13/FW840.20/OP820 | latest | update_flash -d |
| P9 Server Firmware : skiboot/FW (CAPI2.0) | 5.11/FW910 & 6.0/OP920 | latest | update_flash -d |
| P9 Server Firmware : https://github.com/OpenCAPI/oc-accel |
| MTM | PowerLinux | CAPI Capacity (per PCIe slots priority) |
|---|---|---|
| 8247-21L | Power S822L | 2x CAPI adapters per socket => 2 CAPI (C7-C6) |
| 8247-22L | Power S812L | 2x CAPI adapters per socket => 4 CAPI (C7, C6, C5, C3) |
| 8247-42L | Power S824L | 2x CAPI adapters + 2GPUs (C3-C6)=> 4 CAPI (C3,C5,C6,C7) |
| 8348-21C | Power Systems S812LC | 2x CAPI adapters per socket => 2 CAPI (C3- C4) |
| 8335-GCA | Power Systems S822LC | 4 of the 5 PCIe slots are CAPI capable => 4 CAPI(C4-C1-C5-C2) |
| MTM | PowerLinux | PCIeGen4x8 for CAPI | PCIeGen4x16 for CAPI |
|---|---|---|---|
| 8335-GTH(air cooled) | Power AC922 | 1 (Slot 2 P1-C4) | 2 (Slot 3 P1-C3, Slot 4 P1-C2) |
| 8335-GTX(water cooled) | Power AC922 | 1 (Slot 2 P1-C4) | 2 (Slot 3 P1-C3, Slot 4 P1-C2) |
| 9006-12P - 1 proc/1U | Power LC921 | 1 (UIO Slot1)Internal | 0 |
| 9006-12P - 2 proc/1U | Power LC921 | 1 (UIO Slot1)Internal | 2 (WIO Slot1 - WIO Slot2) |
| 9006-22P - 1 proc/2U | Power LC922 | 0 | 1 (UIO Slot1) |
| 9006-22P - 2 proc/2U | Power LC922 | 1 (WIO Slot4) | 2 (UIO Slot1 - WIO Slot3) |
| ........ | ..... |
OpenCAPI environment has been renamed oc-accel and is hosted on a specific site on github.
Please check : https://github.com/OpenCAPI/oc-accel
Disclaimer : as it is not possible to cross tests all configurations with all possible cards on all possible servers, information provided in this page are recommandations only and subject to change without notice.