diff --git a/compiler/plugins/target/AMD-AIE/aievec/CMakeLists.txt b/compiler/plugins/target/AMD-AIE/aievec/CMakeLists.txt index 281252094..b13fe5e57 100644 --- a/compiler/plugins/target/AMD-AIE/aievec/CMakeLists.txt +++ b/compiler/plugins/target/AMD-AIE/aievec/CMakeLists.txt @@ -86,4 +86,4 @@ iree_cc_library( ::AIEVecXLLVMOpsGen ) -add_subdirectory(test) +iree_add_all_subdirs() diff --git a/compiler/plugins/target/AMD-AIE/aievec/ConvertVectorToAIEVec.cpp b/compiler/plugins/target/AMD-AIE/aievec/ConvertVectorToAIEVec.cpp index e9e407921..14b575bd1 100644 --- a/compiler/plugins/target/AMD-AIE/aievec/ConvertVectorToAIEVec.cpp +++ b/compiler/plugins/target/AMD-AIE/aievec/ConvertVectorToAIEVec.cpp @@ -114,3 +114,12 @@ void mlir::iree_compiler::aievec::buildConvertVectorToAIEVec( pm.addPass(createLoopInvariantCodeMotionPass()); pm.addPass(createCanonicalizerPass()); } + +void mlir::iree_compiler::aievec::registerAIEVecPipelines() { + PassPipelineRegistration<>( + "convert-vector-to-aievec", + "This pass pipeline takes standard \"Vector\" code and converts it to " + "\"AIEVec\" code targeting the selected Xilinx AIE vector " + "architecture.", + buildConvertVectorToAIEVec); +} diff --git a/compiler/plugins/target/AMD-AIE/aievec/Passes.h b/compiler/plugins/target/AMD-AIE/aievec/Passes.h index c1dabcf67..21a293ff2 100644 --- a/compiler/plugins/target/AMD-AIE/aievec/Passes.h +++ b/compiler/plugins/target/AMD-AIE/aievec/Passes.h @@ -48,9 +48,10 @@ void buildLowerVectorToAIEVec(mlir::OpPassManager &pm); /** * A pass containing patterns for lowering operations in the vector dialect to - * the AIEVec dialect. The pass is currently named `test-lower-vector-to-aievec`. + * the AIEVec dialect. The pass is currently named + * `test-lower-vector-to-aievec`. */ -static std::unique_ptr createLowerVectorToAIEVec(); +std::unique_ptr createLowerVectorToAIEVec(); /** * Expose the pass `test-lower-vector-to-aievec` to the command line. @@ -67,9 +68,14 @@ void buildConvertVectorToAIEVec(mlir::OpPassManager &); /** * Lower from the vector dialect to the AIEVec dialect. The pass is called * `convert-aievec-to-llvm`. - * */ + */ std::unique_ptr createConvertAIEVecToLLVMPass(); +/** + * Register all pipelines for the AIE Vector dialect. + */ +void registerAIEVecPipelines(); + /** * Expose the pass `convert-aievec-to-llvm` to the command line. */ diff --git a/compiler/plugins/target/AMD-AIE/aievec/VectorToAIEVecConversions.cpp b/compiler/plugins/target/AMD-AIE/aievec/VectorToAIEVecConversions.cpp index 12769f2c9..9e33d6ca8 100644 --- a/compiler/plugins/target/AMD-AIE/aievec/VectorToAIEVecConversions.cpp +++ b/compiler/plugins/target/AMD-AIE/aievec/VectorToAIEVecConversions.cpp @@ -1077,12 +1077,12 @@ struct LowerVectorToAIEVec : PassWrapper> { //============================================================================// namespace mlir::iree_compiler::aievec { -static std::unique_ptr createLowerVectorToAIEVec() { +std::unique_ptr createLowerVectorToAIEVec() { return std::make_unique(); } void registerLowerVectorToAIEVecPass() { - ::mlir::registerPass([]() -> std::unique_ptr { + mlir::registerPass([]() -> std::unique_ptr { return createLowerVectorToAIEVec(); }); } diff --git a/compiler/plugins/target/AMD-AIE/aievec/test/CMakeLists.txt b/compiler/plugins/target/AMD-AIE/aievec/test/CMakeLists.txt index 9560a848f..5b5c9eed6 100644 --- a/compiler/plugins/target/AMD-AIE/aievec/test/CMakeLists.txt +++ b/compiler/plugins/target/AMD-AIE/aievec/test/CMakeLists.txt @@ -13,3 +13,5 @@ iree_lit_test_suite( LABELS "hostonly" ) + +iree_add_all_subdirs() diff --git a/compiler/plugins/target/AMD-AIE/aievec/test/simulator/64x32x64xbf16_4x8x4_packed_gemm/gemm-64x32x64-bf16.mlir b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/64x32x64xbf16_4x8x4_packed_gemm/gemm-64x32x64-bf16.mlir new file mode 100644 index 000000000..6350aea7a --- /dev/null +++ b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/64x32x64xbf16_4x8x4_packed_gemm/gemm-64x32x64-bf16.mlir @@ -0,0 +1,65 @@ +// RUN: iree-opt %S/gemm-64x32x64-bf16.mlir --convert-vector-to-aievec -lower-affine -canonicalize -cse --convert-aievec-to-llvm --convert-scf-to-cf | iree-aie-translate --mlir-to-llvmir -o kernel.ll +// RUN: clang -O2 --target=aie2-none-unknown-elf -c kernel.ll -o kernel.o +// RUN: clang -O2 --target=aie2-none-unknown-elf -c testbench.cc -o testbench.o +// RUN: clang --target=aie2-none-unknown-elf -Wl,--gc-sections -Wl,--orphan-handling=error -Wl,T,%S/ldfile -o test.exe +// RUN: xca_udm_dbg -qf -T -P $AIETOOLS/data/aie_ml/lib -t "%S/../profiling.tcl ./testbench.exe" | FileCheck %s +// RUN: cat checkers.output + +#map = affine_map<(d0, d1, d2) -> (d0, d2)> +#map1 = affine_map<(d0, d1, d2) -> (d2, d1)> +#map2 = affine_map<(d0, d1, d2) -> (d0, d1)> +module { + func.func @gemm_64x32x64_bf16_packed_4x8x4(%A: memref<16x4x4x8xbf16>, + %B: memref<4x16x8x4xbf16>, + %C: memref<16x16x4x4xf32>) { + %c0 = arith.constant 0 : index + %c1 = arith.constant 1 : index + %c4 = arith.constant 4 : index + %c16 = arith.constant 16 : index + %c0_bf16 = arith.constant 0.000000e+00 : bf16 + %c0_f32 = arith.constant 0.000000e+00 : f32 + scf.for %i = %c0 to %c16 step %c1 { + scf.for %j = %c0 to %c16 step %c1 { + scf.for %k = %c0 to %c4 step %c1 { + %va = vector.transfer_read %A[%i, %k, %c0, %c0], %c0_bf16 : + memref<16x4x4x8xbf16>, vector<4x8xbf16> + %vb = vector.transfer_read %B[%k, %j, %c0, %c0], %c0_bf16 : + memref<4x16x8x4xbf16>, vector<8x4xbf16> + %vc = vector.transfer_read %C[%i, %j, %c0, %c0], %c0_f32 : + memref<16x16x4x4xf32>, vector<4x4xf32> + %vaf32 = arith.extf %va : vector<4x8xbf16> to vector<4x8xf32> + %vbf32 = arith.extf %vb : vector<8x4xbf16> to vector<8x4xf32> + %vr = vector.contract { + indexing_maps = [#map, #map1, #map2], + iterator_types = ["parallel", "parallel", "reduction"], + kind = #vector.kind} + %vaf32, %vbf32, %vc : + vector<4x8xf32>, vector<8x4xf32> into vector<4x4xf32> + vector.transfer_write %vr, %C[%i, %j, %c0, %c0] : + vector<4x4xf32>, memref<16x16x4x4xf32> + } + } + } + return + } + + memref.global "private" constant @A : memref<16x4x4x8xbf16> = dense<1.000000e+00> + memref.global "private" constant @B : memref<4x16x8x4xbf16> = dense<2.000000e+00> + memref.global "private" constant @C : memref<16x16x4x4xf32> = dense<0.000000e+00> + func.func @main() { + %0 = memref.get_global @A : memref<16x4x4x8xbf16> + %1 = memref.get_global @B : memref<4x16x8x4xbf16> + %2 = memref.get_global @C : memref<16x16x4x4xf32> + func.call @gemm_64x32x64_bf16_packed_4x8x4(%0, %1, %2) : (memref<16x4x4x8xbf16>, memref<4x16x8x4xbf16>, memref<16x16x4x4xf32>) -> () + return + } +} + +// CHECK-LABEL: N: 64, M: 64, K: 32 +// CHECK-LABEL: Running MATMUL... +// CHECK: Cycle count: [[CC:[0-9]+]] +// CHECK-LABEL: Finish MATMUL! +// CHECK-LABEL: Compare the results +// CHECK: PASSED, Max delta: [[MD:-?[0-9]+.[0-9]+]], pixel intensity + +// RUN: xchesscc -j1 -pme -P $AIETOOLS/data/aie_ml/lib -f -CRelease_LLVM -w work -D__AIENGINE__ -D__AIE_ARCH__=20 -D__AIEARCH__=20 -I $AIETOOLS/include kernel.ll -o kernel.o diff --git a/compiler/plugins/target/AMD-AIE/aievec/test/simulator/64x32x64xbf16_4x8x4_packed_gemm/testbench.cc b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/64x32x64xbf16_4x8x4_packed_gemm/testbench.cc new file mode 100644 index 000000000..dbac33859 --- /dev/null +++ b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/64x32x64xbf16_4x8x4_packed_gemm/testbench.cc @@ -0,0 +1,70 @@ +#include +#include +#include +#include + +using namespace std; + +#define MAT_A_SIZE 2048 +#define MAT_B_SIZE 2048 +#define MAT_C_SIZE 4096 +#define N_SIZE 64 +#define M_SIZE 64 +#define K_SIZE 32 + +bfloat16 mat_a_data[MAT_A_SIZE]; +bfloat16 mat_b_data[MAT_B_SIZE]; +float mat_c_data[MAT_C_SIZE]; +float ref_c_data[MAT_C_SIZE]; + +#define INPUT_A_FILE "matrix_a_test.txt" +#define INPUT_B_FILE "matrix_b_test.txt" +#define OUTPUT_C_FILE "matrix_c_test.txt" + +#ifndef __chess__ +int chess_cycle_count() { return 0; } +#endif + +extern void gemm_64x32x64_bf16_packed_4x8x4(bfloat16 *restrict mat_a_data, + bfloat16 *restrict mat_b_data, + float *restrict mat_c_data); + +int main() { + int i = 0, j = 0, k = 0; + + // Read in matrix_a to local memory + int index = 0; + for (i = 0; i < N_SIZE; i++) { + for (k = 0; k < K_SIZE; k++) { + int32_t ival = *reinterpret_cast(&i); + int16_t bfval = (ival & 0xFFFF0000) >> 16; + mat_a_data[index++] = *reinterpret_cast(&bfval); + } + } + + // Read in matrix_b to local memory + index = 0; + for (k = 0; k < K_SIZE; k++) { + for (j = 0; j < M_SIZE; j++) { + int32_t ival = *reinterpret_cast(&i); + int16_t bfval = (ival & 0xFFFF0000) >> 16; + mat_b_data[index++] = *reinterpret_cast(&bfval); + } + } + + // Initialize matrix_c to local memory + index = 0; + for (i = 0; i < N_SIZE; i++) { + for (j = 0; j < M_SIZE; j++) { + mat_c_data[index++] = 0.f; + } + } + + // Compute matrix multiplication + // reference(mat_a_data, mat_b_data, mat_c_data); + auto cyclesBegin = chess_cycle_count(); + gemm_64x32x64_bf16_packed_4x8x4(mat_a_data, mat_b_data, mat_c_data); + auto cyclesEnd = chess_cycle_count(); + + return 0; +} diff --git a/compiler/plugins/target/AMD-AIE/aievec/test/simulator/CMakeLists.txt b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/CMakeLists.txt new file mode 100644 index 000000000..cd18fb85d --- /dev/null +++ b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/CMakeLists.txt @@ -0,0 +1,28 @@ +# Copyright 2024 The IREE Authors +# +# Licensed under the Apache License v2.0 with LLVM Exceptions. +# See https://llvm.org/LICENSE.txt for license information. +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + +get_property(dialect_libs GLOBAL PROPERTY MLIR_DIALECT_LIBS) +get_property(translation_libs GLOBAL PROPERTY MLIR_TRANSLATION_LIBS) + +iree_cc_binary( + NAME + iree-aie-translate + SRCS + iree-aie-translate.cpp + DEPS + iree::target::amd-aie::aie::AIEDialectIR + iree::target::amd-aie::aievec::AIEVecDialectIR + iree::target::amd-aie::aievec::AIEVecConvertToLLVM + ${dialect_libs} + ${translation_libs} + LLVMSupport + MLIRFuncAllExtensions + MLIRIR + MLIRParser + MLIRPass + MLIRTargetLLVMIRExport + MLIRTargetLLVMIRImport +) diff --git a/compiler/plugins/target/AMD-AIE/aievec/test/simulator/i16_max_reduce.mlir b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/i16_max_reduce.mlir new file mode 100644 index 000000000..48002cd84 --- /dev/null +++ b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/i16_max_reduce.mlir @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// Copyright (C) 2023-2024, Advanced Micro Devices, Inc. + +// REQUIRES: valid_xchess_license +// REQUIRES: peano, peano_and_chess +// RUN: mkdir -p %t/data; cd %t +// RUN: aie-opt %s %vector-to-generic-llvmir% -o llvmir.mlir +// RUN: aie-translate llvmir.mlir %llvmir-to-ll% -o dut.ll +// RUN: %PEANO_INSTALL_DIR/bin/clang %clang_aie2_args -c dut.ll -o dut.o +// RUN: xchesscc_wrapper %xchesscc_aie2_args -DTO_LLVM +w work +o work -I%S -I. %S/testbench.cc dut.o +// RUN: xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" >& xca_udm_dbg.stdout +// RUN: FileCheck --input-file=./xca_udm_dbg.stdout %s +// CHECK: TEST PASSED + // vector_to_generic_llvmir = '-canonicalize-vector-for-aievec=aie-target=aie2 -convert-vector-to-llvm -lower-affine -convert-scf-to-cf -canonicalize -cse -convert-math-to-llvm -expand-strided-metadata -finalize-memref-to-llvm -convert-func-to-llvm=\'use-bare-ptr-memref-call-conv\' -convert-index-to-llvm -canonicalize -cse' + +// --convert-vector-to-aievec -lower-affine -canonicalize -cse --convert-aievec-to-llvm --convert-scf-to-cf --iree-convert-to-llvm | iree-aie-translate --mlir-to-llvmir -o kernel.ll + +// --convert-vector-to-aievec -lower-affine -canonicalize -cse --convert-aievec-to-llvm --convert-scf-to-cf --iree-convert-to-llvm | ./tools/iree-aie-translate --mlir-to-llvmir +// ../llvm-aie/bin/clang --target=aie2-none-unknown-elf -Wl,--gc-sections -Wl,--orphan-handling=warn -Wl,-T,$PWD/ldfile kernel.o -o test.exe -v + +module { + func.func private @dut(%arg0: memref<1024xi16>, %arg1: memref<1024xi16>, %arg2: memref<1024xi16>) { + memref.assume_alignment %arg0, 32 : memref<1024xi16> + memref.assume_alignment %arg1, 32 : memref<1024xi16> + memref.assume_alignment %arg2, 32 : memref<1024xi16> + affine.for %arg3 = 0 to 1024 { + %0 = affine.load %arg0[%arg3] : memref<1024xi16> + %1 = affine.load %arg1[%arg3] : memref<1024xi16> + %2 = arith.muli %0, %1 : i16 + affine.store %2, %arg2[%arg3] : memref<1024xi16> + } + return + } + memref.global "private" constant @A : memref<1024xi16> = dense<1> + memref.global "private" constant @B : memref<1024xi16> = dense<2> + memref.global "private" constant @C : memref<1024xi16> = dense<0> + func.func @main() { + %0 = memref.get_global @A : memref<1024xi16> + %1 = memref.get_global @B : memref<1024xi16> + %2 = memref.get_global @C : memref<1024xi16> + func.call @dut(%0, %1, %2) : (memref<1024xi16>, memref<1024xi16>, memref<1024xi16>) -> () + return + } +} diff --git a/compiler/plugins/target/AMD-AIE/aievec/test/simulator/iree-aie-translate.cpp b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/iree-aie-translate.cpp new file mode 100644 index 000000000..efdd384d1 --- /dev/null +++ b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/iree-aie-translate.cpp @@ -0,0 +1,93 @@ +// Copyright 2024 The IREE Authors +// +// Licensed under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + +#include "aie/AIEDialect.h" +#include "aievec/AIEVecDialect.h" +#include "aievec/Passes.h" +#include "aievec/XLLVMDialect.h" +#include "mlir/Conversion/ArithToLLVM/ArithToLLVM.h" +#include "mlir/Conversion/ControlFlowToLLVM/ControlFlowToLLVM.h" +#include "mlir/Conversion/FuncToLLVM/ConvertFuncToLLVM.h" +#include "mlir/Conversion/FuncToLLVM/ConvertFuncToLLVMPass.h" +#include "mlir/Conversion/IndexToLLVM/IndexToLLVM.h" +#include "mlir/Conversion/MathToLLVM/MathToLLVM.h" +#include "mlir/Conversion/MemRefToLLVM/MemRefToLLVM.h" +#include "mlir/Conversion/SCFToControlFlow/SCFToControlFlow.h" +#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h" +#include "mlir/Dialect/Arith/Transforms/Passes.h" +#include "mlir/Dialect/DLTI/DLTI.h" +#include "mlir/Dialect/Func/Extensions/AllExtensions.h" +#include "mlir/Dialect/Func/IR/FuncOps.h" +#include "mlir/Dialect/Func/Transforms/Passes.h" +#include "mlir/Dialect/Math/IR/Math.h" +#include "mlir/Dialect/MemRef/Transforms/Passes.h" +#include "mlir/Dialect/SCF/Transforms/Passes.h" +#include "mlir/Dialect/Vector/IR/VectorOps.h" +#include "mlir/InitAllTranslations.h" +#include "mlir/Pass/PassManager.h" +#include "mlir/Support/LogicalResult.h" +#include "mlir/Target/LLVMIR/Dialect/All.h" +#include "mlir/Target/LLVMIR/Export.h" +#include "mlir/Tools/mlir-translate/MlirTranslateMain.h" +#include "mlir/Tools/mlir-translate/Translation.h" +#include "mlir/Transforms/Passes.h" + +using namespace mlir; +using namespace mlir::iree_compiler; + +namespace aie { +void registerToLLVMIRTranslation() { + TranslateFromMLIRRegistration registration( + "mlir-to-llvmir", "Translate MLIR to LLVMIR", + [](Operation *op, raw_ostream &output) { + PassManager pm(op->getContext()); + pm.addPass(createConvertVectorToLLVMPass()); + pm.addPass(memref::createExpandStridedMetadataPass()); + pm.addPass(createConvertMathToLLVMPass()); + pm.addPass(createConvertIndexToLLVMPass()); + pm.addPass(arith::createArithExpandOpsPass()); + pm.addPass(createArithToLLVMConversionPass()); + pm.addPass(createFinalizeMemRefToLLVMConversionPass()); + ConvertFuncToLLVMPassOptions options; + options.useBarePtrCallConv = true; + pm.addPass(createConvertFuncToLLVMPass(options)); + pm.addPass(createConvertControlFlowToLLVMPass()); + pm.addPass(createCanonicalizerPass()); + pm.addPass(createCSEPass()); + (void)pm.run(op); + + llvm::LLVMContext llvmContext; + auto llvmModule = translateModuleToLLVMIR(op, llvmContext); + if (!llvmModule) return failure(); + llvmModule->print(output, nullptr); + return success(); + }, + [](DialectRegistry ®istry) { + registry + .insert(); + registerBuiltinDialectTranslation(registry); + registerLLVMDialectTranslation(registry); + aievec::registerXLLVMDialectTranslation(registry); + arith::registerConvertArithToLLVMInterface(registry); + cf::registerConvertControlFlowToLLVMInterface(registry); + func::registerAllExtensions(registry); + registerConvertFuncToLLVMInterface(registry); + index::registerConvertIndexToLLVMInterface(registry); + registerConvertMathToLLVMInterface(registry); + registerConvertMemRefToLLVMInterface(registry); + }); +} +} // namespace aie + +int main(int argc, char **argv) { + registerFromLLVMIRTranslation(); + aie::registerToLLVMIRTranslation(); + return failed(mlirTranslateMain(argc, argv, "AMDAIE Translation Tool")); +} diff --git a/compiler/plugins/target/AMD-AIE/aievec/test/simulator/ldfile b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/ldfile new file mode 100644 index 000000000..39ff28a12 --- /dev/null +++ b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/ldfile @@ -0,0 +1,59 @@ +/* + * This file is licensed under the Apache License v2.0 with LLVM Exceptions. + * See https://llvm.org/LICENSE.txt for license information. + * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + * + * (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates + */ + +/* This is an example linker script that defines a simple memory layout for + * a binary running on aie2. It can be passed as a source file on clang's + * command line; it will pass it on to ld.lld, which interprets it as a + * linker script. + */ + +/* + * The extent of program and data memory + */ +MEMORY +{ + program (RX) : ORIGIN = 0, LENGTH = 0x0020000 + data (!RX) : ORIGIN = 0x20000, LENGTH = 0x0020000 +} + +/* + * We allow more than one text, data, etc section, provided that they + * have the right prefix '.text' etc. + * We force the start of the text section to address 0x0. + * The standard clang compiler driver supplies crt0.o and crt1.o which together + * define the C/C++ startup. + * crt0.o defines __start, the low-level entry point of execution. + * It initializes the stack pointer from the symbol _sp_start_value_DM_stack + * defined here and calls _main_init. + * crt1.o defines _main_init, which calls _Exit(main(0, nullptr)); + * _Exit should not return + */ +ENTRY(__start) +SECTIONS +{ + . = 0x0; + .text : { + *crt0.o(.text*) + *(.text*) + } > program + + .stack : { + . = 0x20000; + _sp_start_value_DM_stack = .; + . += 0x800; + } > data + .rodata : { + *(.rodata*) + } > data + .data : { + *(.data*) + } > data + .bss : { + *(.bss*) + } > data +} diff --git a/compiler/plugins/target/AMD-AIE/aievec/test/simulator/profiling.tcl b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/profiling.tcl new file mode 100644 index 000000000..79342eaef --- /dev/null +++ b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/profiling.tcl @@ -0,0 +1,100 @@ +# +# Tcl srcipt for standalone ISS. +# + +proc usage { } { + puts "" + puts "Usage: -T -P -t \"iss.tcl \"" + puts "" +} + +if { [llength $::iss::tcl_script_args] == 0 } { + puts "ERROR (standalone.tcl) script argument is missing" + usage + iss close + exit 5 +} elseif { [llength $::iss::tcl_script_args] == 1 } { + set program $::iss::tcl_script_args +} elseif { [llength $::iss::tcl_script_args] == 2 } { + set args [split $::iss::tcl_script_args] + set program [lindex $args 0] + set fileio [lindex $args 1] +} else { + puts "ERROR (standalone.tcl) too many arguments" + usage + iss close + exit 5 +} + +# Create ISS +set procname [lindex [::iss::processors] 0] +::iss::create $procname iss + +set procdir [iss info processor_dir {} 0] + +puts "program.mem $program.mem" + +set mem_file $program.mem +set rcd_file $program.iss.rcd +set prf_human profile.prf +set prf_xml profile.xml +set prf_instr_xml profile_instr.xml +set ipr_file profile.ipr + +# Load program +puts [llength $::iss::tcl_main_argv_strings] +puts $::iss::tcl_main_argv_strings +if {[llength $::iss::tcl_main_argv_strings] > 0} { + iss program load $program \ + -nmlpath $procdir \ + -dwarf2 \ + -do_not_load_sp 1 \ + -disassemble \ + -sourcepath {.} \ + -load_main_argv_strings -main_argv_strings $::iss::tcl_main_argv_strings +} else { + iss program load $program \ + -nmlpath $procdir \ + -dwarf2 \ + -do_not_load_sp 1 \ + -disassemble \ + -sourcepath {.} \ +} + +if {[info exists fileio]} { + source $fileio +} + +# Simulate until end of main +catch { iss step -1 } msg +puts $msg + +# CRVO-3521 Detect assert in C and exit with an error +set rt 0 +foreach bp [iss breakpoint mic get] { + set d [::tclutils::list2dict $::iss::mic_breakpoint_keys $bp] + if {[dict get $d hit_last_cycle]} { + if {[dict get $d chess_assert]} { + puts "ASSERT" + set rt 123 + exit $rt + break + } + } +} + +catch { iss step 3 } msg +puts $msg + +# Save instruction profile in human readable form +iss profile save $prf_human +# Save instruction profile in xml form +iss profile save $prf_xml -type function_profiling -xml 1 -function_details 0 -one_file 1 -call_details Off +iss profile save $prf_instr_xml -type function_details -xml 1 -user_cycle_count On -one_file 1 -source_refs Off + +# Generate instruction profile in form usable for coverage analysis +iss profile save -type profile-Risk $ipr_file + +iss close +exit + diff --git a/compiler/plugins/target/AMD-AIE/aievec/test/simulator/run.sh b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/run.sh new file mode 100755 index 000000000..60ddba02b --- /dev/null +++ b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/run.sh @@ -0,0 +1,21 @@ +#!/bin/bash + +LLVM_AIE_DIR=/home/mlevental/dev_projects/iree-amd-aie/llvm-aie +IREE_INSTALL_DIR=/home/mlevental/dev_projects/iree-amd-aie/cmake-build-debug +AIETOOLS=/home/mlevental/dev_projects/iree-amd-aie/Vitis/2024.2/aietools +export PATH=$AIETOOLS/bin/unwrapped/lnx64.o:$AIETOOLS/bin/unwrapped/lnx64.o/aie_ml:$AIETOOLS/tps/lnx64/target_aie_ml/bin/LNa64bin:$PATH +export XILINXD_LICENSE_FILE=$HOME/.Xilinx/aie.lic +export LD_LIBRARY_PATH=/home/mlevental/dev_projects/iree-amd-aie/Vitis/2024.2/aietools/lib/lnx64.o:$LD_LIBRARY_PATH +export RDI_DATADIR=/home/mlevental/dev_projects/iree-amd-aie/Vitis/2024.2/aietools/data +export FLEXLM_DIAGNOSTICS=3 +export CHESSDIR=$AIETOOLS/tps/lnx64/target_aie_ml/chessdir + +$IREE_INSTALL_DIR/tools/iree-opt $PWD/i16_max_reduce.mlir --convert-vector-to-aievec -lower-affine -canonicalize -cse --convert-aievec-to-llvm --convert-scf-to-cf --iree-convert-to-llvm | $IREE_INSTALL_DIR/tools/iree-aie-translate --mlir-to-llvmir -o kernel.ll +$AIETOOLS/bin/unwrapped/lnx64.o/xchesscc -j1 -pme -P $AIETOOLS/data/aie_ml/lib -f -C Release_LLVM +w $PWD -D__AIENGINE__ -D__AIE_ARCH__=20 -D__AIEARCH__=20 -I $AIETOOLS/include -d kernel.ll + +#$LLVM_AIE_DIR/bin/clang --target=aie2-none-unknown-elf -c kernel.ll -o kernel.o +#$LLVM_AIE_DIR/bin/clang --target=aie2-none-unknown-elf -Wl,--gc-sections -Wl,--orphan-handling=warn -Wl,-T,$PWD/ldfile kernel.o -o test.exe -v + +xca_udm_dbg +C -T -P $AIETOOLS/data/aie_ml/lib -t "$PWD/profiling.tcl $PWD/a.out" +#xca_udm_dbg +C -T -P $AIETOOLS/data/aie_ml/lib -t "$PWD/sim.tcl" +#xca_udm_dbg -P $AIETOOLS/data/aie_ml/lib -p $PWD/test.exe diff --git a/compiler/plugins/target/AMD-AIE/aievec/test/simulator/sim.tcl b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/sim.tcl new file mode 100644 index 000000000..ae517f6c0 --- /dev/null +++ b/compiler/plugins/target/AMD-AIE/aievec/test/simulator/sim.tcl @@ -0,0 +1,8 @@ +iss::create %PROCESSORNAME% iss +iss program load ./test.exe -disassemble -nmlpath /home/mlevental/dev_projects/iree-amd-aie/Vitis/2024.2/aietools/data/aie_ml/lib -extradisassembleopts +Mdec -do_not_set_entry_pc 1 -do_not_load_sp 1 -pm_check first -load_offsets {} -software_breakpoints_allowed on -hardware_breakpoints_allowed on +iss fileinput add SCD 0 -field -file ./i16_max_reduce.mlir -interval_files {} -position 0 -type {} -radix decimal -filter {} -break_on_wrap 0 -cycle_based 0 -format integer -gen_vcd_event 0 -structured 0 -bin_nbr_bytes 1 -bin_lsb_first 0 +iss step -1 +iss profile save test.prf +iss close +exit + diff --git a/compiler/plugins/target/AMD-AIE/iree-amd-aie/PluginRegistration.cpp b/compiler/plugins/target/AMD-AIE/iree-amd-aie/PluginRegistration.cpp index 50d72b077..a82cb9b55 100644 --- a/compiler/plugins/target/AMD-AIE/iree-amd-aie/PluginRegistration.cpp +++ b/compiler/plugins/target/AMD-AIE/iree-amd-aie/PluginRegistration.cpp @@ -39,6 +39,7 @@ struct AMDAIESession aievec::registerConvertAIEVecToLLVMPass(); aievec::registerCanonicalizeVectorForAIEVecPass(); aievec::registerLowerVectorToAIEVecPass(); + aievec::registerAIEVecPipelines(); } void onRegisterDialects(DialectRegistry ®istry) override { diff --git a/compiler/plugins/target/AMD-AIE/iree-amd-aie/Target/XCLBinGen.cpp b/compiler/plugins/target/AMD-AIE/iree-amd-aie/Target/XCLBinGen.cpp index 5de16906f..8f53f31fb 100644 --- a/compiler/plugins/target/AMD-AIE/iree-amd-aie/Target/XCLBinGen.cpp +++ b/compiler/plugins/target/AMD-AIE/iree-amd-aie/Target/XCLBinGen.cpp @@ -252,13 +252,11 @@ std::vector makeChessEnv(Path &vitisDir, *getTargetDir(npuVersion) / "bin" / "LNa64bin"; Path path(::getenv("PATH")); Path lnx64o = aieToolsPath / "lib" / "lnx64.o"; - Path dotLib = aieToolsPath / "lnx64" / "tools" / "dot" / "lib"; Path ldLibraryPath(::getenv("LD_LIBRARY_PATH")); std::string pathEnv = "PATH=" + chessccPath.string() + std::string{sys::EnvPathSeparator} + path.string(); std::string ldLibEnv = "LD_LIBRARY_PATH=" + lnx64o.string() + - std::string{sys::EnvPathSeparator} + dotLib.string() + std::string{sys::EnvPathSeparator} + ldLibraryPath.string(); std::string rdiDataEnv = "RDI_DATADIR=" + (aieToolsPath / "data").string();