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configuration_bits.c
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/******************************************************************************/
/* Files to Include */
/******************************************************************************/
/* Device header file */
#if defined(__XC16__)
#include <xc.h>
#elif defined(__C30__)
#if defined(__PIC24E__)
#include <p24Exxxx.h>
#elif defined (__PIC24F__)||defined (__PIC24FK__)
#include <p24Fxxxx.h>
#elif defined(__PIC24H__)
#include <p24Hxxxx.h>
#endif
#endif
/******************************************************************************/
/* Configuration Bits */
/* */
/* This is not all available configuration bits for all PIC24 devices. */
/* Refer to the PIC24 device specific .h file in the compiler */
/* support\PIC24x\h (x=F,H,E) directory for complete options specific to the */
/* selected device. For additional information about what the hardware */
/* configurations mean in terms of device operation, refer to the device */
/* datasheet 'Special Features' chapter. */
/* */
/* A feature of MPLAB X is the 'Generate Source Code to Output' utility in */
/* the Configuration Bits window. Under Window > PIC Memory Views > */
/* Configuration Bits, a user controllable configuration bits window is */
/* available to Generate Configuration Bits source code which the user can */
/* paste into this project. */
/******************************************************************************/
/* TODO Fill in your configuration bits from the config bits generator here. */
// PIC24HJ128GP502 Configuration Bit Settings
// 'C' source line config statements
// FBS
#pragma config BWRP = WRPROTECT_OFF // Boot Segment Write Protect (Boot Segment may be written)
#pragma config BSS = NO_FLASH // Boot Segment Program Flash Code Protection (No Boot program Flash segment)
#pragma config RBS = NO_RAM // Boot Segment RAM Protection (No Boot RAM)
// FSS
#pragma config SWRP = WRPROTECT_OFF // Secure Segment Program Write Protect (Secure segment may be written)
#pragma config SSS = NO_FLASH // Secure Segment Program Flash Code Protection (No Secure Segment)
#pragma config RSS = NO_RAM // Secure Segment Data RAM Protection (No Secure RAM)
// FGS
#pragma config GWRP = OFF // General Code Segment Write Protect (User program memory is not write-protected)
#pragma config GSS = OFF // General Segment Code Protection (User program memory is not code-protected)
// FOSCSEL
#pragma config FNOSC = PRIPLL // Oscillator Mode (Internal Fast RC (FRC) with divide by N)
#pragma config IESO = OFF // Internal External Switch Over Mode (Start-up device with FRC, then automatically switch to user-selected oscillator source when ready)
// FOSC
#pragma config POSCMD = XT // Primary Oscillator Source (Primary Oscillator Disabled)
#pragma config OSCIOFNC = OFF // OSC2 Pin Function (OSC2 pin has clock out function)
#pragma config IOL1WAY = OFF // Peripheral Pin Select Configuration (Allow Only One Re-configuration)
#pragma config FCKSM = CSECMD // Si no esta aixi falla UART
// FWDT
#pragma config WDTPOST = PS32768 // Watchdog Timer Postscaler (1:32,768)
#pragma config WDTPRE = PR128 // WDT Prescaler (1:128)
#pragma config WINDIS = OFF // Watchdog Timer Window (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = OFF // Watchdog Timer Enable (Watchdog timer always enabled)
// FPOR
#pragma config FPWRT = PWR128 // POR Timer Value (128ms)
#pragma config ALTI2C = OFF // Alternate I2C pins (I2C mapped to SDA1/SCL1 pins)
// FICD
#pragma config ICS = PGD3 // Comm Channel Select (Communicate on PGC3/EMUC1 and PGD3/EMUD1)
#pragma config JTAGEN = OFF // JTAG Port Enable (JTAG is Disabled)
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.