.gitmodules

[submodule "submodule/verilog-pcie"]
	path = submodule/verilog-pcie
	url = https://github.com/alexforencich/verilog-pcie.git
[submodule "submodule/verilog-ethernet"]
	path = submodule/verilog-ethernet
	url = https://github.com/alexforencich/verilog-ethernet.git
[submodule "submodule/verilog-axis"]
	path = submodule/verilog-axis
	url = https://github.com/alexforencich/verilog-axis.git
[submodule "submodule/verilog-axi"]
	path = submodule/verilog-axi
	url = https://github.com/alexforencich/verilog-axi.git
[submodule "submodule/corundum"]
	path = submodule/corundum
	url = https://github.com/corundum/corundum.git
[submodule "submodule/verilog-wishbone"]
	path = submodule/verilog-wishbone
	url = https://github.com/alexforencich/verilog-wishbone.git
[submodule "submodule/verilog-i2c"]
	path = submodule/verilog-i2c
	url = https://github.com/alexforencich/verilog-i2c.git
[submodule "submodule/open-nic-shell"]
	path = submodule/open-nic-shell
	url = https://github.com/Xilinx/open-nic-shell.git
[submodule "submodule/dma_ip_drivers"]
	path = submodule/dma_ip_drivers
	url = https://github.com/Xilinx/dma_ip_drivers
[submodule "submodule/pin-uart"]
	path = submodule/pin-uart
	url = https://github.com/alexforencich/pin-uart.git