Dynamic Shift Left

[Bynaryman]

Could you help me understand the sense of the Dynamic Shift Left ? Why not simply use the "<<" operator directly ? Is it to get better hardware ? Is it to stay generic ? I did a testbench with 16 bits comparing << operator with your module and I get the same values for every possible input

[manish-kj]

Hi, sorry for late reply.
You question is related to correctly synthesizable coding.
Dynamic shift left is used to shift a input with variable length. However, The simple "<<" operator will do it for a fixed amount of shifting value. For example if write "A << 5" it will generate a hardware just for 5 bit left shifter, which can not be used any other size shifting amount. I would suggest you to do a post-synthesis simulation of both case, and try to vary the shifting amount variable.

[Bynaryman]

Hi, thanks to reply !
Actually, the operator "<<" works for a variable shifting amount i.e. a signal in fpga. I guess, right now, tools are able to infer hardware capable of doing that similar the module you propose. I am using vivado 2018.2, but It also works for vivado 2017. I am a young fpga developer, so I did not have to face the old school difficulties of synthesizers. In my modest opinion, I think we can rely on quality of hardware generated by "reg << signal". Don't you think so ?

[manish-kj]

I would say, try to see do a post-synthesis verification of the results. It will confirm either of our opinion :)