From 2b5e2b8996098a025c8e1960ce14b0bb5f8f94c5 Mon Sep 17 00:00:00 2001 From: Aaron Ballman Date: Thu, 11 Jul 2024 10:47:33 -0400 Subject: [PATCH 1/7] Revert "Temporarily revert the code part of D100981 "Delete le32/le64 targets"" This reverts commit ef5e7f90ea4d5063ce68b952c5de473e610afc02. --- clang/lib/Basic/CMakeLists.txt | 1 - clang/lib/Basic/Targets.cpp | 12 -- clang/lib/Basic/Targets/Le64.cpp | 30 ----- clang/lib/Basic/Targets/Le64.h | 64 ----------- clang/lib/Basic/Targets/OSTargets.h | 4 +- clang/lib/CodeGen/ItaniumCXXABI.cpp | 7 -- clang/lib/Driver/ToolChains/Clang.cpp | 6 - llvm/include/llvm/TargetParser/Triple.h | 2 - llvm/lib/TargetParser/Triple.cpp | 104 ++++++++++++++++-- .../gn/secondary/clang/lib/Basic/BUILD.gn | 1 - 10 files changed, 99 insertions(+), 132 deletions(-) delete mode 100644 clang/lib/Basic/Targets/Le64.cpp delete mode 100644 clang/lib/Basic/Targets/Le64.h diff --git a/clang/lib/Basic/CMakeLists.txt b/clang/lib/Basic/CMakeLists.txt index f30680552e0f5b..e7ebc8f191aa6b 100644 --- a/clang/lib/Basic/CMakeLists.txt +++ b/clang/lib/Basic/CMakeLists.txt @@ -102,7 +102,6 @@ add_clang_library(clangBasic Targets/DirectX.cpp Targets/Hexagon.cpp Targets/Lanai.cpp - Targets/Le64.cpp Targets/LoongArch.cpp Targets/M68k.cpp Targets/MSP430.cpp diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index 29133f9ee8fcec..0b8e565345b6a4 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -23,7 +23,6 @@ #include "Targets/DirectX.h" #include "Targets/Hexagon.h" #include "Targets/Lanai.h" -#include "Targets/Le64.h" #include "Targets/LoongArch.h" #include "Targets/M68k.h" #include "Targets/MSP430.h" @@ -344,17 +343,6 @@ std::unique_ptr AllocateTarget(const llvm::Triple &Triple, return std::make_unique(Triple, Opts); } - case llvm::Triple::le32: - switch (os) { - case llvm::Triple::NaCl: - return std::make_unique>(Triple, Opts); - default: - return nullptr; - } - - case llvm::Triple::le64: - return std::make_unique(Triple, Opts); - case llvm::Triple::ppc: switch (os) { case llvm::Triple::Linux: diff --git a/clang/lib/Basic/Targets/Le64.cpp b/clang/lib/Basic/Targets/Le64.cpp deleted file mode 100644 index f7afa0e747d67b..00000000000000 --- a/clang/lib/Basic/Targets/Le64.cpp +++ /dev/null @@ -1,30 +0,0 @@ -//===--- Le64.cpp - Implement Le64 target feature support -----------------===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This file implements Le64 TargetInfo objects. -// -//===----------------------------------------------------------------------===// - -#include "Le64.h" -#include "Targets.h" -#include "clang/Basic/Builtins.h" -#include "clang/Basic/MacroBuilder.h" -#include "clang/Basic/TargetBuiltins.h" - -using namespace clang; -using namespace clang::targets; - -ArrayRef Le64TargetInfo::getTargetBuiltins() const { - return {}; -} - -void Le64TargetInfo::getTargetDefines(const LangOptions &Opts, - MacroBuilder &Builder) const { - DefineStd(Builder, "unix", Opts); - defineCPUMacros(Builder, "le64", /*Tuning=*/false); -} diff --git a/clang/lib/Basic/Targets/Le64.h b/clang/lib/Basic/Targets/Le64.h deleted file mode 100644 index 45f6a4e9dd75d8..00000000000000 --- a/clang/lib/Basic/Targets/Le64.h +++ /dev/null @@ -1,64 +0,0 @@ -//===--- Le64.h - Declare Le64 target feature support -----------*- C++ -*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This file declares Le64 TargetInfo objects. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H -#define LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H - -#include "clang/Basic/TargetInfo.h" -#include "clang/Basic/TargetOptions.h" -#include "llvm/Support/Compiler.h" -#include "llvm/TargetParser/Triple.h" - -namespace clang { -namespace targets { - -class LLVM_LIBRARY_VISIBILITY Le64TargetInfo : public TargetInfo { - -public: - Le64TargetInfo(const llvm::Triple &Triple, const TargetOptions &) - : TargetInfo(Triple) { - NoAsmVariants = true; - LongWidth = LongAlign = PointerWidth = PointerAlign = 64; - MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; - resetDataLayout("e-m:e-v128:32-v16:16-v32:32-v96:32-n8:16:32:64-S128"); - } - - void getTargetDefines(const LangOptions &Opts, - MacroBuilder &Builder) const override; - - ArrayRef getTargetBuiltins() const override; - - BuiltinVaListKind getBuiltinVaListKind() const override { - return TargetInfo::PNaClABIBuiltinVaList; - } - - std::string_view getClobbers() const override { return ""; } - - ArrayRef getGCCRegNames() const override { - return std::nullopt; - } - - ArrayRef getGCCRegAliases() const override { - return std::nullopt; - } - - bool validateAsmConstraint(const char *&Name, - TargetInfo::ConstraintInfo &Info) const override { - return false; - } - - bool hasProtectedVisibility() const override { return false; } -}; - -} // namespace targets -} // namespace clang -#endif // LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H diff --git a/clang/lib/Basic/Targets/OSTargets.h b/clang/lib/Basic/Targets/OSTargets.h index 5f27c3469f861d..4fcf16c62ae621 100644 --- a/clang/lib/Basic/Targets/OSTargets.h +++ b/clang/lib/Basic/Targets/OSTargets.h @@ -842,8 +842,8 @@ class LLVM_LIBRARY_VISIBILITY NaClTargetInfo : public OSTargetInfo { } else if (Triple.getArch() == llvm::Triple::mipsel) { // Handled on mips' setDataLayout. } else { - assert(Triple.getArch() == llvm::Triple::le32); - this->resetDataLayout("e-p:32:32-i64:64"); + assert(Triple.getArch() == llvm::Triple::mipsel); + // Handled on mips' setDataLayout. } } }; diff --git a/clang/lib/CodeGen/ItaniumCXXABI.cpp b/clang/lib/CodeGen/ItaniumCXXABI.cpp index e1d056765a8663..6e5fa0faf73d70 100644 --- a/clang/lib/CodeGen/ItaniumCXXABI.cpp +++ b/clang/lib/CodeGen/ItaniumCXXABI.cpp @@ -576,13 +576,6 @@ CodeGen::CGCXXABI *CodeGen::CreateItaniumCXXABI(CodeGenModule &CGM) { return new XLCXXABI(CGM); case TargetCXXABI::GenericItanium: - if (CGM.getContext().getTargetInfo().getTriple().getArch() - == llvm::Triple::le32) { - // For PNaCl, use ARM-style method pointers so that PNaCl code - // does not assume anything about the alignment of function - // pointers. - return new ItaniumCXXABI(CGM, /*UseARMMethodPtrABI=*/true); - } return new ItaniumCXXABI(CGM); case TargetCXXABI::Microsoft: diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index edb3c20ec97688..538a8ca9aa8ddf 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -3812,12 +3812,6 @@ static void RenderBuiltinOptions(const ToolChain &TC, const llvm::Triple &T, if (UseBuiltins) A->render(Args, CmdArgs); } - - // le32-specific flags: - // -fno-math-builtin: clang should not convert math builtins to intrinsics - // by default. - if (TC.getArch() == llvm::Triple::le32) - CmdArgs.push_back("-fno-math-builtin"); } bool Driver::getDefaultModuleCachePath(SmallVectorImpl &Result) { diff --git a/llvm/include/llvm/TargetParser/Triple.h b/llvm/include/llvm/TargetParser/Triple.h index b3bb354b38ff58..cb2be3bbd29f7b 100644 --- a/llvm/include/llvm/TargetParser/Triple.h +++ b/llvm/include/llvm/TargetParser/Triple.h @@ -88,8 +88,6 @@ class Triple { xtensa, // Tensilica: Xtensa nvptx, // NVPTX: 32-bit nvptx64, // NVPTX: 64-bit - le32, // le32: generic little-endian 32-bit CPU (PNaCl) - le64, // le64: generic little-endian 64-bit CPU (PNaCl) amdil, // AMDIL amdil64, // AMDIL with 64-bit pointers hsail, // AMD HSAIL diff --git a/llvm/lib/TargetParser/Triple.cpp b/llvm/lib/TargetParser/Triple.cpp index 4fc1ff5aaa051f..de013f03a0e4d8 100644 --- a/llvm/lib/TargetParser/Triple.cpp +++ b/llvm/lib/TargetParser/Triple.cpp @@ -44,8 +44,6 @@ StringRef Triple::getArchTypeName(ArchType Kind) { case hsail: return "hsail"; case kalimba: return "kalimba"; case lanai: return "lanai"; - case le32: return "le32"; - case le64: return "le64"; case loongarch32: return "loongarch32"; case loongarch64: return "loongarch64"; case m68k: return "m68k"; @@ -199,9 +197,6 @@ StringRef Triple::getArchTypePrefix(ArchType Kind) { case nvptx: return "nvvm"; case nvptx64: return "nvvm"; - case le32: return "le32"; - case le64: return "le64"; - case amdil: case amdil64: return "amdil"; @@ -432,8 +427,6 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) { .Case("xcore", xcore) .Case("nvptx", nvptx) .Case("nvptx64", nvptx64) - .Case("le32", le32) - .Case("le64", le64) .Case("amdil", amdil) .Case("amdil64", amdil64) .Case("hsail", hsail) @@ -525,6 +518,7 @@ static Triple::ArchType parseARMArch(StringRef ArchName) { } static Triple::ArchType parseArch(StringRef ArchName) { +<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp auto AT = StringSwitch(ArchName) .Cases("i386", "i486", "i586", "i686", Triple::x86) @@ -605,6 +599,71 @@ static Triple::ArchType parseArch(StringRef ArchName) { Triple::dxil) .Case("xtensa", Triple::xtensa) .Default(Triple::UnknownArch); +======= + auto AT = StringSwitch(ArchName) + .Cases("i386", "i486", "i586", "i686", Triple::x86) + // FIXME: Do we need to support these? + .Cases("i786", "i886", "i986", Triple::x86) + .Cases("amd64", "x86_64", "x86_64h", Triple::x86_64) + .Cases("powerpc", "powerpcspe", "ppc", "ppc32", Triple::ppc) + .Cases("powerpcle", "ppcle", "ppc32le", Triple::ppcle) + .Cases("powerpc64", "ppu", "ppc64", Triple::ppc64) + .Cases("powerpc64le", "ppc64le", Triple::ppc64le) + .Case("xscale", Triple::arm) + .Case("xscaleeb", Triple::armeb) + .Case("aarch64", Triple::aarch64) + .Case("aarch64_be", Triple::aarch64_be) + .Case("aarch64_32", Triple::aarch64_32) + .Case("arc", Triple::arc) + .Case("arm64", Triple::aarch64) + .Case("arm64_32", Triple::aarch64_32) + .Case("arm64e", Triple::aarch64) + .Case("arm", Triple::arm) + .Case("armeb", Triple::armeb) + .Case("thumb", Triple::thumb) + .Case("thumbeb", Triple::thumbeb) + .Case("avr", Triple::avr) + .Case("m68k", Triple::m68k) + .Case("msp430", Triple::msp430) + .Cases("mips", "mipseb", "mipsallegrex", "mipsisa32r6", + "mipsr6", Triple::mips) + .Cases("mipsel", "mipsallegrexel", "mipsisa32r6el", "mipsr6el", + Triple::mipsel) + .Cases("mips64", "mips64eb", "mipsn32", "mipsisa64r6", + "mips64r6", "mipsn32r6", Triple::mips64) + .Cases("mips64el", "mipsn32el", "mipsisa64r6el", "mips64r6el", + "mipsn32r6el", Triple::mips64el) + .Case("r600", Triple::r600) + .Case("amdgcn", Triple::amdgcn) + .Case("riscv32", Triple::riscv32) + .Case("riscv64", Triple::riscv64) + .Case("hexagon", Triple::hexagon) + .Cases("s390x", "systemz", Triple::systemz) + .Case("sparc", Triple::sparc) + .Case("sparcel", Triple::sparcel) + .Cases("sparcv9", "sparc64", Triple::sparcv9) + .Case("tce", Triple::tce) + .Case("tcele", Triple::tcele) + .Case("xcore", Triple::xcore) + .Case("nvptx", Triple::nvptx) + .Case("nvptx64", Triple::nvptx64) + .Case("amdil", Triple::amdil) + .Case("amdil64", Triple::amdil64) + .Case("hsail", Triple::hsail) + .Case("hsail64", Triple::hsail64) + .Case("spir", Triple::spir) + .Case("spir64", Triple::spir64) + .StartsWith("kalimba", Triple::kalimba) + .Case("lanai", Triple::lanai) + .Case("renderscript32", Triple::renderscript32) + .Case("renderscript64", Triple::renderscript64) + .Case("shave", Triple::shave) + .Case("ve", Triple::ve) + .Case("wasm32", Triple::wasm32) + .Case("wasm64", Triple::wasm64) + .Case("csky", Triple::csky) + .Default(Triple::UnknownArch); +>>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp // Some architectures require special parsing logic just to compute the // ArchType result. @@ -905,10 +964,13 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) { case Triple::hsail: case Triple::kalimba: case Triple::lanai: +<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp case Triple::le32: case Triple::le64: case Triple::loongarch32: case Triple::loongarch64: +======= +>>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case Triple::m68k: case Triple::mips64: case Triple::mips64el: @@ -1603,8 +1665,11 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) { case llvm::Triple::hsail: case llvm::Triple::kalimba: case llvm::Triple::lanai: +<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp case llvm::Triple::le32: case llvm::Triple::loongarch32: +======= +>>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case llvm::Triple::m68k: case llvm::Triple::mips: case llvm::Triple::mipsel: @@ -1636,8 +1701,11 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) { case llvm::Triple::bpfeb: case llvm::Triple::bpfel: case llvm::Triple::hsail64: +<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp case llvm::Triple::le64: case llvm::Triple::loongarch64: +======= +>>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case llvm::Triple::mips64: case llvm::Triple::mips64el: case llvm::Triple::nvptx64: @@ -1695,8 +1763,11 @@ Triple Triple::get32BitArchVariant() const { case Triple::hsail: case Triple::kalimba: case Triple::lanai: +<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp case Triple::le32: case Triple::loongarch32: +======= +>>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case Triple::m68k: case Triple::mips: case Triple::mipsel: @@ -1726,6 +1797,7 @@ Triple Triple::get32BitArchVariant() const { case Triple::aarch64_be: T.setArch(Triple::armeb); break; case Triple::amdil64: T.setArch(Triple::amdil); break; case Triple::hsail64: T.setArch(Triple::hsail); break; +<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp case Triple::le64: T.setArch(Triple::le32); break; case Triple::loongarch64: T.setArch(Triple::loongarch32); break; case Triple::mips64: @@ -1734,6 +1806,10 @@ Triple Triple::get32BitArchVariant() const { case Triple::mips64el: T.setArch(Triple::mipsel, getSubArch()); break; +======= + case Triple::mips64: T.setArch(Triple::mips); break; + case Triple::mips64el: T.setArch(Triple::mipsel); break; +>>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case Triple::nvptx64: T.setArch(Triple::nvptx); break; case Triple::ppc64: T.setArch(Triple::ppc); break; case Triple::ppc64le: T.setArch(Triple::ppcle); break; @@ -1781,8 +1857,11 @@ Triple Triple::get64BitArchVariant() const { case Triple::bpfeb: case Triple::bpfel: case Triple::hsail64: +<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp case Triple::le64: case Triple::loongarch64: +======= +>>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case Triple::mips64: case Triple::mips64el: case Triple::nvptx64: @@ -1805,6 +1884,7 @@ Triple Triple::get64BitArchVariant() const { case Triple::arm: T.setArch(Triple::aarch64); break; case Triple::armeb: T.setArch(Triple::aarch64_be); break; case Triple::hsail: T.setArch(Triple::hsail64); break; +<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp case Triple::le32: T.setArch(Triple::le64); break; case Triple::loongarch32: T.setArch(Triple::loongarch64); break; case Triple::mips: @@ -1813,6 +1893,10 @@ Triple Triple::get64BitArchVariant() const { case Triple::mipsel: T.setArch(Triple::mips64el, getSubArch()); break; +======= + case Triple::mips: T.setArch(Triple::mips64); break; + case Triple::mipsel: T.setArch(Triple::mips64el); break; +>>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case Triple::nvptx: T.setArch(Triple::nvptx64); break; case Triple::ppc: T.setArch(Triple::ppc64); break; case Triple::ppcle: T.setArch(Triple::ppc64le); break; @@ -1848,10 +1932,13 @@ Triple Triple::getBigEndianArchVariant() const { case Triple::hsail64: case Triple::hsail: case Triple::kalimba: +<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp case Triple::le32: case Triple::le64: case Triple::loongarch32: case Triple::loongarch64: +======= +>>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case Triple::msp430: case Triple::nvptx64: case Triple::nvptx: @@ -1953,10 +2040,13 @@ bool Triple::isLittleEndian() const { case Triple::hsail64: case Triple::hsail: case Triple::kalimba: +<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp case Triple::le32: case Triple::le64: case Triple::loongarch32: case Triple::loongarch64: +======= +>>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case Triple::mips64el: case Triple::mipsel: case Triple::msp430: diff --git a/llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn b/llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn index 576ab1db54988d..d2cf5243627a04 100644 --- a/llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn +++ b/llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn @@ -108,7 +108,6 @@ static_library("Basic") { "Targets/DirectX.cpp", "Targets/Hexagon.cpp", "Targets/Lanai.cpp", - "Targets/Le64.cpp", "Targets/LoongArch.cpp", "Targets/M68k.cpp", "Targets/MSP430.cpp", From 2142a7f7bbedc7b982df8a19fc1fbd00ed158e0e Mon Sep 17 00:00:00 2001 From: Aaron Ballman Date: Thu, 11 Jul 2024 10:57:31 -0400 Subject: [PATCH 2/7] Repairing some merge conflicts that were missed before --- llvm/lib/TargetParser/Triple.cpp | 111 ------------------------------- 1 file changed, 111 deletions(-) diff --git a/llvm/lib/TargetParser/Triple.cpp b/llvm/lib/TargetParser/Triple.cpp index de013f03a0e4d8..a54a02ac61d681 100644 --- a/llvm/lib/TargetParser/Triple.cpp +++ b/llvm/lib/TargetParser/Triple.cpp @@ -518,7 +518,6 @@ static Triple::ArchType parseARMArch(StringRef ArchName) { } static Triple::ArchType parseArch(StringRef ArchName) { -<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp auto AT = StringSwitch(ArchName) .Cases("i386", "i486", "i586", "i686", Triple::x86) @@ -568,8 +567,6 @@ static Triple::ArchType parseArch(StringRef ArchName) { .Case("xcore", Triple::xcore) .Case("nvptx", Triple::nvptx) .Case("nvptx64", Triple::nvptx64) - .Case("le32", Triple::le32) - .Case("le64", Triple::le64) .Case("amdil", Triple::amdil) .Case("amdil64", Triple::amdil64) .Case("hsail", Triple::hsail) @@ -599,71 +596,6 @@ static Triple::ArchType parseArch(StringRef ArchName) { Triple::dxil) .Case("xtensa", Triple::xtensa) .Default(Triple::UnknownArch); -======= - auto AT = StringSwitch(ArchName) - .Cases("i386", "i486", "i586", "i686", Triple::x86) - // FIXME: Do we need to support these? - .Cases("i786", "i886", "i986", Triple::x86) - .Cases("amd64", "x86_64", "x86_64h", Triple::x86_64) - .Cases("powerpc", "powerpcspe", "ppc", "ppc32", Triple::ppc) - .Cases("powerpcle", "ppcle", "ppc32le", Triple::ppcle) - .Cases("powerpc64", "ppu", "ppc64", Triple::ppc64) - .Cases("powerpc64le", "ppc64le", Triple::ppc64le) - .Case("xscale", Triple::arm) - .Case("xscaleeb", Triple::armeb) - .Case("aarch64", Triple::aarch64) - .Case("aarch64_be", Triple::aarch64_be) - .Case("aarch64_32", Triple::aarch64_32) - .Case("arc", Triple::arc) - .Case("arm64", Triple::aarch64) - .Case("arm64_32", Triple::aarch64_32) - .Case("arm64e", Triple::aarch64) - .Case("arm", Triple::arm) - .Case("armeb", Triple::armeb) - .Case("thumb", Triple::thumb) - .Case("thumbeb", Triple::thumbeb) - .Case("avr", Triple::avr) - .Case("m68k", Triple::m68k) - .Case("msp430", Triple::msp430) - .Cases("mips", "mipseb", "mipsallegrex", "mipsisa32r6", - "mipsr6", Triple::mips) - .Cases("mipsel", "mipsallegrexel", "mipsisa32r6el", "mipsr6el", - Triple::mipsel) - .Cases("mips64", "mips64eb", "mipsn32", "mipsisa64r6", - "mips64r6", "mipsn32r6", Triple::mips64) - .Cases("mips64el", "mipsn32el", "mipsisa64r6el", "mips64r6el", - "mipsn32r6el", Triple::mips64el) - .Case("r600", Triple::r600) - .Case("amdgcn", Triple::amdgcn) - .Case("riscv32", Triple::riscv32) - .Case("riscv64", Triple::riscv64) - .Case("hexagon", Triple::hexagon) - .Cases("s390x", "systemz", Triple::systemz) - .Case("sparc", Triple::sparc) - .Case("sparcel", Triple::sparcel) - .Cases("sparcv9", "sparc64", Triple::sparcv9) - .Case("tce", Triple::tce) - .Case("tcele", Triple::tcele) - .Case("xcore", Triple::xcore) - .Case("nvptx", Triple::nvptx) - .Case("nvptx64", Triple::nvptx64) - .Case("amdil", Triple::amdil) - .Case("amdil64", Triple::amdil64) - .Case("hsail", Triple::hsail) - .Case("hsail64", Triple::hsail64) - .Case("spir", Triple::spir) - .Case("spir64", Triple::spir64) - .StartsWith("kalimba", Triple::kalimba) - .Case("lanai", Triple::lanai) - .Case("renderscript32", Triple::renderscript32) - .Case("renderscript64", Triple::renderscript64) - .Case("shave", Triple::shave) - .Case("ve", Triple::ve) - .Case("wasm32", Triple::wasm32) - .Case("wasm64", Triple::wasm64) - .Case("csky", Triple::csky) - .Default(Triple::UnknownArch); ->>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp // Some architectures require special parsing logic just to compute the // ArchType result. @@ -964,13 +896,8 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) { case Triple::hsail: case Triple::kalimba: case Triple::lanai: -<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp - case Triple::le32: - case Triple::le64: case Triple::loongarch32: case Triple::loongarch64: -======= ->>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case Triple::m68k: case Triple::mips64: case Triple::mips64el: @@ -1665,11 +1592,7 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) { case llvm::Triple::hsail: case llvm::Triple::kalimba: case llvm::Triple::lanai: -<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp - case llvm::Triple::le32: case llvm::Triple::loongarch32: -======= ->>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case llvm::Triple::m68k: case llvm::Triple::mips: case llvm::Triple::mipsel: @@ -1701,11 +1624,7 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) { case llvm::Triple::bpfeb: case llvm::Triple::bpfel: case llvm::Triple::hsail64: -<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp - case llvm::Triple::le64: case llvm::Triple::loongarch64: -======= ->>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case llvm::Triple::mips64: case llvm::Triple::mips64el: case llvm::Triple::nvptx64: @@ -1763,11 +1682,7 @@ Triple Triple::get32BitArchVariant() const { case Triple::hsail: case Triple::kalimba: case Triple::lanai: -<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp - case Triple::le32: case Triple::loongarch32: -======= ->>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case Triple::m68k: case Triple::mips: case Triple::mipsel: @@ -1797,8 +1712,6 @@ Triple Triple::get32BitArchVariant() const { case Triple::aarch64_be: T.setArch(Triple::armeb); break; case Triple::amdil64: T.setArch(Triple::amdil); break; case Triple::hsail64: T.setArch(Triple::hsail); break; -<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp - case Triple::le64: T.setArch(Triple::le32); break; case Triple::loongarch64: T.setArch(Triple::loongarch32); break; case Triple::mips64: T.setArch(Triple::mips, getSubArch()); @@ -1806,10 +1719,6 @@ Triple Triple::get32BitArchVariant() const { case Triple::mips64el: T.setArch(Triple::mipsel, getSubArch()); break; -======= - case Triple::mips64: T.setArch(Triple::mips); break; - case Triple::mips64el: T.setArch(Triple::mipsel); break; ->>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case Triple::nvptx64: T.setArch(Triple::nvptx); break; case Triple::ppc64: T.setArch(Triple::ppc); break; case Triple::ppc64le: T.setArch(Triple::ppcle); break; @@ -1857,11 +1766,7 @@ Triple Triple::get64BitArchVariant() const { case Triple::bpfeb: case Triple::bpfel: case Triple::hsail64: -<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp - case Triple::le64: case Triple::loongarch64: -======= ->>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case Triple::mips64: case Triple::mips64el: case Triple::nvptx64: @@ -1884,8 +1789,6 @@ Triple Triple::get64BitArchVariant() const { case Triple::arm: T.setArch(Triple::aarch64); break; case Triple::armeb: T.setArch(Triple::aarch64_be); break; case Triple::hsail: T.setArch(Triple::hsail64); break; -<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp - case Triple::le32: T.setArch(Triple::le64); break; case Triple::loongarch32: T.setArch(Triple::loongarch64); break; case Triple::mips: T.setArch(Triple::mips64, getSubArch()); @@ -1893,10 +1796,6 @@ Triple Triple::get64BitArchVariant() const { case Triple::mipsel: T.setArch(Triple::mips64el, getSubArch()); break; -======= - case Triple::mips: T.setArch(Triple::mips64); break; - case Triple::mipsel: T.setArch(Triple::mips64el); break; ->>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case Triple::nvptx: T.setArch(Triple::nvptx64); break; case Triple::ppc: T.setArch(Triple::ppc64); break; case Triple::ppcle: T.setArch(Triple::ppc64le); break; @@ -1932,13 +1831,8 @@ Triple Triple::getBigEndianArchVariant() const { case Triple::hsail64: case Triple::hsail: case Triple::kalimba: -<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp - case Triple::le32: - case Triple::le64: case Triple::loongarch32: case Triple::loongarch64: -======= ->>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case Triple::msp430: case Triple::nvptx64: case Triple::nvptx: @@ -2040,13 +1934,8 @@ bool Triple::isLittleEndian() const { case Triple::hsail64: case Triple::hsail: case Triple::kalimba: -<<<<<<< HEAD:llvm/lib/TargetParser/Triple.cpp - case Triple::le32: - case Triple::le64: case Triple::loongarch32: case Triple::loongarch64: -======= ->>>>>>> parent of ef5e7f90ea4d (Temporarily revert the code part of D100981 "Delete le32/le64 targets"):llvm/lib/Support/Triple.cpp case Triple::mips64el: case Triple::mipsel: case Triple::msp430: From 57215c684c431d0e6283c1d8b21f0b6ea6ce20e5 Mon Sep 17 00:00:00 2001 From: Aaron Ballman Date: Thu, 11 Jul 2024 10:59:35 -0400 Subject: [PATCH 3/7] Remove code relying on le32 as a triple --- clang/lib/CodeGen/CodeGenModule.cpp | 2 -- 1 file changed, 2 deletions(-) diff --git a/clang/lib/CodeGen/CodeGenModule.cpp b/clang/lib/CodeGen/CodeGenModule.cpp index 5c810cd332185b..e5d6c890134e8e 100644 --- a/clang/lib/CodeGen/CodeGenModule.cpp +++ b/clang/lib/CodeGen/CodeGenModule.cpp @@ -116,8 +116,6 @@ createTargetCodeGenInfo(CodeGenModule &CGM) { default: return createDefaultTargetCodeGenInfo(CGM); - case llvm::Triple::le32: - return createPNaClTargetCodeGenInfo(CGM); case llvm::Triple::m68k: return createM68kTargetCodeGenInfo(CGM); case llvm::Triple::mips: From 073729ff05d62f3dc7cbf527c7c15775e5799ff9 Mon Sep 17 00:00:00 2001 From: Aaron Ballman Date: Thu, 11 Jul 2024 11:26:45 -0400 Subject: [PATCH 4/7] Repair some Clang tests --- clang/test/CodeGen/bitfield-access-pad.c | 1 - clang/test/CodeGen/bitfield-access-unit.c | 4 ++-- clang/test/CodeGenCXX/bitfield-access-empty.cpp | 1 - clang/test/CodeGenCXX/bitfield-access-tail.cpp | 1 - clang/test/Preprocessor/predefined-macros-no-warnings.c | 2 -- 5 files changed, 2 insertions(+), 7 deletions(-) diff --git a/clang/test/CodeGen/bitfield-access-pad.c b/clang/test/CodeGen/bitfield-access-pad.c index edda7b7798d057..8608c5bd8be116 100644 --- a/clang/test/CodeGen/bitfield-access-pad.c +++ b/clang/test/CodeGen/bitfield-access-pad.c @@ -16,7 +16,6 @@ // Configs that have expensive unaligned access // Little Endian // RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s -// RUN: %clang_cc1 -triple=le64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s // Big endian // RUN: %clang_cc1 -triple=m68k-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s diff --git a/clang/test/CodeGen/bitfield-access-unit.c b/clang/test/CodeGen/bitfield-access-unit.c index d0553c5183eeff..c1b0a43cccc885 100644 --- a/clang/test/CodeGen/bitfield-access-unit.c +++ b/clang/test/CodeGen/bitfield-access-unit.c @@ -53,8 +53,8 @@ // RUN: %clang_cc1 -triple=sparc-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT-STRICT %s // RUN: %clang_cc1 -triple=tce-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT-STRICT %s -// Both le64-elf and m68-elf are strict alignment ISAs with 4-byte aligned -// 64-bit or 2-byte aligned 32-bit integer types. This more compex to describe here. +// m68-elf is a strict alignment ISA with 4-byte aligned 64-bit or 2-byte +// aligned 32-bit integer types. This more compex to describe here. // If unaligned access is expensive don't stick these together. struct A { diff --git a/clang/test/CodeGenCXX/bitfield-access-empty.cpp b/clang/test/CodeGenCXX/bitfield-access-empty.cpp index c5e6f55ffa6964..96047ce4729979 100644 --- a/clang/test/CodeGenCXX/bitfield-access-empty.cpp +++ b/clang/test/CodeGenCXX/bitfield-access-empty.cpp @@ -26,7 +26,6 @@ // RUN: %clang_cc1 -triple=bpf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s // RUN: %clang_cc1 -triple=csky %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s // RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s -// RUN: %clang_cc1 -triple=le64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s // RUN: %clang_cc1 -triple=loongarch32-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s // RUN: %clang_cc1 -triple=nvptx-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s // RUN: %clang_cc1 -triple=riscv32 %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s diff --git a/clang/test/CodeGenCXX/bitfield-access-tail.cpp b/clang/test/CodeGenCXX/bitfield-access-tail.cpp index 1539e17cad4369..fb961f327f2e5c 100644 --- a/clang/test/CodeGenCXX/bitfield-access-tail.cpp +++ b/clang/test/CodeGenCXX/bitfield-access-tail.cpp @@ -26,7 +26,6 @@ // RUN: %clang_cc1 -triple=bpf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s // RUN: %clang_cc1 -triple=csky %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s // RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s -// RUN: %clang_cc1 -triple=le64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s // RUN: %clang_cc1 -triple=loongarch32-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s // RUN: %clang_cc1 -triple=nvptx-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s // RUN: %clang_cc1 -triple=riscv32 %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s diff --git a/clang/test/Preprocessor/predefined-macros-no-warnings.c b/clang/test/Preprocessor/predefined-macros-no-warnings.c index 722e3e77214b64..d44b99a2b192a1 100644 --- a/clang/test/Preprocessor/predefined-macros-no-warnings.c +++ b/clang/test/Preprocessor/predefined-macros-no-warnings.c @@ -75,8 +75,6 @@ // RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple m68k // RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple m68k-linux // RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple m68k-netbsd -// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple le32-nacl -// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple le64 // RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple ppc // RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple ppc-freebsd // RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple ppc-netbsd From 19e8c654fba78241ea23c0bea1d8def51c3453df Mon Sep 17 00:00:00 2001 From: Aaron Ballman Date: Thu, 11 Jul 2024 11:27:01 -0400 Subject: [PATCH 5/7] The header no longer exists, so remove it from the formatted files list --- clang/docs/tools/clang-formatted-files.txt | 1 - 1 file changed, 1 deletion(-) diff --git a/clang/docs/tools/clang-formatted-files.txt b/clang/docs/tools/clang-formatted-files.txt index a8ee8f1fcb87c2..62871133a68075 100644 --- a/clang/docs/tools/clang-formatted-files.txt +++ b/clang/docs/tools/clang-formatted-files.txt @@ -362,7 +362,6 @@ clang/lib/Basic/Targets/BPF.cpp clang/lib/Basic/Targets/BPF.h clang/lib/Basic/Targets/Hexagon.h clang/lib/Basic/Targets/Lanai.h -clang/lib/Basic/Targets/Le64.h clang/lib/Basic/Targets/M68k.h clang/lib/Basic/Targets/MSP430.h clang/lib/Basic/Targets/NVPTX.cpp From f2e2305b5fcba2f11348bd6d8739e6ef87516520 Mon Sep 17 00:00:00 2001 From: Aaron Ballman Date: Thu, 11 Jul 2024 11:30:48 -0400 Subject: [PATCH 6/7] Add a release note --- clang/docs/ReleaseNotes.rst | 2 ++ 1 file changed, 2 insertions(+) diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index 6adf57da42e656..e282b284c8c5c1 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -40,6 +40,8 @@ code bases. - Setting the deprecated CMake variable ``GCC_INSTALL_PREFIX`` (which sets the default ``--gcc-toolchain=``) now leads to a fatal error. +- The ``le32`` and ``le64`` targets have been removed. + C/C++ Language Potentially Breaking Changes ------------------------------------------- From 7570ec37a8d4abc9ec5a258edd0ba35207710a3a Mon Sep 17 00:00:00 2001 From: Aaron Ballman Date: Thu, 11 Jul 2024 12:25:48 -0400 Subject: [PATCH 7/7] Remove an incorrect assertion --- clang/lib/Basic/Targets/OSTargets.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/clang/lib/Basic/Targets/OSTargets.h b/clang/lib/Basic/Targets/OSTargets.h index 4fcf16c62ae621..0a4f06967fff5a 100644 --- a/clang/lib/Basic/Targets/OSTargets.h +++ b/clang/lib/Basic/Targets/OSTargets.h @@ -841,9 +841,6 @@ class LLVM_LIBRARY_VISIBILITY NaClTargetInfo : public OSTargetInfo { "i64:64-i128:128-n8:16:32:64-S128"); } else if (Triple.getArch() == llvm::Triple::mipsel) { // Handled on mips' setDataLayout. - } else { - assert(Triple.getArch() == llvm::Triple::mipsel); - // Handled on mips' setDataLayout. } } };