diff --git a/llvm/include/llvm/CodeGen/MachinePostDominators.h b/llvm/include/llvm/CodeGen/MachinePostDominators.h index cee4294f6317b0..c047e082662925 100644 --- a/llvm/include/llvm/CodeGen/MachinePostDominators.h +++ b/llvm/include/llvm/CodeGen/MachinePostDominators.h @@ -15,78 +15,63 @@ #define LLVM_CODEGEN_MACHINEPOSTDOMINATORS_H #include "llvm/CodeGen/MachineDominators.h" -#include "llvm/CodeGen/MachineFunctionPass.h" -#include namespace llvm { +extern template class DominatorTreeBase; // PostDomTree + +namespace DomTreeBuilder { +using MBBPostDomTree = PostDomTreeBase; +using MBBPostDomTreeGraphDiff = GraphDiff; + +extern template void Calculate(MBBPostDomTree &DT); +extern template void InsertEdge(MBBPostDomTree &DT, + MachineBasicBlock *From, + MachineBasicBlock *To); +extern template void DeleteEdge(MBBPostDomTree &DT, + MachineBasicBlock *From, + MachineBasicBlock *To); +extern template void ApplyUpdates(MBBPostDomTree &DT, + MBBPostDomTreeGraphDiff &, + MBBPostDomTreeGraphDiff *); +extern template bool +Verify(const MBBPostDomTree &DT, + MBBPostDomTree::VerificationLevel VL); +} // namespace DomTreeBuilder + /// /// MachinePostDominatorTree - an analysis pass wrapper for DominatorTree /// used to compute the post-dominator tree for MachineFunctions. /// -class MachinePostDominatorTree : public MachineFunctionPass { - using PostDomTreeT = PostDomTreeBase; - std::unique_ptr PDT; +class MachinePostDominatorTree : public PostDomTreeBase { + using Base = PostDomTreeBase; public: - static char ID; - - MachinePostDominatorTree(); - - PostDomTreeT &getBase() { - if (!PDT) - PDT.reset(new PostDomTreeT()); - return *PDT; - } - - FunctionPass *createMachinePostDominatorTreePass(); - - MachineDomTreeNode *getRootNode() const { return PDT->getRootNode(); } - - MachineDomTreeNode *operator[](MachineBasicBlock *BB) const { - return PDT->getNode(BB); - } - - MachineDomTreeNode *getNode(MachineBasicBlock *BB) const { - return PDT->getNode(BB); - } - - bool dominates(const MachineDomTreeNode *A, - const MachineDomTreeNode *B) const { - return PDT->dominates(A, B); - } - - bool dominates(const MachineBasicBlock *A, const MachineBasicBlock *B) const { - return PDT->dominates(A, B); - } + MachinePostDominatorTree() = default; - bool properlyDominates(const MachineDomTreeNode *A, - const MachineDomTreeNode *B) const { - return PDT->properlyDominates(A, B); - } - - bool properlyDominates(const MachineBasicBlock *A, - const MachineBasicBlock *B) const { - return PDT->properlyDominates(A, B); - } - - bool isVirtualRoot(const MachineDomTreeNode *Node) const { - return PDT->isVirtualRoot(Node); - } - - MachineBasicBlock *findNearestCommonDominator(MachineBasicBlock *A, - MachineBasicBlock *B) const { - return PDT->findNearestCommonDominator(A, B); - } + /// Make findNearestCommonDominator(const NodeT *A, const NodeT *B) available. + using Base::findNearestCommonDominator; /// Returns the nearest common dominator of the given blocks. /// If that tree node is a virtual root, a nullptr will be returned. MachineBasicBlock * findNearestCommonDominator(ArrayRef Blocks) const; +}; + +class MachinePostDominatorTreeWrapperPass : public MachineFunctionPass { + std::optional PDT; + +public: + static char ID; + + MachinePostDominatorTreeWrapperPass(); + + MachinePostDominatorTree &getPostDomTree() { return *PDT; } + const MachinePostDominatorTree &getPostDomTree() const { return *PDT; } bool runOnMachineFunction(MachineFunction &MF) override; void getAnalysisUsage(AnalysisUsage &AU) const override; - void releaseMemory() override { PDT.reset(nullptr); } + void releaseMemory() override { PDT.reset(); } void verifyAnalysis() const override; void print(llvm::raw_ostream &OS, const Module *M = nullptr) const override; }; diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h index ee13735ef3257c..4ddb7112a47bba 100644 --- a/llvm/include/llvm/InitializePasses.h +++ b/llvm/include/llvm/InitializePasses.h @@ -200,7 +200,7 @@ void initializeMachineModuleInfoWrapperPassPass(PassRegistry &); void initializeMachineOptimizationRemarkEmitterPassPass(PassRegistry&); void initializeMachineOutlinerPass(PassRegistry&); void initializeMachinePipelinerPass(PassRegistry&); -void initializeMachinePostDominatorTreePass(PassRegistry&); +void initializeMachinePostDominatorTreeWrapperPassPass(PassRegistry &); void initializeMachineRegionInfoPassPass(PassRegistry&); void initializeMachineSanitizerBinaryMetadataPass(PassRegistry &); void initializeMachineSchedulerPass(PassRegistry&); diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp index b9093208aad588..7dcb0ea5d903c5 100644 --- a/llvm/lib/CodeGen/CodeGen.cpp +++ b/llvm/lib/CodeGen/CodeGen.cpp @@ -91,7 +91,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) { initializeMachinePipelinerPass(Registry); initializeMachineSanitizerBinaryMetadataPass(Registry); initializeModuloScheduleTestPass(Registry); - initializeMachinePostDominatorTreePass(Registry); + initializeMachinePostDominatorTreeWrapperPassPass(Registry); initializeMachineRegionInfoPassPass(Registry); initializeMachineSchedulerPass(Registry); initializeMachineSinkingPass(Registry); diff --git a/llvm/lib/CodeGen/MIRSampleProfile.cpp b/llvm/lib/CodeGen/MIRSampleProfile.cpp index 138cc567487626..84e6c612a33439 100644 --- a/llvm/lib/CodeGen/MIRSampleProfile.cpp +++ b/llvm/lib/CodeGen/MIRSampleProfile.cpp @@ -71,7 +71,7 @@ INITIALIZE_PASS_BEGIN(MIRProfileLoaderPass, DEBUG_TYPE, /* cfg = */ false, /* is_analysis = */ false) INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass) -INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree) +INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass) INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo) INITIALIZE_PASS_DEPENDENCY(MachineOptimizationRemarkEmitterPass) INITIALIZE_PASS_END(MIRProfileLoaderPass, DEBUG_TYPE, "Load MIR Sample Profile", @@ -366,8 +366,9 @@ bool MIRProfileLoaderPass::runOnMachineFunction(MachineFunction &MF) { MBFI = &getAnalysis(); MIRSampleLoader->setInitVals( &getAnalysis().getDomTree(), - &getAnalysis(), &getAnalysis(), - MBFI, &getAnalysis().getORE()); + &getAnalysis().getPostDomTree(), + &getAnalysis(), MBFI, + &getAnalysis().getORE()); MF.RenumberBlocks(); if (ViewBFIBefore && ViewBlockLayoutWithBFI != GVDT_None && @@ -401,7 +402,7 @@ void MIRProfileLoaderPass::getAnalysisUsage(AnalysisUsage &AU) const { AU.setPreservesAll(); AU.addRequired(); AU.addRequired(); - AU.addRequired(); + AU.addRequired(); AU.addRequiredTransitive(); AU.addRequired(); MachineFunctionPass::getAnalysisUsage(AU); diff --git a/llvm/lib/CodeGen/MachineBlockPlacement.cpp b/llvm/lib/CodeGen/MachineBlockPlacement.cpp index c0cdeab25f1cac..d250981117c8f9 100644 --- a/llvm/lib/CodeGen/MachineBlockPlacement.cpp +++ b/llvm/lib/CodeGen/MachineBlockPlacement.cpp @@ -606,7 +606,7 @@ class MachineBlockPlacement : public MachineFunctionPass { AU.addRequired(); AU.addRequired(); if (TailDupPlacement) - AU.addRequired(); + AU.addRequired(); AU.addRequired(); AU.addRequired(); AU.addRequired(); @@ -624,7 +624,7 @@ INITIALIZE_PASS_BEGIN(MachineBlockPlacement, DEBUG_TYPE, "Branch Probability Basic Block Placement", false, false) INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo) INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo) -INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree) +INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass) INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo) INITIALIZE_PASS_DEPENDENCY(ProfileSummaryInfoWrapperPass) INITIALIZE_PASS_END(MachineBlockPlacement, DEBUG_TYPE, @@ -3417,7 +3417,7 @@ bool MachineBlockPlacement::runOnMachineFunction(MachineFunction &MF) { TailDupSize = TII->getTailDuplicateSize(PassConfig->getOptLevel()); if (allowTailDupPlacement()) { - MPDT = &getAnalysis(); + MPDT = &getAnalysis().getPostDomTree(); bool OptForSize = MF.getFunction().hasOptSize() || llvm::shouldOptimizeForSize(&MF, PSI, &MBFI->getMBFI()); if (OptForSize) @@ -3449,7 +3449,7 @@ bool MachineBlockPlacement::runOnMachineFunction(MachineFunction &MF) { ComputedEdges.clear(); // Must redo the post-dominator tree if blocks were changed. if (MPDT) - MPDT->runOnMachineFunction(MF); + MPDT->recalculate(MF); ChainAllocator.DestroyAll(); buildCFGChains(); } diff --git a/llvm/lib/CodeGen/MachinePostDominators.cpp b/llvm/lib/CodeGen/MachinePostDominators.cpp index fb96d0efa4d4c2..bb587b0611fa1e 100644 --- a/llvm/lib/CodeGen/MachinePostDominators.cpp +++ b/llvm/lib/CodeGen/MachinePostDominators.cpp @@ -19,31 +19,46 @@ using namespace llvm; namespace llvm { template class DominatorTreeBase; // PostDomTreeBase +namespace DomTreeBuilder { + +template void Calculate(MBBPostDomTree &DT); +template void InsertEdge(MBBPostDomTree &DT, + MachineBasicBlock *From, + MachineBasicBlock *To); +template void DeleteEdge(MBBPostDomTree &DT, + MachineBasicBlock *From, + MachineBasicBlock *To); +template void ApplyUpdates(MBBPostDomTree &DT, + MBBPostDomTreeGraphDiff &, + MBBPostDomTreeGraphDiff *); +template bool Verify(const MBBPostDomTree &DT, + MBBPostDomTree::VerificationLevel VL); + +} // namespace DomTreeBuilder extern bool VerifyMachineDomInfo; } // namespace llvm -char MachinePostDominatorTree::ID = 0; +char MachinePostDominatorTreeWrapperPass::ID = 0; //declare initializeMachinePostDominatorTreePass -INITIALIZE_PASS(MachinePostDominatorTree, "machinepostdomtree", +INITIALIZE_PASS(MachinePostDominatorTreeWrapperPass, "machinepostdomtree", "MachinePostDominator Tree Construction", true, true) -MachinePostDominatorTree::MachinePostDominatorTree() - : MachineFunctionPass(ID), PDT(nullptr) { - initializeMachinePostDominatorTreePass(*PassRegistry::getPassRegistry()); +MachinePostDominatorTreeWrapperPass::MachinePostDominatorTreeWrapperPass() + : MachineFunctionPass(ID), PDT() { + initializeMachinePostDominatorTreeWrapperPassPass( + *PassRegistry::getPassRegistry()); } -FunctionPass *MachinePostDominatorTree::createMachinePostDominatorTreePass() { - return new MachinePostDominatorTree(); -} - -bool MachinePostDominatorTree::runOnMachineFunction(MachineFunction &F) { - PDT = std::make_unique(); +bool MachinePostDominatorTreeWrapperPass::runOnMachineFunction( + MachineFunction &F) { + PDT = MachinePostDominatorTree(); PDT->recalculate(F); return false; } -void MachinePostDominatorTree::getAnalysisUsage(AnalysisUsage &AU) const { +void MachinePostDominatorTreeWrapperPass::getAnalysisUsage( + AnalysisUsage &AU) const { AU.setPreservesAll(); MachineFunctionPass::getAnalysisUsage(AU); } @@ -54,26 +69,23 @@ MachineBasicBlock *MachinePostDominatorTree::findNearestCommonDominator( MachineBasicBlock *NCD = Blocks.front(); for (MachineBasicBlock *BB : Blocks.drop_front()) { - NCD = PDT->findNearestCommonDominator(NCD, BB); + NCD = Base::findNearestCommonDominator(NCD, BB); // Stop when the root is reached. - if (PDT->isVirtualRoot(PDT->getNode(NCD))) + if (isVirtualRoot(getNode(NCD))) return nullptr; } return NCD; } -void MachinePostDominatorTree::verifyAnalysis() const { - if (PDT && VerifyMachineDomInfo) - if (!PDT->verify(PostDomTreeT::VerificationLevel::Basic)) { - errs() << "MachinePostDominatorTree verification failed\n"; - - abort(); - } +void MachinePostDominatorTreeWrapperPass::verifyAnalysis() const { + if (VerifyMachineDomInfo && PDT && + !PDT->verify(MachinePostDominatorTree::VerificationLevel::Basic)) + report_fatal_error("MachinePostDominatorTree verification failed!"); } -void MachinePostDominatorTree::print(llvm::raw_ostream &OS, - const Module *M) const { +void MachinePostDominatorTreeWrapperPass::print(llvm::raw_ostream &OS, + const Module *M) const { PDT->print(OS); } diff --git a/llvm/lib/CodeGen/MachineRegionInfo.cpp b/llvm/lib/CodeGen/MachineRegionInfo.cpp index d496b0c182c76e..f8268b8894ca37 100644 --- a/llvm/lib/CodeGen/MachineRegionInfo.cpp +++ b/llvm/lib/CodeGen/MachineRegionInfo.cpp @@ -85,7 +85,8 @@ bool MachineRegionInfoPass::runOnMachineFunction(MachineFunction &F) { releaseMemory(); auto DT = &getAnalysis().getDomTree(); - auto PDT = &getAnalysis(); + auto PDT = + &getAnalysis().getPostDomTree(); auto DF = &getAnalysis(); RI.recalculate(F, DT, PDT, DF); @@ -110,7 +111,7 @@ void MachineRegionInfoPass::verifyAnalysis() const { void MachineRegionInfoPass::getAnalysisUsage(AnalysisUsage &AU) const { AU.setPreservesAll(); AU.addRequired(); - AU.addRequired(); + AU.addRequired(); AU.addRequired(); MachineFunctionPass::getAnalysisUsage(AU); } @@ -131,7 +132,7 @@ char &MachineRegionInfoPassID = MachineRegionInfoPass::ID; INITIALIZE_PASS_BEGIN(MachineRegionInfoPass, DEBUG_TYPE, "Detect single entry single exit regions", true, true) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass) -INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree) +INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass) INITIALIZE_PASS_DEPENDENCY(MachineDominanceFrontier) INITIALIZE_PASS_END(MachineRegionInfoPass, DEBUG_TYPE, "Detect single entry single exit regions", true, true) diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp index dcfa389e9bf416..81b2fcfe78fd54 100644 --- a/llvm/lib/CodeGen/MachineSink.cpp +++ b/llvm/lib/CodeGen/MachineSink.cpp @@ -185,7 +185,7 @@ namespace { MachineFunctionPass::getAnalysisUsage(AU); AU.addRequired(); AU.addRequired(); - AU.addRequired(); + AU.addRequired(); AU.addRequired(); AU.addRequired(); AU.addPreserved(); @@ -709,7 +709,7 @@ bool MachineSinking::runOnMachineFunction(MachineFunction &MF) { TRI = STI->getRegisterInfo(); MRI = &MF.getRegInfo(); DT = &getAnalysis().getDomTree(); - PDT = &getAnalysis(); + PDT = &getAnalysis().getPostDomTree(); CI = &getAnalysis().getCycleInfo(); MBFI = UseBlockFreqInfo ? &getAnalysis() : nullptr; MBPI = &getAnalysis(); diff --git a/llvm/lib/CodeGen/ShrinkWrap.cpp b/llvm/lib/CodeGen/ShrinkWrap.cpp index fa9b7895239d38..eb370163e1f4e0 100644 --- a/llvm/lib/CodeGen/ShrinkWrap.cpp +++ b/llvm/lib/CodeGen/ShrinkWrap.cpp @@ -226,7 +226,7 @@ class ShrinkWrap : public MachineFunctionPass { void init(MachineFunction &MF) { RCI.runOnMachineFunction(MF); MDT = &getAnalysis().getDomTree(); - MPDT = &getAnalysis(); + MPDT = &getAnalysis().getPostDomTree(); Save = nullptr; Restore = nullptr; MBFI = &getAnalysis(); @@ -263,7 +263,7 @@ class ShrinkWrap : public MachineFunctionPass { AU.setPreservesAll(); AU.addRequired(); AU.addRequired(); - AU.addRequired(); + AU.addRequired(); AU.addRequired(); AU.addRequired(); MachineFunctionPass::getAnalysisUsage(AU); @@ -290,7 +290,7 @@ char &llvm::ShrinkWrapID = ShrinkWrap::ID; INITIALIZE_PASS_BEGIN(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false) INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass) -INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree) +INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass) INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo) INITIALIZE_PASS_DEPENDENCY(MachineOptimizationRemarkEmitterPass) INITIALIZE_PASS_END(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false) @@ -671,7 +671,7 @@ bool ShrinkWrap::postShrinkWrapping(bool HasCandidate, MachineFunction &MF, Restore = NewRestore; MDT->recalculate(MF); - MPDT->runOnMachineFunction(MF); + MPDT->recalculate(MF); assert((MDT->dominates(Save, Restore) && MPDT->dominates(Restore, Save)) && "Incorrect save or restore point due to dominance relations"); diff --git a/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp index 8c914382b1ecb2..fb258547e8fb90 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp @@ -47,7 +47,7 @@ class AMDGPUGlobalISelDivergenceLowering : public MachineFunctionPass { void getAnalysisUsage(AnalysisUsage &AU) const override { AU.setPreservesCFG(); AU.addRequired(); - AU.addRequired(); + AU.addRequired(); AU.addRequired(); MachineFunctionPass::getAnalysisUsage(AU); } @@ -193,7 +193,7 @@ void DivergenceLoweringHelper::constrainAsLaneMask(Incoming &In) { INITIALIZE_PASS_BEGIN(AMDGPUGlobalISelDivergenceLowering, DEBUG_TYPE, "AMDGPU GlobalISel divergence lowering", false, false) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass) -INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree) +INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass) INITIALIZE_PASS_DEPENDENCY(MachineUniformityAnalysisPass) INITIALIZE_PASS_END(AMDGPUGlobalISelDivergenceLowering, DEBUG_TYPE, "AMDGPU GlobalISel divergence lowering", false, false) @@ -211,7 +211,8 @@ bool AMDGPUGlobalISelDivergenceLowering::runOnMachineFunction( MachineFunction &MF) { MachineDominatorTree &DT = getAnalysis().getDomTree(); - MachinePostDominatorTree &PDT = getAnalysis(); + MachinePostDominatorTree &PDT = + getAnalysis().getPostDomTree(); MachineUniformityInfo &MUI = getAnalysis().getUniformityInfo(); diff --git a/llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp b/llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp index b35f59bc5ba30b..1a73fdf028c9ac 100644 --- a/llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp +++ b/llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp @@ -114,7 +114,7 @@ class R600MachineCFGStructurizer : public MachineFunctionPass { void getAnalysisUsage(AnalysisUsage &AU) const override { AU.addRequired(); - AU.addRequired(); + AU.addRequired(); AU.addRequired(); MachineFunctionPass::getAnalysisUsage(AU); } @@ -142,7 +142,7 @@ class R600MachineCFGStructurizer : public MachineFunctionPass { LLVM_DEBUG(dbgs() << "LoopInfo:\n"; PrintLoopinfo(*MLI);); MDT = &getAnalysis().getDomTree(); LLVM_DEBUG(MDT->print(dbgs());); - PDT = &getAnalysis(); + PDT = &getAnalysis().getPostDomTree(); LLVM_DEBUG(PDT->print(dbgs());); prepare(); run(); @@ -1630,7 +1630,7 @@ void R600MachineCFGStructurizer::retireBlock(MachineBasicBlock *MBB) { INITIALIZE_PASS_BEGIN(R600MachineCFGStructurizer, "amdgpustructurizer", "AMDGPU CFG Structurizer", false, false) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass) -INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree) +INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass) INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo) INITIALIZE_PASS_END(R600MachineCFGStructurizer, "amdgpustructurizer", "AMDGPU CFG Structurizer", false, false) diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp index 230443313d72ac..4c53a081cdb29f 100644 --- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp +++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp @@ -641,7 +641,7 @@ class SIInsertWaitcnts : public MachineFunctionPass { void getAnalysisUsage(AnalysisUsage &AU) const override { AU.setPreservesCFG(); AU.addRequired(); - AU.addRequired(); + AU.addRequired(); AU.addUsedIfAvailable(); AU.addPreserved(); MachineFunctionPass::getAnalysisUsage(AU); @@ -1118,7 +1118,7 @@ bool WaitcntBrackets::counterOutOfOrder(InstCounterType T) const { INITIALIZE_PASS_BEGIN(SIInsertWaitcnts, DEBUG_TYPE, "SI Insert Waitcnts", false, false) INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo) -INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree) +INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass) INITIALIZE_PASS_END(SIInsertWaitcnts, DEBUG_TYPE, "SI Insert Waitcnts", false, false) @@ -2398,7 +2398,7 @@ bool SIInsertWaitcnts::runOnMachineFunction(MachineFunction &MF) { MRI = &MF.getRegInfo(); const SIMachineFunctionInfo *MFI = MF.getInfo(); MLI = &getAnalysis(); - PDT = &getAnalysis(); + PDT = &getAnalysis().getPostDomTree(); if (auto AAR = getAnalysisIfAvailable()) AA = &AAR->getAAResults(); diff --git a/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp b/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp index 9f0a9e03701b48..a9ee74dec1203f 100644 --- a/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp +++ b/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp @@ -52,7 +52,7 @@ class SILowerI1Copies : public MachineFunctionPass { void getAnalysisUsage(AnalysisUsage &AU) const override { AU.setPreservesCFG(); AU.addRequired(); - AU.addRequired(); + AU.addRequired(); MachineFunctionPass::getAnalysisUsage(AU); } }; @@ -400,7 +400,7 @@ class LoopFinder { INITIALIZE_PASS_BEGIN(SILowerI1Copies, DEBUG_TYPE, "SI Lower i1 Copies", false, false) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass) -INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree) +INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass) INITIALIZE_PASS_END(SILowerI1Copies, DEBUG_TYPE, "SI Lower i1 Copies", false, false) @@ -447,7 +447,7 @@ bool SILowerI1Copies::runOnMachineFunction(MachineFunction &TheMF) { Vreg1LoweringHelper Helper( &TheMF, &getAnalysis().getDomTree(), - &getAnalysis()); + &getAnalysis().getPostDomTree()); bool Changed = false; Changed |= Helper.lowerCopiesFromI1(); diff --git a/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp b/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp index 811cd410fe31c6..0ffd755eaab7ce 100644 --- a/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp +++ b/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp @@ -242,7 +242,7 @@ class SIWholeQuadMode : public MachineFunctionPass { AU.addPreserved(); AU.addPreserved(); AU.addPreserved(); - AU.addPreserved(); + AU.addPreserved(); MachineFunctionPass::getAnalysisUsage(AU); } @@ -260,7 +260,7 @@ INITIALIZE_PASS_BEGIN(SIWholeQuadMode, DEBUG_TYPE, "SI Whole Quad Mode", false, false) INITIALIZE_PASS_DEPENDENCY(LiveIntervals) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass) -INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree) +INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass) INITIALIZE_PASS_END(SIWholeQuadMode, DEBUG_TYPE, "SI Whole Quad Mode", false, false) @@ -1689,7 +1689,9 @@ bool SIWholeQuadMode::runOnMachineFunction(MachineFunction &MF) { LIS = &getAnalysis(); auto *MDTWrapper = getAnalysisIfAvailable(); MDT = MDTWrapper ? &MDTWrapper->getDomTree() : nullptr; - PDT = getAnalysisIfAvailable(); + auto *PDTWrapper = + getAnalysisIfAvailable(); + PDT = PDTWrapper ? &PDTWrapper->getPostDomTree() : nullptr; if (ST->isWave32()) { AndOpc = AMDGPU::S_AND_B32; diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp index a5d290a61f3283..f4f84beea734dc 100644 --- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp @@ -415,7 +415,7 @@ void HexagonFrameLowering::findShrunkPrologEpilog(MachineFunction &MF, MachineDominatorTree MDT; MDT.calculate(MF); MachinePostDominatorTree MPT; - MPT.runOnMachineFunction(MF); + MPT.recalculate(MF); using UnsignedMap = DenseMap; using RPOTType = ReversePostOrderTraversal; diff --git a/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp b/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp index bf632801646484..53b2d2aa862463 100644 --- a/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp +++ b/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp @@ -166,7 +166,7 @@ class PPCBranchCoalescing : public MachineFunctionPass { void getAnalysisUsage(AnalysisUsage &AU) const override { AU.addRequired(); - AU.addRequired(); + AU.addRequired(); MachineFunctionPass::getAnalysisUsage(AU); } @@ -196,7 +196,7 @@ FunctionPass *llvm::createPPCBranchCoalescingPass() { INITIALIZE_PASS_BEGIN(PPCBranchCoalescing, DEBUG_TYPE, "Branch Coalescing", false, false) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass) -INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree) +INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass) INITIALIZE_PASS_END(PPCBranchCoalescing, DEBUG_TYPE, "Branch Coalescing", false, false) @@ -215,7 +215,7 @@ void PPCBranchCoalescing::CoalescingCandidateInfo::clear() { void PPCBranchCoalescing::initialize(MachineFunction &MF) { MDT = &getAnalysis().getDomTree(); - MPDT = &getAnalysis(); + MPDT = &getAnalysis().getPostDomTree(); TII = MF.getSubtarget().getInstrInfo(); MRI = &MF.getRegInfo(); } diff --git a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp index c57b48055d2ad7..c5684c73671da7 100644 --- a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp +++ b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp @@ -157,11 +157,11 @@ struct PPCMIPeephole : public MachineFunctionPass { void getAnalysisUsage(AnalysisUsage &AU) const override { AU.addRequired(); AU.addRequired(); - AU.addRequired(); + AU.addRequired(); AU.addRequired(); AU.addPreserved(); AU.addPreserved(); - AU.addPreserved(); + AU.addPreserved(); AU.addPreserved(); MachineFunctionPass::getAnalysisUsage(AU); } @@ -201,7 +201,7 @@ void PPCMIPeephole::initialize(MachineFunction &MFParm) { MF = &MFParm; MRI = &MF->getRegInfo(); MDT = &getAnalysis().getDomTree(); - MPDT = &getAnalysis(); + MPDT = &getAnalysis().getPostDomTree(); MBFI = &getAnalysis(); LV = &getAnalysis(); EntryFreq = MBFI->getEntryFreq(); @@ -2030,7 +2030,7 @@ INITIALIZE_PASS_BEGIN(PPCMIPeephole, DEBUG_TYPE, "PowerPC MI Peephole Optimization", false, false) INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass) -INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree) +INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass) INITIALIZE_PASS_DEPENDENCY(LiveVariables) INITIALIZE_PASS_END(PPCMIPeephole, DEBUG_TYPE, "PowerPC MI Peephole Optimization", false, false)